From: H.J. Lu Date: Thu, 19 May 2016 17:02:36 +0000 (-0700) Subject: Correct Intel processor level type mask from CPUID X-Git-Tag: glibc-2.24~237 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=de71e0421b4e267f9b6cf5a827ee5bab70226cd9;p=thirdparty%2Fglibc.git Correct Intel processor level type mask from CPUID Intel CPUID with EAX == 11 returns: ECX Bits 07 - 00: Level number. Same value in ECX input. Bits 15 - 08: Level type. ^^^^^^^^^^^^^^^^^^^^^^^^ This is level type. Bits 31 - 16: Reserved. Intel processor level type mask should be 0xff00, not 0xff0. [BZ #20119] * sysdeps/x86/cacheinfo.c (init_cacheinfo): Correct Intel processor level type mask for CPUID with EAX == 11. --- diff --git a/ChangeLog b/ChangeLog index 8adf828d1b6..7ba904d0be4 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,9 @@ +2016-05-19 H.J. Lu + + [BZ #20119] + * sysdeps/x86/cacheinfo.c (init_cacheinfo): Correct Intel + processor level type mask for CPUID with EAX == 11. + 2016-05-19 H.J. Lu * sysdeps/x86/cacheinfo.c (init_cacheinfo): Skip counting diff --git a/sysdeps/x86/cacheinfo.c b/sysdeps/x86/cacheinfo.c index 1f46d9de201..020d3fd3970 100644 --- a/sysdeps/x86/cacheinfo.c +++ b/sysdeps/x86/cacheinfo.c @@ -552,7 +552,7 @@ init_cacheinfo (void) __cpuid_count (11, i++, eax, ebx, ecx, edx); int shipped = ebx & 0xff; - int type = ecx & 0xff0; + int type = ecx & 0xff00; if (shipped == 0 || type == 0) break; else if (type == 0x200)