From: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Date: Fri, 17 Apr 2026 14:53:30 +0000 (-0400)
Subject: serial: max310x: change return type of max310x_set_ref_clk()
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=df1490942a41f26aaea9ca487299c26286327603;p=thirdparty%2Fkernel%2Fstable.git

serial: max310x: change return type of max310x_set_ref_clk()

Having max310x_set_ref_clk() return an s32 as both an error code
and a frequency value is ambiguous. Fix by passing a pointer to the
frequency value that will then be updated, and simply return a status.

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Link: https://patch.msgid.link/20260417-max310x-2-v1-3-b424e105ecac@dimonoff.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---

diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c
index b68a17ebd10b..cf27e597ea41 100644
--- a/drivers/tty/serial/max310x.c
+++ b/drivers/tty/serial/max310x.c
@@ -558,8 +558,8 @@ static int max310x_update_best_err(unsigned int f, unsigned int *besterr)
 	return 1;
 }
 
-static s32 max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
-			       unsigned int freq, bool xtal)
+static int max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
+			       unsigned int freq, unsigned int *fref, bool xtal)
 {
 	unsigned int div, clksrc, pllcfg = 0;
 	unsigned int besterr = UINT_MAX;
@@ -632,7 +632,9 @@ static s32 max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
 					     "clock is not stable\n");
 	}
 
-	return bestfreq;
+	*fref = bestfreq;
+
+	return 0;
 }
 
 static void max310x_batch_write(struct uart_port *port, u8 *txbuf, unsigned int len)
@@ -1271,7 +1273,7 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty
 	unsigned int fmin, fmax, freq;
 	int i, ret;
 	struct max310x_port *s;
-	s32 uartclk = 0;
+	unsigned int uartclk = 0;
 	bool xtal;
 
 	for (i = 0; i < devtype->nr; i++)
@@ -1357,11 +1359,9 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty
 		regmap_write(regmaps[i], MAX310X_MODE1_REG, devtype->mode1);
 	}
 
-	uartclk = max310x_set_ref_clk(dev, s, freq, xtal);
-	if (uartclk < 0) {
-		ret = uartclk;
+	ret = max310x_set_ref_clk(dev, s, freq, &uartclk, xtal);
+	if (ret < 0)
 		goto out_uart;
-	}
 
 	dev_dbg(dev, "Reference clock set to %i Hz\n", uartclk);