From: Pan Li <pan2.li@intel.com>
Date: Thu, 27 Apr 2023 03:31:42 +0000 (+0800)
Subject: RISC-V: Add required tls to read thread pointer test
X-Git-Tag: basepoints/gcc-15~9831
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=e0cf929d99bebd9a740db6db45d69957514e0c12;p=thirdparty%2Fgcc.git

RISC-V: Add required tls to read thread pointer test

The read-thread-pointer test may require the gcc configured
with --enable-tls. If no, there x4 (aka tp) register will not
be presented in the assembly code.

This patch requires the tls for the dg checking. It will perform
the test checking if --enable-tls and mark the test as unsupported
if --disable-tls.

Configured with --enable-tls:
=== gcc Summary ===
of expected passes            16

Configured with --disable-tls:
=== gcc Summary ===
of unsupported tests          8

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/read-thread-pointer.c: Add required tls.

Signed-off-by: Pan Li <pan2.li@intel.com>
---

diff --git a/gcc/testsuite/gcc.target/riscv/read-thread-pointer.c b/gcc/testsuite/gcc.target/riscv/read-thread-pointer.c
index 401fb4211299..5f460b5f746b 100644
--- a/gcc/testsuite/gcc.target/riscv/read-thread-pointer.c
+++ b/gcc/testsuite/gcc.target/riscv/read-thread-pointer.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-require-effective-target tls_native } */
 
 void *get_tp()
 {