From: AngeloGioacchino Del Regno Date: Mon, 12 Jan 2026 14:55:56 +0000 (+0100) Subject: dt-bindings: crypto: inside-secure,safexcel: Mandate only ring IRQs X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=e2bafe4d1b72e6cd06ed9c0921cb3cce674db351;p=thirdparty%2Fkernel%2Flinux.git dt-bindings: crypto: inside-secure,safexcel: Mandate only ring IRQs Not all IP implementations of EIP97 and EIP197 have the EIP and MEM interrupts hooked up to the SoC, and those are not required for functionality as status for both can be polled (and anyway there's even no real need to poll, but that's another story). As an example of this, the MediaTek MT7986A and MT7986B SoCs do not have those two interrupts hooked up to their irq controlller. For this reason, make the EIP and MEM interrupt optional on the mediatek,mt7986-crypto. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20260112145558.54644-3-angelogioacchino.delregno@collabora.com Signed-off-by: Rob Herring (Arm) --- diff --git a/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml b/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml index 1c8bfd6c958d0..3dc6c5f89d327 100644 --- a/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml +++ b/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml @@ -34,9 +34,11 @@ properties: maxItems: 1 interrupts: + minItems: 4 maxItems: 6 interrupt-names: + minItems: 4 items: - const: ring0 - const: ring1 @@ -73,6 +75,18 @@ allOf: minItems: 2 required: - clock-names + - if: + properties: + compatible: + not: + contains: + const: mediatek,mt7986-crypto + then: + properties: + interrupts: + minItems: 6 + interrupt-names: + minItems: 6 additionalProperties: false