From: Florian Krohm Date: Wed, 5 Dec 2012 04:21:41 +0000 (+0000) Subject: Update opcode table: add new insns for zEC12 X-Git-Tag: svn/VALGRIND_3_9_0~521 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=e4f15fd479102e1f0f5acaaecb2d7de3941d1c35;p=thirdparty%2Fvalgrind.git Update opcode table: add new insns for zEC12 git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13151 --- diff --git a/docs/internals/s390-opcodes.csv b/docs/internals/s390-opcodes.csv index 5bc96c6a3c..a3d0363ee4 100644 --- a/docs/internals/s390-opcodes.csv +++ b/docs/internals/s390-opcodes.csv @@ -960,3 +960,26 @@ mxtra,"multiply extended dfp with rounding mode","not implemented","new to z196" sdtra,"subtract long dfp with rounding mode","not implemented","new to z196" sxtra,"subtract extended dfp with rounding mode","not implemented","new to z196" srnmb,"set 3 bit bfp rounding mode",implemented, +etnd,"extract transaction nesting depth","not implemented",zEC12, +ntstg,"nontransactional store","not implemented",zEC12, +tabort,"transaction abort","not implemented",zEC12, +tbegin,"transaction begin","not implemented",zEC12, +tbeginc,"constrained transaction begin","not implemented",zEC12, +tend,"transaction end","not implemented",zEC12, +bpp,"branch prediction preload","not implemented",zEC12, +bprp,"branch prediction relative preload","not implemented",zEC12, +ppa,"perform processor assist","not implemented",zEC12, +niai,"next instruction access intent","not implemented",zEC12, +crdte,"compare and replace DAT table entry",N/A,"privileged instruction" +lat,"load and trap 32 bit","not implemented",zEC12, +lgat,"load and trap 64 bit","not implemented",zEC12, +lfhat,"load high and trap","not implemented",zEC12, +llgfat,"load logical and trap 32>64","not implemented",zEC12, +llgtat,"load logical thirty one bits and trap 31>64","not implemented",zEC12, +clt,"compare logical and trap 32 bit reg-mem","not implemented",zEC12, +clgt,"compare logical and trap 64 bit reg-mem","not implemented",zEC12, +risbgn,"rotate then insert selected bits nocc","not implemented",zEC12, +cdzt,"convert from zoned long","not implemented",zEC12, +cxzt,"convert from zoned extended","not implemented",zEC12, +czdt,"convert to zoned long","not implemented",zEC12, +czxt,"convert to zoned extended","not implemented",zEC12,