From: Martin Burnicki <burnicki@ntp.org>
Date: Fri, 10 Dec 2010 11:47:54 +0000 (+0100)
Subject: [Bug 1510] Add modes 20/21 for driver 8 to support RAWDCF @ 75 baud.
X-Git-Tag: NTP_4_2_7P93~5^2
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=e5ce0f6c401042a37ba1e73cab977c0a863043dc;p=thirdparty%2Fntp.git

[Bug 1510] Add modes 20/21 for driver 8 to support RAWDCF @ 75 baud.

bk: 4d02136a9JKico4jTHWw771wp9sqoQ
---

diff --git a/html/drivers/driver8.html b/html/drivers/driver8.html
index fc12f3307..b4c34f375 100644
--- a/html/drivers/driver8.html
+++ b/html/drivers/driver8.html
@@ -158,6 +158,18 @@
 				<p><b><tt>Gude Analog- und Digitalsystem GmbH 'Expert mouseCLOCK USB v2.0'</tt></b><br>
 				<br></p>
 
+			<li><b><tt>server 127.127.8.0-3 mode 20</tt></b>
+				<p><b><tt>RAWDCF receiver similar to mode 14, but operating @ 75 baud (DTR=high/RTS=low)</tt></b><br>
+				</p>
+				<p>Driving the DCF clocks at 75 baud may help to get them to work with a bunch of common USB serial converters, that do 75 but cannot do 50 baud at all, e.g. those based on Prolific PL2303.
+				<br></p>
+
+			<li><b><tt>server 127.127.8.0-3 mode 21</tt></b>
+				<p><b><tt>RAWDCF receiver similar to mode 16, but operating @ 75 baud (DTR=low/RTS=high) </tt></b><br>
+				</p>
+				<p>See comment from mode 20 clock.
+				<br></p>
+
 		</ul>
 		<p>Actual data formats and setup requirements of the various clocks can be found in <a href="../parsedata.html">NTP PARSE clock data formats</a>.</p>
 		<h4>Operation</h4>
diff --git a/ntpd/refclock_parse.c b/ntpd/refclock_parse.c
index 24d27f9b1..52e4f7309 100644
--- a/ntpd/refclock_parse.c
+++ b/ntpd/refclock_parse.c
@@ -679,6 +679,7 @@ static poll_info_t wsdcf_pollinfo = { WS_POLLRATE, WS_POLLCMD, WS_CMDSIZE };
  */
 static	int	rawdcf_init_1	(struct parseunit *);
 #define RAWDCFDTRSET_DESCRIPTION	"RAW DCF77 CODE (DTR SET/RTS CLR)"
+#define RAWDCFDTRSET75_DESCRIPTION	"RAW DCF77 CODE (DTR SET/RTS CLR @ 75 baud)"
 #define RAWDCFDTRSET_INIT 		rawdcf_init_1
 
 /*
@@ -687,6 +688,7 @@ static	int	rawdcf_init_1	(struct parseunit *);
  */
 static	int	rawdcf_init_2	(struct parseunit *);
 #define RAWDCFDTRCLRRTSSET_DESCRIPTION	"RAW DCF77 CODE (DTR CLR/RTS SET)"
+#define RAWDCFDTRCLRRTSSET75_DESCRIPTION "RAW DCF77 CODE (DTR CLR/RTS SET @ 75 baud)"
 #define RAWDCFDTRCLRRTSSET_INIT	rawdcf_init_2
 
 /*
@@ -1351,6 +1353,53 @@ static struct parse_clockinfo
 		RAWDCF_SAMPLES,
 		RAWDCF_KEEP
 	},
+	{				/* mode 20, like mode 14 but driven by 75 baud */
+		RAWDCF_FLAGS,
+		NO_POLL,
+		RAWDCFDTRSET_INIT,
+		NO_EVENT,
+		NO_END,
+		NO_MESSAGE,
+		NO_LCLDATA,
+		RAWDCF_ROOTDELAY,
+		RAWDCF_BASEDELAY,
+		DCF_A_ID,
+		RAWDCFDTRSET75_DESCRIPTION,
+		RAWDCF_FORMAT,
+		DCF_TYPE,
+		RAWDCF_MAXUNSYNC,
+		B75,
+		RAWDCF_CFLAG,
+		RAWDCF_IFLAG,
+		RAWDCF_OFLAG,
+		RAWDCF_LFLAG,
+		RAWDCF_SAMPLES,
+		RAWDCF_KEEP
+	},
+	{				/* mode 21, like mode 16 but driven by 75 baud
+					 - RAWDCF RTS set, DTR clr */
+		RAWDCF_FLAGS,
+		NO_POLL,
+		RAWDCFDTRCLRRTSSET_INIT,
+		NO_EVENT,
+		NO_END,
+		NO_MESSAGE,
+		NO_LCLDATA,
+		RAWDCF_ROOTDELAY,
+		RAWDCF_BASEDELAY,
+		DCF_A_ID,
+		RAWDCFDTRCLRRTSSET75_DESCRIPTION,
+		RAWDCF_FORMAT,
+		DCF_TYPE,
+		RAWDCF_MAXUNSYNC,
+		B75,
+		RAWDCF_CFLAG,
+		RAWDCF_IFLAG,
+		RAWDCF_OFLAG,
+		RAWDCF_LFLAG,
+		RAWDCF_SAMPLES,
+		RAWDCF_KEEP
+	},
 };
 
 static int ncltypes = sizeof(parse_clockinfo) / sizeof(struct parse_clockinfo);