From: Julian Seward Date: Mon, 2 May 2005 15:52:44 +0000 (+0000) Subject: Minor cleanups. X-Git-Tag: svn/VALGRIND_3_0_1^2~180 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=e5fd124665b8e07581143acbe14f4fd5497178f4;p=thirdparty%2Fvalgrind.git Minor cleanups. git-svn-id: svn://svn.valgrind.org/vex/trunk@1154 --- diff --git a/VEX/priv/guest-amd64/ghelpers.c b/VEX/priv/guest-amd64/ghelpers.c index a179af804c..f63cbbfdbb 100644 --- a/VEX/priv/guest-amd64/ghelpers.c +++ b/VEX/priv/guest-amd64/ghelpers.c @@ -836,9 +836,9 @@ ULong LibVEX_GuestAMD64_get_rflags ( /*IN*/VexGuestAMD64State* vex_state ) static Bool isU64 ( IRExpr* e, ULong n ) { - return e->tag == Iex_Const - && e->Iex.Const.con->tag == Ico_U64 - && e->Iex.Const.con->Ico.U64 == n; + return toBool( e->tag == Iex_Const + && e->Iex.Const.con->tag == Ico_U64 + && e->Iex.Const.con->Ico.U64 == n ); } IRExpr* guest_amd64_spechelper ( HChar* function_name, diff --git a/VEX/priv/host-amd64/isel.c b/VEX/priv/host-amd64/isel.c index 80912407bd..8b1de2c692 100644 --- a/VEX/priv/host-amd64/isel.c +++ b/VEX/priv/host-amd64/isel.c @@ -83,16 +83,6 @@ static IRExpr* binop ( IROp op, IRExpr* a1, IRExpr* a2 ) return IRExpr_Binop(op, a1, a2); } -//.. static IRExpr* mkU64 ( ULong i ) -//.. { -//.. return IRExpr_Const(IRConst_U64(i)); -//.. } - -static IRExpr* mkU32 ( UInt i ) -{ - return IRExpr_Const(IRConst_U32(i)); -} - static IRExpr* bind ( Int binder ) { return IRExpr_Binder(binder); @@ -1197,8 +1187,8 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e ) case Iop_16Uto32: { HReg dst = newVRegI(env); HReg src = iselIntExpr_R(env, e->Iex.Unop.arg); - Bool srcIs16 = e->Iex.Unop.op==Iop_16Uto32 - || e->Iex.Unop.op==Iop_16Uto64; + Bool srcIs16 = toBool( e->Iex.Unop.op==Iop_16Uto32 + || e->Iex.Unop.op==Iop_16Uto64 ); UInt mask = srcIs16 ? 0xFFFF : 0xFF; addInstr(env, mk_iMOVsd_RR(src,dst) ); addInstr(env, AMD64Instr_Alu64R(Aalu_AND, @@ -1212,8 +1202,8 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e ) case Iop_16Sto64: { HReg dst = newVRegI(env); HReg src = iselIntExpr_R(env, e->Iex.Unop.arg); - Bool srcIs16 = e->Iex.Unop.op==Iop_16Sto32 - || e->Iex.Unop.op==Iop_16Sto64; + Bool srcIs16 = toBool( e->Iex.Unop.op==Iop_16Sto32 + || e->Iex.Unop.op==Iop_16Sto64 ); UInt amt = srcIs16 ? 48 : 56; addInstr(env, mk_iMOVsd_RR(src,dst) ); addInstr(env, AMD64Instr_Sh64(Ash_SHL, amt, AMD64RM_Reg(dst))); diff --git a/VEX/priv/ir/iropt.c b/VEX/priv/ir/iropt.c index 0832bc1904..45df01c837 100644 --- a/VEX/priv/ir/iropt.c +++ b/VEX/priv/ir/iropt.c @@ -964,8 +964,8 @@ static IRExpr* fold_Expr ( IRExpr* e ) - (e->Iex.Unop.arg->Iex.Const.con->Ico.U32))); break; case Iop_Neg8: - e2 = IRExpr_Const(IRConst_U8( - - (e->Iex.Unop.arg->Iex.Const.con->Ico.U8))); + e2 = IRExpr_Const(IRConst_U8(toUChar( + - (e->Iex.Unop.arg->Iex.Const.con->Ico.U8)))); break; case Iop_64to8: {