From: Andrew Carlotti <andrew.carlotti@arm.com>
Date: Mon, 27 Nov 2023 16:12:01 +0000 (+0000)
Subject: aarch64 testsuite: Check entire .arch string
X-Git-Tag: basepoints/gcc-15~3638
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=e6bb4d997953d3ad28082a1dccb69657c6f441d9;p=thirdparty%2Fgcc.git

aarch64 testsuite: Check entire .arch string

Add a terminating newline to various tests, and add missing
extensions to some test strings.  The current output is broken for
options_set_4.c, so this test is left unchanged, to be fixed in a
subsequent patch.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/cpunative/native_cpu_18.c: Add \+nopauth\n
	* gcc.target/aarch64/options_set_7.c: Add \+crc\n
	* gcc.target/aarch64/options_set_8.c: Add \+crc\+nodotprod\n
	* gcc.target/aarch64/cpunative/native_cpu_0.c: Add \n
	* gcc.target/aarch64/cpunative/native_cpu_1.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_2.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_3.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_4.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_5.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_6.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_7.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_8.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_9.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_10.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_11.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_12.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_13.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_14.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_15.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_16.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_17.c: Ditto.
	* gcc.target/aarch64/options_set_1.c: Ditto.
	* gcc.target/aarch64/options_set_2.c: Ditto.
	* gcc.target/aarch64/options_set_3.c: Ditto.
	* gcc.target/aarch64/options_set_5.c: Ditto.
	* gcc.target/aarch64/options_set_6.c: Ditto.
	* gcc.target/aarch64/options_set_9.c: Ditto.
	* gcc.target/aarch64/options_set_11.c: Ditto.
	* gcc.target/aarch64/options_set_12.c: Ditto.
	* gcc.target/aarch64/options_set_13.c: Ditto.
	* gcc.target/aarch64/options_set_14.c: Ditto.
	* gcc.target/aarch64/options_set_15.c: Ditto.
	* gcc.target/aarch64/options_set_16.c: Ditto.
	* gcc.target/aarch64/options_set_17.c: Ditto.
	* gcc.target/aarch64/options_set_18.c: Ditto.
	* gcc.target/aarch64/options_set_19.c: Ditto.
	* gcc.target/aarch64/options_set_20.c: Ditto.
	* gcc.target/aarch64/options_set_21.c: Ditto.
	* gcc.target/aarch64/options_set_22.c: Ditto.
	* gcc.target/aarch64/options_set_23.c: Ditto.
	* gcc.target/aarch64/options_set_24.c: Ditto.
	* gcc.target/aarch64/options_set_25.c: Ditto.
	* gcc.target/aarch64/options_set_26.c: Ditto.
---

diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_0.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_0.c
index 8499f87c39b1..fb5a7a18ad1a 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_0.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_0.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\n} } } */
 
 /* Test a normal looking procinfo.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_1.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_1.c
index 2cf0e89994b1..cb50e3b73057 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_1.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+nosimd} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+nosimd\n} } } */
 
 /* Test one where fp is on by default so turn off simd.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_10.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_10.c
index ddb06b822757..6a524bad371c 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_10.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_10.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+nofp} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+nofp\n} } } */
 
 /* Test one with no entry in feature list.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_11.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_11.c
index 96b9ca434ebb..644f4792275b 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_11.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_11.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+sb} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+sb\n} } } */
 
 /* Test one with a feature name that overlaps with another one.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_12.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_12.c
index c3b44adbf6c8..fb34ddf697cc 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_12.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_12.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+ssbs} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+ssbs\n} } } */
 
 /* Test one where the longer feature overlaps with a shorter one.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_13.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_13.c
index 551669091c70..b29d50e1f79f 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_13.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_13.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\n} } } */
 
 /* Test one with mixed order of feature bits.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_14.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_14.c
index 781ab1ebbfb4..59846f76acf8 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_14.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_14.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+dotprod} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+dotprod\n} } } */
 
 /* Test one where valid feature bits are at a boundary > buffer size.   */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_15.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_15.c
index c9205d95b793..68a51898eab4 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_15.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_15.c
@@ -7,7 +7,7 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+sve2-sm4} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+sve2-sm4\n} } } */
 
 /* Test one where the bounary of buffer size would cut off and leave
    a valid feature in the first full buffer.  e.g. this will cut off at
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
index 2f963bb23127..b3613165a05b 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\+sve2} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\+sve2\n} } } */
 
 /* Test a normal looking procinfo.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
index c68a697aa3e9..a9dde5ffab14 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\+sve2} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\+sve2\n} } } */
 
 /* Test a normal looking procinfo.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_18.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_18.c
index b5f0a3005f50..10325df44972 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_18.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_18.c
@@ -7,7 +7,7 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8.6-a\+crc\+fp16\+aes\+sha3\+rng} } } */
+/* { dg-final { scan-assembler {\.arch armv8.6-a\+crc\+fp16\+aes\+sha3\+rng\+nopauth\n} } } */
 
 /* Test one where the boundary of buffer size would overwrite the last
    character read when stitching the fgets-calls together.  With the
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_2.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_2.c
index edbdb56268ea..cfca02cb147f 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_2.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+nofp} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+nofp\n} } } */
 
 /* Test one where asimd is provided byt no fp.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_3.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_3.c
index 50685c297dbd..316ddbd2ab9a 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_3.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_3.c
@@ -7,7 +7,7 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\n} } } */
 
 /* Test where asimd and fp are the only ones provided, these are default
    and so shouldn't emit anything.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_4.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_4.c
index 91ae809757a4..053dd2b6dbe6 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_4.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_4.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+crypto} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\n} } } */
 
 /* Test one where all crypto bits are given so crypto should be enabled.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_5.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_5.c
index 84139e58ee00..49dee9d6abcb 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_5.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_5.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+fp16\n} } } */
 
 /* Test one where fp16 is available and so should be emitted.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_6.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_6.c
index 7608e8845a66..20012beff7b8 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_6.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_6.c
@@ -7,7 +7,7 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+fp16\+crypto} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+fp16\+crypto\n} } } */
 
 /* Test one where the feature bits for crypto and fp16 are given in
    same order as declared in options file.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_7.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_7.c
index 72b14b4f6ed0..70a7e62fdffc 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_7.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_7.c
@@ -7,7 +7,7 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+fp16\+crypto} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+fp16\+crypto\n} } } */
 
 /* Test one where the crypto and fp16 options are specified in different
    order from what is in the options file.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_8.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_8.c
index 7a5a2144a397..795dd5ff61b3 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_8.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_8.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+sve} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+sve\n} } } */
 
 /* Test one where sve is enabled.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_9.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_9.c
index 528b5d029f1a..6b55a739c851 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_9.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_9.c
@@ -7,7 +7,7 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+sve2-sm4} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+sve2-sm4\n} } } */
 
 /* Test one here a feature that is a prefix of another is enabled.
    In this case sve is a prefix to svesm4, but sve2-sm4 should be
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_1.c b/gcc/testsuite/gcc.target/aarch64/options_set_1.c
index 40d9a05c905e..dc5eff8c901d 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_1.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\n} 1 } } */
 
 /* Check to see if crc is output by default.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_11.c b/gcc/testsuite/gcc.target/aarch64/options_set_11.c
index d083bfdbd5c4..e0e82cf514dc 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_11.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_11.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\n} } } */
 
  /* FP is default on, no need to pass on to assembler.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_12.c b/gcc/testsuite/gcc.target/aarch64/options_set_12.c
index 58a09fda2c11..aef44b331131 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_12.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_12.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16\n} } } */
 
  /* fp16 not default, should be emitted.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_13.c b/gcc/testsuite/gcc.target/aarch64/options_set_13.c
index 2a517ecb58f8..b116e08e75b4 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_13.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_13.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16\n} } } */
 
  /* FP is part of FP16, don't emit it.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_14.c b/gcc/testsuite/gcc.target/aarch64/options_set_14.c
index c192bf6cb636..e9fc3e5dc2c3 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_14.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_14.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml\n} } } */
 
  /* fmp16fml is smallest option to emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_15.c b/gcc/testsuite/gcc.target/aarch64/options_set_15.c
index 32ec3ea46431..999791b9f0d8 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_15.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_15.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml*} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml*\n} } } */
 
  /* fp included in fp16fml, only emit latter.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_16.c b/gcc/testsuite/gcc.target/aarch64/options_set_16.c
index b45c01a915b9..477b71c38179 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_16.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_16.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml\n} } } */
 
  /* fp16fml is smallest options to emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_17.c b/gcc/testsuite/gcc.target/aarch64/options_set_17.c
index c490e1f47a0a..8b21e2e1a0a0 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_17.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_17.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+dotprod} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+dotprod\n} } } */
 
  /* dotprod needs to be emitted pre armv8.4.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_18.c b/gcc/testsuite/gcc.target/aarch64/options_set_18.c
index 61587dbbd63a..977b41e3e21e 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_18.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_18.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\n} } } */
 
  /* dotprod is default in armv8.4-a, don't emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_19.c b/gcc/testsuite/gcc.target/aarch64/options_set_19.c
index 72b58126182f..0b2ec02e5c6b 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_19.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_19.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\n} } } */
 
  /* fp default, don't emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_2.c b/gcc/testsuite/gcc.target/aarch64/options_set_2.c
index f82cb5f7823b..937edc693c2d 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_2.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+crypto} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+crypto\n} 1 } } */
 
 /* Check to see if crc and crypto are maintained if crypto specified.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_20.c b/gcc/testsuite/gcc.target/aarch64/options_set_20.c
index b383e0aced2d..452b48c7291b 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_20.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_20.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
 
  /* fp16 smallest set to emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_21.c b/gcc/testsuite/gcc.target/aarch64/options_set_21.c
index 19fcd6fda6e0..f142e70fb51e 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_21.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_21.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
 
  /* fp16 smallest set to emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_22.c b/gcc/testsuite/gcc.target/aarch64/options_set_22.c
index 77ae4089f398..04ddd461857a 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_22.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_22.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
 
  /* fp16 smallest set to emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_23.c b/gcc/testsuite/gcc.target/aarch64/options_set_23.c
index dee637c5d2cb..81cfe0189e06 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_23.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_23.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
 
  /* fp16 smallest set to emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_24.c b/gcc/testsuite/gcc.target/aarch64/options_set_24.c
index 54b0e3d4a831..425cc513eeeb 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_24.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_24.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
 
  /* fp16 smallest set to emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_25.c b/gcc/testsuite/gcc.target/aarch64/options_set_25.c
index a3b2d63c06eb..5a3c10593019 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_25.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_25.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
 
  /* fp16 smallest set to emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_26.c b/gcc/testsuite/gcc.target/aarch64/options_set_26.c
index b383e0aced2d..452b48c7291b 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_26.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_26.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
 
  /* fp16 smallest set to emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_3.c b/gcc/testsuite/gcc.target/aarch64/options_set_3.c
index 7d350cfa3616..96140e36270d 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_3.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_3.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+crypto} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+crypto\n} 1 } } */
 
 /* Check if smallest set is maintained when outputting. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_5.c b/gcc/testsuite/gcc.target/aarch64/options_set_5.c
index b4c0901195ed..028fbc46ef6a 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_5.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_5.c
@@ -6,7 +6,7 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+aes} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+aes\n} 1 } } */
 
 /* Check if turning off feature bits works correctly and grouping is no
    longer valid.   */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_6.c b/gcc/testsuite/gcc.target/aarch64/options_set_6.c
index 2a1d7fe5b8ea..09ebdaa212bd 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_6.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_6.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+aes} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+aes\n} 1 } } */
 
 /* +crypto turns on +aes and +sha2, but +nosha2 disables +crypto.   */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_7.c b/gcc/testsuite/gcc.target/aarch64/options_set_7.c
index 71a2c8a19058..eb5724f74e09 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_7.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_7.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler-times {\.arch armv8\.4\-a} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.4\-a\+crc\n} 1 } } */
 
 /* Checking if enabling default features drops the superfluous bits.   */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_8.c b/gcc/testsuite/gcc.target/aarch64/options_set_8.c
index 83be1bd7a5c3..a0eacff9ce63 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_8.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_8.c
@@ -6,7 +6,7 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler-times {\.arch armv8\.4\-a} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.4\-a\+crc\+nodotprod\n} 1 } } */
 
 /* Checking if trying to turn off default features propagates the commandline
    option.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_9.c b/gcc/testsuite/gcc.target/aarch64/options_set_9.c
index e3c7cdc54ffb..5052f891b41c 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_9.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_9.c
@@ -6,7 +6,7 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler-times {\.arch armv8\-a} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\-a\n} 1 } } */
 
  /* Check that grouping of bits that don't form a synthetic group don't turn
     on the parent. e.g. rdma turns on simd+fp, but simd+fp does not turn on