From: Richard Earnshaw <rearnsha@arm.com>
Date: Mon, 30 Sep 2002 11:54:00 +0000 (+0000)
Subject: arm.h (BASE_REG_CLASS): Always return LO_REGS for Thumb.
X-Git-Tag: releases/gcc-3.2.1~227
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=e79babc3069295d353b01083bdbd37bdc3c6528c;p=thirdparty%2Fgcc.git

arm.h (BASE_REG_CLASS): Always return LO_REGS for Thumb.

* arm.h (BASE_REG_CLASS): Always return LO_REGS for Thumb.
(MODE_BASE_REG_CLASS, case Thumb): Only return BASE_REGS if we know
that we have a SImode access, and only then if reload hasn't completed;
for all other cases, use LO_REGS.

From-SVN: r57645
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 97d5b9897d22..c6c0076be67b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2002-09-30  Richard Earnshaw  <rearnsha@arm.com>
+
+	* arm.h (BASE_REG_CLASS): Always return LO_REGS for Thumb.
+	(MODE_BASE_REG_CLASS, case Thumb): Only return BASE_REGS if we know
+	that we have a SImode access, and only then if reload hasn't completed;
+	for all other cases, use LO_REGS.
+
 2002-09-29  David S. Miller  <davem@redhat.com>
 
 	* config/sparc/linux64.h (STARTFILE_SPEC32, ENDFILE_SPEC32): Kill
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 5e8b5d91cd07..c5431b537d5c 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1093,14 +1093,16 @@ enum reg_class
 
 /* The class value for index registers, and the one for base regs.  */
 #define INDEX_REG_CLASS  (TARGET_THUMB ? LO_REGS : GENERAL_REGS)
-#define BASE_REG_CLASS   (TARGET_THUMB ? BASE_REGS : GENERAL_REGS)
+#define BASE_REG_CLASS   (TARGET_THUMB ? LO_REGS : GENERAL_REGS)
 
-/* For the Thumb the high registers cannot be used as base
-   registers when addressing quanitities in QI or HI mode.  */
+/* For the Thumb the high registers cannot be used as base registers
+   when addressing quanitities in QI or HI mode; if we don't know the
+   mode, then we must be conservative.  After reload we must also be
+   conservative, since we can't support SP+reg addressing, and we
+   can't fix up any bad substitutions.  */
 #define MODE_BASE_REG_CLASS(MODE)					\
-    (TARGET_ARM ? BASE_REGS :						\
-     (((MODE) == QImode || (MODE) == HImode || (MODE) == VOIDmode)	\
-     ? LO_REGS : BASE_REGS))
+    (TARGET_ARM ? GENERAL_REGS :					\
+     (((MODE) == SImode && !reload_completed) ? BASE_REGS : LO_REGS))
 
 /* When SMALL_REGISTER_CLASSES is nonzero, the compiler allows
    registers explicitly used in the rtl to be used as spill registers