From: Fong, Yan Kei Date: Thu, 11 Sep 2025 01:58:11 +0000 (+0800) Subject: arm64: dts: socfpga: agilex: Add 4-bit SPI bus width X-Git-Tag: v6.19-rc1~100^2~19^2~32 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=e928e15a3e97714356d6fcdbe7f7772c1c87d58a;p=thirdparty%2Fkernel%2Flinux.git arm64: dts: socfpga: agilex: Add 4-bit SPI bus width Add spi-tx-bus-width and spi-rx-bus-width properties with value 4 to the agilex device tree. This update configures the SPI controller to use a 4-bit bus width for both transmission and reception, potentially improving SPI throughput and matching the hardware capabilities more closely. Signed-off-by: Fong, Yan Kei Reviewed-by: Khairul Anuar Romli Reviewed-by: Matthew Gerlach Signed-off-by: Dinh Nguyen --- diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts index b31cfa6b802d9..9ee312bae8d27 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts @@ -116,6 +116,8 @@ cdns,tsd2d-ns = <50>; cdns,tchsh-ns = <4>; cdns,tslch-ns = <4>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; partitions { compatible = "fixed-partitions";