From: nobody <> Date: Tue, 1 Nov 2005 22:57:24 +0000 (+0000) Subject: This commit was manufactured by cvs2svn to create branch 'gdb_6_4-branch'. X-Git-Tag: gdb_6_4-2005-11-01-branchpoint X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=e97bf4462428241425b287215aa9fd48478b3c36;p=thirdparty%2Fbinutils-gdb.git This commit was manufactured by cvs2svn to create branch 'gdb_6_4-branch'. Sprout from gdb-csl-arm-20051020-branch 2005-10-20 00:09:02 UTC nobody 'This commit was manufactured by cvs2svn to create branch 'gdb-csl-' Cherrypick from master 2005-11-01 22:57:23 UTC Alan Modra ' PR ld/1775': ChangeLog Makefile.def Makefile.in Makefile.tpl bfd/ChangeLog bfd/Makefile.am bfd/Makefile.in bfd/aoutx.h bfd/archures.c bfd/bfd-in2.h bfd/bfdwin.c bfd/cache.c bfd/coff-rs6000.c bfd/coff-z80.c bfd/coff64-rs6000.c bfd/coffcode.h bfd/config.bfd bfd/configure bfd/configure.in bfd/cpu-ia64-opc.c bfd/cpu-z80.c bfd/dep-in.sed bfd/elf-bfd.h bfd/elf.c bfd/elf32-arm.c bfd/elf32-bfin.c bfd/elf32-cris.c bfd/elf32-hppa.c bfd/elf32-i370.c bfd/elf32-i386.c bfd/elf32-m32r.c bfd/elf32-m68k.c bfd/elf32-ppc.c bfd/elf32-s390.c bfd/elf32-sh.c bfd/elf64-ppc.c bfd/elf64-s390.c bfd/elf64-x86-64.c bfd/elflink.c bfd/elfxx-ia64.c bfd/elfxx-mips.c bfd/elfxx-mips.h bfd/elfxx-sparc.c bfd/elfxx-sparc.h bfd/hppabsd-core.c bfd/hpux-core.c bfd/libbfd-in.h bfd/libbfd.c bfd/libbfd.h bfd/linker.c bfd/osf-core.c bfd/po/SRC-POTFILES.in bfd/po/bfd.pot bfd/reloc.c bfd/rs6000-core.c bfd/sco5-core.c bfd/targets.c bfd/trad-core.c bfd/version.h bfd/xcoff-target.h cpu/ChangeLog cpu/frv.opc cpu/m32c.cpu cpu/m32c.opc cpu/m32r.opc depcomp etc/ChangeLog etc/texi2pod.pl gdb/ChangeLog gdb/Makefile.in gdb/NEWS gdb/config/i386/tm-cygwin.h gdb/config/iq2000/iq2000.mt gdb/config/ms1/ms1.mt gdb/doc/ChangeLog gdb/doc/gdb.texinfo gdb/doublest.c gdb/dwarf2read.c gdb/event-top.c gdb/gdbserver/ChangeLog gdb/gdbserver/linux-ia64-low.c gdb/gdbserver/server.c gdb/hppa-hpux-tdep.c gdb/hppa-tdep.h gdb/inf-ttrace.c gdb/main.c gdb/mi/gdb-mi.el gdb/po/gdbtext gdb/ppc-tdep.h gdb/regformats/reg-ia64.dat gdb/rs6000-tdep.c gdb/testsuite/ChangeLog gdb/testsuite/gdb.ada/array_return/p.adb gdb/testsuite/gdb.ada/array_return/pck.adb gdb/testsuite/gdb.ada/array_return/pck.ads gdb/testsuite/gdb.ada/arrayidx/p.adb gdb/testsuite/gdb.asm/asm-source.exp gdb/testsuite/gdb.base/bfp-test.exp gdb/tui/tui-command.c gdb/tui/tui-data.c gdb/tui/tui-data.h gdb/tui/tui-disasm.c gdb/tui/tui-layout.c gdb/tui/tui-source.c gdb/tui/tui-source.h gdb/tui/tui-stack.c gdb/tui/tui-win.c gdb/tui/tui-winsource.c gdb/tui/tui-winsource.h gdb/vax-tdep.c gdb/version.in gdb/win32-nat.c include/ChangeLog include/coff/ChangeLog include/coff/internal.h include/coff/z80.h include/dis-asm.h include/elf/ChangeLog include/floatformat.h include/opcode/ChangeLog include/opcode/cgen-bitset.h include/opcode/cgen.h include/opcode/ia64.h libiberty/ChangeLog libiberty/floatformat.c opcodes/ChangeLog opcodes/Makefile.am opcodes/Makefile.in opcodes/arm-dis.c opcodes/bfin-dis.c opcodes/cgen-dis.in opcodes/cgen-opc.c opcodes/configure opcodes/configure.in opcodes/dep-in.sed opcodes/disassemble.c opcodes/fr30-desc.c opcodes/fr30-desc.h opcodes/fr30-dis.c opcodes/fr30-opc.c opcodes/frv-desc.c opcodes/frv-desc.h opcodes/frv-dis.c opcodes/frv-opc.c opcodes/frv-opc.h opcodes/ia64-asmtab.c opcodes/ip2k-desc.c opcodes/ip2k-desc.h opcodes/ip2k-dis.c opcodes/ip2k-opc.c opcodes/m32c-asm.c opcodes/m32c-desc.c opcodes/m32c-desc.h opcodes/m32c-dis.c opcodes/m32c-ibld.c opcodes/m32c-opc.c opcodes/m32c-opc.h opcodes/m32r-asm.c opcodes/m32r-desc.c opcodes/m32r-desc.h opcodes/m32r-dis.c opcodes/m32r-opc.c opcodes/ms1-desc.c opcodes/ms1-desc.h opcodes/ms1-dis.c opcodes/openrisc-desc.c opcodes/openrisc-desc.h opcodes/openrisc-dis.c opcodes/openrisc-opc.c opcodes/po/POTFILES.in opcodes/po/opcodes.pot opcodes/xstormy16-desc.c opcodes/xstormy16-desc.h opcodes/xstormy16-dis.c opcodes/xstormy16-opc.c opcodes/z80-dis.c sim/frv/ChangeLog sim/frv/arch.c sim/frv/arch.h sim/frv/cpu.c sim/frv/cpu.h sim/frv/cpuall.h sim/frv/decode.c sim/frv/decode.h sim/frv/frv-sim.h sim/frv/mloop.in sim/frv/model.c sim/frv/pipeline.c sim/frv/sem.c sim/frv/traps.c Delete: intl/ChangeLog intl/Makefile.in intl/acconfig.h intl/aclocal.m4 intl/bindtextdom.c intl/cat-compat.c intl/config.in intl/configure intl/configure.in intl/dcgettext.c intl/dgettext.c intl/explodename.c intl/finddomain.c intl/gettext.c intl/gettext.h intl/gettextP.h intl/hash-string.h intl/intl-compat.c intl/intlh.inst.in intl/l10nflist.c intl/libgettext.h intl/libintl.glibc intl/linux-msg.sed intl/loadinfo.h intl/loadmsgcat.c intl/localealias.c intl/po2tbl.sed.in intl/textdomain.c intl/xopen-msg.sed mmalloc/COPYING.LIB mmalloc/ChangeLog mmalloc/MAINTAINERS mmalloc/Makefile.in mmalloc/TODO mmalloc/acinclude.m4 mmalloc/aclocal.m4 mmalloc/attach.c mmalloc/configure mmalloc/configure.in mmalloc/detach.c mmalloc/keys.c mmalloc/mcalloc.c mmalloc/mfree.c mmalloc/mm.c mmalloc/mmalloc.c mmalloc/mmalloc.h mmalloc/mmalloc.texi mmalloc/mmap-sup.c mmalloc/mmcheck.c mmalloc/mmemalign.c mmalloc/mmprivate.h mmalloc/mmstats.c mmalloc/mmtrace.awk mmalloc/mmtrace.c mmalloc/mrealloc.c mmalloc/mvalloc.c mmalloc/sbrk-sup.c sim/sh64/ChangeLog sim/sh64/Makefile.in sim/sh64/arch.c sim/sh64/arch.h sim/sh64/config.in sim/sh64/configure sim/sh64/configure.ac sim/sh64/cpu.c sim/sh64/cpu.h sim/sh64/cpuall.h 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sim/testsuite/sim/sh64/media/mmacfxwl.cgs sim/testsuite/sim/sh64/media/mmacnfx-wl.cgs sim/testsuite/sim/sh64/media/mmulfxl.cgs sim/testsuite/sim/sh64/media/mmulfxrpw.cgs sim/testsuite/sim/sh64/media/mmulfxw.cgs sim/testsuite/sim/sh64/media/mmulhiwl.cgs sim/testsuite/sim/sh64/media/mmull.cgs sim/testsuite/sim/sh64/media/mmullowl.cgs sim/testsuite/sim/sh64/media/mmulsumwq.cgs sim/testsuite/sim/sh64/media/mmulw.cgs sim/testsuite/sim/sh64/media/movi.cgs sim/testsuite/sim/sh64/media/mpermw.cgs sim/testsuite/sim/sh64/media/msadubq.cgs sim/testsuite/sim/sh64/media/mshaldsl.cgs sim/testsuite/sim/sh64/media/mshaldsw.cgs sim/testsuite/sim/sh64/media/mshardl.cgs sim/testsuite/sim/sh64/media/mshardsq.cgs sim/testsuite/sim/sh64/media/mshardw.cgs sim/testsuite/sim/sh64/media/mshfhib.cgs sim/testsuite/sim/sh64/media/mshfhil.cgs sim/testsuite/sim/sh64/media/mshfhiw.cgs sim/testsuite/sim/sh64/media/mshflob.cgs sim/testsuite/sim/sh64/media/mshflol.cgs sim/testsuite/sim/sh64/media/mshflow.cgs sim/testsuite/sim/sh64/media/mshlldl.cgs sim/testsuite/sim/sh64/media/mshlldw.cgs sim/testsuite/sim/sh64/media/mshlrdl.cgs sim/testsuite/sim/sh64/media/mshlrdw.cgs sim/testsuite/sim/sh64/media/msubl.cgs sim/testsuite/sim/sh64/media/msubsl.cgs sim/testsuite/sim/sh64/media/msubsub.cgs sim/testsuite/sim/sh64/media/msubsw.cgs sim/testsuite/sim/sh64/media/msubw.cgs sim/testsuite/sim/sh64/media/mulsl.cgs sim/testsuite/sim/sh64/media/mulul.cgs sim/testsuite/sim/sh64/media/nop.cgs sim/testsuite/sim/sh64/media/nsb.cgs sim/testsuite/sim/sh64/media/ocbi.cgs sim/testsuite/sim/sh64/media/ocbp.cgs sim/testsuite/sim/sh64/media/ocbwb.cgs sim/testsuite/sim/sh64/media/or.cgs sim/testsuite/sim/sh64/media/ori.cgs sim/testsuite/sim/sh64/media/prefi.cgs sim/testsuite/sim/sh64/media/pta.cgs sim/testsuite/sim/sh64/media/ptabs.cgs sim/testsuite/sim/sh64/media/ptb.cgs sim/testsuite/sim/sh64/media/ptrel.cgs sim/testsuite/sim/sh64/media/putcfg.cgs sim/testsuite/sim/sh64/media/putcon.cgs sim/testsuite/sim/sh64/media/rte.cgs sim/testsuite/sim/sh64/media/shard.cgs sim/testsuite/sim/sh64/media/shardl.cgs sim/testsuite/sim/sh64/media/shari.cgs sim/testsuite/sim/sh64/media/sharil.cgs sim/testsuite/sim/sh64/media/shlld.cgs sim/testsuite/sim/sh64/media/shlldl.cgs sim/testsuite/sim/sh64/media/shlli.cgs sim/testsuite/sim/sh64/media/shllil.cgs sim/testsuite/sim/sh64/media/shlrd.cgs sim/testsuite/sim/sh64/media/shlrdl.cgs sim/testsuite/sim/sh64/media/shlri.cgs sim/testsuite/sim/sh64/media/shlril.cgs sim/testsuite/sim/sh64/media/shori.cgs sim/testsuite/sim/sh64/media/sleep.cgs sim/testsuite/sim/sh64/media/stb.cgs sim/testsuite/sim/sh64/media/sthil.cgs sim/testsuite/sim/sh64/media/sthiq.cgs sim/testsuite/sim/sh64/media/stl.cgs sim/testsuite/sim/sh64/media/stlol.cgs sim/testsuite/sim/sh64/media/stloq.cgs sim/testsuite/sim/sh64/media/stq.cgs sim/testsuite/sim/sh64/media/stw.cgs sim/testsuite/sim/sh64/media/stxb.cgs sim/testsuite/sim/sh64/media/stxl.cgs sim/testsuite/sim/sh64/media/stxq.cgs sim/testsuite/sim/sh64/media/stxw.cgs sim/testsuite/sim/sh64/media/sub.cgs sim/testsuite/sim/sh64/media/subl.cgs sim/testsuite/sim/sh64/media/swapq.cgs sim/testsuite/sim/sh64/media/synci.cgs sim/testsuite/sim/sh64/media/synco.cgs sim/testsuite/sim/sh64/media/testutils.inc sim/testsuite/sim/sh64/media/trapa.cgs sim/testsuite/sim/sh64/media/xor.cgs sim/testsuite/sim/sh64/media/xori.cgs sim/testsuite/sim/sh64/misc/fr-dr.s --- diff --git a/ChangeLog b/ChangeLog index b7019094567..5f555453bd4 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,17 @@ +2005-10-22 Paolo Bonzini + + PR bootstrap/24297 + * Makefile.tpl (do-[+make-target+], do-check, install, + stage[+id+]-bubble, [+compare-target+]): Ensure $$r and $$s + are set before recursing. + * Makefile.in: Regenerate. + +2005-10-20 Eric Botcazou + + PR bootstrap/18939 + * Makefile.def (gcc) : Fix thinko. + * Makefile.in: Regenerate. + 2005-10-17 Bernd Schmidt * configure.in (bfin-*-*): Use test, not brackets, in if statement. diff --git a/Makefile.def b/Makefile.def index 9731bd66f57..035def58c52 100644 --- a/Makefile.def +++ b/Makefile.def @@ -60,7 +60,7 @@ host_modules= { module= fixincludes; host_modules= { module= flex; no_check_cross= true; }; host_modules= { module= gas; bootstrap=true; }; host_modules= { module= gcc; bootstrap=true; - target="`if [ -f gcc/stage_last ]; then echo quickstrap ; else echo all; fi`"; + target="`if [ -f stage_last ]; then echo quickstrap ; else echo all; fi`"; extra_make_flags="$(EXTRA_GCC_FLAGS)"; }; host_modules= { module= gawk; }; host_modules= { module= gettext; }; diff --git a/Makefile.in b/Makefile.in index 0de1a3c7a23..0344ad3ae70 100644 --- a/Makefile.in +++ b/Makefile.in @@ -1001,7 +1001,9 @@ all-target: \ .PHONY: do-info do-info: @$(unstage) - @$(MAKE) $(RECURSE_FLAGS_TO_PASS) info-host \ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(MAKE) $(RECURSE_FLAGS_TO_PASS) info-host \ info-target @$(stage) @@ -1101,7 +1103,9 @@ info-target: \ .PHONY: do-dvi do-dvi: @$(unstage) - @$(MAKE) $(RECURSE_FLAGS_TO_PASS) dvi-host \ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(MAKE) $(RECURSE_FLAGS_TO_PASS) dvi-host \ dvi-target @$(stage) @@ -1201,7 +1205,9 @@ dvi-target: \ .PHONY: do-html do-html: @$(unstage) - @$(MAKE) $(RECURSE_FLAGS_TO_PASS) html-host \ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(MAKE) $(RECURSE_FLAGS_TO_PASS) html-host \ html-target @$(stage) @@ -1301,7 +1307,9 @@ html-target: \ .PHONY: do-TAGS do-TAGS: @$(unstage) - @$(MAKE) $(RECURSE_FLAGS_TO_PASS) TAGS-host \ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(MAKE) $(RECURSE_FLAGS_TO_PASS) TAGS-host \ TAGS-target @$(stage) @@ -1401,7 +1409,9 @@ TAGS-target: \ .PHONY: do-install-info do-install-info: @$(unstage) - @$(MAKE) $(RECURSE_FLAGS_TO_PASS) install-info-host \ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(MAKE) $(RECURSE_FLAGS_TO_PASS) install-info-host \ install-info-target @$(stage) @@ -1501,7 +1511,9 @@ install-info-target: \ .PHONY: do-installcheck do-installcheck: @$(unstage) - @$(MAKE) $(RECURSE_FLAGS_TO_PASS) installcheck-host \ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(MAKE) $(RECURSE_FLAGS_TO_PASS) installcheck-host \ installcheck-target @$(stage) @@ -1601,7 +1613,9 @@ installcheck-target: \ .PHONY: do-mostlyclean do-mostlyclean: @$(unstage) - @$(MAKE) $(RECURSE_FLAGS_TO_PASS) mostlyclean-host \ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(MAKE) $(RECURSE_FLAGS_TO_PASS) mostlyclean-host \ mostlyclean-target @$(stage) @@ -1701,7 +1715,9 @@ mostlyclean-target: \ .PHONY: do-clean do-clean: @$(unstage) - @$(MAKE) $(RECURSE_FLAGS_TO_PASS) clean-host \ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(MAKE) $(RECURSE_FLAGS_TO_PASS) clean-host \ clean-target @$(stage) @@ -1801,7 +1817,9 @@ clean-target: \ .PHONY: do-distclean do-distclean: @$(unstage) - @$(MAKE) $(RECURSE_FLAGS_TO_PASS) distclean-host \ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(MAKE) $(RECURSE_FLAGS_TO_PASS) distclean-host \ distclean-target @$(stage) @@ -1901,7 +1919,9 @@ distclean-target: \ .PHONY: do-maintainer-clean do-maintainer-clean: @$(unstage) - @$(MAKE) $(RECURSE_FLAGS_TO_PASS) maintainer-clean-host \ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(MAKE) $(RECURSE_FLAGS_TO_PASS) maintainer-clean-host \ maintainer-clean-target @$(stage) @@ -2158,7 +2178,9 @@ check-target: \ do-check: @$(unstage) - @$(MAKE) $(RECURSE_FLAGS_TO_PASS) check-host check-target + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(MAKE) $(RECURSE_FLAGS_TO_PASS) check-host check-target @$(stage) # Automated reporting of test results. @@ -2187,7 +2209,9 @@ mail-report-with-warnings.log: warning.log .PHONY: install uninstall install: @$(unstage) - @$(MAKE) $(RECURSE_FLAGS_TO_PASS) installdirs install-host install-target + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(MAKE) $(RECURSE_FLAGS_TO_PASS) installdirs install-host install-target @$(stage) .PHONY: install-host-nogcc @@ -11248,7 +11272,7 @@ configure-stagefeedback-gcc: .PHONY: all-gcc maybe-all-gcc maybe-all-gcc: @if gcc -TARGET-gcc=`if [ -f gcc/stage_last ]; then echo quickstrap ; else echo all; fi` +TARGET-gcc=`if [ -f stage_last ]; then echo quickstrap ; else echo all; fi` maybe-all-gcc: all-gcc all-gcc: configure-gcc @test -f stage_last && exit 0; \ @@ -35259,7 +35283,9 @@ stage1-end:: # be reconfigured as well. .PHONY: stage1-bubble stage1-bubble:: - @if test -f stage1-lean ; then \ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + if test -f stage1-lean ; then \ echo Skipping rebuild of stage1 ; \ else \ $(MAKE) stage1-start; \ @@ -35443,7 +35469,9 @@ stage2-end:: # be reconfigured as well. .PHONY: stage2-bubble stage2-bubble:: stage1-bubble - @if test -f stage2-lean || test -f stage1-lean ; then \ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + if test -f stage2-lean || test -f stage1-lean ; then \ echo Skipping rebuild of stage2 ; \ else \ $(MAKE) stage2-start; \ @@ -35632,7 +35660,9 @@ stage3-end:: .PHONY: stage3-bubble stage3-bubble:: stage2-bubble @bootstrap_lean@-rm -rf stage1-* ; $(STAMP) stage1-lean - @if test -f stage3-lean || test -f stage2-lean ; then \ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + if test -f stage3-lean || test -f stage2-lean ; then \ echo Skipping rebuild of stage3 ; \ else \ $(MAKE) stage3-start; \ @@ -35647,13 +35677,13 @@ do-clean: clean-stage3 @if gcc-bootstrap compare: - @if test -f stage2-lean; then \ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + if test -f stage2-lean; then \ echo Cannot compare object files as stage 2 was deleted. ; \ exit 0 ; \ fi; \ [ -f stage_current ] && $(MAKE) `cat stage_current`-end || : ; \ - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ rm -f .bad_compare ; \ cd stage3-gcc; \ files=`find . -name "*$(objext)" -print` ; \ @@ -35859,7 +35889,9 @@ stage4-end:: .PHONY: stage4-bubble stage4-bubble:: stage3-bubble @bootstrap_lean@-rm -rf stage2-* ; $(STAMP) stage2-lean - @if test -f stage4-lean || test -f stage3-lean ; then \ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + if test -f stage4-lean || test -f stage3-lean ; then \ echo Skipping rebuild of stage4 ; \ else \ $(MAKE) stage4-start; \ @@ -35874,13 +35906,13 @@ do-clean: clean-stage4 @if gcc-bootstrap compare3: - @if test -f stage3-lean; then \ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + if test -f stage3-lean; then \ echo Cannot compare object files as stage 3 was deleted. ; \ exit 0 ; \ fi; \ [ -f stage_current ] && $(MAKE) `cat stage_current`-end || : ; \ - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ rm -f .bad_compare ; \ cd stage4-gcc; \ files=`find . -name "*$(objext)" -print` ; \ @@ -36082,7 +36114,9 @@ stageprofile-end:: # be reconfigured as well. .PHONY: stageprofile-bubble stageprofile-bubble:: stage1-bubble - @if test -f stageprofile-lean || test -f stage1-lean ; then \ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + if test -f stageprofile-lean || test -f stage1-lean ; then \ echo Skipping rebuild of stageprofile ; \ else \ $(MAKE) stageprofile-start; \ @@ -36266,7 +36300,9 @@ stagefeedback-end:: # be reconfigured as well. .PHONY: stagefeedback-bubble stagefeedback-bubble:: stageprofile-bubble - @if test -f stagefeedback-lean || test -f stageprofile-lean ; then \ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + if test -f stagefeedback-lean || test -f stageprofile-lean ; then \ echo Skipping rebuild of stagefeedback ; \ else \ $(MAKE) stagefeedback-start; \ diff --git a/Makefile.tpl b/Makefile.tpl index 47fa0c809ce..0c3d75ed233 100644 --- a/Makefile.tpl +++ b/Makefile.tpl @@ -769,7 +769,9 @@ all-target: [+ .PHONY: do-[+make_target+] do-[+make_target+]: @$(unstage) - @$(MAKE) $(RECURSE_FLAGS_TO_PASS) [+make_target+]-host \ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(MAKE) $(RECURSE_FLAGS_TO_PASS) [+make_target+]-host \ [+make_target+]-target @$(stage) @@ -866,7 +868,9 @@ check-target: [+ do-check: @$(unstage) - @$(MAKE) $(RECURSE_FLAGS_TO_PASS) check-host check-target + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(MAKE) $(RECURSE_FLAGS_TO_PASS) check-host check-target @$(stage) # Automated reporting of test results. @@ -895,7 +899,9 @@ mail-report-with-warnings.log: warning.log .PHONY: install uninstall install: @$(unstage) - @$(MAKE) $(RECURSE_FLAGS_TO_PASS) installdirs install-host install-target + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(MAKE) $(RECURSE_FLAGS_TO_PASS) installdirs install-host install-target @$(stage) .PHONY: install-host-nogcc @@ -1534,7 +1540,9 @@ stage[+id+]-end:: .PHONY: stage[+id+]-bubble stage[+id+]-bubble:: [+ IF prev +]stage[+prev+]-bubble[+ ENDIF +][+IF lean +] @bootstrap_lean@-rm -rf stage[+lean+]-* ; $(STAMP) stage[+lean+]-lean[+ ENDIF lean +] - @if test -f stage[+id+]-lean [+ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + if test -f stage[+id+]-lean [+ IF prev +]|| test -f stage[+prev+]-lean [+ ENDIF prev +] ; then \ echo Skipping rebuild of stage[+id+] ; \ else \ @@ -1550,13 +1558,13 @@ do-clean: clean-stage[+id+] @if gcc-bootstrap [+ IF compare-target +] [+compare-target+]: - @if test -f stage[+prev+]-lean; then \ + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + if test -f stage[+prev+]-lean; then \ echo Cannot compare object files as stage [+prev+] was deleted. ; \ exit 0 ; \ fi; \ [ -f stage_current ] && $(MAKE) `cat stage_current`-end || : ; \ - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ rm -f .bad_compare ; \ cd stage[+id+]-gcc; \ files=`find . -name "*$(objext)" -print` ; \ diff --git a/bfd/ChangeLog b/bfd/ChangeLog index ef6222d28f9..f4549c30455 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,240 @@ +2005-11-02 Alan Modra + + PR ld/1775 + * elf32-m68k.c (elf_m68k_finish_dynamic_symbol): Add required + parentheses. + +2005-10-29 H.J. Lu + + * Makefile.am: Run "make dep-am". + * Makefile.in: Regenerated. + + * dep-in.sed: Replace " ./" with " ". + +2005-10-29 H.J. Lu + + * hpux-core.c: Include only if HPUX_CORE is + define. + * osf-core.c: Include only if OSF_CORE is defined. + * sco5-core.c: Include and only + if SCO5_CORE is defined. + +2005-10-29 Mark Kettenis + + * Makefile.am: Run "make dep-am". + * Makefile.in: Regenerate. + +2005-10-28 Joel Brobecker + + From Eric Botcazou + * coffcode.h (coff_compute_section_file_positions): Fix small + error in preprocessor directives. + +2005-10-28 Joel Brobecker + + Mostly from Eric Botcazou + * rs6000-core.c: ANSIfy all function definitions. + Add missing function prototypes. + (ptr_to_uint): New type. + (rs6000coff_core_p): Use it as intermediate step in casts. + (rs6000coff_core_file_matches_executable_p): Likewise. + * xcoff-target.h (rs6000coff_core_p): Fix prototype. + (rs6000coff_core_file_matches_executable_p): Likewise. + +2005-10-28 H.J. Lu + + PR binutils/1472 + * aoutx.h (NAME (aout, machine_type)): Handle + bfd_mach_sparc_v8plus, bfd_mach_sparc_v8plusa, + bfd_mach_sparc_v8plusb, bfd_mach_sparc_v9, bfd_mach_sparc_v9a + and bfd_mach_sparc_v9b. + +2005-10-28 Hans-Peter Nilsson + + PR ld/1567 + * elf32-cris.c (cris_elf_howto_table) : Set + complain_on_overflow field to complain_overflow_dont. + +2005-10-27 Alan Modra + + PR 973 + * cache.c (enum cache_flag): New. + (close_one): Save file mtime. + (bfd_cache_lookup): Add flag arg, adjust all users. + (bfd_cache_lookup_worker): Likewise. + (cache_btell): Use CACHE_NO_OPEN and return abfd->where if file + not open. + (cache_bflush): Similarly, and return success of file not open. + (cache_bseek): Use CACHE_NO_SEEK if SEEK_SET or SEEK_END. + (cache_bstat): Use CACHE_NO_SEEK_ERROR. + + * bfdwin.c (bfd_get_file_window): Seek into file in place of + using bfd_cache_lookup. + + * cache.c (BFD_CACHE_MAX_OPEN): Make private to this file. + (bfd_last_cache, bfd_cache_lookup, bfd_cache_lookup_worker): Likewise. + * libbfd-in.h (bfd_cache_lookup_worker, bfd_last_cache): Delete. + * libbfd.h: Regenerate. + + * hppabsd-core.c (hppabsd_core_core_file_p): Use bfd_stat, not fstat. + * sco5-core.c (sco5_core_file_p): Likewise. + * trad-core.c (trad_unix_core_file_p): Likewise. + + * cache.c: Reorganize file to avoid forward reference. + +2005-10-26 Alan Modra + + * cache.c (bfd_cache_lookup_worker): Don't abort on failing to + reopen file. + (cache_btell, cache_bseek, cache_bflush, cache_bstat): Return -1 on + bfd_cache_lookup failure. + (cache_bread, cache_bwrite): Return 0 on the same. + * bfdwin.c (bfd_get_file_window): Likewise. + * hppabsd-core.c (hppabsd_core_core_file_p): Likewise. + * sco5-core.c (sco5_core_file_p): Likewise. + * trad-core.c (trad_unix_core_file_p): Likewise. + +2005-10-26 Alan Modra + + * cache.c (bfd_cache_lookup_worker): Use bfd_error_handler + rather than bfd_perror. Print file name. Internationalise. + +2005-10-26 Alan Modra + + * cache.c (bfd_open_file): Set bfd_error_system_call on failure + to open file. + (bfd_cache_lookup_worker): Remove check that file pos is in + unsigned long range. Print system error before aborting. + +2005-10-25 Arnold Metselaar + + * Makefile.am: Add rules for coff-z80 and cpu-z80. + * Makefile.in: Regenerated. + * archures.c: Add bfd_arch_z80 and support for it. + * coffcode.h(coff_set_arch_mach_hook): Add case Z80MAGIC. + (coff_set_flags): Add case bfd_arch_z80. + * config.bfd: Add z80coff_vec. + * configure.in: Add z80coff_vec. + * reloc.c: Add BFD_RELOC_Z80_DISP8 + * targets.c: Add z80coff_vec. + * coff-z80.c: New file + * cpu-z80.c: New file + * configure: Regenerated. + * libbfd.h: Regenerated. + * bfd-in2.h: Regenerated. + +2005-10-26 Alan Modra + + PR ld/1540 + * elf-bfd.h (elf_backend_copy_indirect_symbol): Replace pointer to + elf_backend_data with pointer to bfd_link_info. + (_bfd_elf_link_hash_copy_indirect): Likewise. + * elf.c (_bfd_elf_link_hash_copy_indirect): Likewise. Handle + direct and indirect symbols both having dynamic link info. + * elf32-arm.c (elf32_arm_copy_indirect_symbol): Likewise. + * elf32-hppa.c (elf32_hppa_copy_indirect_symbol): Likewise. + * elf32-i386.c (elf_i386_copy_indirect_symbol): Likewise. + * elf32-m32r.c (m32r_elf_copy_indirect_symbol): Likewise. + * elf32-ppc.c (ppc_elf_copy_indirect_symbol): Likewise. + * elf32-s390.c (elf_s390_copy_indirect_symbol): Likewise. + * elf32-sh.c (sh_elf_copy_indirect_symbol): Likewise. + * elf64-ppc.c (ppc64_elf_copy_indirect_symbol): Likewise. + * elf64-s390.c (elf_s390_copy_indirect_symbol): Likewise. + * elf64-x86-64.c (elf64_x86_64_copy_indirect_symbol): Likewise. + * elfxx-ia64.c (elfNN_ia64_hash_copy_indirect): Likewise. + * elfxx-mips.c (_bfd_mips_elf_copy_indirect_symbol): Likewise. + * elfxx-sparc.c (_bfd_sparc_elf_copy_indirect_symbol): Likewise. + * elflink.c: Adjust all calls to bed->elf_backend_copy_indirect_symbol. + * elfxx-mips.h (_bfd_mips_elf_copy_indirect_symbol): Update prototype. + * elfxx-sparc.h (_bfd_sparc_elf_copy_indirect_symbol): Likewise. + +2005-10-25 Alan Modra + + * po/SRC-POTFILES.in: Regenerate. + * po/bfd.pot: Regenerate. + +2005-10-24 Jie Zhang + + * elf32-bfin.c (bfd_bfin_elf32_create_embedded_relocs): Fix signedness + warning. + +2005-10-24 Bernd Schmidt + + * elf32-bfin.c (bfin_howto_table): Set src_mask to 0 for all relocs. + (bfin_imm16_reloc): Always add in the addend. Don't fetch existing + contents from section. + (bfin_relocate_section): Rework so as to not call special_functions. + Handle the relocation stack here. Treat pcrel24 relocs specially. + +2005-10-24 Alan Modra + + * elflink.c (elf_link_input_bfd): Don't use linker_mark and + SEC_EXCLUDE to test for sections dropped from output. Instead, + use bfd_section_removed_from_list on normal sections. Don't + attempt to handle symbols with unknown reserved section indices. + * linker.c (_bfd_generic_link_output_symbols): Don't use + linker_mark to test for symbols belonging to dropped sections. + Do allow absolute symbols. + +2005-10-24 Alan Modra + + * elf32-i370.c (i370_elf_fake_sections): Don't set SHF_EXCLUDE on + group sections. + +2005-10-24 Jan Beulich + + * cpu-ia64-opc.c (elf64_ia64_operands): Move memory operand out of + set of indirect operands. + +2005-10-24 Alan Modra + + * elf32-ppc.c (ppc_elf_fake_sections): Don't set SHF_EXCLUDE on + group sections. + +2005-10-23 H.J. Lu + + * coff-rs6000.c (rs6000coff_vec): Initialize + _bfd_init_private_section_data with + _bfd_generic_init_private_section_data. + (pmac_xcoff_vec): Likewise. + * coff64-rs6000.c (rs6000coff64_vec): Likewise. + (aix5coff64_vec): Likewise. + +2005-10-23 H.J. Lu + + PR ld/1487 + * elf-bfd.h (_bfd_generic_init_private_section_data): New. + (_bfd_elf_init_private_section_data): New. + + * elf.c (elf_fake_sections): Don't set SHF_GROUP for + relocatable link. + (bfd_elf_set_group_contents): Don't handle relocatable link + specially. + (assign_section_numbers): If it isn't called by assembler, + use the output section of elf_linked_to_section for + SHF_LINK_ORDER. + (_bfd_elf_init_private_section_data): New. + (_bfd_elf_copy_private_section_data): Call it. + + * libbfd-in.h (_bfd_generic_init_private_section_data): New. + + * libbfd.c (_bfd_generic_init_private_section_data): New. + + * targets.c (BFD_JUMP_TABLE_COPY): Add + _bfd_generic_init_private_section_data. + (bfd_init_private_section_data): Likewise. + + * bfd-in2.h: Regenerated. + * libbfd.h: Likewise. + +2005-10-23 Alan Modra + + * elf64-ppc.c (dec_dynrel_count): Don't report errors for local + syms in gc'd sections. + (ppc64_elf_edit_opd): Don't adjust reloc counts when NO_OPD_RELOCS. + (elf_backend_action_discarded): Define. + (ppc64_elf_action_discarded): New function. + 2005-10-19 Paul Brook * elf32-arm.c (find_arm_elf_section_entry): New function. diff --git a/bfd/Makefile.am b/bfd/Makefile.am index d090ad3a039..aa40aa39a16 100644 --- a/bfd/Makefile.am +++ b/bfd/Makefile.am @@ -111,6 +111,7 @@ ALL_MACHINES = \ cpu-w65.lo \ cpu-xstormy16.lo \ cpu-xtensa.lo \ + cpu-z80.lo \ cpu-z8k.lo ALL_MACHINES_CFILES = \ @@ -171,6 +172,7 @@ ALL_MACHINES_CFILES = \ cpu-w65.c \ cpu-xstormy16.c \ cpu-xtensa.c \ + cpu-z80.c \ cpu-z8k.c # The .o files needed by all of the 32 bit vectors that are configured into @@ -214,6 +216,7 @@ BFD32_BACKENDS = \ coff-u68k.lo \ coff-we32k.lo \ coff-w65.lo \ + coff-z80.lo \ coff-z8k.lo \ cofflink.lo \ dwarf1.lo \ @@ -384,6 +387,7 @@ BFD32_BACKENDS_CFILES = \ coff-u68k.c \ coff-we32k.c \ coff-w65.c \ + coff-z80.c \ coff-z8k.c \ cofflink.c \ dwarf1.c \ @@ -904,1003 +908,887 @@ bfdver.h: $(srcdir)/version.h $(srcdir)/Makefile.in # DO NOT DELETE THIS LINE -- mkdep uses it. # DO NOT PUT ANYTHING AFTER THIS LINE, IT WILL GO AWAY. -archive.lo: archive.c ./bfd.h ./config.h $(INCDIR)/filenames.h \ - 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$(INCDIR)/bfdlink.h libpei.h -pepigen.lo: pepigen.c ./config.h $(INCDIR)/filenames.h \ - $(INCDIR)/hashtab.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/ia64.h \ - $(INCDIR)/coff/external.h $(INCDIR)/coff/pe.h libcoff.h \ - $(INCDIR)/bfdlink.h libpei.h +hpux-core.lo: hpux-core.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h +irix-core.lo: irix-core.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h +lynx-core.lo: lynx-core.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h +osf-core.lo: osf-core.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h +sco5-core.lo: sco5-core.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \ + libaout.h $(INCDIR)/bfdlink.h +trad-core.lo: trad-core.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \ + libaout.h $(INCDIR)/bfdlink.h +cisco-core.lo: cisco-core.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h +elf32-ia64.lo: elf32-ia64.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \ + elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \ + $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/opcode/ia64.h \ + $(INCDIR)/elf/ia64.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/objalloc.h \ + $(INCDIR)/hashtab.h elf32-target.h +elf64-ia64.lo: elf64-ia64.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \ + elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \ + $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/opcode/ia64.h \ + $(INCDIR)/elf/ia64.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/objalloc.h \ + $(INCDIR)/hashtab.h elf64-target.h +peigen.lo: peigen.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \ + $(INCDIR)/coff/internal.h $(INCDIR)/coff/i386.h $(INCDIR)/coff/external.h \ + $(INCDIR)/coff/pe.h libcoff.h $(INCDIR)/bfdlink.h libpei.h +pepigen.lo: pepigen.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \ + $(INCDIR)/coff/internal.h $(INCDIR)/coff/ia64.h $(INCDIR)/coff/external.h \ + $(INCDIR)/coff/pe.h libcoff.h $(INCDIR)/bfdlink.h libpei.h # IF YOU PUT ANYTHING HERE IT WILL GO AWAY # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. diff --git a/bfd/aoutx.h b/bfd/aoutx.h index 4079147d30e..9c446056218 100644 --- a/bfd/aoutx.h +++ b/bfd/aoutx.h @@ -706,7 +706,12 @@ NAME (aout, machine_type) (enum bfd_architecture arch, || machine == bfd_mach_sparc || machine == bfd_mach_sparc_sparclite || machine == bfd_mach_sparc_sparclite_le - || machine == bfd_mach_sparc_v9) + || machine == bfd_mach_sparc_v8plus + || machine == bfd_mach_sparc_v8plusa + || machine == bfd_mach_sparc_v8plusb + || machine == bfd_mach_sparc_v9 + || machine == bfd_mach_sparc_v9a + || machine == bfd_mach_sparc_v9b) arch_flags = M_SPARC; else if (machine == bfd_mach_sparc_sparclet) arch_flags = M_SPARCLET; diff --git a/bfd/archures.c b/bfd/archures.c index 74d2b712ed5..a96771cf8da 100644 --- a/bfd/archures.c +++ b/bfd/archures.c @@ -365,6 +365,11 @@ DESCRIPTION . bfd_arch_maxq, {* Dallas MAXQ 10/20 *} .#define bfd_mach_maxq10 10 .#define bfd_mach_maxq20 20 +. bfd_arch_z80, +.#define bfd_mach_z80strict 1 {* No undocumented opcodes. *} +.#define bfd_mach_z80 3 {* With ixl, ixh, iyl, and iyh. *} +.#define bfd_mach_z80full 7 {* All undocumented instructions. *} +.#define bfd_mach_r800 11 {* R800: successor with multiplication. *} . bfd_arch_last . }; */ @@ -461,6 +466,7 @@ extern const bfd_arch_info_type bfd_we32k_arch; extern const bfd_arch_info_type bfd_w65_arch; extern const bfd_arch_info_type bfd_xstormy16_arch; extern const bfd_arch_info_type bfd_xtensa_arch; +extern const bfd_arch_info_type bfd_z80_arch; extern const bfd_arch_info_type bfd_z8k_arch; static const bfd_arch_info_type * const bfd_archures_list[] = @@ -524,6 +530,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] = &bfd_we32k_arch, &bfd_xstormy16_arch, &bfd_xtensa_arch, + &bfd_z80_arch, &bfd_z8k_arch, #endif 0 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 1d93b0f3050..7afe43725a7 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -1953,6 +1953,11 @@ enum bfd_architecture bfd_arch_maxq, /* Dallas MAXQ 10/20 */ #define bfd_mach_maxq10 10 #define bfd_mach_maxq20 20 + bfd_arch_z80, +#define bfd_mach_z80strict 1 /* No undocumented opcodes. */ +#define bfd_mach_z80 3 /* With ixl, ixh, iyl, and iyh. */ +#define bfd_mach_z80full 7 /* All undocumented instructions. */ +#define bfd_mach_r800 11 /* R800: successor with multiplication. */ bfd_arch_last }; @@ -4058,6 +4063,9 @@ internally by the linker after analysis of a BFD_RELOC_XTENSA_ASM_EXPAND. */ BFD_RELOC_XTENSA_ASM_SIMPLIFY, +/* 8 bit signed offset in (ix+d) or (iy+d). */ + BFD_RELOC_Z80_DISP8, + /* DJNZ offset. */ BFD_RELOC_Z8K_DISP7, @@ -4770,6 +4778,7 @@ typedef struct bfd_target #define BFD_JUMP_TABLE_COPY(NAME) \ NAME##_bfd_copy_private_bfd_data, \ NAME##_bfd_merge_private_bfd_data, \ + _bfd_generic_init_private_section_data, \ NAME##_bfd_copy_private_section_data, \ NAME##_bfd_copy_private_symbol_data, \ NAME##_bfd_copy_private_header_data, \ @@ -4782,6 +4791,12 @@ typedef struct bfd_target /* Called to merge BFD general private data from one object file to a common output file when linking. */ bfd_boolean (*_bfd_merge_private_bfd_data) (bfd *, bfd *); + /* Called to initialize BFD private section data from one object file + to another. */ +#define bfd_init_private_section_data(ibfd, isec, obfd, osec, link_info) \ + BFD_SEND (obfd, _bfd_init_private_section_data, (ibfd, isec, obfd, osec, link_info)) + bfd_boolean (*_bfd_init_private_section_data) + (bfd *, sec_ptr, bfd *, sec_ptr, struct bfd_link_info *); /* Called to copy BFD private section data from one object file to another. */ bfd_boolean (*_bfd_copy_private_section_data) diff --git a/bfd/bfdwin.c b/bfd/bfdwin.c index d3e4ba83d1e..7236906e28b 100644 --- a/bfd/bfdwin.c +++ b/bfd/bfdwin.c @@ -1,5 +1,6 @@ /* Support for memory-mapped windows into a BFD. - Copyright 1995, 1996, 2001, 2002, 2003 Free Software Foundation, Inc. + Copyright 1995, 1996, 2001, 2002, 2003, 2005 + Free Software Foundation, Inc. Written by Cygnus Support. This file is part of BFD, the Binary File Descriptor library. @@ -144,7 +145,6 @@ bfd_get_file_window (bfd *abfd, file_ptr file_offset, offset2; size_t real_size; int fd; - FILE *f; /* Find the real file and the real offset into it. */ while (abfd->my_archive != NULL) @@ -152,8 +152,13 @@ bfd_get_file_window (bfd *abfd, offset += abfd->origin; abfd = abfd->my_archive; } - f = bfd_cache_lookup (abfd); - fd = fileno (f); + + /* Seek into the file, to ensure it is open if cacheable. */ + if (abfd->iostream == NULL + && (abfd->iovec == NULL + || abfd->iovec->bseek (abfd, offset, SEEK_SET) != 0)) + return FALSE; + fd = fileno ((FILE *) abfd->iostream); /* Compute offsets and size for mmap and for the user's data. */ offset2 = offset % pagesize; diff --git a/bfd/cache.c b/bfd/cache.c index e2524fbf15f..ef4a006b40e 100644 --- a/bfd/cache.c +++ b/bfd/cache.c @@ -1,7 +1,7 @@ /* BFD library -- caching of file descriptors. Copyright 1990, 1991, 1992, 1993, 1994, 1996, 2000, 2001, 2002, - 2003, 2004 Free Software Foundation, Inc. + 2003, 2004, 2005 Free Software Foundation, Inc. Hacked by Steve Chamberlain of Cygnus Support (steve@cygnus.com). @@ -45,19 +45,216 @@ SUBSECTION #include "libbfd.h" #include "libiberty.h" -static bfd_boolean bfd_cache_delete (bfd *); +/* In some cases we can optimize cache operation when reopening files. + For instance, a flush is entirely unnecessary if the file is already + closed, so a flush would use CACHE_NO_OPEN. Similarly, a seek using + SEEK_SET or SEEK_END need not first seek to the current position. + For stat we ignore seek errors, just in case the file has changed + while we weren't looking. If it has, then it's possible that the + file is shorter and we don't want a seek error to prevent us doing + the stat. */ +enum cache_flag { + CACHE_NORMAL = 0, + CACHE_NO_OPEN = 1, + CACHE_NO_SEEK = 2, + CACHE_NO_SEEK_ERROR = 4 +}; + +/* The maximum number of files which the cache will keep open at + one time. */ + +#define BFD_CACHE_MAX_OPEN 10 + +/* The number of BFD files we have open. */ + +static int open_files; + +/* Zero, or a pointer to the topmost BFD on the chain. This is + used by the <> macro in @file{libbfd.h} to + determine when it can avoid a function call. */ + +static bfd *bfd_last_cache = NULL; + +/* Insert a BFD into the cache. */ + +static void +insert (bfd *abfd) +{ + if (bfd_last_cache == NULL) + { + abfd->lru_next = abfd; + abfd->lru_prev = abfd; + } + else + { + abfd->lru_next = bfd_last_cache; + abfd->lru_prev = bfd_last_cache->lru_prev; + abfd->lru_prev->lru_next = abfd; + abfd->lru_next->lru_prev = abfd; + } + bfd_last_cache = abfd; +} + +/* Remove a BFD from the cache. */ + +static void +snip (bfd *abfd) +{ + abfd->lru_prev->lru_next = abfd->lru_next; + abfd->lru_next->lru_prev = abfd->lru_prev; + if (abfd == bfd_last_cache) + { + bfd_last_cache = abfd->lru_next; + if (abfd == bfd_last_cache) + bfd_last_cache = NULL; + } +} + +/* Close a BFD and remove it from the cache. */ + +static bfd_boolean +bfd_cache_delete (bfd *abfd) +{ + bfd_boolean ret; + + if (fclose ((FILE *) abfd->iostream) == 0) + ret = TRUE; + else + { + ret = FALSE; + bfd_set_error (bfd_error_system_call); + } + + snip (abfd); + + abfd->iostream = NULL; + --open_files; + return ret; +} + +/* We need to open a new file, and the cache is full. Find the least + recently used cacheable BFD and close it. */ + +static bfd_boolean +close_one (void) +{ + register bfd *kill; + + if (bfd_last_cache == NULL) + kill = NULL; + else + { + for (kill = bfd_last_cache->lru_prev; + ! kill->cacheable; + kill = kill->lru_prev) + { + if (kill == bfd_last_cache) + { + kill = NULL; + break; + } + } + } + + if (kill == NULL) + { + /* There are no open cacheable BFD's. */ + return TRUE; + } + + kill->where = real_ftell ((FILE *) kill->iostream); + + /* Save the file st_mtime. This is a hack so that gdb can detect when + an executable has been deleted and recreated. The only thing that + makes this reasonable is that st_mtime doesn't change when a file + is unlinked, so saving st_mtime makes BFD's file cache operation + a little more transparent for this particular usage pattern. If we + hadn't closed the file then we would not have lost the original + contents, st_mtime etc. Of course, if something is writing to an + existing file, then this is the wrong thing to do. + FIXME: gdb should save these times itself on first opening a file, + and this hack be removed. */ + if (kill->direction == no_direction || kill->direction == read_direction) + { + bfd_get_mtime (kill); + kill->mtime_set = TRUE; + } + + return bfd_cache_delete (kill); +} + +/* Check to see if the required BFD is the same as the last one + looked up. If so, then it can use the stream in the BFD with + impunity, since it can't have changed since the last lookup; + otherwise, it has to perform the complicated lookup function. */ + +#define bfd_cache_lookup(x, flag) \ + ((x) == bfd_last_cache \ + ? (FILE *) (bfd_last_cache->iostream) \ + : bfd_cache_lookup_worker (x, flag)) + +/* Called when the macro <> fails to find a + quick answer. Find a file descriptor for @var{abfd}. If + necessary, it open it. If there are already more than + <> files open, it tries to close one first, to + avoid running out of file descriptors. It will return NULL + if it is unable to (re)open the @var{abfd}. */ + +static FILE * +bfd_cache_lookup_worker (bfd *abfd, enum cache_flag flag) +{ + bfd *orig_bfd = abfd; + if ((abfd->flags & BFD_IN_MEMORY) != 0) + abort (); + + if (abfd->my_archive) + abfd = abfd->my_archive; + + if (abfd->iostream != NULL) + { + /* Move the file to the start of the cache. */ + if (abfd != bfd_last_cache) + { + snip (abfd); + insert (abfd); + } + return (FILE *) abfd->iostream; + } + + if (flag & CACHE_NO_OPEN) + return NULL; + + if (bfd_open_file (abfd) == NULL) + ; + else if (!(flag & CACHE_NO_SEEK) + && real_fseek ((FILE *) abfd->iostream, abfd->where, SEEK_SET) != 0 + && !(flag & CACHE_NO_SEEK_ERROR)) + bfd_set_error (bfd_error_system_call); + else + return (FILE *) abfd->iostream; + + (*_bfd_error_handler) (_("reopening %B: %s\n"), + orig_bfd, bfd_errmsg (bfd_get_error ())); + return NULL; +} static file_ptr cache_btell (struct bfd *abfd) { - return real_ftell (bfd_cache_lookup (abfd)); + FILE *f = bfd_cache_lookup (abfd, CACHE_NO_OPEN); + if (f == NULL) + return abfd->where; + return real_ftell (f); } static int cache_bseek (struct bfd *abfd, file_ptr offset, int whence) { - return real_fseek (bfd_cache_lookup (abfd), offset, whence); + FILE *f = bfd_cache_lookup (abfd, whence != SEEK_CUR ? CACHE_NO_SEEK : 0); + if (f == NULL) + return -1; + return real_fseek (f, offset, whence); } /* Note that archive entries don't have streams; they share their parent's. @@ -70,6 +267,7 @@ cache_bseek (struct bfd *abfd, file_ptr offset, int whence) static file_ptr cache_bread (struct bfd *abfd, void *buf, file_ptr nbytes) { + FILE *f; file_ptr nread; /* FIXME - this looks like an optimization, but it's really to cover up for a feature of some OSs (not solaris - sigh) that @@ -83,10 +281,14 @@ cache_bread (struct bfd *abfd, void *buf, file_ptr nbytes) if (nbytes == 0) return 0; + f = bfd_cache_lookup (abfd, 0); + if (f == NULL) + return 0; + #if defined (__VAX) && defined (VMS) /* Apparently fread on Vax VMS does not keep the record length information. */ - nread = read (fileno (bfd_cache_lookup (abfd)), buf, nbytes); + nread = read (fileno (f), buf, nbytes); /* Set bfd_error if we did not read as much data as we expected. If the read failed due to an error set the bfd_error_system_call, else set bfd_error_file_truncated. */ @@ -96,11 +298,11 @@ cache_bread (struct bfd *abfd, void *buf, file_ptr nbytes) return -1; } #else - nread = fread (buf, 1, nbytes, bfd_cache_lookup (abfd)); + nread = fread (buf, 1, nbytes, f); /* Set bfd_error if we did not read as much data as we expected. If the read failed due to an error set the bfd_error_system_call, else set bfd_error_file_truncated. */ - if (nread < nbytes && ferror (bfd_cache_lookup (abfd))) + if (nread < nbytes && ferror (f)) { bfd_set_error (bfd_error_system_call); return -1; @@ -112,8 +314,12 @@ cache_bread (struct bfd *abfd, void *buf, file_ptr nbytes) static file_ptr cache_bwrite (struct bfd *abfd, const void *where, file_ptr nbytes) { - file_ptr nwrite = fwrite (where, 1, nbytes, bfd_cache_lookup (abfd)); - if (nwrite < nbytes && ferror (bfd_cache_lookup (abfd))) + file_ptr nwrite; + FILE *f = bfd_cache_lookup (abfd, 0); + if (f == NULL) + return 0; + nwrite = fwrite (where, 1, nbytes, f); + if (nwrite < nbytes && ferror (f)) { bfd_set_error (bfd_error_system_call); return -1; @@ -130,7 +336,11 @@ cache_bclose (struct bfd *abfd) static int cache_bflush (struct bfd *abfd) { - int sts = fflush (bfd_cache_lookup (abfd)); + int sts; + FILE *f = bfd_cache_lookup (abfd, CACHE_NO_OPEN); + if (f == NULL) + return 0; + sts = fflush (f); if (sts < 0) bfd_set_error (bfd_error_system_call); return sts; @@ -139,7 +349,11 @@ cache_bflush (struct bfd *abfd) static int cache_bstat (struct bfd *abfd, struct stat *sb) { - int sts = fstat (fileno (bfd_cache_lookup (abfd)), sb); + int sts; + FILE *f = bfd_cache_lookup (abfd, CACHE_NO_SEEK_ERROR); + if (f == NULL) + return -1; + sts = fstat (fileno (f), sb); if (sts < 0) bfd_set_error (bfd_error_system_call); return sts; @@ -150,147 +364,6 @@ static const struct bfd_iovec cache_iovec = { &cache_bclose, &cache_bflush, &cache_bstat }; -/* -INTERNAL_FUNCTION - BFD_CACHE_MAX_OPEN macro - -DESCRIPTION - The maximum number of files which the cache will keep open at - one time. - -.#define BFD_CACHE_MAX_OPEN 10 - -*/ - -/* The number of BFD files we have open. */ - -static int open_files; - -/* -INTERNAL_FUNCTION - bfd_last_cache - -SYNOPSIS - extern bfd *bfd_last_cache; - -DESCRIPTION - Zero, or a pointer to the topmost BFD on the chain. This is - used by the <> macro in @file{libbfd.h} to - determine when it can avoid a function call. -*/ - -bfd *bfd_last_cache = NULL; - -/* - INTERNAL_FUNCTION - bfd_cache_lookup - - DESCRIPTION - Check to see if the required BFD is the same as the last one - looked up. If so, then it can use the stream in the BFD with - impunity, since it can't have changed since the last lookup; - otherwise, it has to perform the complicated lookup function. - - .#define bfd_cache_lookup(x) \ - . ((x) == bfd_last_cache ? \ - . (FILE *) (bfd_last_cache->iostream): \ - . bfd_cache_lookup_worker (x)) - - */ - -/* Insert a BFD into the cache. */ - -static void -insert (bfd *abfd) -{ - if (bfd_last_cache == NULL) - { - abfd->lru_next = abfd; - abfd->lru_prev = abfd; - } - else - { - abfd->lru_next = bfd_last_cache; - abfd->lru_prev = bfd_last_cache->lru_prev; - abfd->lru_prev->lru_next = abfd; - abfd->lru_next->lru_prev = abfd; - } - bfd_last_cache = abfd; -} - -/* Remove a BFD from the cache. */ - -static void -snip (bfd *abfd) -{ - abfd->lru_prev->lru_next = abfd->lru_next; - abfd->lru_next->lru_prev = abfd->lru_prev; - if (abfd == bfd_last_cache) - { - bfd_last_cache = abfd->lru_next; - if (abfd == bfd_last_cache) - bfd_last_cache = NULL; - } -} - -/* We need to open a new file, and the cache is full. Find the least - recently used cacheable BFD and close it. */ - -static bfd_boolean -close_one (void) -{ - register bfd *kill; - - if (bfd_last_cache == NULL) - kill = NULL; - else - { - for (kill = bfd_last_cache->lru_prev; - ! kill->cacheable; - kill = kill->lru_prev) - { - if (kill == bfd_last_cache) - { - kill = NULL; - break; - } - } - } - - if (kill == NULL) - { - /* There are no open cacheable BFD's. */ - return TRUE; - } - - kill->where = real_ftell ((FILE *) kill->iostream); - - return bfd_cache_delete (kill); -} - -/* Close a BFD and remove it from the cache. */ - -static bfd_boolean -bfd_cache_delete (bfd *abfd) -{ - bfd_boolean ret; - - if (fclose ((FILE *) abfd->iostream) == 0) - ret = TRUE; - else - { - ret = FALSE; - bfd_set_error (bfd_error_system_call); - } - - snip (abfd); - - abfd->iostream = NULL; - --open_files; - - return ret; -} - /* INTERNAL_FUNCTION bfd_cache_init @@ -447,7 +520,9 @@ bfd_open_file (bfd *abfd) break; } - if (abfd->iostream != NULL) + if (abfd->iostream == NULL) + bfd_set_error (bfd_error_system_call); + else { if (! bfd_cache_init (abfd)) return NULL; @@ -455,48 +530,3 @@ bfd_open_file (bfd *abfd) return (FILE *) abfd->iostream; } - -/* -INTERNAL_FUNCTION - bfd_cache_lookup_worker - -SYNOPSIS - FILE *bfd_cache_lookup_worker (bfd *abfd); - -DESCRIPTION - Called when the macro <> fails to find a - quick answer. Find a file descriptor for @var{abfd}. If - necessary, it open it. If there are already more than - <> files open, it tries to close one first, to - avoid running out of file descriptors. It will abort rather than - returning NULL if it is unable to (re)open the @var{abfd}. -*/ - -FILE * -bfd_cache_lookup_worker (bfd *abfd) -{ - if ((abfd->flags & BFD_IN_MEMORY) != 0) - abort (); - - if (abfd->my_archive) - abfd = abfd->my_archive; - - if (abfd->iostream != NULL) - { - /* Move the file to the start of the cache. */ - if (abfd != bfd_last_cache) - { - snip (abfd); - insert (abfd); - } - } - else - { - if (bfd_open_file (abfd) == NULL - || abfd->where != (unsigned long) abfd->where - || real_fseek ((FILE *) abfd->iostream, abfd->where, SEEK_SET) != 0) - abort (); - } - - return (FILE *) abfd->iostream; -} diff --git a/bfd/coff-rs6000.c b/bfd/coff-rs6000.c index ed7125a5058..8e54c6a135a 100644 --- a/bfd/coff-rs6000.c +++ b/bfd/coff-rs6000.c @@ -4135,6 +4135,7 @@ const bfd_target rs6000coff_vec = /* Copy */ _bfd_xcoff_copy_private_bfd_data, ((bfd_boolean (*) (bfd *, bfd *)) bfd_true), + _bfd_generic_init_private_section_data, ((bfd_boolean (*) (bfd *, asection *, bfd *, asection *)) bfd_true), ((bfd_boolean (*) (bfd *, asymbol *, bfd *, asymbol *)) bfd_true), ((bfd_boolean (*) (bfd *, bfd *)) bfd_true), @@ -4385,6 +4386,7 @@ const bfd_target pmac_xcoff_vec = /* Copy */ _bfd_xcoff_copy_private_bfd_data, ((bfd_boolean (*) (bfd *, bfd *)) bfd_true), + _bfd_generic_init_private_section_data, ((bfd_boolean (*) (bfd *, asection *, bfd *, asection *)) bfd_true), ((bfd_boolean (*) (bfd *, asymbol *, bfd *, asymbol *)) bfd_true), ((bfd_boolean (*) (bfd *, bfd *)) bfd_true), diff --git a/bfd/coff-z80.c b/bfd/coff-z80.c new file mode 100644 index 00000000000..fe401d77b86 --- /dev/null +++ b/bfd/coff-z80.c @@ -0,0 +1,244 @@ +/* BFD back-end for Zilog Z80 COFF binaries. + Copyright 2005 Free Software Foundation, Inc. + Contributed by Arnold Metselaar + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "bfd.h" +#include "sysdep.h" +#include "libbfd.h" +#include "bfdlink.h" +#include "coff/z80.h" +#include "coff/internal.h" +#include "libcoff.h" + +#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER 0 + +static reloc_howto_type r_imm32 = +HOWTO (R_IMM32, 0, 1, 32, FALSE, 0, + complain_overflow_dont, 0, "r_imm32", TRUE, 0xffffffff, 0xffffffff, + FALSE); + +static reloc_howto_type r_imm16 = +HOWTO (R_IMM16, 0, 1, 16, FALSE, 0, + complain_overflow_dont, 0, "r_imm16", TRUE, 0x0000ffff, 0x0000ffff, + FALSE); + +static reloc_howto_type r_imm8 = +HOWTO (R_IMM8, 0, 0, 8, FALSE, 0, + complain_overflow_bitfield, 0, "r_imm8", TRUE, 0x000000ff, 0x000000ff, + FALSE); + +static reloc_howto_type r_jr = +HOWTO (R_JR, 0, 0, 8, TRUE, 0, + complain_overflow_signed, 0, "r_jr", FALSE, 0, 0xFF, + FALSE); + +static reloc_howto_type r_off8 = +HOWTO (R_OFF8, 0, 0, 8, FALSE, 0, + complain_overflow_signed, 0,"r_off8", FALSE, 0, 0xff, + FALSE); + + +#define BADMAG(x) Z80BADMAG(x) +#define Z80 1 /* Customize coffcode.h. */ +#define __A_MAGIC_SET__ + +/* Code to swap in the reloc. */ + +#define SWAP_IN_RELOC_OFFSET H_GET_32 +#define SWAP_OUT_RELOC_OFFSET H_PUT_32 + +#define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \ + dst->r_stuff[0] = 'S'; \ + dst->r_stuff[1] = 'C'; + +/* Code to turn a r_type into a howto ptr, uses the above howto table. */ + +static void +rtype2howto (arelent *internal, struct internal_reloc *dst) +{ + switch (dst->r_type) + { + default: + abort (); + break; + case R_IMM8: + internal->howto = &r_imm8; + break; + case R_IMM16: + internal->howto = &r_imm16; + break; + case R_IMM32: + internal->howto = &r_imm32; + break; + case R_JR: + internal->howto = &r_jr; + break; + case R_OFF8: + internal->howto = &r_off8; + break; + } +} + +#define RTYPE2HOWTO(internal, relocentry) rtype2howto (internal, relocentry) + +static reloc_howto_type * +coff_z80_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, + bfd_reloc_code_real_type code) +{ + switch (code) + { + case BFD_RELOC_8: return & r_imm8; + case BFD_RELOC_16: return & r_imm16; + case BFD_RELOC_32: return & r_imm32; + case BFD_RELOC_8_PCREL: return & r_jr; + case BFD_RELOC_Z80_DISP8: return & r_off8; + default: BFD_FAIL (); + return NULL; + } +} + +/* Perform any necessary magic to the addend in a reloc entry. */ + +#define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \ + cache_ptr->addend = ext_reloc.r_offset; + +#define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \ + reloc_processing(relent, reloc, symbols, abfd, section) + +static void +reloc_processing (arelent *relent, + struct internal_reloc *reloc, + asymbol **symbols, + bfd *abfd, + asection *section) +{ + relent->address = reloc->r_vaddr; + rtype2howto (relent, reloc); + + if (reloc->r_symndx > 0) + relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx]; + else + relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr; + + relent->addend = reloc->r_offset; + relent->address -= section->vma; +} + +static void +extra_case (bfd *in_abfd, + struct bfd_link_info *link_info, + struct bfd_link_order *link_order, + arelent *reloc, + bfd_byte *data, + unsigned int *src_ptr, + unsigned int *dst_ptr) +{ + asection * input_section = link_order->u.indirect.section; + int val; + + switch (reloc->howto->type) + { + case R_OFF8: + val = bfd_coff_reloc16_get_value (reloc, link_info, + input_section); + if (val>127 || val<-128) /* Test for overflow. */ + { + if (! ((*link_info->callbacks->reloc_overflow) + (link_info, NULL, + bfd_asymbol_name (*reloc->sym_ptr_ptr), + reloc->howto->name, reloc->addend, input_section->owner, + input_section, reloc->address))) + abort (); + } + bfd_put_8 (in_abfd, val, data + *dst_ptr); + (*dst_ptr) += 1; + (*src_ptr) += 1; + break; + + case R_IMM8: + val = bfd_get_16 ( in_abfd, data+*src_ptr) + + bfd_coff_reloc16_get_value (reloc, link_info, input_section); + bfd_put_8 (in_abfd, val, data + *dst_ptr); + (*dst_ptr) += 1; + (*src_ptr) += 1; + break; + + case R_IMM16: + val = bfd_get_16 ( in_abfd, data+*src_ptr) + + bfd_coff_reloc16_get_value (reloc, link_info, input_section); + bfd_put_16 (in_abfd, val, data + *dst_ptr); + (*dst_ptr) += 2; + (*src_ptr) += 2; + break; + + case R_IMM32: + val = bfd_get_32 ( in_abfd, data+*src_ptr) + + bfd_coff_reloc16_get_value (reloc, link_info, input_section); + bfd_put_32 (in_abfd, val, data + *dst_ptr); + (*dst_ptr) += 4; + (*src_ptr) += 4; + break; + + case R_JR: + { + bfd_vma dst = bfd_coff_reloc16_get_value (reloc, link_info, + input_section); + bfd_vma dot = (link_order->offset + + *dst_ptr + + input_section->output_section->vma); + int gap = dst - dot - 1; /* -1, Since the offset is relative + to the value of PC after reading + the offset. */ + + if (gap >= 128 || gap < -128) + { + if (! ((*link_info->callbacks->reloc_overflow) + (link_info, NULL, + bfd_asymbol_name (*reloc->sym_ptr_ptr), + reloc->howto->name, reloc->addend, input_section->owner, + input_section, reloc->address))) + abort (); + } + bfd_put_8 (in_abfd, gap, data + *dst_ptr); + (*dst_ptr)++; + (*src_ptr)++; + break; + } + + default: + abort (); + } +} + +#define coff_reloc16_extra_cases extra_case +#define coff_bfd_reloc_type_lookup coff_z80_reloc_type_lookup + +#include "coffcode.h" + +#undef coff_bfd_get_relocated_section_contents +#define coff_bfd_get_relocated_section_contents \ + bfd_coff_reloc16_get_relocated_section_contents + +#undef coff_bfd_relax_section +#define coff_bfd_relax_section bfd_coff_reloc16_relax_section + +CREATE_LITTLE_COFF_TARGET_VEC (z80coff_vec, "coff-z80", 0, 0, '\0', NULL, + COFF_SWAP_TABLE) + diff --git a/bfd/coff64-rs6000.c b/bfd/coff64-rs6000.c index a3d3699c27b..77a6eecbc20 100644 --- a/bfd/coff64-rs6000.c +++ b/bfd/coff64-rs6000.c @@ -2682,6 +2682,7 @@ const bfd_target rs6000coff64_vec = /* Copy */ _bfd_xcoff_copy_private_bfd_data, ((bfd_boolean (*) (bfd *, bfd *)) bfd_true), + _bfd_generic_init_private_section_data, ((bfd_boolean (*) (bfd *, asection *, bfd *, asection *)) bfd_true), ((bfd_boolean (*) (bfd *, asymbol *, bfd *, asymbol *)) bfd_true), ((bfd_boolean (*) (bfd *, bfd *)) bfd_true), @@ -2933,6 +2934,7 @@ const bfd_target aix5coff64_vec = /* Copy */ _bfd_xcoff_copy_private_bfd_data, ((bfd_boolean (*) (bfd *, bfd *)) bfd_true), + _bfd_generic_init_private_section_data, ((bfd_boolean (*) (bfd *, asection *, bfd *, asection *)) bfd_true), ((bfd_boolean (*) (bfd *, asymbol *, bfd *, asymbol *)) bfd_true), ((bfd_boolean (*) (bfd *, bfd *)) bfd_true), diff --git a/bfd/coffcode.h b/bfd/coffcode.h index 3b94dff431a..aaf79c10325 100644 --- a/bfd/coffcode.h +++ b/bfd/coffcode.h @@ -1955,6 +1955,23 @@ coff_set_arch_mach_hook (bfd *abfd, void * filehdr) machine = 88100; break; #endif +#ifdef Z80MAGIC + case Z80MAGIC: + arch = bfd_arch_z80; + switch (internal_f->f_flags & F_MACHMASK) + { + case 0: + case bfd_mach_z80strict << 12: + case bfd_mach_z80 << 12: + case bfd_mach_z80full << 12: + case bfd_mach_r800 << 12: + machine = ((unsigned)internal_f->f_flags & F_MACHMASK) >> 12; + break; + default: + return FALSE; + } + break; +#endif #ifdef Z8KMAGIC case Z8KMAGIC: arch = bfd_arch_z8k; @@ -2555,6 +2572,24 @@ coff_set_flags (bfd * abfd, { switch (bfd_get_arch (abfd)) { +#ifdef Z80MAGIC + case bfd_arch_z80: + *magicp = Z80MAGIC; + switch (bfd_get_mach (abfd)) + { + case 0: + case bfd_mach_z80strict: + case bfd_mach_z80: + case bfd_mach_z80full: + case bfd_mach_r800: + *flagsp = bfd_get_mach (abfd) << 12; + break; + default: + return FALSE; + } + return TRUE; +#endif + #ifdef Z8KMAGIC case bfd_arch_z8k: *magicp = Z8KMAGIC; diff --git a/bfd/config.bfd b/bfd/config.bfd index aec10e18233..ab47fa3cc25 100644 --- a/bfd/config.bfd +++ b/bfd/config.bfd @@ -101,6 +101,7 @@ v850*) targ_archs=bfd_v850_arch ;; x86_64) targ_archs=bfd_i386_arch ;; xscale*) targ_archs=bfd_arm_arch ;; xtensa*) targ_archs=bfd_xtensa_arch ;; +z80|r800) targ_archs=bfd_z80_arch ;; z8k*) targ_archs=bfd_z8k_arch ;; am33_2.0) targ_archs=bfd_mn10300_arch ;; *) targ_archs=bfd_${targ_cpu}_arch ;; @@ -1366,6 +1367,11 @@ case "${targ}" in targ_selvecs=bfd_elf32_xtensa_be_vec ;; + z80-*-*) + targ_defvec=z80coff_vec + targ_underscore=no + ;; + z8k*-*-*) targ_defvec=z8kcoff_vec targ_underscore=yes diff --git a/bfd/configure b/bfd/configure index 179967607f6..d7f01e6c440 100755 --- a/bfd/configure +++ b/bfd/configure @@ -13190,6 +13190,7 @@ do vms_vax_vec) tb="$tb vms.lo vms-hdr.lo vms-gsd.lo vms-tir.lo vms-misc.lo" ;; w65_vec) tb="$tb coff-w65.lo reloc16.lo" ;; we32kcoff_vec) tb="$tb coff-we32k.lo" ;; + z80coff_vec) tb="$tb coff-z80.lo reloc16.lo" ;; z8kcoff_vec) tb="$tb coff-z8k.lo reloc16.lo cofflink.lo" ;; # These appear out of order in targets.c diff --git a/bfd/configure.in b/bfd/configure.in index 7ace2196d06..1a7dc84de5b 100644 --- a/bfd/configure.in +++ b/bfd/configure.in @@ -811,6 +811,7 @@ do vms_vax_vec) tb="$tb vms.lo vms-hdr.lo vms-gsd.lo vms-tir.lo vms-misc.lo" ;; w65_vec) tb="$tb coff-w65.lo reloc16.lo" ;; we32kcoff_vec) tb="$tb coff-we32k.lo" ;; + z80coff_vec) tb="$tb coff-z80.lo reloc16.lo" ;; z8kcoff_vec) tb="$tb coff-z8k.lo reloc16.lo cofflink.lo" ;; # These appear out of order in targets.c diff --git a/bfd/cpu-ia64-opc.c b/bfd/cpu-ia64-opc.c index cbd6a58eb9e..360ee9bf063 100644 --- a/bfd/cpu-ia64-opc.c +++ b/bfd/cpu-ia64-opc.c @@ -457,6 +457,10 @@ const struct ia64_operand elf64_ia64_operands[IA64_OPND_COUNT] = { REG, ins_reg, ext_reg, "r", {{ 2, 20}}, 0, /* R3_2 */ "a general register r0-r3" }, + /* memory operands: */ + { IND, ins_reg, ext_reg, "", {{7, 20}}, 0, /* MR3 */ + "a memory address" }, + /* indirect operands: */ { IND, ins_reg, ext_reg, "cpuid", {{7, 20}}, 0, /* CPUID_R3 */ "a cpuid register" }, @@ -468,8 +472,6 @@ const struct ia64_operand elf64_ia64_operands[IA64_OPND_COUNT] = "an itr register" }, { IND, ins_reg, ext_reg, "ibr", {{7, 20}}, 0, /* IBR_R3 */ "an ibr register" }, - { IND, ins_reg, ext_reg, "", {{7, 20}}, 0, /* MR3 */ - "an indirect memory address" }, { IND, ins_reg, ext_reg, "msr", {{7, 20}}, 0, /* MSR_R3 */ "an msr register" }, { IND, ins_reg, ext_reg, "pkr", {{7, 20}}, 0, /* PKR_R3 */ diff --git a/bfd/cpu-z80.c b/bfd/cpu-z80.c new file mode 100644 index 00000000000..3fd6fd48176 --- /dev/null +++ b/bfd/cpu-z80.c @@ -0,0 +1,57 @@ +/* BFD library support routines for the Z80 architecture. + Copyright 2005 Free Software Foundation, Inc. + Contributed by Arnold Metselaar + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "bfd.h" +#include "sysdep.h" +#include "libbfd.h" + +const bfd_arch_info_type bfd_z80_arch; + +/* This routine is provided two arch_infos and + returns whether they'd be compatible. */ + +static const bfd_arch_info_type * +compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b) +{ + if (a->arch != b->arch) + return NULL; + + if (a->mach == b->mach) + return a; + + return (a->arch == bfd_arch_z80) ? & bfd_z80_arch : NULL; +} + +#define N(name,print,default,next) \ +{ 16, 16, 8, bfd_arch_z80, name, "z80", print, 0, default, \ + compatible, bfd_default_scan, next } + +#define M(n) &arch_info_struct[n] + +static const bfd_arch_info_type arch_info_struct[] = +{ + N (bfd_mach_z80strict, "z80-strict", FALSE, M(1)), + N (bfd_mach_z80, "z80", FALSE, M(2)), + N (bfd_mach_z80full, "z80-full", FALSE, M(3)), + N (bfd_mach_r800, "r800", FALSE, NULL) +}; + +const bfd_arch_info_type bfd_z80_arch = N (0, "z80-any", TRUE, M(0)); diff --git a/bfd/dep-in.sed b/bfd/dep-in.sed index 90a2e6a7f06..2732d6b42e3 100644 --- a/bfd/dep-in.sed +++ b/bfd/dep-in.sed @@ -4,6 +4,7 @@ s/\\\n */ /g t loop s!\.o:!.lo:! +s! \./! !g s! @BFD_H@!!g s!@SRCDIR@/../include!$(INCDIR)!g s!@TOPDIR@/include!$(INCDIR)!g diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h index d011a454ee7..be1c65fb54d 100644 --- a/bfd/elf-bfd.h +++ b/bfd/elf-bfd.h @@ -870,7 +870,7 @@ struct elf_backend_data newly created and plt/got refcounts and dynamic indices should not be copied. */ void (*elf_backend_copy_indirect_symbol) - (const struct elf_backend_data *, struct elf_link_hash_entry *, + (struct bfd_link_info *, struct elf_link_hash_entry *, struct elf_link_hash_entry *); /* Modify any information related to dynamic linking such that the @@ -1462,7 +1462,7 @@ extern struct bfd_hash_entry *_bfd_elf_link_hash_newfunc extern struct bfd_link_hash_table *_bfd_elf_link_hash_table_create (bfd *); extern void _bfd_elf_link_hash_copy_indirect - (const struct elf_backend_data *, struct elf_link_hash_entry *, + (struct bfd_link_info *, struct elf_link_hash_entry *, struct elf_link_hash_entry *); extern void _bfd_elf_link_hash_hide_symbol (struct bfd_link_info *, struct elf_link_hash_entry *, bfd_boolean); @@ -1492,6 +1492,10 @@ extern bfd_boolean _bfd_elf_copy_private_header_data (bfd *, bfd *); extern bfd_boolean _bfd_elf_copy_private_symbol_data (bfd *, asymbol *, bfd *, asymbol *); +#define _bfd_generic_init_private_section_data \ + _bfd_elf_init_private_section_data +extern bfd_boolean _bfd_elf_init_private_section_data + (bfd *, asection *, bfd *, asection *, struct bfd_link_info *); extern bfd_boolean _bfd_elf_copy_private_section_data (bfd *, asection *, bfd *, asection *); extern bfd_boolean _bfd_elf_write_object_contents diff --git a/bfd/elf.c b/bfd/elf.c index 3a139a0bcf0..0e72d4ef93f 100644 --- a/bfd/elf.c +++ b/bfd/elf.c @@ -1458,12 +1458,11 @@ _bfd_elf_link_hash_newfunc (struct bfd_hash_entry *entry, old indirect symbol. Also used for copying flags to a weakdef. */ void -_bfd_elf_link_hash_copy_indirect (const struct elf_backend_data *bed, +_bfd_elf_link_hash_copy_indirect (struct bfd_link_info *info, struct elf_link_hash_entry *dir, struct elf_link_hash_entry *ind) { - bfd_signed_vma tmp; - bfd_signed_vma lowest_valid = bed->can_refcount; + struct elf_link_hash_table *htab; /* Copy down any references that we may have already seen to the symbol which just became indirect. */ @@ -1480,33 +1479,32 @@ _bfd_elf_link_hash_copy_indirect (const struct elf_backend_data *bed, /* Copy over the global and procedure linkage table refcount entries. These may have been already set up by a check_relocs routine. */ - tmp = dir->got.refcount; - if (tmp < lowest_valid) + htab = elf_hash_table (info); + if (ind->got.refcount > htab->init_got_refcount.refcount) { - dir->got.refcount = ind->got.refcount; - ind->got.refcount = tmp; + if (dir->got.refcount < 0) + dir->got.refcount = 0; + dir->got.refcount += ind->got.refcount; + ind->got.refcount = htab->init_got_refcount.refcount; } - else - BFD_ASSERT (ind->got.refcount < lowest_valid); - tmp = dir->plt.refcount; - if (tmp < lowest_valid) + if (ind->plt.refcount > htab->init_plt_refcount.refcount) { - dir->plt.refcount = ind->plt.refcount; - ind->plt.refcount = tmp; + if (dir->plt.refcount < 0) + dir->plt.refcount = 0; + dir->plt.refcount += ind->plt.refcount; + ind->plt.refcount = htab->init_plt_refcount.refcount; } - else - BFD_ASSERT (ind->plt.refcount < lowest_valid); - if (dir->dynindx == -1) + if (ind->dynindx != -1) { + if (dir->dynindx != -1) + _bfd_elf_strtab_delref (htab->dynstr, dir->dynstr_index); dir->dynindx = ind->dynindx; dir->dynstr_index = ind->dynstr_index; ind->dynindx = -1; ind->dynstr_index = 0; } - else - BFD_ASSERT (ind->dynindx == -1); } void @@ -2670,29 +2668,7 @@ elf_fake_sections (bfd *abfd, asection *asect, void *failedptrarg) if (this_hdr->sh_type == SHT_NULL) { if ((asect->flags & SEC_GROUP) != 0) - { - /* We also need to mark SHF_GROUP here for relocatable - link. */ - struct bfd_link_order *l; - asection *elt; - - for (l = asect->map_head.link_order; l != NULL; l = l->next) - if (l->type == bfd_indirect_link_order - && (elt = elf_next_in_group (l->u.indirect.section)) != NULL) - do - { - /* The name is not important. Anything will do. */ - elf_group_name (elt->output_section) = "G"; - elf_section_flags (elt->output_section) |= SHF_GROUP; - - elt = elf_next_in_group (elt); - /* During a relocatable link, the lists are - circular. */ - } - while (elt != elf_next_in_group (l->u.indirect.section)); - - this_hdr->sh_type = SHT_GROUP; - } + this_hdr->sh_type = SHT_GROUP; else if ((asect->flags & SEC_ALLOC) != 0 && (((asect->flags & (SEC_LOAD | SEC_HAS_CONTENTS)) == 0) || (asect->flags & SEC_NEVER_LOAD) != 0)) @@ -2827,7 +2803,6 @@ bfd_elf_set_group_contents (bfd *abfd, asection *sec, void *failedptrarg) unsigned long symindx; asection *elt, *first; unsigned char *loc; - struct bfd_link_order *l; bfd_boolean gas; /* Ignore linker created group section. See elfNN_ia64_object_p in @@ -2896,22 +2871,6 @@ bfd_elf_set_group_contents (bfd *abfd, asection *sec, void *failedptrarg) break; } - /* If this is a relocatable link, then the above did nothing because - SEC is the output section. Look through the input sections - instead. */ - for (l = sec->map_head.link_order; l != NULL; l = l->next) - if (l->type == bfd_indirect_link_order - && (elt = elf_next_in_group (l->u.indirect.section)) != NULL) - do - { - loc -= 4; - H_PUT_32 (abfd, - elf_section_data (elt->output_section)->this_idx, loc); - elt = elf_next_in_group (elt); - /* During a relocatable link, the lists are circular. */ - } - while (elt != elf_next_in_group (l->u.indirect.section)); - if ((loc -= 4) != sec->contents) abort (); @@ -3091,67 +3050,46 @@ assign_section_numbers (bfd *abfd, struct bfd_link_info *link_info) { s = elf_linked_to_section (sec); if (s) - d->this_hdr.sh_link = elf_section_data (s)->this_idx; - else { - struct bfd_link_order *p; - - /* Find out what the corresponding section in output - is. */ - for (p = sec->map_head.link_order; p != NULL; p = p->next) + if (link_info != NULL) { - s = p->u.indirect.section; - if (p->type == bfd_indirect_link_order - && (bfd_get_flavour (s->owner) - == bfd_target_elf_flavour)) + /* For linker, elf_linked_to_section points to the + input section. */ + if (elf_discarded_section (s)) { - Elf_Internal_Shdr ** const elf_shdrp - = elf_elfsections (s->owner); - int elfsec - = _bfd_elf_section_from_bfd_section (s->owner, s); - elfsec = elf_shdrp[elfsec]->sh_link; - /* PR 290: - The Intel C compiler generates SHT_IA_64_UNWIND with - SHF_LINK_ORDER. But it doesn't set the sh_link or - sh_info fields. Hence we could get the situation - where elfsec is 0. */ - if (elfsec == 0) - { - const struct elf_backend_data *bed - = get_elf_backend_data (abfd); - if (bed->link_order_error_handler) - bed->link_order_error_handler - (_("%B: warning: sh_link not set for section `%A'"), - abfd, s); - } - else + asection *kept; + (*_bfd_error_handler) + (_("%B: sh_link of section `%A' points to discarded section `%A' of `%B'"), + abfd, d->this_hdr.bfd_section, + s, s->owner); + /* Point to the kept section if it has the same + size as the discarded one. */ + kept = _bfd_elf_check_kept_section (s); + if (kept == NULL) { - s = elf_shdrp[elfsec]->bfd_section; - if (elf_discarded_section (s)) - { - asection *kept; - (*_bfd_error_handler) - (_("%B: sh_link of section `%A' points to discarded section `%A' of `%B'"), - abfd, d->this_hdr.bfd_section, - s, s->owner); - /* Point to the kept section if it has - the same size as the discarded - one. */ - kept = _bfd_elf_check_kept_section (s); - if (kept == NULL) - { - bfd_set_error (bfd_error_bad_value); - return FALSE; - } - s = kept; - } - s = s->output_section; - BFD_ASSERT (s != NULL); - d->this_hdr.sh_link = elf_section_data (s)->this_idx; + bfd_set_error (bfd_error_bad_value); + return FALSE; } - break; + s = kept; } + s = s->output_section; + BFD_ASSERT (s != NULL); } + d->this_hdr.sh_link = elf_section_data (s)->this_idx; + } + else + { + /* PR 290: + The Intel C compiler generates SHT_IA_64_UNWIND with + SHF_LINK_ORDER. But it doesn't set the sh_link or + sh_info fields. Hence we could get the situation + where s is NULL. */ + const struct elf_backend_data *bed + = get_elf_backend_data (abfd); + if (bed->link_order_error_handler) + bed->link_order_error_handler + (_("%B: warning: sh_link not set for section `%A'"), + abfd, sec); } } @@ -5665,6 +5603,62 @@ copy_private_bfd_data (bfd *ibfd, bfd *obfd) return TRUE; } +/* Initialize private output section information from input section. */ + +bfd_boolean +_bfd_elf_init_private_section_data (bfd *ibfd, + asection *isec, + bfd *obfd, + asection *osec, + struct bfd_link_info *link_info) + +{ + Elf_Internal_Shdr *ihdr, *ohdr; + bfd_boolean need_group = link_info == NULL || link_info->relocatable; + + if (ibfd->xvec->flavour != bfd_target_elf_flavour + || obfd->xvec->flavour != bfd_target_elf_flavour) + return TRUE; + + /* FIXME: What if the output ELF section type has been set to + something different? */ + if (elf_section_type (osec) == SHT_NULL) + elf_section_type (osec) = elf_section_type (isec); + + /* Set things up for objcopy and relocatable link. The output + SHT_GROUP section will have its elf_next_in_group pointing back + to the input group members. Ignore linker created group section. + See elfNN_ia64_object_p in elfxx-ia64.c. */ + + if (need_group) + { + if (elf_sec_group (isec) == NULL + || (elf_sec_group (isec)->flags & SEC_LINKER_CREATED) == 0) + { + if (elf_section_flags (isec) & SHF_GROUP) + elf_section_flags (osec) |= SHF_GROUP; + elf_next_in_group (osec) = elf_next_in_group (isec); + elf_group_name (osec) = elf_group_name (isec); + } + } + + ihdr = &elf_section_data (isec)->this_hdr; + + /* We need to handle elf_linked_to_section for SHF_LINK_ORDER. We + don't use the output section of the linked-to section since it + may be NULL at this point. */ + if ((ihdr->sh_flags & SHF_LINK_ORDER) != 0) + { + ohdr = &elf_section_data (osec)->this_hdr; + ohdr->sh_flags |= SHF_LINK_ORDER; + elf_linked_to_section (osec) = elf_linked_to_section (isec); + } + + osec->use_rela_p = isec->use_rela_p; + + return TRUE; +} + /* Copy private section information. This copies over the entsize field, and sometimes the info field. */ @@ -5691,27 +5685,8 @@ _bfd_elf_copy_private_section_data (bfd *ibfd, || ihdr->sh_type == SHT_GNU_verdef) ohdr->sh_info = ihdr->sh_info; - /* Set things up for objcopy. The output SHT_GROUP section will - have its elf_next_in_group pointing back to the input group - members. Ignore linker created group section. See - elfNN_ia64_object_p in elfxx-ia64.c. We also need to handle - elf_linked_to_section for SHF_LINK_ORDER. */ - - if ((ihdr->sh_flags & SHF_LINK_ORDER) != 0 - && elf_linked_to_section (isec) != 0) - elf_linked_to_section (osec) - = elf_linked_to_section (isec)->output_section; - - if (elf_sec_group (isec) == NULL - || (elf_sec_group (isec)->flags & SEC_LINKER_CREATED) == 0) - { - elf_next_in_group (osec) = elf_next_in_group (isec); - elf_group_name (osec) = elf_group_name (isec); - } - - osec->use_rela_p = isec->use_rela_p; - - return TRUE; + return _bfd_elf_init_private_section_data (ibfd, isec, obfd, osec, + NULL); } /* Copy private header information. */ diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c index c4bfd3107d1..6f220e9631b 100644 --- a/bfd/elf32-arm.c +++ b/bfd/elf32-arm.c @@ -1793,7 +1793,7 @@ elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info) /* Copy the extra info we tack onto an elf_link_hash_entry. */ static void -elf32_arm_copy_indirect_symbol (const struct elf_backend_data *bed, +elf32_arm_copy_indirect_symbol (struct bfd_link_info *info, struct elf_link_hash_entry *dir, struct elf_link_hash_entry *ind) { @@ -1809,10 +1809,7 @@ elf32_arm_copy_indirect_symbol (const struct elf_backend_data *bed, struct elf32_arm_relocs_copied **pp; struct elf32_arm_relocs_copied *p; - if (ind->root.type == bfd_link_hash_indirect) - abort (); - - /* Add reloc counts against the weak sym to the strong sym + /* Add reloc counts against the indirect sym to the direct sym list. Merge any entries against the same section. */ for (pp = &eind->relocs_copied; (p = *pp) != NULL; ) { @@ -1836,16 +1833,9 @@ elf32_arm_copy_indirect_symbol (const struct elf_backend_data *bed, eind->relocs_copied = NULL; } - /* If the direct symbol already has an associated PLT entry, the - indirect symbol should not. If it doesn't, swap refcount information - from the indirect symbol. */ - if (edir->plt_thumb_refcount == 0) - { - edir->plt_thumb_refcount = eind->plt_thumb_refcount; - eind->plt_thumb_refcount = 0; - } - else - BFD_ASSERT (eind->plt_thumb_refcount == 0); + /* Copy over PLT info. */ + edir->plt_thumb_refcount += eind->plt_thumb_refcount; + eind->plt_thumb_refcount = 0; if (ind->root.type == bfd_link_hash_indirect && dir->got.refcount <= 0) @@ -1854,7 +1844,7 @@ elf32_arm_copy_indirect_symbol (const struct elf_backend_data *bed, eind->tls_type = GOT_UNKNOWN; } - _bfd_elf_link_hash_copy_indirect (bed, dir, ind); + _bfd_elf_link_hash_copy_indirect (info, dir, ind); } /* Create an ARM elf linker hash table. */ diff --git a/bfd/elf32-bfin.c b/bfd/elf32-bfin.c index 72f8aee5c96..c1a1b7443a1 100644 --- a/bfd/elf32-bfin.c +++ b/bfd/elf32-bfin.c @@ -433,11 +433,8 @@ bfin_imm16_reloc (bfd *abfd, if (!relocatable || !strcmp (symbol->name, symbol->section->name)) relocation += output_base + symbol->section->output_offset; - if (symbol->flags & BSF_SECTION_SYM) - { - /* Add in supplied addend. */ - relocation += reloc_entry->addend; - } + /* Add in supplied addend. */ + relocation += reloc_entry->addend; } else { @@ -470,7 +467,6 @@ bfin_imm16_reloc (bfd *abfd, /* Here the variable relocation holds the final address of the symbol we are relocating against, plus any addend. */ - x = bfd_get_16 (abfd, (bfd_byte *) data + reloc_addr); relocation >>= (bfd_vma) howto->rightshift; x = relocation; bfd_put_16 (abfd, x, (unsigned char *) data + reloc_addr); @@ -759,7 +755,7 @@ static reloc_howto_type bfin_howto_table [] = bfin_bfd_reloc, /* special_function. */ "R_pcrel5m2", /* name. */ FALSE, /* partial_inplace. */ - 0x0000000F, /* src_mask. */ + 0, /* src_mask. */ 0x0000000F, /* dst_mask. */ FALSE), /* pcrel_offset. */ @@ -787,7 +783,7 @@ static reloc_howto_type bfin_howto_table [] = bfin_bfd_reloc, /* special_function. */ "R_pcrel10", /* name. */ FALSE, /* partial_inplace. */ - 0x000003FF, /* src_mask. */ + 0, /* src_mask. */ 0x000003FF, /* dst_mask. */ TRUE), /* pcrel_offset. */ @@ -805,7 +801,7 @@ static reloc_howto_type bfin_howto_table [] = bfin_bfd_reloc, /* special_function. */ "R_pcrel12_jump", /* name. */ FALSE, /* partial_inplace. */ - 0x0FFF, /* src_mask. */ + 0, /* src_mask. */ 0x0FFF, /* dst_mask. */ TRUE), /* pcrel_offset. */ @@ -819,7 +815,7 @@ static reloc_howto_type bfin_howto_table [] = bfin_imm16_reloc, /* special_function. */ "R_rimm16", /* name. */ FALSE, /* partial_inplace. */ - 0x0000FFFF, /* src_mask. */ + 0, /* src_mask. */ 0x0000FFFF, /* dst_mask. */ TRUE), /* pcrel_offset. */ @@ -833,7 +829,7 @@ static reloc_howto_type bfin_howto_table [] = bfin_imm16_reloc, /* special_function. */ "R_luimm16", /* name. */ FALSE, /* partial_inplace. */ - 0x0000FFFF, /* src_mask. */ + 0, /* src_mask. */ 0x0000FFFF, /* dst_mask. */ TRUE), /* pcrel_offset. */ @@ -847,7 +843,7 @@ static reloc_howto_type bfin_howto_table [] = bfin_imm16_reloc, /* special_function. */ "R_huimm16", /* name. */ FALSE, /* partial_inplace. */ - 0x0000FFFF, /* src_mask. */ + 0, /* src_mask. */ 0x0000FFFF, /* dst_mask. */ TRUE), /* pcrel_offset. */ @@ -861,7 +857,7 @@ static reloc_howto_type bfin_howto_table [] = bfin_bfd_reloc, /* special_function. */ "R_pcrel12_jump_s", /* name. */ FALSE, /* partial_inplace. */ - 0x00000FFF, /* src_mask. */ + 0, /* src_mask. */ 0x00000FFF, /* dst_mask. */ TRUE), /* pcrel_offset. */ @@ -875,7 +871,7 @@ static reloc_howto_type bfin_howto_table [] = bfin_pcrel24_reloc, /* special_function. */ "R_pcrel24_jump_x", /* name. */ FALSE, /* partial_inplace. */ - 0x00FFFFFF, /* src_mask. */ + 0, /* src_mask. */ 0x00FFFFFF, /* dst_mask. */ TRUE), /* pcrel_offset. */ @@ -889,7 +885,7 @@ static reloc_howto_type bfin_howto_table [] = bfin_pcrel24_reloc, /* special_function. */ "R_pcrel24", /* name. */ FALSE, /* partial_inplace. */ - 0x00FFFFFF, /* src_mask. */ + 0, /* src_mask. */ 0x00FFFFFF, /* dst_mask. */ TRUE), /* pcrel_offset. */ @@ -931,7 +927,7 @@ static reloc_howto_type bfin_howto_table [] = bfin_pcrel24_reloc, /* special_function. */ "R_pcrel24_jump_l", /* name. */ FALSE, /* partial_inplace. */ - 0x00FFFFFF, /* src_mask. */ + 0, /* src_mask. */ 0x00FFFFFF, /* dst_mask. */ TRUE), /* pcrel_offset. */ @@ -945,7 +941,7 @@ static reloc_howto_type bfin_howto_table [] = bfin_pcrel24_reloc, /* special_function. */ "R_pcrel24_call_x", /* name. */ FALSE, /* partial_inplace. */ - 0x00FFFFFF, /* src_mask. */ + 0, /* src_mask. */ 0x00FFFFFF, /* dst_mask. */ TRUE), /* pcrel_offset. */ @@ -973,7 +969,7 @@ static reloc_howto_type bfin_howto_table [] = bfin_bfd_reloc, /* special_function. */ "R_byte_data", /* name. */ FALSE, /* partial_inplace. */ - 0xFF, /* src_mask. */ + 0, /* src_mask. */ 0xFF, /* dst_mask. */ TRUE), /* pcrel_offset. */ @@ -987,7 +983,7 @@ static reloc_howto_type bfin_howto_table [] = bfin_bfd_reloc, /* special_function. */ "R_byte2_data", /* name. */ FALSE, /* partial_inplace. */ - 0xFFFF, /* src_mask. */ + 0, /* src_mask. */ 0xFFFF, /* dst_mask. */ TRUE), /* pcrel_offset. */ @@ -1001,7 +997,7 @@ static reloc_howto_type bfin_howto_table [] = bfin_byte4_reloc, /* special_function. */ "R_byte4_data", /* name. */ FALSE, /* partial_inplace. */ - 0xFFFFFFFF, /* src_mask. */ + 0, /* src_mask. */ 0xFFFFFFFF, /* dst_mask. */ TRUE), /* pcrel_offset. */ @@ -1015,7 +1011,7 @@ static reloc_howto_type bfin_howto_table [] = bfin_bfd_reloc, /* special_function. */ "R_pcrel11", /* name. */ FALSE, /* partial_inplace. */ - 0x000003FF, /* src_mask. */ + 0, /* src_mask. */ 0x000003FF, /* dst_mask. */ FALSE), /* pcrel_offset. */ }; @@ -1660,6 +1656,7 @@ elf32_bfin_reloc_type_class (const Elf_Internal_Rela * rela) return reloc_class_normal; } } + static bfd_boolean bfin_relocate_section (bfd * output_bfd, struct bfd_link_info *info, @@ -1678,7 +1675,6 @@ bfin_relocate_section (bfd * output_bfd, asection *sreloc; Elf_Internal_Rela *rel; Elf_Internal_Rela *relend; - char *error_msg = NULL; int i = 0; if (info->relocatable) @@ -1705,6 +1701,7 @@ bfin_relocate_section (bfd * output_bfd, bfd_vma relocation = 0; bfd_boolean unresolved_reloc; bfd_reloc_status_type r; + bfd_vma address; r_type = ELF32_R_TYPE (rel->r_info); if (r_type < 0 || r_type >= 243) @@ -1735,10 +1732,6 @@ bfin_relocate_section (bfd * output_bfd, sym = local_syms + r_symndx; sec = local_sections[r_symndx]; relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); - /* Call to bfd_elf_rela_local_sym would have CHANGED the sec - as well as updated relocation. The value returned is - w.r.t the original section. */ - sec = local_sections[r_symndx]; } else { @@ -1762,6 +1755,45 @@ bfin_relocate_section (bfd * output_bfd, } } + address = rel->r_offset; + /* First, get stack relocs out of the way. */ + switch (r_type) + { + case R_push: + reloc_stack_push (relocation + rel->r_addend); + r = bfd_reloc_ok; + goto done_reloc; + case R_const: + reloc_stack_push (rel->r_addend); + r = bfd_reloc_ok; + goto done_reloc; + case R_add: + case R_sub: + case R_mult: + case R_div: + case R_mod: + case R_lshift: + case R_rshift: + case R_neg: + case R_and: + case R_or: + case R_xor: + case R_land: + case R_lor: + case R_comp: + case R_page: + case R_hwpage: + reloc_stack_operate (r_type); + r = bfd_reloc_ok; + goto done_reloc; + + default: + if (!is_reloc_stack_empty()) + relocation = reloc_stack_pop (); + break; + } + + /* Then, process normally. */ switch (r_type) { case R_BFIN_GNU_VTINHERIT: @@ -1773,7 +1805,7 @@ bfin_relocate_section (bfd * output_bfd, in the global offset table. */ if (h != NULL && strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) - break; + goto do_default; /* Fall through. */ /* Relocation is the offset of the entry for this symbol in the global offset table. */ @@ -1793,13 +1825,14 @@ bfin_relocate_section (bfd * output_bfd, off = h->got.offset; BFD_ASSERT (off != (bfd_vma) - 1); - dyn = elf_hash_table (info)->dynamic_sections_created; + if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h) || (info->shared && (info->symbolic || h->dynindx == -1 - || h->forced_local) && h->def_regular)) + || h->forced_local) + && h->def_regular)) { /* This is actually a static link, or it is a -Bsymbolic link and the symbol is defined @@ -1827,10 +1860,9 @@ bfin_relocate_section (bfd * output_bfd, } else { - BFD_ASSERT (local_got_offsets != NULL - && local_got_offsets[r_symndx] != (bfd_vma) - 1); - + BFD_ASSERT (local_got_offsets != NULL); off = local_got_offsets[r_symndx]; + BFD_ASSERT (off != (bfd_vma) - 1); /* The offset must always be a multiple of 4. We use the least significant bit to record whether we have @@ -1839,7 +1871,6 @@ bfin_relocate_section (bfd * output_bfd, off &= ~1; else { - bfd_put_32 (output_bfd, relocation, sgot->contents + off); if (info->shared) @@ -1871,71 +1902,52 @@ bfin_relocate_section (bfd * output_bfd, /* bfin : preg = [preg + 17bitdiv4offset] relocation is div by 4. */ relocation /= 4; } + goto do_default; + + case R_pcrel24: + case R_pcrel24_jump_l: + { + bfd_vma x; + + relocation += rel->r_addend; + + /* Perform usual pc-relative correction. */ + relocation -= input_section->output_section->vma + input_section->output_offset; + relocation -= address; + + /* We are getting reloc_entry->address 2 byte off from + the start of instruction. Assuming absolute postion + of the reloc data. But, following code had been written assuming + reloc address is starting at begining of instruction. + To compensate that I have increased the value of + relocation by 1 (effectively 2) and used the addr -2 instead of addr. */ + + relocation += 2; + address -= 2; + + relocation >>= 1; + + x = bfd_get_16 (input_bfd, contents + address); + x = (x & 0xff00) | ((relocation >> 16) & 0xff); + bfd_put_16 (input_bfd, x, contents + address); + + x = bfd_get_16 (input_bfd, contents + address + 2); + x = relocation & 0xFFFF; + bfd_put_16 (input_bfd, x, contents + address + 2); + r = bfd_reloc_ok; + } break; default: - if (howto->special_function) - { - bfd_reloc_status_type cont; - arelent reloc_ent; - asymbol symbol; - asymbol *symbol1; - symbol.flags = 0; - symbol.section = bfd_und_section_ptr; - symbol.value = 0; - - if (h != NULL) - { - if (unresolved_reloc) - { - break; - } - if (h->root.type != bfd_link_hash_undefweak - && h->root.type != bfd_link_hash_undefined) - { - symbol.the_bfd = input_bfd; - symbol.section = h->root.u.def.section; - symbol.name = h->root.root.string; - symbol.value = h->root.u.def.value; - } - if (h->root.type == bfd_link_hash_defweak - || h->root.type == bfd_link_hash_undefweak) - { - symbol.name = h->root.root.string; - symbol.flags |= BSF_WEAK; - } - } - else - { - symbol = *sec->symbol; - } - reloc_ent.address = rel->r_offset; - reloc_ent.howto = howto; - reloc_ent.addend = rel->r_addend; - symbol1 = &symbol; - reloc_ent.sym_ptr_ptr = &symbol1; - - cont = - howto->special_function (input_bfd, &reloc_ent, &symbol, - contents, input_section, - info-> - relocatable ? output_bfd : NULL, - &error_msg); - if (cont == bfd_reloc_ok) - { - continue; - } - } - else - { - fprintf (stderr, "%s no special func r_type is %d\n", - input_bfd->filename, r_type); - bfd_set_error (bfd_error_bad_value); - return FALSE; - } + do_default: + r = _bfd_final_link_relocate (howto, input_bfd, input_section, + contents, address, + relocation, rel->r_addend); + break; } + done_reloc: /* Dynamic relocs are not propagated for SEC_DEBUGGING sections because such sections are not SEC_ALLOC and thus ld.so will not process them. */ @@ -1949,10 +1961,6 @@ bfin_relocate_section (bfd * output_bfd, return FALSE; } - r = _bfd_final_link_relocate (howto, input_bfd, input_section, - contents, rel->r_offset, - relocation, rel->r_addend); - if (r != bfd_reloc_ok) { const char *name; @@ -2756,7 +2764,7 @@ bfd_bfin_elf32_create_embedded_relocs ( bfd_put_32 (abfd, irel->r_offset + datasec->output_offset, p); memset (p + 4, 0, 8); if (targetsec != NULL) - strncpy (p + 4, targetsec->output_section->name, 8); + strncpy ((char *) p + 4, targetsec->output_section->name, 8); } if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf) diff --git a/bfd/elf32-cris.c b/bfd/elf32-cris.c index 4580beabd90..06865dcc2e2 100644 --- a/bfd/elf32-cris.c +++ b/bfd/elf32-cris.c @@ -156,7 +156,12 @@ static reloc_howto_type cris_elf_howto_table [] = 32, /* bitsize */ FALSE, /* pc_relative */ 0, /* bitpos */ - complain_overflow_bitfield, /* complain_on_overflow */ + /* We don't want overflow complaints for 64-bit vma builds + for e.g. sym+0x40000000 (or actually sym-0xc0000000 in + 32-bit ELF) where sym=0xc0001234. + Don't do this for the PIC relocs, as we don't expect to + see them with large offsets. */ + complain_overflow_dont, /* complain_on_overflow */ bfd_elf_generic_reloc, /* special_function */ "R_CRIS_32", /* name */ FALSE, /* partial_inplace */ diff --git a/bfd/elf32-hppa.c b/bfd/elf32-hppa.c index 942b376cf9f..5d34558c361 100644 --- a/bfd/elf32-hppa.c +++ b/bfd/elf32-hppa.c @@ -1004,7 +1004,7 @@ elf32_hppa_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) /* Copy the extra info we tack onto an elf_link_hash_entry. */ static void -elf32_hppa_copy_indirect_symbol (const struct elf_backend_data *bed, +elf32_hppa_copy_indirect_symbol (struct bfd_link_info *info, struct elf_link_hash_entry *eh_dir, struct elf_link_hash_entry *eh_ind) { @@ -1020,16 +1020,15 @@ elf32_hppa_copy_indirect_symbol (const struct elf_backend_data *bed, struct elf32_hppa_dyn_reloc_entry **hdh_pp; struct elf32_hppa_dyn_reloc_entry *hdh_p; - if (eh_ind->root.type == bfd_link_hash_indirect) - abort (); - - /* Add reloc counts against the weak sym to the strong sym + /* Add reloc counts against the indirect sym to the direct sym list. Merge any entries against the same section. */ for (hdh_pp = &hh_ind->dyn_relocs; (hdh_p = *hdh_pp) != NULL; ) { struct elf32_hppa_dyn_reloc_entry *hdh_q; - for (hdh_q = hh_dir->dyn_relocs; hdh_q != NULL; hdh_q = hdh_q->hdh_next) + for (hdh_q = hh_dir->dyn_relocs; + hdh_q != NULL; + hdh_q = hdh_q->hdh_next) if (hdh_q->sec == hdh_p->sec) { #if RELATIVE_DYNRELOCS @@ -1062,7 +1061,7 @@ elf32_hppa_copy_indirect_symbol (const struct elf_backend_data *bed, eh_dir->needs_plt |= eh_ind->needs_plt; } else - _bfd_elf_link_hash_copy_indirect (bed, eh_dir, eh_ind); + _bfd_elf_link_hash_copy_indirect (info, eh_dir, eh_ind); } /* Look through the relocs for a section during the first phase, and diff --git a/bfd/elf32-i370.c b/bfd/elf32-i370.c index c9c44337805..d9e6fbf5280 100644 --- a/bfd/elf32-i370.c +++ b/bfd/elf32-i370.c @@ -379,7 +379,7 @@ i370_elf_fake_sections (bfd *abfd ATTRIBUTE_UNUSED, Elf_Internal_Shdr *shdr, asection *asect) { - if ((asect->flags & SEC_EXCLUDE) != 0) + if ((asect->flags & (SEC_GROUP | SEC_EXCLUDE)) == SEC_EXCLUDE) shdr->sh_flags |= SHF_EXCLUDE; if ((asect->flags & SEC_SORT_ENTRIES) != 0) diff --git a/bfd/elf32-i386.c b/bfd/elf32-i386.c index acb9f1936ee..061a9cb32d8 100644 --- a/bfd/elf32-i386.c +++ b/bfd/elf32-i386.c @@ -772,7 +772,7 @@ elf_i386_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info) /* Copy the extra info we tack onto an elf_link_hash_entry. */ static void -elf_i386_copy_indirect_symbol (const struct elf_backend_data *bed, +elf_i386_copy_indirect_symbol (struct bfd_link_info *info, struct elf_link_hash_entry *dir, struct elf_link_hash_entry *ind) { @@ -788,10 +788,7 @@ elf_i386_copy_indirect_symbol (const struct elf_backend_data *bed, struct elf_i386_dyn_relocs **pp; struct elf_i386_dyn_relocs *p; - if (ind->root.type == bfd_link_hash_indirect) - abort (); - - /* Add reloc counts against the weak sym to the strong sym + /* Add reloc counts against the indirect sym to the direct sym list. Merge any entries against the same section. */ for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) { @@ -836,7 +833,7 @@ elf_i386_copy_indirect_symbol (const struct elf_backend_data *bed, dir->pointer_equality_needed |= ind->pointer_equality_needed; } else - _bfd_elf_link_hash_copy_indirect (bed, dir, ind); + _bfd_elf_link_hash_copy_indirect (info, dir, ind); } static int diff --git a/bfd/elf32-m32r.c b/bfd/elf32-m32r.c index c26bebf73c4..82ed13c881d 100644 --- a/bfd/elf32-m32r.c +++ b/bfd/elf32-m32r.c @@ -1755,7 +1755,7 @@ m32r_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) /* Copy the extra info we tack onto an elf_link_hash_entry. */ static void -m32r_elf_copy_indirect_symbol (const struct elf_backend_data *bed, +m32r_elf_copy_indirect_symbol (struct bfd_link_info *info, struct elf_link_hash_entry *dir, struct elf_link_hash_entry *ind) { @@ -1772,10 +1772,7 @@ m32r_elf_copy_indirect_symbol (const struct elf_backend_data *bed, struct elf_m32r_dyn_relocs **pp; struct elf_m32r_dyn_relocs *p; - if (ind->root.type == bfd_link_hash_indirect) - abort (); - - /* Add reloc counts against the weak sym to the strong sym + /* Add reloc counts against the indirect sym to the direct sym list. Merge any entries against the same section. */ for (pp = &eind->dyn_relocs; (p = *pp) != NULL;) { @@ -1799,7 +1796,7 @@ m32r_elf_copy_indirect_symbol (const struct elf_backend_data *bed, eind->dyn_relocs = NULL; } - _bfd_elf_link_hash_copy_indirect (bed, dir, ind); + _bfd_elf_link_hash_copy_indirect (info, dir, ind); } diff --git a/bfd/elf32-m68k.c b/bfd/elf32-m68k.c index 589dccfb35d..fec2bbb460a 100644 --- a/bfd/elf32-m68k.c +++ b/bfd/elf32-m68k.c @@ -1871,7 +1871,7 @@ elf_m68k_finish_dynamic_symbol (output_bfd, info, h, sym) + got_offset - (splt->output_section->vma + h->plt.offset - + CFV4E_FLAG (output_bfd) ? 8 : 2), + + (CFV4E_FLAG (output_bfd) ? 8 : 2)), splt->contents + h->plt.offset + plt_off1); bfd_put_32 (output_bfd, plt_index * sizeof (Elf32_External_Rela), @@ -1884,7 +1884,7 @@ elf_m68k_finish_dynamic_symbol (output_bfd, info, h, sym) (splt->output_section->vma + splt->output_offset + h->plt.offset - + CFV4E_FLAG (output_bfd) ? 12 : 8), + + (CFV4E_FLAG (output_bfd) ? 12 : 8)), sgot->contents + got_offset); /* Fill in the entry in the .rela.plt section. */ diff --git a/bfd/elf32-ppc.c b/bfd/elf32-ppc.c index 2134af2c761..70d03a3f996 100644 --- a/bfd/elf32-ppc.c +++ b/bfd/elf32-ppc.c @@ -1856,7 +1856,7 @@ ppc_elf_fake_sections (bfd *abfd ATTRIBUTE_UNUSED, Elf_Internal_Shdr *shdr, asection *asect) { - if ((asect->flags & SEC_EXCLUDE) != 0) + if ((asect->flags & (SEC_GROUP | SEC_EXCLUDE)) == SEC_EXCLUDE) shdr->sh_flags |= SHF_EXCLUDE; if ((asect->flags & SEC_SORT_ENTRIES) != 0) @@ -2565,12 +2565,11 @@ ppc_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) /* Copy the extra info we tack onto an elf_link_hash_entry. */ static void -ppc_elf_copy_indirect_symbol (const struct elf_backend_data *bed ATTRIBUTE_UNUSED, +ppc_elf_copy_indirect_symbol (struct bfd_link_info *info, struct elf_link_hash_entry *dir, struct elf_link_hash_entry *ind) { struct ppc_elf_link_hash_entry *edir, *eind; - bfd_signed_vma tmp; edir = (struct ppc_elf_link_hash_entry *) dir; eind = (struct ppc_elf_link_hash_entry *) ind; @@ -2582,10 +2581,7 @@ ppc_elf_copy_indirect_symbol (const struct elf_backend_data *bed ATTRIBUTE_UNUSE struct ppc_elf_dyn_relocs **pp; struct ppc_elf_dyn_relocs *p; - if (ind->root.type == bfd_link_hash_indirect) - abort (); - - /* Add reloc counts against the weak sym to the strong sym + /* Add reloc counts against the indirect sym to the direct sym list. Merge any entries against the same section. */ for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) { @@ -2631,14 +2627,8 @@ ppc_elf_copy_indirect_symbol (const struct elf_backend_data *bed ATTRIBUTE_UNUSE /* Copy over the GOT refcount entries that we may have already seen to the symbol which just became indirect. */ - tmp = edir->elf.got.refcount; - if (tmp < 1) - { - edir->elf.got.refcount = eind->elf.got.refcount; - eind->elf.got.refcount = tmp; - } - else - BFD_ASSERT (eind->elf.got.refcount < 1); + edir->elf.got.refcount += eind->elf.got.refcount; + eind->elf.got.refcount = 0; /* And plt entries. */ if (eind->elf.plt.plist != NULL) @@ -2669,15 +2659,16 @@ ppc_elf_copy_indirect_symbol (const struct elf_backend_data *bed ATTRIBUTE_UNUSE eind->elf.plt.plist = NULL; } - if (edir->elf.dynindx == -1) + if (eind->elf.dynindx != -1) { + if (edir->elf.dynindx != -1) + _bfd_elf_strtab_delref (elf_hash_table (info)->dynstr, + edir->elf.dynstr_index); edir->elf.dynindx = eind->elf.dynindx; edir->elf.dynstr_index = eind->elf.dynstr_index; eind->elf.dynindx = -1; eind->elf.dynstr_index = 0; } - else - BFD_ASSERT (eind->elf.dynindx == -1); } /* Return 1 if target is one of ours. */ diff --git a/bfd/elf32-s390.c b/bfd/elf32-s390.c index 55090c6a0c0..14a3191b596 100644 --- a/bfd/elf32-s390.c +++ b/bfd/elf32-s390.c @@ -41,7 +41,7 @@ static bfd_boolean create_got_section static bfd_boolean elf_s390_create_dynamic_sections PARAMS((bfd *, struct bfd_link_info *)); static void elf_s390_copy_indirect_symbol - PARAMS ((const struct elf_backend_data *, struct elf_link_hash_entry *, + PARAMS ((struct bfd_link_info *, struct elf_link_hash_entry *, struct elf_link_hash_entry *)); static bfd_boolean elf_s390_check_relocs PARAMS ((bfd *, struct bfd_link_info *, asection *, @@ -855,8 +855,8 @@ elf_s390_create_dynamic_sections (dynobj, info) /* Copy the extra info we tack onto an elf_link_hash_entry. */ static void -elf_s390_copy_indirect_symbol (bed, dir, ind) - const struct elf_backend_data *bed; +elf_s390_copy_indirect_symbol (info, dir, ind) + struct bfd_link_info *info; struct elf_link_hash_entry *dir, *ind; { struct elf_s390_link_hash_entry *edir, *eind; @@ -871,10 +871,7 @@ elf_s390_copy_indirect_symbol (bed, dir, ind) struct elf_s390_dyn_relocs **pp; struct elf_s390_dyn_relocs *p; - if (ind->root.type == bfd_link_hash_indirect) - abort (); - - /* Add reloc counts against the weak sym to the strong sym + /* Add reloc counts against the indirect sym to the direct sym list. Merge any entries against the same section. */ for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) { @@ -918,7 +915,7 @@ elf_s390_copy_indirect_symbol (bed, dir, ind) dir->needs_plt |= ind->needs_plt; } else - _bfd_elf_link_hash_copy_indirect (bed, dir, ind); + _bfd_elf_link_hash_copy_indirect (info, dir, ind); } static int diff --git a/bfd/elf32-sh.c b/bfd/elf32-sh.c index abbee05c51c..4d1e280881f 100644 --- a/bfd/elf32-sh.c +++ b/bfd/elf32-sh.c @@ -6063,14 +6063,11 @@ sh_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, /* Copy the extra info we tack onto an elf_link_hash_entry. */ static void -sh_elf_copy_indirect_symbol (const struct elf_backend_data *bed, +sh_elf_copy_indirect_symbol (struct bfd_link_info *info, struct elf_link_hash_entry *dir, struct elf_link_hash_entry *ind) { struct elf_sh_link_hash_entry *edir, *eind; -#ifdef INCLUDE_SHMEDIA - bfd_signed_vma tmp; -#endif edir = (struct elf_sh_link_hash_entry *) dir; eind = (struct elf_sh_link_hash_entry *) ind; @@ -6082,9 +6079,7 @@ sh_elf_copy_indirect_symbol (const struct elf_backend_data *bed, struct elf_sh_dyn_relocs **pp; struct elf_sh_dyn_relocs *p; - BFD_ASSERT (ind->root.type != bfd_link_hash_indirect); - - /* Add reloc counts against the weak sym to the strong sym + /* Add reloc counts against the indirect sym to the direct sym list. Merge any entries against the same section. */ for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) { @@ -6110,14 +6105,8 @@ sh_elf_copy_indirect_symbol (const struct elf_backend_data *bed, edir->gotplt_refcount = eind->gotplt_refcount; eind->gotplt_refcount = 0; #ifdef INCLUDE_SHMEDIA - tmp = edir->datalabel_got.refcount; - if (tmp < 1) - { - edir->datalabel_got.refcount = eind->datalabel_got.refcount; - eind->datalabel_got.refcount = tmp; - } - else - BFD_ASSERT (eind->datalabel_got.refcount < 1); + edir->datalabel_got.refcount += eind->datalabel_got.refcount; + eind->datalabel_got.refcount = 0; #endif if (ind->root.type == bfd_link_hash_indirect @@ -6139,7 +6128,7 @@ sh_elf_copy_indirect_symbol (const struct elf_backend_data *bed, dir->needs_plt |= ind->needs_plt; } else - _bfd_elf_link_hash_copy_indirect (bed, dir, ind); + _bfd_elf_link_hash_copy_indirect (info, dir, ind); } static int diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c index 9bc2fcfbcf9..d15c77230d7 100644 --- a/bfd/elf64-ppc.c +++ b/bfd/elf64-ppc.c @@ -95,6 +95,7 @@ static bfd_vma opd_entry_value #define elf_backend_hide_symbol ppc64_elf_hide_symbol #define elf_backend_always_size_sections ppc64_elf_func_desc_adjust #define elf_backend_size_dynamic_sections ppc64_elf_size_dynamic_sections +#define elf_backend_action_discarded ppc64_elf_action_discarded #define elf_backend_relocate_section ppc64_elf_relocate_section #define elf_backend_finish_dynamic_symbol ppc64_elf_finish_dynamic_symbol #define elf_backend_reloc_type_class ppc64_elf_reloc_type_class @@ -3843,10 +3844,9 @@ move_plt_plist (struct ppc_link_hash_entry *from, /* Copy the extra info we tack onto an elf_link_hash_entry. */ static void -ppc64_elf_copy_indirect_symbol - (const struct elf_backend_data *bed ATTRIBUTE_UNUSED, - struct elf_link_hash_entry *dir, - struct elf_link_hash_entry *ind) +ppc64_elf_copy_indirect_symbol (struct bfd_link_info *info, + struct elf_link_hash_entry *dir, + struct elf_link_hash_entry *ind) { struct ppc_link_hash_entry *edir, *eind; @@ -3861,10 +3861,7 @@ ppc64_elf_copy_indirect_symbol struct ppc_dyn_relocs **pp; struct ppc_dyn_relocs *p; - if (eind->elf.root.type == bfd_link_hash_indirect) - abort (); - - /* Add reloc counts against the weak sym to the strong sym + /* Add reloc counts against the indirect sym to the direct sym list. Merge any entries against the same section. */ for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) { @@ -3944,15 +3941,16 @@ ppc64_elf_copy_indirect_symbol /* And plt entries. */ move_plt_plist (eind, edir); - if (edir->elf.dynindx == -1) + if (eind->elf.dynindx != -1) { + if (edir->elf.dynindx != -1) + _bfd_elf_strtab_delref (elf_hash_table (info)->dynstr, + edir->elf.dynstr_index); edir->elf.dynindx = eind->elf.dynindx; edir->elf.dynstr_index = eind->elf.dynstr_index; eind->elf.dynindx = -1; eind->elf.dynstr_index = 0; } - else - BFD_ASSERT (eind->elf.dynindx == -1); } /* Find the function descriptor hash entry from the given function code @@ -6120,15 +6118,24 @@ dec_dynrel_count (bfd_vma r_info, if (h != NULL) pp = &((struct ppc_link_hash_entry *) h)->dyn_relocs; - else if (sym_sec != NULL) - { - void *vpp = &elf_section_data (sym_sec)->local_dynrel; - pp = (struct ppc_dyn_relocs **) vpp; - } else { - void *vpp = &elf_section_data (sec)->local_dynrel; - pp = (struct ppc_dyn_relocs **) vpp; + if (sym_sec != NULL) + { + void *vpp = &elf_section_data (sym_sec)->local_dynrel; + pp = (struct ppc_dyn_relocs **) vpp; + } + else + { + void *vpp = &elf_section_data (sec)->local_dynrel; + pp = (struct ppc_dyn_relocs **) vpp; + } + + /* elf_gc_sweep may have already removed all dyn relocs associated + with local syms for a given section. Don't report a dynreloc + miscount. */ + if (*pp == NULL) + return TRUE; } while ((p = *pp) != NULL) @@ -6476,7 +6483,8 @@ ppc64_elf_edit_opd (bfd *obfd, struct bfd_link_info *info, if (skip) { - if (!info->relocatable + if (!NO_OPD_RELOCS + && !info->relocatable && !dec_dynrel_count (rel->r_info, sec, info, NULL, h, sym_sec)) goto error_ret; @@ -9454,6 +9462,21 @@ ppc64_elf_restore_symbols (struct bfd_link_info *info) elf_link_hash_traverse (&htab->elf, undo_symbol_twiddle, info); } +/* What to do when ld finds relocations against symbols defined in + discarded sections. */ + +static unsigned int +ppc64_elf_action_discarded (asection *sec) +{ + if (strcmp (".opd", sec->name) == 0) + return 0; + + if (strcmp (".toc", sec->name) == 0) + return 0; + + return _bfd_elf_default_action_discarded (sec); +} + /* The RELOCATE_SECTION function is called by the ELF backend linker to handle the relocations for a section. diff --git a/bfd/elf64-s390.c b/bfd/elf64-s390.c index 7808c3fd1a3..f93c6130255 100644 --- a/bfd/elf64-s390.c +++ b/bfd/elf64-s390.c @@ -41,7 +41,7 @@ static bfd_boolean create_got_section static bfd_boolean elf_s390_create_dynamic_sections PARAMS((bfd *, struct bfd_link_info *)); static void elf_s390_copy_indirect_symbol - PARAMS ((const struct elf_backend_data *, struct elf_link_hash_entry *, + PARAMS ((struct bfd_link_info *, struct elf_link_hash_entry *, struct elf_link_hash_entry *)); static bfd_boolean elf_s390_check_relocs PARAMS ((bfd *, struct bfd_link_info *, asection *, @@ -808,8 +808,8 @@ elf_s390_create_dynamic_sections (dynobj, info) /* Copy the extra info we tack onto an elf_link_hash_entry. */ static void -elf_s390_copy_indirect_symbol (bed, dir, ind) - const struct elf_backend_data *bed; +elf_s390_copy_indirect_symbol (info, dir, ind) + struct bfd_link_info *info; struct elf_link_hash_entry *dir, *ind; { struct elf_s390_link_hash_entry *edir, *eind; @@ -824,10 +824,7 @@ elf_s390_copy_indirect_symbol (bed, dir, ind) struct elf_s390_dyn_relocs **pp; struct elf_s390_dyn_relocs *p; - if (ind->root.type == bfd_link_hash_indirect) - abort (); - - /* Add reloc counts against the weak sym to the strong sym + /* Add reloc counts against the indirect sym to the direct sym list. Merge any entries against the same section. */ for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) { @@ -871,7 +868,7 @@ elf_s390_copy_indirect_symbol (bed, dir, ind) dir->needs_plt |= ind->needs_plt; } else - _bfd_elf_link_hash_copy_indirect (bed, dir, ind); + _bfd_elf_link_hash_copy_indirect (info, dir, ind); } static int diff --git a/bfd/elf64-x86-64.c b/bfd/elf64-x86-64.c index 0520906b227..54914ba2d3d 100644 --- a/bfd/elf64-x86-64.c +++ b/bfd/elf64-x86-64.c @@ -525,7 +525,7 @@ elf64_x86_64_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info) /* Copy the extra info we tack onto an elf_link_hash_entry. */ static void -elf64_x86_64_copy_indirect_symbol (const struct elf_backend_data *bed, +elf64_x86_64_copy_indirect_symbol (struct bfd_link_info *info, struct elf_link_hash_entry *dir, struct elf_link_hash_entry *ind) { @@ -541,10 +541,7 @@ elf64_x86_64_copy_indirect_symbol (const struct elf_backend_data *bed, struct elf64_x86_64_dyn_relocs **pp; struct elf64_x86_64_dyn_relocs *p; - if (ind->root.type == bfd_link_hash_indirect) - abort (); - - /* Add reloc counts against the weak sym to the strong sym + /* Add reloc counts against the indirect sym to the direct sym list. Merge any entries against the same section. */ for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) { @@ -589,7 +586,7 @@ elf64_x86_64_copy_indirect_symbol (const struct elf_backend_data *bed, dir->pointer_equality_needed |= ind->pointer_equality_needed; } else - _bfd_elf_link_hash_copy_indirect (bed, dir, ind); + _bfd_elf_link_hash_copy_indirect (info, dir, ind); } static bfd_boolean diff --git a/bfd/elflink.c b/bfd/elflink.c index 61676d619f6..899c48db8e9 100644 --- a/bfd/elflink.c +++ b/bfd/elflink.c @@ -1283,7 +1283,7 @@ _bfd_elf_merge_symbol (bfd *abfd, flip->root.type = h->root.type; h->root.type = bfd_link_hash_indirect; h->root.u.i.link = (struct bfd_link_hash_entry *) flip; - (*bed->elf_backend_copy_indirect_symbol) (bed, flip, h); + (*bed->elf_backend_copy_indirect_symbol) (info, flip, h); flip->root.u.undef.abfd = h->root.u.undef.abfd; if (h->def_dynamic) { @@ -1437,7 +1437,7 @@ _bfd_elf_add_default_symbol (bfd *abfd, struct elf_link_hash_entry *ht; ht = (struct elf_link_hash_entry *) hi->root.u.i.link; - (*bed->elf_backend_copy_indirect_symbol) (bed, ht, hi); + (*bed->elf_backend_copy_indirect_symbol) (info, ht, hi); /* See if the new flags lead us to realize that the symbol must be dynamic. */ @@ -1506,7 +1506,7 @@ nondefault: if (hi->root.type == bfd_link_hash_indirect) { - (*bed->elf_backend_copy_indirect_symbol) (bed, h, hi); + (*bed->elf_backend_copy_indirect_symbol) (info, h, hi); /* See if the new flags lead us to realize that the symbol must be dynamic. */ @@ -2317,7 +2317,7 @@ _bfd_elf_fix_symbol_flags (struct elf_link_hash_entry *h, const struct elf_backend_data *bed; bed = get_elf_backend_data (elf_hash_table (eif->info)->dynobj); - (*bed->elf_backend_copy_indirect_symbol) (bed, weakdef, h); + (*bed->elf_backend_copy_indirect_symbol) (eif->info, weakdef, h); } } @@ -4139,7 +4139,7 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info) (*bed->elf_backend_hide_symbol) (info, hi, TRUE); hi->root.type = bfd_link_hash_indirect; hi->root.u.i.link = (struct bfd_link_hash_entry *) h; - (*bed->elf_backend_copy_indirect_symbol) (bed, h, hi); + (*bed->elf_backend_copy_indirect_symbol) (info, h, hi); sym_hash = elf_sym_hashes (abfd); if (sym_hash) for (symidx = 0; symidx < extsymcount; ++symidx) @@ -6827,8 +6827,10 @@ elf_link_input_bfd (struct elf_final_link_info *finfo, bfd *input_bfd) isec = bfd_com_section_ptr; else { - /* Who knows? */ - isec = NULL; + /* Don't attempt to output symbols with st_shnx in the + reserved range other than SHN_ABS and SHN_COMMON. */ + *ppsection = NULL; + continue; } *ppsection = isec; @@ -6859,20 +6861,12 @@ elf_link_input_bfd (struct elf_final_link_info *finfo, bfd *input_bfd) continue; /* If this symbol is defined in a section which we are - discarding, we don't need to keep it, but note that - linker_mark is only reliable for sections that have contents. - For the benefit of the MIPS ELF linker, we check SEC_EXCLUDE - as well as linker_mark. */ - if ((isym->st_shndx < SHN_LORESERVE || isym->st_shndx > SHN_HIRESERVE) + discarding, we don't need to keep it. */ + if (isym->st_shndx != SHN_UNDEF + && (isym->st_shndx < SHN_LORESERVE || isym->st_shndx > SHN_HIRESERVE) && (isec == NULL - || (! isec->linker_mark && (isec->flags & SEC_HAS_CONTENTS) != 0) - || (! finfo->info->relocatable - && (isec->flags & SEC_EXCLUDE) != 0))) - continue; - - /* If the section is not in the output BFD's section list, it is not - being output. */ - if (bfd_section_removed_from_list (output_bfd, isec->output_section)) + || bfd_section_removed_from_list (output_bfd, + isec->output_section))) continue; /* Get the name of the symbol. */ diff --git a/bfd/elfxx-ia64.c b/bfd/elfxx-ia64.c index dc2c2e15a86..5dfdaaa7406 100644 --- a/bfd/elfxx-ia64.c +++ b/bfd/elfxx-ia64.c @@ -216,7 +216,7 @@ static struct bfd_hash_entry *elfNN_ia64_new_elf_hash_entry PARAMS ((struct bfd_hash_entry *entry, struct bfd_hash_table *table, const char *string)); static void elfNN_ia64_hash_copy_indirect - PARAMS ((const struct elf_backend_data *, struct elf_link_hash_entry *, + PARAMS ((struct bfd_link_info *, struct elf_link_hash_entry *, struct elf_link_hash_entry *)); static void elfNN_ia64_hash_hide_symbol PARAMS ((struct bfd_link_info *, struct elf_link_hash_entry *, bfd_boolean)); @@ -1798,8 +1798,8 @@ elfNN_ia64_new_elf_hash_entry (entry, table, string) } static void -elfNN_ia64_hash_copy_indirect (bed, xdir, xind) - const struct elf_backend_data *bed ATTRIBUTE_UNUSED; +elfNN_ia64_hash_copy_indirect (info, xdir, xind) + struct bfd_link_info *info; struct elf_link_hash_entry *xdir, *xind; { struct elfNN_ia64_link_hash_entry *dir, *ind; @@ -1821,29 +1821,34 @@ elfNN_ia64_hash_copy_indirect (bed, xdir, xind) /* Copy over the got and plt data. This would have been done by check_relocs. */ - if (dir->info == NULL) + if (ind->info != NULL) { struct elfNN_ia64_dyn_sym_info *dyn_i; + struct elfNN_ia64_dyn_sym_info **pdyn; - dir->info = dyn_i = ind->info; + pdyn = &dir->info; + while ((dyn_i = *pdyn) != NULL) + pdyn = &dyn_i->next; + *pdyn = dyn_i = ind->info; ind->info = NULL; /* Fix up the dyn_sym_info pointers to the global symbol. */ for (; dyn_i; dyn_i = dyn_i->next) dyn_i->h = &dir->root; } - BFD_ASSERT (ind->info == NULL); /* Copy over the dynindx. */ - if (dir->root.dynindx == -1) + if (ind->root.dynindx != -1) { + if (dir->root.dynindx != -1) + _bfd_elf_strtab_delref (elf_hash_table (info)->dynstr, + dir->root.dynstr_index); dir->root.dynindx = ind->root.dynindx; dir->root.dynstr_index = ind->root.dynstr_index; ind->root.dynindx = -1; ind->root.dynstr_index = 0; } - BFD_ASSERT (ind->root.dynindx == -1); } static void diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c index 27d2dc3854b..685f1d22e3f 100644 --- a/bfd/elfxx-mips.c +++ b/bfd/elfxx-mips.c @@ -8387,13 +8387,13 @@ _bfd_mips_elf_gc_sweep_hook (bfd *abfd ATTRIBUTE_UNUSED, _bfd_elf_link_hash_copy_indirect copy the flags for us. */ void -_bfd_mips_elf_copy_indirect_symbol (const struct elf_backend_data *bed, +_bfd_mips_elf_copy_indirect_symbol (struct bfd_link_info *info, struct elf_link_hash_entry *dir, struct elf_link_hash_entry *ind) { struct mips_elf_link_hash_entry *dirmips, *indmips; - _bfd_elf_link_hash_copy_indirect (bed, dir, ind); + _bfd_elf_link_hash_copy_indirect (info, dir, ind); if (ind->root.type != bfd_link_hash_indirect) return; @@ -8408,8 +8408,6 @@ _bfd_mips_elf_copy_indirect_symbol (const struct elf_backend_data *bed, if (dirmips->tls_type == 0) dirmips->tls_type = indmips->tls_type; - else - BFD_ASSERT (indmips->tls_type == 0); } void diff --git a/bfd/elfxx-mips.h b/bfd/elfxx-mips.h index ff53b0d8c53..d419435c110 100644 --- a/bfd/elfxx-mips.h +++ b/bfd/elfxx-mips.h @@ -72,7 +72,7 @@ extern asection * _bfd_mips_elf_gc_mark_hook extern bfd_boolean _bfd_mips_elf_gc_sweep_hook (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *); extern void _bfd_mips_elf_copy_indirect_symbol - (const struct elf_backend_data *, struct elf_link_hash_entry *, + (struct bfd_link_info *, struct elf_link_hash_entry *, struct elf_link_hash_entry *); extern void _bfd_mips_elf_hide_symbol (struct bfd_link_info *, struct elf_link_hash_entry *, bfd_boolean); diff --git a/bfd/elfxx-sparc.c b/bfd/elfxx-sparc.c index eff34eadf04..e587a675d80 100644 --- a/bfd/elfxx-sparc.c +++ b/bfd/elfxx-sparc.c @@ -881,7 +881,7 @@ _bfd_sparc_elf_create_dynamic_sections (bfd *dynobj, /* Copy the extra info we tack onto an elf_link_hash_entry. */ void -_bfd_sparc_elf_copy_indirect_symbol (const struct elf_backend_data *bed, +_bfd_sparc_elf_copy_indirect_symbol (struct bfd_link_info *info, struct elf_link_hash_entry *dir, struct elf_link_hash_entry *ind) { @@ -897,10 +897,7 @@ _bfd_sparc_elf_copy_indirect_symbol (const struct elf_backend_data *bed, struct _bfd_sparc_elf_dyn_relocs **pp; struct _bfd_sparc_elf_dyn_relocs *p; - if (ind->root.type == bfd_link_hash_indirect) - abort (); - - /* Add reloc counts against the weak sym to the strong sym + /* Add reloc counts against the indirect sym to the direct sym list. Merge any entries against the same section. */ for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) { @@ -930,7 +927,7 @@ _bfd_sparc_elf_copy_indirect_symbol (const struct elf_backend_data *bed, edir->tls_type = eind->tls_type; eind->tls_type = GOT_UNKNOWN; } - _bfd_elf_link_hash_copy_indirect (bed, dir, ind); + _bfd_elf_link_hash_copy_indirect (info, dir, ind); } static int diff --git a/bfd/elfxx-sparc.h b/bfd/elfxx-sparc.h index 1bfaaa6cfcf..624aea52787 100644 --- a/bfd/elfxx-sparc.h +++ b/bfd/elfxx-sparc.h @@ -97,7 +97,7 @@ extern struct bfd_link_hash_table *_bfd_sparc_elf_link_hash_table_create extern bfd_boolean _bfd_sparc_elf_create_dynamic_sections (bfd *, struct bfd_link_info *); extern void _bfd_sparc_elf_copy_indirect_symbol - (const struct elf_backend_data *, + (struct bfd_link_info *, struct elf_link_hash_entry *, struct elf_link_hash_entry *); extern bfd_boolean _bfd_sparc_elf_check_relocs diff --git a/bfd/hppabsd-core.c b/bfd/hppabsd-core.c index 2ad27351b8a..894d244bbc3 100644 --- a/bfd/hppabsd-core.c +++ b/bfd/hppabsd-core.c @@ -1,5 +1,5 @@ /* BFD back-end for HPPA BSD core files. - Copyright 1993, 1994, 1995, 1998, 1999, 2001, 2002, 2003, 2004 + Copyright 1993, 1994, 1995, 1998, 1999, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -137,14 +137,11 @@ hppabsd_core_core_file_p (abfd) /* Sanity checks. Make sure the size of the core file matches the the size computed from information within the core itself. */ { - FILE *stream = bfd_cache_lookup (abfd); struct stat statbuf; - if (fstat (fileno (stream), &statbuf) < 0) - { - bfd_set_error (bfd_error_system_call); - return NULL; - } + if (bfd_stat (abfd, &statbuf) < 0) + return NULL; + if (NBPG * (UPAGES + u.u_dsize + u.u_ssize) > statbuf.st_size) { bfd_set_error (bfd_error_file_truncated); diff --git a/bfd/hpux-core.c b/bfd/hpux-core.c index e68a715b588..9a97531eb93 100644 --- a/bfd/hpux-core.c +++ b/bfd/hpux-core.c @@ -61,7 +61,9 @@ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. # endif #endif #include +#ifdef HPUX_CORE #include +#endif #include /* After a.out.h */ #include diff --git a/bfd/libbfd-in.h b/bfd/libbfd-in.h index 0290c84eda3..df46ae1273c 100644 --- a/bfd/libbfd-in.h +++ b/bfd/libbfd-in.h @@ -234,6 +234,9 @@ extern bfd_boolean _bfd_generic_get_section_contents_in_window #define _bfd_generic_bfd_print_private_bfd_data \ ((bfd_boolean (*) (bfd *, void *)) bfd_true) +extern bfd_boolean _bfd_generic_init_private_section_data + (bfd *, asection *, bfd *, asection *, struct bfd_link_info *); + /* Routines to use for BFD_JUMP_TABLE_CORE when there is no core file support. Use BFD_JUMP_TABLE_CORE (_bfd_nocore). */ @@ -649,11 +652,6 @@ extern void _bfd_abort extern file_ptr real_ftell (FILE *file); extern int real_fseek (FILE *file, file_ptr offset, int whence); -FILE * bfd_cache_lookup_worker - (bfd *); - -extern bfd *bfd_last_cache; - /* List of supported target vectors, and the default vector (if bfd_default_vector[0] is NULL, there is no default). */ extern const bfd_target * const *bfd_target_vector; diff --git a/bfd/libbfd.c b/bfd/libbfd.c index 3b27e08a8f3..34e32ac1112 100644 --- a/bfd/libbfd.c +++ b/bfd/libbfd.c @@ -1042,3 +1042,13 @@ _bfd_generic_match_sections_by_type (bfd *abfd ATTRIBUTE_UNUSED, { return TRUE; } + +bfd_boolean +_bfd_generic_init_private_section_data (bfd *ibfd ATTRIBUTE_UNUSED, + asection *isec ATTRIBUTE_UNUSED, + bfd *obfd ATTRIBUTE_UNUSED, + asection *osec ATTRIBUTE_UNUSED, + struct bfd_link_info *link_info ATTRIBUTE_UNUSED) +{ + return TRUE; +} diff --git a/bfd/libbfd.h b/bfd/libbfd.h index 56ad092983f..ff1fde7a108 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h @@ -239,6 +239,9 @@ extern bfd_boolean _bfd_generic_get_section_contents_in_window #define _bfd_generic_bfd_print_private_bfd_data \ ((bfd_boolean (*) (bfd *, void *)) bfd_true) +extern bfd_boolean _bfd_generic_init_private_section_data + (bfd *, asection *, bfd *, asection *, struct bfd_link_info *); + /* Routines to use for BFD_JUMP_TABLE_CORE when there is no core file support. Use BFD_JUMP_TABLE_CORE (_bfd_nocore). */ @@ -654,11 +657,6 @@ extern void _bfd_abort extern file_ptr real_ftell (FILE *file); extern int real_fseek (FILE *file, file_ptr offset, int whence); -FILE * bfd_cache_lookup_worker - (bfd *); - -extern bfd *bfd_last_cache; - /* List of supported target vectors, and the default vector (if bfd_default_vector[0] is NULL, there is no default). */ extern const bfd_target * const *bfd_target_vector; @@ -764,21 +762,12 @@ struct _bfd_window_internal { unsigned mapped : 1; /* 1 = mmap, 0 = malloc */ }; /* Extracted from cache.c. */ -#define BFD_CACHE_MAX_OPEN 10 -extern bfd *bfd_last_cache; - -#define bfd_cache_lookup(x) \ - ((x) == bfd_last_cache ? \ - (FILE *) (bfd_last_cache->iostream): \ - bfd_cache_lookup_worker (x)) bfd_boolean bfd_cache_init (bfd *abfd); bfd_boolean bfd_cache_close (bfd *abfd); FILE* bfd_open_file (bfd *abfd); -FILE *bfd_cache_lookup_worker (bfd *abfd); - /* Extracted from reloc.c. */ #ifdef _BFD_MAKE_TABLE_bfd_reloc_code_real @@ -1827,6 +1816,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_XTENSA_OP2", "BFD_RELOC_XTENSA_ASM_EXPAND", "BFD_RELOC_XTENSA_ASM_SIMPLIFY", + "BFD_RELOC_Z80_DISP8", "BFD_RELOC_Z8K_DISP7", "BFD_RELOC_Z8K_CALLR", "BFD_RELOC_Z8K_IMM4L", diff --git a/bfd/linker.c b/bfd/linker.c index 0bfdfb23706..9e6199b835a 100644 --- a/bfd/linker.c +++ b/bfd/linker.c @@ -2364,12 +2364,9 @@ _bfd_generic_link_output_symbols (bfd *output_bfd, /* If this symbol is in a section which is not being included in the output file, then we don't want to output the - symbol. .bss and similar sections won't have the linker_mark - field set. We also check if its output section has been - removed from the output file. */ - if (((sym->section->flags & SEC_HAS_CONTENTS) != 0 - && ! sym->section->linker_mark) - || bfd_section_removed_from_list (output_bfd, + symbol. */ + if (!bfd_is_abs_section (sym->section) + && bfd_section_removed_from_list (output_bfd, sym->section->output_section)) output = FALSE; diff --git a/bfd/osf-core.c b/bfd/osf-core.c index 1ad0a362f5b..35aa82df43e 100644 --- a/bfd/osf-core.c +++ b/bfd/osf-core.c @@ -26,7 +26,9 @@ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. #include "libbfd.h" #include +#ifdef OSF_CORE #include +#endif /* forward declarations */ diff --git a/bfd/po/SRC-POTFILES.in b/bfd/po/SRC-POTFILES.in index 332782d7c7d..13d0104aba8 100644 --- a/bfd/po/SRC-POTFILES.in +++ b/bfd/po/SRC-POTFILES.in @@ -63,6 +63,7 @@ cpu-alpha.c cpu-arc.c cpu-arm.c cpu-avr.c +cpu-bfin.c cpu-cr16c.c cpu-cris.c cpu-crx.c @@ -128,6 +129,7 @@ elf32-am33lin.c elf32-arc.c elf32-arm.c elf32-avr.c +elf32-bfin.c elf32.c elf32-cr16c.c elf32-cris.c diff --git a/bfd/po/bfd.pot b/bfd/po/bfd.pot index 83367cb7156..37c57290aee 100644 --- a/bfd/po/bfd.pot +++ b/bfd/po/bfd.pot @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2005-07-14 17:27-0500\n" +"POT-Creation-Date: 2005-10-25 22:24+0930\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" @@ -33,35 +33,35 @@ msgstr "" msgid "%B: Bad relocation record imported: %d" msgstr "" -#: aoutx.h:1250 aoutx.h:1584 +#: aoutx.h:1244 aoutx.h:1578 #, c-format msgid "%s: can not represent section `%s' in a.out object file format" msgstr "" -#: aoutx.h:1550 +#: aoutx.h:1544 #, c-format msgid "" "%s: can not represent section for symbol `%s' in a.out object file format" msgstr "" -#: aoutx.h:1552 +#: aoutx.h:1546 msgid "*unknown*" msgstr "" -#: aoutx.h:5287 +#: aoutx.h:5281 #, c-format msgid "%s: relocatable link from %s to %s not supported" msgstr "" -#: archive.c:1758 +#: archive.c:1760 msgid "Warning: writing archive was slow: rewriting timestamp\n" msgstr "" -#: archive.c:2017 +#: archive.c:2019 msgid "Reading archive file mod timestamp" msgstr "" -#: archive.c:2041 +#: archive.c:2043 msgid "Writing updated armap timestamp" msgstr "" @@ -145,22 +145,22 @@ msgstr "" msgid "#" msgstr "" -#: bfd.c:768 +#: bfd.c:771 #, c-format msgid "BFD %s assertion fail %s:%d" msgstr "" -#: bfd.c:784 +#: bfd.c:787 #, c-format msgid "BFD %s internal error, aborting at %s line %d in %s\n" msgstr "" -#: bfd.c:788 +#: bfd.c:791 #, c-format msgid "BFD %s internal error, aborting at %s line %d\n" msgstr "" -#: bfd.c:790 +#: bfd.c:793 msgid "Please report this bug.\n" msgstr "" @@ -183,26 +183,6 @@ msgstr "" msgid "%B: symbol `%s' has unrecognized smclas %d" msgstr "" -#: coff-a29k.c:120 -msgid "Missing IHCONST" -msgstr "" - -#: coff-a29k.c:181 -msgid "Missing IHIHALF" -msgstr "" - -#: coff-a29k.c:213 coff-or32.c:227 -msgid "Unrecognized reloc" -msgstr "" - -#: coff-a29k.c:409 -msgid "missing IHCONST reloc" -msgstr "" - -#: coff-a29k.c:499 -msgid "missing IHIHALF reloc" -msgstr "" - #: coff-alpha.c:489 msgid "" "%B: Cannot handle compressed Alpha binaries.\n" @@ -229,22 +209,22 @@ msgstr "" msgid "%B: unsupported relocation: ALPHA_R_GPRELLOW" msgstr "" -#: coff-alpha.c:1557 elf32-m32r.c:2452 elf64-alpha.c:3932 elf64-alpha.c:4058 -#: elf32-ia64.c:4085 elf64-ia64.c:4085 +#: coff-alpha.c:1557 elf32-m32r.c:2471 elf64-alpha.c:3912 elf64-alpha.c:4038 +#: elf32-ia64.c:4108 elf64-ia64.c:4108 msgid "%B: unknown relocation type %d" msgstr "" -#: coff-arm.c:990 elf32-arm.c:1916 +#: coff-arm.c:990 elf32-arm.c:1926 #, c-format msgid "%B: unable to find THUMB glue '%s' for `%s'" msgstr "" -#: coff-arm.c:1019 elf32-arm.c:1950 +#: coff-arm.c:1019 elf32-arm.c:1960 #, c-format msgid "%B: unable to find ARM glue '%s' for `%s'" msgstr "" -#: coff-arm.c:1319 elf32-arm.c:2673 +#: coff-arm.c:1319 elf32-arm.c:2683 #, c-format msgid "" "%B(%s): warning: interworking not enabled.\n" @@ -259,7 +239,7 @@ msgid "" " consider relinking with --support-old-code enabled" msgstr "" -#: coff-arm.c:1702 cofflink.c:3013 coff-tic80.c:695 +#: coff-arm.c:1702 cofflink.c:3015 coff-tic80.c:695 msgid "%B: bad reloc address 0x%lx in section `%A'" msgstr "" @@ -272,14 +252,14 @@ msgstr "" msgid "ERROR: %B is compiled for APCS-%d, whereas %B is compiled for APCS-%d" msgstr "" -#: coff-arm.c:2174 elf32-arm.c:4464 +#: coff-arm.c:2174 elf32-arm.c:5093 #, c-format msgid "" "ERROR: %B passes floats in float registers, whereas %B passes them in " "integer registers" msgstr "" -#: coff-arm.c:2177 elf32-arm.c:4468 +#: coff-arm.c:2177 elf32-arm.c:5097 #, c-format msgid "" "ERROR: %B passes floats in integer registers, whereas %B passes them in " @@ -300,12 +280,12 @@ msgid "" "position independent" msgstr "" -#: coff-arm.c:2222 elf32-arm.c:4533 +#: coff-arm.c:2222 elf32-arm.c:5162 #, c-format msgid "Warning: %B supports interworking, whereas %B does not" msgstr "" -#: coff-arm.c:2225 elf32-arm.c:4539 +#: coff-arm.c:2225 elf32-arm.c:5168 #, c-format msgid "Warning: %B does not support interworking, whereas %B does" msgstr "" @@ -315,7 +295,7 @@ msgstr "" msgid "private flags = %x:" msgstr "" -#: coff-arm.c:2257 elf32-arm.c:4590 +#: coff-arm.c:2257 elf32-arm.c:5219 #, c-format msgid " [floats passed in float registers]" msgstr "" @@ -325,7 +305,7 @@ msgstr "" msgid " [floats passed in integer registers]" msgstr "" -#: coff-arm.c:2262 elf32-arm.c:4593 +#: coff-arm.c:2262 elf32-arm.c:5222 #, c-format msgid " [position independent]" msgstr "" @@ -350,14 +330,14 @@ msgstr "" msgid " [interworking not supported]" msgstr "" -#: coff-arm.c:2318 elf32-arm.c:4271 +#: coff-arm.c:2318 elf32-arm.c:4571 #, c-format msgid "" "Warning: Not setting interworking flag of %B since it has already been " "specified as non-interworking" msgstr "" -#: coff-arm.c:2322 elf32-arm.c:4275 +#: coff-arm.c:2322 elf32-arm.c:4575 #, c-format msgid "Warning: Clearing the interworking flag of %B due to outside request" msgstr "" @@ -378,36 +358,36 @@ msgstr "" msgid "%B (%s): Section flag %s (0x%x) ignored" msgstr "" -#: coffcode.h:2210 +#: coffcode.h:2204 #, c-format msgid "Unrecognized TI COFF target id '0x%x'" msgstr "" -#: coffcode.h:4238 +#: coffcode.h:4211 msgid "%B: warning: line number table read failed" msgstr "" -#: coffcode.h:4270 +#: coffcode.h:4243 msgid "%B: warning: illegal symbol index %ld in line numbers" msgstr "" -#: coffcode.h:4284 +#: coffcode.h:4257 msgid "%B: warning: duplicate line number information for `%s'" msgstr "" -#: coffcode.h:4629 +#: coffcode.h:4597 msgid "%B: Unrecognized storage class %d for %s symbol `%s'" msgstr "" -#: coffcode.h:4755 +#: coffcode.h:4723 msgid "warning: %B: local symbol `%s' has no section" msgstr "" -#: coffcode.h:4859 coff-i860.c:586 coff-tic54x.c:376 +#: coffcode.h:4827 coff-i860.c:586 coff-tic54x.c:376 msgid "%B: warning: illegal symbol index %ld in relocs" msgstr "" -#: coffcode.h:4897 +#: coffcode.h:4865 msgid "%B: illegal relocation type %d at address 0x%lx" msgstr "" @@ -429,7 +409,7 @@ msgstr "" msgid "uncertain calling convention for non-COFF symbol" msgstr "" -#: cofflink.c:507 elflink.c:3967 +#: cofflink.c:507 elflink.c:3948 msgid "Warning: type of symbol `%s' changed from %d to %d in %B" msgstr "" @@ -447,7 +427,7 @@ msgstr "" msgid "%s: warning: %s: line number overflow: 0x%lx > 0xffff" msgstr "" -#: coff-m68k.c:482 elf32-m68k.c:2183 +#: coff-m68k.c:482 elf32-bfin.c:2722 elf32-m68k.c:2193 msgid "unsupported reloc type" msgstr "" @@ -475,6 +455,10 @@ msgstr "" msgid "GP relative relocation when _gp not defined" msgstr "" +#: coff-or32.c:227 +msgid "Unrecognized reloc" +msgstr "" + #: coff-rs6000.c:2785 #, c-format msgid "%s: unsupported relocation type 0x%02x" @@ -536,49 +520,49 @@ msgstr "" msgid "Dwarf Error: Invalid or unhandled FORM value: %u." msgstr "" -#: dwarf2.c:857 +#: dwarf2.c:856 msgid "Dwarf Error: mangled line number section (bad file number)." msgstr "" -#: dwarf2.c:948 +#: dwarf2.c:947 msgid "Dwarf Error: Can't find .debug_line section." msgstr "" -#: dwarf2.c:965 +#: dwarf2.c:964 #, c-format msgid "" "Dwarf Error: Line offset (%lu) greater than or equal to .debug_line size (%" "lu)." msgstr "" -#: dwarf2.c:1193 +#: dwarf2.c:1192 msgid "Dwarf Error: mangled line number section." msgstr "" -#: dwarf2.c:1383 +#: dwarf2.c:1382 msgid "Dwarf Error: Can't find .debug_ranges section." msgstr "" -#: dwarf2.c:1565 dwarf2.c:1666 dwarf2.c:1896 +#: dwarf2.c:1544 dwarf2.c:1660 dwarf2.c:1930 #, c-format msgid "Dwarf Error: Could not find abbrev number %u." msgstr "" -#: dwarf2.c:1857 +#: dwarf2.c:1891 #, c-format msgid "" "Dwarf Error: found dwarf version '%u', this reader only handles version 2 " "information." msgstr "" -#: dwarf2.c:1864 +#: dwarf2.c:1898 #, c-format msgid "" "Dwarf Error: found address size '%u', this reader can not handle sizes " "greater than '%u'." msgstr "" -#: dwarf2.c:1887 +#: dwarf2.c:1921 #, c-format msgid "Dwarf Error: Bad abbrev number: %u." msgstr "" @@ -644,248 +628,317 @@ msgid "" " Type: %s" msgstr "" -#: elf32-arm.c:2305 +#: elf32-arm.c:2315 msgid "%B: BE8 images only valid in big-endian mode." msgstr "" -#: elf32-arm.c:2461 +#: elf32-arm.c:2471 #, c-format msgid "Invalid TARGET2 relocation type '%s'." msgstr "" -#: elf32-arm.c:2568 +#: elf32-arm.c:2578 msgid "" "%B(%s): warning: interworking not enabled.\n" " first occurrence: %B: thumb call to arm" msgstr "" -#: elf32-arm.c:3034 +#: elf32-arm.c:3044 msgid "\\%B: Warning: Arm BLX instruction targets Arm function '%s'." msgstr "" -#: elf32-arm.c:3217 +#: elf32-arm.c:3227 msgid "%B: Warning: Thumb BLX instruction targets thumb function '%s'." msgstr "" -#: elf32-arm.c:3879 +#: elf32-arm.c:3889 msgid "%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object" msgstr "" -#: elf32-arm.c:4092 elf32-sh.c:4611 elf64-sh64.c:1537 +#: elf32-arm.c:4290 elf32-sh.c:4618 elf64-sh64.c:1537 msgid "%B(%A+0x%lx): %s relocation against SEC_MERGE section" msgstr "" -#: elf32-arm.c:4153 elf64-ppc.c:9615 +#: elf32-arm.c:4351 elf64-ppc.c:9672 msgid "%B(%A+0x%lx): %s used with TLS symbol %s" msgstr "" -#: elf32-arm.c:4154 elf64-ppc.c:9616 +#: elf32-arm.c:4352 elf64-ppc.c:9673 msgid "%B(%A+0x%lx): %s used with non-TLS symbol %s" msgstr "" -#: elf32-arm.c:4177 -msgid "%B(%A+0x%lx): warning: unresolvable relocation %d against symbol `%s'" +#: elf32-arm.c:4375 elf32-i386.c:3038 elf32-m32r.c:2653 elf32-m68k.c:1737 +#: elf32-ppc.c:6561 elf32-s390.c:3012 elf32-sh.c:4717 elf32-xtensa.c:2311 +#: elf64-ppc.c:10825 elf64-s390.c:3010 elf64-sh64.c:1626 elf64-x86-64.c:2522 +#: elf-hppa.h:1413 elf-m10300.c:1460 elfxx-sparc.c:3137 +msgid "%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'" msgstr "" -#: elf32-arm.c:4210 elf32-avr.c:880 elf32-cr16c.c:773 elf32-cris.c:1502 +#: elf32-arm.c:4411 elf32-avr.c:880 elf32-cr16c.c:773 elf32-cris.c:1502 #: elf32-crx.c:911 elf32-d10v.c:536 elf32-fr30.c:595 elf32-frv.c:4107 #: elf32-h8300.c:494 elf32-i860.c:1189 elf32-ip2k.c:1474 elf32-iq2000.c:616 -#: elf32-m32c.c:400 elf32-m32r.c:3085 elf32-m68hc1x.c:1194 elf32-ms1.c:373 +#: elf32-m32c.c:465 elf32-m32r.c:3111 elf32-m68hc1x.c:1194 elf32-ms1.c:373 #: elf32-msp430.c:508 elf32-openrisc.c:383 elf32-v850.c:1672 -#: elf32-xstormy16.c:909 elf64-mmix.c:1517 elf-m10200.c:427 elf-m10300.c:1529 +#: elf32-xstormy16.c:909 elf64-mmix.c:1517 elf-m10200.c:427 elf-m10300.c:1509 msgid "internal error: out of range error" msgstr "" -#: elf32-arm.c:4214 elf32-avr.c:884 elf32-cr16c.c:777 elf32-cris.c:1506 +#: elf32-arm.c:4415 elf32-avr.c:884 elf32-cr16c.c:777 elf32-cris.c:1506 #: elf32-crx.c:915 elf32-d10v.c:540 elf32-fr30.c:599 elf32-frv.c:4111 -#: elf32-h8300.c:498 elf32-i860.c:1193 elf32-iq2000.c:620 elf32-m32c.c:404 -#: elf32-m32r.c:3089 elf32-m68hc1x.c:1198 elf32-msp430.c:512 +#: elf32-h8300.c:498 elf32-i860.c:1193 elf32-iq2000.c:620 elf32-m32c.c:469 +#: elf32-m32r.c:3115 elf32-m68hc1x.c:1198 elf32-msp430.c:512 #: elf32-openrisc.c:387 elf32-v850.c:1676 elf32-xstormy16.c:913 -#: elf64-mmix.c:1521 elf-m10200.c:431 elf-m10300.c:1533 elfxx-mips.c:7198 +#: elf64-mmix.c:1521 elf-m10200.c:431 elf-m10300.c:1513 elfxx-mips.c:7212 msgid "internal error: unsupported relocation error" msgstr "" -#: elf32-arm.c:4218 elf32-cr16c.c:781 elf32-crx.c:919 elf32-d10v.c:544 -#: elf32-h8300.c:502 elf32-m32r.c:3093 elf32-m68hc1x.c:1202 elf-m10200.c:435 -#: elf-m10300.c:1537 +#: elf32-arm.c:4419 elf32-cr16c.c:781 elf32-crx.c:919 elf32-d10v.c:544 +#: elf32-h8300.c:502 elf32-m32r.c:3119 elf32-m68hc1x.c:1202 elf-m10200.c:435 +#: elf-m10300.c:1517 msgid "internal error: dangerous error" msgstr "" -#: elf32-arm.c:4222 elf32-avr.c:892 elf32-cr16c.c:785 elf32-cris.c:1514 +#: elf32-arm.c:4423 elf32-avr.c:892 elf32-cr16c.c:785 elf32-cris.c:1514 #: elf32-crx.c:923 elf32-d10v.c:548 elf32-fr30.c:607 elf32-frv.c:4119 #: elf32-h8300.c:506 elf32-i860.c:1201 elf32-ip2k.c:1489 elf32-iq2000.c:628 -#: elf32-m32c.c:412 elf32-m32r.c:3097 elf32-m68hc1x.c:1206 elf32-ms1.c:381 +#: elf32-m32c.c:477 elf32-m32r.c:3123 elf32-m68hc1x.c:1206 elf32-ms1.c:381 #: elf32-msp430.c:520 elf32-openrisc.c:395 elf32-v850.c:1696 -#: elf32-xstormy16.c:921 elf64-mmix.c:1529 elf-m10200.c:439 elf-m10300.c:1541 +#: elf32-xstormy16.c:921 elf64-mmix.c:1529 elf-m10200.c:439 elf-m10300.c:1521 msgid "internal error: unknown error" msgstr "" -#: elf32-arm.c:4321 +#: elf32-arm.c:4664 msgid "" "Warning: Clearing the interworking flag of %B because non-interworking code " "in %B has been linked with it" msgstr "" -#: elf32-arm.c:4440 +#: elf32-arm.c:4751 +msgid "ERROR: %B uses VFP register arguments, %B does not" +msgstr "" + +#: elf32-arm.c:4798 +msgid "ERROR: %B: Conflicting architecture profiles %c/%c" +msgstr "" + +#: elf32-arm.c:4813 +msgid "Warning: %B: Conflicting platform configuration" +msgstr "" + +#: elf32-arm.c:4821 +msgid "ERROR: %B: Conflicting use of R9" +msgstr "" + +#: elf32-arm.c:4833 +msgid "ERROR: %B: SB relative addressing conflicts with use of R9" +msgstr "" + +#: elf32-arm.c:4855 +msgid "ERROR: %B: Conflicting definitions of wchar_t" +msgstr "" + +#: elf32-arm.c:4881 +msgid "ERROR: %B: Conflicting enum sizes" +msgstr "" + +#: elf32-arm.c:4892 +msgid "ERROR: %B uses iWMMXt register arguments, %B does not" +msgstr "" + +#: elf32-arm.c:4912 +msgid "ERROR: %B: Must be processed by '%s' toolchain" +msgstr "" + +#: elf32-arm.c:4932 elf32-arm.c:4951 +msgid "ERROR: %B: Incompatible object tag '%s':%d" +msgstr "" + +#: elf32-arm.c:4961 +msgid "Warning: %B: Unknown EABI object attribute %d" +msgstr "" + +#: elf32-arm.c:5069 msgid "" "ERROR: Source object %B has EABI version %d, but target %B has EABI version %" "d" msgstr "" -#: elf32-arm.c:4453 +#: elf32-arm.c:5082 msgid "ERROR: %B is compiled for APCS-%d, whereas target %B uses APCS-%d" msgstr "" -#: elf32-arm.c:4478 +#: elf32-arm.c:5107 msgid "ERROR: %B uses VFP instructions, whereas %B does not" msgstr "" -#: elf32-arm.c:4482 +#: elf32-arm.c:5111 msgid "ERROR: %B uses FPA instructions, whereas %B does not" msgstr "" -#: elf32-arm.c:4492 +#: elf32-arm.c:5121 msgid "ERROR: %B uses Maverick instructions, whereas %B does not" msgstr "" -#: elf32-arm.c:4496 +#: elf32-arm.c:5125 msgid "ERROR: %B does not use Maverick instructions, whereas %B does" msgstr "" -#: elf32-arm.c:4515 +#: elf32-arm.c:5144 msgid "ERROR: %B uses software FP, whereas %B uses hardware FP" msgstr "" -#: elf32-arm.c:4519 +#: elf32-arm.c:5148 msgid "ERROR: %B uses hardware FP, whereas %B uses software FP" msgstr "" #. Ignore init flag - it may not be set, despite the flags field #. containing valid data. #. Ignore init flag - it may not be set, despite the flags field containing valid data. -#: elf32-arm.c:4566 elf32-cris.c:3235 elf32-m68hc1x.c:1338 elf32-m68k.c:428 -#: elf32-vax.c:528 elfxx-mips.c:9903 +#: elf32-arm.c:5195 elf32-bfin.c:2164 elf32-cris.c:3243 elf32-m68hc1x.c:1338 +#: elf32-m68k.c:428 elf32-vax.c:528 elfxx-mips.c:9933 #, c-format msgid "private flags = %lx:" msgstr "" -#: elf32-arm.c:4575 +#: elf32-arm.c:5204 #, c-format msgid " [interworking enabled]" msgstr "" -#: elf32-arm.c:4583 +#: elf32-arm.c:5212 #, c-format msgid " [VFP float format]" msgstr "" -#: elf32-arm.c:4585 +#: elf32-arm.c:5214 #, c-format msgid " [Maverick float format]" msgstr "" -#: elf32-arm.c:4587 +#: elf32-arm.c:5216 #, c-format msgid " [FPA float format]" msgstr "" -#: elf32-arm.c:4596 +#: elf32-arm.c:5225 #, c-format msgid " [new ABI]" msgstr "" -#: elf32-arm.c:4599 +#: elf32-arm.c:5228 #, c-format msgid " [old ABI]" msgstr "" -#: elf32-arm.c:4602 +#: elf32-arm.c:5231 #, c-format msgid " [software FP]" msgstr "" -#: elf32-arm.c:4611 +#: elf32-arm.c:5240 #, c-format msgid " [Version1 EABI]" msgstr "" -#: elf32-arm.c:4614 elf32-arm.c:4625 +#: elf32-arm.c:5243 elf32-arm.c:5254 #, c-format msgid " [sorted symbol table]" msgstr "" -#: elf32-arm.c:4616 elf32-arm.c:4627 +#: elf32-arm.c:5245 elf32-arm.c:5256 #, c-format msgid " [unsorted symbol table]" msgstr "" -#: elf32-arm.c:4622 +#: elf32-arm.c:5251 #, c-format msgid " [Version2 EABI]" msgstr "" -#: elf32-arm.c:4630 +#: elf32-arm.c:5259 #, c-format msgid " [dynamic symbols use segment index]" msgstr "" -#: elf32-arm.c:4633 +#: elf32-arm.c:5262 #, c-format msgid " [mapping symbols precede others]" msgstr "" -#: elf32-arm.c:4640 +#: elf32-arm.c:5269 #, c-format msgid " [Version3 EABI]" msgstr "" -#: elf32-arm.c:4644 +#: elf32-arm.c:5273 #, c-format msgid " [Version4 EABI]" msgstr "" -#: elf32-arm.c:4647 +#: elf32-arm.c:5276 #, c-format msgid " [BE8]" msgstr "" -#: elf32-arm.c:4650 +#: elf32-arm.c:5279 #, c-format msgid " [LE8]" msgstr "" -#: elf32-arm.c:4656 +#: elf32-arm.c:5285 #, c-format msgid " " msgstr "" -#: elf32-arm.c:4663 +#: elf32-arm.c:5292 #, c-format msgid " [relocatable executable]" msgstr "" -#: elf32-arm.c:4666 +#: elf32-arm.c:5295 #, c-format msgid " [has entry point]" msgstr "" -#: elf32-arm.c:4671 +#: elf32-arm.c:5300 #, c-format msgid "" msgstr "" -#: elf32-arm.c:4907 elf32-i386.c:905 elf32-s390.c:992 elf32-xtensa.c:784 -#: elf64-s390.c:945 elf64-x86-64.c:662 elfxx-sparc.c:1019 +#: elf32-arm.c:5536 elf32-i386.c:902 elf32-s390.c:989 elf32-xtensa.c:784 +#: elf64-s390.c:942 elf64-x86-64.c:666 elfxx-sparc.c:1016 msgid "%B: bad symbol index: %d" msgstr "" +#: elf32-arm.c:6023 elf32-cris.c:2385 elf32-hppa.c:1813 elf32-i370.c:491 +#: elf32-i386.c:1465 elf32-m32r.c:1913 elf32-m68k.c:1088 elf32-ppc.c:4145 +#: elf32-s390.c:1686 elf32-sh.c:3920 elf32-vax.c:1059 elf64-ppc.c:5717 +#: elf64-s390.c:1659 elf64-sh64.c:3442 elf64-x86-64.c:1252 elf-m10300.c:4107 +#: elfxx-sparc.c:1720 +#, c-format +msgid "dynamic variable `%s' is zero size" +msgstr "" + #: elf32-avr.c:888 elf32-cris.c:1510 elf32-fr30.c:603 elf32-frv.c:4115 -#: elf32-i860.c:1197 elf32-ip2k.c:1485 elf32-iq2000.c:624 elf32-m32c.c:408 +#: elf32-i860.c:1197 elf32-ip2k.c:1485 elf32-iq2000.c:624 elf32-m32c.c:473 #: elf32-ms1.c:377 elf32-msp430.c:516 elf32-openrisc.c:391 elf32-v850.c:1680 #: elf32-xstormy16.c:917 elf64-mmix.c:1525 msgid "internal error: dangerous relocation" msgstr "" +#: elf32-bfin.c:96 +msgid "Division by zero. " +msgstr "" + +#: elf32-bfin.c:1958 +msgid "%B(%A+0x%lx): unresolvable relocation against symbol `%s'" +msgstr "" + +#: elf32-bfin.c:1991 elf32-i386.c:3079 elf32-m68k.c:1778 elf32-s390.c:3064 +#: elf64-s390.c:3062 elf64-x86-64.c:2567 +msgid "%B(%A+0x%lx): reloc against `%s': error %d" +msgstr "" + #: elf32-cris.c:1050 msgid "%B, section %A: unresolvable relocation %s against symbol `%s'" msgstr "" @@ -924,50 +977,50 @@ msgstr "" msgid "%B: Internal inconsistency; no relocation section %s" msgstr "" -#: elf32-cris.c:2512 +#: elf32-cris.c:2520 msgid "" "%B, section %A:\n" " v10/v32 compatible object %s must not contain a PIC relocation" msgstr "" -#: elf32-cris.c:2699 elf32-cris.c:2767 +#: elf32-cris.c:2707 elf32-cris.c:2775 msgid "" "%B, section %A:\n" " relocation %s should not be used in a shared object; recompile with -fPIC" msgstr "" -#: elf32-cris.c:3184 +#: elf32-cris.c:3192 msgid "Unexpected machine number" msgstr "" -#: elf32-cris.c:3238 +#: elf32-cris.c:3246 #, c-format msgid " [symbols have a _ prefix]" msgstr "" -#: elf32-cris.c:3241 +#: elf32-cris.c:3249 #, c-format msgid " [v10 and v32]" msgstr "" -#: elf32-cris.c:3244 +#: elf32-cris.c:3252 #, c-format msgid " [v32]" msgstr "" -#: elf32-cris.c:3289 +#: elf32-cris.c:3297 msgid "%B: uses _-prefixed symbols, but writing file with non-prefixed symbols" msgstr "" -#: elf32-cris.c:3290 +#: elf32-cris.c:3298 msgid "%B: uses non-prefixed symbols, but writing file with _-prefixed symbols" msgstr "" -#: elf32-cris.c:3309 +#: elf32-cris.c:3317 msgid "%B contains CRIS v32 code, incompatible with previous objects" msgstr "" -#: elf32-cris.c:3311 +#: elf32-cris.c:3319 msgid "%B contains non-CRIS-v32 code, incompatible with previous objects" msgstr "" @@ -1055,39 +1108,39 @@ msgstr "" msgid "relocation references a different segment" msgstr "" -#: elf32-frv.c:6345 +#: elf32-frv.c:6324 msgid "%B: unsupported relocation type %i" msgstr "" -#: elf32-frv.c:6663 +#: elf32-frv.c:6642 #, c-format msgid "" "%s: compiled with %s and linked with modules that use non-pic relocations" msgstr "" -#: elf32-frv.c:6716 elf32-iq2000.c:801 elf32-m32c.c:720 +#: elf32-frv.c:6695 elf32-iq2000.c:801 elf32-m32c.c:785 #, c-format msgid "%s: compiled with %s and linked with modules compiled with %s" msgstr "" -#: elf32-frv.c:6728 +#: elf32-frv.c:6707 #, c-format msgid "" "%s: uses different unknown e_flags (0x%lx) fields than previous modules (0x%" "lx)" msgstr "" -#: elf32-frv.c:6749 +#: elf32-frv.c:6728 #, c-format msgid "%s: cannot link non-fdpic object file into fdpic executable" msgstr "" -#: elf32-frv.c:6753 +#: elf32-frv.c:6732 #, c-format msgid "%s: cannot link fdpic object file into non-fdpic executable" msgstr "" -#: elf32-frv.c:6778 elf32-iq2000.c:838 elf32-m32c.c:756 elf32-ms1.c:596 +#: elf32-frv.c:6757 elf32-iq2000.c:838 elf32-m32c.c:821 elf32-ms1.c:596 #, c-format msgid "private flags = 0x%lx:" msgstr "" @@ -1096,77 +1149,67 @@ msgstr "" msgid "%B: Relocations in generic ELF (EM: %d)" msgstr "" -#: elf32-hppa.c:569 elf32-m68hc1x.c:161 elf64-ppc.c:3659 +#: elf32-hppa.c:569 elf32-m68hc1x.c:161 elf64-ppc.c:3660 msgid "%B: cannot create stub entry %s" msgstr "" -#: elf32-hppa.c:822 elf32-hppa.c:3403 +#: elf32-hppa.c:822 elf32-hppa.c:3411 msgid "%B(%A+0x%lx): cannot reach %s, recompile with -ffunction-sections" msgstr "" -#: elf32-hppa.c:1213 +#: elf32-hppa.c:1212 msgid "" "%B: relocation %s can not be used when making a shared object; recompile " "with -fPIC" msgstr "" -#: elf32-hppa.c:1406 +#: elf32-hppa.c:1405 #, c-format msgid "Could not find relocation section for %s" msgstr "" -#: elf32-hppa.c:2669 +#: elf32-hppa.c:2677 msgid "%B: duplicate export stub %s" msgstr "" -#: elf32-hppa.c:3258 +#: elf32-hppa.c:3266 msgid "" "%B(%A+0x%lx): %s fixup for insn 0x%x is not supported in a non-shared link" msgstr "" -#: elf32-hppa.c:3887 +#: elf32-hppa.c:3895 msgid "%B(%A+0x%lx): cannot handle %s for %s" msgstr "" -#: elf32-hppa.c:4181 +#: elf32-hppa.c:4189 msgid ".got section not immediately after .plt section" msgstr "" -#: elf32-i386.c:327 elf32-s390.c:368 elf64-ppc.c:2123 elf64-s390.c:390 -#: elf64-x86-64.c:197 +#: elf32-i386.c:327 elf32-s390.c:368 elf64-ppc.c:2124 elf64-s390.c:390 +#: elf64-x86-64.c:204 msgid "%B: invalid relocation type %d" msgstr "" -#: elf32-i386.c:1018 elf32-s390.c:1174 elf32-sh.c:6389 elf64-s390.c:1136 -#: elfxx-sparc.c:1147 +#: elf32-i386.c:1015 elf32-s390.c:1171 elf32-sh.c:6389 elf64-s390.c:1133 +#: elfxx-sparc.c:1144 msgid "%B: `%s' accessed both as normal and thread local symbol" msgstr "" -#: elf32-i386.c:1133 elf32-s390.c:1283 elf64-ppc.c:4733 elf64-s390.c:1248 -#: elf64-x86-64.c:906 +#: elf32-i386.c:1130 elf32-s390.c:1280 elf64-ppc.c:4731 elf64-s390.c:1245 +#: elf64-x86-64.c:910 msgid "%B: bad relocation section name `%s'" msgstr "" -#: elf32-i386.c:2144 +#: elf32-i386.c:2149 msgid "%B: unrecognized relocation (0x%x) in section `%A'" msgstr "" -#: elf32-i386.c:2404 +#: elf32-i386.c:2409 msgid "" "%B: relocation R_386_GOTOFF against protected function `%s' can not be used " "when making a shared object" msgstr "" -#: elf32-i386.c:3033 elf32-m68k.c:1728 elf32-s390.c:3010 elf32-xtensa.c:2314 -#: elf64-s390.c:3007 elf64-x86-64.c:2508 elfxx-sparc.c:3134 -msgid "%B(%A+0x%lx): unresolvable relocation against symbol `%s'" -msgstr "" - -#: elf32-i386.c:3073 elf32-m68k.c:1768 elf32-s390.c:3061 elf64-s390.c:3058 -#: elf64-x86-64.c:2552 -msgid "%B(%A+0x%lx): reloc against `%s': error %d" -msgstr "" - #: elf32-ip2k.c:853 elf32-ip2k.c:859 elf32-ip2k.c:926 elf32-ip2k.c:932 msgid "" "ip2k relaxer: switch table without complete matching relocation information." @@ -1191,45 +1234,39 @@ msgstr "" msgid "unsupported relocation between data/insn address spaces" msgstr "" -#: elf32-iq2000.c:814 elf32-m32c.c:732 +#: elf32-iq2000.c:814 elf32-m32c.c:797 #, c-format msgid "%s: uses different e_flags (0x%lx) fields than previous modules (0x%lx)" msgstr "" -#: elf32-m32r.c:1421 +#: elf32-m32r.c:1436 msgid "SDA relocation when _SDA_BASE_ not defined" msgstr "" -#: elf32-m32r.c:2633 elf64-sh64.c:1626 elf-m10300.c:1483 -#, c-format -msgid "" -"%s: warning: unresolvable relocation against symbol `%s' from %s section" -msgstr "" - -#: elf32-m32r.c:3022 +#: elf32-m32r.c:3048 msgid "%B: The target (%s) of an %s relocation is in the wrong section (%A)" msgstr "" -#: elf32-m32r.c:3550 +#: elf32-m32r.c:3576 msgid "%B: Instruction set mismatch with previous modules" msgstr "" -#: elf32-m32r.c:3571 +#: elf32-m32r.c:3597 #, c-format msgid "private flags = %lx" msgstr "" -#: elf32-m32r.c:3576 +#: elf32-m32r.c:3602 #, c-format msgid ": m32r instructions" msgstr "" -#: elf32-m32r.c:3577 +#: elf32-m32r.c:3603 #, c-format msgid ": m32rx instructions" msgstr "" -#: elf32-m32r.c:3578 +#: elf32-m32r.c:3604 #, c-format msgid ": m32r2 instructions" msgstr "" @@ -1271,7 +1308,7 @@ msgstr "" msgid "%B: linking files compiled for HCS12 with others compiled for HC12" msgstr "" -#: elf32-m68hc1x.c:1313 elf32-ppc.c:3515 elf64-sparc.c:696 elfxx-mips.c:9864 +#: elf32-m68hc1x.c:1313 elf32-ppc.c:3576 elf64-sparc.c:696 elfxx-mips.c:9894 msgid "%B: uses different e_flags (0x%lx) fields than previous modules (0x%lx)" msgstr "" @@ -1384,71 +1421,67 @@ msgstr "" msgid "failed to install new APUinfo section." msgstr "" -#: elf32-ppc.c:2936 +#: elf32-ppc.c:2941 msgid "%B: relocation %s cannot be used when making a shared object" msgstr "" #. It does not make sense to have a procedure linkage #. table entry for a local symbol. -#: elf32-ppc.c:3152 +#: elf32-ppc.c:3211 msgid "%B(%A+0x%lx): %s reloc against local symbol" msgstr "" -#: elf32-ppc.c:3480 +#: elf32-ppc.c:3541 msgid "" "%B: compiled with -mrelocatable and linked with modules compiled normally" msgstr "" -#: elf32-ppc.c:3488 +#: elf32-ppc.c:3549 msgid "" "%B: compiled normally and linked with modules compiled with -mrelocatable" msgstr "" -#: elf32-ppc.c:5758 elf64-ppc.c:10129 +#: elf32-ppc.c:5768 elf64-ppc.c:10186 msgid "%B: unknown relocation type %d for symbol %s" msgstr "" -#: elf32-ppc.c:6008 +#: elf32-ppc.c:6018 msgid "%B(%A+0x%lx): non-zero addend on %s reloc against `%s'" msgstr "" -#: elf32-ppc.c:6354 elf32-ppc.c:6376 elf32-ppc.c:6425 +#: elf32-ppc.c:6365 elf32-ppc.c:6391 elf32-ppc.c:6450 msgid "" "%B: the target (%s) of a %s relocation is in the wrong output section (%s)" msgstr "" -#: elf32-ppc.c:6480 +#: elf32-ppc.c:6505 msgid "%B: relocation %s is not yet supported for symbol %s." msgstr "" -#: elf32-ppc.c:6536 elf64-ppc.c:10768 -msgid "%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'" -msgstr "" - -#: elf32-ppc.c:6585 elf64-ppc.c:10815 +#: elf32-ppc.c:6610 elf64-ppc.c:10872 msgid "%B(%A+0x%lx): %s reloc against `%s': error %d" msgstr "" -#: elf32-s390.c:2251 elf64-s390.c:2222 +#: elf32-s390.c:2253 elf64-s390.c:2225 msgid "%B(%A+0x%lx): invalid instruction for TLS relocation %s" msgstr "" -#: elf32-sh64.c:218 elf64-sh64.c:2319 +#: elf32-sh64.c:218 elf64-sh64.c:2322 #, c-format msgid "%s: compiled as 32-bit object and %s is 64-bit" msgstr "" -#: elf32-sh64.c:221 elf64-sh64.c:2322 +#: elf32-sh64.c:221 elf64-sh64.c:2325 #, c-format msgid "%s: compiled as 64-bit object and %s is 32-bit" msgstr "" -#: elf32-sh64.c:223 elf64-sh64.c:2324 +#: elf32-sh64.c:223 elf64-sh64.c:2327 #, c-format msgid "%s: object size does not match that of target %s" msgstr "" -#: elf32-sh64.c:446 elf64-sh64.c:2896 +#: elf32-sh64.c:446 elf64-sh64.c:2899 #, c-format msgid "%s: encountered datalabel symbol in input" msgstr "" @@ -1512,31 +1545,27 @@ msgstr "" msgid "%B: 0x%lx: fatal: reloc overflow while relaxing" msgstr "" -#: elf32-sh.c:4559 elf64-sh64.c:1509 +#: elf32-sh.c:4566 elf64-sh64.c:1509 msgid "Unexpected STO_SH5_ISA32 on local symbol is not handled" msgstr "" -#: elf32-sh.c:4710 -msgid "%B(%A): unresolvable relocation against symbol `%s'" -msgstr "" - -#: elf32-sh.c:4780 +#: elf32-sh.c:4791 msgid "%B: 0x%lx: fatal: unaligned branch target for relax-support relocation" msgstr "" -#: elf32-sh.c:4813 elf32-sh.c:4828 +#: elf32-sh.c:4824 elf32-sh.c:4839 msgid "%B: 0x%lx: fatal: unaligned %s relocation 0x%lx" msgstr "" -#: elf32-sh.c:4842 +#: elf32-sh.c:4853 msgid "%B: 0x%lx: fatal: R_SH_PSHA relocation %d not in range -32..32" msgstr "" -#: elf32-sh.c:4856 +#: elf32-sh.c:4867 msgid "%B: 0x%lx: fatal: R_SH_PSHL relocation %d not in range -32..32" msgstr "" -#: elf32-sh.c:6600 elf64-alpha.c:4486 +#: elf32-sh.c:6601 elf64-alpha.c:4466 msgid "%B: TLS local exec code cannot be linked into shared objects" msgstr "" @@ -1652,22 +1681,22 @@ msgid "" "%ld" msgstr "" -#: elf32-vax.c:1597 +#: elf32-vax.c:1604 #, c-format msgid "%s: warning: PLT addend of %d to `%s' from %s section ignored" msgstr "" -#: elf32-vax.c:1721 +#: elf32-vax.c:1728 #, c-format msgid "%s: warning: %s relocation against symbol `%s' from %s section" msgstr "" -#: elf32-vax.c:1727 +#: elf32-vax.c:1734 #, c-format msgid "%s: warning: %s relocation to 0x%x from %s section" msgstr "" -#: elf32-xstormy16.c:425 elf32-ia64.c:2546 elf64-ia64.c:2546 +#: elf32-xstormy16.c:425 elf32-ia64.c:2563 elf64-ia64.c:2563 msgid "non-zero addend in @fptr reloc" msgstr "" @@ -1675,47 +1704,47 @@ msgstr "" msgid "%B(%A): invalid property table" msgstr "" -#: elf32-xtensa.c:2202 +#: elf32-xtensa.c:2199 msgid "%B(%A+0x%lx): relocation offset out of range (size=0x%x)" msgstr "" -#: elf32-xtensa.c:2259 +#: elf32-xtensa.c:2256 msgid "dynamic relocation in read-only section" msgstr "" -#: elf32-xtensa.c:2423 +#: elf32-xtensa.c:2421 msgid "internal inconsistency in size of .got.loc section" msgstr "" -#: elf32-xtensa.c:2737 +#: elf32-xtensa.c:2735 msgid "%B: incompatible machine type. Output is 0x%x. Input is 0x%x" msgstr "" -#: elf32-xtensa.c:3883 elf32-xtensa.c:3891 +#: elf32-xtensa.c:3881 elf32-xtensa.c:3889 msgid "Attempt to convert L32R/CALLX to CALL failed" msgstr "" -#: elf32-xtensa.c:5469 elf32-xtensa.c:5545 elf32-xtensa.c:6498 -#: elf32-xtensa.c:6552 +#: elf32-xtensa.c:5467 elf32-xtensa.c:5543 elf32-xtensa.c:6496 +#: elf32-xtensa.c:6550 msgid "" "%B(%A+0x%lx): could not decode instruction; possible configuration mismatch" msgstr "" -#: elf32-xtensa.c:6371 elf32-xtensa.c:6534 +#: elf32-xtensa.c:6369 elf32-xtensa.c:6532 msgid "" "%B(%A+0x%lx): could not decode instruction for XTENSA_ASM_SIMPLIFY " "relocation; possible configuration mismatch" msgstr "" -#: elf32-xtensa.c:7852 +#: elf32-xtensa.c:7855 msgid "invalid relocation address" msgstr "" -#: elf32-xtensa.c:7901 +#: elf32-xtensa.c:7904 msgid "overflow after relaxation" msgstr "" -#: elf32-xtensa.c:9029 +#: elf32-xtensa.c:9032 msgid "%B(%A+0x%lx): unexpected fix for %s relocation" msgstr "" @@ -1723,43 +1752,43 @@ msgstr "" msgid "GPDISP relocation did not find ldah and lda instructions" msgstr "" -#: elf64-alpha.c:2383 +#: elf64-alpha.c:2363 msgid "%B: .got subsegment exceeds 64K (size %d)" msgstr "" -#: elf64-alpha.c:4230 elf64-alpha.c:4242 +#: elf64-alpha.c:4210 elf64-alpha.c:4222 msgid "%B: gp-relative relocation against dynamic symbol %s" msgstr "" -#: elf64-alpha.c:4268 elf64-alpha.c:4403 +#: elf64-alpha.c:4248 elf64-alpha.c:4383 msgid "%B: pc-relative relocation against dynamic symbol %s" msgstr "" -#: elf64-alpha.c:4296 +#: elf64-alpha.c:4276 msgid "%B: change in gp: BRSGP %s" msgstr "" -#: elf64-alpha.c:4321 +#: elf64-alpha.c:4301 msgid "" msgstr "" -#: elf64-alpha.c:4326 +#: elf64-alpha.c:4306 msgid "%B: !samegp reloc against symbol without .prologue: %s" msgstr "" -#: elf64-alpha.c:4378 +#: elf64-alpha.c:4358 msgid "%B: unhandled dynamic relocation against %s" msgstr "" -#: elf64-alpha.c:4410 +#: elf64-alpha.c:4390 msgid "%B: pc-relative relocation against undefined weak symbol %s" msgstr "" -#: elf64-alpha.c:4470 +#: elf64-alpha.c:4450 msgid "%B: dtp-relative relocation against dynamic symbol %s" msgstr "" -#: elf64-alpha.c:4493 +#: elf64-alpha.c:4473 msgid "%B: tp-relative relocation against dynamic symbol %s" msgstr "" @@ -1809,29 +1838,29 @@ msgid "" "register is $%ld." msgstr "" -#: elf64-mmix.c:2204 +#: elf64-mmix.c:2207 #, c-format msgid "" "%s: Error: multiple definition of `%s'; start of %s is set in a earlier " "linked file\n" msgstr "" -#: elf64-mmix.c:2262 +#: elf64-mmix.c:2265 msgid "Register section has contents\n" msgstr "" -#: elf64-mmix.c:2451 +#: elf64-mmix.c:2457 #, c-format msgid "" "Internal inconsistency: remaining %u != max %u.\n" " Please report this bug." msgstr "" -#: elf64-ppc.c:2499 libbfd.c:928 +#: elf64-ppc.c:2500 libbfd.c:931 msgid "%B: compiled for a big endian system and target is little endian" msgstr "" -#: elf64-ppc.c:2502 libbfd.c:930 +#: elf64-ppc.c:2503 libbfd.c:933 msgid "%B: compiled for a little endian system and target is big endian" msgstr "" @@ -1842,51 +1871,60 @@ msgid "" "LD_BIND_NOW=1 or upgrade gcc" msgstr "" -#: elf64-ppc.c:6133 +#: elf64-ppc.c:6155 msgid "dynreloc miscount for %B, section %A" msgstr "" -#: elf64-ppc.c:6235 +#: elf64-ppc.c:6257 msgid "%B: .opd is not a regular array of opd entries" msgstr "" -#: elf64-ppc.c:6244 +#: elf64-ppc.c:6266 msgid "%B: unexpected reloc type %u in .opd section" msgstr "" -#: elf64-ppc.c:6265 +#: elf64-ppc.c:6287 msgid "%B: undefined sym `%s' in .opd section" msgstr "" -#: elf64-ppc.c:6915 elf64-ppc.c:7294 +#: elf64-ppc.c:6939 elf64-ppc.c:7318 #, c-format msgid "%s defined in removed toc entry" msgstr "" -#: elf64-ppc.c:8081 +#: elf64-ppc.c:8041 +#, c-format +msgid "long branch stub `%s' offset overflow" +msgstr "" + +#: elf64-ppc.c:8116 #, c-format msgid "can't find branch stub `%s'" msgstr "" -#: elf64-ppc.c:8120 elf64-ppc.c:8196 +#: elf64-ppc.c:8155 elf64-ppc.c:8231 #, c-format msgid "linkage table error against `%s'" msgstr "" -#: elf64-ppc.c:8325 +#: elf64-ppc.c:8360 #, c-format msgid "can't build branch stub `%s'" msgstr "" -#: elf64-ppc.c:9253 +#: elf64-ppc.c:8784 +msgid "%B section %A exceeds stub group size" +msgstr "" + +#: elf64-ppc.c:9295 msgid ".glink and .plt too far apart" msgstr "" -#: elf64-ppc.c:9366 +#: elf64-ppc.c:9408 msgid "stubs don't match calculated size" msgstr "" -#: elf64-ppc.c:9378 +#: elf64-ppc.c:9420 #, c-format msgid "" "linker stubs in %u group%s\n" @@ -1897,28 +1935,28 @@ msgid "" " plt call %lu" msgstr "" -#: elf64-ppc.c:10018 +#: elf64-ppc.c:10075 msgid "" "%B(%A+0x%lx): automatic multiple TOCs not supported using your crt files; " "recompile with -mminimal-toc or upgrade gcc" msgstr "" -#: elf64-ppc.c:10026 +#: elf64-ppc.c:10083 msgid "" "%B(%A+0x%lx): sibling call optimization to `%s' does not allow automatic " "multiple TOCs; recompile with -mminimal-toc or -fno-optimize-sibling-calls, " "or make `%s' extern" msgstr "" -#: elf64-ppc.c:10670 +#: elf64-ppc.c:10727 msgid "%B: relocation %s is not supported for symbol %s." msgstr "" -#: elf64-ppc.c:10749 +#: elf64-ppc.c:10806 msgid "%B: error: relocation %s not a multiple of %d" msgstr "" -#: elf64-sh64.c:1673 +#: elf64-sh64.c:1676 #, c-format msgid "%s: error: unaligned relocation type %d at %08x reloc %08x\n" msgstr "" @@ -1943,23 +1981,23 @@ msgstr "" msgid "%B: linking UltraSPARC specific with HAL specific code" msgstr "" -#: elf64-x86-64.c:688 elf64-x86-64.c:814 elf64-x86-64.c:2055 +#: elf64-x86-64.c:692 elf64-x86-64.c:818 elf64-x86-64.c:2069 msgid "" "%B: relocation %s against `%s' can not be used when making a shared object; " "recompile with -fPIC" msgstr "" -#: elf64-x86-64.c:756 +#: elf64-x86-64.c:760 msgid "%B: %s' accessed both as normal and thread local symbol" msgstr "" -#: elf64-x86-64.c:1986 +#: elf64-x86-64.c:2000 msgid "" "%B: relocation R_X86_64_GOTOFF64 against protected function `%s' can not be " "used when making a shared object" msgstr "" -#: elf64-x86-64.c:2051 +#: elf64-x86-64.c:2065 msgid "" "%B: relocation R_X86_64_PC32 against protected function `%s' can not be used " "when making a shared object" @@ -1977,91 +2015,91 @@ msgstr "" msgid "%B: no group info for section %A" msgstr "" -#: elf.c:659 +#: elf.c:652 elf.c:3091 elflink.c:7588 +msgid "%B: warning: sh_link not set for section `%A'" +msgstr "" + +#: elf.c:688 msgid "%B: unknown [%d] section `%s' in group [%s]" msgstr "" -#: elf.c:1042 +#: elf.c:1071 #, c-format msgid "" "\n" "Program Header:\n" msgstr "" -#: elf.c:1094 +#: elf.c:1123 #, c-format msgid "" "\n" "Dynamic Section:\n" msgstr "" -#: elf.c:1219 +#: elf.c:1248 #, c-format msgid "" "\n" "Version definitions:\n" msgstr "" -#: elf.c:1244 +#: elf.c:1273 #, c-format msgid "" "\n" "Version References:\n" msgstr "" -#: elf.c:1249 +#: elf.c:1278 #, c-format msgid " required from %s:\n" msgstr "" -#: elf.c:1958 +#: elf.c:1985 msgid "%B: invalid link %lu for reloc section %s (index %u)" msgstr "" -#: elf.c:3095 elflink.c:7621 -msgid "%B: warning: sh_link not set for section `%A'" -msgstr "" - -#: elf.c:3105 +#: elf.c:3062 msgid "%B: sh_link of section `%A' points to discarded section `%A' of `%B'" msgstr "" -#: elf.c:4103 +#: elf.c:4070 msgid "%B: Not enough room for program headers (allocated %u, need %u)" msgstr "" -#: elf.c:4206 +#: elf.c:4173 msgid "" "%B: The first section in the PT_DYNAMIC segment is not the .dynamic section" msgstr "" -#: elf.c:4250 +#: elf.c:4217 msgid "%B: Not enough room for program headers, try linking with -N" msgstr "" -#: elf.c:4341 +#: elf.c:4308 msgid "%B: section %A lma 0x%lx overlaps previous sections" msgstr "" -#: elf.c:4742 +#: elf.c:4709 msgid "%B: warning: allocated section `%s' not in segment" msgstr "" -#: elf.c:5035 +#: elf.c:5002 msgid "%B: symbol `%s' required but not present" msgstr "" -#: elf.c:5332 +#: elf.c:5299 msgid "%B: warning: Empty loadable segment detected, is this intentional ?\n" msgstr "" -#: elf.c:5950 +#: elf.c:5961 #, c-format msgid "" "Unable to find equivalent output section for symbol '%s' from section '%s'" msgstr "" -#: elf.c:6906 +#: elf.c:6917 msgid "%B: unsupported relocation type %s" msgstr "" @@ -2075,143 +2113,147 @@ msgstr "" msgid "%s(%s): relocation %d has invalid symbol index %ld" msgstr "" -#: elf-hppa.h:1401 elf-hppa.h:1427 elf-hppa.h:1442 +#: elf-hppa.h:1443 elf-hppa.h:1458 msgid "%B(%A): warning: unresolvable relocation against symbol `%s'" msgstr "" -#: elflink.c:942 +#: elflink.c:907 msgid "" "%s: TLS definition in %B section %A mismatches non-TLS definition in %B " "section %A" msgstr "" -#: elflink.c:946 +#: elflink.c:911 msgid "%s: TLS reference in %B mismatches non-TLS reference in %B" msgstr "" -#: elflink.c:950 +#: elflink.c:915 msgid "%s: TLS definition in %B section %A mismatches non-TLS reference in %B" msgstr "" -#: elflink.c:954 +#: elflink.c:919 msgid "%s: TLS reference in %B mismatches non-TLS definition in %B section %A" msgstr "" -#: elflink.c:1513 +#: elflink.c:1491 msgid "%B: unexpected redefinition of indirect versioned symbol `%s'" msgstr "" -#: elflink.c:1829 +#: elflink.c:1807 msgid "%B: undefined versioned symbol name %s" msgstr "" -#: elflink.c:1977 +#: elflink.c:1955 msgid "" "%B: bad reloc symbol index (0x%lx >= 0x%lx) for offset 0x%lx in section `%A'" msgstr "" -#: elflink.c:2169 +#: elflink.c:2147 msgid "%B: relocation size mismatch in %B section %A" msgstr "" -#: elflink.c:2459 +#: elflink.c:2437 #, c-format msgid "warning: type and size of dynamic symbol `%s' are not defined" msgstr "" -#: elflink.c:2780 +#: elflink.c:2761 msgid "warning: creating a DT_TEXTREL in a shared object." msgstr "" -#: elflink.c:3714 +#: elflink.c:3696 msgid "%B: %s: invalid version %u (max %d)" msgstr "" -#: elflink.c:3750 +#: elflink.c:3732 msgid "%B: %s: invalid needed version %d" msgstr "" -#: elflink.c:3931 +#: elflink.c:3912 msgid "Warning: alignment %u of symbol `%s' in %B is smaller than %u in %B" msgstr "" -#: elflink.c:3943 +#: elflink.c:3924 msgid "Warning: size of symbol `%s' changed from %lu in %B to %lu in %B" msgstr "" -#: elflink.c:4110 +#: elflink.c:4091 #, c-format msgid "%s: invalid DSO for symbol `%s' definition" msgstr "" -#: elflink.c:5170 +#: elflink.c:5152 #, c-format msgid "%s: undefined version: %s" msgstr "" -#: elflink.c:5236 +#: elflink.c:5219 msgid "%B: .preinit_array section is not allowed in DSO" msgstr "" -#: elflink.c:5993 +#: elflink.c:5978 msgid "Not enough memory to sort relocations" msgstr "" -#: elflink.c:6384 +#: elflink.c:6369 msgid "%B: %s symbol `%s' in %B is referenced by DSO" msgstr "" -#: elflink.c:6467 +#: elflink.c:6452 msgid "%B: could not find output section %A for input section %A" msgstr "" -#: elflink.c:6564 +#: elflink.c:6549 msgid "%B: %s symbol `%s' isn't defined" msgstr "" -#: elflink.c:7057 +#: elflink.c:7024 msgid "" "error: %B contains a reloc (0x%s) for section %A that references a non-" "existent global symbol" msgstr "" -#: elflink.c:7091 +#: elflink.c:7058 msgid "" "%X`%s' referenced in section `%A' of %B: defined in discarded section `%A' " -"of %B" +"of %B\n" +msgstr "" + +#: elflink.c:7665 +msgid "%A has both ordered [`%A' in %B] and unordered [`%A' in %B] sections" msgstr "" -#: elflink.c:7694 +#: elflink.c:7670 #, c-format msgid "%A has both ordered and unordered sections" msgstr "" -#: elflink.c:8507 elflink.c:8548 +#: elflink.c:8487 elflink.c:8528 msgid "%B: could not find output section %s" msgstr "" -#: elflink.c:8512 +#: elflink.c:8492 #, c-format msgid "warning: %s section has zero size" msgstr "" -#: elflink.c:9128 +#: elflink.c:9087 msgid "Warning: gc-sections option ignored" msgstr "" -#: elflink.c:9708 +#: elflink.c:9704 msgid "%B: ignoring duplicate section `%A'" msgstr "" -#: elflink.c:9715 elflink.c:9722 +#: elflink.c:9711 elflink.c:9718 msgid "%B: duplicate section `%A' has different size" msgstr "" -#: elflink.c:9730 elflink.c:9735 +#: elflink.c:9726 elflink.c:9731 msgid "%B: warning: could not read contents of section `%A'" msgstr "" -#: elflink.c:9739 +#: elflink.c:9735 msgid "%B: warning: duplicate section `%A' has different contents" msgstr "" @@ -2231,149 +2273,149 @@ msgstr "" msgid "%B: Warning: bad `%s' option size %u smaller than its header" msgstr "" -#: elfxx-mips.c:5951 +#: elfxx-mips.c:5965 msgid "%B: Malformed reloc detected for section %s" msgstr "" -#: elfxx-mips.c:6027 +#: elfxx-mips.c:6041 msgid "%B: CALL16 reloc at 0x%lx not against global symbol" msgstr "" -#: elfxx-mips.c:9365 +#: elfxx-mips.c:9380 #, c-format msgid "%s: illegal section name `%s'" msgstr "" -#: elfxx-mips.c:9689 +#: elfxx-mips.c:9719 msgid "%B: endianness incompatible with that of the selected emulation" msgstr "" -#: elfxx-mips.c:9701 +#: elfxx-mips.c:9731 msgid "%B: ABI is incompatible with that of the selected emulation" msgstr "" -#: elfxx-mips.c:9773 +#: elfxx-mips.c:9803 msgid "%B: warning: linking PIC files with non-PIC files" msgstr "" -#: elfxx-mips.c:9790 +#: elfxx-mips.c:9820 msgid "%B: linking 32-bit code with 64-bit code" msgstr "" -#: elfxx-mips.c:9818 +#: elfxx-mips.c:9848 msgid "%B: linking %s module with previous %s modules" msgstr "" -#: elfxx-mips.c:9841 +#: elfxx-mips.c:9871 msgid "%B: ABI mismatch: linking %s module with previous %s modules" msgstr "" -#: elfxx-mips.c:9906 +#: elfxx-mips.c:9936 #, c-format msgid " [abi=O32]" msgstr "" -#: elfxx-mips.c:9908 +#: elfxx-mips.c:9938 #, c-format msgid " [abi=O64]" msgstr "" -#: elfxx-mips.c:9910 +#: elfxx-mips.c:9940 #, c-format msgid " [abi=EABI32]" msgstr "" -#: elfxx-mips.c:9912 +#: elfxx-mips.c:9942 #, c-format msgid " [abi=EABI64]" msgstr "" -#: elfxx-mips.c:9914 +#: elfxx-mips.c:9944 #, c-format msgid " [abi unknown]" msgstr "" -#: elfxx-mips.c:9916 +#: elfxx-mips.c:9946 #, c-format msgid " [abi=N32]" msgstr "" -#: elfxx-mips.c:9918 +#: elfxx-mips.c:9948 #, c-format msgid " [abi=64]" msgstr "" -#: elfxx-mips.c:9920 +#: elfxx-mips.c:9950 #, c-format msgid " [no abi set]" msgstr "" -#: elfxx-mips.c:9923 +#: elfxx-mips.c:9953 #, c-format msgid " [mips1]" msgstr "" -#: elfxx-mips.c:9925 +#: elfxx-mips.c:9955 #, c-format msgid " [mips2]" msgstr "" -#: elfxx-mips.c:9927 +#: elfxx-mips.c:9957 #, c-format msgid " [mips3]" msgstr "" -#: elfxx-mips.c:9929 +#: elfxx-mips.c:9959 #, c-format msgid " [mips4]" msgstr "" -#: elfxx-mips.c:9931 +#: elfxx-mips.c:9961 #, c-format msgid " [mips5]" msgstr "" -#: elfxx-mips.c:9933 +#: elfxx-mips.c:9963 #, c-format msgid " [mips32]" msgstr "" -#: elfxx-mips.c:9935 +#: elfxx-mips.c:9965 #, c-format msgid " [mips64]" msgstr "" -#: elfxx-mips.c:9937 +#: elfxx-mips.c:9967 #, c-format msgid " [mips32r2]" msgstr "" -#: elfxx-mips.c:9939 +#: elfxx-mips.c:9969 #, c-format msgid " [mips64r2]" msgstr "" -#: elfxx-mips.c:9941 +#: elfxx-mips.c:9971 #, c-format msgid " [unknown ISA]" msgstr "" -#: elfxx-mips.c:9944 +#: elfxx-mips.c:9974 #, c-format msgid " [mdmx]" msgstr "" -#: elfxx-mips.c:9947 +#: elfxx-mips.c:9977 #, c-format msgid " [mips16]" msgstr "" -#: elfxx-mips.c:9950 +#: elfxx-mips.c:9980 #, c-format msgid " [32bitmode]" msgstr "" -#: elfxx-mips.c:9952 +#: elfxx-mips.c:9982 #, c-format msgid " [not 32bitmode]" msgstr "" @@ -2383,7 +2425,7 @@ msgstr "" msgid "invalid relocation type %d" msgstr "" -#: elfxx-sparc.c:2780 +#: elfxx-sparc.c:2783 msgid "%B: probably compiled without -fPIC?" msgstr "" @@ -2470,12 +2512,12 @@ msgstr "" msgid "%s: address 0x%s out of range for Intel Hex file" msgstr "" -#: libbfd.c:958 +#: libbfd.c:961 #, c-format msgid "Deprecated %s called at %s line %d in %s\n" msgstr "" -#: libbfd.c:961 +#: libbfd.c:964 #, c-format msgid "Deprecated %s called\n" msgstr "" @@ -2484,16 +2526,16 @@ msgstr "" msgid "%B: indirect symbol `%s' to `%s' is a loop" msgstr "" -#: linker.c:2743 +#: linker.c:2740 #, c-format msgid "Attempt to do relocatable link with %s input and %s output" msgstr "" -#: linker.c:3040 +#: linker.c:3037 msgid "%B: warning: ignoring duplicate section `%A'\n" msgstr "" -#: linker.c:3054 +#: linker.c:3051 msgid "%B: warning: duplicate section `%A' has different size\n" msgstr "" @@ -2580,71 +2622,71 @@ msgid "" "%s: invalid mmo file: file name for number %d was not specified before use\n" msgstr "" -#: mmo.c:1891 +#: mmo.c:1892 #, c-format msgid "" "%s: invalid mmo file: fields y and z of lop_stab non-zero, y: %d, z: %d\n" msgstr "" -#: mmo.c:1927 +#: mmo.c:1928 #, c-format msgid "%s: invalid mmo file: lop_end not last item in file\n" msgstr "" -#: mmo.c:1940 +#: mmo.c:1941 #, c-format msgid "" "%s: invalid mmo file: YZ of lop_end (%ld) not equal to the number of tetras " "to the preceding lop_stab (%ld)\n" msgstr "" -#: mmo.c:2647 +#: mmo.c:2649 #, c-format msgid "%s: invalid symbol table: duplicate symbol `%s'\n" msgstr "" -#: mmo.c:2890 +#: mmo.c:2892 #, c-format msgid "" "%s: Bad symbol definition: `Main' set to %s rather than the start address %" "s\n" msgstr "" -#: mmo.c:2982 +#: mmo.c:2984 #, c-format msgid "" "%s: warning: symbol table too large for mmo, larger than 65535 32-bit words: " "%d. Only `Main' will be emitted.\n" msgstr "" -#: mmo.c:3027 +#: mmo.c:3029 #, c-format msgid "%s: internal error, symbol table changed size from %d to %d words\n" msgstr "" -#: mmo.c:3079 +#: mmo.c:3081 #, c-format msgid "%s: internal error, internal register section %s had contents\n" msgstr "" -#: mmo.c:3130 +#: mmo.c:3132 #, c-format msgid "%s: no initialized registers; section length 0\n" msgstr "" -#: mmo.c:3136 +#: mmo.c:3138 #, c-format msgid "%s: too many initialized registers; section length %ld\n" msgstr "" -#: mmo.c:3141 +#: mmo.c:3143 #, c-format msgid "" "%s: invalid start address for initialized registers of length %ld: 0x%lx%" "08lx\n" msgstr "" -#: oasys.c:874 +#: oasys.c:876 #, c-format msgid "%s: can not represent section `%s' in oasys" msgstr "" @@ -3019,77 +3061,77 @@ msgstr "" msgid "%s: `%s' in loader reloc but not loader sym" msgstr "" -#: elf32-ia64.c:1138 elf64-ia64.c:1138 +#: elf32-ia64.c:1139 elf64-ia64.c:1139 msgid "" "%B: Can't relax br at 0x%lx in section `%A'. Please use brl or indirect " "branch." msgstr "" -#: elf32-ia64.c:2491 elf64-ia64.c:2491 +#: elf32-ia64.c:2508 elf64-ia64.c:2508 msgid "@pltoff reloc against local symbol" msgstr "" -#: elf32-ia64.c:3932 elf64-ia64.c:3932 +#: elf32-ia64.c:3955 elf64-ia64.c:3955 #, c-format msgid "%s: short data segment overflowed (0x%lx >= 0x400000)" msgstr "" -#: elf32-ia64.c:3943 elf64-ia64.c:3943 +#: elf32-ia64.c:3966 elf64-ia64.c:3966 #, c-format msgid "%s: __gp does not cover short data segment" msgstr "" -#: elf32-ia64.c:4190 elf64-ia64.c:4190 +#: elf32-ia64.c:4213 elf64-ia64.c:4213 msgid "%B: non-pic code with imm relocation against dynamic symbol `%s'" msgstr "" -#: elf32-ia64.c:4257 elf64-ia64.c:4257 +#: elf32-ia64.c:4280 elf64-ia64.c:4280 msgid "%B: @gprel relocation against dynamic symbol %s" msgstr "" -#: elf32-ia64.c:4320 elf64-ia64.c:4320 +#: elf32-ia64.c:4343 elf64-ia64.c:4343 msgid "%B: linking non-pic code in a position independent executable" msgstr "" -#: elf32-ia64.c:4457 elf64-ia64.c:4457 +#: elf32-ia64.c:4480 elf64-ia64.c:4480 msgid "%B: @internal branch to dynamic symbol %s" msgstr "" -#: elf32-ia64.c:4459 elf64-ia64.c:4459 +#: elf32-ia64.c:4482 elf64-ia64.c:4482 msgid "%B: speculation fixup to dynamic symbol %s" msgstr "" -#: elf32-ia64.c:4461 elf64-ia64.c:4461 +#: elf32-ia64.c:4484 elf64-ia64.c:4484 msgid "%B: @pcrel relocation against dynamic symbol %s" msgstr "" -#: elf32-ia64.c:4668 elf64-ia64.c:4668 +#: elf32-ia64.c:4691 elf64-ia64.c:4691 msgid "unsupported reloc" msgstr "" -#: elf32-ia64.c:4701 elf64-ia64.c:4701 +#: elf32-ia64.c:4724 elf64-ia64.c:4724 msgid "" "%B: Can't relax br (%s) to `%s' at 0x%lx in section `%A' with size 0x%lx (> " "0x1000000)." msgstr "" -#: elf32-ia64.c:4962 elf64-ia64.c:4962 +#: elf32-ia64.c:4985 elf64-ia64.c:4985 msgid "%B: linking trap-on-NULL-dereference with non-trapping files" msgstr "" -#: elf32-ia64.c:4971 elf64-ia64.c:4971 +#: elf32-ia64.c:4994 elf64-ia64.c:4994 msgid "%B: linking big-endian files with little-endian files" msgstr "" -#: elf32-ia64.c:4980 elf64-ia64.c:4980 +#: elf32-ia64.c:5003 elf64-ia64.c:5003 msgid "%B: linking 64-bit files with 32-bit files" msgstr "" -#: elf32-ia64.c:4989 elf64-ia64.c:4989 +#: elf32-ia64.c:5012 elf64-ia64.c:5012 msgid "%B: linking constant-gp files with non-constant-gp files" msgstr "" -#: elf32-ia64.c:4999 elf64-ia64.c:4999 +#: elf32-ia64.c:5022 elf64-ia64.c:5022 msgid "%B: linking auto-pic files with non-auto-pic files" msgstr "" @@ -3224,21 +3266,28 @@ msgid "" "There is a first thunk, but the section containing it could not be found\n" msgstr "" -#: peigen.c:1368 pepigen.c:1368 +#: peigen.c:1365 pepigen.c:1365 #, c-format msgid "" "\n" "There is an export table, but the section containing it could not be found\n" msgstr "" -#: peigen.c:1373 pepigen.c:1373 +#: peigen.c:1374 pepigen.c:1374 +#, c-format +msgid "" +"\n" +"There is an export table in %s, but it does not fit into that section\n" +msgstr "" + +#: peigen.c:1380 pepigen.c:1380 #, c-format msgid "" "\n" "There is an export table in %s at 0x%lx\n" msgstr "" -#: peigen.c:1404 pepigen.c:1404 +#: peigen.c:1408 pepigen.c:1408 #, c-format msgid "" "\n" @@ -3246,128 +3295,128 @@ msgid "" "\n" msgstr "" -#: peigen.c:1408 pepigen.c:1408 +#: peigen.c:1412 pepigen.c:1412 #, c-format msgid "Export Flags \t\t\t%lx\n" msgstr "" -#: peigen.c:1411 pepigen.c:1411 +#: peigen.c:1415 pepigen.c:1415 #, c-format msgid "Time/Date stamp \t\t%lx\n" msgstr "" -#: peigen.c:1414 pepigen.c:1414 +#: peigen.c:1418 pepigen.c:1418 #, c-format msgid "Major/Minor \t\t\t%d/%d\n" msgstr "" -#: peigen.c:1417 pepigen.c:1417 +#: peigen.c:1421 pepigen.c:1421 #, c-format msgid "Name \t\t\t\t" msgstr "" -#: peigen.c:1423 pepigen.c:1423 +#: peigen.c:1427 pepigen.c:1427 #, c-format msgid "Ordinal Base \t\t\t%ld\n" msgstr "" -#: peigen.c:1426 pepigen.c:1426 +#: peigen.c:1430 pepigen.c:1430 #, c-format msgid "Number in:\n" msgstr "" -#: peigen.c:1429 pepigen.c:1429 +#: peigen.c:1433 pepigen.c:1433 #, c-format msgid "\tExport Address Table \t\t%08lx\n" msgstr "" -#: peigen.c:1433 pepigen.c:1433 +#: peigen.c:1437 pepigen.c:1437 #, c-format msgid "\t[Name Pointer/Ordinal] Table\t%08lx\n" msgstr "" -#: peigen.c:1436 pepigen.c:1436 +#: peigen.c:1440 pepigen.c:1440 #, c-format msgid "Table Addresses\n" msgstr "" -#: peigen.c:1439 pepigen.c:1439 +#: peigen.c:1443 pepigen.c:1443 #, c-format msgid "\tExport Address Table \t\t" msgstr "" -#: peigen.c:1444 pepigen.c:1444 +#: peigen.c:1448 pepigen.c:1448 #, c-format msgid "\tName Pointer Table \t\t" msgstr "" -#: peigen.c:1449 pepigen.c:1449 +#: peigen.c:1453 pepigen.c:1453 #, c-format msgid "\tOrdinal Table \t\t\t" msgstr "" -#: peigen.c:1463 pepigen.c:1463 +#: peigen.c:1467 pepigen.c:1467 #, c-format msgid "" "\n" "Export Address Table -- Ordinal Base %ld\n" msgstr "" -#: peigen.c:1482 pepigen.c:1482 +#: peigen.c:1486 pepigen.c:1486 msgid "Forwarder RVA" msgstr "" -#: peigen.c:1493 pepigen.c:1493 +#: peigen.c:1497 pepigen.c:1497 msgid "Export RVA" msgstr "" -#: peigen.c:1500 pepigen.c:1500 +#: peigen.c:1504 pepigen.c:1504 #, c-format msgid "" "\n" "[Ordinal/Name Pointer] Table\n" msgstr "" -#: peigen.c:1553 pepigen.c:1553 +#: peigen.c:1557 pepigen.c:1557 #, c-format msgid "Warning, .pdata section size (%ld) is not a multiple of %d\n" msgstr "" -#: peigen.c:1557 pepigen.c:1557 +#: peigen.c:1561 pepigen.c:1561 #, c-format msgid "" "\n" "The Function Table (interpreted .pdata section contents)\n" msgstr "" -#: peigen.c:1560 pepigen.c:1560 +#: peigen.c:1564 pepigen.c:1564 #, c-format msgid " vma:\t\t\tBegin Address End Address Unwind Info\n" msgstr "" -#: peigen.c:1562 pepigen.c:1562 +#: peigen.c:1566 pepigen.c:1566 #, c-format msgid "" " vma:\t\tBegin End EH EH PrologEnd Exception\n" " \t\tAddress Address Handler Data Address Mask\n" msgstr "" -#: peigen.c:1632 pepigen.c:1632 +#: peigen.c:1636 pepigen.c:1636 #, c-format msgid " Register save millicode" msgstr "" -#: peigen.c:1635 pepigen.c:1635 +#: peigen.c:1639 pepigen.c:1639 #, c-format msgid " Register restore millicode" msgstr "" -#: peigen.c:1638 pepigen.c:1638 +#: peigen.c:1642 pepigen.c:1642 #, c-format msgid " Glue code sequence" msgstr "" -#: peigen.c:1688 pepigen.c:1688 +#: peigen.c:1692 pepigen.c:1692 #, c-format msgid "" "\n" @@ -3375,14 +3424,14 @@ msgid "" "PE File Base Relocations (interpreted .reloc section contents)\n" msgstr "" -#: peigen.c:1718 pepigen.c:1718 +#: peigen.c:1722 pepigen.c:1722 #, c-format msgid "" "\n" "Virtual Address: %08lx Chunk size %ld (0x%lx) Number of fixups %ld\n" msgstr "" -#: peigen.c:1731 pepigen.c:1731 +#: peigen.c:1735 pepigen.c:1735 #, c-format msgid "\treloc %4d offset %4x [%4lx] %s" msgstr "" @@ -3390,7 +3439,7 @@ msgstr "" #. The MS dumpbin program reportedly ands with 0xff0f before #. printing the characteristics field. Not sure why. No reason to #. emulate it here. -#: peigen.c:1769 pepigen.c:1769 +#: peigen.c:1773 pepigen.c:1773 #, c-format msgid "" "\n" diff --git a/bfd/reloc.c b/bfd/reloc.c index ba8e14c7a42..ea73d137372 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c @@ -4574,6 +4574,11 @@ ENUMDOC internally by the linker after analysis of a BFD_RELOC_XTENSA_ASM_EXPAND. +ENUM + BFD_RELOC_Z80_DISP8 +ENUMDOC + 8 bit signed offset in (ix+d) or (iy+d). + ENUM BFD_RELOC_Z8K_DISP7 ENUMDOC diff --git a/bfd/rs6000-core.c b/bfd/rs6000-core.c index 22e61cc63c4..280a020a754 100644 --- a/bfd/rs6000-core.c +++ b/bfd/rs6000-core.c @@ -71,6 +71,9 @@ #include #include +/* Borrowed from on recent AIX versions. */ +typedef unsigned long ptr_to_uint; + #define core_hdr(bfd) ((CoreHdr *) bfd->tdata.any) /* AIX 4.1 changed the names and locations of a few items in the core file. @@ -250,6 +253,15 @@ typedef union { #define CORE_COMMONSZ ((int) &((struct core_dump *) 0)->c_entries \ + sizeof (((struct core_dump *) 0)->c_entries)) +/* Define prototypes for certain functions, to avoid a compiler warning + saying that they are missing. */ + +const bfd_target * rs6000coff_core_p (bfd *abfd); +bfd_boolean rs6000coff_core_file_matches_executable_p (bfd *core_bfd, + bfd *exec_bfd); +char * rs6000coff_core_file_failing_command (bfd *abfd); +int rs6000coff_core_file_failing_signal (bfd *abfd); + /* Try to read into CORE the header from the core file associated with ABFD. Return success. */ @@ -277,13 +289,8 @@ read_hdr (bfd *abfd, CoreHdr *core) } static asection * -make_bfd_asection (abfd, name, flags, size, vma, filepos) - bfd *abfd; - const char *name; - flagword flags; - bfd_size_type size; - bfd_vma vma; - file_ptr filepos; +make_bfd_asection (bfd *abfd, const char *name, flagword flags, + bfd_size_type size, bfd_vma vma, file_ptr filepos) { asection *asect; @@ -304,8 +311,7 @@ make_bfd_asection (abfd, name, flags, size, vma, filepos) magic number or anything like, in rs6000coff. */ const bfd_target * -rs6000coff_core_p (abfd) - bfd *abfd; +rs6000coff_core_p (bfd *abfd) { CoreHdr core; struct stat statbuf; @@ -341,11 +347,11 @@ rs6000coff_core_p (abfd) else { c_flag = core.old.c_flag; - c_stack = (file_ptr) core.old.c_stack; + c_stack = (file_ptr) (ptr_to_uint) core.old.c_stack; c_size = core.old.c_size; c_stackend = COLD_STACKEND; c_lsize = 0x7ffffff; - c_loader = (file_ptr) COLD_LOADER (core.old); + c_loader = (file_ptr) (ptr_to_uint) COLD_LOADER (core.old); proc64 = 0; } @@ -523,9 +529,9 @@ rs6000coff_core_p (abfd) else { c_datasize = core.old.c_datasize; - c_data = (file_ptr) core.old.c_data; + c_data = (file_ptr) (ptr_to_uint) core.old.c_data; c_vmregions = core.old.c_vmregions; - c_vmm = (file_ptr) core.old.c_vmm; + c_vmm = (file_ptr) (ptr_to_uint) core.old.c_vmm; } /* .data section from executable. */ @@ -633,9 +639,7 @@ rs6000coff_core_p (abfd) /* Return `TRUE' if given core is from the given executable. */ bfd_boolean -rs6000coff_core_file_matches_executable_p (core_bfd, exec_bfd) - bfd *core_bfd; - bfd *exec_bfd; +rs6000coff_core_file_matches_executable_p (bfd *core_bfd, bfd *exec_bfd) { CoreHdr core; bfd_size_type size; @@ -651,7 +655,7 @@ rs6000coff_core_file_matches_executable_p (core_bfd, exec_bfd) if (CORE_NEW (core)) c_loader = CNEW_LOADER (core.new); else - c_loader = (file_ptr) COLD_LOADER (core.old); + c_loader = (file_ptr) (ptr_to_uint) COLD_LOADER (core.old); if (CORE_NEW (core) && CNEW_PROC64 (core.new)) size = (int) ((LdInfo *) 0)->l64.ldinfo_filename; @@ -711,8 +715,7 @@ rs6000coff_core_file_matches_executable_p (core_bfd, exec_bfd) } char * -rs6000coff_core_file_failing_command (abfd) - bfd *abfd; +rs6000coff_core_file_failing_command (bfd *abfd) { CoreHdr *core = core_hdr (abfd); char *com = CORE_NEW (*core) ? @@ -725,8 +728,7 @@ rs6000coff_core_file_failing_command (abfd) } int -rs6000coff_core_file_failing_signal (abfd) - bfd *abfd; +rs6000coff_core_file_failing_signal (bfd *abfd) { CoreHdr *core = core_hdr (abfd); return CORE_NEW (*core) ? core->new.c_signo : core->old.c_signo; diff --git a/bfd/sco5-core.c b/bfd/sco5-core.c index e9b5159e6b3..d10dbfa9d3d 100644 --- a/bfd/sco5-core.c +++ b/bfd/sco5-core.c @@ -1,5 +1,5 @@ /* BFD back end for SCO5 core files (U-area and raw sections) - Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004 + Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. Written by Jouke Numan @@ -31,8 +31,10 @@ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. #include #include /* After a.out.h */ +#ifdef SCO5_CORE #include #include +#endif struct sco5_core_struct { @@ -126,14 +128,11 @@ sco5_core_file_p (abfd) /* Read coreoffsets region at end of core (see core(FP)). */ { - FILE *stream = bfd_cache_lookup (abfd); struct stat statbuf; - if (fstat (fileno (stream), &statbuf) < 0) - { - bfd_set_error (bfd_error_system_call); - return NULL; - } + if (bfd_stat (abfd, &statbuf) < 0) + return NULL; + coresize = statbuf.st_size; } /* Last long in core is sizeof struct coreoffsets, read it */ diff --git a/bfd/targets.c b/bfd/targets.c index 271954fd9c0..8f5795c24a4 100644 --- a/bfd/targets.c +++ b/bfd/targets.c @@ -271,6 +271,7 @@ BFD_JUMP_TABLE macros. .#define BFD_JUMP_TABLE_COPY(NAME) \ . NAME##_bfd_copy_private_bfd_data, \ . NAME##_bfd_merge_private_bfd_data, \ +. _bfd_generic_init_private_section_data, \ . NAME##_bfd_copy_private_section_data, \ . NAME##_bfd_copy_private_symbol_data, \ . NAME##_bfd_copy_private_header_data, \ @@ -283,6 +284,12 @@ BFD_JUMP_TABLE macros. . {* Called to merge BFD general private data from one object file . to a common output file when linking. *} . bfd_boolean (*_bfd_merge_private_bfd_data) (bfd *, bfd *); +. {* Called to initialize BFD private section data from one object file +. to another. *} +.#define bfd_init_private_section_data(ibfd, isec, obfd, osec, link_info) \ +. BFD_SEND (obfd, _bfd_init_private_section_data, (ibfd, isec, obfd, osec, link_info)) +. bfd_boolean (*_bfd_init_private_section_data) +. (bfd *, sec_ptr, bfd *, sec_ptr, struct bfd_link_info *); . {* Called to copy BFD private section data from one object file . to another. *} . bfd_boolean (*_bfd_copy_private_section_data) @@ -775,6 +782,7 @@ extern const bfd_target vms_alpha_vec; extern const bfd_target vms_vax_vec; extern const bfd_target w65_vec; extern const bfd_target we32kcoff_vec; +extern const bfd_target z80coff_vec; extern const bfd_target z8kcoff_vec; /* These are always included. */ @@ -1127,6 +1135,7 @@ static const bfd_target * const _bfd_target_vector[] = { &vms_vax_vec, &w65_vec, &we32kcoff_vec, + &z80coff_vec, &z8kcoff_vec, &bfd_elf32_am33lin_vec, #endif /* not SELECT_VECS */ diff --git a/bfd/trad-core.c b/bfd/trad-core.c index defad69f467..2f8c9f9ca5f 100644 --- a/bfd/trad-core.c +++ b/bfd/trad-core.c @@ -1,6 +1,6 @@ /* BFD back end for traditional Unix core files (U-area and raw sections) Copyright 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, - 2000, 2001, 2002, 2003, 2004 + 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. Written by John Gilmore of Cygnus Support. @@ -109,14 +109,11 @@ trad_unix_core_file_p (abfd) /* Check that the size claimed is no greater than the file size. */ { - FILE *stream = bfd_cache_lookup (abfd); struct stat statbuf; - if (fstat (fileno (stream), &statbuf) < 0) - { - bfd_set_error (bfd_error_system_call); - return 0; - } + if (bfd_stat (abfd, &statbuf) < 0) + return 0; + if ((unsigned long) (NBPG * (UPAGES + u.u_dsize #ifdef TRAD_CORE_DSIZE_INCLUDES_TSIZE - u.u_tsize diff --git a/bfd/version.h b/bfd/version.h index 946a15362ba..c9200e1dede 100644 --- a/bfd/version.h +++ b/bfd/version.h @@ -1,3 +1,3 @@ -#define BFD_VERSION_DATE 20051020 +#define BFD_VERSION_DATE 20051101 #define BFD_VERSION @bfd_version@ #define BFD_VERSION_STRING @bfd_version_string@ diff --git a/bfd/xcoff-target.h b/bfd/xcoff-target.h index 04bafd02413..7e73cf26a59 100644 --- a/bfd/xcoff-target.h +++ b/bfd/xcoff-target.h @@ -63,8 +63,8 @@ #undef CORE_FILE_P #define CORE_FILE_P rs6000coff_core_p -extern const bfd_target * rs6000coff_core_p (void); -extern bfd_boolean rs6000coff_core_file_matches_executable_p (void); +extern const bfd_target * rs6000coff_core_p (bfd *); +extern bfd_boolean rs6000coff_core_file_matches_executable_p (bfd *, bfd*); #undef coff_core_file_matches_executable_p #define coff_core_file_matches_executable_p \ diff --git a/cpu/ChangeLog b/cpu/ChangeLog index 0d8f21d9136..1fc6255def0 100644 --- a/cpu/ChangeLog +++ b/cpu/ChangeLog @@ -1,3 +1,57 @@ +2005-10-28 Dave Brolley + + Contribute the following change: + 2003-09-24 Dave Brolley + + * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of + CGEN_ATTR_VALUE_TYPE. + * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE. + Use cgen_bitset_intersect_p. + +2005-10-27 DJ Delorie + + * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New. + (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn, + arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which + imm operand is needed. + (adjnz, sbjnz): Pass the right operands. + (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach, + unary-insn): Add -g variants for opcodes that need to support :G. + (not.BW:G, push.BW:G): Call it. + (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb, + stzx16-imm8-imm8-abs16): Fix operand typos. + * m32c.opc (m32c_asm_hash): Support bnCND. + (parse_signed4n, print_signed4n): New. + +2005-10-26 DJ Delorie + + * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New. + (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn, + mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn): + dsp8[sp] is signed. + (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff). + (mov.BW:S r0,r1): Fix typo r1l->r1. + (tst): Allow :G suffix. + * m32c.opc (parse_signed24): New, for -0x800000..0xffffff. + +2005-10-26 Kazuhiro Inaoka + + * m32r.opc (parse_hi16): Do not assume a 32-bit host word size. + +2005-10-25 DJ Delorie + + * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by + making one a macro of the other. + +2005-10-21 DJ Delorie + + * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing. + (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl, + indexld, indexls): .w variants have `1' bit. + (rot32.b): QI, not SI. + (rot32.w): HI, not SI. + (xchg16): HI for .w variant. + 2005-10-19 Nick Clifton * m32r.opc (parse_slo16): Fix bad application of previous patch. diff --git a/cpu/frv.opc b/cpu/frv.opc index c3e8405b49a..5d2dc896039 100644 --- a/cpu/frv.opc +++ b/cpu/frv.opc @@ -50,7 +50,7 @@ #define FRV_VLIW_SIZE 8 /* fr550 has largest vliw size of 8. */ #define PAD_VLIW_COMBO ,UNIT_NIL,UNIT_NIL,UNIT_NIL,UNIT_NIL -typedef CGEN_ATTR_VALUE_TYPE VLIW_COMBO[FRV_VLIW_SIZE]; +typedef CGEN_ATTR_VALUE_ENUM_TYPE VLIW_COMBO[FRV_VLIW_SIZE]; typedef struct { @@ -58,15 +58,15 @@ typedef struct int constraint_violation; unsigned long mach; unsigned long elf_flags; - CGEN_ATTR_VALUE_TYPE * unit_mapping; + CGEN_ATTR_VALUE_ENUM_TYPE * unit_mapping; VLIW_COMBO * current_vliw; - CGEN_ATTR_VALUE_TYPE major[FRV_VLIW_SIZE]; + CGEN_ATTR_VALUE_ENUM_TYPE major[FRV_VLIW_SIZE]; const CGEN_INSN * insn[FRV_VLIW_SIZE]; } FRV_VLIW; -int frv_is_branch_major (CGEN_ATTR_VALUE_TYPE, unsigned long); -int frv_is_float_major (CGEN_ATTR_VALUE_TYPE, unsigned long); -int frv_is_media_major (CGEN_ATTR_VALUE_TYPE, unsigned long); +int frv_is_branch_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long); +int frv_is_float_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long); +int frv_is_media_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long); int frv_is_branch_insn (const CGEN_INSN *); int frv_is_float_insn (const CGEN_INSN *); int frv_is_media_insn (const CGEN_INSN *); @@ -83,7 +83,7 @@ int spr_valid (long); development tree. */ bfd_boolean -frv_is_branch_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach) +frv_is_branch_major (CGEN_ATTR_VALUE_ENUM_TYPE major, unsigned long mach) { switch (mach) { @@ -107,7 +107,7 @@ frv_is_branch_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach) /* Returns TRUE if {MAJOR,MACH} supports floating point insns. */ bfd_boolean -frv_is_float_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach) +frv_is_float_major (CGEN_ATTR_VALUE_ENUM_TYPE major, unsigned long mach) { switch (mach) { @@ -126,7 +126,7 @@ frv_is_float_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach) /* Returns TRUE if {MAJOR,MACH} supports media insns. */ bfd_boolean -frv_is_media_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach) +frv_is_media_major (CGEN_ATTR_VALUE_ENUM_TYPE major, unsigned long mach) { switch (mach) { @@ -270,7 +270,7 @@ static VLIW_COMBO fr550_allowed_vliw[] = /* Some insns are assigned specialized implementation units which map to different actual implementation units on different machines. These tables perform that mapping. */ -static CGEN_ATTR_VALUE_TYPE fr400_unit_mapping[] = +static CGEN_ATTR_VALUE_ENUM_TYPE fr400_unit_mapping[] = { /* unit in insn actual unit */ /* NIL */ UNIT_NIL, @@ -305,7 +305,7 @@ static CGEN_ATTR_VALUE_TYPE fr400_unit_mapping[] = /* Some insns are assigned specialized implementation units which map to different actual implementation units on different machines. These tables perform that mapping. */ -static CGEN_ATTR_VALUE_TYPE fr450_unit_mapping[] = +static CGEN_ATTR_VALUE_ENUM_TYPE fr450_unit_mapping[] = { /* unit in insn actual unit */ /* NIL */ UNIT_NIL, @@ -337,7 +337,7 @@ static CGEN_ATTR_VALUE_TYPE fr450_unit_mapping[] = /* MCLRACC-1*/ UNIT_FM0 /* mclracc,A==1 insn only in FM0 unit. */ }; -static CGEN_ATTR_VALUE_TYPE fr500_unit_mapping[] = +static CGEN_ATTR_VALUE_ENUM_TYPE fr500_unit_mapping[] = { /* unit in insn actual unit */ /* NIL */ UNIT_NIL, @@ -369,7 +369,7 @@ static CGEN_ATTR_VALUE_TYPE fr500_unit_mapping[] = /* MCLRACC-1*/ UNIT_FM01 /* mclracc,A==1 in FM0 or FM1 unit. */ }; -static CGEN_ATTR_VALUE_TYPE fr550_unit_mapping[] = +static CGEN_ATTR_VALUE_ENUM_TYPE fr550_unit_mapping[] = { /* unit in insn actual unit */ /* NIL */ UNIT_NIL, @@ -435,7 +435,7 @@ frv_vliw_reset (FRV_VLIW *vliw, unsigned long mach, unsigned long elf_flags) *_allowed_vliw tables above. */ static bfd_boolean match_unit (FRV_VLIW *vliw, - CGEN_ATTR_VALUE_TYPE unit1, CGEN_ATTR_VALUE_TYPE unit2) + CGEN_ATTR_VALUE_ENUM_TYPE unit1, CGEN_ATTR_VALUE_ENUM_TYPE unit2) { /* Map any specialized implementation units to actual ones. */ unit1 = vliw->unit_mapping[unit1]; @@ -487,7 +487,7 @@ match_vliw (VLIW_COMBO *vliw1, VLIW_COMBO *vliw2, int vliw_size) If one is found then return it. Otherwise return NULL. */ static VLIW_COMBO * -add_next_to_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE unit) +add_next_to_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE unit) { int next = vliw->next_slot; VLIW_COMBO *current = vliw->current_vliw; @@ -518,7 +518,7 @@ add_next_to_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE unit) Returns TRUE if found, FALSE otherwise. */ static bfd_boolean -find_major_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major) +find_major_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major) { int i; @@ -533,7 +533,7 @@ find_major_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major) types. */ static bfd_boolean -fr400_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major) +fr400_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major) { /* In the cpu file, all media insns are represented as being allowed in both media units. This makes it easier since this is the case for fr500. @@ -553,9 +553,9 @@ fr400_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major) } static bfd_boolean -fr450_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major) +fr450_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major) { - CGEN_ATTR_VALUE_TYPE other_major; + CGEN_ATTR_VALUE_ENUM_TYPE other_major; /* Our caller guarantees there's at least one other instruction. */ other_major = CGEN_INSN_ATTR_VALUE (vliw->insn[0], CGEN_INSN_FR450_MAJOR); @@ -588,7 +588,7 @@ fr450_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major) } static bfd_boolean -find_unit_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE unit) +find_unit_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE unit) { int i; @@ -601,8 +601,8 @@ find_unit_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE unit) static bfd_boolean find_major_in_slot (FRV_VLIW *vliw, - CGEN_ATTR_VALUE_TYPE major, - CGEN_ATTR_VALUE_TYPE slot) + CGEN_ATTR_VALUE_ENUM_TYPE major, + CGEN_ATTR_VALUE_ENUM_TYPE slot) { int i; @@ -657,11 +657,11 @@ fr550_find_float_in_vliw (FRV_VLIW *vliw) static bfd_boolean fr550_check_insn_major_constraints (FRV_VLIW *vliw, - CGEN_ATTR_VALUE_TYPE major, + CGEN_ATTR_VALUE_ENUM_TYPE major, const CGEN_INSN *insn) { - CGEN_ATTR_VALUE_TYPE unit; - CGEN_ATTR_VALUE_TYPE slot = (*vliw->current_vliw)[vliw->next_slot]; + CGEN_ATTR_VALUE_ENUM_TYPE unit; + CGEN_ATTR_VALUE_ENUM_TYPE slot = (*vliw->current_vliw)[vliw->next_slot]; switch (slot) { case UNIT_I2: @@ -707,7 +707,7 @@ fr550_check_insn_major_constraints (FRV_VLIW *vliw, } static bfd_boolean -fr500_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major) +fr500_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major) { /* TODO: A table might be faster for some of the more complex instances here. */ @@ -815,7 +815,7 @@ fr500_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major) static bfd_boolean check_insn_major_constraints (FRV_VLIW *vliw, - CGEN_ATTR_VALUE_TYPE major, + CGEN_ATTR_VALUE_ENUM_TYPE major, const CGEN_INSN *insn) { switch (vliw->mach) @@ -841,8 +841,8 @@ int frv_vliw_add_insn (FRV_VLIW *vliw, const CGEN_INSN *insn) { int index; - CGEN_ATTR_VALUE_TYPE major; - CGEN_ATTR_VALUE_TYPE unit; + CGEN_ATTR_VALUE_ENUM_TYPE major; + CGEN_ATTR_VALUE_ENUM_TYPE unit; VLIW_COMBO *new_vliw; if (vliw->constraint_violation || CGEN_INSN_INVALID_P (insn)) diff --git a/cpu/m32c.cpu b/cpu/m32c.cpu index 095e7cd12ae..cb892ffa859 100644 --- a/cpu/m32c.cpu +++ b/cpu/m32c.cpu @@ -557,6 +557,15 @@ (and UHI (srl UHI value 8) #x00ff) (and UHI (sll UHI value 8) #xff00))) ; extract ) +(df f-dsp-8-s24 "24 bit signed" (all-isas) 8 24 INT + ((value pc) (or SI + (or (srl value 16) (and value #xff00)) + (sll (ext INT (trunc QI (and value #xff))) 16))) + ((value pc) (or SI + (or (srl value 16) (and value #xff00)) + (sll (ext INT (trunc QI (and value #xff))) 16))) + ) + (df f-dsp-8-u24 "24 bit unsigned" (all-isas) 8 24 UINT ((value pc) (or SI (or (srl value 16) (and value #xff00)) @@ -1756,6 +1765,10 @@ h-sint DFLT f-dsp-8-s8 ((parse "signed8")) () () ) +(define-full-operand Dsp-8-s24 "signed 24 bit displacement at offset 8 bits" (all-isas) + h-sint DFLT f-dsp-8-s24 + ((parse "signed24")) () () +) (define-full-operand Dsp-8-u24 "unsigned 24 bit displacement at offset 8 bits" (all-isas) h-uint DFLT f-dsp-8-u24 ((parse "unsigned24")) () () @@ -1881,6 +1894,10 @@ h-sint DFLT f-imm-8-s4 ((parse "signed4")) () () ) +(define-full-operand Imm-8-s4n "negated 4 bit immediate at offset 8 bits" (all-isas) + h-sint DFLT f-imm-8-s4 + ((parse "signed4n")) () () +) (define-full-operand Imm-sh-8-s4 "signed 4 bit shift immediate at offset 8 bits" (all-isas) h-shimm DFLT f-imm-8-s4 () () () @@ -1897,6 +1914,10 @@ h-sint DFLT f-imm-12-s4 ((parse "signed4")) () () ) +(define-full-operand Imm-12-s4n "negated 4 bit immediate at offset 12 bits" (all-isas) + h-sint DFLT f-imm-12-s4 + ((parse "signed4n") (print "signed4n")) () () +) (define-full-operand Imm-sh-12-s4 "signed 4 bit shift immediate at offset 12 bits" (all-isas) h-shimm DFLT f-imm-12-s4 () () () @@ -5835,24 +5856,31 @@ ; Unary insn macros ;------------------------------------------------------------- -(define-pmacro (unary-insn-defn mach group mode wstr op encoding sem) +(define-pmacro (unary-insn-defn-g mach group mode wstr op encoding sem opg) (dni (.sym op mach wstr - group) - (.str op wstr " dst" mach "-" group "-" mode) + (.str op wstr opg " dst" mach "-" group "-" mode) ((machine mach)) - (.str op wstr " ${dst" mach "-" group "-" mode "}") + (.str op wstr opg " ${dst" mach "-" group "-" mode "}") encoding (sem mode (.sym dst mach - group - mode)) ()) ) +(define-pmacro (unary-insn-defn mach group mode wstr op encoding sem) + (unary-insn-defn-g mach group mode wstr op encoding sem "") +) + +(define-pmacro (unary16-defn-g mode wstr wbit op opc1 opc2 opc3 sem opg) + (unary-insn-defn-g 16 16 mode wstr op + (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16- mode)) + sem opg) +) (define-pmacro (unary16-defn mode wstr wbit op opc1 opc2 opc3 sem) - (unary-insn-defn 16 16 mode wstr op - (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16- mode)) - sem) + (unary-16-defn-g mode wstr wbit op opc1 opc2 opc3 sem "") ) -(define-pmacro (unary32-defn mode wstr wbit op opc1 opc2 opc3 sem) +(define-pmacro (unary32-defn-g mode wstr wbit op opc1 opc2 opc3 sem opg) (begin ; Multi insns are tried for assembly in the reverse order in which they appear here, so ; define the absolute-indirect insns first in order to prevent them from being selected @@ -5860,26 +5888,39 @@ ; (unary-insn-defn 32 24-absolute-indirect mode wstr op ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) (f-20-4 opc3)) ; sem) - (unary-insn-defn 32 16-Unprefixed mode wstr op - (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3)) - sem) + (unary-insn-defn-g 32 16-Unprefixed mode wstr op + (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3)) + sem opg) ; (unary-insn-defn 32 24-indirect mode wstr op ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (.sym dst32-24-indirect- mode) (f-18-2 opc2) (f-20-4 opc3)) ; sem) ) ) +(define-pmacro (unary32-defn mode wstr wbit op opc1 opc2 opc3 sem) + (unary32-defn-g mode wstr wbit op opc1 opc2 opc3 sem "") +) -(define-pmacro (unary-insn-mach mach op opc1 opc2 opc3 sem) +(define-pmacro (unary-insn-mach-g mach op opc1 opc2 opc3 sem opg) (begin - (.apply (.sym unary mach -defn) (QI .b 0 op opc1 opc2 opc3 sem)) - (.apply (.sym unary mach -defn) (HI .w 1 op opc1 opc2 opc3 sem)) + (.apply (.sym unary mach -defn-g) (QI .b 0 op opc1 opc2 opc3 sem opg)) + (.apply (.sym unary mach -defn-g) (HI .w 1 op opc1 opc2 opc3 sem opg)) ) ) +(define-pmacro (unary-insn-mach mach op opc1 opc2 opc3 sem) + (unary-insn-mach-g mach op opc1 opc2 opc3 sem "") +) (define-pmacro (unary-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem) (begin - (unary-insn-mach 16 op opc16-1 opc16-2 opc16-3 sem) - (unary-insn-mach 32 op opc32-1 opc32-2 opc32-3 sem) + (unary-insn-mach-g 16 op opc16-1 opc16-2 opc16-3 sem "") + (unary-insn-mach-g 32 op opc32-1 opc32-2 opc32-3 sem "") + ) +) + +(define-pmacro (unary-insn-g op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem) + (begin + (unary-insn-mach-g 16 op opc16-1 opc16-2 opc16-3 sem "$G") + (unary-insn-mach-g 32 op opc32-1 opc32-2 opc32-3 sem "$G") ) ) @@ -5997,10 +6038,10 @@ ;------------------------------------------------------------- (define-pmacro (binary-arith16-Q-sp op opc1 opc2 opc3 sem) - (dni (.sym op 16 -Q-sp) - (.str op ":Q #imm4,sp") + (dni (.sym op 16 -wQ-sp) + (.str op ".w:q #imm4,sp") ((machine 16)) - (.str op "${size}$Q #${Imm-12-s4},sp") + (.str op ".w$Q #${Imm-12-s4},sp") (+ opc1 opc2 opc3 Imm-12-s4) (sem QI Imm-12-s4 sp) ()) @@ -6542,49 +6583,49 @@ ) ; m16c variants -(define-pmacro (arith-jnz16-imm4-dst-defn mode wstr wbit op opc1 opc2 sem) +(define-pmacro (arith-jnz16-imm4-dst-defn mode wstr wbit op i4n opc1 opc2 sem) (begin - (arith-jnz-imm4-dst-defn 16 Imm-8-s4 basic Lab-16-8 mode wstr op - (+ opc1 opc2 (f-7-1 wbit) Imm-8-s4 (.sym dst16-basic- mode) Lab-16-8) + (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) basic Lab-16-8 mode wstr op + (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-basic- mode) Lab-16-8) sem) - (arith-jnz-imm4-dst-defn 16 Imm-8-s4 16-16 Lab-32-8 mode wstr op - (+ opc1 opc2 (f-7-1 wbit) Imm-8-s4 (.sym dst16-16-16- mode) Lab-16-8) + (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) 16-16 Lab-32-8 mode wstr op + (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-16-16- mode) Lab-16-8) sem) - (arith-jnz-imm4-dst-defn 16 Imm-8-s4 16-8 Lab-24-8 mode wstr op - (+ opc1 opc2 (f-7-1 wbit) Imm-8-s4 (.sym dst16-16-8- mode) Lab-16-8) + (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) 16-8 Lab-24-8 mode wstr op + (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-16-8- mode) Lab-16-8) sem) ) ) ; m32c variants -(define-pmacro (arith-jnz32-imm4-dst-defn mode wstr wbit op opc1 opc2 sem) +(define-pmacro (arith-jnz32-imm4-dst-defn mode wstr wbit op i4n opc1 opc2 sem) (begin - (arith-jnz-imm4-dst-defn 32 Imm-12-s4 basic-Unprefixed Lab-16-8 mode wstr op - (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) Imm-12-s4 Lab-16-8) + (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) basic-Unprefixed Lab-16-8 mode wstr op + (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-16-8) sem) - (arith-jnz-imm4-dst-defn 32 Imm-12-s4 16-24-Unprefixed Lab-40-8 mode wstr op - (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) Imm-12-s4 Lab-40-8) + (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-24-Unprefixed Lab-40-8 mode wstr op + (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-40-8) sem) - (arith-jnz-imm4-dst-defn 32 Imm-12-s4 16-16-Unprefixed Lab-32-8 mode wstr op - (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) Imm-12-s4 Lab-32-8) + (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-16-Unprefixed Lab-32-8 mode wstr op + (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-32-8) sem) - (arith-jnz-imm4-dst-defn 32 Imm-12-s4 16-8-Unprefixed Lab-24-8 mode wstr op - (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) Imm-12-s4 Lab-24-8) + (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-8-Unprefixed Lab-24-8 mode wstr op + (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-24-8) sem) ) ) -(define-pmacro (arith-jnz-imm4-dst-mach mach op opc1 opc2 sem) +(define-pmacro (arith-jnz-imm4-dst-mach mach op i4n opc1 opc2 sem) (begin - (.apply (.sym arith-jnz mach -imm4-dst-defn) (QI .b 0 op opc1 opc2 sem)) - (.apply (.sym arith-jnz mach -imm4-dst-defn) (HI .w 1 op opc1 opc2 sem)) + (.apply (.sym arith-jnz mach -imm4-dst-defn) (QI .b 0 op i4n opc1 opc2 sem)) + (.apply (.sym arith-jnz mach -imm4-dst-defn) (HI .w 1 op i4n opc1 opc2 sem)) ) ) -(define-pmacro (arith-jnz-imm4-dst op opc16-1 opc16-2 opc32-1 opc32-2 sem) +(define-pmacro (arith-jnz-imm4-dst op i4n opc16-1 opc16-2 opc32-1 opc32-2 sem) (begin - (arith-jnz-imm4-dst-mach 16 op opc16-1 opc16-2 sem) - (arith-jnz-imm4-dst-mach 32 op opc32-1 opc32-2 sem) + (arith-jnz-imm4-dst-mach 16 op i4n opc16-1 opc16-2 sem) + (arith-jnz-imm4-dst-mach 32 op i4n opc32-1 opc32-2 sem) ) ) @@ -6595,7 +6636,7 @@ (dni (.sym op mach wstr -dspsp-dst- dstgroup) (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode) ((machine mach)) - (.str op wstr " ${" dsp "}[sp],${dst" mach "-" dstgroup "-" mode "}") + (.str op wstr "$G ${" dsp "}[sp],${dst" mach "-" dstgroup "-" mode "}") encoding (sem mach mode dsp (.sym dst mach - dstgroup - mode)) ()) @@ -6604,7 +6645,7 @@ (dni (.sym op mach wstr -dst-dspsp- dstgroup) (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode) ((machine mach)) - (.str op wstr " ${dst" mach "-" dstgroup "-" mode "},${" dsp "}[sp]") + (.str op wstr "$G ${dst" mach "-" dstgroup "-" mode "},${" dsp "}[sp]") encoding (sem mach mode (.sym dst mach - dstgroup - mode) dsp) ()) @@ -6613,28 +6654,28 @@ ; m16c variants (define-pmacro (mov16-dspsp-dst-defn mode wstr wbit op opc1 opc2 opc3 sem) (begin - (mov-dspsp-dst-defn 16 basic Dsp-16-u8 mode wstr op - (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-u8) + (mov-dspsp-dst-defn 16 basic Dsp-16-s8 mode wstr op + (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-s8) sem) - (mov-dspsp-dst-defn 16 16-16 Dsp-32-u8 mode wstr op - (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-u8) + (mov-dspsp-dst-defn 16 16-16 Dsp-32-s8 mode wstr op + (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-s8) sem) - (mov-dspsp-dst-defn 16 16-8 Dsp-24-u8 mode wstr op - (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-u8) + (mov-dspsp-dst-defn 16 16-8 Dsp-24-s8 mode wstr op + (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-s8) sem) ) ) (define-pmacro (mov16-src-dspsp-defn mode wstr wbit op opc1 opc2 opc3 sem) (begin - (mov-src-dspsp-defn 16 basic Dsp-16-u8 mode wstr op - (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-u8) + (mov-src-dspsp-defn 16 basic Dsp-16-s8 mode wstr op + (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-s8) sem) - (mov-src-dspsp-defn 16 16-16 Dsp-32-u8 mode wstr op - (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-u8) + (mov-src-dspsp-defn 16 16-16 Dsp-32-s8 mode wstr op + (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-s8) sem) - (mov-src-dspsp-defn 16 16-8 Dsp-24-u8 mode wstr op - (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-u8) + (mov-src-dspsp-defn 16 16-8 Dsp-24-s8 mode wstr op + (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-s8) sem) ) ) @@ -6642,33 +6683,33 @@ ; m32c variants (define-pmacro (mov32-dspsp-dst-defn mode wstr wbit op opc1 opc2 opc3 sem) (begin - (mov-dspsp-dst-defn 32 basic-Unprefixed Dsp-16-u8 mode wstr op - (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-16-u8) + (mov-dspsp-dst-defn 32 basic-Unprefixed Dsp-16-s8 mode wstr op + (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-16-s8) sem) - (mov-dspsp-dst-defn 32 16-24-Unprefixed Dsp-40-u8 mode wstr op - (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-40-u8) + (mov-dspsp-dst-defn 32 16-24-Unprefixed Dsp-40-s8 mode wstr op + (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-40-s8) sem) - (mov-dspsp-dst-defn 32 16-16-Unprefixed Dsp-32-u8 mode wstr op - (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-32-u8) + (mov-dspsp-dst-defn 32 16-16-Unprefixed Dsp-32-s8 mode wstr op + (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-32-s8) sem) - (mov-dspsp-dst-defn 32 16-8-Unprefixed Dsp-24-u8 mode wstr op - (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-24-u8) + (mov-dspsp-dst-defn 32 16-8-Unprefixed Dsp-24-s8 mode wstr op + (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-24-s8) sem) ) ) (define-pmacro (mov32-src-dspsp-defn mode wstr wbit op opc1 opc2 opc3 sem) (begin - (mov-src-dspsp-defn 32 basic-Unprefixed Dsp-16-u8 mode wstr op - (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-16-u8) + (mov-src-dspsp-defn 32 basic-Unprefixed Dsp-16-s8 mode wstr op + (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-16-s8) sem) - (mov-src-dspsp-defn 32 16-24-Unprefixed Dsp-40-u8 mode wstr op - (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-40-u8) + (mov-src-dspsp-defn 32 16-24-Unprefixed Dsp-40-s8 mode wstr op + (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-40-s8) sem) - (mov-src-dspsp-defn 32 16-16-Unprefixed Dsp-32-u8 mode wstr op - (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-32-u8) + (mov-src-dspsp-defn 32 16-16-Unprefixed Dsp-32-s8 mode wstr op + (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-32-s8) sem) - (mov-src-dspsp-defn 32 16-8-Unprefixed Dsp-24-u8 mode wstr op - (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-24-u8) + (mov-src-dspsp-defn 32 16-8-Unprefixed Dsp-24-s8 mode wstr op + (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-24-s8) sem) ) ) @@ -6702,59 +6743,91 @@ ;------------------------------------------------------------- ; lde dsp24,dst -- for m16c -; TODO abs20[a0], [a0a1] for dsp24 ;------------------------------------------------------------- -(define-pmacro (lde-defn mach dstgroup dsp mode wstr op encoding sem) - (dni (.sym op mach wstr -dst-dspsp- dstgroup) - (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode) - ((machine mach)) - (.str op wstr " ${" dsp "},${dst" mach "-" dstgroup "-" mode "}") - encoding - (sem mode (.sym dst mach - dstgroup - mode) dsp) - ()) -) +(define-pmacro (lde-dst-dsp mode wstr wbit dstgroup srcdisp) + (begin + + (dni (.sym lde wstr - dstgroup -u20) + (.str "lde" wstr "-" dstgroup "-u20") + ((machine 16)) + (.str "lde" wstr " ${" srcdisp "},${dst16-" dstgroup "-" mode "}") + (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x8) + (.sym dst16- dstgroup - mode) srcdisp) + (nop) + ()) -(define-pmacro (lde-dst mode wstr wbit op opc1 opc2 opc3 sem) + (dni (.sym lde wstr - dstgroup -u20a0) + (.str "lde" wstr "-" dstgroup "-u20a0") + ((machine 16)) + (.str "lde" wstr " ${" srcdisp "}[a0],${dst16-" dstgroup "-" mode "}") + (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x9) + (.sym dst16- dstgroup - mode) srcdisp) + (nop) + ()) + + (dni (.sym lde wstr - dstgroup -a1a0) + (.str "lde" wstr "-" dstgroup "-a1a0") + ((machine 16)) + (.str "lde" wstr " [a1a0],${dst16-" dstgroup "-" mode "}") + (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #xa) + (.sym dst16- dstgroup - mode)) + (nop) + ()) + ) + ) + +(define-pmacro (lde-dst mode wstr wbit) (begin - (lde-defn 16 basic Dsp-16-u20 mode wstr op - (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-u20) - sem) - (lde-defn 16 16-16 Dsp-32-u20 mode wstr op - (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-u20) - sem) - (lde-defn 16 16-8 Dsp-24-u20 mode wstr op - (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-u20) - sem) + ; like: QI .b 0 + (lde-dst-dsp mode wstr wbit basic Dsp-16-u20) + (lde-dst-dsp mode wstr wbit 16-8 Dsp-24-u20) + (lde-dst-dsp mode wstr wbit 16-16 Dsp-32-u20) ) ) ;------------------------------------------------------------- -; ste src,dsp24 -- for m16c -; TODO abs20[a0], [a0a1] for dsp24 +; ste dst,dsp24 -- for m16c ;------------------------------------------------------------- -(define-pmacro (ste-defn mach dstgroup dsp mode wstr op encoding sem) - (dni (.sym op mach wstr -dst-dspsp- dstgroup) - (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode) - ((machine mach)) - (.str op wstr " ${dst" mach "-" dstgroup "-" mode "},${" dsp "}") - encoding - (sem mode (.sym dst mach - dstgroup - mode) dsp) - ()) -) +(define-pmacro (ste-dst-dsp mode wstr wbit dstgroup srcdisp) + (begin + + (dni (.sym ste wstr - dstgroup -u20) + (.str "ste" wstr "-" dstgroup "-u20") + ((machine 16)) + (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},${" srcdisp "}") + (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x0) + (.sym dst16- dstgroup - mode) srcdisp) + (nop) + ()) + + (dni (.sym ste wstr - dstgroup -u20a0) + (.str "ste" wstr "-" dstgroup "-u20a0") + ((machine 16)) + (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},${" srcdisp "}[a0]") + (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x1) + (.sym dst16- dstgroup - mode) srcdisp) + (nop) + ()) + + (dni (.sym ste wstr - dstgroup -a1a0) + (.str "ste" wstr "-" dstgroup "-a1a0") + ((machine 16)) + (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},[a1a0]") + (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x2) + (.sym dst16- dstgroup - mode)) + (nop) + ()) + ) + ) -(define-pmacro (ste-dst mode wstr wbit op opc1 opc2 opc3 sem) +(define-pmacro (ste-dst mode wstr wbit) (begin - (ste-defn 16 basic Dsp-16-u20 mode wstr op - (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-u20) - sem) - (ste-defn 16 16-16 Dsp-32-u20 mode wstr op - (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-u20) - sem) - (ste-defn 16 16-8 Dsp-24-u20 mode wstr op - (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-u20) - sem) + ; like: QI .b 0 + (ste-dst-dsp mode wstr wbit basic Dsp-16-u20) + (ste-dst-dsp mode wstr wbit 16-8 Dsp-24-u20) + (ste-dst-dsp mode wstr wbit 16-16 Dsp-32-u20) ) ) @@ -7091,6 +7164,9 @@ (binary-arith16-b-S-imm8-dst3 add ".b" (f-0-4 8) (f-4-1 0) add-sem) ; add.BW:Q #imm4,sp (m16 #7) (binary-arith16-Q-sp add (f-0-4 7) (f-4-4 #xD) (f-8-4 #xB) add-sem) +(dnmi add16-bQ-sp "add16-bQ-sp" () + "add.b:q #${Imm-12-s4},sp" + (emit add16-wQ-sp Imm-12-s4)) ; add.BW:G #imm,sp (m16 #6) (binary-arith16-G-sp add (f-0-4 7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #xB) add-sem) ; add.BW:G src,dst (m16 #4 m32 #6) @@ -7246,7 +7322,7 @@ ) ; adjnz.size #imm4,dst,label -(arith-jnz-imm4-dst adjnz (f-0-4 #xF) (f-4-3 4) #xf #x1 arith-jnz-sem) +(arith-jnz-imm4-dst adjnz s4 (f-0-4 #xF) (f-4-3 4) #xf #x1 arith-jnz-sem) ;------------------------------------------------------------- ; and - binary and @@ -7905,31 +7981,31 @@ ; indexb src (index byte) (unary32-defn QI .b 0 indexb #x8 0 #x3 indexb-sem) -(unary32-defn HI .w 0 indexb #x8 1 #x3 indexb-sem) +(unary32-defn HI .w 1 indexb #x8 1 #x3 indexb-sem) ; indexbd src (index byte dest) (unary32-defn QI .b 0 indexbd #xA 0 3 indexbd-sem) -(unary32-defn HI .w 0 indexbd #xA 1 3 indexbd-sem) +(unary32-defn HI .w 1 indexbd #xA 1 3 indexbd-sem) ; indexbs src (index byte src) (unary32-defn QI .b 0 indexbs #xC 0 3 indexbs-sem) -(unary32-defn HI .w 0 indexbs #xC 1 3 indexbs-sem) +(unary32-defn HI .w 1 indexbs #xC 1 3 indexbs-sem) ; indexl src (index long) (unary32-defn QI .b 0 indexl 9 2 3 indexl-sem) -(unary32-defn HI .w 0 indexl 9 3 3 indexl-sem) +(unary32-defn HI .w 1 indexl 9 3 3 indexl-sem) ; indexld src (index long dest) (unary32-defn QI .b 0 indexld #xB 2 3 indexld-sem) -(unary32-defn HI .w 0 indexld #xB 3 3 indexld-sem) +(unary32-defn HI .w 1 indexld #xB 3 3 indexld-sem) ; indexls src (index long src) (unary32-defn QI .b 0 indexls 9 0 3 indexls-sem) -(unary32-defn HI .w 0 indexls 9 1 3 indexls-sem) +(unary32-defn HI .w 1 indexls 9 1 3 indexls-sem) ; indexw src (index word) (unary32-defn QI .b 0 indexw 8 2 3 indexw-sem) -(unary32-defn HI .w 0 indexw 8 3 3 indexw-sem) +(unary32-defn HI .w 1 indexw 8 3 3 indexw-sem) ; indexwd src (index word dest) (unary32-defn QI .b 0 indexwd #xA 2 3 indexwd-sem) -(unary32-defn HI .w 0 indexwd #xA 3 3 indexwd-sem) +(unary32-defn HI .w 1 indexwd #xA 3 3 indexwd-sem) ; indexws (index word src) (unary32-defn QI .b 0 indexws #xC 2 3 indexws-sem) -(unary32-defn HI .w 0 indexws #xC 3 3 indexws-sem) +(unary32-defn HI .w 1 indexws #xC 3 3 indexws-sem) ;------------------------------------------------------------- ; jcc - jump on condition @@ -8450,21 +8526,11 @@ ; ste - store to extra far data area (m16) ;------------------------------------------------------------- -; A special variant of mem16 for lde and ste -(define-pmacro (extra-mem16 mode address) - (mem mode (and #xfffff address))) +(lde-dst QI .b 0) +(lde-dst HI .w 1) -(define-pmacro (lde-sem mode src1 dst) - (set mode src1 (extra-mem16 mode dst)) -) -(lde-dst QI .b 0 lde (f-0-4 #x7) (f-4-3 2) (f-8-4 #x8) lde-sem) -(lde-dst HI .w 1 lde (f-0-4 #x7) (f-4-3 2) (f-8-4 #x8) lde-sem) - -(define-pmacro (ste-sem mode src1 dst) - (set (extra-mem16 mode dst) src1) -) -(ste-dst QI .b 0 ste (f-0-4 #x7) (f-4-3 2) (f-8-4 #x0) ste-sem) -(ste-dst HI .w 1 ste (f-0-4 #x7) (f-4-3 2) (f-8-4 #x0) ste-sem) +(ste-dst QI .b 0) +(ste-dst HI .w 1) ;------------------------------------------------------------- ; ldipl - load interrupt permission level @@ -8575,8 +8641,8 @@ ) (mov32-wl-s-defn HI w #x9 Imm-8-HI a0 #xC) (mov32-wl-s-defn HI w #x9 Imm-8-HI a1 #xD) -(mov32-wl-s-defn SI l #xB Dsp-8-u24 a0 #xC) -(mov32-wl-s-defn SI l #xB Dsp-8-u24 a1 #xD) +(mov32-wl-s-defn SI l #xB Dsp-8-s24 a0 #xC) +(mov32-wl-s-defn SI l #xB Dsp-8-s24 a1 #xD) ; mov.size:Q #imm4,dst (m16 #2 m32 #3) (binary-arith16-imm4-dst-defn QI .b 0 0 mov (f-0-4 #xD) (f-4-3 4) mov-sem) @@ -8649,7 +8715,7 @@ (mov32-src-r b 0 QI dst32-2-S-8 r0l 0 4) (mov32-src-r w 1 HI dst32-2-S-8 r0 0 4) (mov32-src-r b 0 QI dst32-2-S-basic r1l 1 7) -(mov32-src-r w 1 HI dst32-2-S-basic r1l 1 7) +(mov32-src-r w 1 HI dst32-2-S-basic r1 1 7) (mov32-src-r b 0 QI dst32-2-S-16 r1l 1 7) (mov32-src-r w 1 HI dst32-2-S-16 r1 1 7) (mov32-src-r b 0 QI dst32-2-S-8 r1l 1 7) @@ -8890,7 +8956,15 @@ ) ; not.BW:G -(unary-insn not (f-0-4 7) (f-4-3 2) (f-8-4 #x7) #xA #x1 #xE not-sem) +(unary-insn-g not (f-0-4 7) (f-4-3 2) (f-8-4 #x7) #xA #x1 #xE not-sem) + +(dni not16.b.s + "not.b:s Dst16-3-S-8" + ((machine 16)) + "not.b:s ${Dst16-3-S-8}" + (+ (f-0-4 #xb) (f-4-1 #x1) Dst16-3-S-8) + (not-sem QI Dst16-3-S-8) + ()) ;------------------------------------------------------------- ; nop @@ -9279,7 +9353,7 @@ ()) ; push.BW:G src (m16 #2) -(unary-insn-mach 16 push (f-0-4 7) (f-4-3 2) (f-8-4 #x4) push-sem16) +(unary-insn-mach-g 16 push (f-0-4 7) (f-4-3 2) (f-8-4 #x4) push-sem16 $G) ; push.BW:G src (m32 #2) (unary-insn-mach 32 push #xC #x0 #xE push-sem32) @@ -9481,9 +9555,9 @@ ; rot.BW src,dst (dni rot16.b-dst "rot r1h,dest" ((machine 16)) - ("rot.b r1h,${dst16-16-HI}") - (+ (f-0-4 7) (f-4-4 #x4) (f-8-4 #x6) dst16-16-HI) - (rot-2-sem QI dst16-16-HI) + ("rot.b r1h,${dst16-16-QI}") + (+ (f-0-4 7) (f-4-4 #x4) (f-8-4 #x6) dst16-16-QI) + (rot-2-sem QI dst16-16-QI) ()) (dni rot16.w-dst "rot r1h,dest" ((machine 16)) ("rot.w r1h,${dst16-16-HI}") @@ -9492,14 +9566,14 @@ ()) (dni rot32.b-dst "rot r1h,dest" ((machine 32)) - ("rot.b r1h,${dst32-16-Unprefixed-SI}") - (+ (f-0-4 #xA) dst32-16-Unprefixed-SI (f-7-1 0) (f-10-2 3) (f-12-4 #xF)) - (rot-2-sem QI dst32-16-Unprefixed-SI) + ("rot.b r1h,${dst32-16-Unprefixed-QI}") + (+ (f-0-4 #xA) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xF)) + (rot-2-sem QI dst32-16-Unprefixed-QI) ()) (dni rot32.w-dst "rot r1h,dest" ((machine 32)) - ("rot.w r1h,${dst32-16-Unprefixed-SI}") - (+ (f-0-4 #xA) dst32-16-Unprefixed-SI (f-7-1 1) (f-10-2 3) (f-12-4 #xF)) - (rot-2-sem HI dst32-16-Unprefixed-SI) + ("rot.w r1h,${dst32-16-Unprefixed-HI}") + (+ (f-0-4 #xA) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xF)) + (rot-2-sem HI dst32-16-Unprefixed-HI) ()) ;------------------------------------------------------------- @@ -9575,7 +9649,7 @@ ) ; sbjnz.size #imm4,dst,label -(arith-jnz-imm4-dst sbjnz (f-0-4 #xF) (f-4-3 4) #xf #x1 sub-jnz-sem) +(arith-jnz-imm4-dst sbjnz s4n (f-0-4 #xF) (f-4-3 4) #xf #x1 sub-jnz-sem) ;------------------------------------------------------------- ; sccnd - store condition on condition (m32) @@ -10105,17 +10179,17 @@ (stzx-sem QI Imm-8-QI Imm-16-QI (reg h-r0l)) ()) (dni stzx16-imm8-imm8-dsp8sb "stzx #Imm8,#Imm8,dsp8[sb]" ((machine 16)) - ("stzx #${Imm-8-QI},#${Imm-16-QI},Dsp-24-u8[sb]") + ("stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-u8}[sb]") (+ (f-0-4 #xD) (f-4-4 #xD) Imm-8-QI Dsp-16-u8 Imm-24-QI) (stzx-sem QI Imm-8-QI Imm-16-QI (mem16 QI (add (reg h-sb) Dsp-24-u8))) ()) (dni stzx16-imm8-imm8-dsp8fb "stzx #Imm8,#Imm8,dsp8[fb]" ((machine 16)) - ("stzx #${Imm-8-QI},#${Imm-16-QI},Dsp-24-u8[fb]") - (+ (f-0-4 #xD) (f-4-4 #xE) Imm-8-QI Dsp-16-u8 Imm-24-QI) - (stzx-sem QI Imm-8-QI Imm-16-QI (mem16 QI (add (reg h-fb) Dsp-24-u8))) + ("stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-s8}[fb]") + (+ (f-0-4 #xD) (f-4-4 #xE) Imm-8-QI Dsp-16-s8 Imm-24-QI) + (stzx-sem QI Imm-8-QI Imm-24-QI (mem16 QI (add (reg h-fb) Dsp-16-s8))) ()) (dni stzx16-imm8-imm8-abs16 "stzx #Imm8,#Imm8,abs16" ((machine 16)) - ("stzx #${Imm-8-QI},#${Imm-16-QI},Dsp-24-u16") + ("stzx #${Imm-8-QI},#${Imm-32-QI},${Dsp-16-u16}") (+ (f-0-4 #xD) (f-4-4 #xE) Imm-8-QI Dsp-16-u16 Imm-32-QI) (stzx-sem QI Imm-8-QI Imm-32-QI (mem16 QI Dsp-16-u16)) ()) @@ -10149,12 +10223,12 @@ ) ; tst.BW #imm,dst (m16 #1 m32 #1) -(binary-arith-imm-dst tst X (f-0-4 7) (f-4-3 3) (f-8-4 0) #x9 #x3 #xE tst-sem) +(binary-arith-imm-dst tst G (f-0-4 7) (f-4-3 3) (f-8-4 0) #x9 #x3 #xE tst-sem) ; tst.BW src,dst (m16 #2 m32 #3) (binary-arith16-src-dst-defn QI QI .b 0 tst X (f-0-4 #x8) (f-4-3 0) tst-sem) (binary-arith16-src-dst-defn HI HI .w 1 tst X (f-0-4 #x8) (f-4-3 0) tst-sem) -(binary-arith32-src-dst-Prefixed QI QI .b 0 tst X #x1 #x9 tst-sem) -(binary-arith32-src-dst-Prefixed HI HI .w 1 tst X #x1 #x9 tst-sem) +(binary-arith32-src-dst-Prefixed QI QI .b 0 tst G #x1 #x9 tst-sem) +(binary-arith32-src-dst-Prefixed HI HI .w 1 tst G #x1 #x9 tst-sem) ; tst.BW:S #imm,dst2 (m32 #2) (binary-arith32-s-imm-dst QI .b 0 tst #x0 #x6 tst-sem) (binary-arith32-s-imm-dst HI .w 1 tst #x0 #x6 tst-sem) @@ -10215,7 +10289,7 @@ (xchg16-defn QI b 0 1 r0h) (xchg16-defn QI b 0 2 r1l) (xchg16-defn QI b 0 3 r1h) -(xchg16-defn QI w 1 0 r0) +(xchg16-defn HI w 1 0 r0) (xchg16-defn HI w 1 1 r1) (xchg16-defn HI w 1 2 r2) (xchg16-defn HI w 1 3 r3) diff --git a/cpu/m32c.opc b/cpu/m32c.opc index 19547ae694d..62353267f47 100644 --- a/cpu/m32c.opc +++ b/cpu/m32c.opc @@ -69,6 +69,10 @@ m32c_asm_hash (const char *mnem) if (mnem[0] == 's' && mnem[1] == 'c') return 's'; + /* Don't hash bmCND */ + if (mnem[0] == 'b' && mnem[1] == 'm') + return 'b'; + for (h = 0; *mnem && *mnem != ' ' && *mnem != ':'; ++mnem) h += *mnem; return h % CGEN_ASM_HASH_SIZE; @@ -217,6 +221,31 @@ parse_signed4 (CGEN_CPU_DESC cd, const char **strp, return 0; } +static const char * +parse_signed4n (CGEN_CPU_DESC cd, const char **strp, + int opindex, signed long *valuep) +{ + const char *errmsg = 0; + signed long value; + long have_zero = 0; + + if (strncmp (*strp, "0x0", 3) == 0 + || (**strp == '0' && *(*strp + 1) != 'x')) + have_zero = 1; + + PARSE_SIGNED; + + if (value < -7 || value > 8) + return _("Immediate is out of range -7 to 8"); + + /* If this field may require a relocation then use larger dsp16. */ + if (! have_zero && value == 0) + return _("Immediate is out of range -7 to 8"); + + *valuep = -value; + return 0; +} + static const char * parse_signed8 (CGEN_CPU_DESC cd, const char **strp, int opindex, signed long *valuep) @@ -433,6 +462,26 @@ parse_unsigned24 (CGEN_CPU_DESC cd, const char **strp, return 0; } +/* This should only be used for #imm->reg. */ +static const char * +parse_signed24 (CGEN_CPU_DESC cd, const char **strp, + int opindex, signed long *valuep) +{ + const char *errmsg = 0; + signed long value; + + PARSE_SIGNED; + + if (value <= 0xffffff && value > 0x7fffff) + value -= 0x1000000; + + if (value > 0xffffff) + return _("dsp:24 immediate is out of range"); + + *valuep = value; + return 0; +} + static const char * parse_signed32 (CGEN_CPU_DESC cd, const char **strp, int opindex, signed long *valuep) @@ -775,14 +824,14 @@ m32c_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn) { int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH); - int isas = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_ISA); + CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA); /* If attributes are absent, assume no restriction. */ if (machs == 0) machs = ~0; return ((machs & cd->machs) - && (isas & cd->isas)); + && cgen_bitset_intersect_p (& isas, cd->isas)); } /* Parse a set of registers, R0,R1,A0,A1,SB,FB. */ @@ -1072,3 +1121,16 @@ print_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { print_regset (cd, dis_info, value, attrs, pc, length, PUSH); } + +static void +print_signed4n (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + signed long value, + unsigned int attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ + disassemble_info *info = dis_info; + + (*info->fprintf_func) (info->stream, "%ld", -value); +} diff --git a/cpu/m32r.opc b/cpu/m32r.opc index f2351b106a6..ab69d078c86 100644 --- a/cpu/m32r.opc +++ b/cpu/m32r.opc @@ -127,7 +127,10 @@ parse_hi16 (CGEN_CPU_DESC cd, ++*strp; if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) - value >>= 16; + { + value >>= 16; + value &= 0xffff; + } *valuep = value; return errmsg; } @@ -142,8 +145,9 @@ parse_hi16 (CGEN_CPU_DESC cd, if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) { - value = value + (value & 0x8000 ? 0x10000 : 0); + value += 0x8000; value >>= 16; + value &= 0xffff; } *valuep = value; return errmsg; diff --git a/depcomp b/depcomp new file mode 100755 index 00000000000..3510ab0ff53 --- /dev/null +++ b/depcomp @@ -0,0 +1,553 @@ +#! /bin/sh +# depcomp - compile a program generating dependencies as side-effects + +scriptversion=2005-05-16.16 + +# Copyright (C) 1999, 2000, 2003, 2004, 2005 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA +# 02110-1301, USA. + +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that program. + +# Originally written by Alexandre Oliva . + +case $1 in + '') + echo "$0: No command. Try \`$0 --help' for more information." 1>&2 + exit 1; + ;; + -h | --h*) + cat <<\EOF +Usage: depcomp [--help] [--version] PROGRAM [ARGS] + +Run PROGRAMS ARGS to compile a file, generating dependencies +as side-effects. + +Environment variables: + depmode Dependency tracking mode. + source Source file read by `PROGRAMS ARGS'. + object Object file output by `PROGRAMS ARGS'. + DEPDIR directory where to store dependencies. + depfile Dependency file to output. + tmpdepfile Temporary file to use when outputing dependencies. + libtool Whether libtool is used (yes/no). + +Report bugs to . +EOF + exit $? + ;; + -v | --v*) + echo "depcomp $scriptversion" + exit $? + ;; +esac + +if test -z "$depmode" || test -z "$source" || test -z "$object"; then + echo "depcomp: Variables source, object and depmode must be set" 1>&2 + exit 1 +fi + +# Dependencies for sub/bar.o or sub/bar.obj go into sub/.deps/bar.Po. +depfile=${depfile-`echo "$object" | + sed 's|[^\\/]*$|'${DEPDIR-.deps}'/&|;s|\.\([^.]*\)$|.P\1|;s|Pobj$|Po|'`} +tmpdepfile=${tmpdepfile-`echo "$depfile" | sed 's/\.\([^.]*\)$/.T\1/'`} + +rm -f "$tmpdepfile" + +# Some modes work just like other modes, but use different flags. We +# parameterize here, but still list the modes in the big case below, +# to make depend.m4 easier to write. Note that we *cannot* use a case +# here, because this file can only contain one case statement. +if test "$depmode" = hp; then + # HP compiler uses -M and no extra arg. + gccflag=-M + depmode=gcc +fi + +if test "$depmode" = dashXmstdout; then + # This is just like dashmstdout with a different argument. + dashmflag=-xM + depmode=dashmstdout +fi + +case "$depmode" in +gcc3) +## gcc 3 implements dependency tracking that does exactly what +## we want. Yay! Note: for some reason libtool 1.4 doesn't like +## it if -MD -MP comes after the -MF stuff. Hmm. + "$@" -MT "$object" -MD -MP -MF "$tmpdepfile" + stat=$? + if test $stat -eq 0; then : + else + rm -f "$tmpdepfile" + exit $stat + fi + mv "$tmpdepfile" "$depfile" + ;; + +gcc) +## There are various ways to get dependency output from gcc. Here's +## why we pick this rather obscure method: +## - Don't want to use -MD because we'd like the dependencies to end +## up in a subdir. Having to rename by hand is ugly. +## (We might end up doing this anyway to support other compilers.) +## - The DEPENDENCIES_OUTPUT environment variable makes gcc act like +## -MM, not -M (despite what the docs say). +## - Using -M directly means running the compiler twice (even worse +## than renaming). + if test -z "$gccflag"; then + gccflag=-MD, + fi + "$@" -Wp,"$gccflag$tmpdepfile" + stat=$? + if test $stat -eq 0; then : + else + rm -f "$tmpdepfile" + exit $stat + fi + rm -f "$depfile" + echo "$object : \\" > "$depfile" + alpha=ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz +## The second -e expression handles DOS-style file names with drive letters. + sed -e 's/^[^:]*: / /' \ + -e 's/^['$alpha']:\/[^:]*: / /' < "$tmpdepfile" >> "$depfile" +## This next piece of magic avoids the `deleted header file' problem. +## The problem is that when a header file which appears in a .P file +## is deleted, the dependency causes make to die (because there is +## typically no way to rebuild the header). We avoid this by adding +## dummy dependencies for each header file. Too bad gcc doesn't do +## this for us directly. + tr ' ' ' +' < "$tmpdepfile" | +## Some versions of gcc put a space before the `:'. On the theory +## that the space means something, we add a space to the output as +## well. +## Some versions of the HPUX 10.20 sed can't process this invocation +## correctly. Breaking it into two sed invocations is a workaround. + sed -e 's/^\\$//' -e '/^$/d' -e '/:$/d' | sed -e 's/$/ :/' >> "$depfile" + rm -f "$tmpdepfile" + ;; + +hp) + # This case exists only to let depend.m4 do its work. It works by + # looking at the text of this script. This case will never be run, + # since it is checked for above. + exit 1 + ;; + +sgi) + if test "$libtool" = yes; then + "$@" "-Wp,-MDupdate,$tmpdepfile" + else + "$@" -MDupdate "$tmpdepfile" + fi + stat=$? + if test $stat -eq 0; then : + else + rm -f "$tmpdepfile" + exit $stat + fi + rm -f "$depfile" + + if test -f "$tmpdepfile"; then # yes, the sourcefile depend on other files + echo "$object : \\" > "$depfile" + + # Clip off the initial element (the dependent). Don't try to be + # clever and replace this with sed code, as IRIX sed won't handle + # lines with more than a fixed number of characters (4096 in + # IRIX 6.2 sed, 8192 in IRIX 6.5). We also remove comment lines; + # the IRIX cc adds comments like `#:fec' to the end of the + # dependency line. + tr ' ' ' +' < "$tmpdepfile" \ + | sed -e 's/^.*\.o://' -e 's/#.*$//' -e '/^$/ d' | \ + tr ' +' ' ' >> $depfile + echo >> $depfile + + # The second pass generates a dummy entry for each header file. + tr ' ' ' +' < "$tmpdepfile" \ + | sed -e 's/^.*\.o://' -e 's/#.*$//' -e '/^$/ d' -e 's/$/:/' \ + >> $depfile + else + # The sourcefile does not contain any dependencies, so just + # store a dummy comment line, to avoid errors with the Makefile + # "include basename.Plo" scheme. + echo "#dummy" > "$depfile" + fi + rm -f "$tmpdepfile" + ;; + +aix) + # The C for AIX Compiler uses -M and outputs the dependencies + # in a .u file. In older versions, this file always lives in the + # current directory. Also, the AIX compiler puts `$object:' at the + # start of each line; $object doesn't have directory information. + # Version 6 uses the directory in both cases. + stripped=`echo "$object" | sed 's/\(.*\)\..*$/\1/'` + tmpdepfile="$stripped.u" + if test "$libtool" = yes; then + "$@" -Wc,-M + else + "$@" -M + fi + stat=$? + + if test -f "$tmpdepfile"; then : + else + stripped=`echo "$stripped" | sed 's,^.*/,,'` + tmpdepfile="$stripped.u" + fi + + if test $stat -eq 0; then : + else + rm -f "$tmpdepfile" + exit $stat + fi + + if test -f "$tmpdepfile"; then + outname="$stripped.o" + # Each line is of the form `foo.o: dependent.h'. + # Do two passes, one to just change these to + # `$object: dependent.h' and one to simply `dependent.h:'. + sed -e "s,^$outname:,$object :," < "$tmpdepfile" > "$depfile" + sed -e "s,^$outname: \(.*\)$,\1:," < "$tmpdepfile" >> "$depfile" + else + # The sourcefile does not contain any dependencies, so just + # store a dummy comment line, to avoid errors with the Makefile + # "include basename.Plo" scheme. + echo "#dummy" > "$depfile" + fi + rm -f "$tmpdepfile" + ;; + +icc) + # Intel's C compiler understands `-MD -MF file'. However on + # icc -MD -MF foo.d -c -o sub/foo.o sub/foo.c + # ICC 7.0 will fill foo.d with something like + # foo.o: sub/foo.c + # foo.o: sub/foo.h + # which is wrong. We want: + # sub/foo.o: sub/foo.c + # sub/foo.o: sub/foo.h + # sub/foo.c: + # sub/foo.h: + # ICC 7.1 will output + # foo.o: sub/foo.c sub/foo.h + # and will wrap long lines using \ : + # foo.o: sub/foo.c ... \ + # sub/foo.h ... \ + # ... + + "$@" -MD -MF "$tmpdepfile" + stat=$? + if test $stat -eq 0; then : + else + rm -f "$tmpdepfile" + exit $stat + fi + rm -f "$depfile" + # Each line is of the form `foo.o: dependent.h', + # or `foo.o: dep1.h dep2.h \', or ` dep3.h dep4.h \'. + # Do two passes, one to just change these to + # `$object: dependent.h' and one to simply `dependent.h:'. + sed "s,^[^:]*:,$object :," < "$tmpdepfile" > "$depfile" + # Some versions of the HPUX 10.20 sed can't process this invocation + # correctly. Breaking it into two sed invocations is a workaround. + sed 's,^[^:]*: \(.*\)$,\1,;s/^\\$//;/^$/d;/:$/d' < "$tmpdepfile" | + sed -e 's/$/ :/' >> "$depfile" + rm -f "$tmpdepfile" + ;; + +ia64hp) + # The "hp" stanza above does not work with HP's ia64 compilers, + # which have integrated preprocessors. The correct option to use + # with these is +Maked; it writes dependencies to a file named + # 'foo.d', which lands next to the object file, wherever that + # happens to be. + tmpdepfile=`echo "$object" | sed -e 's/\.o$/.d/'` + "$@" +Maked + stat=$? + if test $stat -eq 0; then : + else + rm -f "$tmpdepfile" + exit $stat + fi + rm -f "$depfile" + + # The object file name is correct already. + cat "$tmpdepfile" > "$depfile" + # Add `dependent.h:' lines. + sed -ne '2,${; s/^ //; s/ \\*$//; s/$/:/; p; }' "$tmpdepfile" >> "$depfile" + rm -f "$tmpdepfile" + ;; + +tru64) + # The Tru64 compiler uses -MD to generate dependencies as a side + # effect. `cc -MD -o foo.o ...' puts the dependencies into `foo.o.d'. + # At least on Alpha/Redhat 6.1, Compaq CCC V6.2-504 seems to put + # dependencies in `foo.d' instead, so we check for that too. + # Subdirectories are respected. + dir=`echo "$object" | sed -e 's|/[^/]*$|/|'` + test "x$dir" = "x$object" && dir= + base=`echo "$object" | sed -e 's|^.*/||' -e 's/\.o$//' -e 's/\.lo$//'` + + if test "$libtool" = yes; then + # With Tru64 cc, shared objects can also be used to make a + # static library. This mecanism is used in libtool 1.4 series to + # handle both shared and static libraries in a single compilation. + # With libtool 1.4, dependencies were output in $dir.libs/$base.lo.d. + # + # With libtool 1.5 this exception was removed, and libtool now + # generates 2 separate objects for the 2 libraries. These two + # compilations output dependencies in in $dir.libs/$base.o.d and + # in $dir$base.o.d. We have to check for both files, because + # one of the two compilations can be disabled. We should prefer + # $dir$base.o.d over $dir.libs/$base.o.d because the latter is + # automatically cleaned when .libs/ is deleted, while ignoring + # the former would cause a distcleancheck panic. + tmpdepfile1=$dir.libs/$base.lo.d # libtool 1.4 + tmpdepfile2=$dir$base.o.d # libtool 1.5 + tmpdepfile3=$dir.libs/$base.o.d # libtool 1.5 + tmpdepfile4=$dir.libs/$base.d # Compaq CCC V6.2-504 + "$@" -Wc,-MD + else + tmpdepfile1=$dir$base.o.d + tmpdepfile2=$dir$base.d + tmpdepfile3=$dir$base.d + tmpdepfile4=$dir$base.d + "$@" -MD + fi + + stat=$? + if test $stat -eq 0; then : + else + rm -f "$tmpdepfile1" "$tmpdepfile2" "$tmpdepfile3" "$tmpdepfile4" + exit $stat + fi + + for tmpdepfile in "$tmpdepfile1" "$tmpdepfile2" "$tmpdepfile3" "$tmpdepfile4" + do + test -f "$tmpdepfile" && break + done + if test -f "$tmpdepfile"; then + sed -e "s,^.*\.[a-z]*:,$object:," < "$tmpdepfile" > "$depfile" + # That's a tab and a space in the []. + sed -e 's,^.*\.[a-z]*:[ ]*,,' -e 's,$,:,' < "$tmpdepfile" >> "$depfile" + else + echo "#dummy" > "$depfile" + fi + rm -f "$tmpdepfile" + ;; + +#nosideeffect) + # This comment above is used by automake to tell side-effect + # dependency tracking mechanisms from slower ones. + +dashmstdout) + # Important note: in order to support this mode, a compiler *must* + # always write the preprocessed file to stdout, regardless of -o. + "$@" || exit $? + + # Remove the call to Libtool. + if test "$libtool" = yes; then + while test $1 != '--mode=compile'; do + shift + done + shift + fi + + # Remove `-o $object'. + IFS=" " + for arg + do + case $arg in + -o) + shift + ;; + $object) + shift + ;; + *) + set fnord "$@" "$arg" + shift # fnord + shift # $arg + ;; + esac + done + + test -z "$dashmflag" && dashmflag=-M + # Require at least two characters before searching for `:' + # in the target name. This is to cope with DOS-style filenames: + # a dependency such as `c:/foo/bar' could be seen as target `c' otherwise. + "$@" $dashmflag | + sed 's:^[ ]*[^: ][^:][^:]*\:[ ]*:'"$object"'\: :' > "$tmpdepfile" + rm -f "$depfile" + cat < "$tmpdepfile" > "$depfile" + tr ' ' ' +' < "$tmpdepfile" | \ +## Some versions of the HPUX 10.20 sed can't process this invocation +## correctly. Breaking it into two sed invocations is a workaround. + sed -e 's/^\\$//' -e '/^$/d' -e '/:$/d' | sed -e 's/$/ :/' >> "$depfile" + rm -f "$tmpdepfile" + ;; + +dashXmstdout) + # This case only exists to satisfy depend.m4. It is never actually + # run, as this mode is specially recognized in the preamble. + exit 1 + ;; + +makedepend) + "$@" || exit $? + # Remove any Libtool call + if test "$libtool" = yes; then + while test $1 != '--mode=compile'; do + shift + done + shift + fi + # X makedepend + shift + cleared=no + for arg in "$@"; do + case $cleared in + no) + set ""; shift + cleared=yes ;; + esac + case "$arg" in + -D*|-I*) + set fnord "$@" "$arg"; shift ;; + # Strip any option that makedepend may not understand. Remove + # the object too, otherwise makedepend will parse it as a source file. + -*|$object) + ;; + *) + set fnord "$@" "$arg"; shift ;; + esac + done + obj_suffix="`echo $object | sed 's/^.*\././'`" + touch "$tmpdepfile" + ${MAKEDEPEND-makedepend} -o"$obj_suffix" -f"$tmpdepfile" "$@" + rm -f "$depfile" + cat < "$tmpdepfile" > "$depfile" + sed '1,2d' "$tmpdepfile" | tr ' ' ' +' | \ +## Some versions of the HPUX 10.20 sed can't process this invocation +## correctly. Breaking it into two sed invocations is a workaround. + sed -e 's/^\\$//' -e '/^$/d' -e '/:$/d' | sed -e 's/$/ :/' >> "$depfile" + rm -f "$tmpdepfile" "$tmpdepfile".bak + ;; + +cpp) + # Important note: in order to support this mode, a compiler *must* + # always write the preprocessed file to stdout. + "$@" || exit $? + + # Remove the call to Libtool. + if test "$libtool" = yes; then + while test $1 != '--mode=compile'; do + shift + done + shift + fi + + # Remove `-o $object'. + IFS=" " + for arg + do + case $arg in + -o) + shift + ;; + $object) + shift + ;; + *) + set fnord "$@" "$arg" + shift # fnord + shift # $arg + ;; + esac + done + + "$@" -E | + sed -n -e '/^# [0-9][0-9]* "\([^"]*\)".*/ s:: \1 \\:p' \ + -e '/^#line [0-9][0-9]* "\([^"]*\)".*/ s:: \1 \\:p' | + sed '$ s: \\$::' > "$tmpdepfile" + rm -f "$depfile" + echo "$object : \\" > "$depfile" + cat < "$tmpdepfile" >> "$depfile" + sed < "$tmpdepfile" '/^$/d;s/^ //;s/ \\$//;s/$/ :/' >> "$depfile" + rm -f "$tmpdepfile" + ;; + +msvisualcpp) + # Important note: in order to support this mode, a compiler *must* + # always write the preprocessed file to stdout, regardless of -o, + # because we must use -o when running libtool. + "$@" || exit $? + IFS=" " + for arg + do + case "$arg" in + "-Gm"|"/Gm"|"-Gi"|"/Gi"|"-ZI"|"/ZI") + set fnord "$@" + shift + shift + ;; + *) + set fnord "$@" "$arg" + shift + shift + ;; + esac + done + "$@" -E | + sed -n '/^#line [0-9][0-9]* "\([^"]*\)"/ s::echo "`cygpath -u \\"\1\\"`":p' | sort | uniq > "$tmpdepfile" + rm -f "$depfile" + echo "$object : \\" > "$depfile" + . "$tmpdepfile" | sed 's% %\\ %g' | sed -n '/^\(.*\)$/ s:: \1 \\:p' >> "$depfile" + echo " " >> "$depfile" + . "$tmpdepfile" | sed 's% %\\ %g' | sed -n '/^\(.*\)$/ s::\1\::p' >> "$depfile" + rm -f "$tmpdepfile" + ;; + +none) + exec "$@" + ;; + +*) + echo "Unknown depmode $depmode" 1>&2 + exit 1 + ;; +esac + +exit 0 + +# Local Variables: +# mode: shell-script +# sh-indentation: 2 +# eval: (add-hook 'write-file-hooks 'time-stamp) +# time-stamp-start: "scriptversion=" +# time-stamp-format: "%:y-%02m-%02d.%02H" +# time-stamp-end: "$" +# End: diff --git a/etc/ChangeLog b/etc/ChangeLog index 802f6868e8f..35e23bec28a 100644 --- a/etc/ChangeLog +++ b/etc/ChangeLog @@ -1,3 +1,11 @@ +2005-10-21 Mark Mitchell + + * texi2pod.pl: Substitue for @value even when part of @include. + +2005-10-21 Bob Wilson + + * texi2pod.pl: Import latest version from GCC. + 2005-05-19 Zack Weinberg * Makefile.in: Have 'all' depend on 'info'. diff --git a/etc/texi2pod.pl b/etc/texi2pod.pl index bdc20e8118f..9696a12f361 100644 --- a/etc/texi2pod.pl +++ b/etc/texi2pod.pl @@ -1,23 +1,23 @@ #! /usr/bin/perl -w -# Copyright (C) 1999, 2000, 2001, 200 Free Software Foundation, Inc. +# Copyright (C) 1999, 2000, 2001, 2003 Free Software Foundation, Inc. -# This file is part of GNU CC. +# This file is part of GCC. -# GNU CC is free software; you can redistribute it and/or modify +# GCC is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2, or (at your option) # any later version. -# GNU CC is distributed in the hope that it will be useful, +# GCC is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # You should have received a copy of the GNU General Public License -# along with GNU CC; see the file COPYING. If not, write to -# the Free Software Foundation, 59 Temple Place - Suite 330, -# Boston MA 02111-1307, USA. +# along with GCC; see the file COPYING. If not, write to +# the Free Software Foundation, 51 Franklin Street, Fifth Floor, +# Boston MA 02110-1301, USA. # This does trivial (and I mean _trivial_) conversion of Texinfo # markup to Perl POD format. It's intended to be used to extract @@ -138,7 +138,7 @@ while(<$inf>) { # Ignore @end foo, where foo is not an operation which may # cause us to skip, if we are presently skipping. my $ended = $1; - next if $skipping && $ended !~ /^(?:ifset|ifclear|ignore|menu|iftex)$/; + next if $skipping && $ended !~ /^(?:ifset|ifclear|ignore|menu|iftex|copying)$/; die "\@end $ended without \@$ended at line $.\n" unless defined $endw; die "\@$endw ended by \@end $ended at line $.\n" unless $ended eq $endw; @@ -178,7 +178,7 @@ while(<$inf>) { next; }; - /^\@(ignore|menu|iftex)\b/ and do { + /^\@(ignore|menu|iftex|copying)\b/ and do { push @endwstack, $endw; push @skstack, $skipping; $endw = $1; @@ -227,11 +227,12 @@ while(<$inf>) { /^\@include\s+(.+)$/ and do { push @instack, $inf; $inf = gensym(); + $file = postprocess($1); # Try cwd and $ibase. - open($inf, "<" . $1) - or open($inf, "<" . $ibase . "/" . $1) - or die "cannot open $1 or $ibase/$1: $!\n"; + open($inf, "<" . $file) + or open($inf, "<" . $ibase . "/" . $file) + or die "cannot open $file or $ibase/$file: $!\n"; next; }; @@ -241,10 +242,14 @@ while(<$inf>) { and $_ = "\n=head3 $1\n"; # Block command handlers: - /^\@itemize\s+(\@[a-z]+|\*|-)/ and do { + /^\@itemize(?:\s+(\@[a-z]+|\*|-))?/ and do { push @endwstack, $endw; push @icstack, $ic; - $ic = $1; + if (defined $1) { + $ic = $1; + } else { + $ic = '@bullet'; + } $_ = "\n=over 4\n"; $endw = "itemize"; }; @@ -345,6 +350,13 @@ sub postprocess s/\@w\{([^\}]*)\}/S<$1>/g; s/\@(?:dmn|math)\{([^\}]*)\}/$1/g; + # keep references of the form @ref{...}, print them bold + s/\@(?:ref)\{([^\}]*)\}/B<$1>/g; + + # Change double single quotes to double quotes. + s/''/"/g; + s/``/"/g; + # Cross references are thrown away, as are @noindent and @refill. # (@noindent is impossible in .pod, and @refill is unnecessary.) # @* is also impossible in .pod; we discard it and any newline that @@ -365,14 +377,18 @@ sub postprocess s/\@uref\{([^\},]*),([^\},]*)\}/$2 (C<$1>)/g; s/\@uref\{([^\},]*),([^\},]*),([^\},]*)\}/$3/g; - # Turn B blah> into B I B to - # match Texinfo semantics of @emph inside @samp. Also handle @r - # inside bold. + # Un-escape <> at this point. s/<//g; - 1 while s/B<((?:[^<>]|I<[^<>]*>)*)R<([^>]*)>/B<$1>${2}B]*)I<([^>]+)>/B<$1>I<$2>B]*)B<([^>]+)>/I<$1>B<$2>I, I<>, R<>. Theoretically we could have + # indefinitely deep nesting; in practice, one level suffices. + 1 while s/([BIR])<([^<>]*)([BIR])<([^<>]*)>/$1<$2>$3<$4>$1 with bare ...; eliminate empty markup, B<>; + # shift white space at the ends of [BI]<...> expressions outside + # the expression. + s/R<([^<>]*)>/$1/g; s/[BI]<>//g; s/([BI])<(\s+)([^>]+)>/$2$1<$3>/g; s/([BI])<([^>]+?)(\s+)>/$1<$2>$3/g; diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 37bbf05da9d..7433f6259e6 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,177 @@ +2005-11-01 Paul Gilliam + + * rs6000-tdep.c (rs6000_gdbarch_init): On GNU/Linux, assume that + bfd_mach_ppc64 has altivec unit, just like bfd_mach_ppc. + +2005-11-01 Andrew Stubbs + + * tui/tui-data.h (tui_line_or_address): Encapsulate the union in a + struct with a tag. + (tui_source_element, tui_source_info): Update. + * tui/tui-disasm.c, tui/tui-source.c: Update to use the tagged union. + * tui/tui-source.h, tui/tui-stack.c, tui/tui-win.c: Likewise. + * tui/tui-winsource.c, tui/tui-data.c, tui/tui-layout.c: Likewise. + * tui/tui-winsource.h: Likewise. + +2005-11-01 Christopher Faylor + + * win32-nat.c (CYGWIN_SIGNAL_STRING): Delete. + (_CYGWIN_SIGNAL_STRING): Define if not already defined in cygwin.h. + (win32_add_thread): Use XZALLOC rather than xmalloc/memset. + (register_loaded_dll): Ditto. + (handle_load_dll): Call solib_add here. + (handle_unload_dll): Ditto. + (info_dll_command): Delete. + (handle_output_debug_string): Use official _CYGWIN_SIGNAL_STRING. + (win32_current_sos): Duplicate table to pass off to caller rather than + deleting our version. + (set_win32_aliases): New function. + (_initialize_win32_nat): Remove local handling of "info shared". Set + deprecated_init_ui_hook to allow late setting of "info dll" alias. + +2005-11-01 Andrew Stubbs + + * event-top.c (gdb_setup_readline): Don't set gdb_stdout when + --batch-silent option was given. + * main.c (batch_silent): New variable. + (captured_main): Add new option --batch-silent. + (print_gdb_help): Likewise. + +2005-11-01 Mark Kettenis + + * NEWS: Mention VAX floating point support. + +2005-10-31 Christopher Faylor + + * win32-nat.c (get_relocated_section_addrs): Reinstate. + (solib_symbols_add): New function. + (lm_info): Remove end_addr field. + (register_loaded_dll): Don't try to find end_addr since gdb will do + this automatically now. Make so_original_name == so_name for now. + Eliminate strcpy by using so_name directly. Read in symbols if new + paramater "readsyms" is true. + (handle_load_dll): Pass auto_solib_add to register_loaded_dll to + control when symbols should be read. + (win32_free_so): Don't free objfile here. + (win32_create_inferior_hook): New function. + (handle_unload_dll): Remove left-over cruft. + (win32_special_symbol_handling): New (dummy) function. + (map_single_dll_code_section): Reinstate. + (dll_code_sections_add): Reinstate. + (core_section_load_dll_symbols): Reinstate. Don't issue an error on + duplicate attempts to read same dll. Make sure that UNIX-like name is + used to register DLL. + (win32_current_sos): Handle core files. Reset private list before + passing start of list pointer to gdb. + (init_win32_ops): Fill out (currently unused) + solib_create_inferior_hook. Fill out special_symbol_handling. + * config/i386/tm-cygwin.h: Remove most special solib stuff. + +2005-10-31 Christopher Faylor + + * win32-nat.c: Remove comment intended only for debugging. + +2005-11-01 Mark Kettenis + + * doublest.c (floatformat_normalize_byteorder): Handle + floatformat_vax. + (convert_doublest_to_floatformat): Use + floatformat_normalize_byteorder to swap bytes if necessary. + * vax-tdep.c: Include floatformat.h. + (vax_gdbarch_init): Set float_format, double_format, + long_double_format and long_double_bit. + * Makefile.in (vax-tdep.o): Update dependencies. + +2005-10-31 Christopher Faylor + + Change child_ to win32_ throughout. + * win32-nat.c (win32_ops): New variable. + (win32_so_ops): Ditto. + (psapi_get_dll_name): Make function static. + (struct so_stuff): Delete. + (struct lm_info): New struct. + (solib_start, solib_end): Redefine as struct so_list. + (safe_symbol_file_add_stub): Use so_list rather than so_stuff. + (register_loaded_dll): Ditto. Special-case ntdll.dll. Fill in lm_info + field of so_list with information previously stored in so_stuff. + (get_image_name): Make function static. + (max_dll_name_len): Make variable static. + (win32_free_so): New function. + (win32_current_sos): Ditto. + (win32_relocate_section_addresses): Ditto. + (handle_unload_dll): Use so_list rather than so_stuff. Call free_so to + delete shared library. + (solib_address): Delete function. + (child_solib_loaded_library_pathname): Ditto. + (win32_clear_solib): Rename from child_clear_solibs. Use so_list + rather than so_stuff. Just clear win32-specific stuff. + (get_relocated_section_addrs): Delete. + (solib_symbols_add): Ditto. + (info_dll_command): Make static. Use lm_info field from so_list to + retrieve load address. + (fake_create_process): Make function static. + (win32_xfer_memory): Ditto. + (win32_kill_inferior): Ditto. + (win32_resume): Ditto. + (cygwin_pid_to_str): Ditto. + (do_initial_win32_stuff): Use win32_ops rather than + deprecated_child_ops. + (child_detach): Ditto. + (win32_mourn_inferior): Ditto. + (_initialize_win32_nat): Ditto. + (init_win32_ops): Ditto. Fill out win32_so_ops and set + current_target_so_ops to win32_so_ops. + (core_dll_symbols_add): Delete. + (map_single_dll_code_section): Ditto. + (dll_code_sections_add): Ditto. + (core_section_load_dll_symbols): Ditto. + (child_solib_add): Ditto. + +2005-10-31 Andrew Stubbs + + * tui/tui-command.c (tui_dispatch_ctrl_char): Test output of + getenv() before using it. + +2005-10-29 Mark Kettenis + + * hppa-tdep.h (HPPA_INSN_SIZE): New define. + * hppa-hpux-tdep.c (hppa_hpux_search_pattern) + (hppa64_hpux_search_dummy_call_sequence): Rewrite to avoid + assumption on sizeof(unsigned). + + * inf-ttrace.c (inf_ttrace_wait): Comment out TARGET_WAITKIND_EXEC + code; return TARGET_WAITKIND_STOPPED instead. + +2005-10-28 Mark Kettenis + + * ppc-tdep.h (PPC_INSN_SIZE): Define. + + * inf-ttrace.c (inf_ttrace_mourn_inferior): Remove redundant cast. + (inf_ttrace_kill): Renamed from inf_ttrace_kill_inferior. + (inf_ttrace_target): Resort assignments. + +2005-10-28 Nick Roberts + + * mi/gdb-mi.el: Sync with Emacs 22.0.50. + +2005-10-25 Andreas Schwab + + * regformats/reg-ia64.dat: Remove NAT registers. + +2005-10-20 Mark Kettenis + + * rs6000-tdep.c (info_powerpc_cmdlist): Remove variable. + (rs6000_info_powerpc_command): Remove function. + +2005-10-21 Andreas Schwab + + * dwarf2read.c (isreg): Removed. + (decode_locdesc): Don't set it. + +2005-10-20 Joel Brobecker + + * Makefile.in (YYFILES): Add ada-lex.c + 2005-10-17 Jim Blandy * dwarf2expr.c (dwarf_expr_fetch): Use correct comparison to diff --git a/gdb/Makefile.in b/gdb/Makefile.in index 02eaa44d4fd..8d113523df4 100644 --- a/gdb/Makefile.in +++ b/gdb/Makefile.in @@ -948,6 +948,7 @@ SUBDIRS = @subdirs@ YYFILES = c-exp.c \ cp-name-parser.c \ objc-exp.c \ + ada-lex.c \ ada-exp.c \ jv-exp.c \ f-exp.c m2-exp.c p-exp.c @@ -2746,10 +2747,10 @@ vaxnbsd-tdep.o: vaxnbsd-tdep.c $(defs_h) $(arch_utils_h) $(osabi_h) \ vaxobsd-tdep.o: vaxobsd-tdep.c $(defs_h) $(arch_utils_h) $(frame_h) \ $(frame_unwind_h) $(osabi_h) $(symtab_h) $(trad_frame_h) \ $(vax_tdep_h) $(gdb_string_h) -vax-tdep.o: vax-tdep.c $(defs_h) $(arch_utils_h) $(dis_asm_h) $(frame_h) \ - $(frame_base_h) $(frame_unwind_h) $(gdbcore_h) $(gdbtypes_h) \ - $(osabi_h) $(regcache_h) $(regset_h) $(trad_frame_h) $(value_h) \ - $(gdb_string_h) $(vax_tdep_h) +vax-tdep.o: vax-tdep.c $(defs_h) $(arch_utils_h) $(dis_asm_h) \ + $(float_format_h)$(frame_h) $(frame_base_h) $(frame_unwind_h) \ + $(gdbcore_h) $(gdbtypes_h) $(osabi_h) $(regcache_h) $(regset_h) \ + $(trad_frame_h) $(value_h) $(gdb_string_h) $(vax_tdep_h) win32-nat.o: win32-nat.c $(defs_h) $(frame_h) $(inferior_h) $(target_h) \ $(exceptions_h) $(gdbcore_h) $(command_h) $(completer_h) \ $(regcache_h) $(top_h) $(buildsym_h) $(symfile_h) $(objfiles_h) \ diff --git a/gdb/NEWS b/gdb/NEWS index eb5af88361a..89099f6138e 100644 --- a/gdb/NEWS +++ b/gdb/NEWS @@ -56,6 +56,10 @@ After turning this setting "on", GDB prints the index of each element when displaying arrays. The default is "off" to preserve the previous behavior. +* VAX floating point support + +GDB now supports the not-quite-ieee VAX F and D floating point formats. + *** Changes in GDB 6.3: * New command line option diff --git a/gdb/config/i386/tm-cygwin.h b/gdb/config/i386/tm-cygwin.h index 52ec2751261..48748cd0803 100644 --- a/gdb/config/i386/tm-cygwin.h +++ b/gdb/config/i386/tm-cygwin.h @@ -21,16 +21,5 @@ Boston, MA 02111-1307, USA. */ #define ATTACH_NO_WAIT -#define SOLIB_ADD(filename, from_tty, targ, readsyms) child_solib_add(filename, from_tty, targ, readsyms) -#define PC_SOLIB(addr) solib_address (addr) -#define SOLIB_LOADED_LIBRARY_PATHNAME(pid) child_solib_loaded_library_pathname(pid) -#define CLEAR_SOLIB child_clear_solibs #define ADD_SHARED_SYMBOL_FILES dll_symbol_command - -struct target_ops; -char *cygwin_pid_to_str (ptid_t ptid); -void child_solib_add (char *, int, struct target_ops *, int); -char *solib_address (CORE_ADDR); -char *child_solib_loaded_library_pathname(int); -void child_clear_solibs (void); void dll_symbol_command (char *, int); diff --git a/gdb/config/iq2000/iq2000.mt b/gdb/config/iq2000/iq2000.mt new file mode 100644 index 00000000000..8d5dfb815cb --- /dev/null +++ b/gdb/config/iq2000/iq2000.mt @@ -0,0 +1,3 @@ +TDEPFILES= iq2000-tdep.o +SIM_OBS= remote-sim.o +SIM= ../sim/iq2000/libsim.a diff --git a/gdb/config/ms1/ms1.mt b/gdb/config/ms1/ms1.mt new file mode 100644 index 00000000000..18ce1abdf71 --- /dev/null +++ b/gdb/config/ms1/ms1.mt @@ -0,0 +1,2 @@ +# Target: Morpho Technologies ms1 processor +TDEPFILES= ms1-tdep.o diff --git a/gdb/doc/ChangeLog b/gdb/doc/ChangeLog index fa60a7446e8..f62c31230cf 100644 --- a/gdb/doc/ChangeLog +++ b/gdb/doc/ChangeLog @@ -1,3 +1,12 @@ +2005-11-01 Andrew Stubbs + + * gdb.texinfo (Choosing modes): Add --batch-silent. + +2005-10-28 Eli Zaretskii + + * gdb.texinfo (GDB/MI Variable Objects): Fix @pxref usage under + "The -var-update Command". + 2005-10-03 Joel Brobecker * gdb.texinfo (Print Settings): Add documentation for set/show diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index 2055f1a00bb..75ae4ef7f07 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -994,6 +994,19 @@ Program exited normally. @value{GDBN} control terminates) is not issued when running in batch mode. +@item -batch-silent +@cindex @code{--batch-silent} +Run in batch mode exactly like @samp{-batch}, but totally silently. All +@value{GDBN} output to @code{stdout} is prevented (@code{stderr} is +unaffected). This is much quieter than @samp{-silent} and would be useless +for an interactive session. + +This is particularly useful when using targets that give @samp{Loading section} +messages, for example. + +Note that targets that give their output via @value{GDBN}, as opposed to +writing directly to @code{stdout}, will also be made silent. + @item -nowindows @itemx -nw @cindex @code{--nowindows} @@ -20636,9 +20649,9 @@ subsequent @code{-var-update} list. Update the value of the variable object @var{name} by evaluating its expression after fetching all the new values from memory or registers. A @samp{*} causes all existing variable objects to be updated. The -option @var{print-values} determines whether names and values, or just -names are printed in the manner described for -@code{@pxref{-var-list-children}}. +option @var{print-values} determines whether names both and values, or +just names are printed in the manner described for +@code{-var-list-children} (@pxref{-var-list-children}). @subsubheading Example diff --git a/gdb/doublest.c b/gdb/doublest.c index 2562ab67238..8045a1ce139 100644 --- a/gdb/doublest.c +++ b/gdb/doublest.c @@ -1,8 +1,8 @@ /* Floating point routines for GDB, the GNU debugger. Copyright 1986, 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, - 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005 Free Software - Foundation, Inc. + 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005 + Free Software Foundation, Inc. This file is part of GDB. @@ -110,9 +110,10 @@ get_field (const bfd_byte *data, enum floatformat_byteorders order, return result; } -/* Normalize the byte order of FROM into TO. If no normalization is needed - then FMT->byteorder is returned and TO is not changed; otherwise the format - of the normalized form in TO is returned. */ +/* Normalize the byte order of FROM into TO. If no normalization is + needed then FMT->byteorder is returned and TO is not changed; + otherwise the format of the normalized form in TO is returned. */ + static enum floatformat_byteorders floatformat_normalize_byteorder (const struct floatformat *fmt, const void *from, void *to) @@ -125,23 +126,40 @@ floatformat_normalize_byteorder (const struct floatformat *fmt, || fmt->byteorder == floatformat_big) return fmt->byteorder; - gdb_assert (fmt->byteorder == floatformat_littlebyte_bigword); - words = fmt->totalsize / FLOATFORMAT_CHAR_BIT; words >>= 2; swapout = (unsigned char *)to; swapin = (const unsigned char *)from; - while (words-- > 0) + if (fmt->byteorder == floatformat_vax) + { + while (words-- > 0) + { + *swapout++ = swapin[1]; + *swapout++ = swapin[0]; + *swapout++ = swapin[3]; + *swapout++ = swapin[2]; + swapin += 4; + } + /* This may look weird, since VAX is little-endian, but it is + easier to translate to big-endian than to little-endian. */ + return floatformat_big; + } + else { - *swapout++ = swapin[3]; - *swapout++ = swapin[2]; - *swapout++ = swapin[1]; - *swapout++ = swapin[0]; - swapin += 4; + gdb_assert (fmt->byteorder == floatformat_littlebyte_bigword); + + while (words-- > 0) + { + *swapout++ = swapin[3]; + *swapout++ = swapin[2]; + *swapout++ = swapin[1]; + *swapout++ = swapin[0]; + swapin += 4; + } + return floatformat_big; } - return floatformat_big; } /* Convert from FMT to a DOUBLEST. @@ -337,14 +355,13 @@ ldfrexp (long double value, int *eptr) #endif /* HAVE_LONG_DOUBLE */ -/* The converse: convert the DOUBLEST *FROM to an extended float - and store where TO points. Neither FROM nor TO have any alignment +/* The converse: convert the DOUBLEST *FROM to an extended float and + store where TO points. Neither FROM nor TO have any alignment restrictions. */ static void convert_doublest_to_floatformat (CONST struct floatformat *fmt, - const DOUBLEST *from, - void *to) + const DOUBLEST *from, void *to) { DOUBLEST dfrom; int exponent; @@ -353,10 +370,14 @@ convert_doublest_to_floatformat (CONST struct floatformat *fmt, int mant_bits_left; unsigned char *uto = (unsigned char *) to; enum floatformat_byteorders order = fmt->byteorder; + unsigned char newto[FLOATFORMAT_LARGEST_BYTES]; - if (order == floatformat_littlebyte_bigword) + if (order != floatformat_little) order = floatformat_big; + if (order != fmt->byteorder) + uto = newto; + memcpy (&dfrom, from, sizeof (dfrom)); memset (uto, 0, (fmt->totalsize + FLOATFORMAT_CHAR_BIT - 1) / FLOATFORMAT_CHAR_BIT); @@ -447,24 +468,7 @@ convert_doublest_to_floatformat (CONST struct floatformat *fmt, finalize_byteorder: /* Do we need to byte-swap the words in the result? */ if (order != fmt->byteorder) - { - int words; - unsigned char *curword = uto; - unsigned char tmp; - - words = fmt->totalsize / FLOATFORMAT_CHAR_BIT; - words >>= 2; - while (words-- > 0) - { - tmp = curword[0]; - curword[0] = curword[3]; - curword[3] = tmp; - tmp = curword[1]; - curword[1] = curword[2]; - curword[2] = tmp; - curword += 4; - } - } + floatformat_normalize_byteorder (fmt, newto, to); } /* Check if VAL (which is assumed to be a floating point number whose diff --git a/gdb/dwarf2read.c b/gdb/dwarf2read.c index ae85ef3554b..4b0b6bd8460 100644 --- a/gdb/dwarf2read.c +++ b/gdb/dwarf2read.c @@ -580,15 +580,6 @@ struct dwarf_block /* A zeroed version of a partial die for initialization purposes. */ static struct partial_die_info zeroed_partial_die; -/* FIXME: decode_locdesc sets these variables to describe the location - to the caller. These ought to be a structure or something. If - none of the flags are set, the object lives at the address returned - by decode_locdesc. */ - -static int isreg; /* Object lives in register. - decode_locdesc's return value is - the register number. */ - /* FIXME: We might want to set this from BFD via bfd_arch_bits_per_byte, but this would require a corresponding change in unpack_field_as_long and friends. */ @@ -8559,9 +8550,6 @@ dwarf2_fundamental_type (struct objfile *objfile, int typeid, callers will only want a very basic result and this can become a complaint. - When the result is a register number, the global isreg flag is set, - otherwise it is cleared. - Note that stack[0] is unused except as a default error return. Note that stack overflow is not yet handled. */ @@ -8581,7 +8569,6 @@ decode_locdesc (struct dwarf_block *blk, struct dwarf2_cu *cu) i = 0; stacki = 0; stack[stacki] = 0; - isreg = 0; while (i < size) { @@ -8655,14 +8642,12 @@ decode_locdesc (struct dwarf_block *blk, struct dwarf2_cu *cu) case DW_OP_reg29: case DW_OP_reg30: case DW_OP_reg31: - isreg = 1; stack[++stacki] = op - DW_OP_reg0; if (i < size) dwarf2_complex_location_expr_complaint (); break; case DW_OP_regx: - isreg = 1; unsnd = read_unsigned_leb128 (NULL, (data + i), &bytes_read); i += bytes_read; stack[++stacki] = unsnd; diff --git a/gdb/event-top.c b/gdb/event-top.c index 4614d4d2f4c..bc1fe8ea38c 100644 --- a/gdb/event-top.c +++ b/gdb/event-top.c @@ -1110,8 +1110,10 @@ gdb_setup_readline (void) that the sync setup is ALL done in gdb_init, and we would only mess it up here. The sync stuff should really go away over time. */ + extern batch_silent; - gdb_stdout = stdio_fileopen (stdout); + if (!batch_silent) + gdb_stdout = stdio_fileopen (stdout); gdb_stderr = stdio_fileopen (stderr); gdb_stdlog = gdb_stderr; /* for moment */ gdb_stdtarg = gdb_stderr; /* for moment */ diff --git a/gdb/gdbserver/ChangeLog b/gdb/gdbserver/ChangeLog index 65cca45dbac..bdf99aeddb3 100644 --- a/gdb/gdbserver/ChangeLog +++ b/gdb/gdbserver/ChangeLog @@ -1,3 +1,10 @@ +2005-10-25 Andreas Schwab + + * server.c (main): Allocate mem_buf with PBUFSIZ bytes. + + * linux-ia64-low.c (ia64_regmap): Remove NAT registers. + (ia64_num_regs): Reduce to 462. + 2005-09-17 Daniel Jacobowitz * acinclude.m4: Correct quoting. diff --git a/gdb/gdbserver/linux-ia64-low.c b/gdb/gdbserver/linux-ia64-low.c index 9407e6cbcf7..4a32e991cb1 100644 --- a/gdb/gdbserver/linux-ia64-low.c +++ b/gdb/gdbserver/linux-ia64-low.c @@ -26,7 +26,7 @@ #include #endif -#define ia64_num_regs 590 +#define ia64_num_regs 462 #include @@ -263,24 +263,6 @@ static int ia64_regmap[] = -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - /* nat bits - not fetched directly; instead we obtain these bits from - either rnat or unat or from memory. */ - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, }; static int diff --git a/gdb/gdbserver/server.c b/gdb/gdbserver/server.c index dfefe2b52a9..cde6d4fd6a4 100644 --- a/gdb/gdbserver/server.c +++ b/gdb/gdbserver/server.c @@ -322,7 +322,7 @@ int main (int argc, char *argv[]) { char ch, status, *own_buf; - unsigned char mem_buf[2000]; + unsigned char *mem_buf; int i = 0; int signal; unsigned int len; @@ -359,6 +359,7 @@ main (int argc, char *argv[]) initialize_low (); own_buf = malloc (PBUFSIZ); + mem_buf = malloc (PBUFSIZ); if (pid == 0) { diff --git a/gdb/hppa-hpux-tdep.c b/gdb/hppa-hpux-tdep.c index c0f9a3ab1d6..ed0abf9ee9e 100644 --- a/gdb/hppa-hpux-tdep.c +++ b/gdb/hppa-hpux-tdep.c @@ -1,6 +1,6 @@ /* Target-dependent code for HP-UX on PA-RISC. - Copyright 2002, 2003, 2004 Free Software Foundation, Inc. + Copyright 2002, 2003, 2004, 2005 Free Software Foundation, Inc. This file is part of GDB. @@ -1309,32 +1309,31 @@ static CORE_ADDR hppa_hpux_search_pattern (CORE_ADDR start, CORE_ADDR end, unsigned int *patterns, int count) { - unsigned int *buf; + int num_insns = (end - start + HPPA_INSN_SIZE) / HPPA_INSN_SIZE; + unsigned int *insns; + gdb_byte *buf; int offset, i; - int region, insns; - region = end - start + 4; - insns = region / 4; - buf = (unsigned int *) alloca (region); + buf = alloca (num_insns * HPPA_INSN_SIZE); + insns = alloca (num_insns * sizeof (unsigned int)); - read_memory (start, (char *) buf, region); + read_memory (start, buf, num_insns * HPPA_INSN_SIZE); + for (i = 0; i < num_insns; i++, buf += HPPA_INSN_SIZE) + insns[i] = extract_unsigned_integer (buf, HPPA_INSN_SIZE); - for (i = 0; i < insns; i++) - buf[i] = extract_unsigned_integer (&buf[i], 4); - - for (offset = 0; offset <= insns - count; offset++) + for (offset = 0; offset <= num_insns - count; offset++) { for (i = 0; i < count; i++) { - if ((buf[offset + i] & patterns[i]) != patterns[i]) + if ((insns[offset + i] & patterns[i]) != patterns[i]) break; } if (i == count) break; } - - if (offset <= insns - count) - return start + offset * 4; + + if (offset <= num_insns - count) + return start + offset * HPPA_INSN_SIZE; else return 0; } @@ -1472,7 +1471,7 @@ hppa64_hpux_search_dummy_call_sequence (struct gdbarch *gdbarch, CORE_ADDR pc, { CORE_ADDR begin, end; char *name; - unsigned int insns[2]; + gdb_byte buf[2 * HPPA_INSN_SIZE]; int offset; find_pc_partial_function (SYMBOL_VALUE_ADDRESS (msym), &name, @@ -1481,16 +1480,16 @@ hppa64_hpux_search_dummy_call_sequence (struct gdbarch *gdbarch, CORE_ADDR pc, if (name == NULL || begin == 0 || end == 0) continue; - if (target_read_memory (end - sizeof (insns), (char *)insns, sizeof (insns)) == 0) + if (target_read_memory (end - sizeof (buf), buf, sizeof (buf)) == 0) { - for (offset = 0; offset < ARRAY_SIZE (insns); offset++) + for (offset = 0; offset < sizeof (buf); offset++) { unsigned int insn; - insn = extract_unsigned_integer (&insns[offset], 4); + insn = extract_unsigned_integer (buf + offset, HPPA_INSN_SIZE); if (insn == 0xe840d002) /* bve,n (rp) */ { - addr = (end - sizeof (insns)) + (offset * 4); + addr = (end - sizeof (buf)) + offset; goto found_pattern; } } diff --git a/gdb/hppa-tdep.h b/gdb/hppa-tdep.h index 484a2d50439..2e5227b75ba 100644 --- a/gdb/hppa-tdep.h +++ b/gdb/hppa-tdep.h @@ -75,6 +75,9 @@ enum hppa_regnum HPPA_ARG3_REGNUM = 23 /* The fourth argument of a callee. */ }; +/* Instruction size. */ +#define HPPA_INSN_SIZE 4 + /* Target-dependent structure in gdbarch. */ struct gdbarch_tdep { diff --git a/gdb/inf-ttrace.c b/gdb/inf-ttrace.c index a9087afa578..fc19e90b0e1 100644 --- a/gdb/inf-ttrace.c +++ b/gdb/inf-ttrace.c @@ -644,28 +644,6 @@ inf_ttrace_create_inferior (char *exec_file, char *allargs, char **env, proceed ((CORE_ADDR) -1, TARGET_SIGNAL_0, 0); } -static void -inf_ttrace_kill_inferior (void) -{ - pid_t pid = ptid_get_pid (inferior_ptid); - - if (pid == 0) - return; - - if (ttrace (TT_PROC_EXIT, pid, 0, 0, 0, 0) == -1) - perror_with_name (("ttrace")); - /* ??? Is it necessary to call ttrace_wait() here? */ - - if (inf_ttrace_vfork_ppid != -1) - { - if (ttrace (TT_PROC_DETACH, inf_ttrace_vfork_ppid, 0, 0, 0, 0) == -1) - perror_with_name (("ttrace")); - inf_ttrace_vfork_ppid = -1; - } - - target_mourn_inferior (); -} - static void inf_ttrace_mourn_inferior (void) { @@ -715,7 +693,7 @@ inf_ttrace_attach (char *args, int from_tty) if (from_tty) { - exec_file = (char *) get_exec_file (0); + exec_file = get_exec_file (0); if (exec_file) printf_unfiltered (_("Attaching to program: %s, %s\n"), exec_file, @@ -792,6 +770,28 @@ inf_ttrace_detach (char *args, int from_tty) inferior_ptid = null_ptid; } +static void +inf_ttrace_kill (void) +{ + pid_t pid = ptid_get_pid (inferior_ptid); + + if (pid == 0) + return; + + if (ttrace (TT_PROC_EXIT, pid, 0, 0, 0, 0) == -1) + perror_with_name (("ttrace")); + /* ??? Is it necessary to call ttrace_wait() here? */ + + if (inf_ttrace_vfork_ppid != -1) + { + if (ttrace (TT_PROC_DETACH, inf_ttrace_vfork_ppid, 0, 0, 0, 0) == -1) + perror_with_name (("ttrace")); + inf_ttrace_vfork_ppid = -1; + } + + target_mourn_inferior (); +} + static int inf_ttrace_resume_callback (struct thread_info *info, void *arg) { @@ -894,6 +894,10 @@ inf_ttrace_wait (ptid_t ptid, struct target_waitstatus *ourstatus) #endif case TTEVT_EXEC: + /* FIXME: kettenis/20051029: GDB doesn't really know how to deal + with TARGET_WAITKIND_EXECD events yet. So we make it look + like a SIGTRAP instead. */ +#if 0 ourstatus->kind = TARGET_WAITKIND_EXECD; ourstatus->value.execd_pathname = xmalloc (tts.tts_u.tts_exec.tts_pathlen + 1); @@ -902,6 +906,10 @@ inf_ttrace_wait (ptid_t ptid, struct target_waitstatus *ourstatus) tts.tts_u.tts_exec.tts_pathlen, 0) == -1) perror_with_name (("ttrace")); ourstatus->value.execd_pathname[tts.tts_u.tts_exec.tts_pathlen] = 0; +#else + ourstatus->kind = TARGET_WAITKIND_STOPPED; + ourstatus->value.sig = TARGET_SIGNAL_TRAP; +#endif break; case TTEVT_EXIT: @@ -1081,9 +1089,9 @@ inf_ttrace_xfer_partial (struct target_ops *ops, enum target_object object, static void inf_ttrace_files_info (struct target_ops *ignore) { - printf_unfiltered (_("\tUsing the running image of %s %s.\n"), - attach_flag ? "attached" : "child", - target_pid_to_str (inferior_ptid)); + printf_filtered (_("\tUsing the running image of %s %s.\n"), + attach_flag ? "attached" : "child", + target_pid_to_str (inferior_ptid)); } static int @@ -1115,24 +1123,24 @@ inf_ttrace_target (void) { struct target_ops *t = inf_child_target (); - t->to_create_inferior = inf_ttrace_create_inferior; - t->to_kill = inf_ttrace_kill_inferior; - t->to_mourn_inferior = inf_ttrace_mourn_inferior; t->to_attach = inf_ttrace_attach; t->to_detach = inf_ttrace_detach; t->to_resume = inf_ttrace_resume; t->to_wait = inf_ttrace_wait; - t->to_xfer_partial = inf_ttrace_xfer_partial; t->to_files_info = inf_ttrace_files_info; - t->to_thread_alive = inf_ttrace_thread_alive; - t->to_pid_to_str = inf_ttrace_pid_to_str; - t->to_follow_fork = inf_ttrace_follow_fork; t->to_can_use_hw_breakpoint = inf_ttrace_can_use_hw_breakpoint; - t->to_region_size_ok_for_hw_watchpoint = - inf_ttrace_region_size_ok_for_hw_watchpoint; t->to_insert_watchpoint = inf_ttrace_insert_watchpoint; t->to_remove_watchpoint = inf_ttrace_remove_watchpoint; t->to_stopped_by_watchpoint = inf_ttrace_stopped_by_watchpoint; + t->to_region_size_ok_for_hw_watchpoint = + inf_ttrace_region_size_ok_for_hw_watchpoint; + t->to_kill = inf_ttrace_kill; + t->to_create_inferior = inf_ttrace_create_inferior; + t->to_follow_fork = inf_ttrace_follow_fork; + t->to_mourn_inferior = inf_ttrace_mourn_inferior; + t->to_thread_alive = inf_ttrace_thread_alive; + t->to_pid_to_str = inf_ttrace_pid_to_str; + t->to_xfer_partial = inf_ttrace_xfer_partial; ttrace_ops_hack = t; return t; diff --git a/gdb/main.c b/gdb/main.c index f73af20795e..5e912953da3 100644 --- a/gdb/main.c +++ b/gdb/main.c @@ -73,6 +73,9 @@ struct ui_file *gdb_stdtargin; struct ui_file *gdb_stdtarg; struct ui_file *gdb_stdtargerr; +/* Support for the --batch-silent option. */ +int batch_silent = 0; + /* Whether to enable writing into executable and core files */ extern int write_files; @@ -254,6 +257,7 @@ captured_main (void *data) {"silent", no_argument, &quiet, 1}, {"nx", no_argument, &inhibit_gdbinit, 1}, {"n", no_argument, &inhibit_gdbinit, 1}, + {"batch-silent", no_argument, 0, 'B'}, {"batch", no_argument, &batch, 1}, {"epoch", no_argument, &epoch_interface, 1}, @@ -379,6 +383,10 @@ captured_main (void *data) cmdsize * sizeof (*cmdarg)); } break; + case 'B': + batch = batch_silent = 1; + gdb_stdout = ui_file_new(); + break; #ifdef GDBTK case 'z': { @@ -829,6 +837,7 @@ Options:\n\n\ fputs_unfiltered (_("\ -b BAUDRATE Set serial port baud rate used for remote debugging.\n\ --batch Exit after processing options.\n\ + --batch-silent As for --batch, but suppress all gdb stdout output.\n\ --cd=DIR Change current directory to DIR.\n\ --command=FILE Execute GDB commands from FILE.\n\ --core=COREFILE Analyze the core dump COREFILE.\n\ diff --git a/gdb/mi/gdb-mi.el b/gdb/mi/gdb-mi.el index ce6411ce455..b0d5a03e05c 100644 --- a/gdb/mi/gdb-mi.el +++ b/gdb/mi/gdb-mi.el @@ -187,7 +187,8 @@ GUD buffer (I/O of GDB) | Locals buffer gdb-find-file-unhook nil gdb-source-file-list nil gdb-last-command nil - gdb-prompt-name nil) + gdb-prompt-name nil + gdb-buffer-fringe-width (car (window-fringes))) ;; (setq gdb-buffer-type 'gdbmi) ;; diff --git a/gdb/po/gdbtext b/gdb/po/gdbtext new file mode 100755 index 00000000000..1f80cf9eadb --- /dev/null +++ b/gdb/po/gdbtext @@ -0,0 +1,38 @@ +#!/bin/sh -e + +if test $# -lt 3 +then + echo "Usage: $0 ..." 1>&2 + exit 0 +fi + +xgettext=$1 ; shift +package=$1 ; shift + +for d in "$@" +do + __directories="$__directories --directory=$d" +done + +for d in "$@" +do + ( + cd $d + find * \ + -name '*-stub.c' -prune -o \ + -name 'testsuite' -prune -o \ + -name 'init.c' -prune -o \ + -name '*.[hc]' -print + ) +done | ${xgettext} \ + --default-domain=${package} \ + --copyright-holder="Free Software Foundation, Inc." \ + --add-comments \ + --files-from=- \ + --force-po \ + --debug \ + --language=c \ + --keyword=_ \ + --keyword=N_ \ + ${__directories} \ + -o po/${package}.pot diff --git a/gdb/ppc-tdep.h b/gdb/ppc-tdep.h index 5037c11788a..9abbf5c37b6 100644 --- a/gdb/ppc-tdep.h +++ b/gdb/ppc-tdep.h @@ -1,7 +1,7 @@ /* Target-dependent code for GDB, the GNU debugger. - Copyright 2000, 2001, 2002, 2003, 2004 Free Software Foundation, - Inc. + Copyright 2000, 2001, 2002, 2003, 2004, 2005 + Free Software Foundation, Inc. This file is part of GDB. @@ -381,4 +381,7 @@ enum ppc_spr_pbu2 = 1023 }; -#endif +/* Instruction size. */ +#define PPC_INSN_SIZE 4 + +#endif /* ppc-tdep.h */ diff --git a/gdb/regformats/reg-ia64.dat b/gdb/regformats/reg-ia64.dat index 125902dfe8d..21d56645d67 100644 --- a/gdb/regformats/reg-ia64.dat +++ b/gdb/regformats/reg-ia64.dat @@ -473,131 +473,3 @@ expedite:ip,psr,r12,bsp,cfm 64: 64: 64: -64:nat0 -64:nat1 -64:nat2 -64:nat3 -64:nat4 -64:nat5 -64:nat6 -64:nat7 -64:nat8 -64:nat9 -64:nat10 -64:nat11 -64:nat12 -64:nat13 -64:nat14 -64:nat15 -64:nat16 -64:nat17 -64:nat18 -64:nat19 -64:nat20 -64:nat21 -64:nat22 -64:nat23 -64:nat24 -64:nat25 -64:nat26 -64:nat27 -64:nat28 -64:nat29 -64:nat30 -64:nat31 -64:nat32 -64:nat33 -64:nat34 -64:nat35 -64:nat36 -64:nat37 -64:nat38 -64:nat39 -64:nat40 -64:nat41 -64:nat42 -64:nat43 -64:nat44 -64:nat45 -64:nat46 -64:nat47 -64:nat48 -64:nat49 -64:nat50 -64:nat51 -64:nat52 -64:nat53 -64:nat54 -64:nat55 -64:nat56 -64:nat57 -64:nat58 -64:nat59 -64:nat60 -64:nat61 -64:nat62 -64:nat63 -64:nat64 -64:nat65 -64:nat66 -64:nat67 -64:nat68 -64:nat69 -64:nat70 -64:nat71 -64:nat72 -64:nat73 -64:nat74 -64:nat75 -64:nat76 -64:nat77 -64:nat78 -64:nat79 -64:nat80 -64:nat81 -64:nat82 -64:nat83 -64:nat84 -64:nat85 -64:nat86 -64:nat87 -64:nat88 -64:nat89 -64:nat90 -64:nat91 -64:nat92 -64:nat93 -64:nat94 -64:nat95 -64:nat96 -64:nat97 -64:nat98 -64:nat99 -64:nat100 -64:nat101 -64:nat102 -64:nat103 -64:nat104 -64:nat105 -64:nat106 -64:nat107 -64:nat108 -64:nat109 -64:nat110 -64:nat111 -64:nat112 -64:nat113 -64:nat114 -64:nat115 -64:nat116 -64:nat117 -64:nat118 -64:nat119 -64:nat120 -64:nat121 -64:nat122 -64:nat123 -64:nat124 -64:nat125 -64:nat126 -64:nat127 diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c index f6459c72117..adfb945d056 100644 --- a/gdb/rs6000-tdep.c +++ b/gdb/rs6000-tdep.c @@ -3376,10 +3376,21 @@ rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) switch (info.osabi) { + case GDB_OSABI_LINUX: + /* FIXME: pgilliam/2005-10-21: Assume all PowerPC 64-bit linux systems + have altivec registers. If not, ptrace will fail the first time it's + called to access one and will not be called again. This wart will + be removed when Daniel Jacobowitz's proposal for autodetecting target + registers is implemented. */ + if ((v->arch == bfd_arch_powerpc) && ((v->mach)== bfd_mach_ppc64)) + { + tdep->ppc_vr0_regnum = 71; + tdep->ppc_vrsave_regnum = 104; + } + /* Fall Thru */ case GDB_OSABI_NETBSD_AOUT: case GDB_OSABI_NETBSD_ELF: case GDB_OSABI_UNKNOWN: - case GDB_OSABI_LINUX: set_gdbarch_unwind_pc (gdbarch, rs6000_unwind_pc); frame_unwind_append_sniffer (gdbarch, rs6000_frame_sniffer); set_gdbarch_unwind_dummy_id (gdbarch, rs6000_unwind_dummy_id); @@ -3420,14 +3431,6 @@ rs6000_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file) /* FIXME: Dump gdbarch_tdep. */ } -static struct cmd_list_element *info_powerpc_cmdlist = NULL; - -static void -rs6000_info_powerpc_command (char *args, int from_tty) -{ - help_list (info_powerpc_cmdlist, "info powerpc ", class_info, gdb_stdout); -} - /* Initialization code. */ extern initialize_file_ftype _initialize_rs6000_tdep; /* -Wmissing-prototypes */ diff --git a/gdb/testsuite/ChangeLog b/gdb/testsuite/ChangeLog index 2e74bc84570..c4aad6937da 100644 --- a/gdb/testsuite/ChangeLog +++ b/gdb/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2005-10-31 Mark Kettenis + + * gdb.asm/asm-source.exp: Use -e instead of --entry. + +2005-10-31 Mark Kettenis + + * gdb.base/bfp-test.exp: Properly anchor gdb_multiple_test usage. + 2005-10-17 Paul Gilliam * gdb.arch/altivec-regs.exp: Adjust "info reg vrsave" and "info reg diff --git a/gdb/testsuite/gdb.ada/array_return/p.adb b/gdb/testsuite/gdb.ada/array_return/p.adb new file mode 100644 index 00000000000..c465d2894b4 --- /dev/null +++ b/gdb/testsuite/gdb.ada/array_return/p.adb @@ -0,0 +1,10 @@ +with Pck; use Pck; + +procedure P is + Small : Data_Small; + Large : Data_Large; +begin + Small := Create_Small; + Large := Create_Large; + Small (1) := Large (1); +end P; diff --git a/gdb/testsuite/gdb.ada/array_return/pck.adb b/gdb/testsuite/gdb.ada/array_return/pck.adb new file mode 100644 index 00000000000..30282d1998c --- /dev/null +++ b/gdb/testsuite/gdb.ada/array_return/pck.adb @@ -0,0 +1,13 @@ +package body Pck is + + function Create_Small return Data_Small is + begin + return (others => 1); + end Create_Small; + + function Create_Large return Data_Large is + begin + return (others => 2); + end Create_Large; + +end Pck; diff --git a/gdb/testsuite/gdb.ada/array_return/pck.ads b/gdb/testsuite/gdb.ada/array_return/pck.ads new file mode 100644 index 00000000000..2561ac73f29 --- /dev/null +++ b/gdb/testsuite/gdb.ada/array_return/pck.ads @@ -0,0 +1,10 @@ +package Pck is + + type Data_Small is array (1 .. 2) of Integer; + type Data_Large is array (1 .. 4) of Integer; + + function Create_Small return Data_Small; + function Create_Large return Data_Large; + +end Pck; + diff --git a/gdb/testsuite/gdb.ada/arrayidx/p.adb b/gdb/testsuite/gdb.ada/arrayidx/p.adb new file mode 100644 index 00000000000..398e34d3f9f --- /dev/null +++ b/gdb/testsuite/gdb.ada/arrayidx/p.adb @@ -0,0 +1,56 @@ +-- Copyright 2005 Free Software Foundation, Inc. +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 2 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +-- MA 02110-1301, USA + +procedure P is + type Index is (One, Two, Three); + + type Table is array (Integer range 1 .. 3) of Integer; + type ETable is array (Index) of Integer; + type RTable is array (Index range Two .. Three) of Integer; + type UTable is array (Positive range <>) of Integer; + + type PTable is array (Index) of Boolean; + pragma Pack (PTable); + + function Get_UTable (I : Integer) return UTable is + begin + return Utable'(1 => I, 2 => 2, 3 => 3); + end Get_UTable; + + One_Two_Three : Table := (1, 2, 3); + E_One_Two_Three : ETable := (1, 2, 3); + R_Two_Three : RTable := (2, 3); + U_One_Two_Three : UTable := Get_UTable (1); + P_One_Two_Three : PTable := (False, True, True); + + Few_Reps : UTable := (1, 2, 3, 3, 3, 3, 3, 4, 5); + Many_Reps : UTable := (1, 2, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 4, 5); + + Empty : array (1 .. 0) of Integer := (others => 0); + +begin + One_Two_Three (1) := 4; -- START + E_One_Two_Three (One) := 4; + R_Two_Three (Two) := 4; + U_One_Two_Three (U_One_Two_Three'First) := 4; + P_One_Two_Three (One) := True; + + Few_Reps (Few_Reps'First) := 2; + Many_Reps (Many_Reps'First) := 2; + + Empty := (others => 1); +end P; diff --git a/gdb/testsuite/gdb.asm/asm-source.exp b/gdb/testsuite/gdb.asm/asm-source.exp index 2477e247eaa..5abe8eeae9e 100644 --- a/gdb/testsuite/gdb.asm/asm-source.exp +++ b/gdb/testsuite/gdb.asm/asm-source.exp @@ -34,7 +34,7 @@ set bug_id 0 set asm-arch "" set asm-note "empty" set asm-flags "" -set link-flags "--entry _start" +set link-flags "-e _start" set debug-flags "" switch -glob -- [istarget] { diff --git a/gdb/testsuite/gdb.base/bfp-test.exp b/gdb/testsuite/gdb.base/bfp-test.exp index 43bf18753db..85f2028346e 100644 --- a/gdb/testsuite/gdb.base/bfp-test.exp +++ b/gdb/testsuite/gdb.base/bfp-test.exp @@ -59,7 +59,7 @@ gdb_test_multiple "set var b32=10.5f" "$test" { -re "$gdb_prompt $" { pass "$test" } - -re "Invalid number" { + -re "Invalid number.*$gdb_prompt $" { fail "$test (do not recognize 10.5f)" } } @@ -69,7 +69,7 @@ gdb_test_multiple "set var b64=20.25f" "$test" { -re "$gdb_prompt $" { pass "$test" } - -re "Invalid number" { + -re "Invalid number.*$gdb_prompt $" { fail "$test (do not recognize 20.25f)" } } @@ -79,7 +79,7 @@ gdb_test_multiple "set var b128=30.375l" "$test" { -re "$gdb_prompt $" { pass "$test" } - -re "Invalid number" { + -re "Invalid number.*$gdb_prompt $" { fail "$test (do not recognize 30.375l)" } } @@ -92,7 +92,7 @@ gdb_test "print b128" ".*9 = 30\.375.*" "The value of b128 is changed to 30.375" set test "set variable b32 = 100.5a" gdb_test_multiple "set var b32=100.5a" "$test" { - -re "Invalid number" { + -re "Invalid number.*$gdb_prompt $" { pass "$test" } -re "$gdb_prompt $" { @@ -102,7 +102,7 @@ gdb_test_multiple "set var b32=100.5a" "$test" { set test "set variable b64 = 200.25x" gdb_test_multiple "set var b64=200.25x" "$test" { - -re "Invalid number" { + -re "Invalid number.*$gdb_prompt $" { pass "$test" } -re "$gdb_prompt $" { @@ -112,7 +112,7 @@ gdb_test_multiple "set var b64=200.25x" "$test" { set test "set variable b128 = 300.375fl" gdb_test_multiple "set var b128=300.375fl" "$test" { - -re "Invalid number" { + -re "Invalid number.*$gdb_prompt $" { pass "$test" } -re "$gdb_prompt $" { @@ -122,7 +122,7 @@ gdb_test_multiple "set var b128=300.375fl" "$test" { set test "set variable b128 = 300.375fff" gdb_test_multiple "set var b128=300.375fff" "$test" { - -re "Invalid number" { + -re "Invalid number.*$gdb_prompt $" { pass "$test" } -re "$gdb_prompt $" { diff --git a/gdb/tui/tui-command.c b/gdb/tui/tui-command.c index 399ef85b8c5..7f3fc7599b2 100644 --- a/gdb/tui/tui-command.c +++ b/gdb/tui/tui-command.c @@ -68,33 +68,36 @@ tui_dispatch_ctrl_char (unsigned int ch) ** Seems like a bug in the curses library? */ term = (char *) getenv ("TERM"); - for (i = 0; (term && term[i]); i++) - term[i] = toupper (term[i]); - if ((strcmp (term, "XTERM") == 0) && key_is_start_sequence (ch)) + if (term) { - unsigned int page_ch = 0; - unsigned int tmp_char; - - tmp_char = 0; - while (!key_is_end_sequence (tmp_char)) + for (i = 0; term[i]; i++) + term[i] = toupper (term[i]); + if ((strcmp (term, "XTERM") == 0) && key_is_start_sequence (ch)) { - tmp_char = (int) wgetch (w); - if (tmp_char == ERR) - { - return ch; - } - if (!tmp_char) - break; - if (tmp_char == 53) - page_ch = KEY_PPAGE; - else if (tmp_char == 54) - page_ch = KEY_NPAGE; - else + unsigned int page_ch = 0; + unsigned int tmp_char; + + tmp_char = 0; + while (!key_is_end_sequence (tmp_char)) { - return 0; + tmp_char = (int) wgetch (w); + if (tmp_char == ERR) + { + return ch; + } + if (!tmp_char) + break; + if (tmp_char == 53) + page_ch = KEY_PPAGE; + else if (tmp_char == 54) + page_ch = KEY_NPAGE; + else + { + return 0; + } } + ch_copy = page_ch; } - ch_copy = page_ch; } switch (ch_copy) diff --git a/gdb/tui/tui-data.c b/gdb/tui/tui-data.c index 800d72a069f..746e85b8ce5 100644 --- a/gdb/tui/tui-data.c +++ b/gdb/tui/tui-data.c @@ -207,7 +207,8 @@ tui_clear_win_detail (struct tui_win_info * win_info) { case SRC_WIN: case DISASSEM_WIN: - win_info->detail.source_info.start_line_or_addr.addr = 0; + win_info->detail.source_info.start_line_or_addr.loa = LOA_ADDRESS; + win_info->detail.source_info.start_line_or_addr.u.addr = 0; win_info->detail.source_info.horizontal_offset = 0; break; case CMD_WIN: @@ -486,7 +487,8 @@ init_content_element (struct tui_win_element * element, enum tui_win_type type) case SRC_WIN: case DISASSEM_WIN: element->which_element.source.line = (char *) NULL; - element->which_element.source.line_or_addr.line_no = 0; + element->which_element.source.line_or_addr.loa = LOA_LINE; + element->which_element.source.line_or_addr.u.line_no = 0; element->which_element.source.is_exec_point = FALSE; element->which_element.source.has_break = FALSE; break; @@ -537,7 +539,8 @@ init_win_info (struct tui_win_info * win_info) win_info->detail.source_info.execution_info = (struct tui_gen_win_info *) NULL; win_info->detail.source_info.has_locator = FALSE; win_info->detail.source_info.horizontal_offset = 0; - win_info->detail.source_info.start_line_or_addr.addr = 0; + win_info->detail.source_info.start_line_or_addr.loa = LOA_ADDRESS; + win_info->detail.source_info.start_line_or_addr.u.addr = 0; win_info->detail.source_info.filename = 0; break; case DATA_WIN: diff --git a/gdb/tui/tui-data.h b/gdb/tui/tui-data.h index 02bebb4e2be..4a6c4133151 100644 --- a/gdb/tui/tui-data.h +++ b/gdb/tui/tui-data.h @@ -147,10 +147,14 @@ enum tui_register_display_type }; /* Structure describing source line or line address */ -union tui_line_or_address +struct tui_line_or_address { - int line_no; - CORE_ADDR addr; + enum { LOA_LINE, LOA_ADDRESS } loa; + union + { + int line_no; + CORE_ADDR addr; + } u; }; /* Current Layout definition */ @@ -166,7 +170,7 @@ struct tui_layout_def struct tui_source_element { char *line; - union tui_line_or_address line_or_addr; + struct tui_line_or_address line_or_addr; int is_exec_point; int has_break; }; @@ -259,7 +263,7 @@ struct tui_source_info /* Execution information window. */ struct tui_gen_win_info *execution_info; int horizontal_offset; /* used for horizontal scroll */ - union tui_line_or_address start_line_or_addr; + struct tui_line_or_address start_line_or_addr; char* filename; }; diff --git a/gdb/tui/tui-disasm.c b/gdb/tui/tui-disasm.c index 9c3072bf74e..aa5a62caac3 100644 --- a/gdb/tui/tui-disasm.c +++ b/gdb/tui/tui-disasm.c @@ -188,7 +188,8 @@ tui_set_disassem_content (CORE_ADDR pc) if (ret != TUI_SUCCESS) return ret; - TUI_DISASM_WIN->detail.source_info.start_line_or_addr.addr = pc; + TUI_DISASM_WIN->detail.source_info.start_line_or_addr.loa = LOA_ADDRESS; + TUI_DISASM_WIN->detail.source_info.start_line_or_addr.u.addr = pc; cur_pc = (CORE_ADDR) (((struct tui_win_element *) locator->content[0])->which_element.locator.addr); @@ -249,7 +250,8 @@ tui_set_disassem_content (CORE_ADDR pc) else src->line[0] = '\0'; - src->line_or_addr.addr = asm_lines[i].addr; + src->line_or_addr.loa = LOA_ADDRESS; + src->line_or_addr.u.addr = asm_lines[i].addr; src->is_exec_point = asm_lines[i].addr == cur_pc; /* See whether there is a breakpoint installed. */ @@ -270,9 +272,10 @@ tui_show_disassem (CORE_ADDR start_addr) { struct symtab *s = find_pc_symtab (start_addr); struct tui_win_info * win_with_focus = tui_win_with_focus (); - union tui_line_or_address val; + struct tui_line_or_address val; - val.addr = start_addr; + val.loa = LOA_ADDRESS; + val.u.addr = start_addr; tui_add_win_to_layout (DISASSEM_WIN); tui_update_source_window (TUI_DISASM_WIN, s, val, FALSE); /* @@ -295,14 +298,15 @@ tui_show_disassem_and_update_source (CORE_ADDR start_addr) tui_show_disassem (start_addr); if (tui_current_layout () == SRC_DISASSEM_COMMAND) { - union tui_line_or_address val; + struct tui_line_or_address val; /* ** Update what is in the source window if it is displayed too, ** note that it follows what is in the disassembly window and visa-versa */ sal = find_pc_line (start_addr, 0); - val.line_no = sal.line; + val.loa = LOA_LINE; + val.u.line_no = sal.line; tui_update_source_window (TUI_SRC_WIN, sal.symtab, val, TRUE); if (sal.symtab) { @@ -376,7 +380,7 @@ tui_vertical_disassem_scroll (enum tui_scroll_direction scroll_direction, CORE_ADDR pc; tui_win_content content; struct symtab *s; - union tui_line_or_address val; + struct tui_line_or_address val; int max_lines, dir; struct symtab_and_line cursal = get_current_source_symtab_and_line (); @@ -388,10 +392,11 @@ tui_vertical_disassem_scroll (enum tui_scroll_direction scroll_direction, /* account for hilite */ max_lines = TUI_DISASM_WIN->generic.height - 2; - pc = content[0]->which_element.source.line_or_addr.addr; + pc = content[0]->which_element.source.line_or_addr.u.addr; dir = (scroll_direction == FORWARD_SCROLL) ? max_lines : - max_lines; - val.addr = tui_find_disassembly_address (pc, dir); + val.loa = LOA_ADDRESS; + val.u.addr = tui_find_disassembly_address (pc, dir); tui_update_source_window_as_is (TUI_DISASM_WIN, s, val, FALSE); } } diff --git a/gdb/tui/tui-layout.c b/gdb/tui/tui-layout.c index d2d8efe11b2..5b6553388cc 100644 --- a/gdb/tui/tui-layout.c +++ b/gdb/tui/tui-layout.c @@ -519,14 +519,14 @@ extract_display_start_addr (void) case SRC_COMMAND: case SRC_DATA_COMMAND: find_line_pc (cursal.symtab, - TUI_SRC_WIN->detail.source_info.start_line_or_addr.line_no, + TUI_SRC_WIN->detail.source_info.start_line_or_addr.u.line_no, &pc); addr = pc; break; case DISASSEM_COMMAND: case SRC_DISASSEM_COMMAND: case DISASSEM_DATA_COMMAND: - addr = TUI_DISASM_WIN->detail.source_info.start_line_or_addr.addr; + addr = TUI_DISASM_WIN->detail.source_info.start_line_or_addr.u.addr; break; default: addr = 0; diff --git a/gdb/tui/tui-source.c b/gdb/tui/tui-source.c index d5154b11da1..2710f98b649 100644 --- a/gdb/tui/tui-source.c +++ b/gdb/tui/tui-source.c @@ -106,7 +106,8 @@ tui_set_source_content (struct symtab *s, int line_no, int noerror) stream = fdopen (desc, FOPEN_RT); clearerr (stream); cur_line = 0; - cur_line_no = src->start_line_or_addr.line_no = line_no; + src->start_line_or_addr.loa = LOA_LINE; + cur_line_no = src->start_line_or_addr.u.line_no = line_no; if (offset > 0) src_line = (char *) xmalloc ( (threshold + 1) * sizeof (char)); @@ -137,7 +138,9 @@ tui_set_source_content (struct symtab *s, int line_no, int noerror) /* Set whether element is the execution point and whether there is a break point on it. */ - element->which_element.source.line_or_addr.line_no = + element->which_element.source.line_or_addr.loa = + LOA_LINE; + element->which_element.source.line_or_addr.u.line_no = cur_line_no; element->which_element.source.is_exec_point = (strcmp (((struct tui_win_element *) @@ -247,7 +250,8 @@ tui_set_source_content_nil (struct tui_win_info * win_info, char *warning_string struct tui_win_element * element = (struct tui_win_element *) win_info->generic.content[curr_line]; - element->which_element.source.line_or_addr.line_no = 0; + element->which_element.source.line_or_addr.loa = LOA_LINE; + element->which_element.source.line_or_addr.u.line_no = 0; element->which_element.source.is_exec_point = FALSE; element->which_element.source.has_break = FALSE; @@ -295,7 +299,7 @@ tui_set_source_content_nil (struct tui_win_info * win_info, char *warning_string /* Function to display source in the source window. This function initializes the horizontal scroll to 0. */ void -tui_show_symtab_source (struct symtab *s, union tui_line_or_address line, int noerror) +tui_show_symtab_source (struct symtab *s, struct tui_line_or_address line, int noerror) { TUI_SRC_WIN->detail.source_info.horizontal_offset = 0; tui_update_source_window_as_is (TUI_SRC_WIN, s, line, noerror); @@ -320,7 +324,7 @@ tui_vertical_source_scroll (enum tui_scroll_direction scroll_direction, { if (TUI_SRC_WIN->generic.content != NULL) { - union tui_line_or_address l; + struct tui_line_or_address l; struct symtab *s; tui_win_content content = (tui_win_content) TUI_SRC_WIN->generic.content; struct symtab_and_line cursal = get_current_source_symtab_and_line (); @@ -330,23 +334,24 @@ tui_vertical_source_scroll (enum tui_scroll_direction scroll_direction, else s = cursal.symtab; + l.loa = LOA_LINE; if (scroll_direction == FORWARD_SCROLL) { - l.line_no = content[0]->which_element.source.line_or_addr.line_no + - num_to_scroll; - if (l.line_no > s->nlines) + l.u.line_no = content[0]->which_element.source.line_or_addr.u.line_no + + num_to_scroll; + if (l.u.line_no > s->nlines) /*line = s->nlines - win_info->generic.content_size + 1; */ /*elz: fix for dts 23398 */ - l.line_no = content[0]->which_element.source.line_or_addr.line_no; + l.u.line_no = content[0]->which_element.source.line_or_addr.u.line_no; } else { - l.line_no = content[0]->which_element.source.line_or_addr.line_no - - num_to_scroll; - if (l.line_no <= 0) - l.line_no = 1; + l.u.line_no = content[0]->which_element.source.line_or_addr.u.line_no + - num_to_scroll; + if (l.u.line_no <= 0) + l.u.line_no = 1; } - print_source_lines (s, l.line_no, l.line_no + 1, 0); + print_source_lines (s, l.u.line_no, l.u.line_no + 1, 0); } } diff --git a/gdb/tui/tui-source.h b/gdb/tui/tui-source.h index 3b61ca4374d..4e49488ddc9 100644 --- a/gdb/tui/tui-source.h +++ b/gdb/tui/tui-source.h @@ -33,7 +33,7 @@ struct tui_win_info; extern void tui_set_source_content_nil (struct tui_win_info *, char *); extern enum tui_status tui_set_source_content (struct symtab *, int, int); -extern void tui_show_symtab_source (struct symtab *, union tui_line_or_address, int); +extern void tui_show_symtab_source (struct symtab *, struct tui_line_or_address, int); extern int tui_source_is_displayed (char *); extern void tui_vertical_source_scroll (enum tui_scroll_direction, int); diff --git a/gdb/tui/tui-stack.c b/gdb/tui/tui-stack.c index c0a1b82c0c1..bba77fdcb23 100644 --- a/gdb/tui/tui-stack.c +++ b/gdb/tui/tui-stack.c @@ -364,14 +364,15 @@ tui_show_frame_info (struct frame_info *fi) if (win_info == TUI_SRC_WIN) { - union tui_line_or_address l; - l.line_no = start_line; + struct tui_line_or_address l; + l.loa = LOA_LINE; + l.u.line_no = start_line; if (!(source_already_displayed && tui_line_is_displayed (item->locator.line_no, win_info, TRUE))) tui_update_source_window (win_info, sal.symtab, l, TRUE); else { - l.line_no = item->locator.line_no; + l.u.line_no = item->locator.line_no; tui_set_is_exec_point_at (l, win_info); } } @@ -379,13 +380,14 @@ tui_show_frame_info (struct frame_info *fi) { if (win_info == TUI_DISASM_WIN) { - union tui_line_or_address a; - a.addr = low; + struct tui_line_or_address a; + a.loa = LOA_ADDRESS; + a.u.addr = low; if (!tui_addr_is_displayed (item->locator.addr, win_info, TRUE)) tui_update_source_window (win_info, sal.symtab, a, TRUE); else { - a.addr = item->locator.addr; + a.u.addr = item->locator.addr; tui_set_is_exec_point_at (a, win_info); } } diff --git a/gdb/tui/tui-win.c b/gdb/tui/tui-win.c index cdd2550d2ce..739c53c7d6e 100644 --- a/gdb/tui/tui-win.c +++ b/gdb/tui/tui-win.c @@ -1322,31 +1322,30 @@ make_visible_with_new_height (struct tui_win_info * win_info) tui_make_visible (win_info->detail.source_info.execution_info); if (win_info->generic.content != NULL) { - union tui_line_or_address line_or_addr; + struct tui_line_or_address line_or_addr; struct symtab_and_line cursal = get_current_source_symtab_and_line (); - if (win_info->generic.type == SRC_WIN) - line_or_addr.line_no = - win_info->detail.source_info.start_line_or_addr.line_no; - else - line_or_addr.addr = - win_info->detail.source_info.start_line_or_addr.addr; + line_or_addr = win_info->detail.source_info.start_line_or_addr; tui_free_win_content (&win_info->generic); tui_update_source_window (win_info, cursal.symtab, line_or_addr, TRUE); } else if (deprecated_selected_frame != (struct frame_info *) NULL) { - union tui_line_or_address line; + struct tui_line_or_address line; struct symtab_and_line cursal = get_current_source_symtab_and_line (); s = find_pc_symtab (get_frame_pc (deprecated_selected_frame)); if (win_info->generic.type == SRC_WIN) - line.line_no = cursal.line; + { + line.loa = LOA_LINE; + line.u.line_no = cursal.line; + } else { - find_line_pc (s, cursal.line, &line.addr); + line.loa = LOA_ADDRESS; + find_line_pc (s, cursal.line, &line.u.addr); } tui_update_source_window (win_info, s, line, TRUE); } diff --git a/gdb/tui/tui-winsource.c b/gdb/tui/tui-winsource.c index de19d25c239..d5c786d1e61 100644 --- a/gdb/tui/tui-winsource.c +++ b/gdb/tui/tui-winsource.c @@ -41,6 +41,7 @@ #include "gdb_string.h" #include "gdb_curses.h" +#include "gdb_assert.h" /* Function to display the "main" routine. */ void @@ -71,7 +72,7 @@ tui_display_main (void) initializes the horizontal scroll to 0. */ void tui_update_source_window (struct tui_win_info * win_info, struct symtab *s, - union tui_line_or_address line_or_addr, int noerror) + struct tui_line_or_address line_or_addr, int noerror) { win_info->detail.source_info.horizontal_offset = 0; tui_update_source_window_as_is (win_info, s, line_or_addr, noerror); @@ -84,14 +85,14 @@ tui_update_source_window (struct tui_win_info * win_info, struct symtab *s, shows the source as specified by the horizontal offset. */ void tui_update_source_window_as_is (struct tui_win_info * win_info, struct symtab *s, - union tui_line_or_address line_or_addr, int noerror) + struct tui_line_or_address line_or_addr, int noerror) { enum tui_status ret; if (win_info->generic.type == SRC_WIN) - ret = tui_set_source_content (s, line_or_addr.line_no, noerror); + ret = tui_set_source_content (s, line_or_addr.u.line_no, noerror); else - ret = tui_set_disassem_content (line_or_addr.addr); + ret = tui_set_disassem_content (line_or_addr.u.addr); if (ret == TUI_FAILURE) { @@ -107,7 +108,7 @@ tui_update_source_window_as_is (struct tui_win_info * win_info, struct symtab *s { struct symtab_and_line sal; - sal.line = line_or_addr.line_no + + sal.line = line_or_addr.u.line_no + (win_info->generic.content_size - 2); sal.symtab = s; set_current_source_symtab_and_line (&sal); @@ -134,7 +135,7 @@ tui_update_source_windows_with_addr (CORE_ADDR addr) if (addr != 0) { struct symtab_and_line sal; - union tui_line_or_address l; + struct tui_line_or_address l; switch (tui_current_layout ()) { @@ -147,7 +148,8 @@ tui_update_source_windows_with_addr (CORE_ADDR addr) break; default: sal = find_pc_line (addr, 0); - l.line_no = sal.line; + l.loa = LOA_LINE; + l.u.line_no = sal.line; tui_show_symtab_source (sal.symtab, l, FALSE); break; } @@ -172,7 +174,7 @@ void tui_update_source_windows_with_line (struct symtab *s, int line) { CORE_ADDR pc; - union tui_line_or_address l; + struct tui_line_or_address l; switch (tui_current_layout ()) { @@ -182,7 +184,8 @@ tui_update_source_windows_with_line (struct symtab *s, int line) tui_update_source_windows_with_addr (pc); break; default: - l.line_no = line; + l.loa = LOA_LINE; + l.u.line_no = line; tui_show_symtab_source (s, l, FALSE); if (tui_current_layout () == SRC_DISASSEM_COMMAND) { @@ -336,7 +339,7 @@ tui_horizontal_source_scroll (struct tui_win_info * win_info, /* Set or clear the has_break flag in the line whose line is line_no. */ void -tui_set_is_exec_point_at (union tui_line_or_address l, struct tui_win_info * win_info) +tui_set_is_exec_point_at (struct tui_line_or_address l, struct tui_win_info * win_info) { int changed = 0; int i; @@ -346,8 +349,15 @@ tui_set_is_exec_point_at (union tui_line_or_address l, struct tui_win_info * win while (i < win_info->generic.content_size) { int new_state; - - if (content[i]->which_element.source.line_or_addr.addr == l.addr) + struct tui_line_or_address content_loa = + content[i]->which_element.source.line_or_addr; + + gdb_assert (l.loa == LOA_ADDRESS || l.loa == LOA_LINE); + gdb_assert (content_loa.loa == LOA_LINE + || content_loa.loa == LOA_ADDRESS); + if (content_loa.loa == l.loa + && ((l.loa == LOA_LINE && content_loa.u.line_no == l.u.line_no) + || (content_loa.u.addr == l.u.addr))) new_state = TRUE; else new_state = FALSE; @@ -414,12 +424,16 @@ tui_update_breakpoint_info (struct tui_win_info * win, int current_only) bp != (struct breakpoint *) NULL; bp = bp->next) { + gdb_assert (line->line_or_addr.loa == LOA_LINE + || line->line_or_addr.loa == LOA_ADDRESS); if ((win == TUI_SRC_WIN && bp->source_file && (strcmp (src->filename, bp->source_file) == 0) - && bp->line_number == line->line_or_addr.line_no) + && line->line_or_addr.loa == LOA_LINE + && bp->line_number == line->line_or_addr.u.line_no) || (win == TUI_DISASM_WIN - && bp->loc->address == line->line_or_addr.addr)) + && line->line_or_addr.loa == LOA_ADDRESS + && bp->loc->address == line->line_or_addr.u.addr)) { if (bp->enable_state == bp_disabled) mode |= TUI_BP_DISABLED; @@ -614,8 +628,11 @@ tui_line_is_displayed (int line, struct tui_win_info * win_info, while (i < win_info->generic.content_size - threshold && !is_displayed) { is_displayed = (((struct tui_win_element *) - win_info->generic.content[i])->which_element.source.line_or_addr.line_no - == (int) line); + win_info->generic.content[i])->which_element.source.line_or_addr.loa + == LOA_LINE) + && (((struct tui_win_element *) + win_info->generic.content[i])->which_element.source.line_or_addr.u.line_no + == (int) line); i++; } @@ -640,8 +657,11 @@ tui_addr_is_displayed (CORE_ADDR addr, struct tui_win_info * win_info, while (i < win_info->generic.content_size - threshold && !is_displayed) { is_displayed = (((struct tui_win_element *) - win_info->generic.content[i])->which_element.source.line_or_addr.addr - == addr); + win_info->generic.content[i])->which_element.source.line_or_addr.loa + == LOA_ADDRESS) + && (((struct tui_win_element *) + win_info->generic.content[i])->which_element.source.line_or_addr.u.addr + == addr); i++; } diff --git a/gdb/tui/tui-winsource.h b/gdb/tui/tui-winsource.h index e64589ba5f2..d45c5891b17 100644 --- a/gdb/tui/tui-winsource.h +++ b/gdb/tui/tui-winsource.h @@ -43,10 +43,10 @@ extern int tui_update_breakpoint_info (struct tui_win_info * win, /* Function to display the "main" routine. */ extern void tui_display_main (void); extern void tui_update_source_window (struct tui_win_info *, struct symtab *, - union tui_line_or_address, int); + struct tui_line_or_address, int); extern void tui_update_source_window_as_is (struct tui_win_info *, struct symtab *, - union tui_line_or_address, int); + struct tui_line_or_address, int); extern void tui_update_source_windows_with_addr (CORE_ADDR); extern void tui_update_source_windows_with_line (struct symtab *, int); extern void tui_clear_source_content (struct tui_win_info *, int); @@ -60,7 +60,7 @@ extern void tui_erase_exec_info_content (struct tui_win_info *); extern void tui_clear_exec_info_content (struct tui_win_info *); extern void tui_update_exec_info (struct tui_win_info *); -extern void tui_set_is_exec_point_at (union tui_line_or_address, +extern void tui_set_is_exec_point_at (struct tui_line_or_address, struct tui_win_info *); extern enum tui_status tui_alloc_source_buffer (struct tui_win_info *); extern int tui_line_is_displayed (int, struct tui_win_info *, int); diff --git a/gdb/vax-tdep.c b/gdb/vax-tdep.c index 58d82964fbe..625918c1cf9 100644 --- a/gdb/vax-tdep.c +++ b/gdb/vax-tdep.c @@ -23,6 +23,7 @@ #include "defs.h" #include "arch-utils.h" #include "dis-asm.h" +#include "floatformat.h" #include "frame.h" #include "frame-base.h" #include "frame-unwind.h" @@ -476,6 +477,11 @@ vax_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) gdbarch = gdbarch_alloc (&info, NULL); + set_gdbarch_float_format (gdbarch, &floatformat_vax_f); + set_gdbarch_double_format (gdbarch, &floatformat_vax_d); + set_gdbarch_long_double_format (gdbarch, &floatformat_vax_d); + set_gdbarch_long_double_bit(gdbarch, 64); + /* Register info */ set_gdbarch_num_regs (gdbarch, VAX_NUM_REGS); set_gdbarch_register_name (gdbarch, vax_register_name); diff --git a/gdb/version.in b/gdb/version.in index 1c599bc2b80..338ce0a81d1 100644 --- a/gdb/version.in +++ b/gdb/version.in @@ -1 +1 @@ -6.3.50.20051020-cvs +6.3.50.20051101-cvs diff --git a/gdb/win32-nat.c b/gdb/win32-nat.c index d9525727479..81c115f898f 100644 --- a/gdb/win32-nat.c +++ b/gdb/win32-nat.c @@ -53,10 +53,15 @@ #include #include #include "exec.h" +#include "solist.h" +#include "solib.h" #include "i386-tdep.h" #include "i387-tdep.h" +static struct target_ops win32_ops; +static struct target_so_ops win32_so_ops; + /* If we're not using the old Cygwin header file set, define the following which never should have been in the generic Win32 API headers in the first place since they were our own invention... */ @@ -79,7 +84,9 @@ static int debug_registers_used; /* The string sent by cygwin when it processes a signal. FIXME: This should be in a cygwin include file. */ -#define CYGWIN_SIGNAL_STRING "cygwin: signal" +#ifndef _CYGWIN_SIGNAL_STRING +#define _CYGWIN_SIGNAL_STRING "cYgSiGw00f" +#endif #define CHECK(x) check (x, __FILE__,__LINE__) #define DEBUG_EXEC(x) if (debug_exec) printf_unfiltered x @@ -87,9 +94,9 @@ static int debug_registers_used; #define DEBUG_MEM(x) if (debug_memory) printf_unfiltered x #define DEBUG_EXCEPT(x) if (debug_exceptions) printf_unfiltered x -static void child_stop (void); -static int win32_child_thread_alive (ptid_t); -void child_kill_inferior (void); +static void win32_stop (void); +static int win32_win32_thread_alive (ptid_t); +static void win32_kill_inferior (void); static enum target_signal last_sig = TARGET_SIGNAL_0; /* Set if a signal was received from the debugged process */ @@ -251,15 +258,14 @@ thread_rec (DWORD id, int get_context) /* Add a thread to the thread list */ static thread_info * -child_add_thread (DWORD id, HANDLE h) +win32_add_thread (DWORD id, HANDLE h) { thread_info *th; if ((th = thread_rec (id, FALSE))) return th; - th = (thread_info *) xmalloc (sizeof (*th)); - memset (th, 0, sizeof (*th)); + th = XZALLOC (thread_info); th->id = id; th->h = h; th->next = thread_head.next; @@ -287,11 +293,11 @@ child_add_thread (DWORD id, HANDLE h) /* Clear out any old thread list and reintialize it to a pristine state. */ static void -child_init_thread_list (void) +win32_init_thread_list (void) { thread_info *th = &thread_head; - DEBUG_EVENTS (("gdb: child_init_thread_list\n")); + DEBUG_EVENTS (("gdb: win32_init_thread_list\n")); init_thread_list (); while (th->next != NULL) { @@ -305,7 +311,7 @@ child_init_thread_list (void) /* Delete a thread from the list of threads */ static void -child_delete_thread (DWORD id) +win32_delete_thread (DWORD id) { thread_info *th; @@ -328,7 +334,7 @@ child_delete_thread (DWORD id) } static void -do_child_fetch_inferior_registers (int r) +do_win32_fetch_inferior_registers (int r) { char *context_offset = ((char *) ¤t_thread->context) + mappings[r]; long l; @@ -369,24 +375,24 @@ do_child_fetch_inferior_registers (int r) else { for (r = 0; r < NUM_REGS; r++) - do_child_fetch_inferior_registers (r); + do_win32_fetch_inferior_registers (r); } #undef I387_ST0_REGNUM } static void -child_fetch_inferior_registers (int r) +win32_fetch_inferior_registers (int r) { current_thread = thread_rec (PIDGET (inferior_ptid), TRUE); /* Check if current_thread exists. Windows sometimes uses a non-existent thread id in its events */ if (current_thread) - do_child_fetch_inferior_registers (r); + do_win32_fetch_inferior_registers (r); } static void -do_child_store_inferior_registers (int r) +do_win32_store_inferior_registers (int r) { if (!current_thread) /* Windows sometimes uses a non-existent thread id in its events */; @@ -396,19 +402,19 @@ do_child_store_inferior_registers (int r) else { for (r = 0; r < NUM_REGS; r++) - do_child_store_inferior_registers (r); + do_win32_store_inferior_registers (r); } } /* Store a new register value into the current thread context */ static void -child_store_inferior_registers (int r) +win32_store_inferior_registers (int r) { current_thread = thread_rec (PIDGET (inferior_ptid), TRUE); /* Check if current_thread exists. Windows sometimes uses a non-existent thread id in its events */ if (current_thread) - do_child_store_inferior_registers (r); + do_win32_store_inferior_registers (r); } static int psapi_loaded = 0; @@ -417,7 +423,7 @@ static BOOL WINAPI (*psapi_EnumProcessModules) (HANDLE, HMODULE *, DWORD, LPDWOR static BOOL WINAPI (*psapi_GetModuleInformation) (HANDLE, HMODULE, LPMODULEINFO, DWORD) = NULL; static DWORD WINAPI (*psapi_GetModuleFileNameExA) (HANDLE, HMODULE, LPSTR, DWORD) = NULL; -int +static int psapi_get_dll_name (DWORD BaseAddress, char *dll_name_ret) { DWORD len; @@ -510,27 +516,21 @@ struct safe_symbol_file_add_args }; /* Maintain a linked list of "so" information. */ -struct so_stuff +struct lm_info { - struct so_stuff *next; DWORD load_addr; - DWORD end_addr; - int loaded; - struct objfile *objfile; - char name[1]; -} solib_start, *solib_end; +}; + +static struct so_list solib_start, *solib_end; /* Call symbol_file_add with stderr redirected. We don't care if there are errors. */ static int safe_symbol_file_add_stub (void *argv) { -#define p ((struct safe_symbol_file_add_args *)argv) - struct so_stuff *so = &solib_start; +#define p ((struct safe_symbol_file_add_args *) argv) + struct so_list *so = &solib_start; - while ((so = so->next)) - if (so->loaded && strcasecmp (so->name, p->name) == 0) - return 0; p->ret = symbol_file_add (p->name, p->from_tty, p->addrs, p->mainline, p->flags); return !!p->ret; #undef p @@ -578,14 +578,121 @@ safe_symbol_file_add (char *name, int from_tty, return p.ret; } -/* Remember the maximum DLL length for printing in info dll command. */ -int max_dll_name_len; +/* Get the loaded address of all sections, given that .text was loaded + at text_load. Assumes that all sections are subject to the same + relocation offset. Returns NULL if problems occur or if the + sections were not relocated. */ + +static struct section_addr_info * +get_relocated_section_addrs (bfd *abfd, CORE_ADDR text_load) +{ + struct section_addr_info *result = NULL; + int section_count = bfd_count_sections (abfd); + asection *text_section = bfd_get_section_by_name (abfd, ".text"); + CORE_ADDR text_vma; + + if (!text_section) + { + /* Couldn't get the .text section. Weird. */ + } + + else if (text_load == (text_vma = bfd_get_section_vma (abfd, text_section))) + { + /* DLL wasn't relocated. */ + } + + else + { + /* Figure out all sections' loaded addresses. The offset here is + such that taking a bfd_get_section_vma() result and adding + offset will give the real load address of the section. */ + + CORE_ADDR offset = text_load - text_vma; + + struct section_table *table_start = NULL; + struct section_table *table_end = NULL; + struct section_table *iter = NULL; + + build_section_table (abfd, &table_start, &table_end); + + for (iter = table_start; iter < table_end; ++iter) + { + /* Relocated addresses. */ + iter->addr += offset; + iter->endaddr += offset; + } + + result = build_section_addr_info_from_section_table (table_start, + table_end); + + xfree (table_start); + } + + return result; +} +/* Add DLL symbol information. */ static void -register_loaded_dll (const char *name, DWORD load_addr) +solib_symbols_add (struct so_list *so, CORE_ADDR load_addr) +{ + struct section_addr_info *addrs = NULL; + static struct objfile *result = NULL; + char *name = so->so_name; + bfd *abfd = NULL; + + /* The symbols in a dll are offset by 0x1000, which is the + the offset from 0 of the first byte in an image - because + of the file header and the section alignment. */ + + if (!name || !name[0]) + return; + + abfd = bfd_openr (name, "pei-i386"); + + if (!abfd) + { + /* pei failed - try pe */ + abfd = bfd_openr (name, "pe-i386"); + } + + if (abfd) + { + if (bfd_check_format (abfd, bfd_object)) + addrs = get_relocated_section_addrs (abfd, load_addr); + + bfd_close (abfd); + } + + if (addrs) + { + result = safe_symbol_file_add (name, 0, addrs, 0, OBJF_SHARED); + free_section_addr_info (addrs); + } + else + { + /* Fallback on handling just the .text section. */ + struct cleanup *my_cleanups; + + addrs = alloc_section_addr_info (1); + my_cleanups = make_cleanup (xfree, addrs); + addrs->other[0].name = ".text"; + addrs->other[0].addr = load_addr; + + result = safe_symbol_file_add (name, 0, addrs, 0, OBJF_SHARED); + do_cleanups (my_cleanups); + } + + so->symbols_loaded = !!result; + return; +} + +/* Remember the maximum DLL length for printing in info dll command. */ +static int max_dll_name_len; + +static char * +register_loaded_dll (const char *name, DWORD load_addr, int readsyms) { - struct so_stuff *so; - char ppath[MAX_PATH + 1]; + struct so_list *so; char buf[MAX_PATH + 1]; char cwd[MAX_PATH + 1]; char *p; @@ -611,28 +718,28 @@ register_loaded_dll (const char *name, DWORD load_addr) } } - cygwin_conv_to_posix_path (buf, ppath); - so = (struct so_stuff *) xmalloc (sizeof (struct so_stuff) + strlen (ppath) + 8 + 1); - so->loaded = 0; - so->load_addr = load_addr; - if (VirtualQueryEx (current_process_handle, (void *) load_addr, &m, - sizeof (m))) - so->end_addr = (DWORD) m.AllocationBase + m.RegionSize; - else - so->end_addr = load_addr + 0x2000; /* completely arbitrary */ - - so->next = NULL; - so->objfile = NULL; - strcpy (so->name, ppath); + if (strcasecmp (buf, "ntdll.dll") == 0) + { + GetSystemDirectory (buf, sizeof (buf)); + strcat (buf, "\\ntdll.dll"); + } + so = XZALLOC (struct so_list); + so->lm_info = (struct lm_info *) xmalloc (sizeof (struct lm_info)); + so->lm_info->load_addr = load_addr; + cygwin_conv_to_posix_path (buf, so->so_name); + strcpy (so->so_original_name, so->so_name); solib_end->next = so; solib_end = so; - len = strlen (ppath); + len = strlen (so->so_name); if (len > max_dll_name_len) max_dll_name_len = len; + if (readsyms) + solib_symbols_add (so, (CORE_ADDR) load_addr); + return so->so_name; } -char * +static char * get_image_name (HANDLE h, void *address, int unicode) { static char buf[(2 * MAX_PATH) + 1]; @@ -695,175 +802,70 @@ handle_load_dll (void *dummy) if (!dll_name) return 1; - register_loaded_dll (dll_name, (DWORD) event->lpBaseOfDll + 0x1000); + register_loaded_dll (dll_name, (DWORD) event->lpBaseOfDll + 0x1000, auto_solib_add); + solib_add (NULL, 0, NULL, auto_solib_add); return 1; } +static void +win32_free_so (struct so_list *so) +{ + if (so->lm_info) + xfree (so->lm_info); +} + +static void +win32_relocate_section_addresses (struct so_list *so, + struct section_table *sec) +{ + /* FIXME */ + return; +} + +static void +win32_solib_create_inferior_hook (void) +{ + solib_add (NULL, 0, NULL, auto_solib_add); + return; +} + static int handle_unload_dll (void *dummy) { DWORD lpBaseOfDll = (DWORD) current_event.u.UnloadDll.lpBaseOfDll + 0x1000; - struct so_stuff *so; + struct so_list *so; for (so = &solib_start; so->next != NULL; so = so->next) - if (so->next->load_addr == lpBaseOfDll) + if (so->next->lm_info->load_addr == lpBaseOfDll) { - struct so_stuff *sodel = so->next; + struct so_list *sodel = so->next; so->next = sodel->next; if (!so->next) solib_end = so; - if (sodel->objfile) - free_objfile (sodel->objfile); - xfree(sodel); + free_so (sodel); + solib_add (NULL, 0, NULL, auto_solib_add); return 1; } + error (_("Error: dll starting at 0x%lx not found."), (DWORD) lpBaseOfDll); return 0; } -char * -solib_address (CORE_ADDR address) -{ - struct so_stuff *so; - for (so = &solib_start; so->next != NULL; so = so->next) - if (address >= so->load_addr && address <= so->end_addr) - return so->name; - return NULL; -} - -/* Return name of last loaded DLL. */ -char * -child_solib_loaded_library_pathname (int pid) -{ - return !solib_end || !solib_end->name[0] ? NULL : solib_end->name; -} - /* Clear list of loaded DLLs. */ -void -child_clear_solibs (void) +static void +win32_clear_solib (void) { - struct so_stuff *so, *so1 = solib_start.next; - - while ((so = so1) != NULL) - { - so1 = so->next; - xfree (so); - } - solib_start.next = NULL; - solib_start.objfile = NULL; solib_end = &solib_start; max_dll_name_len = sizeof ("DLL Name") - 1; } -/* Get the loaded address of all sections, given that .text was loaded - at text_load. Assumes that all sections are subject to the same - relocation offset. Returns NULL if problems occur or if the - sections were not relocated. */ - -static struct section_addr_info * -get_relocated_section_addrs (bfd *abfd, CORE_ADDR text_load) -{ - struct section_addr_info *result = NULL; - int section_count = bfd_count_sections (abfd); - asection *text_section = bfd_get_section_by_name (abfd, ".text"); - CORE_ADDR text_vma; - - if (!text_section) - { - /* Couldn't get the .text section. Weird. */ - } - - else if (text_load == (text_vma = bfd_get_section_vma (abfd, text_section))) - { - /* DLL wasn't relocated. */ - } - - else - { - /* Figure out all sections' loaded addresses. The offset here is - such that taking a bfd_get_section_vma() result and adding - offset will give the real load address of the section. */ - - CORE_ADDR offset = text_load - text_vma; - - struct section_table *table_start = NULL; - struct section_table *table_end = NULL; - struct section_table *iter = NULL; - - build_section_table (abfd, &table_start, &table_end); - - for (iter = table_start; iter < table_end; ++iter) - { - /* Relocated addresses. */ - iter->addr += offset; - iter->endaddr += offset; - } - - result = build_section_addr_info_from_section_table (table_start, - table_end); - - xfree (table_start); - } - - return result; -} - -/* Add DLL symbol information. */ -static struct objfile * -solib_symbols_add (char *name, int from_tty, CORE_ADDR load_addr) +static void +win32_special_symbol_handling (void) { - struct section_addr_info *addrs = NULL; - static struct objfile *result = NULL; - bfd *abfd = NULL; - - /* The symbols in a dll are offset by 0x1000, which is the - the offset from 0 of the first byte in an image - because - of the file header and the section alignment. */ - - if (!name || !name[0]) - return NULL; - - abfd = bfd_openr (name, "pei-i386"); - - if (!abfd) - { - /* pei failed - try pe */ - abfd = bfd_openr (name, "pe-i386"); - } - - if (abfd) - { - if (bfd_check_format (abfd, bfd_object)) - { - addrs = get_relocated_section_addrs (abfd, load_addr); - } - - bfd_close (abfd); - } - - if (addrs) - { - result = safe_symbol_file_add (name, from_tty, addrs, 0, OBJF_SHARED); - free_section_addr_info (addrs); - } - else - { - /* Fallback on handling just the .text section. */ - struct cleanup *my_cleanups; - - addrs = alloc_section_addr_info (1); - my_cleanups = make_cleanup (xfree, addrs); - addrs->other[0].name = ".text"; - addrs->other[0].addr = load_addr; - - result = safe_symbol_file_add (name, from_tty, addrs, 0, OBJF_SHARED); - do_cleanups (my_cleanups); - } - - return result; + return; } /* Load DLL symbol info. */ @@ -888,22 +890,6 @@ dll_symbol_command (char *args, int from_tty) safe_symbol_file_add (args, from_tty, NULL, 0, OBJF_SHARED | OBJF_USERLOADED); } -/* List currently loaded DLLs. */ -void -info_dll_command (char *ignore, int from_tty) -{ - struct so_stuff *so = &solib_start; - - if (!so->next) - return; - - printf_filtered ("%*s Load Address\n", -max_dll_name_len, "DLL Name"); - while ((so = so->next) != NULL) - printf_filtered ("%*s %08lx\n", -max_dll_name_len, so->name, so->load_addr); - - return; -} - /* Handle DEBUG_STRING output from child process. Cygwin prepends its messages with a "cygwin:". Interpret this as a Cygwin signal. Otherwise just print the string as a warning. */ @@ -918,7 +904,7 @@ handle_output_debug_string (struct target_waitstatus *ourstatus) || !s || !*s) return gotasig; - if (strncmp (s, CYGWIN_SIGNAL_STRING, sizeof (CYGWIN_SIGNAL_STRING) - 1) != 0) + if (strncmp (s, _CYGWIN_SIGNAL_STRING, sizeof (_CYGWIN_SIGNAL_STRING) - 1) != 0) { if (strncmp (s, "cYg", 3) != 0) warning (("%s"), s); @@ -926,7 +912,7 @@ handle_output_debug_string (struct target_waitstatus *ourstatus) else { char *p; - int sig = strtol (s + sizeof (CYGWIN_SIGNAL_STRING) - 1, &p, 0); + int sig = strtol (s + sizeof (_CYGWIN_SIGNAL_STRING) - 1, &p, 0); gotasig = target_signal_from_host (sig); ourstatus->value.sig = gotasig; if (gotasig) @@ -1175,7 +1161,7 @@ handle_exception (struct target_waitstatus *ourstatus) /* Resume all artificially suspended threads if we are continuing execution */ static BOOL -child_continue (DWORD continue_status, int id) +win32_continue (DWORD continue_status, int id) { int i; thread_info *th; @@ -1219,13 +1205,13 @@ child_continue (DWORD continue_status, int id) /* Called in pathological case where Windows fails to send a CREATE_PROCESS_DEBUG_EVENT after an attach. */ -DWORD +static DWORD fake_create_process (void) { current_process_handle = OpenProcess (PROCESS_ALL_ACCESS, FALSE, current_event.dwProcessId); main_thread_id = current_event.dwThreadId; - current_thread = child_add_thread (main_thread_id, + current_thread = win32_add_thread (main_thread_id, current_event.u.CreateThread.hThread); return main_thread_id; } @@ -1234,7 +1220,7 @@ fake_create_process (void) handling by WFI (or whatever). */ static int -get_child_debug_event (int pid, struct target_waitstatus *ourstatus) +get_win32_debug_event (int pid, struct target_waitstatus *ourstatus) { BOOL debug_event; DWORD continue_status, event_code; @@ -1274,7 +1260,7 @@ get_child_debug_event (int pid, struct target_waitstatus *ourstatus) break; } /* Record the existence of this thread */ - th = child_add_thread (current_event.dwThreadId, + th = win32_add_thread (current_event.dwThreadId, current_event.u.CreateThread.hThread); if (info_verbose) printf_unfiltered ("[New %s]\n", @@ -1290,7 +1276,7 @@ get_child_debug_event (int pid, struct target_waitstatus *ourstatus) "EXIT_THREAD_DEBUG_EVENT")); if (current_event.dwThreadId != main_thread_id) { - child_delete_thread (current_event.dwThreadId); + win32_delete_thread (current_event.dwThreadId); th = &dummy_thread_info; } break; @@ -1309,10 +1295,10 @@ get_child_debug_event (int pid, struct target_waitstatus *ourstatus) current_process_handle = current_event.u.CreateProcessInfo.hProcess; if (main_thread_id) - child_delete_thread (main_thread_id); + win32_delete_thread (main_thread_id); main_thread_id = current_event.dwThreadId; /* Add the main thread */ - th = child_add_thread (main_thread_id, + th = win32_add_thread (main_thread_id, current_event.u.CreateProcessInfo.hThread); retval = ourstatus->value.related_pid = current_event.dwThreadId; break; @@ -1395,7 +1381,7 @@ get_child_debug_event (int pid, struct target_waitstatus *ourstatus) } if (!retval || saw_create != 1) - CHECK (child_continue (continue_status, -1)); + CHECK (win32_continue (continue_status, -1)); else { inferior_ptid = pid_to_ptid (retval); @@ -1408,7 +1394,7 @@ out: /* Wait for interesting events to occur in the target process. */ static ptid_t -child_wait (ptid_t ptid, struct target_waitstatus *ourstatus) +win32_wait (ptid_t ptid, struct target_waitstatus *ourstatus) { int pid = PIDGET (ptid); @@ -1420,7 +1406,7 @@ child_wait (ptid_t ptid, struct target_waitstatus *ourstatus) while (1) { - int retval = get_child_debug_event (pid, ourstatus); + int retval = get_win32_debug_event (pid, ourstatus); if (retval) return pid_to_ptid (retval); else @@ -1431,13 +1417,13 @@ child_wait (ptid_t ptid, struct target_waitstatus *ourstatus) detach = deprecated_ui_loop_hook (0); if (detach) - child_kill_inferior (); + win32_kill_inferior (); } } } static void -do_initial_child_stuff (DWORD pid) +do_initial_win32_stuff (DWORD pid) { extern int stop_after_trap; int i; @@ -1451,9 +1437,9 @@ do_initial_child_stuff (DWORD pid) dr[i] = 0; current_event.dwProcessId = pid; memset (¤t_event, 0, sizeof (current_event)); - push_target (&deprecated_child_ops); + push_target (&win32_ops); disable_breakpoints_in_shlibs (1); - child_clear_solibs (); + win32_clear_solib (); clear_proceed_status (); init_wait_for_inferior (); @@ -1563,7 +1549,7 @@ set_process_privilege (const char *privilege, BOOL enable) #if 0 /* Disabled, otherwise every `attach' in an unprivileged user session would raise the "Failed to get SE_DEBUG_NAME privilege" warning in - child_attach(). */ + win32_attach(). */ /* AdjustTokenPrivileges returns TRUE even if the privilege could not be enabled. GetLastError () returns an correct error code, though. */ if (enable && GetLastError () == ERROR_NOT_ALL_ASSIGNED) @@ -1581,7 +1567,7 @@ out: /* Attach to process PID, then initialize for debugging it. */ static void -child_attach (char *args, int from_tty) +win32_attach (char *args, int from_tty) { BOOL ok; DWORD pid; @@ -1597,7 +1583,7 @@ child_attach (char *args, int from_tty) pid = strtoul (args, 0, 0); /* Windows pid */ - child_init_thread_list (); + win32_init_thread_list (); ok = DebugActiveProcess (pid); saw_create = 0; @@ -1632,19 +1618,19 @@ child_attach (char *args, int from_tty) gdb_flush (gdb_stdout); } - do_initial_child_stuff (pid); + do_initial_win32_stuff (pid); target_terminal_ours (); } static void -child_detach (char *args, int from_tty) +win32_detach (char *args, int from_tty) { int detached = 1; if (has_detach_ability ()) { delete_command (NULL, 0); - child_continue (DBG_CONTINUE, -1); + win32_continue (DBG_CONTINUE, -1); if (!DebugActiveProcessStop (current_event.dwProcessId)) { error (_("Can't detach process %lu (error %lu)"), @@ -1663,11 +1649,11 @@ child_detach (char *args, int from_tty) gdb_flush (gdb_stdout); } inferior_ptid = null_ptid; - unpush_target (&deprecated_child_ops); + unpush_target (&win32_ops); } -char * -child_pid_to_exec_file (int pid) +static char * +win32_pid_to_exec_file (int pid) { /* Try to find the process path using the Cygwin internal process list pid isn't a valid pid, unfortunately. Use current_event.dwProcessId @@ -1682,31 +1668,31 @@ child_pid_to_exec_file (int pid) cygwin_internal (CW_LOCK_PINFO, 1000); for (cpid = 0; (pinfo = (struct external_pinfo *) - cygwin_internal (CW_GETPINFO, cpid | CW_NEXTPID)); + cygwin_internal (CW_GETPINFO, cpid | CW_NEXTPID)); cpid = pinfo->pid) { if (pinfo->dwProcessId == current_event.dwProcessId) /* Got it */ { - cygwin_conv_to_full_posix_path (pinfo->progname, path); - path_ptr = path; - break; + cygwin_conv_to_full_posix_path (pinfo->progname, path); + path_ptr = path; + break; } } cygwin_internal (CW_UNLOCK_PINFO); - return path_ptr; + return path_ptr; } /* Print status information about what we're accessing. */ static void -child_files_info (struct target_ops *ignore) +win32_files_info (struct target_ops *ignore) { printf_unfiltered ("\tUsing the running image of %s %s.\n", attach_flag ? "attached" : "child", target_pid_to_str (inferior_ptid)); } static void -child_open (char *arg, int from_tty) +win32_open (char *arg, int from_tty) { error (_("Use the \"run\" command to start a Unix child process.")); } @@ -1717,7 +1703,7 @@ child_open (char *arg, int from_tty) ENV is the environment vector to pass. Errors reported with error(). */ static void -child_create_inferior (char *exec_file, char *allargs, char **env, +win32_create_inferior (char *exec_file, char *allargs, char **env, int from_tty) { char *winenv; @@ -1871,7 +1857,7 @@ child_create_inferior (char *exec_file, char *allargs, char **env, } } - child_init_thread_list (); + win32_init_thread_list (); ret = CreateProcess (0, args, /* command line */ NULL, /* Security */ @@ -1905,18 +1891,18 @@ child_create_inferior (char *exec_file, char *allargs, char **env, else saw_create = 0; - do_initial_child_stuff (pi.dwProcessId); + do_initial_win32_stuff (pi.dwProcessId); - /* child_continue (DBG_CONTINUE, -1); */ + /* win32_continue (DBG_CONTINUE, -1); */ proceed ((CORE_ADDR) - 1, TARGET_SIGNAL_0, 0); } static void -child_mourn_inferior (void) +win32_mourn_inferior (void) { - (void) child_continue (DBG_CONTINUE, -1); + (void) win32_continue (DBG_CONTINUE, -1); i386_cleanup_dregs(); - unpush_target (&deprecated_child_ops); + unpush_target (&win32_ops); generic_mourn_inferior (); } @@ -1924,15 +1910,15 @@ child_mourn_inferior (void) ^C on the controlling terminal. */ static void -child_stop (void) +win32_stop (void) { DEBUG_EVENTS (("gdb: GenerateConsoleCtrlEvent (CTRLC_EVENT, 0)\n")); CHECK (GenerateConsoleCtrlEvent (CTRL_C_EVENT, current_event.dwProcessId)); registers_changed (); /* refresh register state */ } -int -child_xfer_memory (CORE_ADDR memaddr, gdb_byte *our, int len, +static int +win32_xfer_memory (CORE_ADDR memaddr, gdb_byte *our, int len, int write, struct mem_attrib *mem, struct target_ops *target) { @@ -1957,14 +1943,14 @@ child_xfer_memory (CORE_ADDR memaddr, gdb_byte *our, int len, return done; } -void -child_kill_inferior (void) +static void +win32_kill_inferior (void) { CHECK (TerminateProcess (current_process_handle, 0)); for (;;) { - if (!child_continue (DBG_CONTINUE, -1)) + if (!win32_continue (DBG_CONTINUE, -1)) break; if (!WaitForDebugEvent (¤t_event, INFINITE)) break; @@ -1977,11 +1963,11 @@ child_kill_inferior (void) /* this may fail in an attached process so don't check. */ if (current_thread && current_thread->h) (void) CloseHandle (current_thread->h); - target_mourn_inferior (); /* or just child_mourn_inferior? */ + target_mourn_inferior (); /* or just win32_mourn_inferior? */ } -void -child_resume (ptid_t ptid, int step, enum target_signal sig) +static void +win32_resume (ptid_t ptid, int step, enum target_signal sig) { thread_info *th; DWORD continue_status = DBG_CONTINUE; @@ -2024,7 +2010,7 @@ child_resume (ptid_t ptid, int step, enum target_signal sig) last_sig = TARGET_SIGNAL_0; - DEBUG_EXEC (("gdb: child_resume (pid=%d, step=%d, sig=%d);\n", + DEBUG_EXEC (("gdb: win32_resume (pid=%d, step=%d, sig=%d);\n", pid, step, sig)); /* Get context for currently selected thread */ @@ -2034,7 +2020,7 @@ child_resume (ptid_t ptid, int step, enum target_signal sig) if (step) { /* Single step by setting t bit */ - child_fetch_inferior_registers (PS_REGNUM); + win32_fetch_inferior_registers (PS_REGNUM); th->context.EFlags |= FLAG_TRACE_BIT; } @@ -2058,197 +2044,30 @@ child_resume (ptid_t ptid, int step, enum target_signal sig) /* Allow continuing with the same signal that interrupted us. Otherwise complain. */ - child_continue (continue_status, pid); + win32_continue (continue_status, pid); } static void -child_prepare_to_store (void) +win32_prepare_to_store (void) { /* Do nothing, since we can store individual regs */ } static int -child_can_run (void) +win32_can_run (void) { return 1; } static void -child_close (int x) +win32_close (int x) { - DEBUG_EVENTS (("gdb: child_close, inferior_ptid=%d\n", + DEBUG_EVENTS (("gdb: win32_close, inferior_ptid=%d\n", PIDGET (inferior_ptid))); } -static void -init_child_ops (void) -{ - deprecated_child_ops.to_shortname = "child"; - deprecated_child_ops.to_longname = "Win32 child process"; - deprecated_child_ops.to_doc = "Win32 child process (started by the \"run\" command)."; - deprecated_child_ops.to_open = child_open; - deprecated_child_ops.to_close = child_close; - deprecated_child_ops.to_attach = child_attach; - deprecated_child_ops.to_detach = child_detach; - deprecated_child_ops.to_resume = child_resume; - deprecated_child_ops.to_wait = child_wait; - deprecated_child_ops.to_fetch_registers = child_fetch_inferior_registers; - deprecated_child_ops.to_store_registers = child_store_inferior_registers; - deprecated_child_ops.to_prepare_to_store = child_prepare_to_store; - deprecated_child_ops.deprecated_xfer_memory = child_xfer_memory; - deprecated_child_ops.to_files_info = child_files_info; - deprecated_child_ops.to_insert_breakpoint = memory_insert_breakpoint; - deprecated_child_ops.to_remove_breakpoint = memory_remove_breakpoint; - deprecated_child_ops.to_terminal_init = terminal_init_inferior; - deprecated_child_ops.to_terminal_inferior = terminal_inferior; - deprecated_child_ops.to_terminal_ours_for_output = terminal_ours_for_output; - deprecated_child_ops.to_terminal_ours = terminal_ours; - deprecated_child_ops.to_terminal_save_ours = terminal_save_ours; - deprecated_child_ops.to_terminal_info = child_terminal_info; - deprecated_child_ops.to_kill = child_kill_inferior; - deprecated_child_ops.to_create_inferior = child_create_inferior; - deprecated_child_ops.to_mourn_inferior = child_mourn_inferior; - deprecated_child_ops.to_can_run = child_can_run; - deprecated_child_ops.to_thread_alive = win32_child_thread_alive; - deprecated_child_ops.to_pid_to_str = cygwin_pid_to_str; - deprecated_child_ops.to_stop = child_stop; - deprecated_child_ops.to_stratum = process_stratum; - deprecated_child_ops.to_has_all_memory = 1; - deprecated_child_ops.to_has_memory = 1; - deprecated_child_ops.to_has_stack = 1; - deprecated_child_ops.to_has_registers = 1; - deprecated_child_ops.to_has_execution = 1; - deprecated_child_ops.to_magic = OPS_MAGIC; - deprecated_child_ops.to_pid_to_exec_file = child_pid_to_exec_file; -} - -void -_initialize_win32_nat (void) -{ - struct cmd_list_element *c; - - init_child_ops (); - - c = add_com ("dll-symbols", class_files, dll_symbol_command, - _("Load dll library symbols from FILE.")); - set_cmd_completer (c, filename_completer); - - add_com_alias ("sharedlibrary", "dll-symbols", class_alias, 1); - - add_setshow_boolean_cmd ("shell", class_support, &useshell, _("\ -Set use of shell to start subprocess."), _("\ -Show use of shell to start subprocess."), NULL, - NULL, - NULL, /* FIXME: i18n: */ - &setlist, &showlist); - - add_setshow_boolean_cmd ("new-console", class_support, &new_console, _("\ -Set creation of new console when creating child process."), _("\ -Show creation of new console when creating child process."), NULL, - NULL, - NULL, /* FIXME: i18n: */ - &setlist, &showlist); - - add_setshow_boolean_cmd ("new-group", class_support, &new_group, _("\ -Set creation of new group when creating child process."), _("\ -Show creation of new group when creating child process."), NULL, - NULL, - NULL, /* FIXME: i18n: */ - &setlist, &showlist); - - add_setshow_boolean_cmd ("debugexec", class_support, &debug_exec, _("\ -Set whether to display execution in child process."), _("\ -Show whether to display execution in child process."), NULL, - NULL, - NULL, /* FIXME: i18n: */ - &setlist, &showlist); - - add_setshow_boolean_cmd ("debugevents", class_support, &debug_events, _("\ -Set whether to display kernel events in child process."), _("\ -Show whether to display kernel events in child process."), NULL, - NULL, - NULL, /* FIXME: i18n: */ - &setlist, &showlist); - - add_setshow_boolean_cmd ("debugmemory", class_support, &debug_memory, _("\ -Set whether to display memory accesses in child process."), _("\ -Show whether to display memory accesses in child process."), NULL, - NULL, - NULL, /* FIXME: i18n: */ - &setlist, &showlist); - - add_setshow_boolean_cmd ("debugexceptions", class_support, - &debug_exceptions, _("\ -Set whether to display kernel exceptions in child process."), _("\ -Show whether to display kernel exceptions in child process."), NULL, - NULL, - NULL, /* FIXME: i18n: */ - &setlist, &showlist); - - add_info ("dll", info_dll_command, _("Status of loaded DLLs.")); - add_info_alias ("sharedlibrary", "dll", 1); - - add_prefix_cmd ("w32", class_info, info_w32_command, - _("Print information specific to Win32 debugging."), - &info_w32_cmdlist, "info w32 ", 0, &infolist); - - add_cmd ("selector", class_info, display_selectors, - _("Display selectors infos."), - &info_w32_cmdlist); - - add_target (&deprecated_child_ops); -} - -/* Hardware watchpoint support, adapted from go32-nat.c code. */ - -/* Pass the address ADDR to the inferior in the I'th debug register. - Here we just store the address in dr array, the registers will be - actually set up when child_continue is called. */ -void -cygwin_set_dr (int i, CORE_ADDR addr) -{ - if (i < 0 || i > 3) - internal_error (__FILE__, __LINE__, - _("Invalid register %d in cygwin_set_dr.\n"), i); - dr[i] = (unsigned) addr; - debug_registers_changed = 1; - debug_registers_used = 1; -} - -/* Pass the value VAL to the inferior in the DR7 debug control - register. Here we just store the address in D_REGS, the watchpoint - will be actually set up in child_wait. */ -void -cygwin_set_dr7 (unsigned val) -{ - dr[7] = val; - debug_registers_changed = 1; - debug_registers_used = 1; -} - -/* Get the value of the DR6 debug status register from the inferior. - Here we just return the value stored in dr[6] - by the last call to thread_rec for current_event.dwThreadId id. */ -unsigned -cygwin_get_dr6 (void) -{ - return dr[6]; -} - -/* Determine if the thread referenced by "pid" is alive - by "polling" it. If WaitForSingleObject returns WAIT_OBJECT_0 - it means that the pid has died. Otherwise it is assumed to be alive. */ -static int -win32_child_thread_alive (ptid_t ptid) -{ - int pid = PIDGET (ptid); - - return WaitForSingleObject (thread_rec (pid, FALSE)->h, 0) == WAIT_OBJECT_0 ? - FALSE : TRUE; -} - /* Convert pid to printable format. */ -char * +static char * cygwin_pid_to_str (ptid_t ptid) { static char buf[80]; @@ -2261,38 +2080,6 @@ cygwin_pid_to_str (ptid_t ptid) return buf; } -static int -core_dll_symbols_add (char *dll_name, DWORD base_addr) -{ - struct objfile *objfile; - char *objfile_basename; - const char *dll_basename; - - if (!(dll_basename = strrchr (dll_name, '/'))) - dll_basename = dll_name; - else - dll_basename++; - - ALL_OBJFILES (objfile) - { - objfile_basename = strrchr (objfile->name, '/'); - - if (objfile_basename && - strcmp (dll_basename, objfile_basename + 1) == 0) - { - printf_unfiltered ("%08lx:%s (symbols previously loaded)\n", - base_addr, dll_name); - goto out; - } - } - - register_loaded_dll (dll_name, base_addr + 0x1000); - solib_symbols_add (dll_name, 0, (CORE_ADDR) base_addr + 0x1000); - - out: - return 1; -} - typedef struct { struct target_ops *target; @@ -2300,7 +2087,7 @@ typedef struct } map_code_section_args; static void -map_single_dll_code_section (bfd * abfd, asection * sect, void *obj) +map_single_dll_code_section (bfd *abfd, asection *sect, void *obj) { int old; int update_coreops; @@ -2372,19 +2159,22 @@ dll_code_sections_add (const char *dll_name, int base_addr, struct target_ops *t } static void -core_section_load_dll_symbols (bfd * abfd, asection * sect, void *obj) +core_section_load_dll_symbols (bfd *abfd, asection *sect, void *obj) { struct target_ops *target = (struct target_ops *) obj; DWORD base_addr; int dll_name_size; - char *dll_name = NULL; - char *buf = NULL; struct win32_pstatus *pstatus; + struct so_list *so; + char *dll_name; + char *buf = NULL; char *p; + struct objfile *objfile; + const char *dll_basename; - if (strncmp (sect->name, ".module", 7)) + if (strncmp (sect->name, ".module", 7) != 0) return; buf = (char *) xmalloc (bfd_get_section_size (sect) + 1); @@ -2403,48 +2193,63 @@ core_section_load_dll_symbols (bfd * abfd, asection * sect, void *obj) if (offsetof (struct win32_pstatus, data.module_info.module_name) + dll_name_size > bfd_get_section_size (sect)) goto out; - dll_name = (char *) xmalloc (dll_name_size + 1); - if (!dll_name) - { - printf_unfiltered ("memory allocation failed for %s\n", sect->name); - goto out; - } - strncpy (dll_name, pstatus->data.module_info.module_name, dll_name_size); + dll_name = pstatus->data.module_info.module_name; - while ((p = strchr (dll_name, '\\'))) - *p = '/'; + if (!(dll_basename = strrchr (dll_name, '/'))) + dll_basename = dll_name; + else + dll_basename++; - if (!core_dll_symbols_add (dll_name, (DWORD) base_addr)) - printf_unfiltered ("%s: Failed to load dll symbols.\n", dll_name); + ALL_OBJFILES (objfile) + { + char *objfile_basename = strrchr (objfile->name, '/'); - if (!dll_code_sections_add (dll_name, (DWORD) base_addr + 0x1000, target)) + if (objfile_basename && + strcasecmp (dll_basename, objfile_basename + 1) == 0) + goto out; + } + + base_addr += 0x1000; + dll_name = register_loaded_dll (dll_name, base_addr, 1); + + if (!dll_code_sections_add (dll_name, (DWORD) base_addr, target)) printf_unfiltered ("%s: Failed to map dll code sections.\n", dll_name); out: if (buf) xfree (buf); - if (dll_name) - xfree (dll_name); return; } -void -child_solib_add (char *filename, int from_tty, struct target_ops *target, - int readsyms) +static struct so_list * +win32_current_sos (void) { - if (!readsyms) - return; - if (core_bfd) + struct so_list *sop; + struct so_list *start = NULL; + struct so_list *last; + + if (!solib_start.next && core_bfd) { - child_clear_solibs (); - bfd_map_over_sections (core_bfd, &core_section_load_dll_symbols, target); + win32_clear_solib (); + bfd_map_over_sections (core_bfd, &core_section_load_dll_symbols, + &win32_ops); } - else + + for (sop = solib_start.next; sop; sop = sop->next) { - if (solib_end && solib_end->name) - solib_end->objfile = solib_symbols_add (solib_end->name, from_tty, - solib_end->load_addr); + struct so_list *new = XZALLOC (struct so_list); + strcpy (new->so_name, sop->so_name); + strcpy (new->so_original_name, sop->so_original_name); + if (!start) + last = start = new; + else + { + last->next = new; + last = new; + } } + + return start; } static void @@ -2463,6 +2268,188 @@ fetch_elf_core_registers (char *core_reg_sect, regcache_raw_supply (current_regcache, r, core_reg_sect + mappings[r]); } +static void +init_win32_ops (void) +{ + win32_ops.to_shortname = "child"; + win32_ops.to_longname = "Win32 child process"; + win32_ops.to_doc = "Win32 child process (started by the \"run\" command)."; + win32_ops.to_open = win32_open; + win32_ops.to_close = win32_close; + win32_ops.to_attach = win32_attach; + win32_ops.to_detach = win32_detach; + win32_ops.to_resume = win32_resume; + win32_ops.to_wait = win32_wait; + win32_ops.to_fetch_registers = win32_fetch_inferior_registers; + win32_ops.to_store_registers = win32_store_inferior_registers; + win32_ops.to_prepare_to_store = win32_prepare_to_store; + win32_ops.deprecated_xfer_memory = win32_xfer_memory; + win32_ops.to_files_info = win32_files_info; + win32_ops.to_insert_breakpoint = memory_insert_breakpoint; + win32_ops.to_remove_breakpoint = memory_remove_breakpoint; + win32_ops.to_terminal_init = terminal_init_inferior; + win32_ops.to_terminal_inferior = terminal_inferior; + win32_ops.to_terminal_ours_for_output = terminal_ours_for_output; + win32_ops.to_terminal_ours = terminal_ours; + win32_ops.to_terminal_save_ours = terminal_save_ours; + win32_ops.to_terminal_info = child_terminal_info; + win32_ops.to_kill = win32_kill_inferior; + win32_ops.to_create_inferior = win32_create_inferior; + win32_ops.to_mourn_inferior = win32_mourn_inferior; + win32_ops.to_can_run = win32_can_run; + win32_ops.to_thread_alive = win32_win32_thread_alive; + win32_ops.to_pid_to_str = cygwin_pid_to_str; + win32_ops.to_stop = win32_stop; + win32_ops.to_stratum = process_stratum; + win32_ops.to_has_all_memory = 1; + win32_ops.to_has_memory = 1; + win32_ops.to_has_stack = 1; + win32_ops.to_has_registers = 1; + win32_ops.to_has_execution = 1; + win32_ops.to_magic = OPS_MAGIC; + win32_ops.to_pid_to_exec_file = win32_pid_to_exec_file; + + win32_so_ops.relocate_section_addresses = win32_relocate_section_addresses; + win32_so_ops.free_so = win32_free_so; + win32_so_ops.clear_solib = win32_clear_solib; + win32_so_ops.solib_create_inferior_hook = win32_solib_create_inferior_hook; + win32_so_ops.special_symbol_handling = win32_special_symbol_handling; + win32_so_ops.current_sos = win32_current_sos; + win32_so_ops.open_symbol_file_object = NULL; + win32_so_ops.in_dynsym_resolve_code = NULL; + + /* FIXME: Don't do this here. *_gdbarch_init() should set so_ops. */ + current_target_so_ops = &win32_so_ops; +} + +static void +set_win32_aliases (char *argv0) +{ + add_info_alias ("dll", "sharedlibrary", 1); +} + +void +_initialize_win32_nat (void) +{ + struct cmd_list_element *c; + + init_win32_ops (); + + c = add_com ("dll-symbols", class_files, dll_symbol_command, + _("Load dll library symbols from FILE.")); + set_cmd_completer (c, filename_completer); + + add_com_alias ("sharedlibrary", "dll-symbols", class_alias, 1); + + add_setshow_boolean_cmd ("shell", class_support, &useshell, _("\ +Set use of shell to start subprocess."), _("\ +Show use of shell to start subprocess."), NULL, + NULL, + NULL, /* FIXME: i18n: */ + &setlist, &showlist); + + add_setshow_boolean_cmd ("new-console", class_support, &new_console, _("\ +Set creation of new console when creating child process."), _("\ +Show creation of new console when creating child process."), NULL, + NULL, + NULL, /* FIXME: i18n: */ + &setlist, &showlist); + + add_setshow_boolean_cmd ("new-group", class_support, &new_group, _("\ +Set creation of new group when creating child process."), _("\ +Show creation of new group when creating child process."), NULL, + NULL, + NULL, /* FIXME: i18n: */ + &setlist, &showlist); + + add_setshow_boolean_cmd ("debugexec", class_support, &debug_exec, _("\ +Set whether to display execution in child process."), _("\ +Show whether to display execution in child process."), NULL, + NULL, + NULL, /* FIXME: i18n: */ + &setlist, &showlist); + + add_setshow_boolean_cmd ("debugevents", class_support, &debug_events, _("\ +Set whether to display kernel events in child process."), _("\ +Show whether to display kernel events in child process."), NULL, + NULL, + NULL, /* FIXME: i18n: */ + &setlist, &showlist); + + add_setshow_boolean_cmd ("debugmemory", class_support, &debug_memory, _("\ +Set whether to display memory accesses in child process."), _("\ +Show whether to display memory accesses in child process."), NULL, + NULL, + NULL, /* FIXME: i18n: */ + &setlist, &showlist); + + add_setshow_boolean_cmd ("debugexceptions", class_support, + &debug_exceptions, _("\ +Set whether to display kernel exceptions in child process."), _("\ +Show whether to display kernel exceptions in child process."), NULL, + NULL, + NULL, /* FIXME: i18n: */ + &setlist, &showlist); + + add_prefix_cmd ("w32", class_info, info_w32_command, + _("Print information specific to Win32 debugging."), + &info_w32_cmdlist, "info w32 ", 0, &infolist); + + add_cmd ("selector", class_info, display_selectors, + _("Display selectors infos."), + &info_w32_cmdlist); + add_target (&win32_ops); + deprecated_init_ui_hook = set_win32_aliases; +} + +/* Hardware watchpoint support, adapted from go32-nat.c code. */ + +/* Pass the address ADDR to the inferior in the I'th debug register. + Here we just store the address in dr array, the registers will be + actually set up when win32_continue is called. */ +void +cygwin_set_dr (int i, CORE_ADDR addr) +{ + if (i < 0 || i > 3) + internal_error (__FILE__, __LINE__, + _("Invalid register %d in cygwin_set_dr.\n"), i); + dr[i] = (unsigned) addr; + debug_registers_changed = 1; + debug_registers_used = 1; +} + +/* Pass the value VAL to the inferior in the DR7 debug control + register. Here we just store the address in D_REGS, the watchpoint + will be actually set up in win32_wait. */ +void +cygwin_set_dr7 (unsigned val) +{ + dr[7] = val; + debug_registers_changed = 1; + debug_registers_used = 1; +} + +/* Get the value of the DR6 debug status register from the inferior. + Here we just return the value stored in dr[6] + by the last call to thread_rec for current_event.dwThreadId id. */ +unsigned +cygwin_get_dr6 (void) +{ + return dr[6]; +} + +/* Determine if the thread referenced by "pid" is alive + by "polling" it. If WaitForSingleObject returns WAIT_OBJECT_0 + it means that the pid has died. Otherwise it is assumed to be alive. */ +static int +win32_win32_thread_alive (ptid_t ptid) +{ + int pid = PIDGET (ptid); + + return WaitForSingleObject (thread_rec (pid, FALSE)->h, 0) == WAIT_OBJECT_0 ? + FALSE : TRUE; +} + static struct core_fns win32_elf_core_fns = { bfd_target_elf_flavour, diff --git a/include/ChangeLog b/include/ChangeLog index 8f00e91ab37..e2c90f819a7 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,8 +1,24 @@ +2005-10-31 Mark Kettenis + + * floatformat.h (enum floatformat_byteorders): Add + floatformat_vax. + (floatformat_vax_aingle, floatformat_vax_double): Declare. + +2005-10-28 Dave Brolley + + Contribute the following changes: + 2003-09-29 Dave Brolley + + * dis-asm.h (disassemble_info): insn_sets now (void *) to allow for + more exotic underlying types to be used. + +2005-10-25 Arnold Metselaar + + disasm.h: Add declaration for print_insn_z80 + 2005-09-30 Catherine Moore * dis-asm.h (print_insn_bfin): Declare. - * elf/bfin.h: New file. - * elf/common.h (EM_BLACKFIN): Define. * opcode/bfin.h: New file. 2005-09-26 Mark Mitchell diff --git a/include/coff/ChangeLog b/include/coff/ChangeLog index ca201a12a63..a8b66cce2af 100644 --- a/include/coff/ChangeLog +++ b/include/coff/ChangeLog @@ -1,3 +1,8 @@ +2005-10-25 Arnold Metselaar + + * internal.h: Add relocation number for Z80 + * z80.h: New file. + 2005-08-18 Alan Modra * a29k.h: Delete. diff --git a/include/coff/internal.h b/include/coff/internal.h index 20e06c215ec..d7a83815aea 100644 --- a/include/coff/internal.h +++ b/include/coff/internal.h @@ -1,7 +1,7 @@ /* Internal format of COFF object file data structures, for GNU BFD. This file is part of BFD, the Binary File Descriptor library. - Copyright 1999, 2000, 2001, 2002, 2003, 2004 + Copyright 1999, 2000, 2001, 2002, 2003, 2004. 2005 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify @@ -715,6 +715,10 @@ struct internal_reloc #define R_IMM4H 0x24 /* high nibble */ #define R_DISP7 0x25 /* djnz displacement */ +/* Z80 modes */ +#define R_OFF8 0x32 /* 8 bit signed abs, for (i[xy]+d) */ +/* R_JR, R_IMM8, R_IMM16, R_IMM32 - as for Z8k */ + /* H8500 modes */ #define R_H8500_IMM8 1 /* 8 bit immediate */ diff --git a/include/coff/z80.h b/include/coff/z80.h new file mode 100644 index 00000000000..3c72c10dd9e --- /dev/null +++ b/include/coff/z80.h @@ -0,0 +1,51 @@ +/* coff information for Zilog Z80 + Copyright 2005 Free Software Foundation, Inc. + Contributed by Arnold Metselaar + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ + +#define L_LNNO_SIZE 4 +#include "coff/external.h" + +/* z80 backend does not use dots in section names. */ +#undef _TEXT +#define _TEXT "text" +#undef _DATA +#define _DATA "data" +#undef _BSS +#define _BSS "bss" + +/* Type of cpu is stored in flags. */ +#define F_MACHMASK 0xF000 + +#define Z80MAGIC 0x805A + +#define Z80BADMAG(x) (((x).f_magic != Z80MAGIC)) + +/* Relocation directives. */ + +/* This format actually has more bits than we need. */ + +struct external_reloc +{ + char r_vaddr[4]; + char r_symndx[4]; + char r_offset[4]; + char r_type[2]; + char r_stuff[2]; +}; + +#define RELOC struct external_reloc +#define RELSZ 16 diff --git a/include/dis-asm.h b/include/dis-asm.h index dd4e86e913c..ca6da9c21ea 100644 --- a/include/dis-asm.h +++ b/include/dis-asm.h @@ -78,7 +78,7 @@ typedef struct disassemble_info { for processors with run-time-switchable instruction sets. The default, zero, means that there is no constraint. CGEN-based opcodes ports may use ISA_foo masks. */ - unsigned long insn_sets; + void *insn_sets; /* Some targets need information about the current section to accurately display insns. If this is NULL, the target disassembler function @@ -208,6 +208,7 @@ extern int print_insn_i370 (bfd_vma, disassemble_info *); extern int print_insn_m68hc11 (bfd_vma, disassemble_info *); extern int print_insn_m68hc12 (bfd_vma, disassemble_info *); extern int print_insn_m68k (bfd_vma, disassemble_info *); +extern int print_insn_z80 (bfd_vma, disassemble_info *); extern int print_insn_z8001 (bfd_vma, disassemble_info *); extern int print_insn_z8002 (bfd_vma, disassemble_info *); extern int print_insn_h8300 (bfd_vma, disassemble_info *); diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog index cf4b57805b0..485a78e32a8 100644 --- a/include/elf/ChangeLog +++ b/include/elf/ChangeLog @@ -1,3 +1,8 @@ +2005-09-30 Catherine Moore + + * bfin.h: New file. + * common.h (EM_BLACKFIN): Define. + 2005-10-08 Paul Brook * arm.h: Add prototypes for BFD object attribute routines. diff --git a/include/floatformat.h b/include/floatformat.h index a2448743050..f1bd7f601f5 100644 --- a/include/floatformat.h +++ b/include/floatformat.h @@ -29,25 +29,26 @@ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. (i.e. BITS_BIG_ENDIAN type numbering), and specify which bits each field contains with the *_start and *_len fields. */ -/* What is the order of the bytes. */ +/* What is the order of the bytes? */ enum floatformat_byteorders { - /* Standard little endian byte order. EX: 1.2345678e10 => 00 00 80 c5 e0 fe 06 42 */ - floatformat_little, /* Standard big endian byte order. EX: 1.2345678e10 => 42 06 fe e0 c5 80 00 00 */ - floatformat_big, /* Little endian byte order but big endian word order. EX: 1.2345678e10 => e0 fe 06 42 00 00 80 c5 */ + floatformat_littlebyte_bigword, - floatformat_littlebyte_bigword - + /* VAX byte order. Little endian byte order with 16-bit words. The + following example is an illustration of the byte order only; VAX + doesn't have a fully IEEE compliant floating-point format. + EX: 1.2345678e10 => 80 c5 00 00 06 42 e0 fe */ + floatformat_vax }; enum floatformat_intbit { floatformat_intbit_yes, floatformat_intbit_no }; @@ -97,6 +98,12 @@ extern const struct floatformat floatformat_ieee_double_little; extern const struct floatformat floatformat_ieee_double_littlebyte_bigword; +/* floatformats for VAX. */ + +extern const struct floatformat floatformat_vax_f; +extern const struct floatformat floatformat_vax_d; +extern const struct floatformat floatformat_vax_g; + /* floatformats for various extendeds. */ extern const struct floatformat floatformat_i387_ext; diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 08028706df8..a282a622261 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,43 @@ +2005-10-28 Dave Brolley + + Contribute the following changes: + 2005-02-16 Dave Brolley + + * cgen-bitset.h: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename + cgen_isa_mask_* to cgen_bitset_*. + * cgen.h: Likewise. + + 2003-10-21 Richard Sandiford + + * cgen.h (CGEN_BITSET_ATTR_VALUE): Fix definition. + (CGEN_ATTR_ENTRY): Change "value" to type "unsigned". + (CGEN_CPU_TABLE): Make isas a ponter. + + 2003-09-29 Dave Brolley + + * cgen.h (CGEN_ATTR_VALUE_BITSET_TYPE): New typedef. + (CGEN_ATTR_VALUE_ENUM_TYPE): Ditto. + (CGEN_ATTR_VALUE_TYPE): Use these new typedefs. + + 2002-12-13 Dave Brolley + + * cgen.h (symcat.h): #include it. + (cgen-bitset.h): #include it. + (CGEN_ATTR_VALUE_TYPE): Now a union. + (CGEN_ATTR_VALUE): Reference macros generated in opcodes/-desc.h. + (CGEN_ATTR_ENTRY): 'value' now unsigned. + (cgen_cpu_desc): 'isas' now (CGEN_ISA_MASK*). + * cgen-bitset.h: New file. + +2005-09-30 Catherine Moore + + * bfin.h: New file. + +2005-10-24 Jan Beulich + + * ia64.h (enum ia64_opnd): Move memory operand out of set of + indirect operands. + 2005-10-16 John David Anglin * hppa.h (pa_opcodes): Add two fcmp opcodes. Reorder ftest opcodes. diff --git a/include/opcode/cgen-bitset.h b/include/opcode/cgen-bitset.h new file mode 100644 index 00000000000..1b6fbe32cf9 --- /dev/null +++ b/include/opcode/cgen-bitset.h @@ -0,0 +1,55 @@ +/* Header file the type CGEN_BITSET. + +Copyright 2002, 2005 Free Software Foundation, Inc. + +This file is part of GDB, the GNU debugger, and the GNU Binutils. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License along +with this program; if not, write to the Free Software Foundation, Inc., +59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +#ifndef CGEN_BITSET_H +#define CGEN_BITSET_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* A bitmask represented as a string. + Each member of the set is represented as a bit + in the string. Bytes are indexed from left to right in the string and + bits from most significant to least within each byte. + + For example, the bit representing member number 6 is (set->bits[0] & 0x02). +*/ +typedef struct cgen_bitset +{ + unsigned length; + char *bits; +} CGEN_BITSET; + +extern CGEN_BITSET *cgen_bitset_create PARAMS ((unsigned)); +extern void cgen_bitset_init PARAMS ((CGEN_BITSET *, unsigned)); +extern void cgen_bitset_clear PARAMS ((CGEN_BITSET *)); +extern void cgen_bitset_add PARAMS ((CGEN_BITSET *, unsigned)); +extern void cgen_bitset_set PARAMS ((CGEN_BITSET *, unsigned)); +extern int cgen_bitset_compare PARAMS ((CGEN_BITSET *, CGEN_BITSET *)); +extern void cgen_bitset_union PARAMS ((CGEN_BITSET *, CGEN_BITSET *, CGEN_BITSET *)); +extern int cgen_bitset_intersect_p PARAMS ((CGEN_BITSET *, CGEN_BITSET *)); +extern int cgen_bitset_contains PARAMS ((CGEN_BITSET *, unsigned)); +extern CGEN_BITSET *cgen_bitset_copy PARAMS ((CGEN_BITSET *)); + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif diff --git a/include/opcode/cgen.h b/include/opcode/cgen.h index efebadb6739..e8fd5d3d9f7 100644 --- a/include/opcode/cgen.h +++ b/include/opcode/cgen.h @@ -22,6 +22,8 @@ with this program; if not, write to the Free Software Foundation, Inc., #ifndef CGEN_H #define CGEN_H +#include "symcat.h" +#include "cgen-bitset.h" /* ??? This file requires bfd.h but only to get bfd_vma. Seems like an awful lot to require just to get such a fundamental type. Perhaps the definition of bfd_vma can be moved outside of bfd.h. @@ -107,7 +109,13 @@ typedef struct cgen_cpu_desc *CGEN_CPU_DESC; /* Type of attribute values. */ -typedef int CGEN_ATTR_VALUE_TYPE; +typedef CGEN_BITSET CGEN_ATTR_VALUE_BITSET_TYPE; +typedef int CGEN_ATTR_VALUE_ENUM_TYPE; +typedef union +{ + CGEN_ATTR_VALUE_BITSET_TYPE bitset; + CGEN_ATTR_VALUE_ENUM_TYPE nonbitset; +} CGEN_ATTR_VALUE_TYPE; /* Struct to record attribute information. */ @@ -153,7 +161,9 @@ struct { unsigned int bool; \ #define CGEN_ATTR_VALUE(obj, attr_table, attr) \ ((unsigned int) (attr) < CGEN_ATTR_NBOOL_OFFSET \ ? ((CGEN_ATTR_BOOLS (attr_table) & CGEN_ATTR_MASK (attr)) != 0) \ - : ((attr_table)->nonbool[(attr) - CGEN_ATTR_NBOOL_OFFSET])) + : ((attr_table)->nonbool[(attr) - CGEN_ATTR_NBOOL_OFFSET].nonbitset)) +#define CGEN_BITSET_ATTR_VALUE(obj, attr_table, attr) \ + ((attr_table)->nonbool[(attr) - CGEN_ATTR_NBOOL_OFFSET].bitset) /* Attribute name/value tables. These are used to assist parsing of descriptions at run-time. */ @@ -161,7 +171,7 @@ struct { unsigned int bool; \ typedef struct { const char * name; - CGEN_ATTR_VALUE_TYPE value; + unsigned value; } CGEN_ATTR_ENTRY; /* For each domain (ifld,hw,operand,insn), list of attributes. */ @@ -965,6 +975,7 @@ typedef CGEN_ATTR_TYPE (CGEN_INSN_NBOOL_ATTRS) CGEN_INSN_ATTR_TYPE; typedef enum cgen_insn_attr { CGEN_INSN_ALIAS = 0 } CGEN_INSN_ATTR; +#define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) ((attrs)->bool & (1 << CGEN_INSN_ALIAS)) #endif /* This struct defines each entry in the instruction table. */ @@ -1016,6 +1027,8 @@ typedef struct /* Return value of attribute ATTR in INSN. */ #define CGEN_INSN_ATTR_VALUE(insn, attr) \ CGEN_ATTR_VALUE ((insn), CGEN_INSN_ATTRS (insn), (attr)) +#define CGEN_INSN_BITSET_ATTR_VALUE(insn, attr) \ + CGEN_BITSET_ATTR_VALUE ((insn), CGEN_INSN_ATTRS (insn), (attr)) } CGEN_IBASE; /* Return non-zero if INSN is the "invalid" insn marker. */ @@ -1179,10 +1192,9 @@ typedef struct cgen_cpu_desc /* Bitmap of selected machine(s) (a la BFD machine number). */ int machs; - /* Bitmap of selected isa(s). - ??? Simultaneous multiple isas might not make sense, but it's not (yet) - precluded. */ - int isas; + /* Bitmap of selected isa(s). */ + CGEN_BITSET *isas; +#define CGEN_CPU_ISAS(cd) ((cd)->isas) /* Current endian. */ enum cgen_endian endian; diff --git a/include/opcode/ia64.h b/include/opcode/ia64.h index 58553b3ad63..164594b8c7f 100644 --- a/include/opcode/ia64.h +++ b/include/opcode/ia64.h @@ -75,13 +75,15 @@ enum ia64_opnd IA64_OPND_R3, /* third register # */ IA64_OPND_R3_2, /* third register # (limited to gr0-gr3) */ + /* memory operands: */ + IA64_OPND_MR3, /* memory at addr of third register # */ + /* indirect operands: */ IA64_OPND_CPUID_R3, /* cpuid[reg] */ IA64_OPND_DBR_R3, /* dbr[reg] */ IA64_OPND_DTR_R3, /* dtr[reg] */ IA64_OPND_ITR_R3, /* itr[reg] */ IA64_OPND_IBR_R3, /* ibr[reg] */ - IA64_OPND_MR3, /* memory at addr of third register # */ IA64_OPND_MSR_R3, /* msr[reg] */ IA64_OPND_PKR_R3, /* pkr[reg] */ IA64_OPND_PMC_R3, /* pmc[reg] */ diff --git a/intl/ChangeLog b/intl/ChangeLog deleted file mode 100644 index 172f44cec1d..00000000000 --- a/intl/ChangeLog +++ /dev/null @@ -1,1106 +0,0 @@ -2005-05-13 Nick Clifton - - * Update the address and phone number of the FSF organization in - the GPL notices in the following files: - Makefile.in, bindtextdom.c, cat-compat.c, dcgettext.c, - dgettext.c, explodename.c, finddomain.c, gettext.c, gettext.h, - gettextP.h, hash-string.h, intl-compat.c, intlh.inst.in, - l10nflist.c, libgettext.h, libintl.glibc, linux-msg.sed, - loadinfo.h, loadmsgcat.c, localealias.c, po2tbl.sed.in, - textdomain.c, xopen-msg.sed - -2004-11-30 Tero Niemela - - * Makefile.in: Change LOCALEDIR to $(datadir)/share. - -2002-01-21 Thomas Klausner - - * linux-msg.sed: Comment typo fix. - * xopen-msg.sed: Likewise. - -1998-04-29 Ulrich Drepper - - * intl/localealias.c (read_alias_file): Use unsigned char for - local variables. Remove unused variable tp. - * intl/l10nflist.c (_nl_normalize_codeset): Use unsigned char * - for type of codeset. For loosing Solaris systems. - * intl/loadinfo.h: Adapt prototype of _nl_normalize_codeset. - * intl/bindtextdom.c (BINDTEXTDOMAIN): Don't define local variable - len if not needed. - Patches by Jim Meyering. - -1998-04-28 Ulrich Drepper - - * loadmsgcat.c (_nl_load_domain): Don't assign the element use_mmap if - mmap is not supported. - - * hash-string.h: Don't include . - -1998-04-27 Ulrich Drepper - - * textdomain.c: Use strdup is available. - - * localealias.c: Define HAVE_MEMPCPY so that we can use this - function. Define and use semapahores to protect modfication of - global objects when compiling for glibc. Add code to allow - freeing alias table. - - * l10nflist.c: Don't assume stpcpy not being a macro. - - * gettextP.h: Define internal_function macri if not already done. - Use glibc byte-swap macros instead of defining SWAP when compiled - for glibc. - (struct loaded_domain): Add elements to allow unloading. - - * Makefile.in (distclean): Don't remove libintl.h here. - - * bindtextdomain.c: Carry over changes from glibc. Use strdup if - available. - - * dcgettext.c: Don't assume stpcpy not being a macro. Mark internal - functions. Add memory freeing code for glibc. - - * dgettext.c: Update copyright. - - * explodename.c: Include stdlib.h and string.h only if they exist. - Use strings.h eventually. - - * finddomain.c: Mark internal functions. Use strdup if available. - Add memory freeing code for glibc. - -1997-10-10 20:00 Ulrich Drepper - - * libgettext.h: Fix dummy textdomain and bindtextdomain macros. - They should return reasonable values. - Reported by Tom Tromey . - -1997-09-16 03:33 Ulrich Drepper - - * libgettext.h: Define PARAMS also to `args' if __cplusplus is defined. - * intlh.inst.in: Likewise. - Reported by Jean-Marc Lasgouttes . - - * libintl.glibc: Update from current glibc version. - -1997-09-06 02:10 Ulrich Drepper - - * intlh.inst.in: Reformat copyright. - -1997-08-19 15:22 Ulrich Drepper - - * dcgettext.c (DCGETTEXT): Remove wrong comment. - -1997-08-16 00:13 Ulrich Drepper - - * Makefile.in (install-data): Don't change directory to install. - -1997-08-01 14:30 Ulrich Drepper - - * cat-compat.c: Fix copyright. - - * localealias.c: Don't define strchr unless !HAVE_STRCHR. - - * loadmsgcat.c: Update copyright. Fix typos. - - * l10nflist.c: Don't define strchr unless !HAVE_STRCHR. - (_nl_make_l10nflist): Handle sponsor and revision correctly. - - * gettext.c: Update copyright. - * gettext.h: Likewise. - * hash-string.h: Likewise. - - * finddomain.c: Remoave dead code. Define strchr only if - !HAVE_STRCHR. - - * explodename.c: Include . - - * explodename.c: Reformat copyright text. - (_nl_explode_name): Fix typo. - - * dcgettext.c: Define and use __set_errno. - (guess_category_value): Don't use setlocale if HAVE_LC_MESSAGES is - not defined. - - * bindtextdom.c: Pretty printing. - -1997-05-01 02:25 Ulrich Drepper - - * dcgettext.c (guess_category_value): Don't depend on - HAVE_LC_MESSAGES. We don't need the macro here. - Patch by Bruno Haible . - - * cat-compat.c (textdomain): DoN't refer to HAVE_SETLOCALE_NULL - macro. Instead use HAVE_LOCALE_NULL and define it when using - glibc, as in dcgettext.c. - Patch by Bruno Haible . - - * Makefile.in (CPPFLAGS): New variable. Reported by Franc,ois - Pinard. - -Mon Mar 10 06:51:17 1997 Ulrich Drepper - - * Makefile.in: Implement handling of libtool. - - * gettextP.h: Change data structures for use of generic lowlevel - i18n file handling. - -Wed Dec 4 20:21:18 1996 Ulrich Drepper - - * textdomain.c: Put parentheses around arguments of memcpy macro - definition. - * localealias.c: Likewise. - * l10nflist.c: Likewise. - * finddomain.c: Likewise. - * bindtextdom.c: Likewise. - Reported by Thomas Esken. - -Mon Nov 25 22:57:51 1996 Ulrich Drepper - - * textdomain.c: Move definition of `memcpy` macro to right - position. - -Fri Nov 22 04:01:58 1996 Ulrich Drepper - - * finddomain.c [!HAVE_STRING_H && !_LIBC]: Define memcpy using - bcopy if not already defined. Reported by Thomas Esken. - * bindtextdom.c: Likewise. - * l10nflist.c: Likewise. - * localealias.c: Likewise. - * textdomain.c: Likewise. - -Tue Oct 29 11:10:27 1996 Ulrich Drepper - - * Makefile.in (libdir): Change to use exec_prefix instead of - prefix. Reported by Knut-HåvardAksnes . - -Sat Aug 31 03:07:09 1996 Ulrich Drepper - - * l10nflist.c (_nl_normalize_codeset): We convert to lower case, - so don't prepend uppercase `ISO' for only numeric arg. - -Fri Jul 19 00:15:46 1996 Ulrich Drepper - - * l10nflist.c: Move inclusion of argz.h, ctype.h, stdlib.h after - definition of _GNU_SOURCE. Patch by Roland McGrath. - - * Makefile.in (uninstall): Fix another bug with `for' loop and - empty arguments. Patch by Jim Meyering. Correct name os - uninstalled files: no intl- prefix anymore. - - * Makefile.in (install-data): Again work around shells which - cannot handle mpty for list. Reported by Jim Meyering. - -Sat Jul 13 18:11:35 1996 Ulrich Drepper - - * Makefile.in (install): Split goal. Now depend on install-exec - and install-data. - (install-exec, install-data): New goals. Created from former - install goal. - Reported by Karl Berry. - -Sat Jun 22 04:58:14 1996 Ulrich Drepper - - * Makefile.in (MKINSTALLDIRS): New variable. Path to - mkinstalldirs script. - (install): use MKINSTALLDIRS variable or if the script is not present - try to find it in the $top_scrdir). - -Wed Jun 19 02:56:56 1996 Ulrich Drepper - - * l10nflist.c: Linux libc *partly* includes the argz_* functions. - Grr. Work around by renaming the static version and use macros - for renaming. - -Tue Jun 18 20:11:17 1996 Ulrich Drepper - - * l10nflist.c: Correct presence test macros of __argz_* functions. - - * l10nflist.c: Include based on test of it instead when - __argz_* functions are available. - Reported by Andreas Schwab. - -Thu Jun 13 15:17:44 1996 Ulrich Drepper - - * explodename.c, l10nflist.c: Define NULL for dumb systems. - -Tue Jun 11 17:05:13 1996 Ulrich Drepper - - * intlh.inst.in, libgettext.h (dcgettext): Rename local variable - result to __result to prevent name clash. - - * l10nflist.c, localealias.c, dcgettext.c: Define _GNU_SOURCE to - get prototype for stpcpy and strcasecmp. - - * intlh.inst.in, libgettext.h: Move declaration of - `_nl_msg_cat_cntr' outside __extension__ block to prevent warning - from gcc's -Wnested-extern option. - -Fri Jun 7 01:58:00 1996 Ulrich Drepper - - * Makefile.in (install): Remove comment. - -Thu Jun 6 17:28:17 1996 Ulrich Drepper - - * Makefile.in (install): Work around for another Buglix stupidity. - Always use an `else' close for `if's. Reported by Nelson Beebe. - - * Makefile.in (intlh.inst): Correct typo in phony rule. - Reported by Nelson Beebe. - -Thu Jun 6 01:49:52 1996 Ulrich Drepper - - * dcgettext.c (read_alias_file): Rename variable alloca_list to - block_list as the macro calls assume. - Patch by Eric Backus. - - * localealias.c [!HAVE_ALLOCA]: Define alloca as macro using - malloc. - (read_alias_file): Rename varriabe alloca_list to block_list as the - macro calls assume. - Patch by Eric Backus. - - * l10nflist.c: Correct conditional for inclusion. - Reported by Roland McGrath. - - * Makefile.in (all): Depend on all-@USE_INCLUDED_LIBINTL@, not - all-@USE_NLS@. - - * Makefile.in (install): intlh.inst comes from local dir, not - $(srcdir). - - * Makefile.in (intlh.inst): Special handling of this goal. If - used in gettext, this is really a rul to construct this file. If - used in any other package it is defined as a .PHONY rule with - empty body. - - * finddomain.c: Extract locale file information handling into - l10nfile.c. Rename local stpcpy__ function to stpcpy. - - * dcgettext.c (stpcpy): Add local definition. - - * l10nflist.c: Solve some portability problems. Patches partly by - Thomas Esken. Add local definition of stpcpy. - -Tue Jun 4 02:47:49 1996 Ulrich Drepper - - * intlh.inst.in: Don't depend including on - HAVE_LOCALE_H. Instead configure must rewrite this fiile - depending on the result of the configure run. - - * Makefile.in (install): libintl.inst is now called intlh.inst. - Add rules for updating intlh.inst from intlh.inst.in. - - * libintl.inst: Renamed to intlh.inst.in. - - * localealias.c, dcgettext.c [__GNUC__]: Define HAVE_ALLOCA to 1 - because gcc has __buitlin_alloca. - Reported by Roland McGrath. - -Mon Jun 3 00:32:16 1996 Ulrich Drepper - - * Makefile.in (installcheck): New goal to fulfill needs of - automake's distcheck. - - * Makefile.in (install): Reorder commands so that VERSION is - found. - - * Makefile.in (gettextsrcdir): Now use subdirectory intl/ in - @datadir@/gettext. - (COMSRCS): Add l10nfile.c. - (OBJECTS): Add l10nfile.o. - (DISTFILES): Rename to DISTFILE.normal. Remove $(DISTFILES.common). - (DISTFILE.gettext): Remove $(DISTFILES.common). - (all-gettext): Remove goal. - (install): If $(PACKAGE) = gettext install, otherwose do nothing. No - package but gettext itself should install libintl.h + headers. - (dist): Extend goal to work for gettext, too. - (dist-gettext): Remove goal. - - * dcgettext.c [!HAVE_ALLOCA]: Define macro alloca by using malloc. - -Sun Jun 2 17:33:06 1996 Ulrich Drepper - - * loadmsgcat.c (_nl_load_domain): Parameter is now comes from - find_l10nfile. - -Sat Jun 1 02:23:03 1996 Ulrich Drepper - - * l10nflist.c (__argz_next): Add definition. - - * dcgettext.c [!HAVE_ALLOCA]: Add code for handling missing alloca - code. Use new l10nfile handling. - - * localealias.c [!HAVE_ALLOCA]: Add code for handling missing - alloca code. - - * l10nflist.c: Initial revision. - -Tue Apr 2 18:51:18 1996 Ulrich Drepper - - * Makefile.in (all-gettext): New goal. Same as all-yes. - -Thu Mar 28 23:01:22 1996 Karl Eichwalder - - * Makefile.in (gettextsrcdir): Define using @datadir@. - -Tue Mar 26 12:39:14 1996 Ulrich Drepper - - * finddomain.c: Include . Reported by Roland McGrath. - -Sat Mar 23 02:00:35 1996 Ulrich Drepper - - * finddomain.c (stpcpy): Rename to stpcpy__ to prevent clashing - with external declaration. - -Sat Mar 2 00:47:09 1996 Ulrich Drepper - - * Makefile.in (all-no): Rename from all_no. - -Sat Feb 17 00:25:59 1996 Ulrich Drepper - - * gettextP.h [loaded_domain]: Array `successor' must now contain up - to 63 elements (because of codeset name normalization). - - * finddomain.c: Implement codeset name normalization. - -Thu Feb 15 04:39:09 1996 Ulrich Drepper - - * Makefile.in (all): Define to `all-@USE_NLS@'. - (all-yes, all_no): New goals. `all-no' is noop, `all-yes' - is former all. - -Mon Jan 15 21:46:01 1996 Howard Gayle - - * localealias.c (alias_compare): Increment string pointers in loop - of strcasecmp replacement. - -Fri Dec 29 21:16:34 1995 Ulrich Drepper - - * Makefile.in (install-src): Who commented this goal out ? :-) - -Fri Dec 29 15:08:16 1995 Ulrich Drepper - - * dcgettext.c (DCGETTEXT): Save `errno'. Failing system calls - should not effect it because a missing catalog is no error. - Reported by Harald Knig . - -Tue Dec 19 22:09:13 1995 Ulrich Drepper - - * Makefile.in (Makefile): Explicitly use $(SHELL) for running - shell scripts. - -Fri Dec 15 17:34:59 1995 Andreas Schwab - - * Makefile.in (install-src): Only install library and header when - we use the own implementation. Don't do it when using the - system's gettext or catgets functions. - - * dcgettext.c (find_msg): Must not swap domain->hash_size here. - -Sat Dec 9 16:24:37 1995 Ulrich Drepper - - * localealias.c, libintl.inst, libgettext.h, hash-string.h, - gettextP.h, finddomain.c, dcgettext.c, cat-compat.c: - Use PARAMS instead of __P. Suggested by Roland McGrath. - -Tue Dec 5 11:39:14 1995 Larry Schwimmer - - * libgettext.h: Use `#if !defined (_LIBINTL_H)' instead of `#if - !_LIBINTL_H' because Solaris defines _LIBINTL_H as empty. - -Mon Dec 4 15:42:07 1995 Ulrich Drepper - - * Makefile.in (install-src): - Install libintl.inst instead of libintl.h.install. - -Sat Dec 2 22:51:38 1995 Marcus Daniels - - * cat-compat.c (textdomain): - Reverse order in which files are tried you load. First - try local file, when this failed absolute path. - -Wed Nov 29 02:03:53 1995 Nelson H. F. Beebe - - * cat-compat.c (bindtextdomain): Add missing { }. - -Sun Nov 26 18:21:41 1995 Ulrich Drepper - - * libintl.inst: Add missing __P definition. Reported by Nelson Beebe. - - * Makefile.in: - Add dummy `all' and `dvi' goals. Reported by Tom Tromey. - -Sat Nov 25 16:12:01 1995 Franc,ois Pinard - - * hash-string.h: Capitalize arguments of macros. - -Sat Nov 25 12:01:36 1995 Ulrich Drepper - - * Makefile.in (DISTFILES): Prevent files names longer than 13 - characters. libintl.h.glibc->libintl.glibc, - libintl.h.install->libintl.inst. Reported by Joshua R. Poulson. - -Sat Nov 25 11:31:12 1995 Eric Backus - - * dcgettext.c: Fix bug in preprocessor conditionals. - -Sat Nov 25 02:35:27 1995 Nelson H. F. Beebe - - * libgettext.h: Solaris cc does not understand - #if !SYMBOL1 && !SYMBOL2. Sad but true. - -Thu Nov 23 16:22:14 1995 Ulrich Drepper - - * hash-string.h (hash_string): - Fix for machine with >32 bit `unsigned long's. - - * dcgettext.c (DCGETTEXT): - Fix horrible bug in loop for alternative translation. - -Thu Nov 23 01:45:29 1995 Ulrich Drepper - - * po2tbl.sed.in, linux-msg.sed, xopen-msg.sed: - Some further simplifications in message number generation. - -Mon Nov 20 21:08:43 1995 Ulrich Drepper - - * libintl.h.glibc: Use __const instead of const in prototypes. - - * Makefile.in (install-src): - Install libintl.h.install instead of libintl.h. This - is a stripped-down version. Suggested by Peter Miller. - - * libintl.h.install, libintl.h.glibc: Initial revision. - - * localealias.c (_nl_expand_alias, read_alias_file): - Protect prototypes in type casts by __P. - -Tue Nov 14 16:43:58 1995 Ulrich Drepper - - * hash-string.h: Correct prototype for hash_string. - -Sun Nov 12 12:42:30 1995 Ulrich Drepper - - * hash-string.h (hash_string): Add prototype. - - * gettextP.h: Fix copyright. - (SWAP): Add prototype. - -Wed Nov 8 22:56:33 1995 Ulrich Drepper - - * localealias.c (read_alias_file): Forgot sizeof. - Avoid calling *printf function. This introduces a big overhead. - Patch by Roland McGrath. - -Tue Nov 7 14:21:08 1995 Ulrich Drepper - - * finddomain.c, cat-compat.c: Wrong indentation in #if for stpcpy. - - * finddomain.c (stpcpy): - Define substitution function local. The macro was to flaky. - - * cat-compat.c: Fix typo. - - * xopen-msg.sed, linux-msg.sed: - While bringing message number to right place only accept digits. - - * linux-msg.sed, xopen-msg.sed: Now that the counter does not have - leading 0s we don't need to remove them. Reported by Marcus - Daniels. - - * Makefile.in (../po/cat-id-tbl.o): Use $(top_srdir) in - dependency. Reported by Marcus Daniels. - - * cat-compat.c: (stpcpy) [!_LIBC && !HAVE_STPCPY]: Define replacement. - Generally cleanup using #if instead of #ifndef. - - * Makefile.in: Correct typos in comment. By Franc,ois Pinard. - -Mon Nov 6 00:27:02 1995 Ulrich Drepper - - * Makefile.in (install-src): Don't install libintl.h and libintl.a - if we use an available gettext implementation. - -Sun Nov 5 22:02:08 1995 Ulrich Drepper - - * libgettext.h: Fix typo: HAVE_CATGETTS -> HAVE_CATGETS. Reported - by Franc,ois Pinard. - - * libgettext.h: Use #if instead of #ifdef/#ifndef. - - * finddomain.c: - Comments describing what has to be done should start with FIXME. - -Sun Nov 5 19:38:01 1995 Ulrich Drepper - - * Makefile.in (DISTFILES): Split. Use DISTFILES with normal meaning. - DISTFILES.common names the files common to both dist goals. - DISTFILES.gettext are the files only distributed in GNU gettext. - -Sun Nov 5 17:32:54 1995 Ulrich Drepper - - * dcgettext.c (DCGETTEXT): Correct searching in derived locales. - This was necessary since a change in _nl_find_msg several weeks - ago. I really don't know this is still not fixed. - -Sun Nov 5 12:43:12 1995 Ulrich Drepper - - * loadmsgcat.c (_nl_load_domain): Test for FILENAME == NULL. This - might mark a special condition. - - * finddomain.c (make_entry_rec): Don't make illegal entry as decided. - - * Makefile.in (dist): Suppress error message when ln failed. - Get files from $(srcdir) explicitly. - - * libgettext.h (gettext_const): Rename to gettext_noop. - -Fri Nov 3 07:36:50 1995 Ulrich Drepper - - * finddomain.c (make_entry_rec): - Protect against wrong locale names by testing mask. - - * libgettext.h (gettext_const): Add macro definition. - Capitalize macro arguments. - -Thu Nov 2 23:15:51 1995 Ulrich Drepper - - * finddomain.c (_nl_find_domain): - Test for pointer != NULL before accessing value. - Reported by Tom Tromey. - - * gettext.c (NULL): - Define as (void*)0 instad of 0. Reported by Franc,ois Pinard. - -Mon Oct 30 21:28:52 1995 Ulrich Drepper - - * po2tbl.sed.in: Serious typo bug fixed by Jim Meyering. - -Sat Oct 28 23:20:47 1995 Ulrich Drepper - - * libgettext.h: Disable dcgettext optimization for Solaris 2.3. - - * localealias.c (alias_compare): - Peter Miller reported that tolower in some systems is - even dumber than I thought. Protect call by `isupper'. - -Fri Oct 27 22:22:51 1995 Ulrich Drepper - - * Makefile.in (libdir, includedir): New variables. - (install-src): Install libintl.a and libintl.h in correct dirs. - -Fri Oct 27 22:07:29 1995 Ulrich Drepper - - * Makefile.in (SOURCES): Fix typo: intrl.compat.c -> intl-compat.c. - - * po2tbl.sed.in: Patch for buggy SEDs by Christian von Roques. - - * localealias.c: - Fix typo and superflous test. Reported by Christian von Roques. - -Fri Oct 6 11:52:05 1995 Ulrich Drepper - - * finddomain.c (_nl_find_domain): - Correct some remainder from the pre-CEN syntax. Now - we don't have a constant number of successors anymore. - -Wed Sep 27 21:41:13 1995 Ulrich Drepper - - * Makefile.in (DISTFILES): Add libintl.h.glibc. - - * Makefile.in (dist-libc): Add goal for packing sources for glibc. - (COMSRCS, COMHDRS): Splitted to separate sources shared with glibc. - - * loadmsgcat.c: Forget to continue #if line. - - * localealias.c: - [_LIBC]: Rename strcasecmp to __strcasecmp to keep ANSI C name - space clean. - - * dcgettext.c, finddomain.c: Better comment to last change. - - * loadmsgcat.c: - [_LIBC]: Rename fstat, open, close, read, mmap, and munmap to - __fstat, __open, __close, __read, __mmap, and __munmap resp - to keep ANSI C name space clean. - - * finddomain.c: - [_LIBC]: Rename stpcpy to __stpcpy to keep ANSI C name space clean. - - * dcgettext.c: - [_LIBC]: Rename getced and stpcpy to __getcwd and __stpcpy resp to - keep ANSI C name space clean. - - * libgettext.h: - Include sys/types.h for those old SysV systems out there. - Reported by Francesco Potorti`. - - * loadmsgcat.c (use_mmap): Define if compiled for glibc. - - * bindtextdom.c: Include all those standard headers - unconditionally if _LIBC is defined. - - * finddomain.c: Fix 2 times defiend -> defined. - - * textdomain.c: Include libintl.h instead of libgettext.h when - compiling for glibc. Include all those standard headers - unconditionally if _LIBC is defined. - - * localealias.c, loadmsgcat.c: Prepare to be compiled in glibc. - - * gettext.c: - Include libintl.h instead of libgettext.h when compiling for glibc. - Get NULL from stddef.h if we compile for glibc. - - * finddomain.c: Include libintl.h instead of libgettext.h when - compiling for glibc. Include all those standard headers - unconditionally if _LIBC is defined. - - * dcgettext.c: Include all those standard headers unconditionally - if _LIBC is defined. - - * dgettext.c: If compiled in glibc include libintl.h instead of - libgettext.h. - (locale.h): Don't rely on HAVE_LOCALE_H when compiling for glibc. - - * dcgettext.c: If compiled in glibc include libintl.h instead of - libgettext.h. - (getcwd): Don't rely on HAVE_GETCWD when compiling for glibc. - - * bindtextdom.c: - If compiled in glibc include libintl.h instead of libgettext.h. - -Mon Sep 25 22:23:06 1995 Ulrich Drepper - - * localealias.c (_nl_expand_alias): Don't call bsearch if NMAP <= 0. - Reported by Marcus Daniels. - - * cat-compat.c (bindtextdomain): - String used in putenv must not be recycled. - Reported by Marcus Daniels. - - * libgettext.h (__USE_GNU_GETTEXT): - Additional symbol to signal that we use GNU gettext - library. - - * cat-compat.c (bindtextdomain): - Fix bug with the strange stpcpy replacement. - Reported by Nelson Beebe. - -Sat Sep 23 08:23:51 1995 Ulrich Drepper - - * cat-compat.c: Include for stpcpy prototype. - - * localealias.c (read_alias_file): - While expand strdup code temporary variable `cp' hided - higher level variable with same name. Rename to `tp'. - - * textdomain.c (textdomain): - Avoid warning by using temporary variable in strdup code. - - * finddomain.c (_nl_find_domain): Remove unused variable `application'. - -Thu Sep 21 15:51:44 1995 Ulrich Drepper - - * localealias.c (alias_compare): - Use strcasecmp() only if available. Else use - implementation in place. - - * intl-compat.c: - Wrapper functions now call *__ functions instead of __*. - - * libgettext.h: Declare prototypes for *__ functions instead for __*. - - * cat-compat.c, loadmsgcat.c: - Don't use xmalloc, xstrdup, and stpcpy. These functions are not part - of the standard libc and so prevent libintl.a from being used - standalone. - - * bindtextdom.c: - Don't use xmalloc, xstrdup, and stpcpy. These functions are not part - of the standard libc and so prevent libintl.a from being used - standalone. - Rename to bindtextdomain__ if not used in GNU C Library. - - * dgettext.c: - Rename function to dgettext__ if not used in GNU C Library. - - * gettext.c: - Don't use xmalloc, xstrdup, and stpcpy. These functions are not part - of the standard libc and so prevent libintl.a from being used - standalone. - Functions now called gettext__ if not used in GNU C Library. - - * dcgettext.c, localealias.c, textdomain.c, finddomain.c: - Don't use xmalloc, xstrdup, and stpcpy. These functions are not part - of the standard libc and so prevent libintl.a from being used - standalone. - -Sun Sep 17 23:14:49 1995 Ulrich Drepper - - * finddomain.c: Correct some bugs in handling of CEN standard - locale definitions. - -Thu Sep 7 01:49:28 1995 Ulrich Drepper - - * finddomain.c: Implement CEN syntax. - - * gettextP.h (loaded_domain): Extend number of successors to 31. - -Sat Aug 19 19:25:29 1995 Ulrich Drepper - - * Makefile.in (aliaspath): Remove path to X11 locale dir. - - * Makefile.in: Make install-src depend on install. This helps - gettext to install the sources and other packages can use the - install goal. - -Sat Aug 19 15:19:33 1995 Ulrich Drepper - - * Makefile.in (uninstall): Remove stuff installed by install-src. - -Tue Aug 15 13:13:53 1995 Ulrich Drepper - - * VERSION.in: Initial revision. - - * Makefile.in (DISTFILES): - Add VERSION file. This is not necessary for gettext, but - for other packages using this library. - -Tue Aug 15 06:16:44 1995 Ulrich Drepper - - * gettextP.h (_nl_find_domain): - New prototype after changing search strategy. - - * finddomain.c (_nl_find_domain): - We now try only to find a specified catalog. Fall back to other - catalogs listed in the locale list is now done in __dcgettext. - - * dcgettext.c (__dcgettext): - Now we provide message fall back even to different languages. - I.e. if a message is not available in one language all the other - in the locale list a tried. Formerly fall back was only possible - within one language. Implemented by moving one loop from - _nl_find_domain to here. - -Mon Aug 14 23:45:50 1995 Ulrich Drepper - - * Makefile.in (gettextsrcdir): - Directory where source of GNU gettext library are made - available. - (INSTALL, INSTALL_DATA): Programs used for installing sources. - (gettext-src): New. Rule to install GNU gettext sources for use in - gettextize shell script. - -Sun Aug 13 14:40:48 1995 Ulrich Drepper - - * loadmsgcat.c (_nl_load_domain): - Use mmap for loading only when munmap function is - also available. - - * Makefile.in (install): Depend on `all' goal. - -Wed Aug 9 11:04:33 1995 Ulrich Drepper - - * localealias.c (read_alias_file): - Do not overwrite '\n' when terminating alias value string. - - * localealias.c (read_alias_file): - Handle long lines. Ignore the rest not fitting in - the buffer after the initial `fgets' call. - -Wed Aug 9 00:54:29 1995 Ulrich Drepper - - * gettextP.h (_nl_load_domain): - Add prototype, replacing prototype for _nl_load_msg_cat. - - * finddomain.c (_nl_find_domain): - Remove unneeded variable filename and filename_len. - (expand_alias): Remove prototype because functions does not - exist anymore. - - * localealias.c (read_alias_file): - Change type of fname_len parameter to int. - (xmalloc): Add prototype. - - * loadmsgcat.c: Better prototypes for xmalloc. - -Tue Aug 8 22:30:39 1995 Ulrich Drepper - - * finddomain.c (_nl_find_domain): - Allow alias name to be constructed from the four components. - - * Makefile.in (aliaspath): New variable. Set to preliminary value. - (SOURCES): Add localealias.c. - (OBJECTS): Add localealias.o. - - * gettextP.h: Add prototype for _nl_expand_alias. - - * finddomain.c: Aliasing handled in intl/localealias.c. - - * localealias.c: Aliasing for locale names. - - * bindtextdom.c: Better prototypes for xmalloc and xstrdup. - -Mon Aug 7 23:47:42 1995 Ulrich Drepper - - * Makefile.in (DISTFILES): gettext.perl is now found in misc/. - - * cat-compat.c (bindtextdomain): - Correct implementation. dirname parameter was not used. - Reported by Marcus Daniels. - - * gettextP.h (loaded_domain): - New fields `successor' and `decided' for oo, lazy - message handling implementation. - - * dcgettext.c: - Adopt for oo, lazy message handliing. - Now we can inherit translations from less specific locales. - (find_msg): New function. - - * loadmsgcat.c, finddomain.c: - Complete rewrite. Implement oo, lazy message handling :-). - We now have an additional environment variable `LANGUAGE' with - a higher priority than LC_ALL for the LC_MESSAGE locale. - Here we can set a colon separated list of specifications each - of the form `language[_territory[.codeset]][@modifier]'. - -Sat Aug 5 09:55:42 1995 Ulrich Drepper - - * finddomain.c (unistd.h): - Include to get _PC_PATH_MAX defined on system having it. - -Fri Aug 4 22:42:00 1995 Ulrich Drepper - - * finddomain.c (stpcpy): Include prototype. - - * Makefile.in (dist): Remove `copying instead' message. - -Wed Aug 2 18:52:03 1995 Ulrich Drepper - - * Makefile.in (ID, TAGS): Do not use $^. - -Tue Aug 1 20:07:11 1995 Ulrich Drepper - - * Makefile.in (TAGS, ID): Use $^ as command argument. - (TAGS): Give etags -o option t write to current directory, - not $(srcdir). - (ID): Use $(srcdir) instead os $(top_srcdir)/src. - (distclean): Remove ID. - -Sun Jul 30 11:51:46 1995 Ulrich Drepper - - * Makefile.in (gnulocaledir): - New variable, always using share/ for data directory. - (DEFS): Add GNULOCALEDIR, used in finddomain.c. - - * finddomain.c (_nl_default_dirname): - Set to GNULOCALEDIR, because it always has to point - to the directory where GNU gettext Library writes it to. - - * intl-compat.c (textdomain, bindtextdomain): - Undefine macros before function definition. - -Sat Jul 22 01:10:02 1995 Ulrich Drepper - - * libgettext.h (_LIBINTL_H): - Protect definition in case where this file is included as - libgettext.h on Solaris machines. Add comment about this. - -Wed Jul 19 02:36:42 1995 Ulrich Drepper - - * intl-compat.c (textdomain): Correct typo. - -Wed Jul 19 01:51:35 1995 Ulrich Drepper - - * dcgettext.c (dcgettext): Function now called __dcgettext. - - * dgettext.c (dgettext): Now called __dgettext and calls - __dcgettext. - - * gettext.c (gettext): - Function now called __gettext and calls __dgettext. - - * textdomain.c (textdomain): Function now called __textdomain. - - * bindtextdom.c (bindtextdomain): Function now called - __bindtextdomain. - - * intl-compat.c: Initial revision. - - * Makefile.in (SOURCES): Add intl-compat.c. - (OBJECTS): We always compile the GNU gettext library functions. - OBJECTS contains all objects but cat-compat.o, ../po/cat-if-tbl.o, - and intl-compat.o. - (GETTOBJS): Contains now only intl-compat.o. - - * libgettext.h: - Re-include protection matches dualistic character of libgettext.h. - For all functions in GNU gettext library define __ counter part. - - * finddomain.c (strchr): Define as index if not found in C library. - (_nl_find_domain): For relative paths paste / in between. - -Tue Jul 18 16:37:45 1995 Ulrich Drepper - - * loadmsgcat.c, finddomain.c: Add inclusion of sys/types.h. - - * xopen-msg.sed: Fix bug with `msgstr ""' lines. - A little bit better comments. - -Tue Jul 18 01:18:27 1995 Ulrich Drepper - - * Makefile.in: - po-mode.el, makelinks, combine-sh are now found in ../misc. - - * po-mode.el, makelinks, combine-sh, elisp-comp: - Moved to ../misc/. - - * libgettext.h, gettextP.h, gettext.h: Uniform test for __STDC__. - -Sun Jul 16 22:33:02 1995 Ulrich Drepper - - * Makefile.in (INSTALL, INSTALL_DATA): New variables. - (install-data, uninstall): Install/uninstall .elc file. - - * po-mode.el (Installation comment): - Add .pox as possible extension of .po files. - -Sun Jul 16 13:23:27 1995 Ulrich Drepper - - * elisp-comp: Complete new version by Franc,ois: This does not - fail when not compiling in the source directory. - -Sun Jul 16 00:12:17 1995 Ulrich Drepper - - * Makefile.in (../po/cat-id-tbl.o): - Use $(MAKE) instead of make for recursive make. - - * Makefile.in (.el.elc): Use $(SHELL) instead of /bin/sh. - (install-exec): Add missing dummy goal. - (install-data, uninstall): @ in multi-line shell command at - beginning, not in front of echo. Reported by Eric Backus. - -Sat Jul 15 00:21:28 1995 Ulrich Drepper - - * Makefile.in (DISTFILES): - Rename libgettext.perl to gettext.perl to fit in 14 chars - file systems. - - * gettext.perl: - Rename to gettext.perl to fit in 14 chars file systems. - -Thu Jul 13 23:17:20 1995 Ulrich Drepper - - * cat-compat.c: If !STDC_HEADERS try to include malloc.h. - -Thu Jul 13 20:55:02 1995 Ulrich Drepper - - * po2tbl.sed.in: Pretty printing. - - * linux-msg.sed, xopen-msg.sed: - Correct bugs with handling substitute flags in branches. - - * hash-string.h (hash_string): - Old K&R compilers don't under stand `unsigned char'. - - * gettext.h (nls_uint32): - Some old K&R compilers (eg HP) don't understand `unsigned int'. - - * cat-compat.c (msg_to_cat_id): De-ANSI-fy prototypes. - -Thu Jul 13 01:34:33 1995 Ulrich Drepper - - * Makefile.in (ELCFILES): New variable. - (DISTFILES): Add elisp-comp. - Add implicit rule for .el -> .elc compilation. - (install-data): install $ELCFILES - (clean): renamed po-to-tbl and po-to-msg to po2tbl and po2msg resp. - - * elisp-comp: Initial revision - -Wed Jul 12 16:14:52 1995 Ulrich Drepper - - * Makefile.in: - cat-id-tbl.c is now found in po/. This enables us to use an identical - intl/ directory in all packages. - - * dcgettext.c (dcgettext): hashing does not work for table size <= 2. - - * textdomain.c: fix typo (#if def -> #if defined) - -Tue Jul 11 18:44:43 1995 Ulrich Drepper - - * Makefile.in (stamp-cat-id): use top_srcdir to address source files - (DISTFILES,distclean): move tupdate.perl to src/ - - * po-to-tbl.sed.in: - add additional jump to clear change flag to recognize multiline strings - -Tue Jul 11 01:32:50 1995 Ulrich Drepper - - * textdomain.c: Protect inclusion of stdlib.h and string.h. - - * loadmsgcat.c: Protect inclusion of stdlib.h. - - * libgettext.h: Protect inclusion of locale.h. - Allow use in C++ programs. - Define NULL is not happened already. - - * Makefile.in (DISTFILES): ship po-to-tbl.sed.in instead of - po-to-tbl.sed. - (distclean): remove po-to-tbl.sed and tupdate.perl. - - * tupdate.perl.in: Substitute Perl path even in exec line. - Don't include entries without translation from old .po file. - -Tue Jul 4 00:41:51 1995 Ulrich Drepper - - * tupdate.perl.in: use "Updated: " in msgid "". - - * cat-compat.c: Fix typo (LOCALDIR -> LOCALEDIR). - Define getenv if !__STDC__. - - * bindtextdom.c: Protect stdlib.h and string.h inclusion. - Define free if !__STDC__. - - * finddomain.c: Change DEF_MSG_DOM_DIR to LOCALEDIR. - Define free if !__STDC__. - - * cat-compat.c: Change DEF_MSG_DOM_DIR to LOCALEDIR. - -Mon Jul 3 23:56:30 1995 Ulrich Drepper - - * Makefile.in: Use LOCALEDIR instead of DEF_MSG_DOM_DIR. - Remove unneeded $(srcdir) from Makefile.in dependency. - - * makelinks: Add copyright and short description. - - * po-mode.el: Last version for 0.7. - - * tupdate.perl.in: Fix die message. - - * dcgettext.c: Protect include of string.h. - - * gettext.c: Protect include of stdlib.h and further tries to get NULL. - - * finddomain.c: Some corrections in includes. - - * Makefile.in (INCLUDES): Prune list correct path to Makefile.in. - - * po-to-tbl.sed: Adopt for new .po file format. - - * linux-msg.sed, xopen-msg.sed: Adopt for new .po file format. - -Sun Jul 2 23:55:03 1995 Ulrich Drepper - - * tupdate.perl.in: Complete rewrite for new .po file format. - -Sun Jul 2 02:06:50 1995 Ulrich Drepper - - * First official release. This directory contains all the code - needed to internationalize own packages. It provides functions - which allow to use the X/Open catgets function with an interface - like the Uniforum gettext function. For system which does not - have neither of those a complete implementation is provided. diff --git a/intl/Makefile.in b/intl/Makefile.in deleted file mode 100644 index f3664ae3dca..00000000000 --- a/intl/Makefile.in +++ /dev/null @@ -1,214 +0,0 @@ -# Makefile for directory with message catalog handling in GNU NLS Utilities. -# Copyright (C) 1995, 1996, 1997, 1998 Free Software Foundation, Inc. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. - -PACKAGE = @PACKAGE@ -VERSION = @VERSION@ - -SHELL = /bin/sh - -srcdir = @srcdir@ -top_srcdir = @top_srcdir@ -top_builddir = .. -VPATH = @srcdir@ - -prefix = @prefix@ -exec_prefix = @exec_prefix@ -transform = @program_transform_name@ -libdir = $(exec_prefix)/lib -includedir = $(prefix)/include -datadir = $(prefix)/@DATADIRNAME@ -localedir = $(datadir)/locale -gnulocaledir = $(datadir)/locale -gettextsrcdir = @datadir@/gettext/intl -aliaspath = $(localedir):. -subdir = intl - -INSTALL = @INSTALL@ -INSTALL_DATA = @INSTALL_DATA@ -MKINSTALLDIRS = @MKINSTALLDIRS@ - -l = @l@ - -AR = ar -CC = @CC@ -LIBTOOL = @LIBTOOL@ -RANLIB = @RANLIB@ - -DEFS = -DLOCALEDIR=\"$(localedir)\" -DGNULOCALEDIR=\"$(gnulocaledir)\" \ --DLOCALE_ALIAS_PATH=\"$(aliaspath)\" @DEFS@ -CPPFLAGS = @CPPFLAGS@ -CFLAGS = @CFLAGS@ -LDFLAGS = @LDFLAGS@ - -COMPILE = $(CC) -c $(DEFS) $(INCLUDES) $(CPPFLAGS) $(CFLAGS) $(XCFLAGS) - -HEADERS = $(COMHDRS) libgettext.h loadinfo.h -COMHDRS = gettext.h gettextP.h hash-string.h -SOURCES = $(COMSRCS) intl-compat.c cat-compat.c -COMSRCS = bindtextdom.c dcgettext.c dgettext.c gettext.c \ -finddomain.c loadmsgcat.c localealias.c textdomain.c l10nflist.c \ -explodename.c -OBJECTS = @INTLOBJS@ bindtextdom.$lo dcgettext.$lo dgettext.$lo gettext.$lo \ -finddomain.$lo loadmsgcat.$lo localealias.$lo textdomain.$lo l10nflist.$lo \ -explodename.$lo -CATOBJS = cat-compat.$lo ../po/cat-id-tbl.$lo -GETTOBJS = intl-compat.$lo -DISTFILES.common = ChangeLog Makefile.in linux-msg.sed po2tbl.sed.in \ -xopen-msg.sed $(HEADERS) $(SOURCES) -DISTFILES.normal = VERSION -DISTFILES.gettext = libintl.glibc intlh.inst.in - -.SUFFIXES: -.SUFFIXES: .c .o .lo -.c.o: - $(COMPILE) $< -.c.lo: - $(LIBTOOL) --mode=compile $(COMPILE) $< - -INCLUDES = -I. -I$(srcdir) - -all: all-@USE_INCLUDED_LIBINTL@ - -all-yes: libintl.$la intlh.inst -all-no: -install-info: - -libintl.a: $(OBJECTS) - rm -f $@ - $(AR) cru $@ $(OBJECTS) - $(RANLIB) $@ - -libintl.la: $(OBJECTS) - $(LIBTOOL) --mode=link $(CC) $(LDFLAGS) -o $@ $(OBJECTS) \ - -version-info 1:0 -rpath $(libdir) - -../po/cat-id-tbl.$lo: ../po/cat-id-tbl.c $(top_srcdir)/po/$(PACKAGE).pot - cd ../po && $(MAKE) cat-id-tbl.$lo - -check: all - -# This installation goal is only used in GNU gettext. Packages which -# only use the library should use install instead. - -# We must not install the libintl.h/libintl.a files if we are on a -# system which has the gettext() function in its C library or in a -# separate library or use the catgets interface. A special case is -# where configure found a previously installed GNU gettext library. -# If you want to use the one which comes with this version of the -# package, you have to use `configure --with-included-gettext'. -install: install-exec install-data -install-exec: all - if test "$(PACKAGE)" = "gettext" \ - && test '@INTLOBJS@' = '$(GETTOBJS)'; then \ - if test -r $(MKINSTALLDIRS); then \ - $(MKINSTALLDIRS) $(libdir) $(includedir); \ - else \ - $(top_srcdir)/mkinstalldirs $(libdir) $(includedir); \ - fi; \ - $(INSTALL_DATA) intlh.inst $(includedir)/libintl.h; \ - $(INSTALL_DATA) libintl.a $(libdir)/libintl.a; \ - else \ - : ; \ - fi -install-data: all - if test "$(PACKAGE)" = "gettext"; then \ - if test -r $(MKINSTALLDIRS); then \ - $(MKINSTALLDIRS) $(gettextsrcdir); \ - else \ - $(top_srcdir)/mkinstalldirs $(gettextsrcdir); \ - fi; \ - $(INSTALL_DATA) VERSION $(gettextsrcdir)/VERSION; \ - dists="$(DISTFILES.common)"; \ - for file in $$dists; do \ - $(INSTALL_DATA) $(srcdir)/$$file $(gettextsrcdir)/$$file; \ - done; \ - else \ - : ; \ - fi - -# Define this as empty until I found a useful application. -installcheck: - -uninstall: - dists="$(DISTFILES.common)"; \ - for file in $$dists; do \ - rm -f $(gettextsrcdir)/$$file; \ - done - -info dvi: - -$(OBJECTS): config.h libgettext.h -bindtextdom.$lo finddomain.$lo loadmsgcat.$lo: gettextP.h gettext.h loadinfo.h -dcgettext.$lo: gettextP.h gettext.h hash-string.h loadinfo.h - -tags: TAGS - -TAGS: $(HEADERS) $(SOURCES) - here=`pwd`; cd $(srcdir) && etags -o $$here/TAGS $(HEADERS) $(SOURCES) - -id: ID - -ID: $(HEADERS) $(SOURCES) - here=`pwd`; cd $(srcdir) && mkid -f$$here/ID $(HEADERS) $(SOURCES) - - -mostlyclean: - rm -f *.a *.o *.lo core core.* - -clean: mostlyclean - -distclean: clean - rm -f Makefile ID TAGS po2msg.sed po2tbl.sed libintl.h config.log - -maintainer-clean: distclean - @echo "This command is intended for maintainers to use;" - @echo "it deletes files that may require special tools to rebuild." - - -# GNU gettext needs not contain the file `VERSION' but contains some -# other files which should not be distributed in other packages. -distdir = ../$(PACKAGE)-$(VERSION)/$(subdir) -dist distdir: Makefile $(DISTFILES) - if test "$(PACKAGE)" = gettext; then \ - additional="$(DISTFILES.gettext)"; \ - else \ - additional="$(DISTFILES.normal)"; \ - fi; \ - for file in $(DISTFILES.common) $$additional; do \ - ln $(srcdir)/$$file $(distdir) 2> /dev/null \ - || cp -p $(srcdir)/$$file $(distdir); \ - done - -dist-libc: - tar zcvf intl-glibc.tar.gz $(COMSRCS) $(COMHDRS) libintl.h.glibc - -Makefile: Makefile.in config.status - CONFIG_FILES=$@ CONFIG_HEADERS= $(SHELL) ./config.status - -# The dependency for intlh.inst is different in gettext and all other -# packages. Because we cannot you GNU make features we have to solve -# the problem while rewriting Makefile.in. -@GT_YES@intlh.inst: intlh.inst.in ../config.status -@GT_YES@ cd .. \ -@GT_YES@ && CONFIG_FILES=$(subdir)/$@ CONFIG_HEADERS= \ -@GT_YES@ $(SHELL) ./config.status -@GT_NO@.PHONY: intlh.inst -@GT_NO@intlh.inst: - -# Tell versions [3.59,3.63) of GNU make not to export all variables. -# Otherwise a system limit (for SysV at least) may be exceeded. -.NOEXPORT: diff --git a/intl/acconfig.h b/intl/acconfig.h deleted file mode 100644 index 70f81f80898..00000000000 --- a/intl/acconfig.h +++ /dev/null @@ -1,14 +0,0 @@ -/* Define to 1 if NLS is requested. */ -#undef ENABLE_NLS - -/* Define as 1 if you have catgets and don't want to use GNU gettext. */ -#undef HAVE_CATGETS - -/* Define as 1 if you have gettext and don't want to use GNU gettext. */ -#undef HAVE_GETTEXT - -/* Define as 1 if you have the stpcpy function. */ -#undef HAVE_STPCPY - -/* Define if your locale.h file contains LC_MESSAGES. */ -#undef HAVE_LC_MESSAGES diff --git a/intl/aclocal.m4 b/intl/aclocal.m4 deleted file mode 100644 index 225439f2125..00000000000 --- a/intl/aclocal.m4 +++ /dev/null @@ -1,387 +0,0 @@ -dnl aclocal.m4 generated automatically by aclocal 1.3 - -dnl Copyright (C) 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc. -dnl This Makefile.in is free software; the Free Software Foundation -dnl gives unlimited permission to copy and/or distribute it, -dnl with or without modifications, as long as this notice is preserved. - -dnl This program is distributed in the hope that it will be useful, -dnl but WITHOUT ANY WARRANTY, to the extent permitted by law; without -dnl even the implied warranty of MERCHANTABILITY or FITNESS FOR A -dnl PARTICULAR PURPOSE. - -# Like AC_CONFIG_HEADER, but automatically create stamp file. - -AC_DEFUN(AM_CONFIG_HEADER, -[AC_PREREQ([2.12]) -AC_CONFIG_HEADER([$1]) -dnl When config.status generates a header, we must update the stamp-h file. -dnl This file resides in the same directory as the config header -dnl that is generated. We must strip everything past the first ":", -dnl and everything past the last "/". -AC_OUTPUT_COMMANDS(changequote(<<,>>)dnl -ifelse(patsubst(<<$1>>, <<[^ ]>>, <<>>), <<>>, -<>CONFIG_HEADERS" || echo timestamp > patsubst(<<$1>>, <<^\([^:]*/\)?.*>>, <<\1>>)stamp-h<<>>dnl>>, -<>; do - case " <<$>>CONFIG_HEADERS " in - *" <<$>>am_file "*<<)>> - echo timestamp > `echo <<$>>am_file | sed -e 's%:.*%%' -e 's%[^/]*$%%'`stamp-h$am_indx - ;; - esac - am_indx=`expr "<<$>>am_indx" + 1` -done<<>>dnl>>) -changequote([,]))]) - - -# serial 1 - -AC_DEFUN(AM_PROG_INSTALL, -[AC_REQUIRE([AC_PROG_INSTALL]) -test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}' -AC_SUBST(INSTALL_SCRIPT)dnl -]) - -# This file is derived from `gettext.m4'. The difference is that the -# included macros assume Cygnus-style source and build trees. - -# Macro to add for using GNU gettext. -# Ulrich Drepper , 1995. -# -# This file file be copied and used freely without restrictions. It can -# be used in projects which are not available under the GNU Public License -# but which still want to provide support for the GNU gettext functionality. -# Please note that the actual code is *not* freely available. - -# serial 3 - -AC_DEFUN(CY_WITH_NLS, - [AC_MSG_CHECKING([whether NLS is requested]) - dnl Default is enabled NLS - AC_ARG_ENABLE(nls, - [ --disable-nls do not use Native Language Support], - USE_NLS=$enableval, USE_NLS=yes) - AC_MSG_RESULT($USE_NLS) - AC_SUBST(USE_NLS) - - USE_INCLUDED_LIBINTL=no - - dnl If we use NLS figure out what method - if test "$USE_NLS" = "yes"; then - AC_DEFINE(ENABLE_NLS) - AC_MSG_CHECKING([whether included gettext is requested]) - AC_ARG_WITH(included-gettext, - [ --with-included-gettext use the GNU gettext library included here], - nls_cv_force_use_gnu_gettext=$withval, - nls_cv_force_use_gnu_gettext=no) - AC_MSG_RESULT($nls_cv_force_use_gnu_gettext) - - nls_cv_use_gnu_gettext="$nls_cv_force_use_gnu_gettext" - if test "$nls_cv_force_use_gnu_gettext" != "yes"; then - dnl User does not insist on using GNU NLS library. Figure out what - dnl to use. If gettext or catgets are available (in this order) we - dnl use this. Else we have to fall back to GNU NLS library. - dnl catgets is only used if permitted by option --with-catgets. - nls_cv_header_intl= - nls_cv_header_libgt= - CATOBJEXT=NONE - - AC_CHECK_HEADER(libintl.h, - [AC_CACHE_CHECK([for gettext in libc], gt_cv_func_gettext_libc, - [AC_TRY_LINK([#include ], [return (int) gettext ("")], - gt_cv_func_gettext_libc=yes, gt_cv_func_gettext_libc=no)]) - - if test "$gt_cv_func_gettext_libc" != "yes"; then - AC_CHECK_LIB(intl, bindtextdomain, - [AC_CACHE_CHECK([for gettext in libintl], - gt_cv_func_gettext_libintl, - [AC_TRY_LINK([], [return (int) gettext ("")], - gt_cv_func_gettext_libintl=yes, - gt_cv_func_gettext_libintl=no)])]) - fi - - if test "$gt_cv_func_gettext_libc" = "yes" \ - || test "$gt_cv_func_gettext_libintl" = "yes"; then - AC_DEFINE(HAVE_GETTEXT) - AM_PATH_PROG_WITH_TEST(MSGFMT, msgfmt, - [test -z "`$ac_dir/$ac_word -h 2>&1 | grep 'dv '`"], no)dnl - if test "$MSGFMT" != "no"; then - AC_CHECK_FUNCS(dcgettext) - AC_PATH_PROG(GMSGFMT, gmsgfmt, $MSGFMT) - AM_PATH_PROG_WITH_TEST(XGETTEXT, xgettext, - [test -z "`$ac_dir/$ac_word -h 2>&1 | grep '(HELP)'`"], :) - AC_TRY_LINK(, [extern int _nl_msg_cat_cntr; - return _nl_msg_cat_cntr], - [CATOBJEXT=.gmo - DATADIRNAME=share], - [CATOBJEXT=.mo - DATADIRNAME=lib]) - INSTOBJEXT=.mo - fi - fi - ]) - - dnl In the standard gettext, we would now check for catgets. - dnl However, we never want to use catgets for our releases. - - if test "$CATOBJEXT" = "NONE"; then - dnl Neither gettext nor catgets in included in the C library. - dnl Fall back on GNU gettext library. - nls_cv_use_gnu_gettext=yes - fi - fi - - if test "$nls_cv_use_gnu_gettext" = "yes"; then - dnl Mark actions used to generate GNU NLS library. - INTLOBJS="\$(GETTOBJS)" - AM_PATH_PROG_WITH_TEST(MSGFMT, msgfmt, - [test -z "`$ac_dir/$ac_word -h 2>&1 | grep 'dv '`"], msgfmt) - AC_PATH_PROG(GMSGFMT, gmsgfmt, $MSGFMT) - AM_PATH_PROG_WITH_TEST(XGETTEXT, xgettext, - [test -z "`$ac_dir/$ac_word -h 2>&1 | grep '(HELP)'`"], :) - AC_SUBST(MSGFMT) - USE_INCLUDED_LIBINTL=yes - CATOBJEXT=.gmo - INSTOBJEXT=.mo - DATADIRNAME=share - INTLDEPS='$(top_builddir)/../intl/libintl.a' - INTLLIBS=$INTLDEPS - LIBS=`echo $LIBS | sed -e 's/-lintl//'` - nls_cv_header_intl=libintl.h - nls_cv_header_libgt=libgettext.h - fi - - dnl Test whether we really found GNU xgettext. - if test "$XGETTEXT" != ":"; then - dnl If it is no GNU xgettext we define it as : so that the - dnl Makefiles still can work. - if $XGETTEXT --omit-header /dev/null 2> /dev/null; then - : ; - else - AC_MSG_RESULT( - [found xgettext programs is not GNU xgettext; ignore it]) - XGETTEXT=":" - fi - fi - - # We need to process the po/ directory. - POSUB=po - else - DATADIRNAME=share - nls_cv_header_intl=libintl.h - nls_cv_header_libgt=libgettext.h - fi - - # If this is used in GNU gettext we have to set USE_NLS to `yes' - # because some of the sources are only built for this goal. - if test "$PACKAGE" = gettext; then - USE_NLS=yes - USE_INCLUDED_LIBINTL=yes - fi - - dnl These rules are solely for the distribution goal. While doing this - dnl we only have to keep exactly one list of the available catalogs - dnl in configure.in. - for lang in $ALL_LINGUAS; do - GMOFILES="$GMOFILES $lang.gmo" - POFILES="$POFILES $lang.po" - done - - dnl Make all variables we use known to autoconf. - AC_SUBST(USE_INCLUDED_LIBINTL) - AC_SUBST(CATALOGS) - AC_SUBST(CATOBJEXT) - AC_SUBST(DATADIRNAME) - AC_SUBST(GMOFILES) - AC_SUBST(INSTOBJEXT) - AC_SUBST(INTLDEPS) - AC_SUBST(INTLLIBS) - AC_SUBST(INTLOBJS) - AC_SUBST(POFILES) - AC_SUBST(POSUB) - ]) - -AC_DEFUN(CY_GNU_GETTEXT, - [AC_REQUIRE([AC_PROG_MAKE_SET])dnl - AC_REQUIRE([AC_PROG_CC])dnl - AC_REQUIRE([AC_PROG_RANLIB])dnl - AC_REQUIRE([AC_ISC_POSIX])dnl - AC_REQUIRE([AC_HEADER_STDC])dnl - AC_REQUIRE([AC_C_CONST])dnl - AC_REQUIRE([AC_C_INLINE])dnl - AC_REQUIRE([AC_TYPE_OFF_T])dnl - AC_REQUIRE([AC_TYPE_SIZE_T])dnl - AC_REQUIRE([AC_FUNC_ALLOCA])dnl - AC_REQUIRE([AC_FUNC_MMAP])dnl - - AC_CHECK_HEADERS([argz.h limits.h locale.h nl_types.h malloc.h string.h \ -unistd.h values.h sys/param.h]) - AC_CHECK_FUNCS([getcwd munmap putenv setenv setlocale strchr strcasecmp \ -__argz_count __argz_stringify __argz_next]) - - if test "${ac_cv_func_stpcpy+set}" != "set"; then - AC_CHECK_FUNCS(stpcpy) - fi - if test "${ac_cv_func_stpcpy}" = "yes"; then - AC_DEFINE(HAVE_STPCPY) - fi - - AM_LC_MESSAGES - CY_WITH_NLS - - if test "x$CATOBJEXT" != "x"; then - if test "x$ALL_LINGUAS" = "x"; then - LINGUAS= - else - AC_MSG_CHECKING(for catalogs to be installed) - NEW_LINGUAS= - for lang in ${LINGUAS=$ALL_LINGUAS}; do - case "$ALL_LINGUAS" in - *$lang*) NEW_LINGUAS="$NEW_LINGUAS $lang" ;; - esac - done - LINGUAS=$NEW_LINGUAS - AC_MSG_RESULT($LINGUAS) - fi - - dnl Construct list of names of catalog files to be constructed. - if test -n "$LINGUAS"; then - for lang in $LINGUAS; do CATALOGS="$CATALOGS $lang$CATOBJEXT"; done - fi - fi - - dnl The reference to in the installed file - dnl must be resolved because we cannot expect the users of this - dnl to define HAVE_LOCALE_H. - if test $ac_cv_header_locale_h = yes; then - INCLUDE_LOCALE_H="#include " - else - INCLUDE_LOCALE_H="\ -/* The system does not provide the header . Take care yourself. */" - fi - AC_SUBST(INCLUDE_LOCALE_H) - - dnl Determine which catalog format we have (if any is needed) - dnl For now we know about two different formats: - dnl Linux libc-5 and the normal X/Open format - if test -f $srcdir/po2tbl.sed.in; then - if test "$CATOBJEXT" = ".cat"; then - AC_CHECK_HEADER(linux/version.h, msgformat=linux, msgformat=xopen) - - dnl Transform the SED scripts while copying because some dumb SEDs - dnl cannot handle comments. - sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed - fi - dnl po2tbl.sed is always needed. - sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \ - $srcdir/po2tbl.sed.in > po2tbl.sed - fi - - dnl In the intl/Makefile.in we have a special dependency which makes - dnl only sense for gettext. We comment this out for non-gettext - dnl packages. - if test "$PACKAGE" = "gettext"; then - GT_NO="#NO#" - GT_YES= - else - GT_NO= - GT_YES="#YES#" - fi - AC_SUBST(GT_NO) - AC_SUBST(GT_YES) - - MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs" - AC_SUBST(MKINSTALLDIRS) - - dnl *** For now the libtool support in intl/Makefile is not for real. - l= - AC_SUBST(l) - - dnl Generate list of files to be processed by xgettext which will - dnl be included in po/Makefile. But only do this if the po directory - dnl exists in srcdir. - if test -d $srcdir/po; then - test -d po || mkdir po - if test "x$srcdir" != "x."; then - if test "x`echo $srcdir | sed 's@/.*@@'`" = "x"; then - posrcprefix="$srcdir/" - else - posrcprefix="../$srcdir/" - fi - else - posrcprefix="../" - fi - rm -f po/POTFILES - sed -e "/^#/d" -e "/^\$/d" -e "s,.*, $posrcprefix& \\\\," -e "\$s/\(.*\) \\\\/\1/" \ - < $srcdir/po/POTFILES.in > po/POTFILES - fi - ]) - -# Search path for a program which passes the given test. -# Ulrich Drepper , 1996. -# -# This file file be copied and used freely without restrictions. It can -# be used in projects which are not available under the GNU Public License -# but which still want to provide support for the GNU gettext functionality. -# Please note that the actual code is *not* freely available. - -# serial 1 - -dnl AM_PATH_PROG_WITH_TEST(VARIABLE, PROG-TO-CHECK-FOR, -dnl TEST-PERFORMED-ON-FOUND_PROGRAM [, VALUE-IF-NOT-FOUND [, PATH]]) -AC_DEFUN(AM_PATH_PROG_WITH_TEST, -[# Extract the first word of "$2", so it can be a program name with args. -set dummy $2; ac_word=[$]2 -AC_MSG_CHECKING([for $ac_word]) -AC_CACHE_VAL(ac_cv_path_$1, -[case "[$]$1" in - /*) - ac_cv_path_$1="[$]$1" # Let the user override the test with a path. - ;; - *) - IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:" - for ac_dir in ifelse([$5], , $PATH, [$5]); do - test -z "$ac_dir" && ac_dir=. - if test -f $ac_dir/$ac_word; then - if [$3]; then - ac_cv_path_$1="$ac_dir/$ac_word" - break - fi - fi - done - IFS="$ac_save_ifs" -dnl If no 4th arg is given, leave the cache variable unset, -dnl so AC_PATH_PROGS will keep looking. -ifelse([$4], , , [ test -z "[$]ac_cv_path_$1" && ac_cv_path_$1="$4" -])dnl - ;; -esac])dnl -$1="$ac_cv_path_$1" -if test -n "[$]$1"; then - AC_MSG_RESULT([$]$1) -else - AC_MSG_RESULT(no) -fi -AC_SUBST($1)dnl -]) - -# Check whether LC_MESSAGES is available in . -# Ulrich Drepper , 1995. -# -# This file file be copied and used freely without restrictions. It can -# be used in projects which are not available under the GNU Public License -# but which still want to provide support for the GNU gettext functionality. -# Please note that the actual code is *not* freely available. - -# serial 1 - -AC_DEFUN(AM_LC_MESSAGES, - [if test $ac_cv_header_locale_h = yes; then - AC_CACHE_CHECK([for LC_MESSAGES], am_cv_val_LC_MESSAGES, - [AC_TRY_LINK([#include ], [return LC_MESSAGES], - am_cv_val_LC_MESSAGES=yes, am_cv_val_LC_MESSAGES=no)]) - if test $am_cv_val_LC_MESSAGES = yes; then - AC_DEFINE(HAVE_LC_MESSAGES) - fi - fi]) - diff --git a/intl/bindtextdom.c b/intl/bindtextdom.c deleted file mode 100644 index 42b87d297b8..00000000000 --- a/intl/bindtextdom.c +++ /dev/null @@ -1,203 +0,0 @@ -/* Implementation of the bindtextdomain(3) function - Copyright (C) 1995, 1996, 1997, 1998 Free Software Foundation, Inc. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software Foundation, - Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ - -#ifdef HAVE_CONFIG_H -# include -#endif - -#if defined STDC_HEADERS || defined _LIBC -# include -#else -# ifdef HAVE_MALLOC_H -# include -# else -void free (); -# endif -#endif - -#if defined HAVE_STRING_H || defined _LIBC -# include -#else -# include -# ifndef memcpy -# define memcpy(Dst, Src, Num) bcopy (Src, Dst, Num) -# endif -#endif - -#ifdef _LIBC -# include -#else -# include "libgettext.h" -#endif -#include "gettext.h" -#include "gettextP.h" - -/* @@ end of prolog @@ */ - -/* Contains the default location of the message catalogs. */ -extern const char _nl_default_dirname[]; - -/* List with bindings of specific domains. */ -extern struct binding *_nl_domain_bindings; - - -/* Names for the libintl functions are a problem. They must not clash - with existing names and they should follow ANSI C. But this source - code is also used in GNU C Library where the names have a __ - prefix. So we have to make a difference here. */ -#ifdef _LIBC -# define BINDTEXTDOMAIN __bindtextdomain -# ifndef strdup -# define strdup(str) __strdup (str) -# endif -#else -# define BINDTEXTDOMAIN bindtextdomain__ -#endif - -/* Specify that the DOMAINNAME message catalog will be found - in DIRNAME rather than in the system locale data base. */ -char * -BINDTEXTDOMAIN (domainname, dirname) - const char *domainname; - const char *dirname; -{ - struct binding *binding; - - /* Some sanity checks. */ - if (domainname == NULL || domainname[0] == '\0') - return NULL; - - for (binding = _nl_domain_bindings; binding != NULL; binding = binding->next) - { - int compare = strcmp (domainname, binding->domainname); - if (compare == 0) - /* We found it! */ - break; - if (compare < 0) - { - /* It is not in the list. */ - binding = NULL; - break; - } - } - - if (dirname == NULL) - /* The current binding has be to returned. */ - return binding == NULL ? (char *) _nl_default_dirname : binding->dirname; - - if (binding != NULL) - { - /* The domain is already bound. If the new value and the old - one are equal we simply do nothing. Otherwise replace the - old binding. */ - if (strcmp (dirname, binding->dirname) != 0) - { - char *new_dirname; - - if (strcmp (dirname, _nl_default_dirname) == 0) - new_dirname = (char *) _nl_default_dirname; - else - { -#if defined _LIBC || defined HAVE_STRDUP - new_dirname = strdup (dirname); - if (new_dirname == NULL) - return NULL; -#else - size_t len = strlen (dirname) + 1; - new_dirname = (char *) malloc (len); - if (new_dirname == NULL) - return NULL; - - memcpy (new_dirname, dirname, len); -#endif - } - - if (binding->dirname != _nl_default_dirname) - free (binding->dirname); - - binding->dirname = new_dirname; - } - } - else - { - /* We have to create a new binding. */ -#if !defined _LIBC && !defined HAVE_STRDUP - size_t len; -#endif - struct binding *new_binding = - (struct binding *) malloc (sizeof (*new_binding)); - - if (new_binding == NULL) - return NULL; - -#if defined _LIBC || defined HAVE_STRDUP - new_binding->domainname = strdup (domainname); - if (new_binding->domainname == NULL) - return NULL; -#else - len = strlen (domainname) + 1; - new_binding->domainname = (char *) malloc (len); - if (new_binding->domainname == NULL) - return NULL; - memcpy (new_binding->domainname, domainname, len); -#endif - - if (strcmp (dirname, _nl_default_dirname) == 0) - new_binding->dirname = (char *) _nl_default_dirname; - else - { -#if defined _LIBC || defined HAVE_STRDUP - new_binding->dirname = strdup (dirname); - if (new_binding->dirname == NULL) - return NULL; -#else - len = strlen (dirname) + 1; - new_binding->dirname = (char *) malloc (len); - if (new_binding->dirname == NULL) - return NULL; - memcpy (new_binding->dirname, dirname, len); -#endif - } - - /* Now enqueue it. */ - if (_nl_domain_bindings == NULL - || strcmp (domainname, _nl_domain_bindings->domainname) < 0) - { - new_binding->next = _nl_domain_bindings; - _nl_domain_bindings = new_binding; - } - else - { - binding = _nl_domain_bindings; - while (binding->next != NULL - && strcmp (domainname, binding->next->domainname) > 0) - binding = binding->next; - - new_binding->next = binding->next; - binding->next = new_binding; - } - - binding = new_binding; - } - - return binding->dirname; -} - -#ifdef _LIBC -/* Alias for function name in GNU C Library. */ -weak_alias (__bindtextdomain, bindtextdomain); -#endif diff --git a/intl/cat-compat.c b/intl/cat-compat.c deleted file mode 100644 index be4afff87b5..00000000000 --- a/intl/cat-compat.c +++ /dev/null @@ -1,262 +0,0 @@ -/* Compatibility code for gettext-using-catgets interface. - Copyright (C) 1995, 1997 Free Software Foundation, Inc. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software Foundation, - Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ - -#ifdef HAVE_CONFIG_H -# include -#endif - -#include - -#ifdef STDC_HEADERS -# include -# include -#else -char *getenv (); -# ifdef HAVE_MALLOC_H -# include -# endif -#endif - -#ifdef HAVE_NL_TYPES_H -# include -#endif - -#include "libgettext.h" - -/* @@ end of prolog @@ */ - -/* XPG3 defines the result of `setlocale (category, NULL)' as: - ``Directs `setlocale()' to query `category' and return the current - setting of `local'.'' - However it does not specify the exact format. And even worse: POSIX - defines this not at all. So we can use this feature only on selected - system (e.g. those using GNU C Library). */ -#ifdef _LIBC -# define HAVE_LOCALE_NULL -#endif - -/* The catalog descriptor. */ -static nl_catd catalog = (nl_catd) -1; - -/* Name of the default catalog. */ -static const char default_catalog_name[] = "messages"; - -/* Name of currently used catalog. */ -static const char *catalog_name = default_catalog_name; - -/* Get ID for given string. If not found return -1. */ -static int msg_to_cat_id PARAMS ((const char *msg)); - -/* Substitution for systems lacking this function in their C library. */ -#if !_LIBC && !HAVE_STPCPY -static char *stpcpy PARAMS ((char *dest, const char *src)); -#endif - - -/* Set currently used domain/catalog. */ -char * -textdomain (domainname) - const char *domainname; -{ - nl_catd new_catalog; - char *new_name; - size_t new_name_len; - char *lang; - -#if defined HAVE_SETLOCALE && defined HAVE_LC_MESSAGES \ - && defined HAVE_LOCALE_NULL - lang = setlocale (LC_MESSAGES, NULL); -#else - lang = getenv ("LC_ALL"); - if (lang == NULL || lang[0] == '\0') - { - lang = getenv ("LC_MESSAGES"); - if (lang == NULL || lang[0] == '\0') - lang = getenv ("LANG"); - } -#endif - if (lang == NULL || lang[0] == '\0') - lang = "C"; - - /* See whether name of currently used domain is asked. */ - if (domainname == NULL) - return (char *) catalog_name; - - if (domainname[0] == '\0') - domainname = default_catalog_name; - - /* Compute length of added path element. */ - new_name_len = sizeof (LOCALEDIR) - 1 + 1 + strlen (lang) - + sizeof ("/LC_MESSAGES/") - 1 + sizeof (PACKAGE) - 1 - + sizeof (".cat"); - - new_name = (char *) malloc (new_name_len); - if (new_name == NULL) - return NULL; - - strcpy (new_name, PACKAGE); - new_catalog = catopen (new_name, 0); - - if (new_catalog == (nl_catd) -1) - { - /* NLSPATH search didn't work, try absolute path */ - sprintf (new_name, "%s/%s/LC_MESSAGES/%s.cat", LOCALEDIR, lang, - PACKAGE); - new_catalog = catopen (new_name, 0); - - if (new_catalog == (nl_catd) -1) - { - free (new_name); - return (char *) catalog_name; - } - } - - /* Close old catalog. */ - if (catalog != (nl_catd) -1) - catclose (catalog); - if (catalog_name != default_catalog_name) - free ((char *) catalog_name); - - catalog = new_catalog; - catalog_name = new_name; - - return (char *) catalog_name; -} - -char * -bindtextdomain (domainname, dirname) - const char *domainname; - const char *dirname; -{ -#if HAVE_SETENV || HAVE_PUTENV - char *old_val, *new_val, *cp; - size_t new_val_len; - - /* This does not make much sense here but to be compatible do it. */ - if (domainname == NULL) - return NULL; - - /* Compute length of added path element. If we use setenv we don't need - the first byts for NLSPATH=, but why complicate the code for this - peanuts. */ - new_val_len = sizeof ("NLSPATH=") - 1 + strlen (dirname) - + sizeof ("/%L/LC_MESSAGES/%N.cat"); - - old_val = getenv ("NLSPATH"); - if (old_val == NULL || old_val[0] == '\0') - { - old_val = NULL; - new_val_len += 1 + sizeof (LOCALEDIR) - 1 - + sizeof ("/%L/LC_MESSAGES/%N.cat"); - } - else - new_val_len += strlen (old_val); - - new_val = (char *) malloc (new_val_len); - if (new_val == NULL) - return NULL; - -# if HAVE_SETENV - cp = new_val; -# else - cp = stpcpy (new_val, "NLSPATH="); -# endif - - cp = stpcpy (cp, dirname); - cp = stpcpy (cp, "/%L/LC_MESSAGES/%N.cat:"); - - if (old_val == NULL) - { -# if __STDC__ - stpcpy (cp, LOCALEDIR "/%L/LC_MESSAGES/%N.cat"); -# else - - cp = stpcpy (cp, LOCALEDIR); - stpcpy (cp, "/%L/LC_MESSAGES/%N.cat"); -# endif - } - else - stpcpy (cp, old_val); - -# if HAVE_SETENV - setenv ("NLSPATH", new_val, 1); - free (new_val); -# else - putenv (new_val); - /* Do *not* free the environment entry we just entered. It is used - from now on. */ -# endif - -#endif - - return (char *) domainname; -} - -#undef gettext -char * -gettext (msg) - const char *msg; -{ - int msgid; - - if (msg == NULL || catalog == (nl_catd) -1) - return (char *) msg; - - /* Get the message from the catalog. We always use set number 1. - The message ID is computed by the function `msg_to_cat_id' - which works on the table generated by `po-to-tbl'. */ - msgid = msg_to_cat_id (msg); - if (msgid == -1) - return (char *) msg; - - return catgets (catalog, 1, msgid, (char *) msg); -} - -/* Look through the table `_msg_tbl' which has `_msg_tbl_length' entries - for the one equal to msg. If it is found return the ID. In case when - the string is not found return -1. */ -static int -msg_to_cat_id (msg) - const char *msg; -{ - int cnt; - - for (cnt = 0; cnt < _msg_tbl_length; ++cnt) - if (strcmp (msg, _msg_tbl[cnt]._msg) == 0) - return _msg_tbl[cnt]._msg_number; - - return -1; -} - - -/* @@ begin of epilog @@ */ - -/* We don't want libintl.a to depend on any other library. So we - avoid the non-standard function stpcpy. In GNU C Library this - function is available, though. Also allow the symbol HAVE_STPCPY - to be defined. */ -#if !_LIBC && !HAVE_STPCPY -static char * -stpcpy (dest, src) - char *dest; - const char *src; -{ - while ((*dest++ = *src++) != '\0') - /* Do nothing. */ ; - return dest - 1; -} -#endif diff --git a/intl/config.in b/intl/config.in deleted file mode 100644 index 8a9049b80de..00000000000 --- a/intl/config.in +++ /dev/null @@ -1,128 +0,0 @@ -/* config.in. Generated automatically from configure.in by autoheader. */ - -/* Define if using alloca.c. */ -#undef C_ALLOCA - -/* Define to empty if the keyword does not work. */ -#undef const - -/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems. - This function is required for alloca.c support on those systems. */ -#undef CRAY_STACKSEG_END - -/* Define if you have alloca, as a function or macro. */ -#undef HAVE_ALLOCA - -/* Define if you have and it should be used (not on Ultrix). */ -#undef HAVE_ALLOCA_H - -/* Define if you have a working `mmap' system call. */ -#undef HAVE_MMAP - -/* Define as __inline if that's what the C compiler calls it. */ -#undef inline - -/* Define to `long' if doesn't define. */ -#undef off_t - -/* Define if you need to in order for stat and other things to work. */ -#undef _POSIX_SOURCE - -/* Define to `unsigned' if doesn't define. */ -#undef size_t - -/* If using the C implementation of alloca, define if you know the - direction of stack growth for your system; otherwise it will be - automatically deduced at run-time. - STACK_DIRECTION > 0 => grows toward higher addresses - STACK_DIRECTION < 0 => grows toward lower addresses - STACK_DIRECTION = 0 => direction of growth unknown - */ -#undef STACK_DIRECTION - -/* Define if you have the ANSI C header files. */ -#undef STDC_HEADERS - -/* Define to 1 if NLS is requested. */ -#undef ENABLE_NLS - -/* Define as 1 if you have catgets and don't want to use GNU gettext. */ -#undef HAVE_CATGETS - -/* Define as 1 if you have gettext and don't want to use GNU gettext. */ -#undef HAVE_GETTEXT - -/* Define as 1 if you have the stpcpy function. */ -#undef HAVE_STPCPY - -/* Define if your locale.h file contains LC_MESSAGES. */ -#undef HAVE_LC_MESSAGES - -/* Define if you have the __argz_count function. */ -#undef HAVE___ARGZ_COUNT - -/* Define if you have the __argz_next function. */ -#undef HAVE___ARGZ_NEXT - -/* Define if you have the __argz_stringify function. */ -#undef HAVE___ARGZ_STRINGIFY - -/* Define if you have the dcgettext function. */ -#undef HAVE_DCGETTEXT - -/* Define if you have the getcwd function. */ -#undef HAVE_GETCWD - -/* Define if you have the getpagesize function. */ -#undef HAVE_GETPAGESIZE - -/* Define if you have the munmap function. */ -#undef HAVE_MUNMAP - -/* Define if you have the putenv function. */ -#undef HAVE_PUTENV - -/* Define if you have the setenv function. */ -#undef HAVE_SETENV - -/* Define if you have the setlocale function. */ -#undef HAVE_SETLOCALE - -/* Define if you have the stpcpy function. */ -#undef HAVE_STPCPY - -/* Define if you have the strcasecmp function. */ -#undef HAVE_STRCASECMP - -/* Define if you have the strchr function. */ -#undef HAVE_STRCHR - -/* Define if you have the header file. */ -#undef HAVE_ARGZ_H - -/* Define if you have the header file. */ -#undef HAVE_LIMITS_H - -/* Define if you have the header file. */ -#undef HAVE_LOCALE_H - -/* Define if you have the header file. */ -#undef HAVE_MALLOC_H - -/* Define if you have the header file. */ -#undef HAVE_NL_TYPES_H - -/* Define if you have the header file. */ -#undef HAVE_STRING_H - -/* Define if you have the header file. */ -#undef HAVE_SYS_PARAM_H - -/* Define if you have the header file. */ -#undef HAVE_UNISTD_H - -/* Define if you have the header file. */ -#undef HAVE_VALUES_H - -/* Define if you have the i library (-li). */ -#undef HAVE_LIBI diff --git a/intl/configure b/intl/configure deleted file mode 100755 index 341eea019ae..00000000000 --- a/intl/configure +++ /dev/null @@ -1,2950 +0,0 @@ -#! /bin/sh - -# Guess values for system-dependent variables and create Makefiles. -# Generated automatically using autoconf version 2.12.1 -# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc. -# -# This configure script is free software; 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See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software Foundation, - Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ - -#ifdef HAVE_CONFIG_H -# include -#endif - -#include - -#ifdef __GNUC__ -# define alloca __builtin_alloca -# define HAVE_ALLOCA 1 -#else -# if defined HAVE_ALLOCA_H || defined _LIBC -# include -# else -# ifdef _AIX - #pragma alloca -# else -# ifndef alloca -char *alloca (); -# endif -# endif -# endif -#endif - -#include -#ifndef errno -extern int errno; -#endif -#ifndef __set_errno -# define __set_errno(val) errno = (val) -#endif - -#if defined STDC_HEADERS || defined _LIBC -# include -#else -char *getenv (); -# ifdef HAVE_MALLOC_H -# include -# else -void free (); -# endif -#endif - -#if defined HAVE_STRING_H || defined _LIBC -# ifndef _GNU_SOURCE -# define _GNU_SOURCE 1 -# endif -# include -#else -# include -#endif -#if !HAVE_STRCHR && !defined _LIBC -# ifndef strchr -# define strchr index -# endif -#endif - -#if defined HAVE_UNISTD_H || defined _LIBC -# include -#endif - -#include "gettext.h" -#include "gettextP.h" -#ifdef _LIBC -# include -#else -# include "libgettext.h" -#endif -#include "hash-string.h" - -/* @@ end of prolog @@ */ - -#ifdef _LIBC -/* Rename the non ANSI C functions. This is required by the standard - because some ANSI C functions will require linking with this object - file and the name space must not be polluted. */ -# define getcwd __getcwd -# ifndef stpcpy -# define stpcpy __stpcpy -# endif -#else -# if !defined HAVE_GETCWD -char *getwd (); -# define getcwd(buf, max) getwd (buf) -# else -char *getcwd (); -# endif -# ifndef HAVE_STPCPY -static char *stpcpy PARAMS ((char *dest, const char *src)); -# endif -#endif - -/* Amount to increase buffer size by in each try. */ -#define PATH_INCR 32 - -/* The following is from pathmax.h. */ -/* Non-POSIX BSD systems might have gcc's limits.h, which doesn't define - PATH_MAX but might cause redefinition warnings when sys/param.h is - later included (as on MORE/BSD 4.3). */ -#if defined(_POSIX_VERSION) || (defined(HAVE_LIMITS_H) && !defined(__GNUC__)) -# include -#endif - -#ifndef _POSIX_PATH_MAX -# define _POSIX_PATH_MAX 255 -#endif - -#if !defined(PATH_MAX) && defined(_PC_PATH_MAX) -# define PATH_MAX (pathconf ("/", _PC_PATH_MAX) < 1 ? 1024 : pathconf ("/", _PC_PATH_MAX)) -#endif - -/* Don't include sys/param.h if it already has been. */ -#if defined(HAVE_SYS_PARAM_H) && !defined(PATH_MAX) && !defined(MAXPATHLEN) -# include -#endif - -#if !defined(PATH_MAX) && defined(MAXPATHLEN) -# define PATH_MAX MAXPATHLEN -#endif - -#ifndef PATH_MAX -# define PATH_MAX _POSIX_PATH_MAX -#endif - -/* XPG3 defines the result of `setlocale (category, NULL)' as: - ``Directs `setlocale()' to query `category' and return the current - setting of `local'.'' - However it does not specify the exact format. And even worse: POSIX - defines this not at all. So we can use this feature only on selected - system (e.g. those using GNU C Library). */ -#ifdef _LIBC -# define HAVE_LOCALE_NULL -#endif - -/* Name of the default domain used for gettext(3) prior any call to - textdomain(3). The default value for this is "messages". */ -const char _nl_default_default_domain[] = "messages"; - -/* Value used as the default domain for gettext(3). */ -const char *_nl_current_default_domain = _nl_default_default_domain; - -/* Contains the default location of the message catalogs. */ -const char _nl_default_dirname[] = GNULOCALEDIR; - -/* List with bindings of specific domains created by bindtextdomain() - calls. */ -struct binding *_nl_domain_bindings; - -/* Prototypes for local functions. */ -static char *find_msg PARAMS ((struct loaded_l10nfile *domain_file, - const char *msgid)) internal_function; -static const char *category_to_name PARAMS ((int category)) internal_function; -static const char *guess_category_value PARAMS ((int category, - const char *categoryname)) - internal_function; - - -/* For those loosing systems which don't have `alloca' we have to add - some additional code emulating it. */ -#ifdef HAVE_ALLOCA -/* Nothing has to be done. */ -# define ADD_BLOCK(list, address) /* nothing */ -# define FREE_BLOCKS(list) /* nothing */ -#else -struct block_list -{ - void *address; - struct block_list *next; -}; -# define ADD_BLOCK(list, addr) \ - do { \ - struct block_list *newp = (struct block_list *) malloc (sizeof (*newp)); \ - /* If we cannot get a free block we cannot add the new element to \ - the list. */ \ - if (newp != NULL) { \ - newp->address = (addr); \ - newp->next = (list); \ - (list) = newp; \ - } \ - } while (0) -# define FREE_BLOCKS(list) \ - do { \ - while (list != NULL) { \ - struct block_list *old = list; \ - list = list->next; \ - free (old); \ - } \ - } while (0) -# undef alloca -# define alloca(size) (malloc (size)) -#endif /* have alloca */ - - -/* Names for the libintl functions are a problem. They must not clash - with existing names and they should follow ANSI C. But this source - code is also used in GNU C Library where the names have a __ - prefix. So we have to make a difference here. */ -#ifdef _LIBC -# define DCGETTEXT __dcgettext -#else -# define DCGETTEXT dcgettext__ -#endif - -/* Look up MSGID in the DOMAINNAME message catalog for the current CATEGORY - locale. */ -char * -DCGETTEXT (domainname, msgid, category) - const char *domainname; - const char *msgid; - int category; -{ -#ifndef HAVE_ALLOCA - struct block_list *block_list = NULL; -#endif - struct loaded_l10nfile *domain; - struct binding *binding; - const char *categoryname; - const char *categoryvalue; - char *dirname, *xdomainname; - char *single_locale; - char *retval; - int saved_errno = errno; - - /* If no real MSGID is given return NULL. */ - if (msgid == NULL) - return NULL; - - /* If DOMAINNAME is NULL, we are interested in the default domain. If - CATEGORY is not LC_MESSAGES this might not make much sense but the - defintion left this undefined. */ - if (domainname == NULL) - domainname = _nl_current_default_domain; - - /* First find matching binding. */ - for (binding = _nl_domain_bindings; binding != NULL; binding = binding->next) - { - int compare = strcmp (domainname, binding->domainname); - if (compare == 0) - /* We found it! */ - break; - if (compare < 0) - { - /* It is not in the list. */ - binding = NULL; - break; - } - } - - if (binding == NULL) - dirname = (char *) _nl_default_dirname; - else if (binding->dirname[0] == '/') - dirname = binding->dirname; - else - { - /* We have a relative path. Make it absolute now. */ - size_t dirname_len = strlen (binding->dirname) + 1; - size_t path_max; - char *ret; - - path_max = (unsigned) PATH_MAX; - path_max += 2; /* The getcwd docs say to do this. */ - - dirname = (char *) alloca (path_max + dirname_len); - ADD_BLOCK (block_list, dirname); - - __set_errno (0); - while ((ret = getcwd (dirname, path_max)) == NULL && errno == ERANGE) - { - path_max += PATH_INCR; - dirname = (char *) alloca (path_max + dirname_len); - ADD_BLOCK (block_list, dirname); - __set_errno (0); - } - - if (ret == NULL) - { - /* We cannot get the current working directory. Don't signal an - error but simply return the default string. */ - FREE_BLOCKS (block_list); - __set_errno (saved_errno); - return (char *) msgid; - } - - stpcpy (stpcpy (strchr (dirname, '\0'), "/"), binding->dirname); - } - - /* Now determine the symbolic name of CATEGORY and its value. */ - categoryname = category_to_name (category); - categoryvalue = guess_category_value (category, categoryname); - - xdomainname = (char *) alloca (strlen (categoryname) - + strlen (domainname) + 5); - ADD_BLOCK (block_list, xdomainname); - - stpcpy (stpcpy (stpcpy (stpcpy (xdomainname, categoryname), "/"), - domainname), - ".mo"); - - /* Creating working area. */ - single_locale = (char *) alloca (strlen (categoryvalue) + 1); - ADD_BLOCK (block_list, single_locale); - - - /* Search for the given string. This is a loop because we perhaps - got an ordered list of languages to consider for th translation. */ - while (1) - { - /* Make CATEGORYVALUE point to the next element of the list. */ - while (categoryvalue[0] != '\0' && categoryvalue[0] == ':') - ++categoryvalue; - if (categoryvalue[0] == '\0') - { - /* The whole contents of CATEGORYVALUE has been searched but - no valid entry has been found. We solve this situation - by implicitly appending a "C" entry, i.e. no translation - will take place. */ - single_locale[0] = 'C'; - single_locale[1] = '\0'; - } - else - { - char *cp = single_locale; - while (categoryvalue[0] != '\0' && categoryvalue[0] != ':') - *cp++ = *categoryvalue++; - *cp = '\0'; - } - - /* If the current locale value is C (or POSIX) we don't load a - domain. Return the MSGID. */ - if (strcmp (single_locale, "C") == 0 - || strcmp (single_locale, "POSIX") == 0) - { - FREE_BLOCKS (block_list); - __set_errno (saved_errno); - return (char *) msgid; - } - - - /* Find structure describing the message catalog matching the - DOMAINNAME and CATEGORY. */ - domain = _nl_find_domain (dirname, single_locale, xdomainname); - - if (domain != NULL) - { - retval = find_msg (domain, msgid); - - if (retval == NULL) - { - int cnt; - - for (cnt = 0; domain->successor[cnt] != NULL; ++cnt) - { - retval = find_msg (domain->successor[cnt], msgid); - - if (retval != NULL) - break; - } - } - - if (retval != NULL) - { - FREE_BLOCKS (block_list); - __set_errno (saved_errno); - return retval; - } - } - } - /* NOTREACHED */ -} - -#ifdef _LIBC -/* Alias for function name in GNU C Library. */ -weak_alias (__dcgettext, dcgettext); -#endif - - -static char * -internal_function -find_msg (domain_file, msgid) - struct loaded_l10nfile *domain_file; - const char *msgid; -{ - size_t top, act, bottom; - struct loaded_domain *domain; - - if (domain_file->decided == 0) - _nl_load_domain (domain_file); - - if (domain_file->data == NULL) - return NULL; - - domain = (struct loaded_domain *) domain_file->data; - - /* Locate the MSGID and its translation. */ - if (domain->hash_size > 2 && domain->hash_tab != NULL) - { - /* Use the hashing table. */ - nls_uint32 len = strlen (msgid); - nls_uint32 hash_val = hash_string (msgid); - nls_uint32 idx = hash_val % domain->hash_size; - nls_uint32 incr = 1 + (hash_val % (domain->hash_size - 2)); - nls_uint32 nstr = W (domain->must_swap, domain->hash_tab[idx]); - - if (nstr == 0) - /* Hash table entry is empty. */ - return NULL; - - if (W (domain->must_swap, domain->orig_tab[nstr - 1].length) == len - && strcmp (msgid, - domain->data + W (domain->must_swap, - domain->orig_tab[nstr - 1].offset)) == 0) - return (char *) domain->data + W (domain->must_swap, - domain->trans_tab[nstr - 1].offset); - - while (1) - { - if (idx >= domain->hash_size - incr) - idx -= domain->hash_size - incr; - else - idx += incr; - - nstr = W (domain->must_swap, domain->hash_tab[idx]); - if (nstr == 0) - /* Hash table entry is empty. */ - return NULL; - - if (W (domain->must_swap, domain->orig_tab[nstr - 1].length) == len - && strcmp (msgid, - domain->data + W (domain->must_swap, - domain->orig_tab[nstr - 1].offset)) - == 0) - return (char *) domain->data - + W (domain->must_swap, domain->trans_tab[nstr - 1].offset); - } - /* NOTREACHED */ - } - - /* Now we try the default method: binary search in the sorted - array of messages. */ - bottom = 0; - top = domain->nstrings; - while (bottom < top) - { - int cmp_val; - - act = (bottom + top) / 2; - cmp_val = strcmp (msgid, domain->data - + W (domain->must_swap, - domain->orig_tab[act].offset)); - if (cmp_val < 0) - top = act; - else if (cmp_val > 0) - bottom = act + 1; - else - break; - } - - /* If an translation is found return this. */ - return bottom >= top ? NULL : (char *) domain->data - + W (domain->must_swap, - domain->trans_tab[act].offset); -} - - -/* Return string representation of locale CATEGORY. */ -static const char * -internal_function -category_to_name (category) - int category; -{ - const char *retval; - - switch (category) - { -#ifdef LC_COLLATE - case LC_COLLATE: - retval = "LC_COLLATE"; - break; -#endif -#ifdef LC_CTYPE - case LC_CTYPE: - retval = "LC_CTYPE"; - break; -#endif -#ifdef LC_MONETARY - case LC_MONETARY: - retval = "LC_MONETARY"; - break; -#endif -#ifdef LC_NUMERIC - case LC_NUMERIC: - retval = "LC_NUMERIC"; - break; -#endif -#ifdef LC_TIME - case LC_TIME: - retval = "LC_TIME"; - break; -#endif -#ifdef LC_MESSAGES - case LC_MESSAGES: - retval = "LC_MESSAGES"; - break; -#endif -#ifdef LC_RESPONSE - case LC_RESPONSE: - retval = "LC_RESPONSE"; - break; -#endif -#ifdef LC_ALL - case LC_ALL: - /* This might not make sense but is perhaps better than any other - value. */ - retval = "LC_ALL"; - break; -#endif - default: - /* If you have a better idea for a default value let me know. */ - retval = "LC_XXX"; - } - - return retval; -} - -/* Guess value of current locale from value of the environment variables. */ -static const char * -internal_function -guess_category_value (category, categoryname) - int category; - const char *categoryname; -{ - const char *retval; - - /* The highest priority value is the `LANGUAGE' environment - variable. This is a GNU extension. */ - retval = getenv ("LANGUAGE"); - if (retval != NULL && retval[0] != '\0') - return retval; - - /* `LANGUAGE' is not set. So we have to proceed with the POSIX - methods of looking to `LC_ALL', `LC_xxx', and `LANG'. On some - systems this can be done by the `setlocale' function itself. */ -#if defined HAVE_SETLOCALE && defined HAVE_LC_MESSAGES && defined HAVE_LOCALE_NULL - return setlocale (category, NULL); -#else - /* Setting of LC_ALL overwrites all other. */ - retval = getenv ("LC_ALL"); - if (retval != NULL && retval[0] != '\0') - return retval; - - /* Next comes the name of the desired category. */ - retval = getenv (categoryname); - if (retval != NULL && retval[0] != '\0') - return retval; - - /* Last possibility is the LANG environment variable. */ - retval = getenv ("LANG"); - if (retval != NULL && retval[0] != '\0') - return retval; - - /* We use C as the default domain. POSIX says this is implementation - defined. */ - return "C"; -#endif -} - -/* @@ begin of epilog @@ */ - -/* We don't want libintl.a to depend on any other library. So we - avoid the non-standard function stpcpy. In GNU C Library this - function is available, though. Also allow the symbol HAVE_STPCPY - to be defined. */ -#if !_LIBC && !HAVE_STPCPY -static char * -stpcpy (dest, src) - char *dest; - const char *src; -{ - while ((*dest++ = *src++) != '\0') - /* Do nothing. */ ; - return dest - 1; -} -#endif - - -#ifdef _LIBC -/* If we want to free all resources we have to do some work at - program's end. */ -static void __attribute__ ((unused)) -free_mem (void) -{ - struct binding *runp; - - for (runp = _nl_domain_bindings; runp != NULL; runp = runp->next) - { - free (runp->domainname); - if (runp->dirname != _nl_default_dirname) - /* Yes, this is a pointer comparison. */ - free (runp->dirname); - } - - if (_nl_current_default_domain != _nl_default_default_domain) - /* Yes, again a pointer comparison. */ - free ((char *) _nl_current_default_domain); -} - -text_set_element (__libc_subfreeres, free_mem); -#endif diff --git a/intl/dgettext.c b/intl/dgettext.c deleted file mode 100644 index e4a0cfdb6e0..00000000000 --- a/intl/dgettext.c +++ /dev/null @@ -1,59 +0,0 @@ -/* Implementation of the dgettext(3) function - Copyright (C) 1995, 1996, 1997 Free Software Foundation, Inc. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software Foundation, - Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ - -#ifdef HAVE_CONFIG_H -# include -#endif - -#if defined HAVE_LOCALE_H || defined _LIBC -# include -#endif - -#ifdef _LIBC -# include -#else -# include "libgettext.h" -#endif - -/* @@ end of prolog @@ */ - -/* Names for the libintl functions are a problem. They must not clash - with existing names and they should follow ANSI C. But this source - code is also used in GNU C Library where the names have a __ - prefix. So we have to make a difference here. */ -#ifdef _LIBC -# define DGETTEXT __dgettext -# define DCGETTEXT __dcgettext -#else -# define DGETTEXT dgettext__ -# define DCGETTEXT dcgettext__ -#endif - -/* Look up MSGID in the DOMAINNAME message catalog of the current - LC_MESSAGES locale. */ -char * -DGETTEXT (domainname, msgid) - const char *domainname; - const char *msgid; -{ - return DCGETTEXT (domainname, msgid, LC_MESSAGES); -} - -#ifdef _LIBC -/* Alias for function name in GNU C Library. */ -weak_alias (__dgettext, dgettext); -#endif diff --git a/intl/explodename.c b/intl/explodename.c deleted file mode 100644 index 5a911cee91b..00000000000 --- a/intl/explodename.c +++ /dev/null @@ -1,188 +0,0 @@ -/* Copyright (C) 1995, 1996, 1997, 1998 Free Software Foundation, Inc. - Contributed by Ulrich Drepper , 1995. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software Foundation, - Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ - -#ifdef HAVE_CONFIG_H -# include -#endif - -#if defined STDC_HEADERS || defined _LIBC -# include -#endif - -#if defined HAVE_STRING_H || defined _LIBC -# include -#else -# include -#endif -#include - -#include "loadinfo.h" - -/* On some strange systems still no definition of NULL is found. Sigh! */ -#ifndef NULL -# if defined __STDC__ && __STDC__ -# define NULL ((void *) 0) -# else -# define NULL 0 -# endif -#endif - -/* @@ end of prolog @@ */ - -int -_nl_explode_name (name, language, modifier, territory, codeset, - normalized_codeset, special, sponsor, revision) - char *name; - const char **language; - const char **modifier; - const char **territory; - const char **codeset; - const char **normalized_codeset; - const char **special; - const char **sponsor; - const char **revision; -{ - enum { undecided, xpg, cen } syntax; - char *cp; - int mask; - - *modifier = NULL; - *territory = NULL; - *codeset = NULL; - *normalized_codeset = NULL; - *special = NULL; - *sponsor = NULL; - *revision = NULL; - - /* Now we determine the single parts of the locale name. First - look for the language. Termination symbols are `_' and `@' if - we use XPG4 style, and `_', `+', and `,' if we use CEN syntax. */ - mask = 0; - syntax = undecided; - *language = cp = name; - while (cp[0] != '\0' && cp[0] != '_' && cp[0] != '@' - && cp[0] != '+' && cp[0] != ',') - ++cp; - - if (*language == cp) - /* This does not make sense: language has to be specified. Use - this entry as it is without exploding. Perhaps it is an alias. */ - cp = strchr (*language, '\0'); - else if (cp[0] == '_') - { - /* Next is the territory. */ - cp[0] = '\0'; - *territory = ++cp; - - while (cp[0] != '\0' && cp[0] != '.' && cp[0] != '@' - && cp[0] != '+' && cp[0] != ',' && cp[0] != '_') - ++cp; - - mask |= TERRITORY; - - if (cp[0] == '.') - { - /* Next is the codeset. */ - syntax = xpg; - cp[0] = '\0'; - *codeset = ++cp; - - while (cp[0] != '\0' && cp[0] != '@') - ++cp; - - mask |= XPG_CODESET; - - if (*codeset != cp && (*codeset)[0] != '\0') - { - *normalized_codeset = _nl_normalize_codeset (*codeset, - cp - *codeset); - if (strcmp (*codeset, *normalized_codeset) == 0) - free ((char *) *normalized_codeset); - else - mask |= XPG_NORM_CODESET; - } - } - } - - if (cp[0] == '@' || (syntax != xpg && cp[0] == '+')) - { - /* Next is the modifier. */ - syntax = cp[0] == '@' ? xpg : cen; - cp[0] = '\0'; - *modifier = ++cp; - - while (syntax == cen && cp[0] != '\0' && cp[0] != '+' - && cp[0] != ',' && cp[0] != '_') - ++cp; - - mask |= XPG_MODIFIER | CEN_AUDIENCE; - } - - if (syntax != xpg && (cp[0] == '+' || cp[0] == ',' || cp[0] == '_')) - { - syntax = cen; - - if (cp[0] == '+') - { - /* Next is special application (CEN syntax). */ - cp[0] = '\0'; - *special = ++cp; - - while (cp[0] != '\0' && cp[0] != ',' && cp[0] != '_') - ++cp; - - mask |= CEN_SPECIAL; - } - - if (cp[0] == ',') - { - /* Next is sponsor (CEN syntax). */ - cp[0] = '\0'; - *sponsor = ++cp; - - while (cp[0] != '\0' && cp[0] != '_') - ++cp; - - mask |= CEN_SPONSOR; - } - - if (cp[0] == '_') - { - /* Next is revision (CEN syntax). */ - cp[0] = '\0'; - *revision = ++cp; - - mask |= CEN_REVISION; - } - } - - /* For CEN syntax values it might be important to have the - separator character in the file name, not for XPG syntax. */ - if (syntax == xpg) - { - if (*territory != NULL && (*territory)[0] == '\0') - mask &= ~TERRITORY; - - if (*codeset != NULL && (*codeset)[0] == '\0') - mask &= ~XPG_CODESET; - - if (*modifier != NULL && (*modifier)[0] == '\0') - mask &= ~XPG_MODIFIER; - } - - return mask; -} diff --git a/intl/finddomain.c b/intl/finddomain.c deleted file mode 100644 index 5409565fd3d..00000000000 --- a/intl/finddomain.c +++ /dev/null @@ -1,216 +0,0 @@ -/* Handle list of needed message catalogs - Copyright (C) 1995, 1996, 1997, 1998 Free Software Foundation, Inc. - Written by Ulrich Drepper , 1995. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software Foundation, - Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ - -#ifdef HAVE_CONFIG_H -# include -#endif - -#include -#include -#include -#include - -#if defined STDC_HEADERS || defined _LIBC -# include -#else -# ifdef HAVE_MALLOC_H -# include -# else -void free (); -# endif -#endif - -#if defined HAVE_STRING_H || defined _LIBC -# include -#else -# include -# ifndef memcpy -# define memcpy(Dst, Src, Num) bcopy (Src, Dst, Num) -# endif -#endif -#if !HAVE_STRCHR && !defined _LIBC -# ifndef strchr -# define strchr index -# endif -#endif - -#if defined HAVE_UNISTD_H || defined _LIBC -# include -#endif - -#include "gettext.h" -#include "gettextP.h" -#ifdef _LIBC -# include -#else -# include "libgettext.h" -#endif - -/* @@ end of prolog @@ */ -/* List of already loaded domains. */ -static struct loaded_l10nfile *_nl_loaded_domains; - - -/* Return a data structure describing the message catalog described by - the DOMAINNAME and CATEGORY parameters with respect to the currently - established bindings. */ -struct loaded_l10nfile * -internal_function -_nl_find_domain (dirname, locale, domainname) - const char *dirname; - char *locale; - const char *domainname; -{ - struct loaded_l10nfile *retval; - const char *language; - const char *modifier; - const char *territory; - const char *codeset; - const char *normalized_codeset; - const char *special; - const char *sponsor; - const char *revision; - const char *alias_value; - int mask; - - /* LOCALE can consist of up to four recognized parts for the XPG syntax: - - language[_territory[.codeset]][@modifier] - - and six parts for the CEN syntax: - - language[_territory][+audience][+special][,[sponsor][_revision]] - - Beside the first part all of them are allowed to be missing. If - the full specified locale is not found, the less specific one are - looked for. The various parts will be stripped off according to - the following order: - (1) revision - (2) sponsor - (3) special - (4) codeset - (5) normalized codeset - (6) territory - (7) audience/modifier - */ - - /* If we have already tested for this locale entry there has to - be one data set in the list of loaded domains. */ - retval = _nl_make_l10nflist (&_nl_loaded_domains, dirname, - strlen (dirname) + 1, 0, locale, NULL, NULL, - NULL, NULL, NULL, NULL, NULL, domainname, 0); - if (retval != NULL) - { - /* We know something about this locale. */ - int cnt; - - if (retval->decided == 0) - _nl_load_domain (retval); - - if (retval->data != NULL) - return retval; - - for (cnt = 0; retval->successor[cnt] != NULL; ++cnt) - { - if (retval->successor[cnt]->decided == 0) - _nl_load_domain (retval->successor[cnt]); - - if (retval->successor[cnt]->data != NULL) - break; - } - return cnt >= 0 ? retval : NULL; - /* NOTREACHED */ - } - - /* See whether the locale value is an alias. If yes its value - *overwrites* the alias name. No test for the original value is - done. */ - alias_value = _nl_expand_alias (locale); - if (alias_value != NULL) - { -#if defined _LIBC || defined HAVE_STRDUP - locale = strdup (alias_value); - if (locale == NULL) - return NULL; -#else - size_t len = strlen (alias_value) + 1; - locale = (char *) malloc (len); - if (locale == NULL) - return NULL; - - memcpy (locale, alias_value, len); -#endif - } - - /* Now we determine the single parts of the locale name. First - look for the language. Termination symbols are `_' and `@' if - we use XPG4 style, and `_', `+', and `,' if we use CEN syntax. */ - mask = _nl_explode_name (locale, &language, &modifier, &territory, - &codeset, &normalized_codeset, &special, - &sponsor, &revision); - - /* Create all possible locale entries which might be interested in - generalization. */ - retval = _nl_make_l10nflist (&_nl_loaded_domains, dirname, - strlen (dirname) + 1, mask, language, territory, - codeset, normalized_codeset, modifier, special, - sponsor, revision, domainname, 1); - if (retval == NULL) - /* This means we are out of core. */ - return NULL; - - if (retval->decided == 0) - _nl_load_domain (retval); - if (retval->data == NULL) - { - int cnt; - for (cnt = 0; retval->successor[cnt] != NULL; ++cnt) - { - if (retval->successor[cnt]->decided == 0) - _nl_load_domain (retval->successor[cnt]); - if (retval->successor[cnt]->data != NULL) - break; - } - } - - /* The room for an alias was dynamically allocated. Free it now. */ - if (alias_value != NULL) - free (locale); - - return retval; -} - - -#ifdef _LIBC -static void __attribute__ ((unused)) -free_mem (void) -{ - struct loaded_l10nfile *runp = _nl_loaded_domains; - - while (runp != NULL) - { - struct loaded_l10nfile *here = runp; - if (runp->data != NULL) - _nl_unload_domain ((struct loaded_domain *) runp->data); - runp = runp->next; - free (here); - } -} - -text_set_element (__libc_subfreeres, free_mem); -#endif diff --git a/intl/gettext.c b/intl/gettext.c deleted file mode 100644 index 6bc5b94d3e8..00000000000 --- a/intl/gettext.c +++ /dev/null @@ -1,70 +0,0 @@ -/* Implementation of gettext(3) function. - Copyright (C) 1995, 1997 Free Software Foundation, Inc. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software Foundation, - Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ - -#ifdef HAVE_CONFIG_H -# include -#endif - -#ifdef _LIBC -# define __need_NULL -# include -#else -# ifdef STDC_HEADERS -# include /* Just for NULL. */ -# else -# ifdef HAVE_STRING_H -# include -# else -# define NULL ((void *) 0) -# endif -# endif -#endif - -#ifdef _LIBC -# include -#else -# include "libgettext.h" -#endif - -/* @@ end of prolog @@ */ - -/* Names for the libintl functions are a problem. They must not clash - with existing names and they should follow ANSI C. But this source - code is also used in GNU C Library where the names have a __ - prefix. So we have to make a difference here. */ -#ifdef _LIBC -# define GETTEXT __gettext -# define DGETTEXT __dgettext -#else -# define GETTEXT gettext__ -# define DGETTEXT dgettext__ -#endif - -/* Look up MSGID in the current default message catalog for the current - LC_MESSAGES locale. If not found, returns MSGID itself (the default - text). */ -char * -GETTEXT (msgid) - const char *msgid; -{ - return DGETTEXT (NULL, msgid); -} - -#ifdef _LIBC -/* Alias for function name in GNU C Library. */ -weak_alias (__gettext, gettext); -#endif diff --git a/intl/gettext.h b/intl/gettext.h deleted file mode 100644 index 3887e876402..00000000000 --- a/intl/gettext.h +++ /dev/null @@ -1,105 +0,0 @@ -/* Internal header for GNU gettext internationalization functions. - Copyright (C) 1995, 1997 Free Software Foundation, Inc. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU Library General Public - License along with the GNU C Library; see the file COPYING.LIB. If not, - write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor, - Boston, MA 02110-1301, USA. */ - -#ifndef _GETTEXT_H -#define _GETTEXT_H 1 - -#include - -#if HAVE_LIMITS_H || _LIBC -# include -#endif - -/* @@ end of prolog @@ */ - -/* The magic number of the GNU message catalog format. */ -#define _MAGIC 0x950412de -#define _MAGIC_SWAPPED 0xde120495 - -/* Revision number of the currently used .mo (binary) file format. */ -#define MO_REVISION_NUMBER 0 - -/* The following contortions are an attempt to use the C preprocessor - to determine an unsigned integral type that is 32 bits wide. An - alternative approach is to use autoconf's AC_CHECK_SIZEOF macro, but - doing that would require that the configure script compile and *run* - the resulting executable. Locally running cross-compiled executables - is usually not possible. */ - -#if __STDC__ -# define UINT_MAX_32_BITS 4294967295U -#else -# define UINT_MAX_32_BITS 0xFFFFFFFF -#endif - -/* If UINT_MAX isn't defined, assume it's a 32-bit type. - This should be valid for all systems GNU cares about because - that doesn't include 16-bit systems, and only modern systems - (that certainly have ) have 64+-bit integral types. */ - -#ifndef UINT_MAX -# define UINT_MAX UINT_MAX_32_BITS -#endif - -#if UINT_MAX == UINT_MAX_32_BITS -typedef unsigned nls_uint32; -#else -# if USHRT_MAX == UINT_MAX_32_BITS -typedef unsigned short nls_uint32; -# else -# if ULONG_MAX == UINT_MAX_32_BITS -typedef unsigned long nls_uint32; -# else - /* The following line is intended to throw an error. Using #error is - not portable enough. */ - "Cannot determine unsigned 32-bit data type." -# endif -# endif -#endif - - -/* Header for binary .mo file format. */ -struct mo_file_header -{ - /* The magic number. */ - nls_uint32 magic; - /* The revision number of the file format. */ - nls_uint32 revision; - /* The number of strings pairs. */ - nls_uint32 nstrings; - /* Offset of table with start offsets of original strings. */ - nls_uint32 orig_tab_offset; - /* Offset of table with start offsets of translation strings. */ - nls_uint32 trans_tab_offset; - /* Size of hashing table. */ - nls_uint32 hash_tab_size; - /* Offset of first hashing entry. */ - nls_uint32 hash_tab_offset; -}; - -struct string_desc -{ - /* Length of addressed string. */ - nls_uint32 length; - /* Offset of string in file. */ - nls_uint32 offset; -}; - -/* @@ begin of epilog @@ */ - -#endif /* gettext.h */ diff --git a/intl/gettextP.h b/intl/gettextP.h deleted file mode 100644 index 61e2f871bc8..00000000000 --- a/intl/gettextP.h +++ /dev/null @@ -1,89 +0,0 @@ -/* Header describing internals of gettext library - Copyright (C) 1995, 1996, 1997, 1998 Free Software Foundation, Inc. - Written by Ulrich Drepper , 1995. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software Foundation, - Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ - -#ifndef _GETTEXTP_H -#define _GETTEXTP_H - -#include "loadinfo.h" - -/* @@ end of prolog @@ */ - -#ifndef PARAMS -# if __STDC__ -# define PARAMS(args) args -# else -# define PARAMS(args) () -# endif -#endif - -#ifndef internal_function -# define internal_function -#endif - -#ifndef W -# define W(flag, data) ((flag) ? SWAP (data) : (data)) -#endif - - -#ifdef _LIBC -# include -# define SWAP(i) bswap_32 (i) -#else -static nls_uint32 SWAP PARAMS ((nls_uint32 i)); - -static inline nls_uint32 -SWAP (i) - nls_uint32 i; -{ - return (i << 24) | ((i & 0xff00) << 8) | ((i >> 8) & 0xff00) | (i >> 24); -} -#endif - - -struct loaded_domain -{ - const char *data; - int use_mmap; - size_t mmap_size; - int must_swap; - nls_uint32 nstrings; - struct string_desc *orig_tab; - struct string_desc *trans_tab; - nls_uint32 hash_size; - nls_uint32 *hash_tab; -}; - -struct binding -{ - struct binding *next; - char *domainname; - char *dirname; -}; - -struct loaded_l10nfile *_nl_find_domain PARAMS ((const char *__dirname, - char *__locale, - const char *__domainname)) - internal_function; -void _nl_load_domain PARAMS ((struct loaded_l10nfile *__domain)) - internal_function; -void _nl_unload_domain PARAMS ((struct loaded_domain *__domain)) - internal_function; - -/* @@ begin of epilog @@ */ - -#endif /* gettextP.h */ diff --git a/intl/hash-string.h b/intl/hash-string.h deleted file mode 100644 index 66281078364..00000000000 --- a/intl/hash-string.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Implements a string hashing function. - Copyright (C) 1995, 1997 Free Software Foundation, Inc. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU Library General Public - License along with the GNU C Library; see the file COPYING.LIB. If not, - write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor, - Boston, MA 02110-1301, USA. */ - -/* @@ end of prolog @@ */ - -#ifndef PARAMS -# if __STDC__ -# define PARAMS(Args) Args -# else -# define PARAMS(Args) () -# endif -#endif - -/* We assume to have `unsigned long int' value with at least 32 bits. */ -#define HASHWORDBITS 32 - - -/* Defines the so called `hashpjw' function by P.J. Weinberger - [see Aho/Sethi/Ullman, COMPILERS: Principles, Techniques and Tools, - 1986, 1987 Bell Telephone Laboratories, Inc.] */ -static unsigned long hash_string PARAMS ((const char *__str_param)); - -static inline unsigned long -hash_string (str_param) - const char *str_param; -{ - unsigned long int hval, g; - const char *str = str_param; - - /* Compute the hash value for the given string. */ - hval = 0; - while (*str != '\0') - { - hval <<= 4; - hval += (unsigned long) *str++; - g = hval & ((unsigned long) 0xf << (HASHWORDBITS - 4)); - if (g != 0) - { - hval ^= g >> (HASHWORDBITS - 8); - hval ^= g; - } - } - return hval; -} diff --git a/intl/intl-compat.c b/intl/intl-compat.c deleted file mode 100644 index 415a0f3b4f8..00000000000 --- a/intl/intl-compat.c +++ /dev/null @@ -1,76 +0,0 @@ -/* intl-compat.c - Stub functions to call gettext functions from GNU gettext - Library. - Copyright (C) 1995 Software Foundation, Inc. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ - -#ifdef HAVE_CONFIG_H -# include -#endif - -#include "libgettext.h" - -/* @@ end of prolog @@ */ - - -#undef gettext -#undef dgettext -#undef dcgettext -#undef textdomain -#undef bindtextdomain - - -char * -bindtextdomain (domainname, dirname) - const char *domainname; - const char *dirname; -{ - return bindtextdomain__ (domainname, dirname); -} - - -char * -dcgettext (domainname, msgid, category) - const char *domainname; - const char *msgid; - int category; -{ - return dcgettext__ (domainname, msgid, category); -} - - -char * -dgettext (domainname, msgid) - const char *domainname; - const char *msgid; -{ - return dgettext__ (domainname, msgid); -} - - -char * -gettext (msgid) - const char *msgid; -{ - return gettext__ (msgid); -} - - -char * -textdomain (domainname) - const char *domainname; -{ - return textdomain__ (domainname); -} diff --git a/intl/intlh.inst.in b/intl/intlh.inst.in deleted file mode 100644 index 95e15a8f266..00000000000 --- a/intl/intlh.inst.in +++ /dev/null @@ -1,111 +0,0 @@ -/* Message catalogs for internationalization. - Copyright (C) 1995, 1996, 1997 Free Software Foundation, Inc. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, - USA. */ - -#ifndef _LIBINTL_H -#define _LIBINTL_H 1 - -@INCLUDE_LOCALE_H@ - -/* We define an additional symbol to signal that we use the GNU - implementation of gettext. */ -#define __USE_GNU_GETTEXT 1 - -#ifndef PARAMS -# if __STDC__ || defined __cplusplus -# define PARAMS(args) args -# else -# define PARAMS(args) () -# endif -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -/* Look up MSGID in the current default message catalog for the current - LC_MESSAGES locale. If not found, returns MSGID itself (the default - text). */ -extern char *gettext PARAMS ((const char *__msgid)); - -/* Look up MSGID in the DOMAINNAME message catalog for the current - LC_MESSAGES locale. */ -extern char *dgettext PARAMS ((const char *__domainname, const char *__msgid)); - -/* Look up MSGID in the DOMAINNAME message catalog for the current CATEGORY - locale. */ -extern char *dcgettext PARAMS ((const char *__domainname, const char *__msgid, - int __category)); - - -/* Set the current default message catalog to DOMAINNAME. - If DOMAINNAME is null, return the current default. - If DOMAINNAME is "", reset to the default of "messages". */ -extern char *textdomain PARAMS ((const char *__domainname)); - -/* Specify that the DOMAINNAME message catalog will be found - in DIRNAME rather than in the system locale data base. */ -extern char *bindtextdomain PARAMS ((const char *__domainname, - const char *__dirname)); - - -/* Optimized version of the functions above. */ -#if defined __OPTIMIZED -/* These must be a macro. Inlined functions are useless because the - `__builtin_constant_p' predicate in dcgettext would always return - false. */ - -# define gettext(msgid) dgettext ((char *) 0, msgid) - -# define dgettext(domainname, msgid) \ - dcgettext (domainname, msgid, LC_MESSAGES) - -# if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 7) -/* This global variable is defined in loadmsgcat.c. We need a sign, - whether a new catalog was loaded, which can be associated with all - translations. */ -extern int _nl_msg_cat_cntr; - -# define dcgettext(domainname, msgid, category) \ - (__extension__ \ - ({ \ - char *__result; \ - if (__builtin_constant_p (msgid)) \ - { \ - static char *__translation__; \ - static int __catalog_counter__; \ - if (! __translation__ || __catalog_counter__ != _nl_msg_cat_cntr) \ - { \ - __translation__ = \ - (dcgettext) ((domainname), (msgid), (category)); \ - __catalog_counter__ = _nl_msg_cat_cntr; \ - } \ - __result = __translation__; \ - } \ - else \ - __result = (dcgettext) ((domainname), (msgid), (category)); \ - __result; \ - })) -# endif -#endif /* Optimizing. */ - - -#ifdef __cplusplus -} -#endif - -#endif /* libintl.h */ diff --git a/intl/l10nflist.c b/intl/l10nflist.c deleted file mode 100644 index 3ef93b84733..00000000000 --- a/intl/l10nflist.c +++ /dev/null @@ -1,411 +0,0 @@ -/* Handle list of needed message catalogs - Copyright (C) 1995, 1996, 1997 Free Software Foundation, Inc. - Contributed by Ulrich Drepper , 1995. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software Foundation, - Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ - -#ifdef HAVE_CONFIG_H -# include -#endif - - -#if defined HAVE_STRING_H || defined _LIBC -# ifndef _GNU_SOURCE -# define _GNU_SOURCE 1 -# endif -# include -#else -# include -# ifndef memcpy -# define memcpy(Dst, Src, Num) bcopy (Src, Dst, Num) -# endif -#endif -#if !HAVE_STRCHR && !defined _LIBC -# ifndef strchr -# define strchr index -# endif -#endif - -#if defined _LIBC || defined HAVE_ARGZ_H -# include -#endif -#include -#include - -#if defined STDC_HEADERS || defined _LIBC -# include -#endif - -#include "loadinfo.h" - -/* On some strange systems still no definition of NULL is found. Sigh! */ -#ifndef NULL -# if defined __STDC__ && __STDC__ -# define NULL ((void *) 0) -# else -# define NULL 0 -# endif -#endif - -/* @@ end of prolog @@ */ - -#ifdef _LIBC -/* Rename the non ANSI C functions. This is required by the standard - because some ANSI C functions will require linking with this object - file and the name space must not be polluted. */ -# ifndef stpcpy -# define stpcpy(dest, src) __stpcpy(dest, src) -# endif -#else -# ifndef HAVE_STPCPY -static char *stpcpy PARAMS ((char *dest, const char *src)); -# endif -#endif - -/* Define function which are usually not available. */ - -#if !defined _LIBC && !defined HAVE___ARGZ_COUNT -/* Returns the number of strings in ARGZ. */ -static size_t argz_count__ PARAMS ((const char *argz, size_t len)); - -static size_t -argz_count__ (argz, len) - const char *argz; - size_t len; -{ - size_t count = 0; - while (len > 0) - { - size_t part_len = strlen (argz); - argz += part_len + 1; - len -= part_len + 1; - count++; - } - return count; -} -# undef __argz_count -# define __argz_count(argz, len) argz_count__ (argz, len) -#endif /* !_LIBC && !HAVE___ARGZ_COUNT */ - -#if !defined _LIBC && !defined HAVE___ARGZ_STRINGIFY -/* Make '\0' separated arg vector ARGZ printable by converting all the '\0's - except the last into the character SEP. */ -static void argz_stringify__ PARAMS ((char *argz, size_t len, int sep)); - -static void -argz_stringify__ (argz, len, sep) - char *argz; - size_t len; - int sep; -{ - while (len > 0) - { - size_t part_len = strlen (argz); - argz += part_len; - len -= part_len + 1; - if (len > 0) - *argz++ = sep; - } -} -# undef __argz_stringify -# define __argz_stringify(argz, len, sep) argz_stringify__ (argz, len, sep) -#endif /* !_LIBC && !HAVE___ARGZ_STRINGIFY */ - -#if !defined _LIBC && !defined HAVE___ARGZ_NEXT -static char *argz_next__ PARAMS ((char *argz, size_t argz_len, - const char *entry)); - -static char * -argz_next__ (argz, argz_len, entry) - char *argz; - size_t argz_len; - const char *entry; -{ - if (entry) - { - if (entry < argz + argz_len) - entry = strchr (entry, '\0') + 1; - - return entry >= argz + argz_len ? NULL : (char *) entry; - } - else - if (argz_len > 0) - return argz; - else - return 0; -} -# undef __argz_next -# define __argz_next(argz, len, entry) argz_next__ (argz, len, entry) -#endif /* !_LIBC && !HAVE___ARGZ_NEXT */ - - -/* Return number of bits set in X. */ -static int pop PARAMS ((int x)); - -static inline int -pop (x) - int x; -{ - /* We assume that no more than 16 bits are used. */ - x = ((x & ~0x5555) >> 1) + (x & 0x5555); - x = ((x & ~0x3333) >> 2) + (x & 0x3333); - x = ((x >> 4) + x) & 0x0f0f; - x = ((x >> 8) + x) & 0xff; - - return x; -} - - -struct loaded_l10nfile * -_nl_make_l10nflist (l10nfile_list, dirlist, dirlist_len, mask, language, - territory, codeset, normalized_codeset, modifier, special, - sponsor, revision, filename, do_allocate) - struct loaded_l10nfile **l10nfile_list; - const char *dirlist; - size_t dirlist_len; - int mask; - const char *language; - const char *territory; - const char *codeset; - const char *normalized_codeset; - const char *modifier; - const char *special; - const char *sponsor; - const char *revision; - const char *filename; - int do_allocate; -{ - char *abs_filename; - struct loaded_l10nfile *last = NULL; - struct loaded_l10nfile *retval; - char *cp; - size_t entries; - int cnt; - - /* Allocate room for the full file name. */ - abs_filename = (char *) malloc (dirlist_len - + strlen (language) - + ((mask & TERRITORY) != 0 - ? strlen (territory) + 1 : 0) - + ((mask & XPG_CODESET) != 0 - ? strlen (codeset) + 1 : 0) - + ((mask & XPG_NORM_CODESET) != 0 - ? strlen (normalized_codeset) + 1 : 0) - + (((mask & XPG_MODIFIER) != 0 - || (mask & CEN_AUDIENCE) != 0) - ? strlen (modifier) + 1 : 0) - + ((mask & CEN_SPECIAL) != 0 - ? strlen (special) + 1 : 0) - + (((mask & CEN_SPONSOR) != 0 - || (mask & CEN_REVISION) != 0) - ? (1 + ((mask & CEN_SPONSOR) != 0 - ? strlen (sponsor) + 1 : 0) - + ((mask & CEN_REVISION) != 0 - ? strlen (revision) + 1 : 0)) : 0) - + 1 + strlen (filename) + 1); - - if (abs_filename == NULL) - return NULL; - - retval = NULL; - last = NULL; - - /* Construct file name. */ - memcpy (abs_filename, dirlist, dirlist_len); - __argz_stringify (abs_filename, dirlist_len, ':'); - cp = abs_filename + (dirlist_len - 1); - *cp++ = '/'; - cp = stpcpy (cp, language); - - if ((mask & TERRITORY) != 0) - { - *cp++ = '_'; - cp = stpcpy (cp, territory); - } - if ((mask & XPG_CODESET) != 0) - { - *cp++ = '.'; - cp = stpcpy (cp, codeset); - } - if ((mask & XPG_NORM_CODESET) != 0) - { - *cp++ = '.'; - cp = stpcpy (cp, normalized_codeset); - } - if ((mask & (XPG_MODIFIER | CEN_AUDIENCE)) != 0) - { - /* This component can be part of both syntaces but has different - leading characters. For CEN we use `+', else `@'. */ - *cp++ = (mask & CEN_AUDIENCE) != 0 ? '+' : '@'; - cp = stpcpy (cp, modifier); - } - if ((mask & CEN_SPECIAL) != 0) - { - *cp++ = '+'; - cp = stpcpy (cp, special); - } - if ((mask & (CEN_SPONSOR | CEN_REVISION)) != 0) - { - *cp++ = ','; - if ((mask & CEN_SPONSOR) != 0) - cp = stpcpy (cp, sponsor); - if ((mask & CEN_REVISION) != 0) - { - *cp++ = '_'; - cp = stpcpy (cp, revision); - } - } - - *cp++ = '/'; - stpcpy (cp, filename); - - /* Look in list of already loaded domains whether it is already - available. */ - last = NULL; - for (retval = *l10nfile_list; retval != NULL; retval = retval->next) - if (retval->filename != NULL) - { - int compare = strcmp (retval->filename, abs_filename); - if (compare == 0) - /* We found it! */ - break; - if (compare < 0) - { - /* It's not in the list. */ - retval = NULL; - break; - } - - last = retval; - } - - if (retval != NULL || do_allocate == 0) - { - free (abs_filename); - return retval; - } - - retval = (struct loaded_l10nfile *) - malloc (sizeof (*retval) + (__argz_count (dirlist, dirlist_len) - * (1 << pop (mask)) - * sizeof (struct loaded_l10nfile *))); - if (retval == NULL) - return NULL; - - retval->filename = abs_filename; - retval->decided = (__argz_count (dirlist, dirlist_len) != 1 - || ((mask & XPG_CODESET) != 0 - && (mask & XPG_NORM_CODESET) != 0)); - retval->data = NULL; - - if (last == NULL) - { - retval->next = *l10nfile_list; - *l10nfile_list = retval; - } - else - { - retval->next = last->next; - last->next = retval; - } - - entries = 0; - /* If the DIRLIST is a real list the RETVAL entry corresponds not to - a real file. So we have to use the DIRLIST separation mechanism - of the inner loop. */ - cnt = __argz_count (dirlist, dirlist_len) == 1 ? mask - 1 : mask; - for (; cnt >= 0; --cnt) - if ((cnt & ~mask) == 0 - && ((cnt & CEN_SPECIFIC) == 0 || (cnt & XPG_SPECIFIC) == 0) - && ((cnt & XPG_CODESET) == 0 || (cnt & XPG_NORM_CODESET) == 0)) - { - /* Iterate over all elements of the DIRLIST. */ - char *dir = NULL; - - while ((dir = __argz_next ((char *) dirlist, dirlist_len, dir)) - != NULL) - retval->successor[entries++] - = _nl_make_l10nflist (l10nfile_list, dir, strlen (dir) + 1, cnt, - language, territory, codeset, - normalized_codeset, modifier, special, - sponsor, revision, filename, 1); - } - retval->successor[entries] = NULL; - - return retval; -} - -/* Normalize codeset name. There is no standard for the codeset - names. Normalization allows the user to use any of the common - names. */ -const char * -_nl_normalize_codeset (codeset, name_len) - const unsigned char *codeset; - size_t name_len; -{ - int len = 0; - int only_digit = 1; - char *retval; - char *wp; - size_t cnt; - - for (cnt = 0; cnt < name_len; ++cnt) - if (isalnum (codeset[cnt])) - { - ++len; - - if (isalpha (codeset[cnt])) - only_digit = 0; - } - - retval = (char *) malloc ((only_digit ? 3 : 0) + len + 1); - - if (retval != NULL) - { - if (only_digit) - wp = stpcpy (retval, "iso"); - else - wp = retval; - - for (cnt = 0; cnt < name_len; ++cnt) - if (isalpha (codeset[cnt])) - *wp++ = tolower (codeset[cnt]); - else if (isdigit (codeset[cnt])) - *wp++ = codeset[cnt]; - - *wp = '\0'; - } - - return (const char *) retval; -} - - -/* @@ begin of epilog @@ */ - -/* We don't want libintl.a to depend on any other library. So we - avoid the non-standard function stpcpy. In GNU C Library this - function is available, though. Also allow the symbol HAVE_STPCPY - to be defined. */ -#if !_LIBC && !HAVE_STPCPY -static char * -stpcpy (dest, src) - char *dest; - const char *src; -{ - while ((*dest++ = *src++) != '\0') - /* Do nothing. */ ; - return dest - 1; -} -#endif diff --git a/intl/libgettext.h b/intl/libgettext.h deleted file mode 100644 index f8c224e47f7..00000000000 --- a/intl/libgettext.h +++ /dev/null @@ -1,182 +0,0 @@ -/* Message catalogs for internationalization. - Copyright (C) 1995, 1996, 1997, 1998 Free Software Foundation, Inc. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software Foundation, - Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ - -/* Because on some systems (e.g. Solaris) we sometimes have to include - the systems libintl.h as well as this file we have more complex - include protection above. But the systems header might perhaps also - define _LIBINTL_H and therefore we have to protect the definition here. */ - -#if !defined _LIBINTL_H || !defined _LIBGETTEXT_H -#ifndef _LIBINTL_H -# define _LIBINTL_H 1 -#endif -#define _LIBGETTEXT_H 1 - -/* We define an additional symbol to signal that we use the GNU - implementation of gettext. */ -#define __USE_GNU_GETTEXT 1 - -#include - -#if HAVE_LOCALE_H -# include -#endif - - -#ifdef __cplusplus -extern "C" { -#endif - -/* @@ end of prolog @@ */ - -#ifndef PARAMS -# if __STDC__ || defined __cplusplus -# define PARAMS(args) args -# else -# define PARAMS(args) () -# endif -#endif - -#ifndef NULL -# if !defined __cplusplus || defined __GNUC__ -# define NULL ((void *) 0) -# else -# define NULL (0) -# endif -#endif - -#if !HAVE_LC_MESSAGES -/* This value determines the behaviour of the gettext() and dgettext() - function. But some system does not have this defined. Define it - to a default value. */ -# define LC_MESSAGES (-1) -#endif - - -/* Declarations for gettext-using-catgets interface. Derived from - Jim Meyering's libintl.h. */ -struct _msg_ent -{ - const char *_msg; - int _msg_number; -}; - - -#if HAVE_CATGETS -/* These two variables are defined in the automatically by po-to-tbl.sed - generated file `cat-id-tbl.c'. */ -extern const struct _msg_ent _msg_tbl[]; -extern int _msg_tbl_length; -#endif - - -/* For automatical extraction of messages sometimes no real - translation is needed. Instead the string itself is the result. */ -#define gettext_noop(Str) (Str) - -/* Look up MSGID in the current default message catalog for the current - LC_MESSAGES locale. If not found, returns MSGID itself (the default - text). */ -extern char *gettext PARAMS ((const char *__msgid)); -extern char *gettext__ PARAMS ((const char *__msgid)); - -/* Look up MSGID in the DOMAINNAME message catalog for the current - LC_MESSAGES locale. */ -extern char *dgettext PARAMS ((const char *__domainname, const char *__msgid)); -extern char *dgettext__ PARAMS ((const char *__domainname, - const char *__msgid)); - -/* Look up MSGID in the DOMAINNAME message catalog for the current CATEGORY - locale. */ -extern char *dcgettext PARAMS ((const char *__domainname, const char *__msgid, - int __category)); -extern char *dcgettext__ PARAMS ((const char *__domainname, - const char *__msgid, int __category)); - - -/* Set the current default message catalog to DOMAINNAME. - If DOMAINNAME is null, return the current default. - If DOMAINNAME is "", reset to the default of "messages". */ -extern char *textdomain PARAMS ((const char *__domainname)); -extern char *textdomain__ PARAMS ((const char *__domainname)); - -/* Specify that the DOMAINNAME message catalog will be found - in DIRNAME rather than in the system locale data base. */ -extern char *bindtextdomain PARAMS ((const char *__domainname, - const char *__dirname)); -extern char *bindtextdomain__ PARAMS ((const char *__domainname, - const char *__dirname)); - -#if ENABLE_NLS - -/* Solaris 2.3 has the gettext function but dcgettext is missing. - So we omit this optimization for Solaris 2.3. BTW, Solaris 2.4 - has dcgettext. */ -# if !HAVE_CATGETS && (!HAVE_GETTEXT || HAVE_DCGETTEXT) - -# define gettext(Msgid) \ - dgettext (NULL, Msgid) - -# define dgettext(Domainname, Msgid) \ - dcgettext (Domainname, Msgid, LC_MESSAGES) - -# if defined __GNUC__ && __GNUC__ == 2 && __GNUC_MINOR__ >= 7 -/* This global variable is defined in loadmsgcat.c. We need a sign, - whether a new catalog was loaded, which can be associated with all - translations. */ -extern int _nl_msg_cat_cntr; - -# define dcgettext(Domainname, Msgid, Category) \ - (__extension__ \ - ({ \ - char *__result; \ - if (__builtin_constant_p (Msgid)) \ - { \ - static char *__translation__; \ - static int __catalog_counter__; \ - if (! __translation__ || __catalog_counter__ != _nl_msg_cat_cntr) \ - { \ - __translation__ = \ - dcgettext__ (Domainname, Msgid, Category); \ - __catalog_counter__ = _nl_msg_cat_cntr; \ - } \ - __result = __translation__; \ - } \ - else \ - __result = dcgettext__ (Domainname, Msgid, Category); \ - __result; \ - })) -# endif -# endif - -#else - -# define gettext(Msgid) (Msgid) -# define dgettext(Domainname, Msgid) (Msgid) -# define dcgettext(Domainname, Msgid, Category) (Msgid) -# define textdomain(Domainname) ((char *) Domainname) -# define bindtextdomain(Domainname, Dirname) ((char *) Dirname) - -#endif - -/* @@ begin of epilog @@ */ - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/intl/libintl.glibc b/intl/libintl.glibc deleted file mode 100644 index c55b447678b..00000000000 --- a/intl/libintl.glibc +++ /dev/null @@ -1,120 +0,0 @@ -/* Message catalogs for internationalization. - Copyright (C) 1995, 1996, 1997 Free Software Foundation, Inc. - Contributed by Ulrich Drepper , 1995. - This file is derived from the file libgettext.h in the GNU gettext package. - - This file is part of the GNU C Library. Its master source is NOT part of - the C library, however. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Library General Public License as - published by the Free Software Foundation; either version 2 of the - License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Library General Public License for more details. - - You should have received a copy of the GNU Library General Public - License along with the GNU C Library; see the file COPYING.LIB. If not, - write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor, - Boston, MA 02110-1301, USA. */ - -#ifndef _LIBINTL_H -#define _LIBINTL_H 1 - -#include - -/* We define an additional symbol to signal that we use the GNU - implementation of gettext. */ -#define __USE_GNU_GETTEXT 1 - -__BEGIN_DECLS - -/* Look up MSGID in the current default message catalog for the current - LC_MESSAGES locale. If not found, returns MSGID itself (the default - text). */ -extern char *gettext __P ((__const char *__msgid)); -extern char *__gettext __P ((__const char *__msgid)); - -/* Look up MSGID in the DOMAINNAME message catalog for the current - LC_MESSAGES locale. */ -extern char *dgettext __P ((__const char *__domainname, - __const char *__msgid)); -extern char *__dgettext __P ((__const char *__domainname, - __const char *__msgid)); - -/* Look up MSGID in the DOMAINNAME message catalog for the current CATEGORY - locale. */ -extern char *dcgettext __P ((__const char *__domainname, - __const char *__msgid, int __category)); -extern char *__dcgettext __P ((__const char *__domainname, - __const char *__msgid, int __category)); - - -/* Set the current default message catalog to DOMAINNAME. - If DOMAINNAME is null, return the current default. - If DOMAINNAME is "", reset to the default of "messages". */ -extern char *textdomain __P ((__const char *__domainname)); -extern char *__textdomain __P ((__const char *__domainname)); - -/* Specify that the DOMAINNAME message catalog will be found - in DIRNAME rather than in the system locale data base. */ -extern char *bindtextdomain __P ((__const char *__domainname, - __const char *__dirname)); -extern char *__bindtextdomain __P ((__const char *__domainname, - __const char *__dirname)); - - -/* Optimized version of the function above. */ -#if defined __OPTIMIZE__ - -/* We need NULL for `gettext'. */ -# define __need_NULL -# include - -/* We need LC_MESSAGES for `dgettext'. */ -# include - -/* These must be macros. Inlined functions are useless because the - `__builtin_constant_p' predicate in dcgettext would always return - false. */ - -# define gettext(msgid) dgettext (NULL, msgid) - -# define dgettext(domainname, msgid) \ - dcgettext (domainname, msgid, LC_MESSAGES) - -# if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 7) -/* Variable defined in loadmsgcat.c which gets incremented every time a - new catalog is loaded. */ -extern int _nl_msg_cat_cntr; - -# define dcgettext(domainname, msgid, category) \ - (__extension__ \ - ({ \ - char *__result; \ - if (__builtin_constant_p (msgid)) \ - { \ - static char *__translation__; \ - static int __catalog_counter__; \ - if (! __translation__ || __catalog_counter__ != _nl_msg_cat_cntr) \ - { \ - __translation__ = \ - __dcgettext ((domainname), (msgid), (category)); \ - __catalog_counter__ = _nl_msg_cat_cntr; \ - } \ - __result = __translation__; \ - } \ - else \ - __result = __dcgettext ((domainname), (msgid), (category)); \ - __result; \ - })) -# endif -#endif /* Optimizing. */ - - -__END_DECLS - -#endif /* libintl.h */ diff --git a/intl/linux-msg.sed b/intl/linux-msg.sed deleted file mode 100644 index f9b8188d783..00000000000 --- a/intl/linux-msg.sed +++ /dev/null @@ -1,100 +0,0 @@ -# po2msg.sed - Convert Uniforum style .po file to Linux style .msg file -# Copyright 1995, 2002 Free Software Foundation, Inc. -# Ulrich Drepper , 1995. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. -# -# -# The first directive in the .msg should be the definition of the -# message set number. We use always set number 1. -# -1 { - i\ -$set 1 # Automatically created by po2msg.sed - h - s/.*/0/ - x -} -# -# Mitch's old catalog format does not allow comments. -# -# We copy the original message as a comment into the .msg file. -# -/^msgid/ { - s/msgid[ ]*"// -# -# This does not work now with the new format. -# /"$/! { -# s/\\$// -# s/$/ ... (more lines following)"/ -# } - x -# The following nice solution is by -# Bruno - td -# Increment a decimal number in pattern space. -# First hide trailing `9' digits. - :d - s/9\(_*\)$/_\1/ - td -# Assure at least one digit is available. - s/^\(_*\)$/0\1/ -# Increment the last digit. - s/8\(_*\)$/9\1/ - s/7\(_*\)$/8\1/ - s/6\(_*\)$/7\1/ - s/5\(_*\)$/6\1/ - s/4\(_*\)$/5\1/ - s/3\(_*\)$/4\1/ - s/2\(_*\)$/3\1/ - s/1\(_*\)$/2\1/ - s/0\(_*\)$/1\1/ -# Convert the hidden `9' digits to `0's. - s/_/0/g - x - G - s/\(.*\)"\n\([0-9]*\)/$ #\2 Original Message:(\1)/p -} -# -# The .msg file contains, other than the .po file, only the translations -# but each given a unique ID. Starting from 1 and incrementing by 1 for -# each message we assign them to the messages. -# It is important that the .po file used to generate the cat-id-tbl.c file -# (with po-to-tbl) is the same as the one used here. (At least the order -# of declarations must not be changed.) -# -/^msgstr/ { - s/msgstr[ ]*"\(.*\)"/# \1/ -# Clear substitution flag. - tb -# Append the next line. - :b - N -# Look whether second part is continuation line. - s/\(.*\n\)"\(.*\)"/\1\2/ -# Yes, then branch. - ta - P - D -# Note that D includes a jump to the start!! -# We found a continuation line. But before printing insert '\'. - :a - s/\(.*\)\(\n.*\)/\1\\\2/ - P -# We cannot use D here. - s/.*\n\(.*\)/\1/ - tb -} -d diff --git a/intl/loadinfo.h b/intl/loadinfo.h deleted file mode 100644 index b797c0c5bae..00000000000 --- a/intl/loadinfo.h +++ /dev/null @@ -1,76 +0,0 @@ -/* Copyright (C) 1996, 1997 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by Ulrich Drepper , 1996. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software Foundation, - Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ - -#ifndef PARAMS -# if __STDC__ -# define PARAMS(args) args -# else -# define PARAMS(args) () -# endif -#endif - -/* Encoding of locale name parts. */ -#define CEN_REVISION 1 -#define CEN_SPONSOR 2 -#define CEN_SPECIAL 4 -#define XPG_NORM_CODESET 8 -#define XPG_CODESET 16 -#define TERRITORY 32 -#define CEN_AUDIENCE 64 -#define XPG_MODIFIER 128 - -#define CEN_SPECIFIC (CEN_REVISION|CEN_SPONSOR|CEN_SPECIAL|CEN_AUDIENCE) -#define XPG_SPECIFIC (XPG_CODESET|XPG_NORM_CODESET|XPG_MODIFIER) - - -struct loaded_l10nfile -{ - const char *filename; - int decided; - - const void *data; - - struct loaded_l10nfile *next; - struct loaded_l10nfile *successor[1]; -}; - - -extern const char *_nl_normalize_codeset PARAMS ((const unsigned char *codeset, - size_t name_len)); - -extern struct loaded_l10nfile * -_nl_make_l10nflist PARAMS ((struct loaded_l10nfile **l10nfile_list, - const char *dirlist, size_t dirlist_len, int mask, - const char *language, const char *territory, - const char *codeset, - const char *normalized_codeset, - const char *modifier, const char *special, - const char *sponsor, const char *revision, - const char *filename, int do_allocate)); - - -extern const char *_nl_expand_alias PARAMS ((const char *name)); - -extern int _nl_explode_name PARAMS ((char *name, const char **language, - const char **modifier, - const char **territory, - const char **codeset, - const char **normalized_codeset, - const char **special, - const char **sponsor, - const char **revision)); diff --git a/intl/loadmsgcat.c b/intl/loadmsgcat.c deleted file mode 100644 index ab11bc95d5c..00000000000 --- a/intl/loadmsgcat.c +++ /dev/null @@ -1,222 +0,0 @@ -/* Load needed message catalogs. - Copyright (C) 1995, 1996, 1997, 1998 Free Software Foundation, Inc. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software Foundation, - Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ - -#ifdef HAVE_CONFIG_H -# include -#endif - -#include -#include -#include - -#if defined STDC_HEADERS || defined _LIBC -# include -#endif - -#if defined HAVE_UNISTD_H || defined _LIBC -# include -#endif - -#if (defined HAVE_MMAP && defined HAVE_MUNMAP) || defined _LIBC -# include -#endif - -#include "gettext.h" -#include "gettextP.h" - -/* @@ end of prolog @@ */ - -#ifdef _LIBC -/* Rename the non ISO C functions. This is required by the standard - because some ISO C functions will require linking with this object - file and the name space must not be polluted. */ -# define open __open -# define close __close -# define read __read -# define mmap __mmap -# define munmap __munmap -#endif - -/* We need a sign, whether a new catalog was loaded, which can be associated - with all translations. This is important if the translations are - cached by one of GCC's features. */ -int _nl_msg_cat_cntr = 0; - - -/* Load the message catalogs specified by FILENAME. If it is no valid - message catalog do nothing. */ -void -internal_function -_nl_load_domain (domain_file) - struct loaded_l10nfile *domain_file; -{ - int fd; - size_t size; - struct stat st; - struct mo_file_header *data = (struct mo_file_header *) -1; -#if (defined HAVE_MMAP && defined HAVE_MUNMAP && !defined DISALLOW_MMAP) \ - || defined _LIBC - int use_mmap = 0; -#endif - struct loaded_domain *domain; - - domain_file->decided = 1; - domain_file->data = NULL; - - /* If the record does not represent a valid locale the FILENAME - might be NULL. This can happen when according to the given - specification the locale file name is different for XPG and CEN - syntax. */ - if (domain_file->filename == NULL) - return; - - /* Try to open the addressed file. */ - fd = open (domain_file->filename, O_RDONLY); - if (fd == -1) - return; - - /* We must know about the size of the file. */ - if (fstat (fd, &st) != 0 - || (size = (size_t) st.st_size) != st.st_size - || size < sizeof (struct mo_file_header)) - { - /* Something went wrong. */ - close (fd); - return; - } - -#if (defined HAVE_MMAP && defined HAVE_MUNMAP && !defined DISALLOW_MMAP) \ - || defined _LIBC - /* Now we are ready to load the file. If mmap() is available we try - this first. If not available or it failed we try to load it. */ - data = (struct mo_file_header *) mmap (NULL, size, PROT_READ, - MAP_PRIVATE, fd, 0); - - if (data != (struct mo_file_header *) -1) - { - /* mmap() call was successful. */ - close (fd); - use_mmap = 1; - } -#endif - - /* If the data is not yet available (i.e. mmap'ed) we try to load - it manually. */ - if (data == (struct mo_file_header *) -1) - { - size_t to_read; - char *read_ptr; - - data = (struct mo_file_header *) malloc (size); - if (data == NULL) - return; - - to_read = size; - read_ptr = (char *) data; - do - { - long int nb = (long int) read (fd, read_ptr, to_read); - if (nb == -1) - { - close (fd); - return; - } - - read_ptr += nb; - to_read -= nb; - } - while (to_read > 0); - - close (fd); - } - - /* Using the magic number we can test whether it really is a message - catalog file. */ - if (data->magic != _MAGIC && data->magic != _MAGIC_SWAPPED) - { - /* The magic number is wrong: not a message catalog file. */ -#if (defined HAVE_MMAP && defined HAVE_MUNMAP && !defined DISALLOW_MMAP) \ - || defined _LIBC - if (use_mmap) - munmap ((caddr_t) data, size); - else -#endif - free (data); - return; - } - - domain_file->data - = (struct loaded_domain *) malloc (sizeof (struct loaded_domain)); - if (domain_file->data == NULL) - return; - - domain = (struct loaded_domain *) domain_file->data; - domain->data = (char *) data; -#if (defined HAVE_MMAP && defined HAVE_MUNMAP && !defined DISALLOW_MMAP) \ - || defined _LIBC - domain->use_mmap = use_mmap; -#endif - domain->mmap_size = size; - domain->must_swap = data->magic != _MAGIC; - - /* Fill in the information about the available tables. */ - switch (W (domain->must_swap, data->revision)) - { - case 0: - domain->nstrings = W (domain->must_swap, data->nstrings); - domain->orig_tab = (struct string_desc *) - ((char *) data + W (domain->must_swap, data->orig_tab_offset)); - domain->trans_tab = (struct string_desc *) - ((char *) data + W (domain->must_swap, data->trans_tab_offset)); - domain->hash_size = W (domain->must_swap, data->hash_tab_size); - domain->hash_tab = (nls_uint32 *) - ((char *) data + W (domain->must_swap, data->hash_tab_offset)); - break; - default: - /* This is an illegal revision. */ -#if (defined HAVE_MMAP && defined HAVE_MUNMAP && !defined DISALLOW_MMAP) \ - || defined _LIBC - if (use_mmap) - munmap ((caddr_t) data, size); - else -#endif - free (data); - free (domain); - domain_file->data = NULL; - return; - } - - /* Show that one domain is changed. This might make some cached - translations invalid. */ - ++_nl_msg_cat_cntr; -} - - -#ifdef _LIBC -void -internal_function -_nl_unload_domain (domain) - struct loaded_domain *domain; -{ - if (domain->use_mmap) - munmap ((caddr_t) domain->data, domain->mmap_size); - else - free ((void *) domain->data); - - free (domain); -} -#endif diff --git a/intl/localealias.c b/intl/localealias.c deleted file mode 100644 index 833df0351aa..00000000000 --- a/intl/localealias.c +++ /dev/null @@ -1,424 +0,0 @@ -/* Handle aliases for locale names. - Copyright (C) 1995, 1996, 1997, 1998 Free Software Foundation, Inc. - Written by Ulrich Drepper , 1995. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software Foundation, - Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ - -#ifdef HAVE_CONFIG_H -# include -#endif - -#include -#include -#include - -#ifdef __GNUC__ -# define alloca __builtin_alloca -# define HAVE_ALLOCA 1 -#else -# if defined HAVE_ALLOCA_H || defined _LIBC -# include -# else -# ifdef _AIX - #pragma alloca -# else -# ifndef alloca -char *alloca (); -# endif -# endif -# endif -#endif - -#if defined STDC_HEADERS || defined _LIBC -# include -#else -char *getenv (); -# ifdef HAVE_MALLOC_H -# include -# else -void free (); -# endif -#endif - -#if defined HAVE_STRING_H || defined _LIBC -# ifndef _GNU_SOURCE -# define _GNU_SOURCE 1 -# endif -# include -#else -# include -# ifndef memcpy -# define memcpy(Dst, Src, Num) bcopy (Src, Dst, Num) -# endif -#endif -#if !HAVE_STRCHR && !defined _LIBC -# ifndef strchr -# define strchr index -# endif -#endif - -#include "gettext.h" -#include "gettextP.h" - -/* @@ end of prolog @@ */ - -#ifdef _LIBC -/* Rename the non ANSI C functions. This is required by the standard - because some ANSI C functions will require linking with this object - file and the name space must not be polluted. */ -# define strcasecmp __strcasecmp - -# define mempcpy __mempcpy -# define HAVE_MEMPCPY 1 - -/* We need locking here since we can be called from different places. */ -# include - -__libc_lock_define_initialized (static, lock); -#endif - - -/* For those loosing systems which don't have `alloca' we have to add - some additional code emulating it. */ -#ifdef HAVE_ALLOCA -/* Nothing has to be done. */ -# define ADD_BLOCK(list, address) /* nothing */ -# define FREE_BLOCKS(list) /* nothing */ -#else -struct block_list -{ - void *address; - struct block_list *next; -}; -# define ADD_BLOCK(list, addr) \ - do { \ - struct block_list *newp = (struct block_list *) malloc (sizeof (*newp)); \ - /* If we cannot get a free block we cannot add the new element to \ - the list. */ \ - if (newp != NULL) { \ - newp->address = (addr); \ - newp->next = (list); \ - (list) = newp; \ - } \ - } while (0) -# define FREE_BLOCKS(list) \ - do { \ - while (list != NULL) { \ - struct block_list *old = list; \ - list = list->next; \ - free (old); \ - } \ - } while (0) -# undef alloca -# define alloca(size) (malloc (size)) -#endif /* have alloca */ - - -struct alias_map -{ - const char *alias; - const char *value; -}; - - -static char *string_space = NULL; -static size_t string_space_act = 0; -static size_t string_space_max = 0; -static struct alias_map *map; -static size_t nmap = 0; -static size_t maxmap = 0; - - -/* Prototypes for local functions. */ -static size_t read_alias_file PARAMS ((const char *fname, int fname_len)) - internal_function; -static void extend_alias_table PARAMS ((void)); -static int alias_compare PARAMS ((const struct alias_map *map1, - const struct alias_map *map2)); - - -const char * -_nl_expand_alias (name) - const char *name; -{ - static const char *locale_alias_path = LOCALE_ALIAS_PATH; - struct alias_map *retval; - const char *result = NULL; - size_t added; - -#ifdef _LIBC - __libc_lock_lock (lock); -#endif - - do - { - struct alias_map item; - - item.alias = name; - - if (nmap > 0) - retval = (struct alias_map *) bsearch (&item, map, nmap, - sizeof (struct alias_map), - (int (*) PARAMS ((const void *, - const void *)) - ) alias_compare); - else - retval = NULL; - - /* We really found an alias. Return the value. */ - if (retval != NULL) - { - result = retval->value; - break; - } - - /* Perhaps we can find another alias file. */ - added = 0; - while (added == 0 && locale_alias_path[0] != '\0') - { - const char *start; - - while (locale_alias_path[0] == ':') - ++locale_alias_path; - start = locale_alias_path; - - while (locale_alias_path[0] != '\0' && locale_alias_path[0] != ':') - ++locale_alias_path; - - if (start < locale_alias_path) - added = read_alias_file (start, locale_alias_path - start); - } - } - while (added != 0); - -#ifdef _LIBC - __libc_lock_unlock (lock); -#endif - - return result; -} - - -static size_t -internal_function -read_alias_file (fname, fname_len) - const char *fname; - int fname_len; -{ -#ifndef HAVE_ALLOCA - struct block_list *block_list = NULL; -#endif - FILE *fp; - char *full_fname; - size_t added; - static const char aliasfile[] = "/locale.alias"; - - full_fname = (char *) alloca (fname_len + sizeof aliasfile); - ADD_BLOCK (block_list, full_fname); -#ifdef HAVE_MEMPCPY - mempcpy (mempcpy (full_fname, fname, fname_len), - aliasfile, sizeof aliasfile); -#else - memcpy (full_fname, fname, fname_len); - memcpy (&full_fname[fname_len], aliasfile, sizeof aliasfile); -#endif - - fp = fopen (full_fname, "r"); - if (fp == NULL) - { - FREE_BLOCKS (block_list); - return 0; - } - - added = 0; - while (!feof (fp)) - { - /* It is a reasonable approach to use a fix buffer here because - a) we are only interested in the first two fields - b) these fields must be usable as file names and so must not - be that long - */ - unsigned char buf[BUFSIZ]; - unsigned char *alias; - unsigned char *value; - unsigned char *cp; - - if (fgets (buf, sizeof buf, fp) == NULL) - /* EOF reached. */ - break; - - /* Possibly not the whole line fits into the buffer. Ignore - the rest of the line. */ - if (strchr (buf, '\n') == NULL) - { - char altbuf[BUFSIZ]; - do - if (fgets (altbuf, sizeof altbuf, fp) == NULL) - /* Make sure the inner loop will be left. The outer loop - will exit at the `feof' test. */ - break; - while (strchr (altbuf, '\n') == NULL); - } - - cp = buf; - /* Ignore leading white space. */ - while (isspace (cp[0])) - ++cp; - - /* A leading '#' signals a comment line. */ - if (cp[0] != '\0' && cp[0] != '#') - { - alias = cp++; - while (cp[0] != '\0' && !isspace (cp[0])) - ++cp; - /* Terminate alias name. */ - if (cp[0] != '\0') - *cp++ = '\0'; - - /* Now look for the beginning of the value. */ - while (isspace (cp[0])) - ++cp; - - if (cp[0] != '\0') - { - size_t alias_len; - size_t value_len; - - value = cp++; - while (cp[0] != '\0' && !isspace (cp[0])) - ++cp; - /* Terminate value. */ - if (cp[0] == '\n') - { - /* This has to be done to make the following test - for the end of line possible. We are looking for - the terminating '\n' which do not overwrite here. */ - *cp++ = '\0'; - *cp = '\n'; - } - else if (cp[0] != '\0') - *cp++ = '\0'; - - if (nmap >= maxmap) - extend_alias_table (); - - alias_len = strlen (alias) + 1; - value_len = strlen (value) + 1; - - if (string_space_act + alias_len + value_len > string_space_max) - { - /* Increase size of memory pool. */ - size_t new_size = (string_space_max - + (alias_len + value_len > 1024 - ? alias_len + value_len : 1024)); - char *new_pool = (char *) realloc (string_space, new_size); - if (new_pool == NULL) - { - FREE_BLOCKS (block_list); - return added; - } - string_space = new_pool; - string_space_max = new_size; - } - - map[nmap].alias = memcpy (&string_space[string_space_act], - alias, alias_len); - string_space_act += alias_len; - - map[nmap].value = memcpy (&string_space[string_space_act], - value, value_len); - string_space_act += value_len; - - ++nmap; - ++added; - } - } - } - - /* Should we test for ferror()? I think we have to silently ignore - errors. --drepper */ - fclose (fp); - - if (added > 0) - qsort (map, nmap, sizeof (struct alias_map), - (int (*) PARAMS ((const void *, const void *))) alias_compare); - - FREE_BLOCKS (block_list); - return added; -} - - -static void -extend_alias_table () -{ - size_t new_size; - struct alias_map *new_map; - - new_size = maxmap == 0 ? 100 : 2 * maxmap; - new_map = (struct alias_map *) realloc (map, (new_size - * sizeof (struct alias_map))); - if (new_map == NULL) - /* Simply don't extend: we don't have any more core. */ - return; - - map = new_map; - maxmap = new_size; -} - - -#ifdef _LIBC -static void __attribute__ ((unused)) -free_mem (void) -{ - if (string_space != NULL) - free (string_space); - if (map != NULL) - free (map); -} -text_set_element (__libc_subfreeres, free_mem); -#endif - - -static int -alias_compare (map1, map2) - const struct alias_map *map1; - const struct alias_map *map2; -{ -#if defined _LIBC || defined HAVE_STRCASECMP - return strcasecmp (map1->alias, map2->alias); -#else - const unsigned char *p1 = (const unsigned char *) map1->alias; - const unsigned char *p2 = (const unsigned char *) map2->alias; - unsigned char c1, c2; - - if (p1 == p2) - return 0; - - do - { - /* I know this seems to be odd but the tolower() function in - some systems libc cannot handle nonalpha characters. */ - c1 = isupper (*p1) ? tolower (*p1) : *p1; - c2 = isupper (*p2) ? tolower (*p2) : *p2; - if (c1 == '\0') - break; - ++p1; - ++p2; - } - while (c1 == c2); - - return c1 - c2; -#endif -} diff --git a/intl/po2tbl.sed.in b/intl/po2tbl.sed.in deleted file mode 100644 index ebb32f29353..00000000000 --- a/intl/po2tbl.sed.in +++ /dev/null @@ -1,102 +0,0 @@ -# po2tbl.sed - Convert Uniforum style .po file to lookup table for catgets -# Copyright (C) 1995 Free Software Foundation, Inc. -# Ulrich Drepper , 1995. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. -# -1 { - i\ -/* Automatically generated by po2tbl.sed from @PACKAGE NAME@.pot. */\ -\ -#if HAVE_CONFIG_H\ -# include \ -#endif\ -\ -#include "libgettext.h"\ -\ -const struct _msg_ent _msg_tbl[] = { - h - s/.*/0/ - x -} -# -# Write msgid entries in C array form. -# -/^msgid/ { - s/msgid[ ]*\(".*"\)/ {\1/ - tb -# Append the next line - :b - N -# Look whether second part is continuation line. - s/\(.*\)"\(\n\)"\(.*"\)/\1\2\3/ -# Yes, then branch. - ta -# Because we assume that the input file correctly formed the line -# just read cannot be again be a msgid line. So it's safe to ignore -# it. - s/\(.*\)\n.*/\1/ - bc -# We found a continuation line. But before printing insert '\'. - :a - s/\(.*\)\(\n.*\)/\1\\\2/ - P -# We cannot use D here. - s/.*\n\(.*\)/\1/ -# Some buggy seds do not clear the `successful substitution since last ``t''' -# flag on `N', so we do a `t' here to clear it. - tb -# Not reached - :c - x -# The following nice solution is by -# Bruno - td -# Increment a decimal number in pattern space. -# First hide trailing `9' digits. - :d - s/9\(_*\)$/_\1/ - td -# Assure at least one digit is available. - s/^\(_*\)$/0\1/ -# Increment the last digit. - s/8\(_*\)$/9\1/ - s/7\(_*\)$/8\1/ - s/6\(_*\)$/7\1/ - s/5\(_*\)$/6\1/ - s/4\(_*\)$/5\1/ - s/3\(_*\)$/4\1/ - s/2\(_*\)$/3\1/ - s/1\(_*\)$/2\1/ - s/0\(_*\)$/1\1/ -# Convert the hidden `9' digits to `0's. - s/_/0/g - x - G - s/\(.*\)\n\([0-9]*\)/\1, \2},/ - s/\(.*\)"$/\1/ - p -} -# -# Last line. -# -$ { - i\ -};\ - - g - s/0*\(.*\)/int _msg_tbl_length = \1;/p -} -d diff --git a/intl/textdomain.c b/intl/textdomain.c deleted file mode 100644 index 9cec75cb5e3..00000000000 --- a/intl/textdomain.c +++ /dev/null @@ -1,108 +0,0 @@ -/* Implementation of the textdomain(3) function. - Copyright (C) 1995, 1996, 1997, 1998 Free Software Foundation, Inc. - Written by Ulrich Drepper , 1995. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software Foundation, - Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ - -#ifdef HAVE_CONFIG_H -# include -#endif - -#if defined STDC_HEADERS || defined _LIBC -# include -#endif - -#if defined STDC_HEADERS || defined HAVE_STRING_H || defined _LIBC -# include -#else -# include -# ifndef memcpy -# define memcpy(Dst, Src, Num) bcopy (Src, Dst, Num) -# endif -#endif - -#ifdef _LIBC -# include -#else -# include "libgettext.h" -#endif - -/* @@ end of prolog @@ */ - -/* Name of the default text domain. */ -extern const char _nl_default_default_domain[]; - -/* Default text domain in which entries for gettext(3) are to be found. */ -extern const char *_nl_current_default_domain; - - -/* Names for the libintl functions are a problem. They must not clash - with existing names and they should follow ANSI C. But this source - code is also used in GNU C Library where the names have a __ - prefix. So we have to make a difference here. */ -#ifdef _LIBC -# define TEXTDOMAIN __textdomain -# ifndef strdup -# define strdup(str) __strdup (str) -# endif -#else -# define TEXTDOMAIN textdomain__ -#endif - -/* Set the current default message catalog to DOMAINNAME. - If DOMAINNAME is null, return the current default. - If DOMAINNAME is "", reset to the default of "messages". */ -char * -TEXTDOMAIN (domainname) - const char *domainname; -{ - char *old; - - /* A NULL pointer requests the current setting. */ - if (domainname == NULL) - return (char *) _nl_current_default_domain; - - old = (char *) _nl_current_default_domain; - - /* If domain name is the null string set to default domain "messages". */ - if (domainname[0] == '\0' - || strcmp (domainname, _nl_default_default_domain) == 0) - _nl_current_default_domain = _nl_default_default_domain; - else - { - /* If the following malloc fails `_nl_current_default_domain' - will be NULL. This value will be returned and so signals we - are out of core. */ -#if defined _LIBC || defined HAVE_STRDUP - _nl_current_default_domain = strdup (domainname); -#else - size_t len = strlen (domainname) + 1; - char *cp = (char *) malloc (len); - if (cp != NULL) - memcpy (cp, domainname, len); - _nl_current_default_domain = cp; -#endif - } - - if (old != _nl_default_default_domain) - free (old); - - return (char *) _nl_current_default_domain; -} - -#ifdef _LIBC -/* Alias for function name in GNU C Library. */ -weak_alias (__textdomain, textdomain); -#endif diff --git a/intl/xopen-msg.sed b/intl/xopen-msg.sed deleted file mode 100644 index 1d257d3e0b9..00000000000 --- a/intl/xopen-msg.sed +++ /dev/null @@ -1,104 +0,0 @@ -# po2msg.sed - Convert Uniforum style .po file to X/Open style .msg file -# Copyright 1995, 2002 Free Software Foundation, Inc. -# Ulrich Drepper , 1995. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. -# -# -# The first directive in the .msg should be the definition of the -# message set number. We use always set number 1. -# -1 { - i\ -$set 1 # Automatically created by po2msg.sed - h - s/.*/0/ - x -} -# -# We copy all comments into the .msg file. Perhaps they can help. -# -/^#/ s/^#[ ]*/$ /p -# -# We copy the original message as a comment into the .msg file. -# -/^msgid/ { -# Does not work now -# /"$/! { -# s/\\$// -# s/$/ ... (more lines following)"/ -# } - s/^msgid[ ]*"\(.*\)"$/$ Original Message: \1/ - p -} -# -# The .msg file contains, other than the .po file, only the translations -# but each given a unique ID. Starting from 1 and incrementing by 1 for -# each message we assign them to the messages. -# It is important that the .po file used to generate the cat-id-tbl.c file -# (with po-to-tbl) is the same as the one used here. (At least the order -# of declarations must not be changed.) -# -/^msgstr/ { - s/msgstr[ ]*"\(.*\)"/\1/ - x -# The following nice solution is by -# Bruno - td -# Increment a decimal number in pattern space. -# First hide trailing `9' digits. - :d - s/9\(_*\)$/_\1/ - td -# Assure at least one digit is available. - s/^\(_*\)$/0\1/ -# Increment the last digit. - s/8\(_*\)$/9\1/ - s/7\(_*\)$/8\1/ - s/6\(_*\)$/7\1/ - s/5\(_*\)$/6\1/ - s/4\(_*\)$/5\1/ - s/3\(_*\)$/4\1/ - s/2\(_*\)$/3\1/ - s/1\(_*\)$/2\1/ - s/0\(_*\)$/1\1/ -# Convert the hidden `9' digits to `0's. - s/_/0/g - x -# Bring the line in the format ` ' - G - s/^[^\n]*$/& / - s/\(.*\)\n\([0-9]*\)/\2 \1/ -# Clear flag from last substitution. - tb -# Append the next line. - :b - N -# Look whether second part is a continuation line. - s/\(.*\n\)"\(.*\)"/\1\2/ -# Yes, then branch. - ta - P - D -# Note that `D' includes a jump to the start!! -# We found a continuation line. But before printing insert '\'. - :a - s/\(.*\)\(\n.*\)/\1\\\2/ - P -# We cannot use the sed command `D' here - s/.*\n\(.*\)/\1/ - tb -} -d diff --git a/libiberty/ChangeLog b/libiberty/ChangeLog index d2bda7022ed..eeae1e3435f 100644 --- a/libiberty/ChangeLog +++ b/libiberty/ChangeLog @@ -1,3 +1,8 @@ +2005-10-31 Mark Kettenis + + * floatformat.c (floatformat_vax_aingle, floatformat_vax_double): + New variables. + 2005-10-07 Mark Mitchell * at-file.texi: Fix typo. diff --git a/libiberty/floatformat.c b/libiberty/floatformat.c index 8f0d7894641..28c9fbf662d 100644 --- a/libiberty/floatformat.c +++ b/libiberty/floatformat.c @@ -108,6 +108,30 @@ const struct floatformat floatformat_ieee_double_littlebyte_bigword = floatformat_always_valid }; +/* floatformat for VAX. Not quite IEEE, but close enough. */ + +const struct floatformat floatformat_vax_f = +{ + floatformat_vax, 32, 0, 1, 8, 129, 0, 9, 23, + floatformat_intbit_no, + "floatformat_vax_f", + floatformat_always_valid +}; +const struct floatformat floatformat_vax_d = +{ + floatformat_vax, 64, 0, 1, 8, 129, 0, 9, 55, + floatformat_intbit_no, + "floatformat_vax_d", + floatformat_always_valid +}; +const struct floatformat floatformat_vax_g = +{ + floatformat_vax, 64, 0, 1, 11, 1025, 0, 12, 52, + floatformat_intbit_no, + "floatformat_vax_g", + floatformat_always_valid +}; + static int floatformat_i387_ext_is_valid (const struct floatformat *fmt, const void *from); diff --git a/mmalloc/COPYING.LIB b/mmalloc/COPYING.LIB deleted file mode 100644 index eb685a5ec98..00000000000 --- a/mmalloc/COPYING.LIB +++ /dev/null @@ -1,481 +0,0 @@ - GNU LIBRARY GENERAL PUBLIC LICENSE - Version 2, June 1991 - - Copyright (C) 1991 Free Software Foundation, Inc. - 675 Mass Ave, Cambridge, MA 02139, USA - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - -[This is the first released version of the library GPL. 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You can do so by permitting -redistribution under these terms (or, alternatively, under the terms of the -ordinary General Public License). - - To apply these terms, attach the following notices to the library. It is -safest to attach them to the start of each source file to most effectively -convey the exclusion of warranty; and each file should have at least the -"copyright" line and a pointer to where the full notice is found. - - - Copyright (C) - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Library General Public - License as published by the Free Software Foundation; either - version 2 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Library General Public License for more details. - - You should have received a copy of the GNU Library General Public - License along with this library; if not, write to the Free - Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - -Also add information on how to contact you by electronic and paper mail. - -You should also get your employer (if you work as a programmer) or your -school, if any, to sign a "copyright disclaimer" for the library, if -necessary. Here is a sample; alter the names: - - Yoyodyne, Inc., hereby disclaims all copyright interest in the - library `Frob' (a library for tweaking knobs) written by James Random Hacker. - - , 1 April 1990 - Ty Coon, President of Vice - -That's all there is to it! diff --git a/mmalloc/ChangeLog b/mmalloc/ChangeLog deleted file mode 100644 index a1e3ad0af07..00000000000 --- a/mmalloc/ChangeLog +++ /dev/null @@ -1,491 +0,0 @@ -2003-08-08 H.J. Lu - - * Makefile.in (install-info): Create dest dir. Support DESTDIR. - (install): Likewise. - -2002-11-28 Elena Zannoni - - * Makefile.in (install): Move install-info to here... - (all): ...from here. - -2002-11-26 Elena Zannoni - - * Makefile.in (INFO_DEPS): Define. - (all): Add install-info to the rule. - (info): Unse INFO_DEPS. - (install-info): Rewrite. - (uninstall-info): New. - (uninstall): New. - -2002-04-07 Andrew Cagney - - From 2002-03-05 Scott Pakin - * mmap-sup.c (MAP_PRIVATE_OR_SHARED): Define. - (__mmalloc_mmap_morecore): Use. - (__mmalloc_remap_core): Use. - -2000-05-17 Eli Zaretskii - - * Makefile.in (install-info): Make sure $(infodir) exists. Run - install-info program on the installed Info files. - -2000-03-20 Eli Zaretskii - - * Makefile.in (install): Append "n", not ".n" to libmmalloc.a, - since the latter loses on DOS 8+3 filesystems. - -Mon Feb 28 10:33:51 2000 Andrew Cagney - - * MAINTAINERS: New file. - -2000-02-18 Frank Ch. Eigler - - From Jason "crash" Molenda : - * configure.in: Check for getpagesize declaration. - * mvmalloc.c, mmap-sup.c: Conditionally declare getpagesize. - * configure: Regenerated. - -Fri Feb 18 11:42:21 2000 Andrew Cagney - - * configure.in: Check for . - * configure: Regenerate. - - From 2000-02-17 RodneyBrown@pmsc.com: - * mm.c, attach.c, mmap-sup.c, sbrk-sup.c: Include for - sbrk and lseek declarations. Update copyright. - -2000-02-04 Kevin Buettner (kevinb@cygnus.com) - - * acinclude.m4, aclocal.m4: New files. - * configure.in (sbrk): Use BFD_NEED_DECLARATION to test for - presence of a suitable declaration in the system headers. - * configure: Regenerated. - * sbrk-sup.c (sbrk): Ifdef'd with NEED_DECLARATION_SBRK. - -1999-01-04 Jason Molenda (jsm@bugshack.cygnus.com) - - * configure.in: Requires autoconf 2.12.1 or higher. - * configure: Regenerated. - -1998-07-24 Jim Blandy - - * mcalloc.c: #include before . HP/UX 11.0 - needs this. - -Thu Apr 23 12:19:22 1998 Philippe De Muyter - - * mmalloc.h: Include sys/types.h and stdio.h #ifndef HAVE_STDDEF_H. - * mmprivate.h: Do not handle HAVE_STDDEF_H here, since we include - mmalloc.h. - -Tue Mar 24 17:07:02 1998 Stu Grossman - - * Makefile.in: Get SHELL from configure. - * configure: Regenerate with autoconf 2.12.1 to fix shell issues for - NT native builds. - -Mon Feb 7 13:06:45 1997 Philippe De Muyter - - * mmalloc/detach.c: Do not include fcntl.h. - -Thu Aug 28 13:15:07 1997 Andrew Cagney - - * mrealloc.c (realloc): Store result in local variable before - returning it. Makes debugging much easier at negligible cost. - -Tue Feb 4 16:30:59 1997 Ian Lance Taylor - - * mvalloc.c (cache_pagesize): Rename from pagesize, so that if we - are building mm.o, it does not conflict with the variable of the - same name in mmap-sup.c. - -Sat Dec 28 12:48:32 1996 Fred Fish - - * Makefile.in (mm.o): New target that combines all the functions - into a single object module. This avoids client programs picking - up part of the allocation routines from mmalloc and part from libc, - which can lead to undefined behavior. - (CFILES): Add mm.c - (TARGETOBJS): Define to be either the individual objects or the - single combined object. - (TARGETLIB): Create the archive using TARGETOBJS. - * mm.c: New file that simply #includes the other source C files. - -Thu Oct 3 15:45:23 1996 Jason Molenda (crash@godzilla.cygnus.co.jp) - - * Makefile.in (maintainer-clean): Depend on distclean, remove - duplication. - -Tue Sep 10 17:52:06 1996 Fred Fish - - * mmcheck.c (checkhdr): Add prototype. - (mfree_check): Ditto. - (mmalloc_check): Ditto. - (mrealloc_check): Ditto. - * mmtrace.c (tr_break): Ditto. - (tr_freehook): Ditto. - (tr_mallochook): Ditto. - (tr_reallochook): Ditto. - * sbrk-sup.c (sbrk_morecore): Ditto. - -Wed Sep 4 18:02:45 1996 Stu Grossman (grossman@critters.cygnus.com) - - * configure configure.in: Don't default CC to cc. It causes problems - when starting a compile in the mmalloc directory. - -Wed Jul 24 00:53:34 1996 Fred Fish - - * mmalloc.h (mmalloc_findbase): Add prototype. - -Fri Jul 12 18:35:34 1996 Fred Fish - - * mmap-sup.c (mmalloc_findbase): Change to not require /dev/zero - if MMAP_ANONYMOUS is available. - -Wed Jul 10 23:53:42 1996 Fred Fish - - * detach.c (mmalloc_detach): Fix bug in computation of negative - brk value. - * mmcheck.c (mmcheckf): Renamed from mmcheck and new FORCE argument - added. Replaced hack that always allowed checking routines to be - installed and enforce restriction that they have to be installed - prior to allocating any memory on the used heap or the FORCE argument - has to be non-NULL. - (mmcheck): New function that calls mmcheckf with FORCE set to zero, - for backwards compatibility. - * mmalloc.c (malloc): Store result in local variable before - returning it. Makes debugging much easier at negligible cost. - * mmalloc.h (mmcheckf): Declare. - * attach.c (reuse): Call mmcheckf rather than mmcheck. - * mmap-sup.c (__mmalloc_mmap_morecore): Improve to allow mmap - to select a base mapping address if none is otherwise given. - (mmalloc_findbase): New function that user can call to find - an available mapping address of a given size. - -Tue Jun 25 22:54:06 1996 Jason Molenda (crash@godzilla.cygnus.co.jp) - - * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir): - Use autoconf-set values. - (docdir): Removed. - * configure.in (AC_PREREQ): autoconf 2.5 or higher. - * configure: Rebuilt. - -Tue May 28 13:51:22 1996 Fred Fish - - From: Thomas A Peterson - * Makefile.in (install-info): Apply patch to install - mmalloc.info from srcdir if not found in build dir. - -Sun Apr 7 20:55:30 1996 Fred Fish - - From: Miles Bader - * configure.in: Use AC_CHECK_TOOL to find AR & RANLIB. - * configure: Regenerate with autoconf. - * Makefile.in: Use AR set by configure substitution. - -Fri Mar 29 09:57:36 1996 Fred Fish - - * mmalloc.h (mmtrace): Add prototype. - -Sat Feb 3 12:41:00 1996 Fred Fish - - From H.J. Lu (hjl@gnu.ai.mit.edu): - * mvalloc.c (valloc): new. - * mmemalign.c: Allocate (SIZE + ALIGNMENT - 1) and then trim - if possible. - (memalign): don't put the node on the _aligned_blocks list more - than once. - -Mon Nov 20 12:04:32 1995 Fred Fish - - * Makefile.in (OFILES): Make objects depend upon Makefile, - since Makefile sets DEFS which can definitely affect how - objects are to be compiled. - -Mon Nov 6 14:12:13 1995 Jason Molenda (crash@phydeaux.cygnus.com) - - * configure.in (AC_CHECK_HEADERS): add limits.h. - (AC_HEADER_STDC): remove. - - * mmalloc.h: document necessity of defining size_t before - including mmalloc.h. - - * mmprivate.h: add check for limits.h, remove definition of - NULL and size_t. - -Sun Nov 5 00:27:36 1995 Jason Molenda (crash@phydeaux.cygnus.com) - - * configure.in: AC_CHECK_HEADERS, not AC_CHECK_HEADER. - -Sun Nov 5 00:14:13 1995 Jason Molenda (crash@phydeaux.cygnus.com) - - * configure.in: add check for stddef.h - * mmalloc.h: include stddef.h if HAVE_STDDEF_H is defined. - -Sat Nov 4 19:10:13 1995 Jason Molenda (crash@phydeaux.cygnus.com) - - * configure.in: add AC_HEADER_STDC check. - - * mmalloc.h: check if STDC_HEADERS instead of __STDC__. - - * mmprivate.h: check if STDC_HEADERS instead of __STDC__. - -Tue Oct 24 13:17:44 1995 Stan Shebs - - * mmprivate.h: Remove declarations (PTR, etc) that are already - provided by ansidecl.h, include mmalloc.h earlier in file. - -Tue Oct 10 11:04:47 1995 Fred Fish - - * Makefile.in (BISON): Remove macro. - -Wed Sep 20 12:51:13 1995 Ian Lance Taylor - - * Makefile.in (maintainer-clean): New target, synonym for - realclean. Add GNU standard maintainer-clean echos. - -Thu Aug 3 10:45:37 1995 Fred Fish - - * Update all FSF addresses except those in COPYING* files - and shar archive of original FSF files. - -Mon Jun 12 12:11:57 1995 J.T. Conklin - - * Makefile.in (distclean, realclean): Remove config.cache and - config.log. - -Wed May 17 17:47:44 1995 J.T. Conklin - - * Makefile.in (Makefile): Added config.status to dependency list. - (config.status): New target. - -Fri May 5 15:17:53 1995 J.T. Conklin - - * mmap-sup.c: Removed munmap prototype. Some systems have a - slightly different prototype. - -Wed May 3 17:18:13 1995 J.T. Conklin - - * Makefile.in, configure.in: Converted to use autoconf. - * configure: New file, generated with autoconf 2.3. - * config/{mh-go32, mh-irix, mh-ncr3000, mh-sunos4, - mh-sysv4}: Removed. - -Thu Nov 3 23:55:21 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) - - * Makefile.in (install-info): Name destination file correctly, - rather than using undefined shell variable. - -Fri Oct 28 16:46:58 1994 Stan Shebs (shebs@andros.cygnus.com) - - * mmprivate.h: New file, was mmalloc.h. - (mmalloc.h): Include. - * mmalloc.h: Remove all but declarations of mmalloc functions. - (ansidecl.h): Include. - * attach.c, et al: Include mmprivate.h instead of mmalloc.h. - -Wed Aug 24 12:55:33 1994 Ian Lance Taylor (ian@sanguine.cygnus.com) - - * configure.in: Change i[34]86 to i[345]86. - -Mon Aug 22 11:36:40 1994 Stan Shebs (shebs@andros.cygnus.com) - - * Makefile.in (distclean): Separate from realclean. - (realclean): Remove mmalloc.info. - -Fri May 6 13:04:25 1994 Steve Chamberlain (sac@cygnus.com) - - * config/go32.mh: New file - * configure.in (host==go32): Use new fragment. - -Tue Feb 8 00:32:28 1994 Peter Schauer (pes@regent.e-technik.tu-muenchen.de) - - * mmtrace.c (tr_freehook, tr_mallochook, tr_reallochook): - Cast addresses put out via fprintf to unsigned long and use %lx. - -Tue Nov 16 20:33:17 1993 Jim Kingdon (kingdon@deneb.cygnus.com) - - * COPYING.LIB: New file (standard version 2 LGPL, as already cited - by the source files). - -Fri Nov 5 11:47:33 1993 Jim Kingdon (kingdon@lioth.cygnus.com) - - * Makefile.in (info dvi install-info): Actually make the manual. - -Mon Nov 1 14:20:25 1993 Jim Kingdon (kingdon@lioth.cygnus.com) - - * mmalloc.texi: Fix typo ("for for" -> "for"). - -Fri Jul 16 15:27:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com) - - * test1.c: New file which tests for bug fixed below. - * Makefile.in (check): Put in commands to run it (but commented out - because it won't work for Canadian cross). - - * mmalloc.c (mmalloc): When extending a free block at the end of the - heap, check whether which block is at the end changed. - - * Makefile.in (TAGS): make work when srcdir != objdir. - -Thu Jul 15 07:56:47 1993 Jim Kingdon (kingdon@lioth.cygnus.com) - - * attach.c, detach.c: Include before . - -Wed Jun 30 11:00:53 1993 Jim Kingdon (kingdon@lioth.cygnus.com) - - * Makefile.in: Add mostlyclean and realclean targets. - -Wed Mar 24 01:58:12 1993 david d `zoo' zuhn (zoo at poseidon.cygnus.com) - - * Makefile.in: add dvi and installcheck targets - -Fri Mar 12 18:35:43 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) - - * configure.in: recognize *-*-solaris2* instead of *-*-solaris* (a - number of people want to call SunOS 4.1.2 "solaris1.0" and get it right) - -Mon Feb 22 18:08:53 1993 John Gilmore (gnu@cygnus.com) - - * Makefile.in (distclean): Add. - -Tue Feb 16 08:09:15 1993 Fred Fish (fnf@cygnus.com) - - * Makefile.in, attach.c, detach.c, keys.c, mmap-sup.c, mmtrace.c, - sbrk-sup.c: Use GNU Library General Public License, like other - files. - -Wed Nov 18 19:18:59 1992 John Gilmore (gnu@cygnus.com) - - * configure.in: Regularize list of host configs. - -Fri Oct 30 00:59:46 1992 John Gilmore (gnu@cygnus.com) - - * mmalloc.texi: Add missing doubled @. Bugfix by Paul Eggert. - -Fri Oct 23 01:50:52 1992 Stu Grossman (grossman at cygnus.com) - - * configure.in: Handle solaris same as sysv4. - -Thu Oct 1 23:34:20 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) - - * configure.in: use cpu-vendor-os triple instead of nested cases - -Sun Aug 23 11:09:46 1992 Fred Fish (fnf@cygnus.com) - - * sbrk-sup.c (__mmalloc_brk_init): Ensure base of sbrk'd region - is aligned. Bug reported by Andrew Heybey (ath@lcs.mit.edu). - -Wed Aug 19 14:49:23 1992 Ian Lance Taylor (ian@cygnus.com) - - * Makefile.in: always create installation directories. - -Mon Jul 20 21:15:44 1992 Fred Fish (fnf@cygnus.com) - - * mrealloc.c: Minor code format style changes for consistency. - -Fri Jul 3 20:25:30 1992 Fred Fish (fnf@cygnus.com) - - * attach.c, detach.c, mcalloc.c, mmalloc.c, mmtrace.c, mrealloc.c, - sbrk-sup.c: Remove "(void)" casts from function calls where the - return value is ignored, in accordance with GNU coding standards. - -Tue Jun 30 16:44:41 1992 Fred Fish (fnf@cygnus.com) - - * mmalloc.h (struct mdesc): Add FIXME comments to point out the - need to save some data on a per-process basis for mapped regions - that are shared. - * attach.c (reuse): Update the morecore field for reused mapped - regions to be correct for the current process. - -Mon Jun 29 10:45:25 1992 Fred Fish (fnf at cygnus.com) - - * mmtrace.c: Lint. - -Mon Jun 15 12:20:16 1992 Fred Fish (fnf@cygnus.com) - - * mmalloc.h (struct mdesc): Change member "errno" to - "saved_errno" to avoid possible conflict with ANSI C environments, - where it is allowed to be a macro. - * config/mh-ncr3000 (INSTALL): Don't use /usr/ucb/install, - it is broken on ncr 3000's. - * config/mh-ncr3000 (RANLIB): Use RANLIB=true. - -Fri Jun 12 21:34:21 1992 John Gilmore (gnu at cygnus.com) - - * mmap-sup.c: Avoid ANSI C "empty translation unit" idiocy. - -Tue Jun 9 17:29:04 1992 Fred Fish (fnf@cygnus.com) - - * config/{mh-ncr3000, mh-sysv4}: Add definition for INSTALL using - /usr/ucb/install. - -Thu Apr 30 22:36:31 1992 Fred Fish (fnf@cygnus.com) - - * sbrk-sup.c (sbrk_morecore): Fix sbrk() error return test. - -Mon Apr 20 21:03:30 1992 K. Richard Pixley (rich@cygnus.com) - - * Makefile.in: rework CFLAGS so that they can be passed from the - command line. remove MINUS_G. Default CFLAGS to -g. - -Thu Apr 16 20:00:21 1992 Fred Fish (fnf@cygnus.com) - - * TODO: New file. - * attach.c, mcalloc.c, mfree.c, mmalloc.c, mmalloc.h, mmap-sup.c, - mmcheck.c, mtrace.c, mrealloc.c, mvalloc.c, sbrk-sup.c: Lint. - -Fri Apr 10 22:59:17 1992 Fred Fish (fnf@cygnus.com) - - * configure.in: Recognize new ncr3000 config. - * config/mh-ncr3000: New config file. - * Makefile.in (MINUS_G): Add macro and default to -g. - -Wed Apr 8 09:34:53 1992 Fred Fish (fnf@cygnus.com) - - * mmalloc.c: Minor fix to comment. - * mmalloc.texi: Update to match actual implementation - * mmalloc.h (morecore): Change prototype's 2nd arg to int. - -Tue Apr 7 22:16:09 1992 Fred Fish (fnf@cygnus.com) - - * mmalloc.h (size_t, CHAR_BIT): Only redefine if not already - defined. - -Mon Apr 6 20:49:33 1992 Fred Fish (fnf@cygnus.com) - - * mmalloc.h: Remove include of . This also gets rid - of the ugly kludge installed on 1-Apr-92. - -Mon Apr 6 16:33:37 1992 Stu Grossman (grossman at cygnus.com) - - * detach.c (mmalloc_detach): Arg should be PTR, not void *. - Fixes complaints from non __STDC__ systems. - -Wed Apr 1 11:47:02 1992 Fred Fish (fnf@cygnus.com) - - * mcalloc.c, mfree.c, mmalloc.c, mrealloc.c: Minor comment - change. - * mmalloc.h: Add ugly kludge to band-aid over problems with - bogus vendor files. - -Sun Mar 29 12:41:31 1992 John Gilmore (gnu at cygnus.com) - - * attach.c, mmalloc.c, mmcheck.c: Lint. - -Thu Mar 26 17:06:04 1992 Fred Fish (fnf@cygnus.com) - - * attach.c (reuse): Explicitly discard return value of mmcheck. - * mmcheck.c (mmcheck): Document requirements for installing - corruption checking hooks and set up to enforce restrictions. - -Tue Mar 24 23:41:10 1992 K. Richard Pixley (rich@cygnus.com) - - * config/mh-irix4: new file. - - * Makefile.in: added standard targets, fixed install directories. - -Sat Mar 14 17:34:59 1992 Fred Fish (fnf@cygnus.com) - - * Initial release, incorporated into gdb. - - diff --git a/mmalloc/MAINTAINERS b/mmalloc/MAINTAINERS deleted file mode 100644 index 0904867d658..00000000000 --- a/mmalloc/MAINTAINERS +++ /dev/null @@ -1,5 +0,0 @@ -The mmalloc directory is maintained by the GDB group's Host -maintainers. - -This code is in a maintain-only phase - only configury patches fixing -host compile problems are generally accepted. diff --git a/mmalloc/Makefile.in b/mmalloc/Makefile.in deleted file mode 100644 index b05aea7b08c..00000000000 --- a/mmalloc/Makefile.in +++ /dev/null @@ -1,247 +0,0 @@ -# Copyright (C) 1992 Free Software Foundation, Inc. -# This file is part of the GNU C Library. - -# The GNU C Library is free software; you can redistribute it and/or -# modify it under the terms of the GNU Library General Public License as -# published by the Free Software Foundation; either version 2 of the -# License, or (at your option) any later version. - -# The GNU C Library is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# Library General Public License for more details. - -# You should have received a copy of the GNU Library General Public -# License along with the GNU C Library; see the file COPYING.LIB. If -# not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, -# Boston, MA 02111-1307, USA. - -# -# Makefile for mmalloc directory -# - -# Directory containing source files. Don't clean up the spacing, -# this exact string is matched for by the "configure" script. - -VPATH = @srcdir@ -srcdir = @srcdir@ - -prefix = @prefix@ -exec_prefix = @exec_prefix@ - -bindir = @bindir@ -libdir = @libdir@ - -datadir = @datadir@ -mandir = @mandir@ -man1dir = $(mandir)/man1 -man2dir = $(mandir)/man2 -man3dir = $(mandir)/man3 -man4dir = $(mandir)/man4 -man5dir = $(mandir)/man5 -man6dir = $(mandir)/man6 -man7dir = $(mandir)/man7 -man8dir = $(mandir)/man8 -man9dir = $(mandir)/man9 -infodir = @infodir@ -includedir = @includedir@ - -SHELL = @SHELL@ - -INSTALL = @INSTALL@ -INSTALL_PROGRAM=@INSTALL_PROGRAM@ -INSTALL_DATA = @INSTALL_DATA@ - -AR = @AR@ -AR_FLAGS = qv -CFLAGS = -g -MAKEINFO = makeinfo -RANLIB = @RANLIB@ -RM = rm - -# where to find makeinfo -MAKEINFO=makeinfo - -SET_TEXINPUTS = TEXINPUTS=${TEXIDIR}:.:$(srcdir):$(READLINE_DIR):$$TEXINPUTS - -# Files which should be generated via 'info' and installed by 'install-info' -INFO_DEPS = mmalloc.info - -# The TeX formatter -TEX = tex - -TARGETLIB = libmmalloc.a - -CFILES = mcalloc.c mfree.c mmalloc.c mmcheck.c mmemalign.c mmstats.c \ - mmtrace.c mrealloc.c mvalloc.c mmap-sup.c attach.c detach.c \ - keys.c sbrk-sup.c mm.c - -HFILES = mmalloc.h - -OFILES = mcalloc.o mfree.o mmalloc.o mmcheck.o mmemalign.o mmstats.o \ - mmtrace.o mrealloc.o mvalloc.o mmap-sup.o attach.o detach.o \ - keys.o sbrk-sup.o - -DEFS = @DEFS@ - -# The current default is to build a single object module with all the mmalloc -# functions. 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This requires, - at the minimum, some sort of cooperative locking that ensures that - only one process at a time is changing any of the mmalloc managed - data structures (its ok for the mmalloc managed data regions to be - changed at any time since we don't care about their contents). - - * In order to support multiple processes using the mmalloc managed - region, the malloc descriptor needs to be broken into two parts, - one part which is specific to the given process and is maintained - separately on a per process basis, and another part which is common - to all processes. As an example, the file descriptor is specific - to a given process, as are the morecore and abortfunc pointers. - However magic[], the version number, the flags field, etc are - common to all processes. diff --git a/mmalloc/acinclude.m4 b/mmalloc/acinclude.m4 deleted file mode 100644 index 71b09b9f6ac..00000000000 --- a/mmalloc/acinclude.m4 +++ /dev/null @@ -1 +0,0 @@ -sinclude(../bfd/acinclude.m4) diff --git a/mmalloc/aclocal.m4 b/mmalloc/aclocal.m4 deleted file mode 100644 index 7cf2a1e51d6..00000000000 --- a/mmalloc/aclocal.m4 +++ /dev/null @@ -1,14 +0,0 @@ -dnl aclocal.m4 generated automatically by aclocal 1.4 - -dnl Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc. -dnl This file is free software; the Free Software Foundation -dnl gives unlimited permission to copy and/or distribute it, -dnl with or without modifications, as long as this notice is preserved. - -dnl This program is distributed in the hope that it will be useful, -dnl but WITHOUT ANY WARRANTY, to the extent permitted by law; without -dnl even the implied warranty of MERCHANTABILITY or FITNESS FOR A -dnl PARTICULAR PURPOSE. - -sinclude(../bfd/acinclude.m4) - diff --git a/mmalloc/attach.c b/mmalloc/attach.c deleted file mode 100644 index 2bd70bfdf05..00000000000 --- a/mmalloc/attach.c +++ /dev/null @@ -1,221 +0,0 @@ -/* Initialization for access to a mmap'd malloc managed region. - Copyright 1992, 2000 Free Software Foundation, Inc. - - Contributed by Fred Fish at Cygnus Support. fnf@cygnus.com - -This file is part of the GNU C Library. - -The GNU C Library is free software; you can redistribute it and/or -modify it under the terms of the GNU Library General Public License as -published by the Free Software Foundation; either version 2 of the -License, or (at your option) any later version. - -The GNU C Library is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -Library General Public License for more details. - -You should have received a copy of the GNU Library General Public -License along with the GNU C Library; see the file COPYING.LIB. If -not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#include -#include /* After sys/types.h, at least for dpx/2. */ -#include -#include -#ifdef HAVE_UNISTD_H -#include /* Prototypes for lseek */ -#endif -#include "mmprivate.h" - -#ifndef SEEK_SET -#define SEEK_SET 0 -#endif - - -#if defined(HAVE_MMAP) - -/* Forward declarations/prototypes for local functions */ - -static struct mdesc *reuse PARAMS ((int)); - -/* Initialize access to a mmalloc managed region. - - If FD is a valid file descriptor for an open file then data for the - mmalloc managed region is mapped to that file, otherwise "/dev/zero" - is used and the data will not exist in any filesystem object. - - If the open file corresponding to FD is from a previous use of - mmalloc and passes some basic sanity checks to ensure that it is - compatible with the current mmalloc package, then it's data is - mapped in and is immediately accessible at the same addresses in - the current process as the process that created the file. - - If BASEADDR is not NULL, the mapping is established starting at the - specified address in the process address space. If BASEADDR is NULL, - the mmalloc package chooses a suitable address at which to start the - mapped region, which will be the value of the previous mapping if - opening an existing file which was previously built by mmalloc, or - for new files will be a value chosen by mmap. - - Specifying BASEADDR provides more control over where the regions - start and how big they can be before bumping into existing mapped - regions or future mapped regions. - - On success, returns a "malloc descriptor" which is used in subsequent - calls to other mmalloc package functions. It is explicitly "void *" - ("char *" for systems that don't fully support void) so that users - of the package don't have to worry about the actual implementation - details. - - On failure returns NULL. */ - -PTR -mmalloc_attach (fd, baseaddr) - int fd; - PTR baseaddr; -{ - struct mdesc mtemp; - struct mdesc *mdp; - PTR mbase; - struct stat sbuf; - - /* First check to see if FD is a valid file descriptor, and if so, see - if the file has any current contents (size > 0). If it does, then - attempt to reuse the file. If we can't reuse the file, either - because it isn't a valid mmalloc produced file, was produced by an - obsolete version, or any other reason, then we fail to attach to - this file. */ - - if (fd >= 0) - { - if (fstat (fd, &sbuf) < 0) - { - return (NULL); - } - else if (sbuf.st_size > 0) - { - return ((PTR) reuse (fd)); - } - } - - /* We start off with the malloc descriptor allocated on the stack, until - we build it up enough to call _mmalloc_mmap_morecore() to allocate the - first page of the region and copy it there. Ensure that it is zero'd and - then initialize the fields that we know values for. */ - - mdp = &mtemp; - memset ((char *) mdp, 0, sizeof (mtemp)); - strncpy (mdp -> magic, MMALLOC_MAGIC, MMALLOC_MAGIC_SIZE); - mdp -> headersize = sizeof (mtemp); - mdp -> version = MMALLOC_VERSION; - mdp -> morecore = __mmalloc_mmap_morecore; - mdp -> fd = fd; - mdp -> base = mdp -> breakval = mdp -> top = baseaddr; - - /* If we have not been passed a valid open file descriptor for the file - to map to, then open /dev/zero and use that to map to. */ - - if (mdp -> fd < 0) - { - if ((mdp -> fd = open ("/dev/zero", O_RDWR)) < 0) - { - return (NULL); - } - else - { - mdp -> flags |= MMALLOC_DEVZERO; - } - } - - /* Now try to map in the first page, copy the malloc descriptor structure - there, and arrange to return a pointer to this new copy. If the mapping - fails, then close the file descriptor if it was opened by us, and arrange - to return a NULL. */ - - if ((mbase = mdp -> morecore (mdp, sizeof (mtemp))) != NULL) - { - memcpy (mbase, mdp, sizeof (mtemp)); - mdp = (struct mdesc *) mbase; - } - else - { - if (mdp -> flags & MMALLOC_DEVZERO) - { - close (mdp -> fd); - } - mdp = NULL; - } - - return ((PTR) mdp); -} - -/* Given an valid file descriptor on an open file, test to see if that file - is a valid mmalloc produced file, and if so, attempt to remap it into the - current process at the same address to which it was previously mapped. - - Note that we have to update the file descriptor number in the malloc- - descriptor read from the file to match the current valid one, before - trying to map the file in, and again after a successful mapping and - after we've switched over to using the mapped in malloc descriptor - rather than the temporary one on the stack. - - Once we've switched over to using the mapped in malloc descriptor, we - have to update the pointer to the morecore function, since it almost - certainly will be at a different address if the process reusing the - mapped region is from a different executable. - - Also note that if the heap being remapped previously used the mmcheckf() - routines, we need to update the hooks since their target functions - will have certainly moved if the executable has changed in any way. - We do this by calling mmcheckf() internally. - - Returns a pointer to the malloc descriptor if successful, or NULL if - unsuccessful for some reason. */ - -static struct mdesc * -reuse (fd) - int fd; -{ - struct mdesc mtemp; - struct mdesc *mdp = NULL; - - if ((lseek (fd, 0L, SEEK_SET) == 0) && - (read (fd, (char *) &mtemp, sizeof (mtemp)) == sizeof (mtemp)) && - (mtemp.headersize == sizeof (mtemp)) && - (strcmp (mtemp.magic, MMALLOC_MAGIC) == 0) && - (mtemp.version <= MMALLOC_VERSION)) - { - mtemp.fd = fd; - if (__mmalloc_remap_core (&mtemp) == mtemp.base) - { - mdp = (struct mdesc *) mtemp.base; - mdp -> fd = fd; - mdp -> morecore = __mmalloc_mmap_morecore; - if (mdp -> mfree_hook != NULL) - { - mmcheckf ((PTR) mdp, (void (*) PARAMS ((void))) NULL, 1); - } - } - } - return (mdp); -} - -#else /* !defined (HAVE_MMAP) */ - -/* For systems without mmap, the library still supplies an entry point - to link to, but trying to initialize access to an mmap'd managed region - always fails. */ - -/* ARGSUSED */ -PTR -mmalloc_attach (fd, baseaddr) - int fd; - PTR baseaddr; -{ - return (NULL); -} - -#endif /* defined (HAVE_MMAP) */ - diff --git a/mmalloc/configure b/mmalloc/configure deleted file mode 100755 index 8420dfada29..00000000000 --- a/mmalloc/configure +++ /dev/null @@ -1,1747 +0,0 @@ -#! /bin/sh - -# Guess values for system-dependent variables and create Makefiles. -# Generated automatically using autoconf version 2.13 -# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc. -# -# This configure script is free software; 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See the -dnl GNU General Public License for more details. -dnl -dnl You should have received a copy of the GNU General Public License -dnl along with this program; if not, write to the Free Software -dnl Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -dnl Process this file with autoconf to produce a configure script. - -AC_PREREQ(2.12.1)dnl -AC_INIT(mmalloc.c) - -AC_PROG_CC -AC_PROG_INSTALL -AC_CHECK_TOOL(AR, ar) -AC_CHECK_TOOL(RANLIB, ranlib, :) - -AC_FUNC_MMAP -AC_CHECK_HEADERS(limits.h stddef.h unistd.h) - -BFD_NEED_DECLARATION(sbrk) -BFD_NEED_DECLARATION(getpagesize) - -AC_OUTPUT(Makefile) diff --git a/mmalloc/detach.c b/mmalloc/detach.c deleted file mode 100644 index 1780679417d..00000000000 --- a/mmalloc/detach.c +++ /dev/null @@ -1,71 +0,0 @@ -/* Finish access to a mmap'd malloc managed region. - Copyright 1992 Free Software Foundation, Inc. - - Contributed by Fred Fish at Cygnus Support. fnf@cygnus.com - -This file is part of the GNU C Library. - -The GNU C Library is free software; you can redistribute it and/or -modify it under the terms of the GNU Library General Public License as -published by the Free Software Foundation; either version 2 of the -License, or (at your option) any later version. - -The GNU C Library is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -Library General Public License for more details. - -You should have received a copy of the GNU Library General Public -License along with the GNU C Library; see the file COPYING.LIB. If -not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#include -#include "mmprivate.h" - -/* Terminate access to a mmalloc managed region by unmapping all memory pages - associated with the region, and closing the file descriptor if it is one - that we opened. - - Returns NULL on success. - - Returns the malloc descriptor on failure, which can subsequently be used - for further action, such as obtaining more information about the nature of - the failure by examining the preserved errno value. - - Note that the malloc descriptor that we are using is currently located in - region we are about to unmap, so we first make a local copy of it on the - stack and use the copy. */ - -PTR -mmalloc_detach (md) - PTR md; -{ - struct mdesc mtemp; - - if (md != NULL) - { - - mtemp = *(struct mdesc *) md; - - /* Now unmap all the pages associated with this region by asking for a - negative increment equal to the current size of the region. */ - - if ((mtemp.morecore (&mtemp, mtemp.base - mtemp.breakval)) == NULL) - { - /* Deallocating failed. Update the original malloc descriptor - with any changes */ - *(struct mdesc *) md = mtemp; - } - else - { - if (mtemp.flags & MMALLOC_DEVZERO) - { - close (mtemp.fd); - } - md = NULL; - } - } - - return (md); -} diff --git a/mmalloc/keys.c b/mmalloc/keys.c deleted file mode 100644 index 35f00d19ba3..00000000000 --- a/mmalloc/keys.c +++ /dev/null @@ -1,66 +0,0 @@ -/* Access for application keys in mmap'd malloc managed region. - Copyright 1992 Free Software Foundation, Inc. - - Contributed by Fred Fish at Cygnus Support. fnf@cygnus.com - -This file is part of the GNU C Library. - -The GNU C Library is free software; you can redistribute it and/or -modify it under the terms of the GNU Library General Public License as -published by the Free Software Foundation; either version 2 of the -License, or (at your option) any later version. - -The GNU C Library is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -Library General Public License for more details. - -You should have received a copy of the GNU Library General Public -License along with the GNU C Library; see the file COPYING.LIB. If -not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -/* This module provides access to some keys that the application can use to - provide persistent access to locations in the mapped memory section. - The intent is that these keys are to be used sparingly as sort of - persistent global variables which the application can use to reinitialize - access to data in the mapped region. - - For the moment, these keys are simply stored in the malloc descriptor - itself, in an array of fixed length. This should be fixed so that there - can be an unlimited number of keys, possibly using a multilevel access - scheme of some sort. */ - -#include "mmprivate.h" - -int -mmalloc_setkey (md, keynum, key) - PTR md; - int keynum; - PTR key; -{ - struct mdesc *mdp = (struct mdesc *) md; - int result = 0; - - if ((mdp != NULL) && (keynum >= 0) && (keynum < MMALLOC_KEYS)) - { - mdp -> keys [keynum] = key; - result++; - } - return (result); -} - -PTR -mmalloc_getkey (md, keynum) - PTR md; - int keynum; -{ - struct mdesc *mdp = (struct mdesc *) md; - PTR keyval = NULL; - - if ((mdp != NULL) && (keynum >= 0) && (keynum < MMALLOC_KEYS)) - { - keyval = mdp -> keys [keynum]; - } - return (keyval); -} diff --git a/mmalloc/mcalloc.c b/mmalloc/mcalloc.c deleted file mode 100644 index c9fcc07e894..00000000000 --- a/mmalloc/mcalloc.c +++ /dev/null @@ -1,54 +0,0 @@ -/* Copyright (C) 1991, 1992 Free Software Foundation, Inc. -This file is part of the GNU C Library. - -The GNU C Library is free software; you can redistribute it and/or -modify it under the terms of the GNU Library General Public License as -published by the Free Software Foundation; either version 2 of the -License, or (at your option) any later version. - -The GNU C Library is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -Library General Public License for more details. - -You should have received a copy of the GNU Library General Public -License along with the GNU C Library; see the file COPYING.LIB. If -not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#include /* GCC on HP/UX needs this before string.h. */ -#include /* Prototypes for memcpy, memmove, memset, etc */ - -#include "mmprivate.h" - -/* Allocate an array of NMEMB elements each SIZE bytes long. - The entire array is initialized to zeros. */ - -PTR -mcalloc (md, nmemb, size) - PTR md; - register size_t nmemb; - register size_t size; -{ - register PTR result; - - if ((result = mmalloc (md, nmemb * size)) != NULL) - { - memset (result, 0, nmemb * size); - } - return (result); -} - -/* When using this package, provide a version of malloc/realloc/free built - on top of it, so that if we use the default sbrk() region we will not - collide with another malloc package trying to do the same thing, if - the application contains any "hidden" calls to malloc/realloc/free (such - as inside a system library). */ - -PTR -calloc (nmemb, size) - size_t nmemb; - size_t size; -{ - return (mcalloc ((PTR) NULL, nmemb, size)); -} diff --git a/mmalloc/mfree.c b/mmalloc/mfree.c deleted file mode 100644 index c509ac6e2a6..00000000000 --- a/mmalloc/mfree.c +++ /dev/null @@ -1,247 +0,0 @@ -/* Free a block of memory allocated by `mmalloc'. - Copyright 1990, 1991, 1992 Free Software Foundation - - Written May 1989 by Mike Haertel. - Heavily modified Mar 1992 by Fred Fish. (fnf@cygnus.com) - -The GNU C Library is free software; you can redistribute it and/or -modify it under the terms of the GNU Library General Public License as -published by the Free Software Foundation; either version 2 of the -License, or (at your option) any later version. - -The GNU C Library is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -Library General Public License for more details. - -You should have received a copy of the GNU Library General Public -License along with the GNU C Library; see the file COPYING.LIB. If -not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. - - The author may be reached (Email) at the address mike@ai.mit.edu, - or (US mail) as Mike Haertel c/o Free Software Foundation. */ - -#include "mmprivate.h" - -/* Return memory to the heap. - Like `mfree' but don't call a mfree_hook if there is one. */ - -void -__mmalloc_free (mdp, ptr) - struct mdesc *mdp; - PTR ptr; -{ - int type; - size_t block, blocks; - register size_t i; - struct list *prev, *next; - - block = BLOCK (ptr); - - type = mdp -> heapinfo[block].busy.type; - switch (type) - { - case 0: - /* Get as many statistics as early as we can. */ - mdp -> heapstats.chunks_used--; - mdp -> heapstats.bytes_used -= - mdp -> heapinfo[block].busy.info.size * BLOCKSIZE; - mdp -> heapstats.bytes_free += - mdp -> heapinfo[block].busy.info.size * BLOCKSIZE; - - /* Find the free cluster previous to this one in the free list. - Start searching at the last block referenced; this may benefit - programs with locality of allocation. */ - i = mdp -> heapindex; - if (i > block) - { - while (i > block) - { - i = mdp -> heapinfo[i].free.prev; - } - } - else - { - do - { - i = mdp -> heapinfo[i].free.next; - } - while ((i != 0) && (i < block)); - i = mdp -> heapinfo[i].free.prev; - } - - /* Determine how to link this block into the free list. */ - if (block == i + mdp -> heapinfo[i].free.size) - { - /* Coalesce this block with its predecessor. */ - mdp -> heapinfo[i].free.size += - mdp -> heapinfo[block].busy.info.size; - block = i; - } - else - { - /* Really link this block back into the free list. */ - mdp -> heapinfo[block].free.size = - mdp -> heapinfo[block].busy.info.size; - mdp -> heapinfo[block].free.next = mdp -> heapinfo[i].free.next; - mdp -> heapinfo[block].free.prev = i; - mdp -> heapinfo[i].free.next = block; - mdp -> heapinfo[mdp -> heapinfo[block].free.next].free.prev = block; - mdp -> heapstats.chunks_free++; - } - - /* Now that the block is linked in, see if we can coalesce it - with its successor (by deleting its successor from the list - and adding in its size). */ - if (block + mdp -> heapinfo[block].free.size == - mdp -> heapinfo[block].free.next) - { - mdp -> heapinfo[block].free.size - += mdp -> heapinfo[mdp -> heapinfo[block].free.next].free.size; - mdp -> heapinfo[block].free.next - = mdp -> heapinfo[mdp -> heapinfo[block].free.next].free.next; - mdp -> heapinfo[mdp -> heapinfo[block].free.next].free.prev = block; - mdp -> heapstats.chunks_free--; - } - - /* Now see if we can return stuff to the system. */ - blocks = mdp -> heapinfo[block].free.size; - if (blocks >= FINAL_FREE_BLOCKS && block + blocks == mdp -> heaplimit - && mdp -> morecore (mdp, 0) == ADDRESS (block + blocks)) - { - register size_t bytes = blocks * BLOCKSIZE; - mdp -> heaplimit -= blocks; - mdp -> morecore (mdp, -bytes); - mdp -> heapinfo[mdp -> heapinfo[block].free.prev].free.next - = mdp -> heapinfo[block].free.next; - mdp -> heapinfo[mdp -> heapinfo[block].free.next].free.prev - = mdp -> heapinfo[block].free.prev; - block = mdp -> heapinfo[block].free.prev; - mdp -> heapstats.chunks_free--; - mdp -> heapstats.bytes_free -= bytes; - } - - /* Set the next search to begin at this block. */ - mdp -> heapindex = block; - break; - - default: - /* Do some of the statistics. */ - mdp -> heapstats.chunks_used--; - mdp -> heapstats.bytes_used -= 1 << type; - mdp -> heapstats.chunks_free++; - mdp -> heapstats.bytes_free += 1 << type; - - /* Get the address of the first free fragment in this block. */ - prev = (struct list *) - ((char *) ADDRESS(block) + - (mdp -> heapinfo[block].busy.info.frag.first << type)); - - if (mdp -> heapinfo[block].busy.info.frag.nfree == - (BLOCKSIZE >> type) - 1) - { - /* If all fragments of this block are free, remove them - from the fragment list and free the whole block. */ - next = prev; - for (i = 1; i < (size_t) (BLOCKSIZE >> type); ++i) - { - next = next -> next; - } - prev -> prev -> next = next; - if (next != NULL) - { - next -> prev = prev -> prev; - } - mdp -> heapinfo[block].busy.type = 0; - mdp -> heapinfo[block].busy.info.size = 1; - - /* Keep the statistics accurate. */ - mdp -> heapstats.chunks_used++; - mdp -> heapstats.bytes_used += BLOCKSIZE; - mdp -> heapstats.chunks_free -= BLOCKSIZE >> type; - mdp -> heapstats.bytes_free -= BLOCKSIZE; - - mfree ((PTR) mdp, (PTR) ADDRESS(block)); - } - else if (mdp -> heapinfo[block].busy.info.frag.nfree != 0) - { - /* If some fragments of this block are free, link this - fragment into the fragment list after the first free - fragment of this block. */ - next = (struct list *) ptr; - next -> next = prev -> next; - next -> prev = prev; - prev -> next = next; - if (next -> next != NULL) - { - next -> next -> prev = next; - } - ++mdp -> heapinfo[block].busy.info.frag.nfree; - } - else - { - /* No fragments of this block are free, so link this - fragment into the fragment list and announce that - it is the first free fragment of this block. */ - prev = (struct list *) ptr; - mdp -> heapinfo[block].busy.info.frag.nfree = 1; - mdp -> heapinfo[block].busy.info.frag.first = - RESIDUAL (ptr, BLOCKSIZE) >> type; - prev -> next = mdp -> fraghead[type].next; - prev -> prev = &mdp -> fraghead[type]; - prev -> prev -> next = prev; - if (prev -> next != NULL) - { - prev -> next -> prev = prev; - } - } - break; - } -} - -/* Return memory to the heap. */ - -void -mfree (md, ptr) - PTR md; - PTR ptr; -{ - struct mdesc *mdp; - register struct alignlist *l; - - if (ptr != NULL) - { - mdp = MD_TO_MDP (md); - for (l = mdp -> aligned_blocks; l != NULL; l = l -> next) - { - if (l -> aligned == ptr) - { - l -> aligned = NULL; /* Mark the slot in the list as free. */ - ptr = l -> exact; - break; - } - } - if (mdp -> mfree_hook != NULL) - { - (*mdp -> mfree_hook) (md, ptr); - } - else - { - __mmalloc_free (mdp, ptr); - } - } -} - -/* When using this package, provide a version of malloc/realloc/free built - on top of it, so that if we use the default sbrk() region we will not - collide with another malloc package trying to do the same thing, if - the application contains any "hidden" calls to malloc/realloc/free (such - as inside a system library). */ - -void -free (ptr) - PTR ptr; -{ - mfree ((PTR) NULL, ptr); -} diff --git a/mmalloc/mm.c b/mmalloc/mm.c deleted file mode 100644 index d487e0cf518..00000000000 --- a/mmalloc/mm.c +++ /dev/null @@ -1,40 +0,0 @@ -/* Build the entire mmalloc library as a single object module. This - avoids having clients pick up part of their allocation routines - from mmalloc and part from libc, which results in undefined - behavior. It should also still be possible to build the library - as a standard library with multiple objects. - - Copyright 1996, 2000 Free Software Foundation - -The GNU C Library is free software; you can redistribute it and/or -modify it under the terms of the GNU Library General Public License as -published by the Free Software Foundation; either version 2 of the -License, or (at your option) any later version. - -The GNU C Library is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -Library General Public License for more details. - -You should have received a copy of the GNU Library General Public -License along with the GNU C Library; see the file COPYING.LIB. If -not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#ifdef HAVE_UNISTD_H -#include /* Prototypes for lseek, sbrk (maybe) */ -#endif -#include "mcalloc.c" -#include "mfree.c" -#include "mmalloc.c" -#include "mmcheck.c" -#include "mmemalign.c" -#include "mmstats.c" -#include "mmtrace.c" -#include "mrealloc.c" -#include "mvalloc.c" -#include "mmap-sup.c" -#include "attach.c" -#include "detach.c" -#include "keys.c" -#include "sbrk-sup.c" diff --git a/mmalloc/mmalloc.c b/mmalloc/mmalloc.c deleted file mode 100644 index 7c60fe2d57b..00000000000 --- a/mmalloc/mmalloc.c +++ /dev/null @@ -1,337 +0,0 @@ -/* Memory allocator `malloc'. - Copyright 1990, 1991, 1992 Free Software Foundation - - Written May 1989 by Mike Haertel. - Heavily modified Mar 1992 by Fred Fish for mmap'd version. - -The GNU C Library is free software; you can redistribute it and/or -modify it under the terms of the GNU Library General Public License as -published by the Free Software Foundation; either version 2 of the -License, or (at your option) any later version. - -The GNU C Library is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -Library General Public License for more details. - -You should have received a copy of the GNU Library General Public -License along with the GNU C Library; see the file COPYING.LIB. If -not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. - - The author may be reached (Email) at the address mike@ai.mit.edu, - or (US mail) as Mike Haertel c/o Free Software Foundation. */ - -#include /* Prototypes for memcpy, memmove, memset, etc */ - -#include "mmprivate.h" - -/* Prototypes for local functions */ - -static int initialize PARAMS ((struct mdesc *)); -static PTR morecore PARAMS ((struct mdesc *, size_t)); -static PTR align PARAMS ((struct mdesc *, size_t)); - -/* Aligned allocation. */ - -static PTR -align (mdp, size) - struct mdesc *mdp; - size_t size; -{ - PTR result; - unsigned long int adj; - - result = mdp -> morecore (mdp, size); - adj = RESIDUAL (result, BLOCKSIZE); - if (adj != 0) - { - adj = BLOCKSIZE - adj; - mdp -> morecore (mdp, adj); - result = (char *) result + adj; - } - return (result); -} - -/* Set everything up and remember that we have. */ - -static int -initialize (mdp) - struct mdesc *mdp; -{ - mdp -> heapsize = HEAP / BLOCKSIZE; - mdp -> heapinfo = (malloc_info *) - align (mdp, mdp -> heapsize * sizeof (malloc_info)); - if (mdp -> heapinfo == NULL) - { - return (0); - } - memset ((PTR)mdp -> heapinfo, 0, mdp -> heapsize * sizeof (malloc_info)); - mdp -> heapinfo[0].free.size = 0; - mdp -> heapinfo[0].free.next = mdp -> heapinfo[0].free.prev = 0; - mdp -> heapindex = 0; - mdp -> heapbase = (char *) mdp -> heapinfo; - mdp -> flags |= MMALLOC_INITIALIZED; - return (1); -} - -/* Get neatly aligned memory, initializing or - growing the heap info table as necessary. */ - -static PTR -morecore (mdp, size) - struct mdesc *mdp; - size_t size; -{ - PTR result; - malloc_info *newinfo, *oldinfo; - size_t newsize; - - result = align (mdp, size); - if (result == NULL) - { - return (NULL); - } - - /* Check if we need to grow the info table. */ - if ((size_t) BLOCK ((char *) result + size) > mdp -> heapsize) - { - newsize = mdp -> heapsize; - while ((size_t) BLOCK ((char *) result + size) > newsize) - { - newsize *= 2; - } - newinfo = (malloc_info *) align (mdp, newsize * sizeof (malloc_info)); - if (newinfo == NULL) - { - mdp -> morecore (mdp, -size); - return (NULL); - } - memset ((PTR) newinfo, 0, newsize * sizeof (malloc_info)); - memcpy ((PTR) newinfo, (PTR) mdp -> heapinfo, - mdp -> heapsize * sizeof (malloc_info)); - oldinfo = mdp -> heapinfo; - newinfo[BLOCK (oldinfo)].busy.type = 0; - newinfo[BLOCK (oldinfo)].busy.info.size - = BLOCKIFY (mdp -> heapsize * sizeof (malloc_info)); - mdp -> heapinfo = newinfo; - __mmalloc_free (mdp, (PTR)oldinfo); - mdp -> heapsize = newsize; - } - - mdp -> heaplimit = BLOCK ((char *) result + size); - return (result); -} - -/* Allocate memory from the heap. */ - -PTR -mmalloc (md, size) - PTR md; - size_t size; -{ - struct mdesc *mdp; - PTR result; - size_t block, blocks, lastblocks, start; - register size_t i; - struct list *next; - register size_t log; - - if (size == 0) - { - return (NULL); - } - - mdp = MD_TO_MDP (md); - - if (mdp -> mmalloc_hook != NULL) - { - return ((*mdp -> mmalloc_hook) (md, size)); - } - - if (!(mdp -> flags & MMALLOC_INITIALIZED)) - { - if (!initialize (mdp)) - { - return (NULL); - } - } - - if (size < sizeof (struct list)) - { - size = sizeof (struct list); - } - - /* Determine the allocation policy based on the request size. */ - if (size <= BLOCKSIZE / 2) - { - /* Small allocation to receive a fragment of a block. - Determine the logarithm to base two of the fragment size. */ - log = 1; - --size; - while ((size /= 2) != 0) - { - ++log; - } - - /* Look in the fragment lists for a - free fragment of the desired size. */ - next = mdp -> fraghead[log].next; - if (next != NULL) - { - /* There are free fragments of this size. - Pop a fragment out of the fragment list and return it. - Update the block's nfree and first counters. */ - result = (PTR) next; - next -> prev -> next = next -> next; - if (next -> next != NULL) - { - next -> next -> prev = next -> prev; - } - block = BLOCK (result); - if (--mdp -> heapinfo[block].busy.info.frag.nfree != 0) - { - mdp -> heapinfo[block].busy.info.frag.first = - RESIDUAL (next -> next, BLOCKSIZE) >> log; - } - - /* Update the statistics. */ - mdp -> heapstats.chunks_used++; - mdp -> heapstats.bytes_used += 1 << log; - mdp -> heapstats.chunks_free--; - mdp -> heapstats.bytes_free -= 1 << log; - } - else - { - /* No free fragments of the desired size, so get a new block - and break it into fragments, returning the first. */ - result = mmalloc (md, BLOCKSIZE); - if (result == NULL) - { - return (NULL); - } - - /* Link all fragments but the first into the free list. */ - for (i = 1; i < (size_t) (BLOCKSIZE >> log); ++i) - { - next = (struct list *) ((char *) result + (i << log)); - next -> next = mdp -> fraghead[log].next; - next -> prev = &mdp -> fraghead[log]; - next -> prev -> next = next; - if (next -> next != NULL) - { - next -> next -> prev = next; - } - } - - /* Initialize the nfree and first counters for this block. */ - block = BLOCK (result); - mdp -> heapinfo[block].busy.type = log; - mdp -> heapinfo[block].busy.info.frag.nfree = i - 1; - mdp -> heapinfo[block].busy.info.frag.first = i - 1; - - mdp -> heapstats.chunks_free += (BLOCKSIZE >> log) - 1; - mdp -> heapstats.bytes_free += BLOCKSIZE - (1 << log); - mdp -> heapstats.bytes_used -= BLOCKSIZE - (1 << log); - } - } - else - { - /* Large allocation to receive one or more blocks. - Search the free list in a circle starting at the last place visited. - If we loop completely around without finding a large enough - space we will have to get more memory from the system. */ - blocks = BLOCKIFY(size); - start = block = MALLOC_SEARCH_START; - while (mdp -> heapinfo[block].free.size < blocks) - { - block = mdp -> heapinfo[block].free.next; - if (block == start) - { - /* Need to get more from the system. Check to see if - the new core will be contiguous with the final free - block; if so we don't need to get as much. */ - block = mdp -> heapinfo[0].free.prev; - lastblocks = mdp -> heapinfo[block].free.size; - if (mdp -> heaplimit != 0 && - block + lastblocks == mdp -> heaplimit && - mdp -> morecore (mdp, 0) == ADDRESS(block + lastblocks) && - (morecore (mdp, (blocks - lastblocks) * BLOCKSIZE)) != NULL) - { - /* Which block we are extending (the `final free - block' referred to above) might have changed, if - it got combined with a freed info table. */ - block = mdp -> heapinfo[0].free.prev; - - mdp -> heapinfo[block].free.size += (blocks - lastblocks); - mdp -> heapstats.bytes_free += - (blocks - lastblocks) * BLOCKSIZE; - continue; - } - result = morecore(mdp, blocks * BLOCKSIZE); - if (result == NULL) - { - return (NULL); - } - block = BLOCK (result); - mdp -> heapinfo[block].busy.type = 0; - mdp -> heapinfo[block].busy.info.size = blocks; - mdp -> heapstats.chunks_used++; - mdp -> heapstats.bytes_used += blocks * BLOCKSIZE; - return (result); - } - } - - /* At this point we have found a suitable free list entry. - Figure out how to remove what we need from the list. */ - result = ADDRESS(block); - if (mdp -> heapinfo[block].free.size > blocks) - { - /* The block we found has a bit left over, - so relink the tail end back into the free list. */ - mdp -> heapinfo[block + blocks].free.size - = mdp -> heapinfo[block].free.size - blocks; - mdp -> heapinfo[block + blocks].free.next - = mdp -> heapinfo[block].free.next; - mdp -> heapinfo[block + blocks].free.prev - = mdp -> heapinfo[block].free.prev; - mdp -> heapinfo[mdp -> heapinfo[block].free.prev].free.next - = mdp -> heapinfo[mdp -> heapinfo[block].free.next].free.prev - = mdp -> heapindex = block + blocks; - } - else - { - /* The block exactly matches our requirements, - so just remove it from the list. */ - mdp -> heapinfo[mdp -> heapinfo[block].free.next].free.prev - = mdp -> heapinfo[block].free.prev; - mdp -> heapinfo[mdp -> heapinfo[block].free.prev].free.next - = mdp -> heapindex = mdp -> heapinfo[block].free.next; - mdp -> heapstats.chunks_free--; - } - - mdp -> heapinfo[block].busy.type = 0; - mdp -> heapinfo[block].busy.info.size = blocks; - mdp -> heapstats.chunks_used++; - mdp -> heapstats.bytes_used += blocks * BLOCKSIZE; - mdp -> heapstats.bytes_free -= blocks * BLOCKSIZE; - } - - return (result); -} - -/* When using this package, provide a version of malloc/realloc/free built - on top of it, so that if we use the default sbrk() region we will not - collide with another malloc package trying to do the same thing, if - the application contains any "hidden" calls to malloc/realloc/free (such - as inside a system library). */ - -PTR -malloc (size) - size_t size; -{ - PTR result; - - result = mmalloc ((PTR) NULL, size); - return (result); -} diff --git a/mmalloc/mmalloc.h b/mmalloc/mmalloc.h deleted file mode 100644 index 082547ea504..00000000000 --- a/mmalloc/mmalloc.h +++ /dev/null @@ -1,62 +0,0 @@ -#ifndef MMALLOC_H -#define MMALLOC_H 1 - -#ifdef HAVE_STDDEF_H -# include -#else -# include /* for size_t */ -# include /* for NULL */ -#endif - -#include "ansidecl.h" - -/* Allocate SIZE bytes of memory. */ - -extern PTR mmalloc PARAMS ((PTR, size_t)); - -/* Re-allocate the previously allocated block in PTR, making the new block - SIZE bytes long. */ - -extern PTR mrealloc PARAMS ((PTR, PTR, size_t)); - -/* Allocate NMEMB elements of SIZE bytes each, all initialized to 0. */ - -extern PTR mcalloc PARAMS ((PTR, size_t, size_t)); - -/* Free a block allocated by `mmalloc', `mrealloc' or `mcalloc'. */ - -extern void mfree PARAMS ((PTR, PTR)); - -/* Allocate SIZE bytes allocated to ALIGNMENT bytes. */ - -extern PTR mmemalign PARAMS ((PTR, size_t, size_t)); - -/* Allocate SIZE bytes on a page boundary. */ - -extern PTR mvalloc PARAMS ((PTR, size_t)); - -/* Activate a standard collection of debugging hooks. */ - -extern int mmcheck PARAMS ((PTR, void (*) (void))); - -extern int mmcheckf PARAMS ((PTR, void (*) (void), int)); - -/* Pick up the current statistics. (see FIXME elsewhere) */ - -extern struct mstats mmstats PARAMS ((PTR)); - -extern PTR mmalloc_attach PARAMS ((int, PTR)); - -extern PTR mmalloc_detach PARAMS ((PTR)); - -extern int mmalloc_setkey PARAMS ((PTR, int, PTR)); - -extern PTR mmalloc_getkey PARAMS ((PTR, int)); - -extern int mmalloc_errno PARAMS ((PTR)); - -extern int mmtrace PARAMS ((void)); - -extern PTR mmalloc_findbase PARAMS ((int)); - -#endif /* MMALLOC_H */ diff --git a/mmalloc/mmalloc.texi b/mmalloc/mmalloc.texi deleted file mode 100644 index c038f651b3a..00000000000 --- a/mmalloc/mmalloc.texi +++ /dev/null @@ -1,258 +0,0 @@ -\input texinfo @c -*- Texinfo -*- -@setfilename mmalloc.info - -@ifinfo -@format -START-INFO-DIR-ENTRY -* Mmalloc: (mmalloc). The GNU mapped-malloc package. -END-INFO-DIR-ENTRY -@end format - -This file documents the GNU mmalloc (mapped-malloc) package, written by -fnf@@cygnus.com, based on GNU malloc written by mike@@ai.mit.edu. - -Copyright (C) 1992 Free Software Foundation, Inc. - -Permission is granted to make and distribute verbatim copies of -this manual provided the copyright notice and this permission notice -are preserved on all copies. - -@ignore -Permission is granted to process this file through Tex and print the -results, provided the printed document carries copying permission -notice identical to this one except for the removal of this paragraph -(this paragraph not being relevant to the printed manual). - -@end ignore -Permission is granted to copy and distribute modified versions of this -manual under the conditions for verbatim copying, provided also that the -entire resulting derived work is distributed under the terms of a -permission notice identical to this one. - -Permission is granted to copy and distribute translations of this manual -into another language, under the above conditions for modified versions. -@end ifinfo -@iftex -@c @finalout -@setchapternewpage odd -@settitle MMALLOC, the GNU memory-mapped malloc package -@titlepage -@title mmalloc -@subtitle The GNU memory-mapped malloc package -@author Fred Fish -@author Cygnus Support -@author Mike Haertel -@author Free Software Foundation -@page - -@tex -\def\$#1${{#1}} % Kluge: collect RCS revision info without $...$ -\xdef\manvers{\$Revision$} % For use in headers, footers too -{\parskip=0pt -\hfill Cygnus Support\par -\hfill fnf\@cygnus.com\par -\hfill {\it MMALLOC, the GNU memory-mapped malloc package}, \manvers\par -\hfill \TeX{}info \texinfoversion\par -} -@end tex - -@vskip 0pt plus 1filll -Copyright @copyright{} 1992 Free Software Foundation, Inc. - -Permission is granted to make and distribute verbatim copies of -this manual provided the copyright notice and this permission notice -are preserved on all copies. - -Permission is granted to copy and distribute modified versions of this -manual under the conditions for verbatim copying, provided also that -the entire resulting derived work is distributed under the terms of a -permission notice identical to this one. - -Permission is granted to copy and distribute translations of this manual -into another language, under the above conditions for modified versions. -@end titlepage -@end iftex - -@ifinfo -@node Top, Overview, (dir), (dir) -@top mmalloc -This file documents the GNU memory-mapped malloc package mmalloc. - -@menu -* Overview:: Overall Description -* Implementation:: Implementation - - --- The Detailed Node Listing --- - -Implementation - -* Compatibility:: Backwards Compatibility -* Functions:: Function Descriptions -@end menu - -@end ifinfo - -@node Overview, Implementation, Top, Top -@chapter Overall Description - -This is a heavily modified version of GNU @code{malloc}. It uses -@code{mmap} as the basic mechanism for obtaining memory from the -system, rather than @code{sbrk}. This gives it several advantages over the -more traditional malloc: - -@itemize @bullet -@item -Several different heaps can be used, each of them growing -or shinking under control of @code{mmap}, with the @code{mmalloc} functions -using a specific heap on a call by call basis. - -@item -By using @code{mmap}, it is easy to create heaps which are intended to -be persistent and exist as a filesystem object after the creating -process has gone away. - -@item -Because multiple heaps can be managed, data used for a -specific purpose can be allocated into its own heap, making -it easier to allow applications to ``dump'' and ``restore'' initialized -malloc-managed memory regions. For example, the ``unexec'' hack popularized -by GNU Emacs could potentially go away. -@end itemize - -@node Implementation, , Overview, Top -@chapter Implementation - -The @code{mmalloc} functions contain no internal static state. All -@code{mmalloc} internal data is allocated in the mapped in region, along -with the user data that it manages. This allows it to manage multiple -such regions and to ``pick up where it left off'' when such regions are -later dynamically mapped back in. - -In some sense, malloc has been ``purified'' to contain no internal state -information and generalized to use multiple memory regions rather than a -single region managed by @code{sbrk}. However the new routines now need an -extra parameter which informs @code{mmalloc} which memory region it is dealing -with (along with other information). This parameter is called the -@dfn{malloc descriptor}. - -The functions initially provided by @code{mmalloc} are: - -@example -void *mmalloc_attach (int fd, void *baseaddr); -void *mmalloc_detach (void *md); -int mmalloc_errno (void *md); -int mmalloc_setkey (void *md, int keynum, void *key); -void *mmalloc_getkey (void *md, int keynum); - -void *mmalloc (void *md, size_t size); -void *mrealloc (void *md, void *ptr, size_t size); -void *mvalloc (void *md, size_t size); -void mfree (void *md, void *ptr); -@end example - -@menu -* Compatibility:: Backwards Compatibility -* Functions:: Function Descriptions -@end menu - -@node Compatibility, Functions, Implementation, Implementation -@section Backwards Compatibility - -To allow a single malloc package to be used in a given application, -provision is made for the traditional @code{malloc}, @code{realloc}, and -@code{free} functions to be implemented as special cases of the -@code{mmalloc} functions. In particular, if any of the functions that -expect malloc descriptors are called with a @code{NULL} pointer rather than a -valid malloc descriptor, then they default to using an @code{sbrk} managed -region. -The @code{mmalloc} package provides compatible @code{malloc}, @code{realloc}, -and @code{free} functions using this mechanism internally. -Applications can avoid this extra interface layer by simply including the -following defines: - -@example -#define malloc(size) mmalloc ((void *)0, (size)) -#define realloc(ptr,size) mrealloc ((void *)0, (ptr), (size)); -#define free(ptr) mfree ((void *)0, (ptr)) -@end example - -@noindent -or replace the existing @code{malloc}, @code{realloc}, and @code{free} -calls with the above patterns if using @code{#define} causes problems. - -@node Functions, , Compatibility, Implementation -@section Function Descriptions - -These are the details on the functions that make up the @code{mmalloc} -package. - -@table @code -@item void *mmalloc_attach (int @var{fd}, void *@var{baseaddr}); -Initialize access to a @code{mmalloc} managed region. - -If @var{fd} is a valid file descriptor for an open file, then data for the -@code{mmalloc} managed region is mapped to that file. Otherwise -@file{/dev/zero} is used and the data will not exist in any filesystem object. - -If the open file corresponding to @var{fd} is from a previous use of -@code{mmalloc} and passes some basic sanity checks to ensure that it is -compatible with the current @code{mmalloc} package, then its data is -mapped in and is immediately accessible at the same addresses in -the current process as the process that created the file. - -If @var{baseaddr} is not @code{NULL}, the mapping is established -starting at the specified address in the process address space. If -@var{baseaddr} is @code{NULL}, the @code{mmalloc} package chooses a -suitable address at which to start the mapped region, which will be the -value of the previous mapping if opening an existing file which was -previously built by @code{mmalloc}, or for new files will be a value -chosen by @code{mmap}. - -Specifying @var{baseaddr} provides more control over where the regions -start and how big they can be before bumping into existing mapped -regions or future mapped regions. - -On success, returns a malloc descriptor which is used in subsequent -calls to other @code{mmalloc} package functions. It is explicitly -@samp{void *} (@samp{char *} for systems that don't fully support -@code{void}) so that users of the package don't have to worry about the -actual implementation details. - -On failure returns @code{NULL}. - -@item void *mmalloc_detach (void *@var{md}); -Terminate access to a @code{mmalloc} managed region identified by the -descriptor @var{md}, by closing the base file and unmapping all memory -pages associated with the region. - -Returns @code{NULL} on success. - -Returns the malloc descriptor on failure, which can subsequently -be used for further action (such as obtaining more information about -the nature of the failure). - -@item void *mmalloc (void *@var{md}, size_t @var{size}); -Given an @code{mmalloc} descriptor @var{md}, allocate additional memory of -@var{size} bytes in the associated mapped region. - -@item *mrealloc (void *@var{md}, void *@var{ptr}, size_t @var{size}); -Given an @code{mmalloc} descriptor @var{md} and a pointer to memory -previously allocated by @code{mmalloc} in @var{ptr}, reallocate the -memory to be @var{size} bytes long, possibly moving the existing -contents of memory if necessary. - -@item void *mvalloc (void *@var{md}, size_t @var{size}); -Like @code{mmalloc} but the resulting memory is aligned on a page boundary. - -@item void mfree (void *@var{md}, void *@var{ptr}); -Given an @code{mmalloc} descriptor @var{md} and a pointer to memory previously -allocated by @code{mmalloc} in @var{ptr}, free the previously allocated memory. - -@item int mmalloc_errno (void *@var{md}); -Given a @code{mmalloc} descriptor, if the last @code{mmalloc} operation -failed for some reason due to a system call failure, then -returns the associated @code{errno}. Returns 0 otherwise. -(This function is not yet implemented). -@end table - -@bye diff --git a/mmalloc/mmap-sup.c b/mmalloc/mmap-sup.c deleted file mode 100644 index b12e43cf255..00000000000 --- a/mmalloc/mmap-sup.c +++ /dev/null @@ -1,220 +0,0 @@ -/* Support for an sbrk-like function that uses mmap. - Copyright 1992, 2000 Free Software Foundation, Inc. - - Contributed by Fred Fish at Cygnus Support. fnf@cygnus.com - -This file is part of the GNU C Library. - -The GNU C Library is free software; you can redistribute it and/or -modify it under the terms of the GNU Library General Public License as -published by the Free Software Foundation; either version 2 of the -License, or (at your option) any later version. - -The GNU C Library is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -Library General Public License for more details. - -You should have received a copy of the GNU Library General Public -License along with the GNU C Library; see the file COPYING.LIB. If -not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#if defined(HAVE_MMAP) - -#ifdef HAVE_UNISTD_H -#include /* Prototypes for lseek */ -#endif -#include -#include -#include - -#ifndef SEEK_SET -#define SEEK_SET 0 -#endif - -#include "mmprivate.h" - -/* Cache the pagesize for the current host machine. Note that if the host - does not readily provide a getpagesize() function, we need to emulate it - elsewhere, not clutter up this file with lots of kluges to try to figure - it out. */ - -static size_t pagesize; -#if NEED_DECLARATION_GETPAGESIZE -extern int getpagesize PARAMS ((void)); -#endif - -#define PAGE_ALIGN(addr) (caddr_t) (((long)(addr) + pagesize - 1) & \ - ~(pagesize - 1)) - - -/* Return MAP_PRIVATE if MDP represents /dev/zero. Otherwise, return - MAP_SHARED. */ - -#define MAP_PRIVATE_OR_SHARED(MDP) ((MDP -> flags & MMALLOC_DEVZERO) \ - ? MAP_PRIVATE \ - : MAP_SHARED) - - -/* Get core for the memory region specified by MDP, using SIZE as the - amount to either add to or subtract from the existing region. Works - like sbrk(), but using mmap(). */ - -PTR -__mmalloc_mmap_morecore (mdp, size) - struct mdesc *mdp; - int size; -{ - PTR result = NULL; - off_t foffset; /* File offset at which new mapping will start */ - size_t mapbytes; /* Number of bytes to map */ - caddr_t moveto; /* Address where we wish to move "break value" to */ - caddr_t mapto; /* Address we actually mapped to */ - char buf = 0; /* Single byte to write to extend mapped file */ - - if (pagesize == 0) - { - pagesize = getpagesize (); - } - if (size == 0) - { - /* Just return the current "break" value. */ - result = mdp -> breakval; - } - else if (size < 0) - { - /* We are deallocating memory. If the amount requested would cause - us to try to deallocate back past the base of the mmap'd region - then do nothing, and return NULL. Otherwise, deallocate the - memory and return the old break value. */ - if (mdp -> breakval + size >= mdp -> base) - { - result = (PTR) mdp -> breakval; - mdp -> breakval += size; - moveto = PAGE_ALIGN (mdp -> breakval); - munmap (moveto, (size_t) (mdp -> top - moveto)); - mdp -> top = moveto; - } - } - else - { - /* We are allocating memory. Make sure we have an open file - descriptor and then go on to get the memory. */ - if (mdp -> fd < 0) - { - result = NULL; - } - else if (mdp -> breakval + size > mdp -> top) - { - /* The request would move us past the end of the currently - mapped memory, so map in enough more memory to satisfy - the request. This means we also have to grow the mapped-to - file by an appropriate amount, since mmap cannot be used - to extend a file. */ - moveto = PAGE_ALIGN (mdp -> breakval + size); - mapbytes = moveto - mdp -> top; - foffset = mdp -> top - mdp -> base; - /* FIXME: Test results of lseek() and write() */ - lseek (mdp -> fd, foffset + mapbytes - 1, SEEK_SET); - write (mdp -> fd, &buf, 1); - if (mdp -> base == 0) - { - /* Let mmap pick the map start address */ - mapto = mmap (0, mapbytes, PROT_READ | PROT_WRITE, - MAP_PRIVATE_OR_SHARED (mdp), mdp -> fd, foffset); - if (mapto != (caddr_t) -1) - { - mdp -> base = mdp -> breakval = mapto; - mdp -> top = mdp -> base + mapbytes; - result = (PTR) mdp -> breakval; - mdp -> breakval += size; - } - } - else - { - mapto = mmap (mdp -> top, mapbytes, PROT_READ | PROT_WRITE, - MAP_PRIVATE_OR_SHARED (mdp) | MAP_FIXED, mdp -> fd, - foffset); - if (mapto == mdp -> top) - { - mdp -> top = moveto; - result = (PTR) mdp -> breakval; - mdp -> breakval += size; - } - } - } - else - { - result = (PTR) mdp -> breakval; - mdp -> breakval += size; - } - } - return (result); -} - -PTR -__mmalloc_remap_core (mdp) - struct mdesc *mdp; -{ - caddr_t base; - - /* FIXME: Quick hack, needs error checking and other attention. */ - - base = mmap (mdp -> base, mdp -> top - mdp -> base, - PROT_READ | PROT_WRITE, MAP_PRIVATE_OR_SHARED (mdp) | MAP_FIXED, - mdp -> fd, 0); - return ((PTR) base); -} - -PTR -mmalloc_findbase (size) - int size; -{ - int fd; - int flags; - caddr_t base = NULL; - -#ifdef MAP_ANONYMOUS - flags = MAP_PRIVATE | MAP_ANONYMOUS; - fd = -1; -#else -#ifdef MAP_FILE - flags = MAP_PRIVATE | MAP_FILE; -#else - flags = MAP_PRIVATE; -#endif - fd = open ("/dev/zero", O_RDWR); - if (fd != -1) - { - return ((PTR) NULL); - } -#endif - base = mmap (0, size, PROT_READ | PROT_WRITE, flags, fd, 0); - if (base != (caddr_t) -1) - { - munmap (base, (size_t) size); - } - if (fd != -1) - { - close (fd); - } - if (base == 0) - { - /* Don't allow mapping at address zero. We use that value - to signal an error return, and besides, it is useful to - catch NULL pointers if it is unmapped. Instead start - at the next page boundary. */ - base = (caddr_t) getpagesize (); - } - else if (base == (caddr_t) -1) - { - base = NULL; - } - return ((PTR) base); -} - -#else /* defined(HAVE_MMAP) */ -/* Prevent "empty translation unit" warnings from the idiots at X3J11. */ -static char ansi_c_idiots = 69; -#endif /* defined(HAVE_MMAP) */ diff --git a/mmalloc/mmcheck.c b/mmalloc/mmcheck.c deleted file mode 100644 index 48936b3e630..00000000000 --- a/mmalloc/mmcheck.c +++ /dev/null @@ -1,223 +0,0 @@ -/* Standard debugging hooks for `mmalloc'. - Copyright 1990, 1991, 1992 Free Software Foundation - - Written May 1989 by Mike Haertel. - Heavily modified Mar 1992 by Fred Fish (fnf@cygnus.com) - -The GNU C Library is free software; you can redistribute it and/or -modify it under the terms of the GNU Library General Public License as -published by the Free Software Foundation; either version 2 of the -License, or (at your option) any later version. - -The GNU C Library is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -Library General Public License for more details. - -You should have received a copy of the GNU Library General Public -License along with the GNU C Library; see the file COPYING.LIB. If -not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. - - The author may be reached (Email) at the address mike@ai.mit.edu, - or (US mail) as Mike Haertel c/o Free Software Foundation. */ - -#include "mmprivate.h" - -/* Default function to call when something awful happens. The application - can specify an alternate function to be called instead (and probably will - want to). */ - -extern void abort PARAMS ((void)); - -/* Arbitrary magical numbers. */ - -#define MAGICWORD (unsigned int) 0xfedabeeb /* Active chunk */ -#define MAGICWORDFREE (unsigned int) 0xdeadbeef /* Inactive chunk */ -#define MAGICBYTE ((char) 0xd7) - -/* Each memory allocation is bounded by a header structure and a trailer - byte. I.E. - - - - The pointer returned to the user points to the first byte in the - user's allocation area. The magic word can be tested to detect - buffer underruns and the magic byte can be tested to detect overruns. */ - -struct hdr - { - size_t size; /* Exact size requested by user. */ - unsigned long int magic; /* Magic number to check header integrity. */ - }; - -static void checkhdr PARAMS ((struct mdesc *, CONST struct hdr *)); -static void mfree_check PARAMS ((PTR, PTR)); -static PTR mmalloc_check PARAMS ((PTR, size_t)); -static PTR mrealloc_check PARAMS ((PTR, PTR, size_t)); - -/* Check the magicword and magicbyte, and if either is corrupted then - call the emergency abort function specified for the heap in use. */ - -static void -checkhdr (mdp, hdr) - struct mdesc *mdp; - CONST struct hdr *hdr; -{ - if (hdr -> magic != MAGICWORD || - ((char *) &hdr[1])[hdr -> size] != MAGICBYTE) - { - (*mdp -> abortfunc)(); - } -} - -static void -mfree_check (md, ptr) - PTR md; - PTR ptr; -{ - struct hdr *hdr = ((struct hdr *) ptr) - 1; - struct mdesc *mdp; - - mdp = MD_TO_MDP (md); - checkhdr (mdp, hdr); - hdr -> magic = MAGICWORDFREE; - mdp -> mfree_hook = NULL; - mfree (md, (PTR)hdr); - mdp -> mfree_hook = mfree_check; -} - -static PTR -mmalloc_check (md, size) - PTR md; - size_t size; -{ - struct hdr *hdr; - struct mdesc *mdp; - size_t nbytes; - - mdp = MD_TO_MDP (md); - mdp -> mmalloc_hook = NULL; - nbytes = sizeof (struct hdr) + size + 1; - hdr = (struct hdr *) mmalloc (md, nbytes); - mdp -> mmalloc_hook = mmalloc_check; - if (hdr != NULL) - { - hdr -> size = size; - hdr -> magic = MAGICWORD; - hdr++; - *((char *) hdr + size) = MAGICBYTE; - } - return ((PTR) hdr); -} - -static PTR -mrealloc_check (md, ptr, size) - PTR md; - PTR ptr; - size_t size; -{ - struct hdr *hdr = ((struct hdr *) ptr) - 1; - struct mdesc *mdp; - size_t nbytes; - - mdp = MD_TO_MDP (md); - checkhdr (mdp, hdr); - mdp -> mfree_hook = NULL; - mdp -> mmalloc_hook = NULL; - mdp -> mrealloc_hook = NULL; - nbytes = sizeof (struct hdr) + size + 1; - hdr = (struct hdr *) mrealloc (md, (PTR) hdr, nbytes); - mdp -> mfree_hook = mfree_check; - mdp -> mmalloc_hook = mmalloc_check; - mdp -> mrealloc_hook = mrealloc_check; - if (hdr != NULL) - { - hdr -> size = size; - hdr++; - *((char *) hdr + size) = MAGICBYTE; - } - return ((PTR) hdr); -} - -/* Turn on default checking for mmalloc/mrealloc/mfree, for the heap specified - by MD. If FUNC is non-NULL, it is a pointer to the function to call - to abort whenever memory corruption is detected. By default, this is the - standard library function abort(). - - Note that we disallow installation of initial checking hooks if mmalloc - has been called at any time for this particular heap, since if any region - that is allocated prior to installation of the hooks is subsequently - reallocated or freed after installation of the hooks, it is guaranteed - to trigger a memory corruption error. We do this by checking the state - of the MMALLOC_INITIALIZED flag. If the FORCE argument is non-zero, this - checking is disabled and it is allowed to install the checking hooks at any - time. This is useful on systems where the C runtime makes one or more - malloc calls before the user code had a chance to call mmcheck or mmcheckf, - but never calls free with these values. Thus if we are certain that only - values obtained from mallocs after an mmcheck/mmcheckf will ever be passed - to free(), we can go ahead and force installation of the useful checking - hooks. - - However, we can call this function at any time after the initial call, - to update the function pointers to the checking routines and to the - user defined corruption handler routine, as long as these function pointers - have been previously extablished by the initial call. Note that we - do this automatically when remapping a previously used heap, to ensure - that the hooks get updated to the correct values, although the corruption - handler pointer gets set back to the default. The application can then - call mmcheck to use a different corruption handler if desired. - - Returns non-zero if checking is successfully enabled, zero otherwise. */ - -int -mmcheckf (md, func, force) - PTR md; - void (*func) PARAMS ((void)); - int force; -{ - struct mdesc *mdp; - int rtnval; - - mdp = MD_TO_MDP (md); - - /* We can safely set or update the abort function at any time, regardless - of whether or not we successfully do anything else. */ - - mdp -> abortfunc = (func != NULL ? func : abort); - - /* If we haven't yet called mmalloc the first time for this heap, or if we - have hooks that were previously installed, then allow the hooks to be - initialized or updated. */ - - if (force || - !(mdp -> flags & MMALLOC_INITIALIZED) || - (mdp -> mfree_hook != NULL)) - { - mdp -> mfree_hook = mfree_check; - mdp -> mmalloc_hook = mmalloc_check; - mdp -> mrealloc_hook = mrealloc_check; - mdp -> flags |= MMALLOC_MMCHECK_USED; - rtnval = 1; - } - else - { - rtnval = 0; - } - - return (rtnval); -} - -/* This routine is for backwards compatibility only, in case there are - still callers to the original mmcheck function. */ - -int -mmcheck (md, func) - PTR md; - void (*func) PARAMS ((void)); -{ - int rtnval; - - rtnval = mmcheckf (md, func, 0); - return (rtnval); -} diff --git a/mmalloc/mmemalign.c b/mmalloc/mmemalign.c deleted file mode 100644 index 3ada02707d7..00000000000 --- a/mmalloc/mmemalign.c +++ /dev/null @@ -1,62 +0,0 @@ -/* Copyright (C) 1991, 1992 Free Software Foundation, Inc. -This file is part of the GNU C Library. - -The GNU C Library is free software; you can redistribute it and/or -modify it under the terms of the GNU Library General Public License as -published by the Free Software Foundation; either version 2 of the -License, or (at your option) any later version. - -The GNU C Library is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -Library General Public License for more details. - -You should have received a copy of the GNU Library General Public -License along with the GNU C Library; see the file COPYING.LIB. If -not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#include "mmprivate.h" - -PTR -mmemalign (md, alignment, size) - PTR md; - size_t alignment; - size_t size; -{ - PTR result; - unsigned long int adj; - struct alignlist *l; - struct mdesc *mdp; - - if ((result = mmalloc (md, size + alignment - 1)) != NULL) - { - adj = RESIDUAL (result, alignment); - if (adj != 0) - { - mdp = MD_TO_MDP (md); - for (l = mdp -> aligned_blocks; l != NULL; l = l -> next) - { - if (l -> aligned == NULL) - { - /* This slot is free. Use it. */ - break; - } - } - if (l == NULL) - { - l = (struct alignlist *) mmalloc (md, sizeof (struct alignlist)); - if (l == NULL) - { - mfree (md, result); - return (NULL); - } - l -> next = mdp -> aligned_blocks; - mdp -> aligned_blocks = l; - } - l -> exact = result; - result = l -> aligned = (char *) result + alignment - adj; - } - } - return (result); -} diff --git a/mmalloc/mmprivate.h b/mmalloc/mmprivate.h deleted file mode 100644 index 457626293b1..00000000000 --- a/mmalloc/mmprivate.h +++ /dev/null @@ -1,343 +0,0 @@ -/* Declarations for `mmalloc' and friends. - Copyright 1990, 1991, 1992 Free Software Foundation - - Written May 1989 by Mike Haertel. - Heavily modified Mar 1992 by Fred Fish. (fnf@cygnus.com) - -The GNU C Library is free software; you can redistribute it and/or -modify it under the terms of the GNU Library General Public License as -published by the Free Software Foundation; either version 2 of the -License, or (at your option) any later version. - -The GNU C Library is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -Library General Public License for more details. - -You should have received a copy of the GNU Library General Public -License along with the GNU C Library; see the file COPYING.LIB. If -not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. - - The author may be reached (Email) at the address mike@ai.mit.edu, - or (US mail) as Mike Haertel c/o Free Software Foundation. */ - - -#ifndef __MMPRIVATE_H -#define __MMPRIVATE_H 1 - -#include "mmalloc.h" - -#ifdef HAVE_LIMITS_H -# include -#else -# ifndef CHAR_BIT -# define CHAR_BIT 8 -# endif -#endif - -#ifndef MIN -# define MIN(A, B) ((A) < (B) ? (A) : (B)) -#endif - -#define MMALLOC_MAGIC "mmalloc" /* Mapped file magic number */ -#define MMALLOC_MAGIC_SIZE 8 /* Size of magic number buf */ -#define MMALLOC_VERSION 1 /* Current mmalloc version */ -#define MMALLOC_KEYS 16 /* Keys for application use */ - -/* The allocator divides the heap into blocks of fixed size; large - requests receive one or more whole blocks, and small requests - receive a fragment of a block. Fragment sizes are powers of two, - and all fragments of a block are the same size. When all the - fragments in a block have been freed, the block itself is freed. */ - -#define INT_BIT (CHAR_BIT * sizeof(int)) -#define BLOCKLOG (INT_BIT > 16 ? 12 : 9) -#define BLOCKSIZE ((unsigned int) 1 << BLOCKLOG) -#define BLOCKIFY(SIZE) (((SIZE) + BLOCKSIZE - 1) / BLOCKSIZE) - -/* The difference between two pointers is a signed int. On machines where - the data addresses have the high bit set, we need to ensure that the - difference becomes an unsigned int when we are using the address as an - integral value. In addition, when using with the '%' operator, the - sign of the result is machine dependent for negative values, so force - it to be treated as an unsigned int. */ - -#define ADDR2UINT(addr) ((unsigned int) ((char *) (addr) - (char *) NULL)) -#define RESIDUAL(addr,bsize) ((unsigned int) (ADDR2UINT (addr) % (bsize))) - -/* Determine the amount of memory spanned by the initial heap table - (not an absolute limit). */ - -#define HEAP (INT_BIT > 16 ? 4194304 : 65536) - -/* Number of contiguous free blocks allowed to build up at the end of - memory before they will be returned to the system. */ - -#define FINAL_FREE_BLOCKS 8 - -/* Where to start searching the free list when looking for new memory. - The two possible values are 0 and heapindex. Starting at 0 seems - to reduce total memory usage, while starting at heapindex seems to - run faster. */ - -#define MALLOC_SEARCH_START mdp -> heapindex - -/* Address to block number and vice versa. */ - -#define BLOCK(A) (((char *) (A) - mdp -> heapbase) / BLOCKSIZE + 1) - -#define ADDRESS(B) ((PTR) (((B) - 1) * BLOCKSIZE + mdp -> heapbase)) - -/* Data structure giving per-block information. */ - -typedef union - { - /* Heap information for a busy block. */ - struct - { - /* Zero for a large block, or positive giving the - logarithm to the base two of the fragment size. */ - int type; - union - { - struct - { - size_t nfree; /* Free fragments in a fragmented block. */ - size_t first; /* First free fragment of the block. */ - } frag; - /* Size (in blocks) of a large cluster. */ - size_t size; - } info; - } busy; - /* Heap information for a free block (that may be the first of - a free cluster). */ - struct - { - size_t size; /* Size (in blocks) of a free cluster. */ - size_t next; /* Index of next free cluster. */ - size_t prev; /* Index of previous free cluster. */ - } free; - } malloc_info; - -/* List of blocks allocated with `mmemalign' (or `mvalloc'). */ - -struct alignlist - { - struct alignlist *next; - PTR aligned; /* The address that mmemaligned returned. */ - PTR exact; /* The address that malloc returned. */ - }; - -/* Doubly linked lists of free fragments. */ - -struct list - { - struct list *next; - struct list *prev; - }; - -/* Statistics available to the user. - FIXME: By design, the internals of the malloc package are no longer - exported to the user via an include file, so access to this data needs - to be via some other mechanism, such as mmstat_ where the - return value is the the user is interested in. */ - -struct mstats - { - size_t bytes_total; /* Total size of the heap. */ - size_t chunks_used; /* Chunks allocated by the user. */ - size_t bytes_used; /* Byte total of user-allocated chunks. */ - size_t chunks_free; /* Chunks in the free list. */ - size_t bytes_free; /* Byte total of chunks in the free list. */ - }; - -/* Internal structure that defines the format of the malloc-descriptor. - This gets written to the base address of the region that mmalloc is - managing, and thus also becomes the file header for the mapped file, - if such a file exists. */ - -struct mdesc -{ - /* The "magic number" for an mmalloc file. */ - - char magic[MMALLOC_MAGIC_SIZE]; - - /* The size in bytes of this structure, used as a sanity check when reusing - a previously created mapped file. */ - - unsigned int headersize; - - /* The version number of the mmalloc package that created this file. */ - - unsigned char version; - - /* Some flag bits to keep track of various internal things. */ - - unsigned int flags; - - /* If a system call made by the mmalloc package fails, the errno is - preserved for future examination. */ - - int saved_errno; - - /* Pointer to the function that is used to get more core, or return core - to the system, for requests using this malloc descriptor. For memory - mapped regions, this is the mmap() based routine. There may also be - a single malloc descriptor that points to an sbrk() based routine - for systems without mmap() or for applications that call the mmalloc() - package with a NULL malloc descriptor. - - FIXME: For mapped regions shared by more than one process, this - needs to be maintained on a per-process basis. */ - - PTR (*morecore) PARAMS ((struct mdesc *, int)); - - /* Pointer to the function that causes an abort when the memory checking - features are activated. By default this is set to abort(), but can - be set to another function by the application using mmalloc(). - - FIXME: For mapped regions shared by more than one process, this - needs to be maintained on a per-process basis. */ - - void (*abortfunc) PARAMS ((void)); - - /* Debugging hook for free. - - FIXME: For mapped regions shared by more than one process, this - needs to be maintained on a per-process basis. */ - - void (*mfree_hook) PARAMS ((PTR, PTR)); - - /* Debugging hook for `malloc'. - - FIXME: For mapped regions shared by more than one process, this - needs to be maintained on a per-process basis. */ - - PTR (*mmalloc_hook) PARAMS ((PTR, size_t)); - - /* Debugging hook for realloc. - - FIXME: For mapped regions shared by more than one process, this - needs to be maintained on a per-process basis. */ - - PTR (*mrealloc_hook) PARAMS ((PTR, PTR, size_t)); - - /* Number of info entries. */ - - size_t heapsize; - - /* Pointer to first block of the heap (base of the first block). */ - - char *heapbase; - - /* Current search index for the heap table. */ - /* Search index in the info table. */ - - size_t heapindex; - - /* Limit of valid info table indices. */ - - size_t heaplimit; - - /* Block information table. - Allocated with malign/__mmalloc_free (not mmalloc/mfree). */ - /* Table indexed by block number giving per-block information. */ - - malloc_info *heapinfo; - - /* Instrumentation. */ - - struct mstats heapstats; - - /* Free list headers for each fragment size. */ - /* Free lists for each fragment size. */ - - struct list fraghead[BLOCKLOG]; - - /* List of blocks allocated by memalign. */ - - struct alignlist *aligned_blocks; - - /* The base address of the memory region for this malloc heap. This - is the location where the bookkeeping data for mmap and for malloc - begins. */ - - char *base; - - /* The current location in the memory region for this malloc heap which - represents the end of memory in use. */ - - char *breakval; - - /* The end of the current memory region for this malloc heap. This is - the first location past the end of mapped memory. */ - - char *top; - - /* Open file descriptor for the file to which this malloc heap is mapped. - This will always be a valid file descriptor, since /dev/zero is used - by default if no open file is supplied by the client. Also note that - it may change each time the region is mapped and unmapped. */ - - int fd; - - /* An array of keys to data within the mapped region, for use by the - application. */ - - PTR keys[MMALLOC_KEYS]; - -}; - -/* Bits to look at in the malloc descriptor flags word */ - -#define MMALLOC_DEVZERO (1 << 0) /* Have mapped to /dev/zero */ -#define MMALLOC_INITIALIZED (1 << 1) /* Initialized mmalloc */ -#define MMALLOC_MMCHECK_USED (1 << 2) /* mmcheckf() called already */ - -/* Internal version of `mfree' used in `morecore'. */ - -extern void __mmalloc_free PARAMS ((struct mdesc *, PTR)); - -/* Hooks for debugging versions. */ - -extern void (*__mfree_hook) PARAMS ((PTR, PTR)); -extern PTR (*__mmalloc_hook) PARAMS ((PTR, size_t)); -extern PTR (*__mrealloc_hook) PARAMS ((PTR, PTR, size_t)); - -/* A default malloc descriptor for the single sbrk() managed region. */ - -extern struct mdesc *__mmalloc_default_mdp; - -/* Initialize the first use of the default malloc descriptor, which uses - an sbrk() region. */ - -extern struct mdesc *__mmalloc_sbrk_init PARAMS ((void)); - -/* Grow or shrink a contiguous mapped region using mmap(). - Works much like sbrk() */ - -#if defined(HAVE_MMAP) - -extern PTR __mmalloc_mmap_morecore PARAMS ((struct mdesc *, int)); - -#endif - -/* Remap a mmalloc region that was previously mapped. */ - -extern PTR __mmalloc_remap_core PARAMS ((struct mdesc *)); - -/* Macro to convert from a user supplied malloc descriptor to pointer to the - internal malloc descriptor. If the user supplied descriptor is NULL, then - use the default internal version, initializing it if necessary. Otherwise - just cast the user supplied version (which is void *) to the proper type - (struct mdesc *). */ - -#define MD_TO_MDP(md) \ - ((md) == NULL \ - ? (__mmalloc_default_mdp == NULL \ - ? __mmalloc_sbrk_init () \ - : __mmalloc_default_mdp) \ - : (struct mdesc *) (md)) - -#endif /* __MMPRIVATE_H */ diff --git a/mmalloc/mmstats.c b/mmalloc/mmstats.c deleted file mode 100644 index ed17323ee5f..00000000000 --- a/mmalloc/mmstats.c +++ /dev/null @@ -1,46 +0,0 @@ -/* Access the statistics maintained by `mmalloc'. - Copyright 1990, 1991, 1992 Free Software Foundation - - Written May 1989 by Mike Haertel. - Modified Mar 1992 by Fred Fish. (fnf@cygnus.com) - -The GNU C Library is free software; you can redistribute it and/or -modify it under the terms of the GNU Library General Public License as -published by the Free Software Foundation; either version 2 of the -License, or (at your option) any later version. - -The GNU C Library is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -Library General Public License for more details. - -You should have received a copy of the GNU Library General Public -License along with the GNU C Library; see the file COPYING.LIB. If -not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. - - The author may be reached (Email) at the address mike@ai.mit.edu, - or (US mail) as Mike Haertel c/o Free Software Foundation. */ - -#include "mmprivate.h" - -/* FIXME: See the comment in mmprivate.h where struct mstats is defined. - None of the internal mmalloc structures should be externally visible - outside the library. */ - -struct mstats -mmstats (md) - PTR md; -{ - struct mstats result; - struct mdesc *mdp; - - mdp = MD_TO_MDP (md); - result.bytes_total = - (char *) mdp -> morecore (mdp, 0) - mdp -> heapbase; - result.chunks_used = mdp -> heapstats.chunks_used; - result.bytes_used = mdp -> heapstats.bytes_used; - result.chunks_free = mdp -> heapstats.chunks_free; - result.bytes_free = mdp -> heapstats.bytes_free; - return (result); -} diff --git a/mmalloc/mmtrace.awk b/mmalloc/mmtrace.awk deleted file mode 100644 index d7689cec3ff..00000000000 --- a/mmalloc/mmtrace.awk +++ /dev/null @@ -1,36 +0,0 @@ -# -# Awk program to analyze mtrace.c output. -# -$1 == "+" { if (allocated[$2] != "") - print "+", $2, "Alloc", NR, "duplicate:", allocated[$2]; - else - allocated[$2] = $3; - } -$1 == "-" { if (allocated[$2] != "") { - allocated[$2] = ""; - if (allocated[$2] != "") - print "DELETE FAILED", $2, allocated[$2]; - } else - print "-", $2, "Free", NR, "was never alloc'd"; - } -$1 == "<" { if (allocated[$2] != "") - allocated[$2] = ""; - else - print "-", $2, "Realloc", NR, "was never alloc'd"; - } -$1 == ">" { if (allocated[$2] != "") - print "+", $2, "Realloc", NR, "duplicate:", allocated[$2]; - else - allocated[$2] = $3; - } - -# Ignore "= Start" -$1 == "=" { } -# Ignore failed realloc attempts for now -$1 == "!" { } - - -END { for (x in allocated) - if (allocated[x] != "") - print "+", x, allocated[x]; - } diff --git a/mmalloc/mmtrace.c b/mmalloc/mmtrace.c deleted file mode 100644 index 563c860aff0..00000000000 --- a/mmalloc/mmtrace.c +++ /dev/null @@ -1,171 +0,0 @@ -/* More debugging hooks for `mmalloc'. - Copyright 1991, 1992, 1994 Free Software Foundation - - Written April 2, 1991 by John Gilmore of Cygnus Support - Based on mcheck.c by Mike Haertel. - Modified Mar 1992 by Fred Fish. (fnf@cygnus.com) - -This file is part of the GNU C Library. - -The GNU C Library is free software; you can redistribute it and/or -modify it under the terms of the GNU Library General Public License as -published by the Free Software Foundation; either version 2 of the -License, or (at your option) any later version. - -The GNU C Library is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -Library General Public License for more details. - -You should have received a copy of the GNU Library General Public -License along with the GNU C Library; see the file COPYING.LIB. If -not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#include -#include "mmprivate.h" - -static void tr_break PARAMS ((void)); -static void tr_freehook PARAMS ((PTR, PTR)); -static PTR tr_mallochook PARAMS ((PTR, size_t)); -static PTR tr_reallochook PARAMS ((PTR, PTR, size_t)); - -#ifndef __GNU_LIBRARY__ -extern char *getenv (); -#endif - -static FILE *mallstream; - -#if 0 /* FIXME: Disabled for now. */ -static char mallenv[] = "MALLOC_TRACE"; -static char mallbuf[BUFSIZ]; /* Buffer for the output. */ -#endif - -/* Address to breakpoint on accesses to... */ -static PTR mallwatch; - -/* Old hook values. */ - -static void (*old_mfree_hook) PARAMS ((PTR, PTR)); -static PTR (*old_mmalloc_hook) PARAMS ((PTR, size_t)); -static PTR (*old_mrealloc_hook) PARAMS ((PTR, PTR, size_t)); - -/* This function is called when the block being alloc'd, realloc'd, or - freed has an address matching the variable "mallwatch". In a debugger, - set "mallwatch" to the address of interest, then put a breakpoint on - tr_break. */ - -static void -tr_break () -{ -} - -static void -tr_freehook (md, ptr) - PTR md; - PTR ptr; -{ - struct mdesc *mdp; - - mdp = MD_TO_MDP (md); - /* Be sure to print it first. */ - fprintf (mallstream, "- %08lx\n", (unsigned long) ptr); - if (ptr == mallwatch) - tr_break (); - mdp -> mfree_hook = old_mfree_hook; - mfree (md, ptr); - mdp -> mfree_hook = tr_freehook; -} - -static PTR -tr_mallochook (md, size) - PTR md; - size_t size; -{ - PTR hdr; - struct mdesc *mdp; - - mdp = MD_TO_MDP (md); - mdp -> mmalloc_hook = old_mmalloc_hook; - hdr = (PTR) mmalloc (md, size); - mdp -> mmalloc_hook = tr_mallochook; - - /* We could be printing a NULL here; that's OK. */ - fprintf (mallstream, "+ %08lx %x\n", (unsigned long) hdr, size); - - if (hdr == mallwatch) - tr_break (); - - return (hdr); -} - -static PTR -tr_reallochook (md, ptr, size) - PTR md; - PTR ptr; - size_t size; -{ - PTR hdr; - struct mdesc *mdp; - - mdp = MD_TO_MDP (md); - - if (ptr == mallwatch) - tr_break (); - - mdp -> mfree_hook = old_mfree_hook; - mdp -> mmalloc_hook = old_mmalloc_hook; - mdp -> mrealloc_hook = old_mrealloc_hook; - hdr = (PTR) mrealloc (md, ptr, size); - mdp -> mfree_hook = tr_freehook; - mdp -> mmalloc_hook = tr_mallochook; - mdp -> mrealloc_hook = tr_reallochook; - if (hdr == NULL) - /* Failed realloc. */ - fprintf (mallstream, "! %08lx %x\n", (unsigned long) ptr, size); - else - fprintf (mallstream, "< %08lx\n> %08lx %x\n", (unsigned long) ptr, - (unsigned long) hdr, size); - - if (hdr == mallwatch) - tr_break (); - - return hdr; -} - -/* We enable tracing if either the environment variable MALLOC_TRACE - is set, or if the variable mallwatch has been patched to an address - that the debugging user wants us to stop on. When patching mallwatch, - don't forget to set a breakpoint on tr_break! */ - -int -mmtrace () -{ -#if 0 /* FIXME! This is disabled for now until we figure out how to - maintain a stack of hooks per heap, since we might have other - hooks (such as set by mmcheck/mmcheckf) active also. */ - char *mallfile; - - mallfile = getenv (mallenv); - if (mallfile != NULL || mallwatch != NULL) - { - mallstream = fopen (mallfile != NULL ? mallfile : "/dev/null", "w"); - if (mallstream != NULL) - { - /* Be sure it doesn't mmalloc its buffer! */ - setbuf (mallstream, mallbuf); - fprintf (mallstream, "= Start\n"); - old_mfree_hook = mdp -> mfree_hook; - mdp -> mfree_hook = tr_freehook; - old_mmalloc_hook = mdp -> mmalloc_hook; - mdp -> mmalloc_hook = tr_mallochook; - old_mrealloc_hook = mdp -> mrealloc_hook; - mdp -> mrealloc_hook = tr_reallochook; - } - } - -#endif /* 0 */ - - return (1); -} - diff --git a/mmalloc/mrealloc.c b/mmalloc/mrealloc.c deleted file mode 100644 index e2004aaf47b..00000000000 --- a/mmalloc/mrealloc.c +++ /dev/null @@ -1,163 +0,0 @@ -/* Change the size of a block allocated by `mmalloc'. - Copyright 1990, 1991 Free Software Foundation - Written May 1989 by Mike Haertel. - -The GNU C Library is free software; you can redistribute it and/or -modify it under the terms of the GNU Library General Public License as -published by the Free Software Foundation; either version 2 of the -License, or (at your option) any later version. - -The GNU C Library is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -Library General Public License for more details. - -You should have received a copy of the GNU Library General Public -License along with the GNU C Library; see the file COPYING.LIB. If -not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. - - The author may be reached (Email) at the address mike@ai.mit.edu, - or (US mail) as Mike Haertel c/o Free Software Foundation. */ - -#include /* Prototypes for memcpy, memmove, memset, etc */ - -#include "mmprivate.h" - -/* Resize the given region to the new size, returning a pointer - to the (possibly moved) region. This is optimized for speed; - some benchmarks seem to indicate that greater compactness is - achieved by unconditionally allocating and copying to a - new region. This module has incestuous knowledge of the - internals of both mfree and mmalloc. */ - -PTR -mrealloc (md, ptr, size) - PTR md; - PTR ptr; - size_t size; -{ - struct mdesc *mdp; - PTR result; - int type; - size_t block, blocks, oldlimit; - - if (size == 0) - { - mfree (md, ptr); - return (mmalloc (md, 0)); - } - else if (ptr == NULL) - { - return (mmalloc (md, size)); - } - - mdp = MD_TO_MDP (md); - - if (mdp -> mrealloc_hook != NULL) - { - return ((*mdp -> mrealloc_hook) (md, ptr, size)); - } - - block = BLOCK (ptr); - - type = mdp -> heapinfo[block].busy.type; - switch (type) - { - case 0: - /* Maybe reallocate a large block to a small fragment. */ - if (size <= BLOCKSIZE / 2) - { - result = mmalloc (md, size); - if (result != NULL) - { - memcpy (result, ptr, size); - mfree (md, ptr); - return (result); - } - } - - /* The new size is a large allocation as well; - see if we can hold it in place. */ - blocks = BLOCKIFY (size); - if (blocks < mdp -> heapinfo[block].busy.info.size) - { - /* The new size is smaller; return excess memory to the free list. */ - mdp -> heapinfo[block + blocks].busy.type = 0; - mdp -> heapinfo[block + blocks].busy.info.size - = mdp -> heapinfo[block].busy.info.size - blocks; - mdp -> heapinfo[block].busy.info.size = blocks; - mfree (md, ADDRESS (block + blocks)); - result = ptr; - } - else if (blocks == mdp -> heapinfo[block].busy.info.size) - { - /* No size change necessary. */ - result = ptr; - } - else - { - /* Won't fit, so allocate a new region that will. - Free the old region first in case there is sufficient - adjacent free space to grow without moving. */ - blocks = mdp -> heapinfo[block].busy.info.size; - /* Prevent free from actually returning memory to the system. */ - oldlimit = mdp -> heaplimit; - mdp -> heaplimit = 0; - mfree (md, ptr); - mdp -> heaplimit = oldlimit; - result = mmalloc (md, size); - if (result == NULL) - { - mmalloc (md, blocks * BLOCKSIZE); - return (NULL); - } - if (ptr != result) - { - memmove (result, ptr, blocks * BLOCKSIZE); - } - } - break; - - default: - /* Old size is a fragment; type is logarithm - to base two of the fragment size. */ - if (size > (size_t) (1 << (type - 1)) && size <= (size_t) (1 << type)) - { - /* The new size is the same kind of fragment. */ - result = ptr; - } - else - { - /* The new size is different; allocate a new space, - and copy the lesser of the new size and the old. */ - result = mmalloc (md, size); - if (result == NULL) - { - return (NULL); - } - memcpy (result, ptr, MIN (size, (size_t) 1 << type)); - mfree (md, ptr); - } - break; - } - - return (result); -} - -/* When using this package, provide a version of malloc/realloc/free built - on top of it, so that if we use the default sbrk() region we will not - collide with another malloc package trying to do the same thing, if - the application contains any "hidden" calls to malloc/realloc/free (such - as inside a system library). */ - -PTR -realloc (ptr, size) - PTR ptr; - size_t size; -{ - PTR result; - - result = mrealloc ((PTR) NULL, ptr, size); - return (result); -} diff --git a/mmalloc/mvalloc.c b/mmalloc/mvalloc.c deleted file mode 100644 index e44942f5bb5..00000000000 --- a/mmalloc/mvalloc.c +++ /dev/null @@ -1,50 +0,0 @@ -/* Allocate memory on a page boundary. - Copyright (C) 1991 Free Software Foundation, Inc. - -The GNU C Library is free software; you can redistribute it and/or -modify it under the terms of the GNU Library General Public License as -published by the Free Software Foundation; either version 2 of the -License, or (at your option) any later version. - -The GNU C Library is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -Library General Public License for more details. - -You should have received a copy of the GNU Library General Public -License along with the GNU C Library; see the file COPYING.LIB. If -not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#include "mmprivate.h" - -/* Cache the pagesize for the current host machine. Note that if the host - does not readily provide a getpagesize() function, we need to emulate it - elsewhere, not clutter up this file with lots of kluges to try to figure - it out. */ - -static size_t cache_pagesize; -#if NEED_DECLARATION_GETPAGESIZE -extern int getpagesize PARAMS ((void)); -#endif - -PTR -mvalloc (md, size) - PTR md; - size_t size; -{ - if (cache_pagesize == 0) - { - cache_pagesize = getpagesize (); - } - - return (mmemalign (md, cache_pagesize, size)); -} - - -PTR -valloc (size) - size_t size; -{ - return mvalloc ((PTR) NULL, size); -} diff --git a/mmalloc/sbrk-sup.c b/mmalloc/sbrk-sup.c deleted file mode 100644 index 93c078bb2d0..00000000000 --- a/mmalloc/sbrk-sup.c +++ /dev/null @@ -1,102 +0,0 @@ -/* Support for sbrk() regions. - Copyright 1992, 2000 Free Software Foundation, Inc. - Contributed by Fred Fish at Cygnus Support. fnf@cygnus.com - -This file is part of the GNU C Library. - -The GNU C Library is free software; you can redistribute it and/or -modify it under the terms of the GNU Library General Public License as -published by the Free Software Foundation; either version 2 of the -License, or (at your option) any later version. - -The GNU C Library is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -Library General Public License for more details. - -You should have received a copy of the GNU Library General Public -License along with the GNU C Library; see the file COPYING.LIB. If -not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#ifdef HAVE_UNISTD_H -#include /* Prototypes for sbrk (maybe) */ -#endif -#include /* Prototypes for memcpy, memmove, memset, etc */ - -#include "mmprivate.h" - -static PTR sbrk_morecore PARAMS ((struct mdesc *, int)); -#if NEED_DECLARATION_SBRK -extern PTR sbrk PARAMS ((int)); -#endif - -/* The mmalloc() package can use a single implicit malloc descriptor - for mmalloc/mrealloc/mfree operations which do not supply an explicit - descriptor. For these operations, sbrk() is used to obtain more core - from the system, or return core. This allows mmalloc() to provide - backwards compatibility with the non-mmap'd version. */ - -struct mdesc *__mmalloc_default_mdp; - -/* Use sbrk() to get more core. */ - -static PTR -sbrk_morecore (mdp, size) - struct mdesc *mdp; - int size; -{ - PTR result; - - if ((result = sbrk (size)) == (PTR) -1) - { - result = NULL; - } - else - { - mdp -> breakval += size; - mdp -> top += size; - } - return (result); -} - -/* Initialize the default malloc descriptor if this is the first time - a request has been made to use the default sbrk'd region. - - Since no alignment guarantees are made about the initial value returned - by sbrk, test the initial value and (if necessary) sbrk enough additional - memory to start off with alignment to BLOCKSIZE. We actually only need - it aligned to an alignment suitable for any object, so this is overkill. - But at most it wastes just part of one BLOCKSIZE chunk of memory and - minimizes portability problems by avoiding us having to figure out - what the actual minimal alignment is. The rest of the malloc code - avoids this as well, by always aligning to the minimum of the requested - size rounded up to a power of two, or to BLOCKSIZE. - - Note that we are going to use some memory starting at this initial sbrk - address for the sbrk region malloc descriptor, which is a struct, so the - base address must be suitably aligned. */ - -struct mdesc * -__mmalloc_sbrk_init () -{ - PTR base; - unsigned int adj; - - base = sbrk (0); - adj = RESIDUAL (base, BLOCKSIZE); - if (adj != 0) - { - sbrk (BLOCKSIZE - adj); - base = sbrk (0); - } - __mmalloc_default_mdp = (struct mdesc *) sbrk (sizeof (struct mdesc)); - memset ((char *) __mmalloc_default_mdp, 0, sizeof (struct mdesc)); - __mmalloc_default_mdp -> morecore = sbrk_morecore; - __mmalloc_default_mdp -> base = base; - __mmalloc_default_mdp -> breakval = __mmalloc_default_mdp -> top = sbrk (0); - __mmalloc_default_mdp -> fd = -1; - return (__mmalloc_default_mdp); -} - - diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 915105dd5f1..5bf79149aff 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,130 @@ +2005-10-31 Alan Modra + + * arm-dis.c (print_insn): Warning fix. + +2005-10-30 H.J. Lu + + * Makefile.am: Run "make dep-am". + * Makefile.in: Regenerated. + + * dep-in.sed: Replace " ./" with " ". + +2005-10-28 Dave Brolley + + * All CGEN-generated sources: Regenerate. + + Contribute the following changes: + 2005-09-19 Dave Brolley + + * disassemble.c (disassemble_init_for_target): Add 'break' to case for + bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for + bfd_arch_m32c case. + + 2005-02-16 Dave Brolley + + * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename + cgen_isa_mask_* to cgen_bitset_*. + * cgen-opc.c: Likewise. + + 2003-11-28 Richard Sandiford + + * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas. + * *-dis.c: Regenerate. + + 2003-06-05 DJ Delorie + + * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign + it, as it may point to a reused buffer. Set prev_isas when we + change cpus. + + 2002-12-13 Dave Brolley + + * cgen-opc.c (cgen_isa_mask_create): New support function for + CGEN_ISA_MASK. + (cgen_isa_mask_init): Ditto. + (cgen_isa_mask_clear): Ditto. + (cgen_isa_mask_add): Ditto. + (cgen_isa_mask_set): Ditto. + (cgen_isa_supported): Ditto. + (cgen_isa_mask_compare): Ditto. + (cgen_isa_mask_intersection): Ditto. + (cgen_isa_mask_copy): Ditto. + (cgen_isa_mask_combine): Ditto. + * cgen-dis.in (libiberty.h): #include it. + (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *). + (print_insn_@arch@): Use CGEN_ISA_MASK and support functions. + * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm. + * Makefile.in: Regenerated. + +2005-10-27 DJ Delorie + + * m32c-asm.c: Regenerate. + * m32c-desc.c: Regenerate. + * m32c-desc.h: Regenerate. + * m32c-dis.c: Regenerate. + * m32c-ibld.c: Regenerate. + * m32c-opc.c: Regenerate. + * m32c-opc.h: Regenerate. + +2005-10-26 DJ Delorie + + * m32c-asm.c: Regenerate. + * m32c-desc.c: Regenerate. + * m32c-desc.h: Regenerate. + * m32c-dis.c: Regenerate. + * m32c-ibld.c: Regenerate. + * m32c-opc.c: Regenerate. + * m32c-opc.h: Regenerate. + +2005-10-26 Paul Brook + + * arm-dis.c (arm_opcodes): Correct "sel" entry. + +2005-10-26 Kazuhiro Inaoka + + * m32r-asm.c: Regenerate. + +2005-10-25 DJ Delorie + + * m32c-asm.c: Regenerate. + * m32c-desc.c: Regenerate. + * m32c-desc.h: Regenerate. + * m32c-dis.c: Regenerate. + * m32c-ibld.c: Regenerate. + * m32c-opc.c: Regenerate. + * m32c-opc.h: Regenerate. + +2005-10-25 Arnold Metselaar + + * configure.in: Add target architecture bfd_arch_z80. + * configure: Regenerated. + * disassemble.c (disassembler): Add case + bfd_arch_z80. + * z80-dis.c: New file. + +2005-10-25 Alan Modra + + * po/POTFILES.in: Regenerate. + * po/opcodes.pot: Regenerate. + +2005-10-24 Jan Beulich + + * ia64-asmtab.c: Regenerate. + +2005-10-21 DJ Delorie + + * m32c-asm.c: Regenerate. + * m32c-desc.c: Regenerate. + * m32c-desc.h: Regenerate. + * m32c-dis.c: Regenerate. + * m32c-ibld.c: Regenerate. + * m32c-opc.c: Regenerate. + * m32c-opc.h: Regenerate. + +2005-10-21 Nick Clifton + + * bfin-dis.c: Tidy up code, removing redundant constructs. + 2005-10-19 Martin Schwidefsky * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am index 5ac0ffe2b84..4a7b3c92992 100644 --- a/opcodes/Makefile.am +++ b/opcodes/Makefile.am @@ -178,6 +178,7 @@ CFILES = \ xstormy16-ibld.c \ xstormy16-opc.c \ xtensa-dis.c \ + z80-dis.c \ z8k-dis.c \ z8kgen.c @@ -302,6 +303,7 @@ ALL_MACHINES = \ xstormy16-ibld.lo \ xstormy16-opc.lo \ xtensa-dis.lo \ + z80-dis.lo \ z8k-dis.lo OFILES = @BFD_MACHINES@ @@ -574,10 +576,10 @@ dep-am: DEP # DO NOT DELETE THIS LINE -- mkdep uses it. # DO NOT PUT ANYTHING AFTER THIS LINE, IT WILL GO AWAY. -alpha-dis.lo: alpha-dis.c sysdep.h ./config.h $(INCDIR)/ansidecl.h \ +alpha-dis.lo: alpha-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ $(INCDIR)/opcode/alpha.h -alpha-opc.lo: alpha-opc.c sysdep.h ./config.h $(INCDIR)/ansidecl.h \ +alpha-opc.lo: alpha-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/opcode/alpha.h $(BFD_H) $(INCDIR)/ansidecl.h \ $(INCDIR)/symcat.h opintl.h arc-dis.lo: arc-dis.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \ @@ -586,133 +588,147 @@ arc-dis.lo: arc-dis.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \ $(INCDIR)/bfdlink.h $(INCDIR)/elf/arc.h $(INCDIR)/elf/reloc-macros.h \ opintl.h arc-dis.h arc-ext.h -arc-opc.lo: arc-opc.c sysdep.h ./config.h $(INCDIR)/ansidecl.h \ +arc-opc.lo: arc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/opcode/arc.h \ opintl.h -arc-ext.lo: arc-ext.c sysdep.h ./config.h $(INCDIR)/ansidecl.h \ +arc-ext.lo: arc-ext.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h arc-ext.h \ $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h -arm-dis.lo: arm-dis.c sysdep.h ./config.h $(INCDIR)/ansidecl.h \ +arm-dis.lo: arm-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ $(INCDIR)/opcode/arm.h opintl.h $(INCDIR)/safe-ctype.h \ $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \ $(INCDIR)/elf/external.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/arm.h \ $(INCDIR)/elf/reloc-macros.h -avr-dis.lo: avr-dis.c sysdep.h ./config.h $(INCDIR)/ansidecl.h \ +avr-dis.lo: avr-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \ $(INCDIR)/opcode/avr.h bfin-dis.lo: bfin-dis.c $(INCDIR)/opcode/bfin.h $(INCDIR)/dis-asm.h \ $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h -cgen-asm.lo: cgen-asm.c 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$(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \ - sysdep.h ./config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \ + sysdep.h config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \ $(INCDIR)/symcat.h -z8k-dis.lo: z8k-dis.c sysdep.h ./config.h $(INCDIR)/ansidecl.h \ +z80-dis.lo: z80-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h +z8k-dis.lo: z8k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ z8k-opc.h -z8kgen.lo: z8kgen.c sysdep.h ./config.h $(INCDIR)/ansidecl.h \ +z8kgen.lo: z8kgen.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h # IF YOU PUT ANYTHING HERE IT WILL GO AWAY diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in index f2e8ccddbf5..718250e8588 100644 --- a/opcodes/Makefile.in +++ b/opcodes/Makefile.in @@ -400,6 +400,7 @@ CFILES = \ xstormy16-ibld.c \ xstormy16-opc.c \ xtensa-dis.c \ + z80-dis.c \ z8k-dis.c \ z8kgen.c @@ -524,6 +525,7 @@ ALL_MACHINES = \ xstormy16-ibld.lo \ xstormy16-opc.lo \ xtensa-dis.lo \ + z80-dis.lo \ z8k-dis.lo OFILES = @BFD_MACHINES@ @@ -1116,10 +1118,10 @@ dep-am: DEP # DO NOT DELETE THIS LINE -- mkdep uses it. # DO NOT PUT ANYTHING AFTER THIS LINE, IT WILL GO AWAY. -alpha-dis.lo: alpha-dis.c sysdep.h ./config.h $(INCDIR)/ansidecl.h \ +alpha-dis.lo: alpha-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ $(INCDIR)/opcode/alpha.h -alpha-opc.lo: alpha-opc.c sysdep.h ./config.h $(INCDIR)/ansidecl.h \ +alpha-opc.lo: alpha-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/opcode/alpha.h $(BFD_H) $(INCDIR)/ansidecl.h \ $(INCDIR)/symcat.h opintl.h arc-dis.lo: arc-dis.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \ @@ -1128,133 +1130,147 @@ arc-dis.lo: arc-dis.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \ $(INCDIR)/bfdlink.h $(INCDIR)/elf/arc.h $(INCDIR)/elf/reloc-macros.h \ opintl.h arc-dis.h arc-ext.h -arc-opc.lo: arc-opc.c sysdep.h ./config.h $(INCDIR)/ansidecl.h \ +arc-opc.lo: arc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/opcode/arc.h \ opintl.h -arc-ext.lo: arc-ext.c sysdep.h ./config.h $(INCDIR)/ansidecl.h \ +arc-ext.lo: arc-ext.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h arc-ext.h \ $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h -arm-dis.lo: arm-dis.c sysdep.h ./config.h $(INCDIR)/ansidecl.h \ +arm-dis.lo: arm-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ $(INCDIR)/opcode/arm.h opintl.h $(INCDIR)/safe-ctype.h \ $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \ $(INCDIR)/elf/external.h $(INCDIR)/elf/internal.h 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$(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \ $(INCDIR)/symcat.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \ - $(INCDIR)/ansidecl.h xstormy16-desc.h $(INCDIR)/opcode/cgen.h \ + $(INCDIR)/ansidecl.h xstormy16-desc.h $(INCDIR)/opcode/cgen-bitset.h \ + $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \ xstormy16-opc.h opintl.h -xstormy16-ibld.lo: xstormy16-ibld.c sysdep.h ./config.h \ +xstormy16-ibld.lo: xstormy16-ibld.c sysdep.h config.h \ $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \ $(INCDIR)/symcat.h $(BFD_H) $(INCDIR)/symcat.h xstormy16-desc.h \ - $(INCDIR)/opcode/cgen.h xstormy16-opc.h opintl.h $(INCDIR)/safe-ctype.h -xstormy16-opc.lo: xstormy16-opc.c sysdep.h ./config.h \ + $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \ + $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h xstormy16-opc.h \ + opintl.h $(INCDIR)/safe-ctype.h +xstormy16-opc.lo: xstormy16-opc.c sysdep.h config.h \ $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/ansidecl.h \ $(INCDIR)/symcat.h $(INCDIR)/symcat.h xstormy16-desc.h \ - $(INCDIR)/opcode/cgen.h xstormy16-opc.h $(INCDIR)/libiberty.h \ - $(INCDIR)/ansidecl.h + $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \ + $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h xstormy16-opc.h \ + $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h xtensa-dis.lo: xtensa-dis.c $(INCDIR)/xtensa-isa.h \ $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \ - sysdep.h ./config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \ + sysdep.h config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \ $(INCDIR)/symcat.h -z8k-dis.lo: z8k-dis.c sysdep.h ./config.h $(INCDIR)/ansidecl.h \ +z80-dis.lo: z80-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h +z8k-dis.lo: z8k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ z8k-opc.h -z8kgen.lo: z8kgen.c sysdep.h ./config.h $(INCDIR)/ansidecl.h \ +z8kgen.lo: z8kgen.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h # IF YOU PUT ANYTHING HERE IT WILL GO AWAY # Tell versions [3.59,3.63) of GNU make to not export all variables. diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index e5c3742b15a..a19c077c067 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -557,7 +557,7 @@ static const struct opcode32 arm_opcodes[] = {ARM_EXT_V6, 0x06e00470, 0x0ff00ff0, "uxtab%c\t%12-15r, %16-19r, %0-3r, ROR #8"}, {ARM_EXT_V6, 0x06e00870, 0x0ff00ff0, "uxtab%c\t%12-15r, %16-19r, %0-3r, ROR #16"}, {ARM_EXT_V6, 0x06e00c70, 0x0ff00ff0, "uxtab%c\t%12-15r, %16-19r, %0-3r, ROR #24"}, - {ARM_EXT_V6, 0x068000b0, 0x0ff00ff0, "sel%c\t%12-15r, %16-19r, %0-3r"}, + {ARM_EXT_V6, 0x06800fb0, 0x0ff00ff0, "sel%c\t%12-15r, %16-19r, %0-3r"}, {ARM_EXT_V6, 0xf1010000, 0xfffffc00, "setend\t%9?ble"}, {ARM_EXT_V6, 0x0700f010, 0x0ff0f0d0, "smuad%5'x%c\t%16-19r, %0-3r, %8-11r"}, {ARM_EXT_V6, 0x0700f050, 0x0ff0f0d0, "smusd%5'x%c\t%16-19r, %0-3r, %8-11r"}, @@ -2854,13 +2854,13 @@ print_insn (bfd_vma pc, struct disassemble_info *info, bfd_boolean little) size = 2; status = info->read_memory_func (pc, (bfd_byte *)b, 2, info); + if (little) + given = (b[0]) | (b[1] << 8); + else + given = (b[1]) | (b[0] << 8); + if (!status) { - if (little) - given = (b[0]) | (b[1] << 8); - else - given = (b[1]) | (b[0] << 8); - /* These bit patterns signal a four-byte Thumb instruction. */ if ((given & 0xF800) == 0xF800 diff --git a/opcodes/bfin-dis.c b/opcodes/bfin-dis.c index 08f9d23c5b8..adeb7d072da 100644 --- a/opcodes/bfin-dis.c +++ b/opcodes/bfin-dis.c @@ -42,15 +42,13 @@ typedef long TIword; -#define HOST_LONG_WORD_SIZE (sizeof(long)*8) - -#define XFIELD(w,p,s) (((w)&((1<<(s))-1)<<(p))>>(p)) - -#define SIGNEXTEND(v, n) ((v << (HOST_LONG_WORD_SIZE - (n))) >> (HOST_LONG_WORD_SIZE - (n))) -#define MASKBITS(val, bits) (val & (( 1 << bits)-1)) - +#define HOST_LONG_WORD_SIZE (sizeof (long) * 8) +#define XFIELD(w,p,s) (((w) & ((1 << (s)) - 1) << (p)) >> (p)) +#define SIGNEXTEND(v, n) ((v << (HOST_LONG_WORD_SIZE - (n))) >> (HOST_LONG_WORD_SIZE - (n))) +#define MASKBITS(val, bits) (val & ((1 << bits) - 1)) #include "dis-asm.h" + typedef enum { c_0, c_1, c_4, c_2, c_uimm2, c_uimm3, c_imm3, c_pcrel4, @@ -132,6 +130,7 @@ fmtconst (const_forms_t cf, TIword x, bfd_vma pc, disassemble_info * outf) if (constant_formats[cf].negative) { int nb = constant_formats[cf].nbits + 1; + x = x | (1 << constant_formats[cf].nbits); x = SIGNEXTEND (x, nb); } @@ -152,13 +151,6 @@ fmtconst (const_forms_t cf, TIword x, bfd_vma pc, disassemble_info * outf) return buf; } -#undef SIGNEXTEND -#undef MASKBITS -#undef HOST_LONG_WORD_SIZE -#define HOST_LONG_WORD_SIZE (sizeof(long)*8) -#define SIGNEXTEND(v, n) (((long)(v) << (HOST_LONG_WORD_SIZE - (n))) >> (HOST_LONG_WORD_SIZE - (n))) -#define MASKBITS(val, bits) (val & (( 1 << bits)-1)) - enum machine_registers { REG_RL0, REG_RL1, REG_RL2, REG_RL3, REG_RL4, REG_RL5, REG_RL6, REG_RL7, @@ -228,7 +220,7 @@ static enum machine_registers decode_dregs_lo[] = REG_RL0, REG_RL1, REG_RL2, REG_RL3, REG_RL4, REG_RL5, REG_RL6, REG_RL7, }; -#define dregs_lo(x) REGNAME(decode_dregs_lo[(x) & 7]) +#define dregs_lo(x) REGNAME (decode_dregs_lo[(x) & 7]) /* RH(0..7). */ static enum machine_registers decode_dregs_hi[] = @@ -236,7 +228,7 @@ static enum machine_registers decode_dregs_hi[] = REG_RH0, REG_RH1, REG_RH2, REG_RH3, REG_RH4, REG_RH5, REG_RH6, REG_RH7, }; -#define dregs_hi(x) REGNAME(decode_dregs_hi[(x) & 7]) +#define dregs_hi(x) REGNAME (decode_dregs_hi[(x) & 7]) /* R(0..7). */ static enum machine_registers decode_dregs[] = @@ -244,7 +236,7 @@ static enum machine_registers decode_dregs[] = REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7, }; -#define dregs(x) REGNAME(decode_dregs[(x) & 7]) +#define dregs(x) REGNAME (decode_dregs[(x) & 7]) /* R BYTE(0..7). */ static enum machine_registers decode_dregs_byte[] = @@ -252,8 +244,8 @@ static enum machine_registers decode_dregs_byte[] = REG_BR0, REG_BR1, REG_BR2, REG_BR3, REG_BR4, REG_BR5, REG_BR6, REG_BR7, }; -#define dregs_byte(x) REGNAME(decode_dregs_byte[(x) & 7]) -#define dregs_pair(x) REGNAME(decode_dregs_pair[(x) & 7]) +#define dregs_byte(x) REGNAME (decode_dregs_byte[(x) & 7]) +#define dregs_pair(x) REGNAME (decode_dregs_pair[(x) & 7]) /* P(0..5) SP FP. */ static enum machine_registers decode_pregs[] = @@ -261,12 +253,12 @@ static enum machine_registers decode_pregs[] = REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, }; -#define pregs(x) REGNAME(decode_pregs[(x) & 7]) -#define spfp(x) REGNAME(decode_spfp[(x) & 1]) -#define dregs_hilo(x,i) REGNAME(decode_dregs_hilo[((i)<<3)|x]) -#define accum_ext(x) REGNAME(decode_accum_ext[(x) & 1]) -#define accum_word(x) REGNAME(decode_accum_word[(x) & 1]) -#define accum(x) REGNAME(decode_accum[(x) & 1]) +#define pregs(x) REGNAME (decode_pregs[(x) & 7]) +#define spfp(x) REGNAME (decode_spfp[(x) & 1]) +#define dregs_hilo(x,i) REGNAME (decode_dregs_hilo[((i) << 3)|x]) +#define accum_ext(x) REGNAME (decode_accum_ext[(x) & 1]) +#define accum_word(x) REGNAME (decode_accum_word[(x) & 1]) +#define accum(x) REGNAME (decode_accum[(x) & 1]) /* I(0..3). */ static enum machine_registers decode_iregs[] = @@ -274,7 +266,7 @@ static enum machine_registers decode_iregs[] = REG_I0, REG_I1, REG_I2, REG_I3, }; -#define iregs(x) REGNAME(decode_iregs[(x) & 3]) +#define iregs(x) REGNAME (decode_iregs[(x) & 3]) /* M(0..3). */ static enum machine_registers decode_mregs[] = @@ -282,9 +274,9 @@ static enum machine_registers decode_mregs[] = REG_M0, REG_M1, REG_M2, REG_M3, }; -#define mregs(x) REGNAME(decode_mregs[(x) & 3]) -#define bregs(x) REGNAME(decode_bregs[(x) & 3]) -#define lregs(x) REGNAME(decode_lregs[(x) & 3]) +#define mregs(x) REGNAME (decode_mregs[(x) & 3]) +#define bregs(x) REGNAME (decode_bregs[(x) & 3]) +#define lregs(x) REGNAME (decode_lregs[(x) & 3]) /* dregs pregs. */ static enum machine_registers decode_dpregs[] = @@ -293,7 +285,7 @@ static enum machine_registers decode_dpregs[] = REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, }; -#define dpregs(x) REGNAME(decode_dpregs[(x) & 15]) +#define dpregs(x) REGNAME (decode_dpregs[(x) & 15]) /* [dregs pregs]. */ static enum machine_registers decode_gregs[] = @@ -302,7 +294,7 @@ static enum machine_registers decode_gregs[] = REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, }; -#define gregs(x,i) REGNAME(decode_gregs[((i)<<3)|x]) +#define gregs(x,i) REGNAME (decode_gregs[((i) << 3)|x]) /* [dregs pregs (iregs mregs) (bregs lregs)]. */ static enum machine_registers decode_regs[] = @@ -313,7 +305,7 @@ static enum machine_registers decode_regs[] = REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, REG_L2, REG_L3, }; -#define regs(x,i) REGNAME(decode_regs[((i)<<3)|x]) +#define regs(x,i) REGNAME (decode_regs[((i) << 3)|x]) /* [dregs pregs (iregs mregs) (bregs lregs) Low Half]. */ static enum machine_registers decode_regs_lo[] = @@ -324,7 +316,7 @@ static enum machine_registers decode_regs_lo[] = REG_BL0, REG_BL1, REG_BL2, REG_BL3, REG_LL0, REG_LL1, REG_LL2, REG_LL3, }; -#define regs_lo(x,i) REGNAME(decode_regs_lo[((i)<<3)|x]) +#define regs_lo(x,i) REGNAME (decode_regs_lo[((i) << 3)|x]) /* [dregs pregs (iregs mregs) (bregs lregs) High Half]. */ static enum machine_registers decode_regs_hi[] = { @@ -334,7 +326,7 @@ static enum machine_registers decode_regs_hi[] = REG_BH0, REG_BH1, REG_BH2, REG_BH3, REG_LH0, REG_LH1, REG_LH2, REG_LH3, }; -#define regs_hi(x,i) REGNAME(decode_regs_hi[((i)<<3)|x]) +#define regs_hi(x,i) REGNAME (decode_regs_hi[((i) << 3)|x]) static enum machine_registers decode_statbits[] = { @@ -344,9 +336,9 @@ static enum machine_registers decode_statbits[] = REG_V, REG_VS, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, }; -#define statbits(x) REGNAME(decode_statbits[(x) & 31]) -#define ignore_bits(x) REGNAME(decode_ignore_bits[(x) & 7]) -#define ccstat(x) REGNAME(decode_ccstat[(x) & 0]) +#define statbits(x) REGNAME (decode_statbits[(x) & 31]) +#define ignore_bits(x) REGNAME (decode_ignore_bits[(x) & 7]) +#define ccstat(x) REGNAME (decode_ccstat[(x) & 0]) /* LC0 LC1. */ static enum machine_registers decode_counters[] = @@ -354,8 +346,8 @@ static enum machine_registers decode_counters[] = REG_LC0, REG_LC1, }; -#define counters(x) REGNAME(decode_counters[(x) & 1]) -#define dregs2_sysregs1(x) REGNAME(decode_dregs2_sysregs1[(x) & 7]) +#define counters(x) REGNAME (decode_counters[(x) & 1]) +#define dregs2_sysregs1(x) REGNAME (decode_dregs2_sysregs1[(x) & 7]) /* [dregs pregs (iregs mregs) (bregs lregs) dregs2_sysregs1 open sysregs2 sysregs3]. */ @@ -371,230 +363,108 @@ static enum machine_registers decode_allregs[] = REG_USP, REG_SEQSTAT, REG_SYSCFG, REG_RETI, REG_RETX, REG_RETN, REG_RETE, REG_EMUDAT, REG_LASTREG, }; -#define allregs(x,i) REGNAME(decode_allregs[((i) << 3) | x]) -#define uimm16s4(x) fmtconst(c_uimm16s4, x, 0, outf) -#define pcrel4(x) fmtconst(c_pcrel4, x, pc, outf) -#define pcrel8(x) fmtconst(c_pcrel8, x, pc, outf) -#define pcrel8s4(x) fmtconst(c_pcrel8s4, x, pc, outf) -#define pcrel10(x) fmtconst(c_pcrel10, x, pc, outf) -#define pcrel12(x) fmtconst(c_pcrel12, x, pc, outf) -#define negimm5s4(x) fmtconst(c_negimm5s4, x, 0, outf) -#define rimm16(x) fmtconst(c_rimm16, x, 0, outf) -#define huimm16(x) fmtconst(c_huimm16, x, 0, outf) -#define imm16(x) fmtconst(c_imm16, x, 0, outf) -#define uimm2(x) fmtconst(c_uimm2, x, 0, outf) -#define uimm3(x) fmtconst(c_uimm3, x, 0, outf) -#define luimm16(x) fmtconst(c_luimm16, x, 0, outf) -#define uimm4(x) fmtconst(c_uimm4, x, 0, outf) -#define uimm5(x) fmtconst(c_uimm5, x, 0, outf) -#define imm16s2(x) fmtconst(c_imm16s2, x, 0, outf) -#define uimm8(x) fmtconst(c_uimm8, x, 0, outf) -#define imm16s4(x) fmtconst(c_imm16s4, x, 0, outf) -#define uimm4s2(x) fmtconst(c_uimm4s2, x, 0, outf) -#define uimm4s4(x) fmtconst(c_uimm4s4, x, 0, outf) -#define lppcrel10(x) fmtconst(c_lppcrel10, x, pc, outf) -#define imm3(x) fmtconst(c_imm3, x, 0, outf) -#define imm4(x) fmtconst(c_imm4, x, 0, outf) -#define uimm8s4(x) fmtconst(c_uimm8s4, x, 0, outf) -#define imm5(x) fmtconst(c_imm5, x, 0, outf) -#define imm6(x) fmtconst(c_imm6, x, 0, outf) -#define imm7(x) fmtconst(c_imm7, x, 0, outf) -#define imm8(x) fmtconst(c_imm8, x, 0, outf) -#define pcrel24(x) fmtconst(c_pcrel24, x, pc, outf) -#define uimm16(x) fmtconst(c_uimm16, x, 0, outf) +#define allregs(x,i) REGNAME (decode_allregs[((i) << 3) | x]) +#define uimm16s4(x) fmtconst (c_uimm16s4, x, 0, outf) +#define pcrel4(x) fmtconst (c_pcrel4, x, pc, outf) +#define pcrel8(x) fmtconst (c_pcrel8, x, pc, outf) +#define pcrel8s4(x) fmtconst (c_pcrel8s4, x, pc, outf) +#define pcrel10(x) fmtconst (c_pcrel10, x, pc, outf) +#define pcrel12(x) fmtconst (c_pcrel12, x, pc, outf) +#define negimm5s4(x) fmtconst (c_negimm5s4, x, 0, outf) +#define rimm16(x) fmtconst (c_rimm16, x, 0, outf) +#define huimm16(x) fmtconst (c_huimm16, x, 0, outf) +#define imm16(x) fmtconst (c_imm16, x, 0, outf) +#define uimm2(x) fmtconst (c_uimm2, x, 0, outf) +#define uimm3(x) fmtconst (c_uimm3, x, 0, outf) +#define luimm16(x) fmtconst (c_luimm16, x, 0, outf) +#define uimm4(x) fmtconst (c_uimm4, x, 0, outf) +#define uimm5(x) fmtconst (c_uimm5, x, 0, outf) +#define imm16s2(x) fmtconst (c_imm16s2, x, 0, outf) +#define uimm8(x) fmtconst (c_uimm8, x, 0, outf) +#define imm16s4(x) fmtconst (c_imm16s4, x, 0, outf) +#define uimm4s2(x) fmtconst (c_uimm4s2, x, 0, outf) +#define uimm4s4(x) fmtconst (c_uimm4s4, x, 0, outf) +#define lppcrel10(x) fmtconst (c_lppcrel10, x, pc, outf) +#define imm3(x) fmtconst (c_imm3, x, 0, outf) +#define imm4(x) fmtconst (c_imm4, x, 0, outf) +#define uimm8s4(x) fmtconst (c_uimm8s4, x, 0, outf) +#define imm5(x) fmtconst (c_imm5, x, 0, outf) +#define imm6(x) fmtconst (c_imm6, x, 0, outf) +#define imm7(x) fmtconst (c_imm7, x, 0, outf) +#define imm8(x) fmtconst (c_imm8, x, 0, outf) +#define pcrel24(x) fmtconst (c_pcrel24, x, pc, outf) +#define uimm16(x) fmtconst (c_uimm16, x, 0, outf) /* (arch.pm)arch_disassembler_functions. */ -#define notethat(x) - #ifndef OUTS -#define OUTS(p,txt) ((p) ? (((txt)[0]) ? (p->fprintf_func)(p->stream, txt) :0) :0) +#define OUTS(p, txt) ((p) ? (((txt)[0]) ? (p->fprintf_func)(p->stream, txt) :0) :0) #endif - static void amod0 (int s0, int x0, disassemble_info *outf) { - if (s0 == 0 && x0 == 0) - { - notethat ("(NS)"); - return; - } - else if (s0 == 1 && x0 == 0) - { - notethat ("(S)"); - OUTS (outf, "(S)"); - return; - } + if (s0 == 1 && x0 == 0) + OUTS (outf, "(S)"); else if (s0 == 0 && x0 == 1) - { - notethat ("(CO)"); - OUTS (outf, "(CO)"); - return; - } + OUTS (outf, "(CO)"); else if (s0 == 1 && x0 == 1) - { - notethat ("(SCO)"); - OUTS (outf, "(SCO)"); - return; - } - else - goto illegal_instruction; -illegal_instruction: - return; + OUTS (outf, "(SCO)"); } static void amod1 (int s0, int x0, disassemble_info *outf) { if (s0 == 0 && x0 == 0) - { - notethat ("(NS)"); - OUTS (outf, "(NS)"); - return; - } + OUTS (outf, "(NS)"); else if (s0 == 1 && x0 == 0) - { - notethat ("(S)"); - OUTS (outf, "(S)"); - return; - } - else - goto illegal_instruction; -illegal_instruction: - return; + OUTS (outf, "(S)"); } static void amod0amod2 (int s0, int x0, int aop0, disassemble_info *outf) { - if (s0 == 0 && x0 == 0 && aop0 == 0) - { - notethat ("(NS)"); - return; - } - else if (s0 == 1 && x0 == 0 && aop0 == 0) - { - notethat ("(S)"); - OUTS (outf, "(S)"); - return; - } + if (s0 == 1 && x0 == 0 && aop0 == 0) + OUTS (outf, "(S)"); else if (s0 == 0 && x0 == 1 && aop0 == 0) - { - notethat ("(CO)"); - OUTS (outf, "(CO)"); - return; - } + OUTS (outf, "(CO)"); else if (s0 == 1 && x0 == 1 && aop0 == 0) - { - notethat ("(SCO)"); - OUTS (outf, "(SCO)"); - return; - } + OUTS (outf, "(SCO)"); else if (s0 == 0 && x0 == 0 && aop0 == 2) - { - notethat ("(ASR)"); - OUTS (outf, "(ASR)"); - return; - } + OUTS (outf, "(ASR)"); else if (s0 == 1 && x0 == 0 && aop0 == 2) - { - notethat ("(S,ASR)"); - OUTS (outf, "(S,ASR)"); - return; - } + OUTS (outf, "(S,ASR)"); else if (s0 == 0 && x0 == 1 && aop0 == 2) - { - notethat ("(CO,ASR)"); - OUTS (outf, "(CO,ASR)"); - return; - } + OUTS (outf, "(CO,ASR)"); else if (s0 == 1 && x0 == 1 && aop0 == 2) - { - notethat ("(SCO,ASR)"); - OUTS (outf, "(SCO,ASR)"); - return; - } + OUTS (outf, "(SCO,ASR)"); else if (s0 == 0 && x0 == 0 && aop0 == 3) - { - notethat ("(ASL)"); - OUTS (outf, "(ASL)"); - return; - } + OUTS (outf, "(ASL)"); else if (s0 == 1 && x0 == 0 && aop0 == 3) - { - notethat ("(S,ASL)"); - OUTS (outf, "(S,ASL)"); - return; - } + OUTS (outf, "(S,ASL)"); else if (s0 == 0 && x0 == 1 && aop0 == 3) - { - notethat ("(CO,ASL)"); - OUTS (outf, "(CO,ASL)"); - return; - } + OUTS (outf, "(CO,ASL)"); else if (s0 == 1 && x0 == 1 && aop0 == 3) - { - notethat ("(SCO,ASL)"); - OUTS (outf, "(SCO,ASL)"); - return; - } - else - goto illegal_instruction; -illegal_instruction: - return; + OUTS (outf, "(SCO,ASL)"); } static void searchmod (int r0, disassemble_info *outf) { - if ((r0 == 0)) - { - notethat ("GT"); - OUTS (outf, "GT"); - return; - } - else if ((r0 == 1)) - { - notethat ("GE"); - OUTS (outf, "GE"); - return; - } - else if ((r0 == 2)) - { - notethat ("LT"); - OUTS (outf, "LT"); - return; - } - else if ((r0 == 3)) - { - notethat ("LE"); - OUTS (outf, "LE"); - return; - } - else - goto illegal_instruction; -illegal_instruction: - return; + if (r0 == 0) + OUTS (outf, "GT"); + else if (r0 == 1) + OUTS (outf, "GE"); + else if (r0 == 2) + OUTS (outf, "LT"); + else if (r0 == 3) + OUTS (outf, "LE"); } static void aligndir (int r0, disassemble_info *outf) { - if ((r0 == 0)) - { - notethat (""); - return; - } - else if ((r0 == 1)) - { - notethat ("(R)"); - OUTS (outf, "(R)"); - return; - } - else - goto illegal_instruction; -illegal_instruction: - return; + if (r0 == 1) + OUTS (outf, "(R)"); } static int @@ -637,15 +507,10 @@ decode_macfunc (int which, int op, int h0, int h1, int src0, int src1, disassemb switch (op) { - case 0: - sop = "="; - break; - case 1: - sop = "+="; - break; - case 2: - sop = "-="; - break; + case 0: sop = "="; break; + case 1: sop = "+="; break; + case 2: sop = "-="; break; + default: break; } OUTS (outf, a); @@ -673,7 +538,7 @@ decode_optmode (int mod, int MM, disassemble_info *outf) if (MM) OUTS (outf, "M, "); - + if (mod == M_S2RND) OUTS (outf, "S2RND"); else if (mod == M_T) @@ -697,350 +562,251 @@ decode_optmode (int mod, int MM, disassemble_info *outf) OUTS (outf, ")"); } + static int decode_ProgCtrl_0 (TIword iw0, disassemble_info *outf) { -/* ProgCtrl -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.prgfunc.......|.poprnd........| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* ProgCtrl + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.prgfunc.......|.poprnd........| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int poprnd = ((iw0 >> ProgCtrl_poprnd_bits) & ProgCtrl_poprnd_mask); int prgfunc = ((iw0 >> ProgCtrl_prgfunc_bits) & ProgCtrl_prgfunc_mask); if (prgfunc == 0 && poprnd == 0) - { - notethat ("NOP"); - OUTS (outf, "NOP"); - return 1 * 2; - } + OUTS (outf, "NOP"); else if (prgfunc == 1 && poprnd == 0) - { - notethat ("RTS"); - OUTS (outf, "RTS"); - return 1 * 2; - } + OUTS (outf, "RTS"); else if (prgfunc == 1 && poprnd == 1) - { - notethat ("RTI"); - OUTS (outf, "RTI"); - return 1 * 2; - } + OUTS (outf, "RTI"); else if (prgfunc == 1 && poprnd == 2) - { - notethat ("RTX"); - OUTS (outf, "RTX"); - return 1 * 2; - } + OUTS (outf, "RTX"); else if (prgfunc == 1 && poprnd == 3) - { - notethat ("RTN"); - OUTS (outf, "RTN"); - return 1 * 2; - } + OUTS (outf, "RTN"); else if (prgfunc == 1 && poprnd == 4) - { - notethat ("RTE"); - OUTS (outf, "RTE"); - return 1 * 2; - } + OUTS (outf, "RTE"); else if (prgfunc == 2 && poprnd == 0) - { - notethat ("IDLE"); - OUTS (outf, "IDLE"); - return 1 * 2; - } + OUTS (outf, "IDLE"); else if (prgfunc == 2 && poprnd == 3) - { - notethat ("CSYNC"); - OUTS (outf, "CSYNC"); - return 1 * 2; - } + OUTS (outf, "CSYNC"); else if (prgfunc == 2 && poprnd == 4) - { - notethat ("SSYNC"); - OUTS (outf, "SSYNC"); - return 1 * 2; - } + OUTS (outf, "SSYNC"); else if (prgfunc == 2 && poprnd == 5) - { - notethat ("EMUEXCPT"); - OUTS (outf, "EMUEXCPT"); - return 1 * 2; - } + OUTS (outf, "EMUEXCPT"); else if (prgfunc == 3) { - notethat ("CLI dregs"); OUTS (outf, "CLI "); OUTS (outf, dregs (poprnd)); - return 1 * 2; } else if (prgfunc == 4) { - notethat ("STI dregs"); OUTS (outf, "STI "); OUTS (outf, dregs (poprnd)); - return 1 * 2; } else if (prgfunc == 5) { - notethat ("JUMP ( pregs )"); OUTS (outf, "JUMP ("); OUTS (outf, pregs (poprnd)); OUTS (outf, ")"); - return 1 * 2; } else if (prgfunc == 6) { - notethat ("CALL ( pregs )"); OUTS (outf, "CALL ("); OUTS (outf, pregs (poprnd)); OUTS (outf, ")"); - return 1 * 2; } else if (prgfunc == 7) { - notethat ("CALL ( PC + pregs )"); OUTS (outf, "CALL (PC+"); OUTS (outf, pregs (poprnd)); OUTS (outf, ")"); - return 1 * 2; } else if (prgfunc == 8) { - notethat ("JUMP ( PC + pregs )"); OUTS (outf, "JUMP (PC+"); OUTS (outf, pregs (poprnd)); OUTS (outf, ")"); - return 1 * 2; } else if (prgfunc == 9) { - notethat ("RAISE uimm4"); OUTS (outf, "RAISE "); OUTS (outf, uimm4 (poprnd)); - return 1 * 2; } else if (prgfunc == 10) { - notethat ("EXCPT uimm4"); OUTS (outf, "EXCPT "); OUTS (outf, uimm4 (poprnd)); - return 1 * 2; } else if (prgfunc == 11) { - notethat ("TESTSET ( pregs )"); OUTS (outf, "TESTSET ("); OUTS (outf, pregs (poprnd)); OUTS (outf, ")"); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + return 2; } static int decode_CaCTRL_0 (TIword iw0, disassemble_info *outf) { -/* CaCTRL -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |.a.|.op....|.reg.......| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* CaCTRL + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |.a.|.op....|.reg.......| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int a = ((iw0 >> CaCTRL_a_bits) & CaCTRL_a_mask); int op = ((iw0 >> CaCTRL_op_bits) & CaCTRL_op_mask); int reg = ((iw0 >> CaCTRL_reg_bits) & CaCTRL_reg_mask); if (a == 0 && op == 0) { - notethat ("PREFETCH [ pregs ]"); OUTS (outf, "PREFETCH["); OUTS (outf, pregs (reg)); OUTS (outf, "]"); - return 1 * 2; } else if (a == 0 && op == 1) { - notethat ("FLUSHINV [ pregs ]"); OUTS (outf, "FLUSHINV["); OUTS (outf, pregs (reg)); OUTS (outf, "]"); - return 1 * 2; } else if (a == 0 && op == 2) { - notethat ("FLUSH [ pregs ]"); OUTS (outf, "FLUSH["); OUTS (outf, pregs (reg)); OUTS (outf, "]"); - return 1 * 2; } else if (a == 0 && op == 3) { - notethat ("IFLUSH [ pregs ]"); OUTS (outf, "IFLUSH["); OUTS (outf, pregs (reg)); OUTS (outf, "]"); - return 1 * 2; } else if (a == 1 && op == 0) { - notethat ("PREFETCH [ pregs ++ ]"); OUTS (outf, "PREFETCH["); OUTS (outf, pregs (reg)); OUTS (outf, "++]"); - return 1 * 2; } else if (a == 1 && op == 1) { - notethat ("FLUSHINV [ pregs ++ ]"); OUTS (outf, "FLUSHINV["); OUTS (outf, pregs (reg)); OUTS (outf, "++]"); - return 1 * 2; } else if (a == 1 && op == 2) { - notethat ("FLUSH [ pregs ++ ]"); OUTS (outf, "FLUSH["); OUTS (outf, pregs (reg)); OUTS (outf, "++]"); - return 1 * 2; } else if (a == 1 && op == 3) { - notethat ("IFLUSH [ pregs ++ ]"); OUTS (outf, "IFLUSH["); OUTS (outf, pregs (reg)); OUTS (outf, "++]"); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + return 2; } static int decode_PushPopReg_0 (TIword iw0, disassemble_info *outf) { - -/* PushPopReg -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.W.|.grp.......|.reg.......| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* PushPopReg + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.W.|.grp.......|.reg.......| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int W = ((iw0 >> PushPopReg_W_bits) & PushPopReg_W_mask); int grp = ((iw0 >> PushPopReg_grp_bits) & PushPopReg_grp_mask); int reg = ((iw0 >> PushPopReg_reg_bits) & PushPopReg_reg_mask); if (W == 0) { - notethat ("allregs = [ SP ++ ]"); OUTS (outf, allregs (reg, grp)); OUTS (outf, " = [SP++]"); - return 1 * 2; } else if (W == 1) { - notethat ("[ -- SP ] = allregs"); OUTS (outf, "[--SP] = "); OUTS (outf, allregs (reg, grp)); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + return 2; } static int decode_PushPopMultiple_0 (TIword iw0, disassemble_info *outf) { -/* PushPopMultiple -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 0 | 0 | 0 | 0 | 0 | 1 | 0 |.d.|.p.|.W.|.dr........|.pr........| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* PushPopMultiple + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.d.|.p.|.W.|.dr........|.pr........| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int p = ((iw0 >> PushPopMultiple_p_bits) & PushPopMultiple_p_mask); int d = ((iw0 >> PushPopMultiple_d_bits) & PushPopMultiple_d_mask); int W = ((iw0 >> PushPopMultiple_W_bits) & PushPopMultiple_W_mask); int dr = ((iw0 >> PushPopMultiple_dr_bits) & PushPopMultiple_dr_mask); int pr = ((iw0 >> PushPopMultiple_pr_bits) & PushPopMultiple_pr_mask); - char ps[5], ds[5]; + sprintf (ps, "%d", pr); sprintf (ds, "%d", dr); if (W == 1 && d == 1 && p == 1) { - notethat ("[ -- SP ] = ( R7 : reglim , P5 : reglim )"); OUTS (outf, "[--SP] = (R7:"); OUTS (outf, ds); OUTS (outf, ", P5:"); OUTS (outf, ps); OUTS (outf, ")"); - return 1 * 2; } else if (W == 1 && d == 1 && p == 0) { - notethat ("[ -- SP ] = ( R7 : reglim )"); OUTS (outf, "[--SP] = (R7:"); OUTS (outf, ds); OUTS (outf, ")"); - return 1 * 2; } else if (W == 1 && d == 0 && p == 1) { - notethat ("[ -- SP ] = ( P5 : reglim )"); OUTS (outf, "[--SP] = (P5:"); OUTS (outf, ps); OUTS (outf, ")"); - return 1 * 2; } else if (W == 0 && d == 1 && p == 1) { - notethat ("( R7 : reglim , P5 : reglim ) = [ SP ++ ]"); OUTS (outf, "(R7:"); OUTS (outf, ds); OUTS (outf, ", P5:"); OUTS (outf, ps); OUTS (outf, ") = [SP++]"); - return 1 * 2; } else if (W == 0 && d == 1 && p == 0) { - notethat ("( R7 : reglim ) = [ SP ++ ]"); OUTS (outf, "(R7:"); OUTS (outf, ds); OUTS (outf, ") = [SP++]"); - return 1 * 2; } else if (W == 0 && d == 0 && p == 1) { - notethat ("( P5 : reglim ) = [ SP ++ ]"); OUTS (outf, "(P5:"); OUTS (outf, ps); OUTS (outf, ") = [SP++]"); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + return 2; } static int decode_ccMV_0 (TIword iw0, disassemble_info *outf) { -/* ccMV -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 0 | 0 | 0 | 0 | 0 | 1 | 1 |.T.|.d.|.s.|.dst.......|.src.......| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* ccMV + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.T.|.d.|.s.|.dst.......|.src.......| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int s = ((iw0 >> CCmv_s_bits) & CCmv_s_mask); int d = ((iw0 >> CCmv_d_bits) & CCmv_d_mask); int T = ((iw0 >> CCmv_T_bits) & CCmv_T_mask); @@ -1049,36 +815,30 @@ decode_ccMV_0 (TIword iw0, disassemble_info *outf) if (T == 1) { - notethat ("IF CC gregs = gregs"); OUTS (outf, "IF CC "); OUTS (outf, gregs (dst, d)); OUTS (outf, " = "); OUTS (outf, gregs (src, s)); - return 1 * 2; } else if (T == 0) { - notethat ("IF ! CC gregs = gregs"); OUTS (outf, "IF ! CC "); OUTS (outf, gregs (dst, d)); OUTS (outf, " = "); OUTS (outf, gregs (src, s)); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + return 2; } static int decode_CCflag_0 (TIword iw0, disassemble_info *outf) { -/* CCflag -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 0 | 0 | 0 | 0 | 1 |.I.|.opc.......|.G.|.y.........|.x.........| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* CCflag + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 0 | 0 | 0 | 0 | 1 |.I.|.opc.......|.G.|.y.........|.x.........| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int x = ((iw0 >> CCflag_x_bits) & CCflag_x_mask); int y = ((iw0 >> CCflag_y_bits) & CCflag_y_mask); int I = ((iw0 >> CCflag_I_bits) & CCflag_I_mask); @@ -1087,739 +847,588 @@ decode_CCflag_0 (TIword iw0, disassemble_info *outf) if (opc == 0 && I == 0 && G == 0) { - notethat ("CC = dregs == dregs"); OUTS (outf, "CC="); OUTS (outf, dregs (x)); OUTS (outf, "=="); OUTS (outf, dregs (y)); - return 1 * 2; } else if (opc == 1 && I == 0 && G == 0) { - notethat ("CC = dregs < dregs"); OUTS (outf, "CC="); OUTS (outf, dregs (x)); OUTS (outf, "<"); OUTS (outf, dregs (y)); - return 1 * 2; } else if (opc == 2 && I == 0 && G == 0) { - notethat ("CC = dregs <= dregs"); OUTS (outf, "CC="); OUTS (outf, dregs (x)); OUTS (outf, "<="); OUTS (outf, dregs (y)); - return 1 * 2; } else if (opc == 3 && I == 0 && G == 0) { - notethat ("CC = dregs < dregs ( IU )"); OUTS (outf, "CC="); OUTS (outf, dregs (x)); OUTS (outf, "<"); OUTS (outf, dregs (y)); OUTS (outf, "(IU)"); - return 1 * 2; } else if (opc == 4 && I == 0 && G == 0) { - notethat ("CC = dregs <= dregs ( IU )"); OUTS (outf, "CC="); OUTS (outf, dregs (x)); OUTS (outf, "<="); OUTS (outf, dregs (y)); OUTS (outf, "(IU)"); - return 1 * 2; } else if (opc == 0 && I == 1 && G == 0) { - notethat ("CC = dregs == imm3"); OUTS (outf, "CC="); OUTS (outf, dregs (x)); OUTS (outf, "=="); OUTS (outf, imm3 (y)); - return 1 * 2; } else if (opc == 1 && I == 1 && G == 0) { - notethat ("CC = dregs < imm3"); OUTS (outf, "CC="); OUTS (outf, dregs (x)); OUTS (outf, "<"); OUTS (outf, imm3 (y)); - return 1 * 2; } else if (opc == 2 && I == 1 && G == 0) { - notethat ("CC = dregs <= imm3"); OUTS (outf, "CC="); OUTS (outf, dregs (x)); OUTS (outf, "<="); OUTS (outf, imm3 (y)); - return 1 * 2; } else if (opc == 3 && I == 1 && G == 0) { - notethat ("CC = dregs < uimm3 ( IU )"); OUTS (outf, "CC="); OUTS (outf, dregs (x)); OUTS (outf, "<"); OUTS (outf, uimm3 (y)); OUTS (outf, "(IU)"); - return 1 * 2; } else if (opc == 4 && I == 1 && G == 0) { - notethat ("CC = dregs <= uimm3 ( IU )"); OUTS (outf, "CC="); OUTS (outf, dregs (x)); OUTS (outf, "<="); OUTS (outf, uimm3 (y)); OUTS (outf, "(IU)"); - return 1 * 2; } else if (opc == 0 && I == 0 && G == 1) { - notethat ("CC = pregs == pregs"); OUTS (outf, "CC="); OUTS (outf, pregs (x)); OUTS (outf, "=="); OUTS (outf, pregs (y)); - return 1 * 2; } else if (opc == 1 && I == 0 && G == 1) { - notethat ("CC = pregs < pregs"); OUTS (outf, "CC="); OUTS (outf, pregs (x)); OUTS (outf, "<"); OUTS (outf, pregs (y)); - return 1 * 2; } else if (opc == 2 && I == 0 && G == 1) { - notethat ("CC = pregs <= pregs"); OUTS (outf, "CC="); OUTS (outf, pregs (x)); OUTS (outf, "<="); OUTS (outf, pregs (y)); - return 1 * 2; } else if (opc == 3 && I == 0 && G == 1) { - notethat ("CC = pregs < pregs ( IU )"); OUTS (outf, "CC="); OUTS (outf, pregs (x)); OUTS (outf, "<"); OUTS (outf, pregs (y)); OUTS (outf, "(IU)"); - return 1 * 2; } else if (opc == 4 && I == 0 && G == 1) { - notethat ("CC = pregs <= pregs ( IU )"); OUTS (outf, "CC="); OUTS (outf, pregs (x)); OUTS (outf, "<="); OUTS (outf, pregs (y)); OUTS (outf, "(IU)"); - return 1 * 2; } else if (opc == 0 && I == 1 && G == 1) { - notethat ("CC = pregs == imm3"); OUTS (outf, "CC="); OUTS (outf, pregs (x)); OUTS (outf, "=="); OUTS (outf, imm3 (y)); - return 1 * 2; } else if (opc == 1 && I == 1 && G == 1) { - notethat ("CC = pregs < imm3"); OUTS (outf, "CC="); OUTS (outf, pregs (x)); OUTS (outf, "<"); OUTS (outf, imm3 (y)); - return 1 * 2; } else if (opc == 2 && I == 1 && G == 1) { - notethat ("CC = pregs <= imm3"); OUTS (outf, "CC="); OUTS (outf, pregs (x)); OUTS (outf, "<="); OUTS (outf, imm3 (y)); - return 1 * 2; } else if (opc == 3 && I == 1 && G == 1) { - notethat ("CC = pregs < uimm3 ( IU )"); OUTS (outf, "CC="); OUTS (outf, pregs (x)); OUTS (outf, "<"); OUTS (outf, uimm3 (y)); OUTS (outf, "(IU)"); - return 1 * 2; } else if (opc == 4 && I == 1 && G == 1) { - notethat ("CC = pregs <= uimm3 ( IU )"); OUTS (outf, "CC="); OUTS (outf, pregs (x)); OUTS (outf, "<="); OUTS (outf, uimm3 (y)); OUTS (outf, "(IU)"); - return 1 * 2; } else if (opc == 5 && I == 0 && G == 0) - { - notethat ("CC = A0 == A1"); - OUTS (outf, "CC=A0==A1"); - return 1 * 2; - } + OUTS (outf, "CC=A0==A1"); + else if (opc == 6 && I == 0 && G == 0) - { - notethat ("CC = A0 < A1"); - OUTS (outf, "CC=A0> CC2dreg_op_bits) & CC2dreg_op_mask); int reg = ((iw0 >> CC2dreg_reg_bits) & CC2dreg_reg_mask); if (op == 0) { - notethat ("dregs = CC"); OUTS (outf, dregs (reg)); OUTS (outf, "=CC"); - return 1 * 2; } else if (op == 1) { - notethat ("CC = dregs"); OUTS (outf, "CC="); OUTS (outf, dregs (reg)); - return 1 * 2; } else if (op == 3) - { - notethat ("CC =! CC"); - OUTS (outf, "CC=!CC"); - return 1 * 2; - } + OUTS (outf, "CC=!CC"); else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 2; } static int decode_CC2stat_0 (TIword iw0, disassemble_info *outf) { -/* CC2stat -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.D.|.op....|.cbit..............| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* CC2stat + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.D.|.op....|.cbit..............| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int D = ((iw0 >> CC2stat_D_bits) & CC2stat_D_mask); int op = ((iw0 >> CC2stat_op_bits) & CC2stat_op_mask); int cbit = ((iw0 >> CC2stat_cbit_bits) & CC2stat_cbit_mask); if (op == 0 && D == 0) { - notethat ("CC = statbits"); OUTS (outf, "CC = "); OUTS (outf, statbits (cbit)); - return 1 * 2; } else if (op == 1 && D == 0) { - notethat ("CC |= statbits"); OUTS (outf, "CC|="); OUTS (outf, statbits (cbit)); - return 1 * 2; } else if (op == 2 && D == 0) { - notethat ("CC &= statbits"); OUTS (outf, "CC&="); OUTS (outf, statbits (cbit)); - return 1 * 2; } else if (op == 3 && D == 0) { - notethat ("CC ^= statbits"); OUTS (outf, "CC^="); OUTS (outf, statbits (cbit)); - return 1 * 2; } else if (op == 0 && D == 1) { - notethat ("statbits = CC"); OUTS (outf, statbits (cbit)); OUTS (outf, "=CC"); - return 1 * 2; } else if (op == 1 && D == 1) { - notethat ("statbits |= CC"); OUTS (outf, statbits (cbit)); OUTS (outf, "|=CC"); - return 1 * 2; } else if (op == 2 && D == 1) { - notethat ("statbits &= CC"); OUTS (outf, statbits (cbit)); OUTS (outf, "&=CC"); - return 1 * 2; } else if (op == 3 && D == 1) { - notethat ("statbits ^= CC"); OUTS (outf, statbits (cbit)); OUTS (outf, "^=CC"); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 2; } static int decode_BRCC_0 (TIword iw0, bfd_vma pc, disassemble_info *outf) { -/* BRCC -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 0 | 0 | 0 | 1 |.T.|.B.|.offset................................| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* BRCC + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 0 | 0 | 0 | 1 |.T.|.B.|.offset................................| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int B = ((iw0 >> BRCC_B_bits) & BRCC_B_mask); int T = ((iw0 >> BRCC_T_bits) & BRCC_T_mask); int offset = ((iw0 >> BRCC_offset_bits) & BRCC_offset_mask); if (T == 1 && B == 1) { - notethat ("IF CC JUMP pcrel10 ( BP )"); OUTS (outf, "IF CC JUMP "); OUTS (outf, pcrel10 (offset)); OUTS (outf, "(BP)"); - return 1 * 2; } else if (T == 0 && B == 1) { - notethat ("IF !CC JUMP pcrel10 ( BP )"); OUTS (outf, "IF ! CC JUMP "); OUTS (outf, pcrel10 (offset)); OUTS (outf, "(BP)"); - return 1 * 2; } else if (T == 1) { - notethat ("IF CC JUMP pcrel10"); OUTS (outf, "IF CC JUMP "); OUTS (outf, pcrel10 (offset)); - return 1 * 2; } else if (T == 0) { - notethat ("IF !CC JUMP pcrel10"); OUTS (outf, "IF ! CC JUMP "); OUTS (outf, pcrel10 (offset)); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 2; } static int decode_UJUMP_0 (TIword iw0, bfd_vma pc, disassemble_info *outf) { -/* UJUMP -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 0 | 0 | 1 | 0 |.offset........................................| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* UJUMP + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 0 | 0 | 1 | 0 |.offset........................................| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int offset = ((iw0 >> UJump_offset_bits) & UJump_offset_mask); - notethat ("JUMP.S pcrel12"); OUTS (outf, "JUMP.S "); OUTS (outf, pcrel12 (offset)); - return 1 * 2; + return 2; } static int decode_REGMV_0 (TIword iw0, disassemble_info *outf) { -/* REGMV -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 0 | 0 | 1 | 1 |.gd........|.gs........|.dst.......|.src.......| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* REGMV + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 0 | 0 | 1 | 1 |.gd........|.gs........|.dst.......|.src.......| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int gs = ((iw0 >> RegMv_gs_bits) & RegMv_gs_mask); int gd = ((iw0 >> RegMv_gd_bits) & RegMv_gd_mask); int src = ((iw0 >> RegMv_src_bits) & RegMv_src_mask); int dst = ((iw0 >> RegMv_dst_bits) & RegMv_dst_mask); - notethat ("allregs = allregs"); OUTS (outf, allregs (dst, gd)); OUTS (outf, "="); OUTS (outf, allregs (src, gs)); - return 1 * 2; + return 2; } static int decode_ALU2op_0 (TIword iw0, disassemble_info *outf) { -/* ALU2op -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 0 | 1 | 0 | 0 | 0 | 0 |.opc...........|.src.......|.dst.......| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* ALU2op + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 0 | 1 | 0 | 0 | 0 | 0 |.opc...........|.src.......|.dst.......| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int src = ((iw0 >> ALU2op_src_bits) & ALU2op_src_mask); int opc = ((iw0 >> ALU2op_opc_bits) & ALU2op_opc_mask); int dst = ((iw0 >> ALU2op_dst_bits) & ALU2op_dst_mask); if (opc == 0) { - notethat ("dregs >>>= dregs"); OUTS (outf, dregs (dst)); OUTS (outf, ">>>="); OUTS (outf, dregs (src)); - return 1 * 2; } else if (opc == 1) { - notethat ("dregs >>= dregs"); OUTS (outf, dregs (dst)); OUTS (outf, ">>="); OUTS (outf, dregs (src)); - return 1 * 2; } else if (opc == 2) { - notethat ("dregs <<= dregs"); OUTS (outf, dregs (dst)); OUTS (outf, "<<="); OUTS (outf, dregs (src)); - return 1 * 2; } else if (opc == 3) { - notethat ("dregs *= dregs"); OUTS (outf, dregs (dst)); OUTS (outf, "*="); OUTS (outf, dregs (src)); - return 1 * 2; } else if (opc == 4) { - notethat ("dregs = (dregs + dregs) << 1"); OUTS (outf, dregs (dst)); OUTS (outf, "=("); OUTS (outf, dregs (dst)); OUTS (outf, "+"); OUTS (outf, dregs (src)); OUTS (outf, ")<<1"); - return 1 * 2; } else if (opc == 5) { - notethat ("dregs = (dregs + dregs) << 2"); OUTS (outf, dregs (dst)); OUTS (outf, "=("); OUTS (outf, dregs (dst)); OUTS (outf, "+"); OUTS (outf, dregs (src)); OUTS (outf, ")<<2"); - return 1 * 2; } else if (opc == 8) { - notethat ("DIVQ (dregs , dregs)"); OUTS (outf, "DIVQ("); OUTS (outf, dregs (dst)); OUTS (outf, ","); OUTS (outf, dregs (src)); OUTS (outf, ")"); - return 1 * 2; } else if (opc == 9) { - notethat ("DIVS (dregs , dregs)"); OUTS (outf, "DIVS("); OUTS (outf, dregs (dst)); OUTS (outf, ","); OUTS (outf, dregs (src)); OUTS (outf, ")"); - return 1 * 2; } else if (opc == 10) { - notethat ("dregs = dregs_lo (X)"); OUTS (outf, dregs (dst)); OUTS (outf, "="); OUTS (outf, dregs_lo (src)); OUTS (outf, "(X)"); - return 1 * 2; } else if (opc == 11) { - notethat ("dregs = dregs_lo (Z)"); OUTS (outf, dregs (dst)); OUTS (outf, "="); OUTS (outf, dregs_lo (src)); OUTS (outf, "(Z)"); - return 1 * 2; } else if (opc == 12) { - notethat ("dregs = dregs_byte (X)"); OUTS (outf, dregs (dst)); OUTS (outf, "="); OUTS (outf, dregs_byte (src)); OUTS (outf, "(X)"); - return 1 * 2; } else if (opc == 13) { - notethat ("dregs = dregs_byte (Z)"); OUTS (outf, dregs (dst)); OUTS (outf, "="); OUTS (outf, dregs_byte (src)); OUTS (outf, "(Z)"); - return 1 * 2; } else if (opc == 14) { - notethat ("dregs = - dregs"); OUTS (outf, dregs (dst)); OUTS (outf, "=-"); OUTS (outf, dregs (src)); - return 1 * 2; } else if (opc == 15) { - notethat ("dregs = ~ dregs"); OUTS (outf, dregs (dst)); OUTS (outf, "=~"); OUTS (outf, dregs (src)); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 2; } static int decode_PTR2op_0 (TIword iw0, disassemble_info *outf) { -/* PTR2op -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 0 | 1 | 0 | 0 | 0 | 1 | 0 |.opc.......|.src.......|.dst.......| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* PTR2op + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 0 | 1 | 0 | 0 | 0 | 1 | 0 |.opc.......|.src.......|.dst.......| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int src = ((iw0 >> PTR2op_src_bits) & PTR2op_dst_mask); int opc = ((iw0 >> PTR2op_opc_bits) & PTR2op_opc_mask); int dst = ((iw0 >> PTR2op_dst_bits) & PTR2op_dst_mask); if (opc == 0) { - notethat ("pregs -= pregs"); OUTS (outf, pregs (dst)); OUTS (outf, "-="); OUTS (outf, pregs (src)); - return 1 * 2; } else if (opc == 1) { - notethat ("pregs = pregs << 2"); OUTS (outf, pregs (dst)); OUTS (outf, "="); OUTS (outf, pregs (src)); OUTS (outf, "<<2"); - return 1 * 2; } else if (opc == 3) { - notethat ("pregs = pregs >> 2"); OUTS (outf, pregs (dst)); OUTS (outf, "="); OUTS (outf, pregs (src)); OUTS (outf, ">>2"); - return 1 * 2; } else if (opc == 4) { - notethat ("pregs = pregs >> 1"); OUTS (outf, pregs (dst)); OUTS (outf, "="); OUTS (outf, pregs (src)); OUTS (outf, ">>1"); - return 1 * 2; } else if (opc == 5) { - notethat ("pregs += pregs ( BREV )"); OUTS (outf, pregs (dst)); OUTS (outf, "+="); OUTS (outf, pregs (src)); OUTS (outf, "(BREV)"); - return 1 * 2; } else if (opc == 6) { - notethat ("pregs = (pregs + pregs) << 1"); OUTS (outf, pregs (dst)); OUTS (outf, "=("); OUTS (outf, pregs (dst)); OUTS (outf, "+"); OUTS (outf, pregs (src)); OUTS (outf, ")<<1"); - return 1 * 2; } else if (opc == 7) { - notethat ("pregs = (pregs + pregs) << 2"); OUTS (outf, pregs (dst)); OUTS (outf, "=("); OUTS (outf, pregs (dst)); OUTS (outf, "+"); OUTS (outf, pregs (src)); OUTS (outf, ")<<2"); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 2; } static int decode_LOGI2op_0 (TIword iw0, disassemble_info *outf) { -/* LOGI2op -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 0 | 1 | 0 | 0 | 1 |.opc.......|.src...............|.dst.......| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* LOGI2op + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 0 | 1 | 0 | 0 | 1 |.opc.......|.src...............|.dst.......| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int src = ((iw0 >> LOGI2op_src_bits) & LOGI2op_src_mask); int opc = ((iw0 >> LOGI2op_opc_bits) & LOGI2op_opc_mask); int dst = ((iw0 >> LOGI2op_dst_bits) & LOGI2op_dst_mask); if (opc == 0) { - notethat ("CC = ! BITTST ( dregs , uimm5 )"); OUTS (outf, "CC = ! BITTST ("); OUTS (outf, dregs (dst)); OUTS (outf, ","); OUTS (outf, uimm5 (src)); OUTS (outf, ")"); - return 1 * 2; } else if (opc == 1) { - notethat ("CC = BITTST ( dregs , uimm5 )"); OUTS (outf, "CC = BITTST ("); OUTS (outf, dregs (dst)); OUTS (outf, ","); OUTS (outf, uimm5 (src)); OUTS (outf, ")"); - return 1 * 2; } else if (opc == 2) { - notethat ("BITSET ( dregs , uimm5 )"); OUTS (outf, "BITSET ("); OUTS (outf, dregs (dst)); OUTS (outf, ","); OUTS (outf, uimm5 (src)); OUTS (outf, ")"); - return 1 * 2; } else if (opc == 3) { - notethat ("BITTGL ( dregs , uimm5 )"); OUTS (outf, "BITTGL ("); OUTS (outf, dregs (dst)); OUTS (outf, ","); OUTS (outf, uimm5 (src)); OUTS (outf, ")"); - return 1 * 2; } else if (opc == 4) { - notethat ("BITCLR ( dregs , uimm5 )"); OUTS (outf, "BITCLR ("); OUTS (outf, dregs (dst)); OUTS (outf, ","); OUTS (outf, uimm5 (src)); OUTS (outf, ")"); - return 1 * 2; } else if (opc == 5) { - notethat ("dregs >>>= uimm5"); OUTS (outf, dregs (dst)); OUTS (outf, ">>>="); OUTS (outf, uimm5 (src)); - return 1 * 2; } else if (opc == 6) { - notethat ("dregs >>= uimm5"); OUTS (outf, dregs (dst)); OUTS (outf, ">>="); OUTS (outf, uimm5 (src)); - return 1 * 2; } else if (opc == 7) { - notethat ("dregs <<= uimm5"); OUTS (outf, dregs (dst)); OUTS (outf, "<<="); OUTS (outf, uimm5 (src)); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 2; } static int decode_COMP3op_0 (TIword iw0, disassemble_info *outf) { -/* COMP3op -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 0 | 1 | 0 | 1 |.opc.......|.dst.......|.src1......|.src0......| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* COMP3op + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 0 | 1 | 0 | 1 |.opc.......|.dst.......|.src1......|.src0......| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int opc = ((iw0 >> COMP3op_opc_bits) & COMP3op_opc_mask); int dst = ((iw0 >> COMP3op_dst_bits) & COMP3op_dst_mask); int src0 = ((iw0 >> COMP3op_src0_bits) & COMP3op_src0_mask); @@ -1827,178 +1436,149 @@ decode_COMP3op_0 (TIword iw0, disassemble_info *outf) if (opc == 5 && src1 == src0) { - notethat ("pregs = pregs << 1"); OUTS (outf, pregs (dst)); OUTS (outf, "="); OUTS (outf, pregs (src0)); OUTS (outf, "<<1"); - return 1 * 2; } else if (opc == 1) { - notethat ("dregs = dregs - dregs"); OUTS (outf, dregs (dst)); OUTS (outf, "="); OUTS (outf, dregs (src0)); OUTS (outf, "-"); OUTS (outf, dregs (src1)); - return 1 * 2; } else if (opc == 2) { - notethat ("dregs = dregs & dregs"); OUTS (outf, dregs (dst)); OUTS (outf, "="); OUTS (outf, dregs (src0)); OUTS (outf, "&"); OUTS (outf, dregs (src1)); - return 1 * 2; } else if (opc == 3) { - notethat ("dregs = dregs | dregs"); OUTS (outf, dregs (dst)); OUTS (outf, "="); OUTS (outf, dregs (src0)); OUTS (outf, "|"); OUTS (outf, dregs (src1)); - return 1 * 2; } else if (opc == 4) { - notethat ("dregs = dregs ^ dregs"); OUTS (outf, dregs (dst)); OUTS (outf, "="); OUTS (outf, dregs (src0)); OUTS (outf, "^"); OUTS (outf, dregs (src1)); - return 1 * 2; } else if (opc == 5) { - notethat ("pregs = pregs + pregs"); OUTS (outf, pregs (dst)); OUTS (outf, "="); OUTS (outf, pregs (src0)); OUTS (outf, "+"); OUTS (outf, pregs (src1)); - return 1 * 2; } else if (opc == 6) { - notethat ("pregs = pregs + (pregs << 1)"); OUTS (outf, pregs (dst)); OUTS (outf, "="); OUTS (outf, pregs (src0)); OUTS (outf, "+("); OUTS (outf, pregs (src1)); OUTS (outf, "<<1)"); - return 1 * 2; } else if (opc == 7) { - notethat ("pregs = pregs + (pregs << 2)"); OUTS (outf, pregs (dst)); OUTS (outf, "="); OUTS (outf, pregs (src0)); OUTS (outf, "+("); OUTS (outf, pregs (src1)); OUTS (outf, "<<2)"); - return 1 * 2; } else if (opc == 0) { - notethat ("dregs = dregs + dregs"); OUTS (outf, dregs (dst)); OUTS (outf, "="); OUTS (outf, dregs (src0)); OUTS (outf, "+"); OUTS (outf, dregs (src1)); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 2; } static int decode_COMPI2opD_0 (TIword iw0, disassemble_info *outf) { -/* COMPI2opD -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 0 | 1 | 1 | 0 | 0 |.op|..src......................|.dst.......| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* COMPI2opD + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 0 | 1 | 1 | 0 | 0 |.op|..src......................|.dst.......| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int op = ((iw0 >> COMPI2opD_op_bits) & COMPI2opD_op_mask); int dst = ((iw0 >> COMPI2opD_dst_bits) & COMPI2opD_dst_mask); int src = ((iw0 >> COMPI2opD_src_bits) & COMPI2opD_src_mask); if (op == 0) { - notethat ("dregs = imm7 (x)"); OUTS (outf, dregs (dst)); OUTS (outf, "="); OUTS (outf, imm7 (src)); OUTS (outf, "(x)"); - return 1 * 2; } else if (op == 1) { - notethat ("dregs += imm7"); OUTS (outf, dregs (dst)); OUTS (outf, "+="); OUTS (outf, imm7 (src)); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 2; } static int decode_COMPI2opP_0 (TIword iw0, disassemble_info *outf) { -/* COMPI2opP -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 0 | 1 | 1 | 0 | 1 |.op|.src.......................|.dst.......| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* COMPI2opP + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 0 | 1 | 1 | 0 | 1 |.op|.src.......................|.dst.......| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int op = ((iw0 >> COMPI2opP_op_bits) & COMPI2opP_op_mask); int src = ((iw0 >> COMPI2opP_src_bits) & COMPI2opP_src_mask); int dst = ((iw0 >> COMPI2opP_dst_bits) & COMPI2opP_dst_mask); if (op == 0) { - notethat ("pregs = imm7"); OUTS (outf, pregs (dst)); OUTS (outf, "="); OUTS (outf, imm7 (src)); - return 1 * 2; } else if (op == 1) { - notethat ("pregs += imm7"); OUTS (outf, pregs (dst)); OUTS (outf, "+="); OUTS (outf, imm7 (src)); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 2; } static int decode_LDSTpmod_0 (TIword iw0, disassemble_info *outf) { -/* LDSTpmod -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 1 | 0 | 0 | 0 |.W.|.aop...|.reg.......|.idx.......|.ptr.......| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* LDSTpmod + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 1 | 0 | 0 | 0 |.W.|.aop...|.reg.......|.idx.......|.ptr.......| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int W = ((iw0 >> LDSTpmod_W_bits) & LDSTpmod_W_mask); int aop = ((iw0 >> LDSTpmod_aop_bits) & LDSTpmod_aop_mask); int idx = ((iw0 >> LDSTpmod_idx_bits) & LDSTpmod_idx_mask); @@ -2007,142 +1587,117 @@ decode_LDSTpmod_0 (TIword iw0, disassemble_info *outf) if (aop == 1 && W == 0 && idx == ptr) { - notethat ("dregs_lo = W [ pregs ]"); OUTS (outf, dregs_lo (reg)); OUTS (outf, "=W["); OUTS (outf, pregs (ptr)); OUTS (outf, "]"); - return 1 * 2; } else if (aop == 2 && W == 0 && idx == ptr) { - notethat ("dregs_hi = W [ pregs ]"); OUTS (outf, dregs_hi (reg)); OUTS (outf, "=W["); OUTS (outf, pregs (ptr)); OUTS (outf, "]"); - return 1 * 2; } else if (aop == 1 && W == 1 && idx == ptr) { - notethat ("W [ pregs ] = dregs_lo"); OUTS (outf, "W["); OUTS (outf, pregs (ptr)); OUTS (outf, "]="); OUTS (outf, dregs_lo (reg)); - return 1 * 2; } else if (aop == 2 && W == 1 && idx == ptr) { - notethat ("W [ pregs ] = dregs_hi"); OUTS (outf, "W["); OUTS (outf, pregs (ptr)); OUTS (outf, "]="); OUTS (outf, dregs_hi (reg)); - return 1 * 2; } else if (aop == 0 && W == 0) { - notethat ("dregs = [ pregs ++ pregs ]"); OUTS (outf, dregs (reg)); OUTS (outf, "=["); OUTS (outf, pregs (ptr)); OUTS (outf, "++"); OUTS (outf, pregs (idx)); OUTS (outf, "]"); - return 1 * 2; } else if (aop == 1 && W == 0) { - notethat ("dregs_lo = W [ pregs ++ pregs ]"); OUTS (outf, dregs_lo (reg)); OUTS (outf, "=W["); OUTS (outf, pregs (ptr)); OUTS (outf, "++"); OUTS (outf, pregs (idx)); OUTS (outf, "]"); - return 1 * 2; } else if (aop == 2 && W == 0) { - notethat ("dregs_hi = W [ pregs ++ pregs ]"); OUTS (outf, dregs_hi (reg)); OUTS (outf, "=W["); OUTS (outf, pregs (ptr)); OUTS (outf, "++"); OUTS (outf, pregs (idx)); OUTS (outf, "]"); - return 1 * 2; } else if (aop == 3 && W == 0) { - notethat ("dregs = W [ pregs ++ pregs ] (Z)"); OUTS (outf, dregs (reg)); OUTS (outf, "=W["); OUTS (outf, pregs (ptr)); OUTS (outf, "++"); OUTS (outf, pregs (idx)); OUTS (outf, "] (Z)"); - return 1 * 2; } else if (aop == 3 && W == 1) { - notethat ("dregs = W [ pregs ++ pregs ] (X)"); OUTS (outf, dregs (reg)); OUTS (outf, "=W["); OUTS (outf, pregs (ptr)); OUTS (outf, "++"); OUTS (outf, pregs (idx)); OUTS (outf, "](X)"); - return 1 * 2; } else if (aop == 0 && W == 1) { - notethat ("[ pregs ++ pregs ] = dregs"); OUTS (outf, "["); OUTS (outf, pregs (ptr)); OUTS (outf, "++"); OUTS (outf, pregs (idx)); OUTS (outf, "]="); OUTS (outf, dregs (reg)); - return 1 * 2; } else if (aop == 1 && W == 1) { - notethat (" W [ pregs ++ pregs ] = dregs_lo"); OUTS (outf, "W["); OUTS (outf, pregs (ptr)); OUTS (outf, "++"); OUTS (outf, pregs (idx)); OUTS (outf, "]="); OUTS (outf, dregs_lo (reg)); - return 1 * 2; } else if (aop == 2 && W == 1) { - notethat (" W[ pregs ++ pregs ] = dregs_hi"); OUTS (outf, "W["); OUTS (outf, pregs (ptr)); OUTS (outf, "++"); OUTS (outf, pregs (idx)); OUTS (outf, "]="); OUTS (outf, dregs_hi (reg)); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 2; } static int decode_dagMODim_0 (TIword iw0, disassemble_info *outf) { -/* dagMODim -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 |.br| 1 | 1 |.op|.m.....|.i.....| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* dagMODim + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 |.br| 1 | 1 |.op|.m.....|.i.....| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int i = ((iw0 >> DagMODim_i_bits) & DagMODim_i_mask); int m = ((iw0 >> DagMODim_m_bits) & DagMODim_m_mask); int br = ((iw0 >> DagMODim_br_bits) & DagMODim_br_mask); @@ -2150,88 +1705,72 @@ decode_dagMODim_0 (TIword iw0, disassemble_info *outf) if (op == 0 && br == 1) { - notethat ("iregs += mregs ( BREV )"); OUTS (outf, iregs (i)); OUTS (outf, "+="); OUTS (outf, mregs (m)); OUTS (outf, "(BREV)"); - return 1 * 2; } else if (op == 0) { - notethat ("iregs += mregs"); OUTS (outf, iregs (i)); OUTS (outf, "+="); OUTS (outf, mregs (m)); - return 1 * 2; } else if (op == 1) { - notethat ("iregs -= mregs"); OUTS (outf, iregs (i)); OUTS (outf, "-="); OUTS (outf, mregs (m)); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 2; } static int decode_dagMODik_0 (TIword iw0, disassemble_info *outf) { -/* dagMODik -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 |.op....|.i.....| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* dagMODik + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 |.op....|.i.....| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int i = ((iw0 >> DagMODik_i_bits) & DagMODik_i_mask); int op = ((iw0 >> DagMODik_op_bits) & DagMODik_op_mask); if (op == 0) { - notethat ("iregs += 2"); OUTS (outf, iregs (i)); OUTS (outf, "+=2"); - return 1 * 2; } else if (op == 1) { - notethat ("iregs -= 2"); OUTS (outf, iregs (i)); OUTS (outf, "-=2"); - return 1 * 2; } else if (op == 2) { - notethat ("iregs += 4"); OUTS (outf, iregs (i)); OUTS (outf, "+=4"); - return 1 * 2; } else if (op == 3) { - notethat ("iregs -= 4"); OUTS (outf, iregs (i)); OUTS (outf, "-=4"); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 2; } static int decode_dspLDST_0 (TIword iw0, disassemble_info *outf) { -/* dspLDST -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 1 | 0 | 0 | 1 | 1 | 1 |.W.|.aop...|.m.....|.i.....|.reg.......| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* dspLDST + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 1 | 0 | 0 | 1 | 1 | 1 |.W.|.aop...|.m.....|.i.....|.reg.......| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int i = ((iw0 >> DspLDST_i_bits) & DspLDST_i_mask); int m = ((iw0 >> DspLDST_m_bits) & DspLDST_m_mask); int W = ((iw0 >> DspLDST_W_bits) & DspLDST_W_mask); @@ -2240,202 +1779,161 @@ decode_dspLDST_0 (TIword iw0, disassemble_info *outf) if (aop == 0 && W == 0 && m == 0) { - notethat ("dregs = [ iregs ++ ]"); OUTS (outf, dregs (reg)); OUTS (outf, "=["); OUTS (outf, iregs (i)); OUTS (outf, "++]"); - return 1 * 2; } else if (aop == 0 && W == 0 && m == 1) { - notethat ("dregs_lo = W [ iregs ++ ]"); OUTS (outf, dregs_lo (reg)); OUTS (outf, "=W["); OUTS (outf, iregs (i)); OUTS (outf, "++]"); - return 1 * 2; } else if (aop == 0 && W == 0 && m == 2) { - notethat ("dregs_hi = W [ iregs ++ ]"); OUTS (outf, dregs_hi (reg)); OUTS (outf, "=W["); OUTS (outf, iregs (i)); OUTS (outf, "++]"); - return 1 * 2; } else if (aop == 1 && W == 0 && m == 0) { - notethat ("dregs = [ iregs -- ]"); OUTS (outf, dregs (reg)); OUTS (outf, "=["); OUTS (outf, iregs (i)); OUTS (outf, "--]"); - return 1 * 2; } else if (aop == 1 && W == 0 && m == 1) { - notethat ("dregs_lo = W [ iregs -- ]"); OUTS (outf, dregs_lo (reg)); OUTS (outf, "=W["); OUTS (outf, iregs (i)); OUTS (outf, "--]"); - return 1 * 2; } else if (aop == 1 && W == 0 && m == 2) { - notethat ("dregs_hi = W [ iregs -- ]"); OUTS (outf, dregs_hi (reg)); OUTS (outf, "=W["); OUTS (outf, iregs (i)); OUTS (outf, "--]"); - return 1 * 2; } else if (aop == 2 && W == 0 && m == 0) { - notethat ("dregs = [ iregs ]"); OUTS (outf, dregs (reg)); OUTS (outf, "=["); OUTS (outf, iregs (i)); OUTS (outf, "]"); - return 1 * 2; } else if (aop == 2 && W == 0 && m == 1) { - notethat ("dregs_lo = W [ iregs ]"); OUTS (outf, dregs_lo (reg)); OUTS (outf, "=W["); OUTS (outf, iregs (i)); OUTS (outf, "]"); - return 1 * 2; } else if (aop == 2 && W == 0 && m == 2) { - notethat ("dregs_hi = W [ iregs ]"); OUTS (outf, dregs_hi (reg)); OUTS (outf, "=W["); OUTS (outf, iregs (i)); OUTS (outf, "]"); - return 1 * 2; } else if (aop == 0 && W == 1 && m == 0) { - notethat ("[ iregs ++ ] = dregs"); OUTS (outf, "["); OUTS (outf, iregs (i)); OUTS (outf, "++]="); OUTS (outf, dregs (reg)); - return 1 * 2; } else if (aop == 0 && W == 1 && m == 1) { - notethat ("W [ iregs ++ ] = dregs_lo"); OUTS (outf, "W["); OUTS (outf, iregs (i)); OUTS (outf, "++]="); OUTS (outf, dregs_lo (reg)); - return 1 * 2; } else if (aop == 0 && W == 1 && m == 2) { - notethat ("W [ iregs ++ ] = dregs_hi"); OUTS (outf, "W["); OUTS (outf, iregs (i)); OUTS (outf, "++]="); OUTS (outf, dregs_hi (reg)); - return 1 * 2; } else if (aop == 1 && W == 1 && m == 0) { - notethat ("[ iregs -- ] = dregs"); OUTS (outf, "["); OUTS (outf, iregs (i)); OUTS (outf, "--]="); OUTS (outf, dregs (reg)); - return 1 * 2; } else if (aop == 1 && W == 1 && m == 1) { - notethat ("W [ iregs -- ] = dregs_lo"); OUTS (outf, "W["); OUTS (outf, iregs (i)); OUTS (outf, "--]="); OUTS (outf, dregs_lo (reg)); - return 1 * 2; } else if (aop == 1 && W == 1 && m == 2) { - notethat ("W [ iregs -- ] = dregs_hi"); OUTS (outf, "W["); OUTS (outf, iregs (i)); OUTS (outf, "--]="); OUTS (outf, dregs_hi (reg)); - return 1 * 2; } else if (aop == 2 && W == 1 && m == 0) { - notethat ("[ iregs ] = dregs"); OUTS (outf, "["); OUTS (outf, iregs (i)); OUTS (outf, "]="); OUTS (outf, dregs (reg)); - return 1 * 2; } else if (aop == 2 && W == 1 && m == 1) { - notethat (" W [ iregs ] = dregs_lo"); OUTS (outf, "W["); OUTS (outf, iregs (i)); OUTS (outf, "]="); OUTS (outf, dregs_lo (reg)); - return 1 * 2; } else if (aop == 2 && W == 1 && m == 2) { - notethat (" W [ iregs ] = dregs_hi"); OUTS (outf, "W["); OUTS (outf, iregs (i)); OUTS (outf, "]="); OUTS (outf, dregs_hi (reg)); - return 1 * 2; } else if (aop == 3 && W == 0) { - notethat ("dregs = [ iregs ++ mregs ]"); OUTS (outf, dregs (reg)); OUTS (outf, "=["); OUTS (outf, iregs (i)); OUTS (outf, "++"); OUTS (outf, mregs (m)); OUTS (outf, "]"); - return 1 * 2; } else if (aop == 3 && W == 1) { - notethat ("[ iregs ++ mregs ] = dregs"); OUTS (outf, "["); OUTS (outf, iregs (i)); OUTS (outf, "++"); OUTS (outf, mregs (m)); OUTS (outf, "]="); OUTS (outf, dregs (reg)); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 2; } static int decode_LDST_0 (TIword iw0, disassemble_info *outf) { -/* LDST -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 1 | 0 | 0 | 1 |.sz....|.W.|.aop...|.Z.|.ptr.......|.reg.......| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* LDST + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 1 | 0 | 0 | 1 |.sz....|.W.|.aop...|.Z.|.ptr.......|.reg.......| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int Z = ((iw0 >> LDST_Z_bits) & LDST_Z_mask); int W = ((iw0 >> LDST_W_bits) & LDST_W_mask); int sz = ((iw0 >> LDST_sz_bits) & LDST_sz_mask); @@ -2445,324 +1943,258 @@ decode_LDST_0 (TIword iw0, disassemble_info *outf) if (aop == 0 && sz == 0 && Z == 0 && W == 0) { - notethat ("dregs = [ pregs ++ ]"); OUTS (outf, dregs (reg)); OUTS (outf, "=["); OUTS (outf, pregs (ptr)); OUTS (outf, "++]"); - return 1 * 2; } else if (aop == 0 && sz == 0 && Z == 1 && W == 0) { - notethat ("pregs = [ pregs ++ ]"); OUTS (outf, pregs (reg)); OUTS (outf, "=["); OUTS (outf, pregs (ptr)); OUTS (outf, "++]"); - return 1 * 2; } else if (aop == 0 && sz == 1 && Z == 0 && W == 0) { - notethat ("dregs = W [ pregs ++ ] (z)"); OUTS (outf, dregs (reg)); OUTS (outf, "=W["); OUTS (outf, pregs (ptr)); OUTS (outf, "++] (Z)"); - return 1 * 2; } else if (aop == 0 && sz == 1 && Z == 1 && W == 0) { - notethat ("dregs = W [ pregs ++ ] (X)"); OUTS (outf, dregs (reg)); OUTS (outf, "=W["); OUTS (outf, pregs (ptr)); OUTS (outf, "++](X)"); - return 1 * 2; } else if (aop == 0 && sz == 2 && Z == 0 && W == 0) { - notethat ("dregs = B [ pregs ++ ] (Z)"); OUTS (outf, dregs (reg)); OUTS (outf, "=B["); OUTS (outf, pregs (ptr)); OUTS (outf, "++] (Z)"); - return 1 * 2; } else if (aop == 0 && sz == 2 && Z == 1 && W == 0) { - notethat ("dregs = B [ pregs ++ ] (X)"); OUTS (outf, dregs (reg)); OUTS (outf, "=B["); OUTS (outf, pregs (ptr)); OUTS (outf, "++](X)"); - return 1 * 2; } else if (aop == 1 && sz == 0 && Z == 0 && W == 0) { - notethat ("dregs = [ pregs -- ]"); OUTS (outf, dregs (reg)); OUTS (outf, "=["); OUTS (outf, pregs (ptr)); OUTS (outf, "--]"); - return 1 * 2; } else if (aop == 1 && sz == 0 && Z == 1 && W == 0) { - notethat ("pregs = [ pregs -- ]"); OUTS (outf, pregs (reg)); OUTS (outf, "=["); OUTS (outf, pregs (ptr)); OUTS (outf, "--]"); - return 1 * 2; } else if (aop == 1 && sz == 1 && Z == 0 && W == 0) { - notethat ("dregs = W [ pregs -- ] (Z)"); OUTS (outf, dregs (reg)); OUTS (outf, "=W["); OUTS (outf, pregs (ptr)); OUTS (outf, "--] (Z)"); - return 1 * 2; } else if (aop == 1 && sz == 1 && Z == 1 && W == 0) { - notethat ("dregs = W [ pregs -- ] (X)"); OUTS (outf, dregs (reg)); OUTS (outf, "=W["); OUTS (outf, pregs (ptr)); OUTS (outf, "--](X)"); - return 1 * 2; } else if (aop == 1 && sz == 2 && Z == 0 && W == 0) { - notethat ("dregs = B [ pregs -- ] (Z)"); OUTS (outf, dregs (reg)); OUTS (outf, "=B["); OUTS (outf, pregs (ptr)); OUTS (outf, "--] (Z)"); - return 1 * 2; } else if (aop == 1 && sz == 2 && Z == 1 && W == 0) { - notethat ("dregs = B [ pregs -- ] (X)"); OUTS (outf, dregs (reg)); OUTS (outf, "=B["); OUTS (outf, pregs (ptr)); OUTS (outf, "--](X)"); - return 1 * 2; } else if (aop == 2 && sz == 0 && Z == 0 && W == 0) { - notethat ("dregs = [ pregs ]"); OUTS (outf, dregs (reg)); OUTS (outf, "=["); OUTS (outf, pregs (ptr)); OUTS (outf, "]"); - return 1 * 2; } else if (aop == 2 && sz == 0 && Z == 1 && W == 0) { - notethat ("pregs = [ pregs ]"); OUTS (outf, pregs (reg)); OUTS (outf, "=["); OUTS (outf, pregs (ptr)); OUTS (outf, "]"); - return 1 * 2; } else if (aop == 2 && sz == 1 && Z == 0 && W == 0) { - notethat ("dregs = W [ pregs ] (Z)"); OUTS (outf, dregs (reg)); OUTS (outf, "=W["); OUTS (outf, pregs (ptr)); OUTS (outf, "] (Z)"); - return 1 * 2; } else if (aop == 2 && sz == 1 && Z == 1 && W == 0) { - notethat ("dregs = W [ pregs ] (X)"); OUTS (outf, dregs (reg)); OUTS (outf, "=W["); OUTS (outf, pregs (ptr)); OUTS (outf, "](X)"); - return 1 * 2; } else if (aop == 2 && sz == 2 && Z == 0 && W == 0) { - notethat ("dregs = B [ pregs ] (Z)"); OUTS (outf, dregs (reg)); OUTS (outf, "=B["); OUTS (outf, pregs (ptr)); OUTS (outf, "] (Z)"); - return 1 * 2; } else if (aop == 2 && sz == 2 && Z == 1 && W == 0) { - notethat ("dregs = B [ pregs ] (X)"); OUTS (outf, dregs (reg)); OUTS (outf, "=B["); OUTS (outf, pregs (ptr)); OUTS (outf, "](X)"); - return 1 * 2; } else if (aop == 0 && sz == 0 && Z == 0 && W == 1) { - notethat ("[ pregs ++ ] = dregs"); OUTS (outf, "["); OUTS (outf, pregs (ptr)); OUTS (outf, "++]="); OUTS (outf, dregs (reg)); - return 1 * 2; } else if (aop == 0 && sz == 0 && Z == 1 && W == 1) { - notethat ("[ pregs ++ ] = pregs"); OUTS (outf, "["); OUTS (outf, pregs (ptr)); OUTS (outf, "++]="); OUTS (outf, pregs (reg)); - return 1 * 2; } else if (aop == 0 && sz == 1 && Z == 0 && W == 1) { - notethat ("W [ pregs ++ ] = dregs"); OUTS (outf, "W["); OUTS (outf, pregs (ptr)); OUTS (outf, "++]="); OUTS (outf, dregs (reg)); - return 1 * 2; } else if (aop == 0 && sz == 2 && Z == 0 && W == 1) { - notethat ("B [ pregs ++ ] = dregs"); OUTS (outf, "B["); OUTS (outf, pregs (ptr)); OUTS (outf, "++]="); OUTS (outf, dregs (reg)); - return 1 * 2; } else if (aop == 1 && sz == 0 && Z == 0 && W == 1) { - notethat ("[ pregs -- ] = dregs"); OUTS (outf, "["); OUTS (outf, pregs (ptr)); OUTS (outf, "--]="); OUTS (outf, dregs (reg)); - return 1 * 2; } else if (aop == 1 && sz == 0 && Z == 1 && W == 1) { - notethat ("[ pregs -- ] = pregs"); OUTS (outf, "["); OUTS (outf, pregs (ptr)); OUTS (outf, "--]="); OUTS (outf, pregs (reg)); - return 1 * 2; } else if (aop == 1 && sz == 1 && Z == 0 && W == 1) { - notethat ("W [ pregs -- ] = dregs"); OUTS (outf, "W["); OUTS (outf, pregs (ptr)); OUTS (outf, "--]="); OUTS (outf, dregs (reg)); - return 1 * 2; } else if (aop == 1 && sz == 2 && Z == 0 && W == 1) { - notethat ("B [ pregs -- ] = dregs"); OUTS (outf, "B["); OUTS (outf, pregs (ptr)); OUTS (outf, "--]="); OUTS (outf, dregs (reg)); - return 1 * 2; } else if (aop == 2 && sz == 0 && Z == 0 && W == 1) { - notethat ("[ pregs ] = dregs"); OUTS (outf, "["); OUTS (outf, pregs (ptr)); OUTS (outf, "]="); OUTS (outf, dregs (reg)); - return 1 * 2; } else if (aop == 2 && sz == 0 && Z == 1 && W == 1) { - notethat ("[ pregs ] = pregs"); OUTS (outf, "["); OUTS (outf, pregs (ptr)); OUTS (outf, "]="); OUTS (outf, pregs (reg)); - return 1 * 2; } else if (aop == 2 && sz == 1 && Z == 0 && W == 1) { - notethat ("W [ pregs ] = dregs"); OUTS (outf, "W["); OUTS (outf, pregs (ptr)); OUTS (outf, "]="); OUTS (outf, dregs (reg)); - return 1 * 2; } else if (aop == 2 && sz == 2 && Z == 0 && W == 1) { - notethat ("B [ pregs ] = dregs"); OUTS (outf, "B["); OUTS (outf, pregs (ptr)); OUTS (outf, "]="); OUTS (outf, dregs (reg)); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 2; } static int decode_LDSTiiFP_0 (TIword iw0, disassemble_info *outf) { -/* LDSTiiFP -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 1 | 0 | 1 | 1 | 1 | 0 |.W.|.offset............|.reg...........| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* LDSTiiFP + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 1 | 0 | 1 | 1 | 1 | 0 |.W.|.offset............|.reg...........| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int reg = ((iw0 >> LDSTiiFP_reg_bits) & LDSTiiFP_reg_mask); int offset = ((iw0 >> LDSTiiFP_offset_bits) & LDSTiiFP_offset_mask); int W = ((iw0 >> LDSTiiFP_W_bits) & LDSTiiFP_W_mask); if (W == 0) { - notethat ("dpregs = [ FP - negimm5s4 ]"); OUTS (outf, dpregs (reg)); OUTS (outf, "=[FP"); OUTS (outf, negimm5s4 (offset)); OUTS (outf, "]"); - return 1 * 2; } else if (W == 1) { - notethat ("[ FP - negimm5s4 ] = dpregs"); OUTS (outf, "[FP"); OUTS (outf, negimm5s4 (offset)); OUTS (outf, "]="); OUTS (outf, dpregs (reg)); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 2; } static int decode_LDSTii_0 (TIword iw0, disassemble_info *outf) { -/* LDSTii -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 1 | 0 | 1 |.W.|.op....|.offset........|.ptr.......|.reg.......| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* LDSTii + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 1 | 0 | 1 |.W.|.op....|.offset........|.ptr.......|.reg.......| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int reg = ((iw0 >> LDSTii_reg_bit) & LDSTii_reg_mask); int ptr = ((iw0 >> LDSTii_ptr_bit) & LDSTii_ptr_mask); int offset = ((iw0 >> LDSTii_offset_bit) & LDSTii_offset_mask); @@ -2771,62 +2203,51 @@ decode_LDSTii_0 (TIword iw0, disassemble_info *outf) if (W == 0 && op == 0) { - notethat ("dregs = [ pregs + uimm4s4 ]"); OUTS (outf, dregs (reg)); OUTS (outf, "=["); OUTS (outf, pregs (ptr)); OUTS (outf, "+"); OUTS (outf, uimm4s4 (offset)); OUTS (outf, "]"); - return 1 * 2; } else if (W == 0 && op == 1) { - notethat ("dregs = W [ pregs + uimm4s2 ] (Z)"); OUTS (outf, dregs (reg)); OUTS (outf, "=W["); OUTS (outf, pregs (ptr)); OUTS (outf, "+"); OUTS (outf, uimm4s2 (offset)); OUTS (outf, "] (Z)"); - return 1 * 2; } else if (W == 0 && op == 2) { - notethat ("dregs = W [ pregs + uimm4s2 ] (X)"); OUTS (outf, dregs (reg)); OUTS (outf, "=W["); OUTS (outf, pregs (ptr)); OUTS (outf, "+"); OUTS (outf, uimm4s2 (offset)); OUTS (outf, "](X)"); - return 1 * 2; } else if (W == 0 && op == 3) { - notethat ("pregs = [ pregs + uimm4s4 ]"); OUTS (outf, pregs (reg)); OUTS (outf, "=["); OUTS (outf, pregs (ptr)); OUTS (outf, "+"); OUTS (outf, uimm4s4 (offset)); OUTS (outf, "]"); - return 1 * 2; } else if (W == 1 && op == 0) { - notethat ("[ pregs + uimm4s4 ] = dregs"); OUTS (outf, "["); OUTS (outf, pregs (ptr)); OUTS (outf, "+"); OUTS (outf, uimm4s4 (offset)); OUTS (outf, "]="); OUTS (outf, dregs (reg)); - return 1 * 2; } else if (W == 1 && op == 1) { - notethat ("W [ pregs + uimm4s2 ] = dregs"); OUTS (outf, "W"); OUTS (outf, "["); OUTS (outf, pregs (ptr)); @@ -2835,34 +2256,30 @@ decode_LDSTii_0 (TIword iw0, disassemble_info *outf) OUTS (outf, "]"); OUTS (outf, "="); OUTS (outf, dregs (reg)); - return 1 * 2; } else if (W == 1 && op == 3) { - notethat ("[ pregs + uimm4s4 ] = pregs"); OUTS (outf, "["); OUTS (outf, pregs (ptr)); OUTS (outf, "+"); OUTS (outf, uimm4s4 (offset)); OUTS (outf, "]="); OUTS (outf, pregs (reg)); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 2; } static int decode_LoopSetup_0 (TIword iw0, TIword iw1, bfd_vma pc, disassemble_info *outf) { -/* LoopSetup -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 |.rop...|.c.|.soffset.......| -|.reg...........| - | - |.eoffset...............................| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* LoopSetup + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 |.rop...|.c.|.soffset.......| + |.reg...........| - | - |.eoffset...............................| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int c = ((iw0 >> (LoopSetup_c_bits - 16)) & LoopSetup_c_mask); int reg = ((iw1 >> LoopSetup_reg_bits) & LoopSetup_reg_mask); int rop = ((iw0 >> (LoopSetup_rop_bits - 16)) & LoopSetup_rop_mask); @@ -2871,7 +2288,6 @@ decode_LoopSetup_0 (TIword iw0, TIword iw1, bfd_vma pc, disassemble_info *outf) if (rop == 0) { - notethat ("LSETUP ( pcrel4 , lppcrel10 ) counters"); OUTS (outf, "LSETUP"); OUTS (outf, "("); OUTS (outf, pcrel4 (soffset)); @@ -2879,11 +2295,9 @@ decode_LoopSetup_0 (TIword iw0, TIword iw1, bfd_vma pc, disassemble_info *outf) OUTS (outf, lppcrel10 (eoffset)); OUTS (outf, ")"); OUTS (outf, counters (c)); - return 2 * 2; } else if (rop == 1) { - notethat ("LSETUP ( pcrel4 , lppcrel10 ) counters = pregs"); OUTS (outf, "LSETUP"); OUTS (outf, "("); OUTS (outf, pcrel4 (soffset)); @@ -2893,11 +2307,9 @@ decode_LoopSetup_0 (TIword iw0, TIword iw1, bfd_vma pc, disassemble_info *outf) OUTS (outf, counters (c)); OUTS (outf, "="); OUTS (outf, pregs (reg)); - return 2 * 2; } else if (rop == 3) { - notethat ("LSETUP ( pcrel4 , lppcrel10 ) counters = pregs >> 1"); OUTS (outf, "LSETUP"); OUTS (outf, "("); OUTS (outf, pcrel4 (soffset)); @@ -2908,23 +2320,21 @@ decode_LoopSetup_0 (TIword iw0, TIword iw1, bfd_vma pc, disassemble_info *outf) OUTS (outf, "="); OUTS (outf, pregs (reg)); OUTS (outf, ">>1"); - return 2 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 4; } static int decode_LDIMMhalf_0 (TIword iw0, TIword iw1, disassemble_info *outf) { -/* LDIMMhalf -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 |.Z.|.H.|.S.|.grp...|.reg.......| -|.hword.........................................................| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* LDIMMhalf + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 |.Z.|.H.|.S.|.grp...|.reg.......| + |.hword.........................................................| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int H = ((iw0 >> (LDIMMhalf_H_bits - 16)) & LDIMMhalf_H_mask); int Z = ((iw0 >> (LDIMMhalf_Z_bits - 16)) & LDIMMhalf_Z_mask); int S = ((iw0 >> (LDIMMhalf_S_bits - 16)) & LDIMMhalf_S_mask); @@ -2934,111 +2344,86 @@ decode_LDIMMhalf_0 (TIword iw0, TIword iw1, disassemble_info *outf) if (grp == 0 && H == 0 && S == 0 && Z == 0) { - notethat ("dregs_lo = imm16"); OUTS (outf, dregs_lo (reg)); OUTS (outf, "="); OUTS (outf, imm16 (hword)); - return 2 * 2; } else if (grp == 0 && H == 1 && S == 0 && Z == 0) { - notethat ("dregs_hi = imm16"); OUTS (outf, dregs_hi (reg)); OUTS (outf, "="); OUTS (outf, imm16 (hword)); - return 2 * 2; } else if (grp == 0 && H == 0 && S == 1 && Z == 0) { - notethat ("dregs = imm16 (x)"); OUTS (outf, dregs (reg)); OUTS (outf, "="); OUTS (outf, imm16 (hword)); OUTS (outf, " (X)"); - return 2 * 2; } else if (H == 0 && S == 1 && Z == 0) { - notethat ("regs = imm16 (x)"); OUTS (outf, regs (reg, grp)); OUTS (outf, "="); OUTS (outf, imm16 (hword)); OUTS (outf, " (X)"); - return 2 * 2; } else if (H == 0 && S == 0 && Z == 1) { - notethat ("regs = luimm16 (Z)"); OUTS (outf, regs (reg, grp)); OUTS (outf, "="); OUTS (outf, luimm16 (hword)); OUTS (outf, "(Z)"); - return 2 * 2; } else if (H == 0 && S == 0 && Z == 0) { - notethat ("regs_lo = luimm16"); OUTS (outf, regs_lo (reg, grp)); OUTS (outf, "="); OUTS (outf, luimm16 (hword)); - return 2 * 2; } else if (H == 1 && S == 0 && Z == 0) { - notethat ("regs_hi = huimm16"); OUTS (outf, regs_hi (reg, grp)); OUTS (outf, "="); OUTS (outf, huimm16 (hword)); - return 2 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 4; } static int decode_CALLa_0 (TIword iw0, TIword iw1, bfd_vma pc, disassemble_info *outf) { -/* CALLa -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 1 | 1 | 1 | 0 | 0 | 0 | 1 |.S.|.msw...........................| -|.lsw...........................................................| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* CALLa + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 1 | 1 | 1 | 0 | 0 | 0 | 1 |.S.|.msw...........................| + |.lsw...........................................................| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int S = ((iw0 >> (CALLa_S_bits - 16)) & CALLa_S_mask); int lsw = ((iw1 >> 0) & 0xffff); int msw = ((iw0 >> 0) & 0xff); if (S == 1) - { - notethat ("CALL pcrel24"); - OUTS (outf, "CALL "); - OUTS (outf, pcrel24 (((msw) << 16) | (lsw))); - return 2 * 2; - } + OUTS (outf, "CALL "); else if (S == 0) - { - notethat ("JUMP.L pcrel24"); - OUTS (outf, "JUMP.L "); - OUTS (outf, pcrel24 (((msw) << 16) | (lsw))); - return 2 * 2; - } + OUTS (outf, "JUMP.L "); else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + OUTS (outf, pcrel24 (((msw) << 16) | (lsw))); + return 4; } static int decode_LDSTidxI_0 (TIword iw0, TIword iw1, disassemble_info *outf) { -/* LDSTidxI -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 1 | 1 | 1 | 0 | 0 | 1 |.W.|.Z.|.sz....|.ptr.......|.reg.......| -|.offset........................................................| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* LDSTidxI + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 1 | 1 | 1 | 0 | 0 | 1 |.W.|.Z.|.sz....|.ptr.......|.reg.......| + |.offset........................................................| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int Z = ((iw0 >> (LDSTidxI_Z_bits - 16)) & LDSTidxI_Z_mask); int W = ((iw0 >> (LDSTidxI_W_bits - 16)) & LDSTidxI_W_mask); int sz = ((iw0 >> (LDSTidxI_sz_bits - 16)) & LDSTidxI_sz_mask); @@ -3048,174 +2433,146 @@ decode_LDSTidxI_0 (TIword iw0, TIword iw1, disassemble_info *outf) if (W == 0 && sz == 0 && Z == 0) { - notethat ("dregs = [ pregs + imm16s4 ]"); OUTS (outf, dregs (reg)); OUTS (outf, "=["); OUTS (outf, pregs (ptr)); OUTS (outf, "+"); OUTS (outf, imm16s4 (offset)); OUTS (outf, "]"); - return 2 * 2; } else if (W == 0 && sz == 0 && Z == 1) { - notethat ("pregs = [ pregs + imm16s4 ]"); OUTS (outf, pregs (reg)); OUTS (outf, "=["); OUTS (outf, pregs (ptr)); OUTS (outf, "+"); OUTS (outf, imm16s4 (offset)); OUTS (outf, "]"); - return 2 * 2; } else if (W == 0 && sz == 1 && Z == 0) { - notethat ("dregs = W [ pregs + imm16s2 ] (Z)"); OUTS (outf, dregs (reg)); OUTS (outf, "=W["); OUTS (outf, pregs (ptr)); OUTS (outf, "+"); OUTS (outf, imm16s2 (offset)); OUTS (outf, "] (Z)"); - return 2 * 2; } else if (W == 0 && sz == 1 && Z == 1) { - notethat ("dregs = W [ pregs + imm16s2 ] (X)"); OUTS (outf, dregs (reg)); OUTS (outf, "=W["); OUTS (outf, pregs (ptr)); OUTS (outf, "+"); OUTS (outf, imm16s2 (offset)); OUTS (outf, "](X)"); - return 2 * 2; } else if (W == 0 && sz == 2 && Z == 0) { - notethat ("dregs = B [ pregs + imm16 ] (Z)"); OUTS (outf, dregs (reg)); OUTS (outf, "=B["); OUTS (outf, pregs (ptr)); OUTS (outf, "+"); OUTS (outf, imm16 (offset)); OUTS (outf, "] (Z)"); - return 2 * 2; } else if (W == 0 && sz == 2 && Z == 1) { - notethat ("dregs = B [ pregs + imm16 ] (X)"); OUTS (outf, dregs (reg)); OUTS (outf, "=B["); OUTS (outf, pregs (ptr)); OUTS (outf, "+"); OUTS (outf, imm16 (offset)); OUTS (outf, "](X)"); - return 2 * 2; } else if (W == 1 && sz == 0 && Z == 0) { - notethat ("[ pregs + imm16s4 ] = dregs"); OUTS (outf, "["); OUTS (outf, pregs (ptr)); OUTS (outf, "+"); OUTS (outf, imm16s4 (offset)); OUTS (outf, "]="); OUTS (outf, dregs (reg)); - return 2 * 2; } else if (W == 1 && sz == 0 && Z == 1) { - notethat ("[ pregs + imm16s4 ] = pregs"); OUTS (outf, "["); OUTS (outf, pregs (ptr)); OUTS (outf, "+"); OUTS (outf, imm16s4 (offset)); OUTS (outf, "]="); OUTS (outf, pregs (reg)); - return 2 * 2; } else if (W == 1 && sz == 1 && Z == 0) { - notethat ("W [ pregs + imm16s2 ] = dregs"); OUTS (outf, "W["); OUTS (outf, pregs (ptr)); OUTS (outf, "+"); OUTS (outf, imm16s2 (offset)); OUTS (outf, "]="); OUTS (outf, dregs (reg)); - return 2 * 2; } else if (W == 1 && sz == 2 && Z == 0) { - notethat ("B [ pregs + imm16 ] = dregs"); OUTS (outf, "B["); OUTS (outf, pregs (ptr)); OUTS (outf, "+"); OUTS (outf, imm16 (offset)); OUTS (outf, "]="); OUTS (outf, dregs (reg)); - return 2 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 4; } static int decode_linkage_0 (TIword iw0, TIword iw1, disassemble_info *outf) { -/* linkage -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.R.| -|.framesize.....................................................| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* linkage + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.R.| + |.framesize.....................................................| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int R = ((iw0 >> (Linkage_R_bits - 16)) & Linkage_R_mask); int framesize = ((iw1 >> Linkage_framesize_bits) & Linkage_framesize_mask); if (R == 0) { - notethat ("LINK uimm16s4"); OUTS (outf, "LINK "); OUTS (outf, uimm16s4 (framesize)); - return 2 * 2; } else if (R == 1) - { - notethat ("UNLINK"); - OUTS (outf, "UNLINK"); - return 2 * 2; - } + OUTS (outf, "UNLINK"); else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 4; } static int decode_dsp32mac_0 (TIword iw0, TIword iw1, disassemble_info *outf) { -/* dsp32mac -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 1 | 1 | 0 | 0 |.M.| 0 | 0 |.mmod..........|.MM|.P.|.w1|.op1...| -|.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1......| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ - int op1 = ((iw0 >> (DSP32Mac_op1_bits - 16)) & DSP32Mac_op1_mask); - int w1 = ((iw0 >> (DSP32Mac_w1_bits - 16)) & DSP32Mac_w1_mask); - int P = ((iw0 >> (DSP32Mac_p_bits - 16)) & DSP32Mac_p_mask); - int MM = ((iw0 >> (DSP32Mac_MM_bits - 16)) & DSP32Mac_MM_mask); + /* dsp32mac + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 1 | 1 | 0 | 0 |.M.| 0 | 0 |.mmod..........|.MM|.P.|.w1|.op1...| + |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1..| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ + int op1 = ((iw0 >> (DSP32Mac_op1_bits - 16)) & DSP32Mac_op1_mask); + int w1 = ((iw0 >> (DSP32Mac_w1_bits - 16)) & DSP32Mac_w1_mask); + int P = ((iw0 >> (DSP32Mac_p_bits - 16)) & DSP32Mac_p_mask); + int MM = ((iw0 >> (DSP32Mac_MM_bits - 16)) & DSP32Mac_MM_mask); int mmod = ((iw0 >> (DSP32Mac_mmod_bits - 16)) & DSP32Mac_mmod_mask); - int w0 = ((iw1 >> DSP32Mac_w0_bits) & DSP32Mac_w0_mask); + int w0 = ((iw1 >> DSP32Mac_w0_bits) & DSP32Mac_w0_mask); int src0 = ((iw1 >> DSP32Mac_src0_bits) & DSP32Mac_src0_mask); int src1 = ((iw1 >> DSP32Mac_src1_bits) & DSP32Mac_src1_mask); - int dst = ((iw1 >> DSP32Mac_dst_bits) & DSP32Mac_dst_mask); - int h10 = ((iw1 >> DSP32Mac_h10_bits) & DSP32Mac_h10_mask); - int h00 = ((iw1 >> DSP32Mac_h00_bits) & DSP32Mac_h00_mask); - int op0 = ((iw1 >> DSP32Mac_op0_bits) & DSP32Mac_op0_mask); - int h11 = ((iw1 >> DSP32Mac_h11_bits) & DSP32Mac_h11_mask); - int h01 = ((iw1 >> DSP32Mac_h01_bits) & DSP32Mac_h01_mask); + int dst = ((iw1 >> DSP32Mac_dst_bits) & DSP32Mac_dst_mask); + int h10 = ((iw1 >> DSP32Mac_h10_bits) & DSP32Mac_h10_mask); + int h00 = ((iw1 >> DSP32Mac_h00_bits) & DSP32Mac_h00_mask); + int op0 = ((iw1 >> DSP32Mac_op0_bits) & DSP32Mac_op0_mask); + int h11 = ((iw1 >> DSP32Mac_h11_bits) & DSP32Mac_h11_mask); + int h01 = ((iw1 >> DSP32Mac_h01_bits) & DSP32Mac_h01_mask); if (w0 == 0 && w1 == 0 && op1 == 3 && op0 == 3) return 0; @@ -3279,30 +2636,30 @@ decode_dsp32mac_0 (TIword iw0, TIword iw1, disassemble_info *outf) static int decode_dsp32mult_0 (TIword iw0, TIword iw1, disassemble_info *outf) { -/* dsp32mult -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 1 | 1 | 0 | 0 |.M.| 0 | 1 |.mmod..........|.MM|.P.|.w1|.op1...| -|.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1......| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ - int w1 = ((iw0 >> (DSP32Mac_w1_bits - 16)) & DSP32Mac_w1_mask); - int P = ((iw0 >> (DSP32Mac_p_bits - 16)) & DSP32Mac_p_mask); - int MM = ((iw0 >> (DSP32Mac_MM_bits - 16)) & DSP32Mac_MM_mask); + /* dsp32mult + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 1 | 1 | 0 | 0 |.M.| 0 | 1 |.mmod..........|.MM|.P.|.w1|.op1...| + |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1..| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ + int w1 = ((iw0 >> (DSP32Mac_w1_bits - 16)) & DSP32Mac_w1_mask); + int P = ((iw0 >> (DSP32Mac_p_bits - 16)) & DSP32Mac_p_mask); + int MM = ((iw0 >> (DSP32Mac_MM_bits - 16)) & DSP32Mac_MM_mask); int mmod = ((iw0 >> (DSP32Mac_mmod_bits - 16)) & DSP32Mac_mmod_mask); - int w0 = ((iw1 >> DSP32Mac_w0_bits) & DSP32Mac_w0_mask); + int w0 = ((iw1 >> DSP32Mac_w0_bits) & DSP32Mac_w0_mask); int src0 = ((iw1 >> DSP32Mac_src0_bits) & DSP32Mac_src0_mask); int src1 = ((iw1 >> DSP32Mac_src1_bits) & DSP32Mac_src1_mask); - int dst = ((iw1 >> DSP32Mac_dst_bits) & DSP32Mac_dst_mask); - int h10 = ((iw1 >> DSP32Mac_h10_bits) & DSP32Mac_h10_mask); - int h00 = ((iw1 >> DSP32Mac_h00_bits) & DSP32Mac_h00_mask); - int h11 = ((iw1 >> DSP32Mac_h11_bits) & DSP32Mac_h11_mask); - int h01 = ((iw1 >> DSP32Mac_h01_bits) & DSP32Mac_h01_mask); + int dst = ((iw1 >> DSP32Mac_dst_bits) & DSP32Mac_dst_mask); + int h10 = ((iw1 >> DSP32Mac_h10_bits) & DSP32Mac_h10_mask); + int h00 = ((iw1 >> DSP32Mac_h00_bits) & DSP32Mac_h00_mask); + int h11 = ((iw1 >> DSP32Mac_h11_bits) & DSP32Mac_h11_mask); + int h01 = ((iw1 >> DSP32Mac_h01_bits) & DSP32Mac_h01_mask); if (w1 == 0 && w0 == 0) return 0; + if (((1 << mmod) & (P ? 0x313 : 0x1b57)) == 0) return 0; - + if (w1) { OUTS (outf, P ? dregs (dst | 1) : dregs_hi (dst)); @@ -3332,12 +2689,11 @@ decode_dsp32mult_0 (TIword iw0, TIword iw1, disassemble_info *outf) static int decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) { -/* dsp32alu -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 1 | 1 | 0 | 0 |.M.| 1 | 0 | - | - | - |.HL|.aopcde............| -|.aop...|.s.|.x.|.dst0......|.dst1......|.src0......|.src1......| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* dsp32alu + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 1 | 1 | 0 | 0 |.M.| 1 | 0 | - | - | - |.HL|.aopcde............| + |.aop...|.s.|.x.|.dst0......|.dst1......|.src0......|.src1......| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int s = ((iw1 >> DSP32Alu_s_bits) & DSP32Alu_s_mask); int x = ((iw1 >> DSP32Alu_x_bits) & DSP32Alu_x_mask); int aop = ((iw1 >> DSP32Alu_aop_bits) & DSP32Alu_aop_mask); @@ -3350,123 +2706,98 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) if (aop == 0 && aopcde == 9 && HL == 0 && s == 0) { - notethat ("A0.L = dregs_lo"); OUTS (outf, "A0.L="); OUTS (outf, dregs_lo (src0)); - return 2 * 2; } else if (aop == 2 && aopcde == 9 && HL == 1 && s == 0) { - notethat ("A1.H = dregs_hi"); OUTS (outf, "A1.H="); OUTS (outf, dregs_hi (src0)); - return 2 * 2; } else if (aop == 2 && aopcde == 9 && HL == 0 && s == 0) { - notethat ("A1.L = dregs_lo"); OUTS (outf, "A1.L="); OUTS (outf, dregs_lo (src0)); - return 2 * 2; } else if (aop == 0 && aopcde == 9 && HL == 1 && s == 0) { - notethat ("A0.H = dregs_hi"); OUTS (outf, "A0.H="); OUTS (outf, dregs_hi (src0)); - return 2 * 2; } else if (x == 1 && HL == 1 && aop == 3 && aopcde == 5) { - notethat ("dregs_hi = dregs - dregs (RND20)"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src0)); OUTS (outf, "-"); OUTS (outf, dregs (src1)); OUTS (outf, "(RND20)"); - return 2 * 2; } else if (x == 1 && HL == 1 && aop == 2 && aopcde == 5) { - notethat ("dregs_hi = dregs + dregs (RND20)"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src0)); OUTS (outf, "+"); OUTS (outf, dregs (src1)); OUTS (outf, "(RND20)"); - return 2 * 2; } else if (x == 0 && HL == 0 && aop == 1 && aopcde == 5) { - notethat ("dregs_lo = dregs - dregs (RND12)"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src0)); OUTS (outf, "-"); OUTS (outf, dregs (src1)); OUTS (outf, "(RND12)"); - return 2 * 2; } else if (x == 0 && HL == 0 && aop == 0 && aopcde == 5) { - notethat ("dregs_lo = dregs + dregs (RND12)"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src0)); OUTS (outf, "+"); OUTS (outf, dregs (src1)); OUTS (outf, "(RND12)"); - return 2 * 2; } else if (x == 1 && HL == 0 && aop == 3 && aopcde == 5) { - notethat ("dregs_lo = dregs - dregs (RND20)"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src0)); OUTS (outf, "-"); OUTS (outf, dregs (src1)); OUTS (outf, "(RND20)"); - return 2 * 2; } else if (x == 0 && HL == 1 && aop == 0 && aopcde == 5) { - notethat ("dregs_hi = dregs + dregs (RND12)"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src0)); OUTS (outf, "+"); OUTS (outf, dregs (src1)); OUTS (outf, "(RND12)"); - return 2 * 2; } else if (x == 1 && HL == 0 && aop == 2 && aopcde == 5) { - notethat ("dregs_lo = dregs + dregs (RND20)"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src0)); OUTS (outf, "+"); OUTS (outf, dregs (src1)); OUTS (outf, "(RND20)"); - return 2 * 2; } else if (x == 0 && HL == 1 && aop == 1 && aopcde == 5) { - notethat ("dregs_hi = dregs - dregs (RND12)"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src0)); OUTS (outf, "-"); OUTS (outf, dregs (src1)); OUTS (outf, "(RND12)"); - return 2 * 2; } else if (HL == 1 && aop == 0 && aopcde == 2) { - notethat ("dregs_hi = dregs_lo + dregs_lo amod1"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs_lo (src0)); @@ -3474,11 +2805,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs_lo (src1)); OUTS (outf, " "); amod1 (s, x, outf); - return 2 * 2; } else if (HL == 1 && aop == 1 && aopcde == 2) { - notethat ("dregs_hi = dregs_lo + dregs_hi amod1"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs_lo (src0)); @@ -3486,11 +2815,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs_hi (src1)); OUTS (outf, " "); amod1 (s, x, outf); - return 2 * 2; } else if (HL == 1 && aop == 2 && aopcde == 2) { - notethat ("dregs_hi = dregs_hi + dregs_lo amod1"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs_hi (src0)); @@ -3498,11 +2825,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs_lo (src1)); OUTS (outf, " "); amod1 (s, x, outf); - return 2 * 2; } else if (HL == 1 && aop == 3 && aopcde == 2) { - notethat ("dregs_hi = dregs_hi + dregs_hi amod1"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs_hi (src0)); @@ -3510,11 +2835,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs_hi (src1)); OUTS (outf, " "); amod1 (s, x, outf); - return 2 * 2; } else if (HL == 0 && aop == 0 && aopcde == 3) { - notethat ("dregs_lo = dregs_lo - dregs_lo amod1"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "="); OUTS (outf, dregs_lo (src0)); @@ -3522,11 +2845,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs_lo (src1)); OUTS (outf, " "); amod1 (s, x, outf); - return 2 * 2; } else if (HL == 0 && aop == 1 && aopcde == 3) { - notethat ("dregs_lo = dregs_lo - dregs_hi amod1"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "="); OUTS (outf, dregs_lo (src0)); @@ -3534,11 +2855,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs_hi (src1)); OUTS (outf, " "); amod1 (s, x, outf); - return 2 * 2; } else if (HL == 0 && aop == 3 && aopcde == 2) { - notethat ("dregs_lo = dregs_hi + dregs_hi amod1"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "="); OUTS (outf, dregs_hi (src0)); @@ -3546,11 +2865,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs_hi (src1)); OUTS (outf, " "); amod1 (s, x, outf); - return 2 * 2; } else if (HL == 1 && aop == 0 && aopcde == 3) { - notethat ("dregs_hi = dregs_lo - dregs_lo amod1"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs_lo (src0)); @@ -3558,11 +2875,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs_lo (src1)); OUTS (outf, " "); amod1 (s, x, outf); - return 2 * 2; } else if (HL == 1 && aop == 1 && aopcde == 3) { - notethat ("dregs_hi = dregs_lo - dregs_hi amod1"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs_lo (src0)); @@ -3570,11 +2885,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs_hi (src1)); OUTS (outf, " "); amod1 (s, x, outf); - return 2 * 2; } else if (HL == 1 && aop == 2 && aopcde == 3) { - notethat ("dregs_hi = dregs_hi - dregs_lo amod1"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs_hi (src0)); @@ -3582,11 +2895,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs_lo (src1)); OUTS (outf, " "); amod1 (s, x, outf); - return 2 * 2; } else if (HL == 1 && aop == 3 && aopcde == 3) { - notethat ("dregs_hi = dregs_hi - dregs_hi amod1"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs_hi (src0)); @@ -3594,11 +2905,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs_hi (src1)); OUTS (outf, " "); amod1 (s, x, outf); - return 2 * 2; } else if (HL == 0 && aop == 2 && aopcde == 2) { - notethat ("dregs_lo = dregs_hi + dregs_lo amod1"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "="); OUTS (outf, dregs_hi (src0)); @@ -3606,11 +2915,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs_lo (src1)); OUTS (outf, " "); amod1 (s, x, outf); - return 2 * 2; } else if (HL == 0 && aop == 1 && aopcde == 2) { - notethat ("dregs_lo = dregs_lo + dregs_hi amod1"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "="); OUTS (outf, dregs_lo (src0)); @@ -3618,11 +2925,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs_hi (src1)); OUTS (outf, " "); amod1 (s, x, outf); - return 2 * 2; } else if (HL == 0 && aop == 2 && aopcde == 3) { - notethat ("dregs_lo = dregs_hi - dregs_lo amod1"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "="); OUTS (outf, dregs_hi (src0)); @@ -3630,11 +2935,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs_lo (src1)); OUTS (outf, " "); amod1 (s, x, outf); - return 2 * 2; } else if (HL == 0 && aop == 3 && aopcde == 3) { - notethat ("dregs_lo = dregs_hi - dregs_hi amod1"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "="); OUTS (outf, dregs_hi (src0)); @@ -3642,11 +2945,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs_hi (src1)); OUTS (outf, " "); amod1 (s, x, outf); - return 2 * 2; } else if (HL == 0 && aop == 0 && aopcde == 2) { - notethat ("dregs_lo = dregs_lo + dregs_lo amod1"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "="); OUTS (outf, dregs_lo (src0)); @@ -3654,30 +2955,20 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs_lo (src1)); OUTS (outf, " "); amod1 (s, x, outf); - return 2 * 2; } else if (aop == 0 && aopcde == 9 && s == 1) { - notethat ("A0 = dregs"); OUTS (outf, "A0="); OUTS (outf, dregs (src0)); - return 2 * 2; } else if (aop == 3 && aopcde == 11 && s == 0) - { - notethat ("A0 -= A1"); - OUTS (outf, "A0-=A1"); - return 2 * 2; - } + OUTS (outf, "A0-=A1"); + else if (aop == 3 && aopcde == 11 && s == 1) - { - notethat ("A0 -= A1 (W32)"); - OUTS (outf, "A0-=A1(W32)"); - return 2 * 2; - } + OUTS (outf, "A0-=A1(W32)"); + else if (aop == 3 && aopcde == 22 && HL == 1) { - notethat ("dregs = BYTEOP2M ( dregs_pair , dregs_pair ) (TH , R)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=BYTEOP2M("); OUTS (outf, dregs (src0 + 1)); @@ -3692,11 +2983,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, ", R)"); else OUTS (outf, ")"); - return 2 * 2; } else if (aop == 3 && aopcde == 22 && HL == 0) { - notethat ("dregs = BYTEOP2M ( dregs_pair , dregs_pair ) (TL , R)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=BYTEOP2M("); OUTS (outf, dregs (src0 + 1)); @@ -3711,11 +3000,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, ", R)"); else OUTS (outf, ")"); - return 2 * 2; } else if (aop == 2 && aopcde == 22 && HL == 1) { - notethat ("dregs = BYTEOP2M ( dregs_pair , dregs_pair ) (RNDH , R)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=BYTEOP2M("); OUTS (outf, dregs (src0 + 1)); @@ -3730,11 +3017,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, ", R)"); else OUTS (outf, ")"); - return 2 * 2; } else if (aop == 2 && aopcde == 22 && HL == 0) { - notethat ("dregs = BYTEOP2M ( dregs_pair , dregs_pair ) (RNDL , R)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=BYTEOP2M("); OUTS (outf, dregs (src0 + 1)); @@ -3749,11 +3034,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, ", R)"); else OUTS (outf, ")"); - return 2 * 2; } else if (aop == 1 && aopcde == 22 && HL == 1) { - notethat ("dregs = BYTEOP2P ( dregs_pair , dregs_pair ) (TH , R)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=BYTEOP2P("); OUTS (outf, dregs (src0 + 1)); @@ -3768,11 +3051,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, ", R)"); else OUTS (outf, ")"); - return 2 * 2; } else if (aop == 1 && aopcde == 22 && HL == 0) { - notethat ("dregs = BYTEOP2P ( dregs_pair , dregs_pair ) (TL , R)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=BYTEOP2P("); OUTS (outf, dregs (src0 + 1)); @@ -3787,11 +3068,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, ", R)"); else OUTS (outf, ")"); - return 2 * 2; } else if (aop == 0 && aopcde == 22 && HL == 1) { - notethat ("dregs = BYTEOP2P ( dregs_pair , dregs_pair ) (RNDH , R)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=BYTEOP2P("); OUTS (outf, dregs (src0 + 1)); @@ -3806,11 +3085,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, ", R)"); else OUTS (outf, ")"); - return 2 * 2; } else if (aop == 0 && aopcde == 22 && HL == 0) { - notethat ("dregs = BYTEOP2P ( dregs_pair , dregs_pair ) (RNDL , aligndir)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=BYTEOP2P("); OUTS (outf, dregs (src0 + 1)); @@ -3825,79 +3102,46 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, ", R)"); else OUTS (outf, ")"); - return 2 * 2; } else if (aop == 0 && s == 0 && aopcde == 8) - { - notethat ("A0 = 0"); - OUTS (outf, "A0=0"); - return 2 * 2; - } + OUTS (outf, "A0=0"); + else if (aop == 0 && s == 1 && aopcde == 8) - { - notethat ("A0 = A0 (S)"); - OUTS (outf, "A0=A0(S)"); - return 2 * 2; - } + OUTS (outf, "A0=A0(S)"); + else if (aop == 1 && s == 0 && aopcde == 8) - { - notethat ("A1 = 0"); - OUTS (outf, "A1=0"); - return 2 * 2; - } + OUTS (outf, "A1=0"); + else if (aop == 1 && s == 1 && aopcde == 8) - { - notethat ("A1 = A1 (S)"); - OUTS (outf, "A1=A1(S)"); - return 2 * 2; - } + OUTS (outf, "A1=A1(S)"); + else if (aop == 2 && s == 0 && aopcde == 8) - { - notethat ("A1 = A0 = 0"); - OUTS (outf, "A1=A0=0"); - return 2 * 2; - } + OUTS (outf, "A1=A0=0"); + else if (aop == 2 && s == 1 && aopcde == 8) - { - notethat ("A1 = A1 (S) , A0 = A0 (S)"); - OUTS (outf, "A1=A1(S),A0=A0(S)"); - return 2 * 2; - } + OUTS (outf, "A1=A1(S),A0=A0(S)"); + else if (aop == 3 && s == 0 && aopcde == 8) - { - notethat ("A0 = A1"); - OUTS (outf, "A0=A1"); - return 2 * 2; - } + OUTS (outf, "A0=A1"); + else if (aop == 3 && s == 1 && aopcde == 8) - { - notethat ("A1 = A0"); - OUTS (outf, "A1=A0"); - return 2 * 2; - } + OUTS (outf, "A1=A0"); + else if (aop == 1 && aopcde == 9 && s == 0) { - notethat ("A0.x = dregs_lo"); OUTS (outf, "A0.x="); OUTS (outf, dregs_lo (src0)); - return 2 * 2; } else if (aop == 1 && HL == 0 && aopcde == 11) { - notethat ("dregs_lo = ( A0 += A1 )"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "=(A0+=A1)"); - return 2 * 2; } else if (aop == 3 && HL == 0 && aopcde == 16) - { - notethat ("A1 = ABS A1, A0 = ABS A0"); - OUTS (outf, "A1= ABS A0,A0= ABS A0"); - return 2 * 2; - } + OUTS (outf, "A1= ABS A0,A0= ABS A0"); + else if (aop == 0 && aopcde == 23 && HL == 1) { - notethat ("dregs = BYTEOP3P ( dregs_pair , dregs_pair ) (HI , R)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=BYTEOP3P("); OUTS (outf, dregs (src0 + 1)); @@ -3912,119 +3156,80 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, ", R)"); else OUTS (outf, ")"); - return 2 * 2; } else if (aop == 3 && aopcde == 9 && s == 0) { - notethat ("A1.x = dregs_lo"); OUTS (outf, "A1.x="); OUTS (outf, dregs_lo (src0)); - return 2 * 2; } else if (aop == 1 && HL == 1 && aopcde == 16) - { - notethat ("A1 = ABS A1"); - OUTS (outf, "A1= ABS A1"); - return 2 * 2; - } + OUTS (outf, "A1= ABS A1"); + else if (aop == 0 && HL == 1 && aopcde == 16) - { - notethat ("A1 = ABS A0"); - OUTS (outf, "A1= ABS A0"); - return 2 * 2; - } + OUTS (outf, "A1= ABS A0"); + else if (aop == 2 && aopcde == 9 && s == 1) { - notethat ("A1 = dregs"); OUTS (outf, "A1="); OUTS (outf, dregs (src0)); - return 2 * 2; } else if (HL == 0 && aop == 3 && aopcde == 12) { - notethat ("dregs_lo = dregs (RND)"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src0)); OUTS (outf, "(RND)"); - return 2 * 2; } else if (aop == 1 && HL == 0 && aopcde == 16) - { - notethat ("A0 = ABS A1"); - OUTS (outf, "A0= ABS A1"); - return 2 * 2; - } + OUTS (outf, "A0= ABS A1"); + else if (aop == 0 && HL == 0 && aopcde == 16) - { - notethat ("A0 = ABS A0"); - OUTS (outf, "A0= ABS A0"); - return 2 * 2; - } + OUTS (outf, "A0= ABS A0"); + else if (aop == 3 && HL == 0 && aopcde == 15) { - notethat ("dregs = - dregs (V)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=-"); OUTS (outf, dregs (src0)); OUTS (outf, "(V)"); - return 2 * 2; } else if (aop == 3 && s == 1 && HL == 0 && aopcde == 7) { - notethat ("dregs = - dregs (S)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=-"); OUTS (outf, dregs (src0)); OUTS (outf, "(S)"); - return 2 * 2; } else if (aop == 3 && s == 0 && HL == 0 && aopcde == 7) { - notethat ("dregs = - dregs (NS)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=-"); OUTS (outf, dregs (src0)); OUTS (outf, "(NS)"); - return 2 * 2; } else if (aop == 1 && HL == 1 && aopcde == 11) { - notethat ("dregs_hi = ( A0 += A1 )"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "=(A0+=A1)"); - return 2 * 2; } else if (aop == 2 && aopcde == 11 && s == 0) - { - notethat ("A0 += A1"); - OUTS (outf, "A0+=A1"); - return 2 * 2; - } + OUTS (outf, "A0+=A1"); + else if (aop == 2 && aopcde == 11 && s == 1) - { - notethat ("A0 += A1 (W32)"); - OUTS (outf, "A0+=A1(W32)"); - return 2 * 2; - } + OUTS (outf, "A0+=A1(W32)"); + else if (aop == 3 && HL == 0 && aopcde == 14) - { - notethat ("A1 = - A1 , A0 = - A0"); - OUTS (outf, "A1=-A1,A0=-A0"); - return 2 * 2; - } + OUTS (outf, "A1=-A1,A0=-A0"); + else if (HL == 1 && aop == 3 && aopcde == 12) { - notethat ("dregs_hi = dregs (RND)"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src0)); OUTS (outf, "(RND)"); - return 2 * 2; } else if (aop == 0 && aopcde == 23 && HL == 0) { - notethat ("dregs = BYTEOP3P ( dregs_pair , dregs_pair ) (LO , R)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=BYTEOP3P("); OUTS (outf, dregs (src0 + 1)); @@ -4039,35 +3244,21 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, ", R)"); else OUTS (outf, ")"); - return 2 * 2; } else if (aop == 0 && HL == 0 && aopcde == 14) - { - notethat ("A0 = - A0"); - OUTS (outf, "A0=-A0"); - return 2 * 2; - } + OUTS (outf, "A0=-A0"); + else if (aop == 1 && HL == 0 && aopcde == 14) - { - notethat ("A0 = - A1"); - OUTS (outf, "A0=-A1"); - return 2 * 2; - } + OUTS (outf, "A0=-A1"); + else if (aop == 0 && HL == 1 && aopcde == 14) - { - notethat ("A1 = - A0"); - OUTS (outf, "A1=-A0"); - return 2 * 2; - } + OUTS (outf, "A1=-A0"); + else if (aop == 1 && HL == 1 && aopcde == 14) - { - notethat ("A1 = - A1"); - OUTS (outf, "A1=-A1"); - return 2 * 2; - } + OUTS (outf, "A1=-A1"); + else if (aop == 0 && aopcde == 12) { - notethat ("dregs_hi=dregs_lo=SIGN(dregs_hi)*dregs_hi + SIGN(dregs_lo)*dregs_lo)"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs_lo (dst0)); @@ -4080,11 +3271,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, ")*"); OUTS (outf, dregs_lo (src1)); OUTS (outf, ")"); - return 2 * 2; } else if (aop == 2 && aopcde == 0) { - notethat ("dregs = dregs -|+ dregs amod0"); OUTS (outf, dregs (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src0)); @@ -4092,20 +3281,16 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs (src1)); OUTS (outf, " "); amod0 (s, x, outf); - return 2 * 2; } else if (aop == 1 && aopcde == 12) { - notethat ("dregs = A1.L + A1.H , dregs = A0.L + A0.H"); OUTS (outf, dregs (dst1)); OUTS (outf, "=A1.L+A1.H,"); OUTS (outf, dregs (dst0)); OUTS (outf, "=A0.L+A0.H"); - return 2 * 2; } else if (aop == 2 && aopcde == 4) { - notethat ("dregs = dregs + dregs , dregs = dregs - dregs amod1"); OUTS (outf, dregs (dst1)); OUTS (outf, "="); OUTS (outf, dregs (src0)); @@ -4119,11 +3304,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs (src1)); OUTS (outf, " "); amod1 (s, x, outf); - return 2 * 2; } else if (HL == 0 && aopcde == 1) { - notethat ("dregs = dregs +|+ dregs , dregs = dregs -|- dregs (amod0, amod2)"); OUTS (outf, dregs (dst1)); OUTS (outf, "="); OUTS (outf, dregs (src0)); @@ -4136,32 +3319,24 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, "-|-"); OUTS (outf, dregs (src1)); amod0amod2 (s, x, aop, outf); - return 2 * 2; } else if (aop == 0 && aopcde == 11) { - notethat ("dregs = ( A0 += A1 )"); OUTS (outf, dregs (dst0)); OUTS (outf, "=(A0+=A1)"); - return 2 * 2; } else if (aop == 0 && aopcde == 10) { - notethat ("dregs_lo = A0.x"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "=A0.x"); - return 2 * 2; } else if (aop == 1 && aopcde == 10) { - notethat ("dregs_lo = A1.x"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "=A1.x"); - return 2 * 2; } else if (aop == 1 && aopcde == 0) { - notethat ("dregs = dregs +|- dregs amod0"); OUTS (outf, dregs (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src0)); @@ -4169,11 +3344,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs (src1)); OUTS (outf, " "); amod0 (s, x, outf); - return 2 * 2; } else if (aop == 3 && aopcde == 0) { - notethat ("dregs = dregs -|- dregs amod0"); OUTS (outf, dregs (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src0)); @@ -4181,11 +3354,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs (src1)); OUTS (outf, " "); amod0 (s, x, outf); - return 2 * 2; } else if (aop == 1 && aopcde == 4) { - notethat ("dregs = dregs - dregs amod1"); OUTS (outf, dregs (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src0)); @@ -4193,31 +3364,25 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs (src1)); OUTS (outf, " "); amod1 (s, x, outf); - return 2 * 2; } else if (aop == 0 && aopcde == 17) { - notethat ("dregs = A1 + A0, dregs = A1 - A0 amod1"); OUTS (outf, dregs (dst1)); OUTS (outf, "=A1+A0,"); OUTS (outf, dregs (dst0)); OUTS (outf, "=A1-A0 "); amod1 (s, x, outf); - return 2 * 2; } else if (aop == 1 && aopcde == 17) { - notethat ("dregs = A0 + A1, dregs = A0 - A1 amod1"); OUTS (outf, dregs (dst1)); OUTS (outf, "=A0+A1,"); OUTS (outf, dregs (dst0)); OUTS (outf, "=A0-A1 "); amod1 (s, x, outf); - return 2 * 2; } else if (aop == 0 && aopcde == 18) { - notethat ("SAA ( dregs_pair , dregs_pair ) aligndir"); OUTS (outf, "SAA("); OUTS (outf, dregs (src0 + 1)); OUTS (outf, ":"); @@ -4228,17 +3393,12 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, imm5 (src1)); OUTS (outf, ") "); aligndir (s, outf); - return 2 * 2; } else if (aop == 3 && aopcde == 18) - { - notethat ("DISALGNEXCPT"); - OUTS (outf, "DISALGNEXCPT"); - return 2 * 2; - } + OUTS (outf, "DISALGNEXCPT"); + else if (aop == 0 && aopcde == 20) { - notethat ("dregs = BYTEOP1P ( dregs_pair , dregs_pair ) aligndir"); OUTS (outf, dregs (dst0)); OUTS (outf, "=BYTEOP1P("); OUTS (outf, dregs (src0 + 1)); @@ -4250,11 +3410,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, imm5 (src1)); OUTS (outf, ")"); aligndir (s, outf); - return 2 * 2; } else if (aop == 1 && aopcde == 20) { - notethat ("dregs = BYTEOP1P ( dregs_pair , dregs_pair ) (T, R)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=BYTEOP1P("); OUTS (outf, dregs (src0 + 1)); @@ -4269,11 +3427,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, ", R)"); else OUTS (outf, ")"); - return 2 * 2; } else if (aop == 0 && aopcde == 21) { - notethat ("( dregs , dregs ) = BYTEOP16P ( dregs_pair , dregs_pair ) aligndir"); OUTS (outf, "("); OUTS (outf, dregs (dst1)); OUTS (outf, ","); @@ -4288,11 +3444,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, imm5 (src1)); OUTS (outf, ") "); aligndir (s, outf); - return 2 * 2; } else if (aop == 1 && aopcde == 21) { - notethat ("( dregs , dregs ) = BYTEOP16M ( dregs_pair , dregs_pair ) aligndir"); OUTS (outf, "("); OUTS (outf, dregs (dst1)); OUTS (outf, ","); @@ -4307,72 +3461,58 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, imm5 (src1)); OUTS (outf, ") "); aligndir (s, outf); - return 2 * 2; } else if (aop == 2 && aopcde == 7) { - notethat ("dregs = ABS dregs"); OUTS (outf, dregs (dst0)); OUTS (outf, "= ABS "); OUTS (outf, dregs (src0)); - return 2 * 2; } else if (aop == 1 && aopcde == 7) { - notethat ("dregs = MIN ( dregs , dregs )"); OUTS (outf, dregs (dst0)); OUTS (outf, "=MIN("); OUTS (outf, dregs (src0)); OUTS (outf, ","); OUTS (outf, dregs (src1)); OUTS (outf, ")"); - return 2 * 2; } else if (aop == 0 && aopcde == 7) { - notethat ("dregs = MAX ( dregs , dregs )"); OUTS (outf, dregs (dst0)); OUTS (outf, "=MAX("); OUTS (outf, dregs (src0)); OUTS (outf, ","); OUTS (outf, dregs (src1)); OUTS (outf, ")"); - return 2 * 2; } else if (aop == 2 && aopcde == 6) { - notethat ("dregs = ABS dregs (V)"); OUTS (outf, dregs (dst0)); OUTS (outf, "= ABS "); OUTS (outf, dregs (src0)); OUTS (outf, "(V)"); - return 2 * 2; } else if (aop == 1 && aopcde == 6) { - notethat ("dregs = MIN ( dregs , dregs ) (V)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=MIN("); OUTS (outf, dregs (src0)); OUTS (outf, ","); OUTS (outf, dregs (src1)); OUTS (outf, ")(V)"); - return 2 * 2; } else if (aop == 0 && aopcde == 6) { - notethat ("dregs = MAX ( dregs , dregs ) (V)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=MAX("); OUTS (outf, dregs (src0)); OUTS (outf, ","); OUTS (outf, dregs (src1)); OUTS (outf, ")(V)"); - return 2 * 2; } else if (HL == 1 && aopcde == 1) { - notethat ("dregs = dregs +|- dregs, dregs = dregs -|+ dregs (amod0, amod2)"); OUTS (outf, dregs (dst1)); OUTS (outf, "="); OUTS (outf, dregs (src0)); @@ -4385,11 +3525,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, "-|+"); OUTS (outf, dregs (src1)); amod0amod2 (s, x, aop, outf); - return 2 * 2; } else if (aop == 0 && aopcde == 4) { - notethat ("dregs = dregs + dregs amod1"); OUTS (outf, dregs (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src0)); @@ -4397,11 +3535,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs (src1)); OUTS (outf, " "); amod1 (s, x, outf); - return 2 * 2; } else if (aop == 0 && aopcde == 0) { - notethat ("dregs = dregs +|+ dregs amod0"); OUTS (outf, dregs (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src0)); @@ -4409,22 +3545,18 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs (src1)); OUTS (outf, " "); amod0 (s, x, outf); - return 2 * 2; } else if (aop == 0 && aopcde == 24) { - notethat ("dregs = BYTEPACK ( dregs , dregs )"); OUTS (outf, dregs (dst0)); OUTS (outf, "=BYTEPACK("); OUTS (outf, dregs (src0)); OUTS (outf, ","); OUTS (outf, dregs (src1)); OUTS (outf, ")"); - return 2 * 2; } else if (aop == 1 && aopcde == 24) { - notethat ("( dregs , dregs ) = BYTEUNPACK dregs_pair aligndir"); OUTS (outf, "("); OUTS (outf, dregs (dst1)); OUTS (outf, ","); @@ -4435,11 +3567,9 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, imm5 (src0)); OUTS (outf, " "); aligndir (s, outf); - return 2 * 2; } else if (aopcde == 13) { - notethat ("( dregs , dregs ) = SEARCH dregs (searchmod)"); OUTS (outf, "("); OUTS (outf, dregs (dst1)); OUTS (outf, ","); @@ -4449,23 +3579,21 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, "("); searchmod (aop, outf); OUTS (outf, ")"); - return 2 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 4; } static int decode_dsp32shift_0 (TIword iw0, TIword iw1, disassemble_info *outf) { -/* dsp32shift -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 0 | - | - |.sopcde............| -|.sop...|.HLs...|.dst0......| - | - | - |.src0......|.src1......| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* dsp32shift + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 0 | - | - |.sopcde............| + |.sop...|.HLs...|.dst0......| - | - | - |.src0......|.src1......| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int HLs = ((iw1 >> DSP32Shift_HLs_bits) & DSP32Shift_HLs_mask); int sop = ((iw1 >> DSP32Shift_sop_bits) & DSP32Shift_sop_mask); int src0 = ((iw1 >> DSP32Shift_src0_bits) & DSP32Shift_src0_mask); @@ -4474,218 +3602,176 @@ decode_dsp32shift_0 (TIword iw0, TIword iw1, disassemble_info *outf) int sopcde = ((iw0 >> (DSP32Shift_sopcde_bits - 16)) & DSP32Shift_sopcde_mask); const char *acc01 = (HLs & 1) == 0 ? "A0" : "A1"; - if (HLs == 0 && sop == 0 && sopcde == 0) { - notethat ("dregs_lo = ASHIFT dregs_lo BY dregs_lo"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "= ASHIFT "); OUTS (outf, dregs_lo (src1)); OUTS (outf, " BY "); OUTS (outf, dregs_lo (src0)); - return 2 * 2; } else if (HLs == 1 && sop == 0 && sopcde == 0) { - notethat ("dregs_lo = ASHIFT dregs_hi BY dregs_lo"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "= ASHIFT "); OUTS (outf, dregs_hi (src1)); OUTS (outf, " BY "); OUTS (outf, dregs_lo (src0)); - return 2 * 2; } else if (HLs == 2 && sop == 0 && sopcde == 0) { - notethat ("dregs_hi = ASHIFT dregs_lo BY dregs_lo"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "= ASHIFT "); OUTS (outf, dregs_lo (src1)); OUTS (outf, " BY "); OUTS (outf, dregs_lo (src0)); - return 2 * 2; } else if (HLs == 3 && sop == 0 && sopcde == 0) { - notethat ("dregs_hi = ASHIFT dregs_hi BY dregs_lo"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "= ASHIFT "); OUTS (outf, dregs_hi (src1)); OUTS (outf, " BY "); OUTS (outf, dregs_lo (src0)); - return 2 * 2; } else if (HLs == 0 && sop == 1 && sopcde == 0) { - notethat ("dregs_lo = ASHIFT dregs_lo BY dregs_lo (S)"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "= ASHIFT "); OUTS (outf, dregs_lo (src1)); OUTS (outf, " BY "); OUTS (outf, dregs_lo (src0)); OUTS (outf, "(S)"); - return 2 * 2; } else if (HLs == 1 && sop == 1 && sopcde == 0) { - notethat ("dregs_lo = ASHIFT dregs_hi BY dregs_lo (S)"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "= ASHIFT "); OUTS (outf, dregs_hi (src1)); OUTS (outf, " BY "); OUTS (outf, dregs_lo (src0)); OUTS (outf, "(S)"); - return 2 * 2; } else if (HLs == 2 && sop == 1 && sopcde == 0) { - notethat ("dregs_hi = ASHIFT dregs_lo BY dregs_lo (S)"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "= ASHIFT "); OUTS (outf, dregs_lo (src1)); OUTS (outf, " BY "); OUTS (outf, dregs_lo (src0)); OUTS (outf, "(S)"); - return 2 * 2; } else if (HLs == 3 && sop == 1 && sopcde == 0) { - notethat ("dregs_hi = ASHIFT dregs_hi BY dregs_lo (S)"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "= ASHIFT "); OUTS (outf, dregs_hi (src1)); OUTS (outf, " BY "); OUTS (outf, dregs_lo (src0)); OUTS (outf, "(S)"); - return 2 * 2; } else if (sop == 2 && sopcde == 0) { - notethat ("dregs_hilo = LSHIFT dregs_hilo BY dregs_lo"); OUTS (outf, (HLs & 2) == 0 ? dregs_lo (dst0) : dregs_hi (dst0)); OUTS (outf, "= LSHIFT "); OUTS (outf, (HLs & 1) == 0 ? dregs_lo (src1) : dregs_hi (src1)); OUTS (outf, " BY "); OUTS (outf, dregs_lo (src0)); - return 2 * 2; } else if (sop == 0 && sopcde == 3) { - notethat ("An = ASHIFT An BY dregs_lo"); OUTS (outf, acc01); OUTS (outf, "= ASHIFT "); OUTS (outf, acc01); OUTS (outf, " BY "); OUTS (outf, dregs_lo (src0)); - return 2 * 2; } else if (sop == 1 && sopcde == 3) { - notethat ("An = LSHIFT An BY dregs_lo"); OUTS (outf, acc01); OUTS (outf, "= LSHIFT "); OUTS (outf, acc01); OUTS (outf, " BY "); OUTS (outf, dregs_lo (src0)); - return 2 * 2; } else if (sop == 2 && sopcde == 3) { - notethat ("An = ROT An BY dregs_lo"); OUTS (outf, acc01); OUTS (outf, "= ROT "); OUTS (outf, acc01); OUTS (outf, " BY "); OUTS (outf, dregs_lo (src0)); - return 2 * 2; } else if (sop == 3 && sopcde == 3) { - notethat ("dregs = ROT dregs BY dregs_lo"); OUTS (outf, dregs (dst0)); OUTS (outf, "= ROT "); OUTS (outf, dregs (src1)); OUTS (outf, " BY "); OUTS (outf, dregs_lo (src0)); - return 2 * 2; } else if (sop == 1 && sopcde == 1) { - notethat ("dregs = ASHIFT dregs BY dregs_lo (V, S)"); OUTS (outf, dregs (dst0)); OUTS (outf, "= ASHIFT "); OUTS (outf, dregs (src1)); OUTS (outf, " BY "); OUTS (outf, dregs_lo (src0)); OUTS (outf, "(V,S)"); - return 2 * 2; } else if (sop == 0 && sopcde == 1) { - notethat ("dregs = ASHIFT dregs BY dregs_lo (V)"); OUTS (outf, dregs (dst0)); OUTS (outf, "= ASHIFT "); OUTS (outf, dregs (src1)); OUTS (outf, " BY "); OUTS (outf, dregs_lo (src0)); OUTS (outf, "(V)"); - return 2 * 2; } else if (sop == 0 && sopcde == 2) { - notethat ("dregs = ASHIFT dregs BY dregs_lo"); OUTS (outf, dregs (dst0)); OUTS (outf, "= ASHIFT "); OUTS (outf, dregs (src1)); OUTS (outf, " BY "); OUTS (outf, dregs_lo (src0)); - return 2 * 2; } else if (sop == 1 && sopcde == 2) { - notethat ("dregs = ASHIFT dregs BY dregs_lo (S)"); OUTS (outf, dregs (dst0)); OUTS (outf, "= ASHIFT "); OUTS (outf, dregs (src1)); OUTS (outf, " BY "); OUTS (outf, dregs_lo (src0)); OUTS (outf, "(S)"); - return 2 * 2; } else if (sop == 2 && sopcde == 2) { - notethat ("dregs = SHIFT dregs BY dregs_lo"); OUTS (outf, dregs (dst0)); OUTS (outf, "=SHIFT "); OUTS (outf, dregs (src1)); OUTS (outf, " BY "); OUTS (outf, dregs_lo (src0)); - return 2 * 2; } else if (sop == 3 && sopcde == 2) { - notethat ("dregs = ROT dregs BY dregs_lo"); OUTS (outf, dregs (dst0)); OUTS (outf, "= ROT "); OUTS (outf, dregs (src1)); OUTS (outf, " BY "); OUTS (outf, dregs_lo (src0)); - return 2 * 2; } else if (sop == 2 && sopcde == 1) { - notethat ("dregs = SHIFT dregs BY dregs_lo (V)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=SHIFT "); OUTS (outf, dregs (src1)); OUTS (outf, " BY "); OUTS (outf, dregs_lo (src0)); OUTS (outf, "(V)"); - return 2 * 2; } else if (sop == 0 && sopcde == 4) { - notethat ("dregs = PACK ( dregs_lo , dregs_lo )"); OUTS (outf, dregs (dst0)); OUTS (outf, "=PACK"); OUTS (outf, "("); @@ -4693,796 +3779,631 @@ decode_dsp32shift_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, ","); OUTS (outf, dregs_lo (src0)); OUTS (outf, ")"); - return 2 * 2; } else if (sop == 1 && sopcde == 4) { - notethat ("dregs = PACK ( dregs_lo , dregs_hi )"); OUTS (outf, dregs (dst0)); OUTS (outf, "=PACK("); OUTS (outf, dregs_lo (src1)); OUTS (outf, ","); OUTS (outf, dregs_hi (src0)); OUTS (outf, ")"); - return 2 * 2; } else if (sop == 2 && sopcde == 4) { - notethat ("dregs = PACK ( dregs_hi , dregs_lo )"); OUTS (outf, dregs (dst0)); OUTS (outf, "=PACK("); OUTS (outf, dregs_hi (src1)); OUTS (outf, ","); OUTS (outf, dregs_lo (src0)); OUTS (outf, ")"); - return 2 * 2; } else if (sop == 3 && sopcde == 4) { - notethat ("dregs = PACK ( dregs_hi , dregs_hi )"); OUTS (outf, dregs (dst0)); OUTS (outf, "=PACK("); OUTS (outf, dregs_hi (src1)); OUTS (outf, ","); OUTS (outf, dregs_hi (src0)); OUTS (outf, ")"); - return 2 * 2; } else if (sop == 0 && sopcde == 5) { - notethat ("dregs_lo = SIGNBITS dregs"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "=SIGNBITS "); OUTS (outf, dregs (src1)); - return 2 * 2; } else if (sop == 1 && sopcde == 5) { - notethat ("dregs_lo = SIGNBITS dregs_lo"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "=SIGNBITS "); OUTS (outf, dregs_lo (src1)); - return 2 * 2; } else if (sop == 2 && sopcde == 5) { - notethat ("dregs_lo = SIGNBITS dregs_hi"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "=SIGNBITS "); OUTS (outf, dregs_hi (src1)); - return 2 * 2; } else if (sop == 0 && sopcde == 6) { - notethat ("dregs_lo = SIGNBITS A0"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "=SIGNBITS A0"); - return 2 * 2; } else if (sop == 1 && sopcde == 6) { - notethat ("dregs_lo = SIGNBITS A1"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "=SIGNBITS A1"); - return 2 * 2; } else if (sop == 3 && sopcde == 6) { - notethat ("dregs_lo = ONES dregs"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "=ONES "); OUTS (outf, dregs (src1)); - return 2 * 2; } else if (sop == 0 && sopcde == 7) { - notethat ("dregs_lo = EXPADJ (dregs , dregs_lo)"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "=EXPADJ ("); OUTS (outf, dregs (src1)); OUTS (outf, ","); OUTS (outf, dregs_lo (src0)); OUTS (outf, ")"); - return 2 * 2; } else if (sop == 1 && sopcde == 7) { - notethat ("dregs_lo = EXPADJ (dregs , dregs_lo) (V)"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "=EXPADJ ("); OUTS (outf, dregs (src1)); OUTS (outf, ","); OUTS (outf, dregs_lo (src0)); OUTS (outf, ") (V)"); - return 2 * 2; } else if (sop == 2 && sopcde == 7) { - notethat ("dregs_lo = EXPADJ (dregs_lo , dregs_lo)"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "=EXPADJ ("); OUTS (outf, dregs_lo (src1)); OUTS (outf, ","); OUTS (outf, dregs_lo (src0)); OUTS (outf, ")"); - return 2 * 2; } else if (sop == 3 && sopcde == 7) { - notethat ("dregs_lo = EXPADJ (dregs_hi , dregs_lo)"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "=EXPADJ ("); OUTS (outf, dregs_hi (src1)); OUTS (outf, ","); OUTS (outf, dregs_lo (src0)); OUTS (outf, ")"); - return 2 * 2; } else if (sop == 0 && sopcde == 8) { - notethat ("BITMUX (dregs , dregs , A0) (ASR)"); OUTS (outf, "BITMUX ("); OUTS (outf, dregs (src0)); OUTS (outf, ","); OUTS (outf, dregs (src1)); OUTS (outf, ",A0 )(ASR)"); - return 2 * 2; } else if (sop == 1 && sopcde == 8) { - notethat ("BITMUX (dregs , dregs , A0) (ASL)"); OUTS (outf, "BITMUX ("); OUTS (outf, dregs (src0)); OUTS (outf, ","); OUTS (outf, dregs (src1)); OUTS (outf, ",A0 )(ASL)"); - return 2 * 2; } else if (sop == 0 && sopcde == 9) { - notethat ("dregs_lo = VIT_MAX (dregs) (ASL)"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "=VIT_MAX ("); OUTS (outf, dregs (src1)); OUTS (outf, ") (ASL)"); - return 2 * 2; } else if (sop == 1 && sopcde == 9) { - notethat ("dregs_lo = VIT_MAX (dregs) (ASR)"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "=VIT_MAX ("); OUTS (outf, dregs (src1)); OUTS (outf, ") (ASR)"); - return 2 * 2; } else if (sop == 2 && sopcde == 9) { - notethat ("dregs = VIT_MAX ( dregs , dregs ) (ASL)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=VIT_MAX("); OUTS (outf, dregs (src1)); OUTS (outf, ","); OUTS (outf, dregs (src0)); OUTS (outf, ")(ASL)"); - return 2 * 2; } else if (sop == 3 && sopcde == 9) { - notethat ("dregs = VIT_MAX ( dregs , dregs ) (ASR)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=VIT_MAX("); OUTS (outf, dregs (src1)); OUTS (outf, ","); OUTS (outf, dregs (src0)); OUTS (outf, ")(ASR)"); - return 2 * 2; } else if (sop == 0 && sopcde == 10) { - notethat ("dregs = EXTRACT ( dregs , dregs_lo ) (Z)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=EXTRACT("); OUTS (outf, dregs (src1)); OUTS (outf, ","); OUTS (outf, dregs_lo (src0)); OUTS (outf, ") (Z)"); - return 2 * 2; } else if (sop == 1 && sopcde == 10) { - notethat ("dregs = EXTRACT ( dregs , dregs_lo ) (X)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=EXTRACT("); OUTS (outf, dregs (src1)); OUTS (outf, ","); OUTS (outf, dregs_lo (src0)); OUTS (outf, ")(X)"); - return 2 * 2; } else if (sop == 2 && sopcde == 10) { - notethat ("dregs = DEPOSIT ( dregs , dregs )"); OUTS (outf, dregs (dst0)); OUTS (outf, "=DEPOSIT("); OUTS (outf, dregs (src1)); OUTS (outf, ","); OUTS (outf, dregs (src0)); OUTS (outf, ")"); - return 2 * 2; } else if (sop == 3 && sopcde == 10) { - notethat ("dregs = DEPOSIT ( dregs , dregs ) (X)"); OUTS (outf, dregs (dst0)); OUTS (outf, "=DEPOSIT("); OUTS (outf, dregs (src1)); OUTS (outf, ","); OUTS (outf, dregs (src0)); OUTS (outf, ")(X)"); - return 2 * 2; } else if (sop == 0 && sopcde == 11) { - notethat ("dregs_lo = CC = BXORSHIFT ( A0 , dregs )"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "=CC=BXORSHIFT(A0,"); OUTS (outf, dregs (src0)); OUTS (outf, ")"); - return 2 * 2; } else if (sop == 1 && sopcde == 11) { - notethat ("dregs_lo = CC = BXOR (A0 , dregs)"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "=CC=BXOR(A0,"); OUTS (outf, dregs (src0)); OUTS (outf, ")"); - return 2 * 2; } else if (sop == 0 && sopcde == 12) - { - notethat ("A0 = BXORSHIFT ( A0 , A1 , CC )"); - OUTS (outf, "A0=BXORSHIFT(A0,A1 ,CC)"); - return 2 * 2; - } + OUTS (outf, "A0=BXORSHIFT(A0,A1 ,CC)"); + else if (sop == 1 && sopcde == 12) { - notethat ("dregs_lo = CC = BXOR (A0 , A1 , CC)"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "=CC=BXOR( A0,A1 ,CC )"); - return 2 * 2; } else if (sop == 0 && sopcde == 13) { - notethat ("dregs = ALIGN8 ( dregs , dregs )"); OUTS (outf, dregs (dst0)); OUTS (outf, "=ALIGN8("); OUTS (outf, dregs (src1)); OUTS (outf, ","); OUTS (outf, dregs (src0)); OUTS (outf, ")"); - return 2 * 2; } else if (sop == 1 && sopcde == 13) { - notethat ("dregs = ALIGN16 ( dregs , dregs )"); OUTS (outf, dregs (dst0)); OUTS (outf, "=ALIGN16("); OUTS (outf, dregs (src1)); OUTS (outf, ","); OUTS (outf, dregs (src0)); OUTS (outf, ")"); - return 2 * 2; } else if (sop == 2 && sopcde == 13) { - notethat ("dregs = ALIGN24 ( dregs , dregs )"); OUTS (outf, dregs (dst0)); OUTS (outf, "=ALIGN24("); OUTS (outf, dregs (src1)); OUTS (outf, ","); OUTS (outf, dregs (src0)); OUTS (outf, ")"); - return 2 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 4; } static int decode_dsp32shiftimm_0 (TIword iw0, TIword iw1, disassemble_info *outf) { -/* dsp32shiftimm -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 1 | - | - |.sopcde............| -|.sop...|.HLs...|.dst0......|.immag.................|.src1......| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ - int src1 = ((iw1 >> DSP32ShiftImm_src1_bits) & DSP32ShiftImm_src1_mask); - int sop = ((iw1 >> DSP32ShiftImm_sop_bits) & DSP32ShiftImm_sop_mask); - int bit8 = ((iw1 >> 8) & 0x1); - int immag = ((iw1 >> DSP32ShiftImm_immag_bits) & DSP32ShiftImm_immag_mask); + /* dsp32shiftimm + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 1 | - | - |.sopcde............| + |.sop...|.HLs...|.dst0......|.immag.................|.src1......| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ + int src1 = ((iw1 >> DSP32ShiftImm_src1_bits) & DSP32ShiftImm_src1_mask); + int sop = ((iw1 >> DSP32ShiftImm_sop_bits) & DSP32ShiftImm_sop_mask); + int bit8 = ((iw1 >> 8) & 0x1); + int immag = ((iw1 >> DSP32ShiftImm_immag_bits) & DSP32ShiftImm_immag_mask); int newimmag = (-(iw1 >> DSP32ShiftImm_immag_bits) & DSP32ShiftImm_immag_mask); - int dst0 = ((iw1 >> DSP32ShiftImm_dst0_bits) & DSP32ShiftImm_dst0_mask); - int sopcde = ((iw0 >> (DSP32ShiftImm_sopcde_bits - 16)) & DSP32ShiftImm_sopcde_mask); - int HLs = ((iw1 >> DSP32ShiftImm_HLs_bits) & DSP32ShiftImm_HLs_mask); + int dst0 = ((iw1 >> DSP32ShiftImm_dst0_bits) & DSP32ShiftImm_dst0_mask); + int sopcde = ((iw0 >> (DSP32ShiftImm_sopcde_bits - 16)) & DSP32ShiftImm_sopcde_mask); + int HLs = ((iw1 >> DSP32ShiftImm_HLs_bits) & DSP32ShiftImm_HLs_mask); if (HLs == 0 && sop == 0 && sopcde == 0) { - notethat ("dregs_lo = dregs_lo >>> uimm4"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "="); OUTS (outf, dregs_lo (src1)); OUTS (outf, ">>>"); OUTS (outf, uimm4 (newimmag)); - return 2 * 2; } else if (HLs == 1 && sop == 0 && sopcde == 0) { - notethat ("dregs_lo = dregs_hi >>> uimm4"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "="); OUTS (outf, dregs_hi (src1)); OUTS (outf, ">>>"); OUTS (outf, uimm4 (newimmag)); - return 2 * 2; } else if (HLs == 2 && sop == 0 && sopcde == 0) { - notethat ("dregs_hi = dregs_lo >>> uimm4"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs_lo (src1)); OUTS (outf, ">>>"); OUTS (outf, uimm4 (newimmag)); - return 2 * 2; } else if (HLs == 3 && sop == 0 && sopcde == 0) { - notethat ("dregs_hi = dregs_hi >>> uimm4"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs_hi (src1)); OUTS (outf, ">>>"); OUTS (outf, uimm4 (newimmag)); - return 2 * 2; } else if (HLs == 0 && sop == 1 && sopcde == 0) { - notethat ("dregs_lo = dregs_lo << uimm4 (S)"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "="); OUTS (outf, dregs_lo (src1)); OUTS (outf, "<<"); OUTS (outf, uimm4 (immag)); OUTS (outf, "(S)"); - return 2 * 2; } else if (HLs == 1 && sop == 1 && sopcde == 0) { - notethat ("dregs_lo = dregs_hi << uimm4 (S)"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "="); OUTS (outf, dregs_hi (src1)); OUTS (outf, "<<"); OUTS (outf, uimm4 (immag)); OUTS (outf, "(S)"); - return 2 * 2; } else if (HLs == 2 && sop == 1 && sopcde == 0) { - notethat ("dregs_hi = dregs_lo << uimm4 (S)"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs_lo (src1)); OUTS (outf, "<<"); OUTS (outf, uimm4 (immag)); OUTS (outf, "(S)"); - return 2 * 2; } else if (HLs == 3 && sop == 1 && sopcde == 0) { - notethat ("dregs_hi = dregs_hi << uimm4 (S)"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs_hi (src1)); OUTS (outf, "<<"); OUTS (outf, uimm4 (immag)); OUTS (outf, "(S)"); - return 2 * 2; } else if (HLs == 0 && sop == 2 && sopcde == 0 && bit8 == 0) { - notethat ("dregs_lo = dregs_lo << uimm4"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "="); OUTS (outf, dregs_lo (src1)); OUTS (outf, "<<"); OUTS (outf, uimm4 (immag)); - return 2 * 2; } else if (HLs == 0 && sop == 2 && sopcde == 0 && bit8 == 1) { - notethat ("dregs_lo = dregs_lo >> uimm4"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "="); OUTS (outf, dregs_lo (src1)); OUTS (outf, ">>"); OUTS (outf, uimm4 (newimmag)); - return 2 * 2; } else if (HLs == 1 && sop == 2 && sopcde == 0) { - notethat ("dregs_lo = dregs_hi >> uimm4"); OUTS (outf, dregs_lo (dst0)); OUTS (outf, "="); OUTS (outf, dregs_hi (src1)); OUTS (outf, ">>"); OUTS (outf, uimm4 (newimmag)); - return 2 * 2; } else if (HLs == 2 && sop == 2 && sopcde == 0 && bit8 == 1) { - notethat ("dregs_hi = dregs_lo >> uimm4"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs_lo (src1)); OUTS (outf, ">>"); OUTS (outf, uimm4 (newimmag)); - return 2 * 2; } else if (HLs == 2 && sop == 2 && sopcde == 0 && bit8 == 0) { - notethat ("dregs_hi = dregs_lo << uimm4"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs_lo (src1)); OUTS (outf, "<<"); OUTS (outf, uimm4 (immag)); - return 2 * 2; } else if (HLs == 3 && sop == 2 && sopcde == 0 && bit8 == 1) { - notethat ("dregs_hi = dregs_hi >> uimm4"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs_hi (src1)); OUTS (outf, ">>"); OUTS (outf, uimm4 (newimmag)); - return 2 * 2; } else if (HLs == 3 && sop == 2 && sopcde == 0 && bit8 == 0) { - notethat ("dregs_hi = dregs_hi << uimm4"); OUTS (outf, dregs_hi (dst0)); OUTS (outf, "="); OUTS (outf, dregs_hi (src1)); OUTS (outf, "<<"); OUTS (outf, uimm4 (immag)); - return 2 * 2; } else if (sop == 2 && sopcde == 3 && HLs == 1) { - notethat ("A1 = ROT A1 BY imm6"); OUTS (outf, "A1= ROT A1 BY "); OUTS (outf, imm6 (immag)); - return 2 * 2; } else if (sop == 0 && sopcde == 3 && HLs == 0 && bit8 == 0) { - notethat ("A0 = A0 << uimm5"); OUTS (outf, "A0=A0<<"); OUTS (outf, uimm5 (immag)); - return 2 * 2; } else if (sop == 0 && sopcde == 3 && HLs == 0 && bit8 == 1) { - notethat ("A0 = A0 >>> uimm5"); OUTS (outf, "A0=A0>>>"); OUTS (outf, uimm5 (newimmag)); - return 2 * 2; } else if (sop == 0 && sopcde == 3 && HLs == 1 && bit8 == 0) { - notethat ("A1 = A1 << uimm5"); OUTS (outf, "A1=A1<<"); OUTS (outf, uimm5 (immag)); - return 2 * 2; } else if (sop == 0 && sopcde == 3 && HLs == 1 && bit8 == 1) { - notethat ("A1 = A1 >>> uimm5"); OUTS (outf, "A1=A1>>>"); OUTS (outf, uimm5 (newimmag)); - return 2 * 2; } else if (sop == 1 && sopcde == 3 && HLs == 0) { - notethat ("A0 = A0 >> uimm5"); OUTS (outf, "A0=A0>>"); OUTS (outf, uimm5 (newimmag)); - return 2 * 2; } else if (sop == 1 && sopcde == 3 && HLs == 1) { - notethat ("A1 = A1 >> uimm5"); OUTS (outf, "A1=A1>>"); OUTS (outf, uimm5 (newimmag)); - return 2 * 2; } else if (sop == 2 && sopcde == 3 && HLs == 0) { - notethat ("A0 = ROT A0 BY imm6"); OUTS (outf, "A0= ROT A0 BY "); OUTS (outf, imm6 (immag)); - return 2 * 2; } else if (sop == 1 && sopcde == 1 && bit8 == 0) { - notethat ("dregs = dregs << uimm5 (V, S)"); OUTS (outf, dregs (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src1)); OUTS (outf, "<<"); OUTS (outf, uimm5 (immag)); OUTS (outf, " (V, S)"); - return 2 * 2; } else if (sop == 1 && sopcde == 1 && bit8 == 1) { - notethat ("dregs = dregs >>> uimm5 (V)"); OUTS (outf, dregs (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src1)); OUTS (outf, ">>>"); OUTS (outf, imm5 (-immag)); OUTS (outf, " (V)"); - return 2 * 2; } else if (sop == 2 && sopcde == 1 && bit8 == 1) { - notethat ("dregs = dregs >> uimm5 (V)"); OUTS (outf, dregs (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src1)); OUTS (outf, " >> "); OUTS (outf, uimm5 (newimmag)); OUTS (outf, " (V)"); - return 2 * 2; } else if (sop == 2 && sopcde == 1 && bit8 == 0) { - notethat ("dregs = dregs << imm5 (V)"); OUTS (outf, dregs (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src1)); OUTS (outf, "<<"); OUTS (outf, imm5 (immag)); OUTS (outf, " (V)"); - return 2 * 2; } else if (sop == 0 && sopcde == 1) { - notethat ("dregs = dregs >>> uimm5 (V)"); OUTS (outf, dregs (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src1)); OUTS (outf, ">>>"); OUTS (outf, uimm5 (newimmag)); OUTS (outf, " (V)"); - return 2 * 2; } else if (sop == 1 && sopcde == 2) { - notethat ("dregs = dregs << uimm5 (S)"); OUTS (outf, dregs (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src1)); OUTS (outf, "<<"); OUTS (outf, uimm5 (immag)); OUTS (outf, "(S)"); - return 2 * 2; } else if (sop == 2 && sopcde == 2 && bit8 == 1) { - notethat ("dregs = dregs >> uimm5"); OUTS (outf, dregs (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src1)); OUTS (outf, ">>"); OUTS (outf, uimm5 (newimmag)); - return 2 * 2; } else if (sop == 2 && sopcde == 2 && bit8 == 0) { - notethat ("dregs = dregs << uimm5"); OUTS (outf, dregs (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src1)); OUTS (outf, "<<"); OUTS (outf, uimm5 (immag)); - return 2 * 2; } else if (sop == 3 && sopcde == 2) { - notethat ("dregs = ROT dregs BY imm6"); OUTS (outf, dregs (dst0)); OUTS (outf, "= ROT "); OUTS (outf, dregs (src1)); OUTS (outf, " BY "); OUTS (outf, imm6 (immag)); - return 2 * 2; } else if (sop == 0 && sopcde == 2) { - notethat ("dregs = dregs >>> uimm5"); OUTS (outf, dregs (dst0)); OUTS (outf, "="); OUTS (outf, dregs (src1)); OUTS (outf, ">>>"); OUTS (outf, uimm5 (newimmag)); - return 2 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 4; } static int decode_pseudoDEBUG_0 (TIword iw0, disassemble_info *outf) { -/* pseudoDEBUG -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 |.fn....|.grp.......|.reg.......| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* pseudoDEBUG + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 |.fn....|.grp.......|.reg.......| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int fn = ((iw0 >> PseudoDbg_fn_bits) & PseudoDbg_fn_mask); int grp = ((iw0 >> PseudoDbg_grp_bits) & PseudoDbg_grp_mask); int reg = ((iw0 >> PseudoDbg_reg_bits) & PseudoDbg_reg_mask); if (reg == 0 && fn == 3) - { - notethat ("DBG A0"); - OUTS (outf, "DBG A0"); - return 1 * 2; - } + OUTS (outf, "DBG A0"); + else if (reg == 1 && fn == 3) - { - notethat ("DBG A1"); - OUTS (outf, "DBG A1"); - return 1 * 2; - } + OUTS (outf, "DBG A1"); + else if (reg == 3 && fn == 3) - { - notethat ("ABORT"); - OUTS (outf, "ABORT"); - return 1 * 2; - } + OUTS (outf, "ABORT"); + else if (reg == 4 && fn == 3) - { - notethat ("HLT"); - OUTS (outf, "HLT"); - return 1 * 2; - } + OUTS (outf, "HLT"); + else if (reg == 5 && fn == 3) - { - notethat ("DBGHALT"); - OUTS (outf, "DBGHALT"); - return 1 * 2; - } + OUTS (outf, "DBGHALT"); + else if (reg == 6 && fn == 3) { - notethat ("DBGCMPLX ( dregs )"); OUTS (outf, "DBGCMPLX("); OUTS (outf, dregs (grp)); OUTS (outf, ")"); - return 1 * 2; } else if (reg == 7 && fn == 3) - { - notethat ("DBG"); - OUTS (outf, "DBG"); - return 1 * 2; - } + OUTS (outf, "DBG"); + else if (grp == 0 && fn == 2) { - notethat ("OUTC dregs"); OUTS (outf, "OUTC"); OUTS (outf, dregs (reg)); - return 1 * 2; } else if (fn == 0) { - notethat ("DBG allregs"); OUTS (outf, "DBG"); OUTS (outf, allregs (reg, grp)); - return 1 * 2; } else if (fn == 1) { - notethat ("PRNT allregs"); OUTS (outf, "PRNT"); OUTS (outf, allregs (reg, grp)); - return 1 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + + return 2; } static int decode_pseudodbg_assert_0 (TIword iw0, TIword iw1, disassemble_info *outf) { -/* pseudodbg_assert -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -| 1 | 1 | 1 | 1 | 0 | - | - | - | - | - |.dbgop.....|.regtest...| -|.expected......................................................| -+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ -*/ + /* pseudodbg_assert + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ + | 1 | 1 | 1 | 1 | 0 | - | - | - | - | - |.dbgop.....|.regtest...| + |.expected......................................................| + +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ int expected = ((iw1 >> PseudoDbg_Assert_expected_bits) & PseudoDbg_Assert_expected_mask); - int dbgop = ((iw0 >> (PseudoDbg_Assert_dbgop_bits - 16)) & PseudoDbg_Assert_dbgop_mask); - int regtest = ((iw0 >> (PseudoDbg_Assert_regtest_bits - 16)) & PseudoDbg_Assert_regtest_mask); + int dbgop = ((iw0 >> (PseudoDbg_Assert_dbgop_bits - 16)) & PseudoDbg_Assert_dbgop_mask); + int regtest = ((iw0 >> (PseudoDbg_Assert_regtest_bits - 16)) & PseudoDbg_Assert_regtest_mask); if (dbgop == 0) { - notethat ("DBGA ( dregs_lo , uimm16 )"); OUTS (outf, "DBGA("); OUTS (outf, dregs_lo (regtest)); OUTS (outf, ","); OUTS (outf, uimm16 (expected)); OUTS (outf, ")"); - return 2 * 2; } else if (dbgop == 1) { - notethat ("DBGA ( dregs_hi , uimm16 )"); OUTS (outf, "DBGA("); OUTS (outf, dregs_hi (regtest)); OUTS (outf, ","); OUTS (outf, uimm16 (expected)); OUTS (outf, ")"); - return 2 * 2; } else if (dbgop == 2) { - notethat ("DBGAL ( dregs , uimm16 )"); OUTS (outf, "DBGAL("); OUTS (outf, dregs (regtest)); OUTS (outf, ","); OUTS (outf, uimm16 (expected)); OUTS (outf, ")"); - return 2 * 2; } else if (dbgop == 3) { - notethat ("DBGAH ( dregs , uimm16 )"); OUTS (outf, "DBGAH("); OUTS (outf, dregs (regtest)); OUTS (outf, ","); OUTS (outf, uimm16 (expected)); OUTS (outf, ")"); - return 2 * 2; } else - goto illegal_instruction; -illegal_instruction: - return 0; + return 0; + return 4; } int _print_insn_bfin (bfd_vma pc, disassemble_info *outf) { - bfd_byte buf[4]; TIword iw0; TIword iw1; int status; + int rv = 0; + status = (*outf->read_memory_func) (pc & ~0x1, buf, 2, outf); status = (*outf->read_memory_func) ((pc + 2) & ~0x1, buf + 2, 2, outf); @@ -5495,270 +4416,83 @@ _print_insn_bfin (bfd_vma pc, disassemble_info *outf) return 4; } else if ((iw0 & 0xff00) == 0x0000) - { - int rv = decode_ProgCtrl_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_ProgCtrl_0 (iw0, outf); else if ((iw0 & 0xffc0) == 0x0240) - { - int rv = decode_CaCTRL_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_CaCTRL_0 (iw0, outf); else if ((iw0 & 0xff80) == 0x0100) - { - int rv = decode_PushPopReg_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_PushPopReg_0 (iw0, outf); else if ((iw0 & 0xfe00) == 0x0400) - { - int rv = decode_PushPopMultiple_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_PushPopMultiple_0 (iw0, outf); else if ((iw0 & 0xfe00) == 0x0600) - { - int rv = decode_ccMV_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_ccMV_0 (iw0, outf); else if ((iw0 & 0xf800) == 0x0800) - { - int rv = decode_CCflag_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_CCflag_0 (iw0, outf); else if ((iw0 & 0xffe0) == 0x0200) - { - int rv = decode_CC2dreg_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_CC2dreg_0 (iw0, outf); else if ((iw0 & 0xff00) == 0x0300) - { - int rv = decode_CC2stat_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_CC2stat_0 (iw0, outf); else if ((iw0 & 0xf000) == 0x1000) - { - int rv = decode_BRCC_0 (iw0, pc, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_BRCC_0 (iw0, pc, outf); else if ((iw0 & 0xf000) == 0x2000) - { - int rv = decode_UJUMP_0 (iw0, pc, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_UJUMP_0 (iw0, pc, outf); else if ((iw0 & 0xf000) == 0x3000) - { - int rv = decode_REGMV_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_REGMV_0 (iw0, outf); else if ((iw0 & 0xfc00) == 0x4000) - { - int rv = decode_ALU2op_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_ALU2op_0 (iw0, outf); else if ((iw0 & 0xfe00) == 0x4400) - { - int rv = decode_PTR2op_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_PTR2op_0 (iw0, outf); else if ((iw0 & 0xf800) == 0x4800) - { - int rv = decode_LOGI2op_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_LOGI2op_0 (iw0, outf); else if ((iw0 & 0xf000) == 0x5000) - { - int rv = decode_COMP3op_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_COMP3op_0 (iw0, outf); else if ((iw0 & 0xf800) == 0x6000) - { - int rv = decode_COMPI2opD_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_COMPI2opD_0 (iw0, outf); else if ((iw0 & 0xf800) == 0x6800) - { - int rv = decode_COMPI2opP_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_COMPI2opP_0 (iw0, outf); else if ((iw0 & 0xf000) == 0x8000) - { - int rv = decode_LDSTpmod_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_LDSTpmod_0 (iw0, outf); else if ((iw0 & 0xff60) == 0x9e60) - { - int rv = decode_dagMODim_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_dagMODim_0 (iw0, outf); else if ((iw0 & 0xfff0) == 0x9f60) - { - int rv = decode_dagMODik_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_dagMODik_0 (iw0, outf); else if ((iw0 & 0xfc00) == 0x9c00) - { - int rv = decode_dspLDST_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_dspLDST_0 (iw0, outf); else if ((iw0 & 0xf000) == 0x9000) - { - int rv = decode_LDST_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_LDST_0 (iw0, outf); else if ((iw0 & 0xfc00) == 0xb800) - { - int rv = decode_LDSTiiFP_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_LDSTiiFP_0 (iw0, outf); else if ((iw0 & 0xe000) == 0xA000) - { - int rv = decode_LDSTii_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_LDSTii_0 (iw0, outf); else if ((iw0 & 0xff80) == 0xe080 && (iw1 & 0x0C00) == 0x0000) - { - int rv = decode_LoopSetup_0 (iw0, iw1, pc, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_LoopSetup_0 (iw0, iw1, pc, outf); else if ((iw0 & 0xff00) == 0xe100 && (iw1 & 0x0000) == 0x0000) - { - int rv = decode_LDIMMhalf_0 (iw0, iw1, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_LDIMMhalf_0 (iw0, iw1, outf); else if ((iw0 & 0xfe00) == 0xe200 && (iw1 & 0x0000) == 0x0000) - { - int rv = decode_CALLa_0 (iw0, iw1, pc, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_CALLa_0 (iw0, iw1, pc, outf); else if ((iw0 & 0xfc00) == 0xe400 && (iw1 & 0x0000) == 0x0000) - { - int rv = decode_LDSTidxI_0 (iw0, iw1, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_LDSTidxI_0 (iw0, iw1, outf); else if ((iw0 & 0xfffe) == 0xe800 && (iw1 & 0x0000) == 0x0000) - { - int rv = decode_linkage_0 (iw0, iw1, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_linkage_0 (iw0, iw1, outf); else if ((iw0 & 0xf600) == 0xc000 && (iw1 & 0x0000) == 0x0000) - { - int rv = decode_dsp32mac_0 (iw0, iw1, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_dsp32mac_0 (iw0, iw1, outf); else if ((iw0 & 0xf600) == 0xc200 && (iw1 & 0x0000) == 0x0000) - { - int rv = decode_dsp32mult_0 (iw0, iw1, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_dsp32mult_0 (iw0, iw1, outf); else if ((iw0 & 0xf7c0) == 0xc400 && (iw1 & 0x0000) == 0x0000) - { - int rv = decode_dsp32alu_0 (iw0, iw1, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_dsp32alu_0 (iw0, iw1, outf); else if ((iw0 & 0xf780) == 0xc600 && (iw1 & 0x01c0) == 0x0000) - { - int rv = decode_dsp32shift_0 (iw0, iw1, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_dsp32shift_0 (iw0, iw1, outf); else if ((iw0 & 0xf780) == 0xc680 && (iw1 & 0x0000) == 0x0000) - { - int rv = decode_dsp32shiftimm_0 (iw0, iw1, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_dsp32shiftimm_0 (iw0, iw1, outf); else if ((iw0 & 0xff00) == 0xf800) - { - int rv = decode_pseudoDEBUG_0 (iw0, outf); - if (rv) - return rv; - goto illegal_instruction; + rv = decode_pseudoDEBUG_0 (iw0, outf); #if 0 - } else if ((iw0 & 0xFF00) == 0xF900) - { - - int rv = decode_pseudoOChar_0 (iw0, iw1, pc, outf); - if (rv) - return rv; - goto illegal_instruction; + rv = decode_pseudoOChar_0 (iw0, iw1, pc, outf); #endif - } else if ((iw0 & 0xFFC0) == 0xf000 && (iw1 & 0x0000) == 0x0000) - { - int rv = decode_pseudodbg_assert_0 (iw0, iw1, outf); - if (rv) - return rv; - goto illegal_instruction; - } + rv = decode_pseudodbg_assert_0 (iw0, iw1, outf); -illegal_instruction: - return 0; + return rv; } @@ -5778,7 +4512,7 @@ print_insn_bfin (bfd_vma pc, disassemble_info *outf) /* Proper display of multiple issue instructions. */ if ((iw0 & 0xc000) == 0xc000 && (iw0 & BIT_MULTI_INS) - && ((iw0 & 0xe800) != 0xe800 /* not Linkage */ )) + && ((iw0 & 0xe800) != 0xe800 /* Not Linkage. */ )) { outf->fprintf_func (outf->stream, " || "); count += _print_insn_bfin (pc + 4, outf); diff --git a/opcodes/cgen-dis.in b/opcodes/cgen-dis.in index bc2a7d3e668..5f29e2852f8 100644 --- a/opcodes/cgen-dis.in +++ b/opcodes/cgen-dis.in @@ -4,7 +4,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. - the resultant file is machine generated, cgen-dis.in isn't - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005 + Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005 Free Software Foundation, Inc. This file is part of the GNU Binutils and GDB, the GNU debugger. @@ -347,7 +347,7 @@ default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) typedef struct cpu_desc_list { struct cpu_desc_list *next; - int isa; + CGEN_BITSET *isa; int mach; int endian; CGEN_CPU_DESC cd; @@ -359,11 +359,12 @@ print_insn_@arch@ (bfd_vma pc, disassemble_info *info) static cpu_desc_list *cd_list = 0; cpu_desc_list *cl = 0; static CGEN_CPU_DESC cd = 0; - static int prev_isa; + static CGEN_BITSET *prev_isa; static int prev_mach; static int prev_endian; int length; - int isa,mach; + CGEN_BITSET *isa; + int mach; int endian = (info->endian == BFD_ENDIAN_BIG ? CGEN_ENDIAN_BIG : CGEN_ENDIAN_LITTLE); @@ -386,25 +387,34 @@ print_insn_@arch@ (bfd_vma pc, disassemble_info *info) #endif #ifdef CGEN_COMPUTE_ISA - isa = CGEN_COMPUTE_ISA (info); + { + static CGEN_BITSET *permanent_isa; + + if (!permanent_isa) + permanent_isa = cgen_bitset_create (MAX_ISAS); + isa = permanent_isa; + cgen_bitset_clear (isa); + cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); + } #else isa = info->insn_sets; #endif /* If we've switched cpu's, try to find a handle we've used before */ if (cd - && (isa != prev_isa + && (cgen_bitset_compare (isa, prev_isa) != 0 || mach != prev_mach || endian != prev_endian)) { cd = 0; for (cl = cd_list; cl; cl = cl->next) { - if (cl->isa == isa && + if (cgen_bitset_compare (cl->isa, isa) == 0 && cl->mach == mach && cl->endian == endian) { cd = cl->cd; + prev_isa = cd->isas; break; } } @@ -420,7 +430,7 @@ print_insn_@arch@ (bfd_vma pc, disassemble_info *info) abort (); mach_name = arch_type->printable_name; - prev_isa = isa; + prev_isa = cgen_bitset_copy (isa); prev_mach = mach; prev_endian = endian; cd = @arch@_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, @@ -433,7 +443,7 @@ print_insn_@arch@ (bfd_vma pc, disassemble_info *info) /* Save this away for future reference. */ cl = xmalloc (sizeof (struct cpu_desc_list)); cl->cd = cd; - cl->isa = isa; + cl->isa = prev_isa; cl->mach = mach; cl->endian = endian; cl->next = cd_list; diff --git a/opcodes/cgen-opc.c b/opcodes/cgen-opc.c index d34aac826cf..dbc51751a05 100644 --- a/opcodes/cgen-opc.c +++ b/opcodes/cgen-opc.c @@ -613,3 +613,151 @@ cgen_signed_overflow_ok_p (CGEN_CPU_DESC cd) { return cd->signed_overflow_ok_p; } +/* Functions for manipulating CGEN_BITSET. */ + +/* Create a bit mask. */ +CGEN_BITSET * +cgen_bitset_create (unsigned bit_count) +{ + CGEN_BITSET * mask = xmalloc (sizeof (* mask)); + cgen_bitset_init (mask, bit_count); + return mask; +} + +/* Initialize an existing bit mask. */ + +void +cgen_bitset_init (CGEN_BITSET * mask, unsigned bit_count) +{ + if (! mask) + return; + mask->length = (bit_count / 8) + 1; + mask->bits = xmalloc (mask->length); + cgen_bitset_clear (mask); +} + +/* Clear the bits of a bit mask. */ + +void +cgen_bitset_clear (CGEN_BITSET * mask) +{ + unsigned i; + + if (! mask) + return; + + for (i = 0; i < mask->length; ++i) + mask->bits[i] = 0; +} + +/* Add a bit to a bit mask. */ + +void +cgen_bitset_add (CGEN_BITSET * mask, unsigned bit_num) +{ + int byte_ix, bit_ix; + int bit_mask; + + if (! mask) + return; + byte_ix = bit_num / 8; + bit_ix = bit_num % 8; + bit_mask = 1 << (7 - bit_ix); + mask->bits[byte_ix] |= bit_mask; +} + +/* Set a bit mask. */ + +void +cgen_bitset_set (CGEN_BITSET * mask, unsigned bit_num) +{ + if (! mask) + return; + cgen_bitset_clear (mask); + cgen_bitset_add (mask, bit_num); +} + +/* Test for a bit in a bit mask. + Returns 1 if the bit is found */ + +int +cgen_bitset_contains (CGEN_BITSET * mask, unsigned bit_num) +{ + int byte_ix, bit_ix; + int bit_mask; + + if (! mask) + return 1; /* No bit restrictions. */ + + byte_ix = bit_num / 8; + bit_ix = 7 - (bit_num % 8); + bit_mask = 1 << bit_ix; + return (mask->bits[byte_ix] & bit_mask) >> bit_ix; +} + +/* Compare two bit masks for equality. + Returns 0 if they are equal. */ + +int +cgen_bitset_compare (CGEN_BITSET * mask1, CGEN_BITSET * mask2) +{ + if (mask1 == mask2) + return 0; + if (! mask1 || ! mask2) + return 1; + if (mask1->length != mask2->length) + return 1; + return memcmp (mask1->bits, mask2->bits, mask1->length); +} + +/* Test two bit masks for common bits. + Returns 1 if a common bit is found. */ + +int +cgen_bitset_intersect_p (CGEN_BITSET * mask1, CGEN_BITSET * mask2) +{ + unsigned i, limit; + + if (mask1 == mask2) + return 1; + if (! mask1 || ! mask2) + return 0; + limit = mask1->length < mask2->length ? mask1->length : mask2->length; + + for (i = 0; i < limit; ++i) + if ((mask1->bits[i] & mask2->bits[i])) + return 1; + + return 0; +} + +/* Make a copy of a bit mask. */ + +CGEN_BITSET * +cgen_bitset_copy (CGEN_BITSET * mask) +{ + CGEN_BITSET* newmask; + + if (! mask) + return NULL; + newmask = cgen_bitset_create ((mask->length * 8) - 1); + memcpy (newmask->bits, mask->bits, mask->length); + return newmask; +} + +/* Combine two bit masks. */ + +void +cgen_bitset_union (CGEN_BITSET * mask1, CGEN_BITSET * mask2, + CGEN_BITSET * result) +{ + unsigned i; + + if (! mask1 || ! mask2 || ! result + || mask1->length != mask2->length + || mask1->length != result->length) + return; + + for (i = 0; i < result->length; ++i) + result->bits[i] = mask1->bits[i] | mask2->bits[i]; +} diff --git a/opcodes/configure b/opcodes/configure index a9c0ac64569..34c9ced1d03 100755 --- a/opcodes/configure +++ b/opcodes/configure @@ -8769,6 +8769,7 @@ if test x${all_targets} = xfalse ; then bfd_we32k_arch) ;; bfd_xstormy16_arch) ta="$ta xstormy16-asm.lo xstormy16-desc.lo xstormy16-dis.lo xstormy16-ibld.lo xstormy16-opc.lo" using_cgen=yes ;; bfd_xtensa_arch) ta="$ta xtensa-dis.lo" ;; + bfd_z80_arch) ta="$ta z80-dis.lo" ;; bfd_z8k_arch) ta="$ta z8k-dis.lo" ;; "") ;; diff --git a/opcodes/configure.in b/opcodes/configure.in index 5156685e8cb..ad02c3e3d16 100644 --- a/opcodes/configure.in +++ b/opcodes/configure.in @@ -229,6 +229,7 @@ if test x${all_targets} = xfalse ; then bfd_we32k_arch) ;; bfd_xstormy16_arch) ta="$ta xstormy16-asm.lo xstormy16-desc.lo xstormy16-dis.lo xstormy16-ibld.lo xstormy16-opc.lo" using_cgen=yes ;; bfd_xtensa_arch) ta="$ta xtensa-dis.lo" ;; + bfd_z80_arch) ta="$ta z80-dis.lo" ;; bfd_z8k_arch) ta="$ta z8k-dis.lo" ;; "") ;; diff --git a/opcodes/dep-in.sed b/opcodes/dep-in.sed index 94da2adc340..081f99c1e08 100644 --- a/opcodes/dep-in.sed +++ b/opcodes/dep-in.sed @@ -4,6 +4,7 @@ s/\\\n */ /g t loop s!\.o:!.lo:! +s! \./! !g s! @BFD_H@! $(BFD_H)!g s!@INCDIR@!$(INCDIR)!g s!@TOPDIR@/include!$(INCDIR)!g diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c index 9304e083806..007731a7ef2 100644 --- a/opcodes/disassemble.c +++ b/opcodes/disassemble.c @@ -75,6 +75,7 @@ #define ARCH_w65 #define ARCH_xstormy16 #define ARCH_xtensa +#define ARCH_z80 #define ARCH_z8k #define INCLUDE_SHMEDIA #endif @@ -374,6 +375,11 @@ disassembler (abfd) disassemble = print_insn_xtensa; break; #endif +#ifdef ARCH_z80 + case bfd_arch_z80: + disassemble = print_insn_z80; + break; +#endif #ifdef ARCH_z8k case bfd_arch_z8k: if (bfd_get_mach(abfd) == bfd_mach_z8001) @@ -446,14 +452,19 @@ disassemble_init_for_target (struct disassemble_info * info) #ifdef ARCH_tic4x case bfd_arch_tic4x: info->skip_zeroes = 32; + break; #endif #ifdef ARCH_m32c case bfd_arch_m32c: info->endian = BFD_ENDIAN_BIG; - if (info->mach == bfd_mach_m16c) - info->insn_sets = 1 << ISA_M16C; - else - info->insn_sets = 1 << ISA_M32C; + if (! info->insn_sets) + { + info->insn_sets = cgen_bitset_create (ISA_MAX); + if (info->mach == bfd_mach_m16c) + cgen_bitset_set (info->insn_sets, ISA_M16C); + else + cgen_bitset_set (info->insn_sets, ISA_M32C); + } break; #endif default: diff --git a/opcodes/fr30-desc.c b/opcodes/fr30-desc.c index 768fce6ebc0..a8c2a357b6c 100644 --- a/opcodes/fr30-desc.c +++ b/opcodes/fr30-desc.c @@ -128,25 +128,25 @@ static const CGEN_MACH fr30_cgen_mach_table[] = { static CGEN_KEYWORD_ENTRY fr30_cgen_opval_gr_names_entries[] = { - { "r0", 0, {0, {0}}, 0, 0 }, - { "r1", 1, {0, {0}}, 0, 0 }, - { "r2", 2, {0, {0}}, 0, 0 }, - { "r3", 3, {0, {0}}, 0, 0 }, - { "r4", 4, {0, {0}}, 0, 0 }, - { "r5", 5, {0, {0}}, 0, 0 }, - { "r6", 6, {0, {0}}, 0, 0 }, - { "r7", 7, {0, {0}}, 0, 0 }, - { "r8", 8, {0, {0}}, 0, 0 }, - { "r9", 9, {0, {0}}, 0, 0 }, - { "r10", 10, {0, {0}}, 0, 0 }, - { "r11", 11, {0, {0}}, 0, 0 }, - { "r12", 12, {0, {0}}, 0, 0 }, - { "r13", 13, {0, {0}}, 0, 0 }, - { "r14", 14, {0, {0}}, 0, 0 }, - { "r15", 15, {0, {0}}, 0, 0 }, - { "ac", 13, {0, {0}}, 0, 0 }, - { "fp", 14, {0, {0}}, 0, 0 }, - { "sp", 15, {0, {0}}, 0, 0 } + { "r0", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "r1", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "r2", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "r3", 3, {0, {{{0, 0}}}}, 0, 0 }, + { "r4", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "r5", 5, {0, {{{0, 0}}}}, 0, 0 }, + { "r6", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "r7", 7, {0, {{{0, 0}}}}, 0, 0 }, + { "r8", 8, {0, {{{0, 0}}}}, 0, 0 }, + { "r9", 9, {0, {{{0, 0}}}}, 0, 0 }, + { "r10", 10, {0, {{{0, 0}}}}, 0, 0 }, + { "r11", 11, {0, {{{0, 0}}}}, 0, 0 }, + { "r12", 12, {0, {{{0, 0}}}}, 0, 0 }, + { "r13", 13, {0, {{{0, 0}}}}, 0, 0 }, + { "r14", 14, {0, {{{0, 0}}}}, 0, 0 }, + { "r15", 15, {0, {{{0, 0}}}}, 0, 0 }, + { "ac", 13, {0, {{{0, 0}}}}, 0, 0 }, + { "fp", 14, {0, {{{0, 0}}}}, 0, 0 }, + { "sp", 15, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD fr30_cgen_opval_gr_names = @@ -158,22 +158,22 @@ CGEN_KEYWORD fr30_cgen_opval_gr_names = static CGEN_KEYWORD_ENTRY fr30_cgen_opval_cr_names_entries[] = { - { "cr0", 0, {0, {0}}, 0, 0 }, - { "cr1", 1, {0, {0}}, 0, 0 }, - { "cr2", 2, {0, {0}}, 0, 0 }, - { "cr3", 3, {0, {0}}, 0, 0 }, - { "cr4", 4, {0, {0}}, 0, 0 }, - { "cr5", 5, {0, {0}}, 0, 0 }, - { "cr6", 6, {0, {0}}, 0, 0 }, - { "cr7", 7, {0, {0}}, 0, 0 }, - { "cr8", 8, {0, {0}}, 0, 0 }, - { "cr9", 9, {0, {0}}, 0, 0 }, - { "cr10", 10, {0, {0}}, 0, 0 }, - { "cr11", 11, {0, {0}}, 0, 0 }, - { "cr12", 12, {0, {0}}, 0, 0 }, - { "cr13", 13, {0, {0}}, 0, 0 }, - { "cr14", 14, {0, {0}}, 0, 0 }, - { "cr15", 15, {0, {0}}, 0, 0 } + { "cr0", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "cr1", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "cr2", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "cr3", 3, {0, {{{0, 0}}}}, 0, 0 }, + { "cr4", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "cr5", 5, {0, {{{0, 0}}}}, 0, 0 }, + { "cr6", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "cr7", 7, {0, {{{0, 0}}}}, 0, 0 }, + { "cr8", 8, {0, {{{0, 0}}}}, 0, 0 }, + { "cr9", 9, {0, {{{0, 0}}}}, 0, 0 }, + { "cr10", 10, {0, {{{0, 0}}}}, 0, 0 }, + { "cr11", 11, {0, {{{0, 0}}}}, 0, 0 }, + { "cr12", 12, {0, {{{0, 0}}}}, 0, 0 }, + { "cr13", 13, {0, {{{0, 0}}}}, 0, 0 }, + { "cr14", 14, {0, {{{0, 0}}}}, 0, 0 }, + { "cr15", 15, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD fr30_cgen_opval_cr_names = @@ -185,12 +185,12 @@ CGEN_KEYWORD fr30_cgen_opval_cr_names = static CGEN_KEYWORD_ENTRY fr30_cgen_opval_dr_names_entries[] = { - { "tbr", 0, {0, {0}}, 0, 0 }, - { "rp", 1, {0, {0}}, 0, 0 }, - { "ssp", 2, {0, {0}}, 0, 0 }, - { "usp", 3, {0, {0}}, 0, 0 }, - { "mdh", 4, {0, {0}}, 0, 0 }, - { "mdl", 5, {0, {0}}, 0, 0 } + { "tbr", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "rp", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "ssp", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "usp", 3, {0, {{{0, 0}}}}, 0, 0 }, + { "mdh", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "mdl", 5, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD fr30_cgen_opval_dr_names = @@ -202,7 +202,7 @@ CGEN_KEYWORD fr30_cgen_opval_dr_names = static CGEN_KEYWORD_ENTRY fr30_cgen_opval_h_ps_entries[] = { - { "ps", 0, {0, {0}}, 0, 0 } + { "ps", 0, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD fr30_cgen_opval_h_ps = @@ -214,7 +214,7 @@ CGEN_KEYWORD fr30_cgen_opval_h_ps = static CGEN_KEYWORD_ENTRY fr30_cgen_opval_h_r13_entries[] = { - { "r13", 0, {0, {0}}, 0, 0 } + { "r13", 0, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD fr30_cgen_opval_h_r13 = @@ -226,7 +226,7 @@ CGEN_KEYWORD fr30_cgen_opval_h_r13 = static CGEN_KEYWORD_ENTRY fr30_cgen_opval_h_r14_entries[] = { - { "r14", 0, {0, {0}}, 0, 0 } + { "r14", 0, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD fr30_cgen_opval_h_r14 = @@ -238,7 +238,7 @@ CGEN_KEYWORD fr30_cgen_opval_h_r14 = static CGEN_KEYWORD_ENTRY fr30_cgen_opval_h_r15_entries[] = { - { "r15", 0, {0, {0}}, 0, 0 } + { "r15", 0, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD fr30_cgen_opval_h_r15 = @@ -259,32 +259,32 @@ CGEN_KEYWORD fr30_cgen_opval_h_r15 = const CGEN_HW_ENTRY fr30_cgen_hw_table[] = { - { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { (1<isas; + CGEN_BITSET *isas = cd->isas; unsigned int machs = cd->machs; cd->int_insn_p = CGEN_INT_INSN_P; @@ -1556,7 +1556,7 @@ fr30_cgen_rebuild_tables (CGEN_CPU_TABLE *cd) cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */ cd->max_insn_bitsize = 0; for (i = 0; i < MAX_ISAS; ++i) - if (((1 << i) & isas) != 0) + if (cgen_bitset_contains (isas, i)) { const CGEN_ISA *isa = & fr30_cgen_isa_table[i]; @@ -1641,7 +1641,7 @@ fr30_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) { CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE)); static int init_p; - unsigned int isas = 0; /* 0 = "unspecified" */ + CGEN_BITSET *isas = 0; /* 0 = "unspecified" */ unsigned int machs = 0; /* 0 = "unspecified" */ enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN; va_list ap; @@ -1660,7 +1660,7 @@ fr30_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) switch (arg_type) { case CGEN_CPU_OPEN_ISAS : - isas = va_arg (ap, unsigned int); + isas = va_arg (ap, CGEN_BITSET *); break; case CGEN_CPU_OPEN_MACHS : machs = va_arg (ap, unsigned int); @@ -1691,9 +1691,6 @@ fr30_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) machs = (1 << MAX_MACHS) - 1; /* Base mach is always selected. */ machs |= 1; - /* ISA unspecified means "all". */ - if (isas == 0) - isas = (1 << MAX_ISAS) - 1; if (endian == CGEN_ENDIAN_UNKNOWN) { /* ??? If target has only one, could have a default. */ @@ -1701,7 +1698,7 @@ fr30_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) abort (); } - cd->isas = isas; + cd->isas = cgen_bitset_copy (isas); cd->machs = machs; cd->endian = endian; /* FIXME: for the sparc case we can determine insn-endianness statically. diff --git a/opcodes/fr30-desc.h b/opcodes/fr30-desc.h index 7741fafcb2e..509a69b88e5 100644 --- a/opcodes/fr30-desc.h +++ b/opcodes/fr30-desc.h @@ -25,6 +25,8 @@ with this program; if not, write to the Free Software Foundation, Inc., #ifndef FR30_CPU_H #define FR30_CPU_H +#include "opcode/cgen-bitset.h" + #define CGEN_ARCH fr30 /* Given symbol S, return fr30_cgen_. */ @@ -156,6 +158,15 @@ typedef enum cgen_ifld_attr { /* Number of non-boolean elements in cgen_ifld_attr. */ #define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1) +/* cgen_ifld attribute accessor macros. */ +#define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_PCREL_ADDR)) != 0) +#define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_ABS_ADDR)) != 0) +#define CGEN_ATTR_CGEN_IFLD_RESERVED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_RESERVED)) != 0) +#define CGEN_ATTR_CGEN_IFLD_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGN_OPT)) != 0) +#define CGEN_ATTR_CGEN_IFLD_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGNED)) != 0) + /* Enum declaration for fr30 ifield types. */ typedef enum ifield_type { FR30_F_NIL, FR30_F_ANYOF, FR30_F_OP1, FR30_F_OP2 @@ -184,6 +195,13 @@ typedef enum cgen_hw_attr { /* Number of non-boolean elements in cgen_hw_attr. */ #define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1) +/* cgen_hw attribute accessor macros. */ +#define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_CACHE_ADDR)) != 0) +#define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PC)) != 0) +#define CGEN_ATTR_CGEN_HW_PROFILE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PROFILE)) != 0) + /* Enum declaration for fr30 hardware types. */ typedef enum cgen_hw_type { HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR @@ -210,6 +228,18 @@ typedef enum cgen_operand_attr { /* Number of non-boolean elements in cgen_operand_attr. */ #define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1) +/* cgen_operand attribute accessor macros. */ +#define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_ABS_ADDR)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGN_OPT)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGNED)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_NEGATIVE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_NEGATIVE)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_RELAX)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SEM_ONLY)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_HASH_PREFIX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_HASH_PREFIX)) != 0) + /* Enum declaration for fr30 operand types. */ typedef enum cgen_operand_type { FR30_OPERAND_PC, FR30_OPERAND_RI, FR30_OPERAND_RJ, FR30_OPERAND_RIC @@ -246,6 +276,20 @@ typedef enum cgen_insn_attr { /* Number of non-boolean elements in cgen_insn_attr. */ #define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1) +/* cgen_insn attribute accessor macros. */ +#define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_ALIAS)) != 0) +#define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_UNCOND_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_COND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_COND_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_SKIP_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SKIP_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_DELAY_SLOT)) != 0) +#define CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXABLE)) != 0) +#define CGEN_ATTR_CGEN_INSN_RELAXED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXED)) != 0) +#define CGEN_ATTR_CGEN_INSN_NO_DIS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NO_DIS)) != 0) +#define CGEN_ATTR_CGEN_INSN_PBB_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PBB)) != 0) +#define CGEN_ATTR_CGEN_INSN_NOT_IN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NOT_IN_DELAY_SLOT)) != 0) + /* cgen.h uses things we just defined. */ #include "opcode/cgen.h" diff --git a/opcodes/fr30-dis.c b/opcodes/fr30-dis.c index 0f7c8e895f5..740e4f4bfcd 100644 --- a/opcodes/fr30-dis.c +++ b/opcodes/fr30-dis.c @@ -4,7 +4,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. - the resultant file is machine generated, cgen-dis.in isn't - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005 + Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005 Free Software Foundation, Inc. This file is part of the GNU Binutils and GDB, the GNU debugger. @@ -607,7 +607,7 @@ default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) typedef struct cpu_desc_list { struct cpu_desc_list *next; - int isa; + CGEN_BITSET *isa; int mach; int endian; CGEN_CPU_DESC cd; @@ -619,11 +619,12 @@ print_insn_fr30 (bfd_vma pc, disassemble_info *info) static cpu_desc_list *cd_list = 0; cpu_desc_list *cl = 0; static CGEN_CPU_DESC cd = 0; - static int prev_isa; + static CGEN_BITSET *prev_isa; static int prev_mach; static int prev_endian; int length; - int isa,mach; + CGEN_BITSET *isa; + int mach; int endian = (info->endian == BFD_ENDIAN_BIG ? CGEN_ENDIAN_BIG : CGEN_ENDIAN_LITTLE); @@ -646,25 +647,34 @@ print_insn_fr30 (bfd_vma pc, disassemble_info *info) #endif #ifdef CGEN_COMPUTE_ISA - isa = CGEN_COMPUTE_ISA (info); + { + static CGEN_BITSET *permanent_isa; + + if (!permanent_isa) + permanent_isa = cgen_bitset_create (MAX_ISAS); + isa = permanent_isa; + cgen_bitset_clear (isa); + cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); + } #else isa = info->insn_sets; #endif /* If we've switched cpu's, try to find a handle we've used before */ if (cd - && (isa != prev_isa + && (cgen_bitset_compare (isa, prev_isa) != 0 || mach != prev_mach || endian != prev_endian)) { cd = 0; for (cl = cd_list; cl; cl = cl->next) { - if (cl->isa == isa && + if (cgen_bitset_compare (cl->isa, isa) == 0 && cl->mach == mach && cl->endian == endian) { cd = cl->cd; + prev_isa = cd->isas; break; } } @@ -680,7 +690,7 @@ print_insn_fr30 (bfd_vma pc, disassemble_info *info) abort (); mach_name = arch_type->printable_name; - prev_isa = isa; + prev_isa = cgen_bitset_copy (isa); prev_mach = mach; prev_endian = endian; cd = fr30_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, @@ -693,7 +703,7 @@ print_insn_fr30 (bfd_vma pc, disassemble_info *info) /* Save this away for future reference. */ cl = xmalloc (sizeof (struct cpu_desc_list)); cl->cd = cd; - cl->isa = isa; + cl->isa = prev_isa; cl->mach = mach; cl->endian = endian; cl->next = cd_list; diff --git a/opcodes/fr30-opc.c b/opcodes/fr30-opc.c index 0eefb4693a7..be92c6d77bf 100644 --- a/opcodes/fr30-opc.c +++ b/opcodes/fr30-opc.c @@ -1228,17 +1228,17 @@ static const CGEN_IBASE fr30_cgen_macro_insn_table[] = /* ldi8 $i8,$Ri */ { -1, "ldi8m", "ldi8", 16, - { 0|A(NO_DIS)|A(ALIAS), { (1<isas; + CGEN_BITSET *isas = cd->isas; unsigned int machs = cd->machs; cd->int_insn_p = CGEN_INT_INSN_P; @@ -6269,7 +6269,7 @@ frv_cgen_rebuild_tables (CGEN_CPU_TABLE *cd) cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */ cd->max_insn_bitsize = 0; for (i = 0; i < MAX_ISAS; ++i) - if (((1 << i) & isas) != 0) + if (cgen_bitset_contains (isas, i)) { const CGEN_ISA *isa = & frv_cgen_isa_table[i]; @@ -6354,7 +6354,7 @@ frv_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) { CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE)); static int init_p; - unsigned int isas = 0; /* 0 = "unspecified" */ + CGEN_BITSET *isas = 0; /* 0 = "unspecified" */ unsigned int machs = 0; /* 0 = "unspecified" */ enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN; va_list ap; @@ -6373,7 +6373,7 @@ frv_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) switch (arg_type) { case CGEN_CPU_OPEN_ISAS : - isas = va_arg (ap, unsigned int); + isas = va_arg (ap, CGEN_BITSET *); break; case CGEN_CPU_OPEN_MACHS : machs = va_arg (ap, unsigned int); @@ -6404,9 +6404,6 @@ frv_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) machs = (1 << MAX_MACHS) - 1; /* Base mach is always selected. */ machs |= 1; - /* ISA unspecified means "all". */ - if (isas == 0) - isas = (1 << MAX_ISAS) - 1; if (endian == CGEN_ENDIAN_UNKNOWN) { /* ??? If target has only one, could have a default. */ @@ -6414,7 +6411,7 @@ frv_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) abort (); } - cd->isas = isas; + cd->isas = cgen_bitset_copy (isas); cd->machs = machs; cd->endian = endian; /* FIXME: for the sparc case we can determine insn-endianness statically. diff --git a/opcodes/frv-desc.h b/opcodes/frv-desc.h index 8b506dc2a16..d94447f9fdb 100644 --- a/opcodes/frv-desc.h +++ b/opcodes/frv-desc.h @@ -25,6 +25,8 @@ with this program; if not, write to the Free Software Foundation, Inc., #ifndef FRV_CPU_H #define FRV_CPU_H +#include "opcode/cgen-bitset.h" + #define CGEN_ARCH frv /* Given symbol S, return frv_cgen_. */ @@ -617,6 +619,15 @@ typedef enum cgen_ifld_attr { /* Number of non-boolean elements in cgen_ifld_attr. */ #define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1) +/* cgen_ifld attribute accessor macros. */ +#define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_PCREL_ADDR)) != 0) +#define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_ABS_ADDR)) != 0) +#define CGEN_ATTR_CGEN_IFLD_RESERVED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_RESERVED)) != 0) +#define CGEN_ATTR_CGEN_IFLD_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGN_OPT)) != 0) +#define CGEN_ATTR_CGEN_IFLD_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGNED)) != 0) + /* Enum declaration for frv ifield types. */ typedef enum ifield_type { FRV_F_NIL, FRV_F_ANYOF, FRV_F_PACK, FRV_F_OP @@ -661,6 +672,13 @@ typedef enum cgen_hw_attr { /* Number of non-boolean elements in cgen_hw_attr. */ #define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1) +/* cgen_hw attribute accessor macros. */ +#define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_CACHE_ADDR)) != 0) +#define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PC)) != 0) +#define CGEN_ATTR_CGEN_HW_PROFILE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PROFILE)) != 0) + /* Enum declaration for frv hardware types. */ typedef enum cgen_hw_type { HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR @@ -693,6 +711,18 @@ typedef enum cgen_operand_attr { /* Number of non-boolean elements in cgen_operand_attr. */ #define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1) +/* cgen_operand attribute accessor macros. */ +#define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_ABS_ADDR)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGN_OPT)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGNED)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_NEGATIVE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_NEGATIVE)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_RELAX)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SEM_ONLY)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_HASH_PREFIX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_HASH_PREFIX)) != 0) + /* Enum declaration for frv operand types. */ typedef enum cgen_operand_type { FRV_OPERAND_PC, FRV_OPERAND_PACK, FRV_OPERAND_GRI, FRV_OPERAND_GRJ @@ -742,6 +772,30 @@ typedef enum cgen_insn_attr { /* Number of non-boolean elements in cgen_insn_attr. */ #define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1) +/* cgen_insn attribute accessor macros. */ +#define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_INSN_UNIT_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_UNIT-CGEN_INSN_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_INSN_FR400_MAJOR_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_FR400_MAJOR-CGEN_INSN_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_INSN_FR450_MAJOR_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_FR450_MAJOR-CGEN_INSN_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_INSN_FR500_MAJOR_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_FR500_MAJOR-CGEN_INSN_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_INSN_FR550_MAJOR_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_FR550_MAJOR-CGEN_INSN_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_ALIAS)) != 0) +#define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_UNCOND_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_COND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_COND_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_SKIP_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SKIP_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_DELAY_SLOT)) != 0) +#define CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXABLE)) != 0) +#define CGEN_ATTR_CGEN_INSN_RELAXED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXED)) != 0) +#define CGEN_ATTR_CGEN_INSN_NO_DIS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NO_DIS)) != 0) +#define CGEN_ATTR_CGEN_INSN_PBB_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PBB)) != 0) +#define CGEN_ATTR_CGEN_INSN_PRIVILEGED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PRIVILEGED)) != 0) +#define CGEN_ATTR_CGEN_INSN_NON_EXCEPTING_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NON_EXCEPTING)) != 0) +#define CGEN_ATTR_CGEN_INSN_CONDITIONAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_CONDITIONAL)) != 0) +#define CGEN_ATTR_CGEN_INSN_FR_ACCESS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_FR_ACCESS)) != 0) +#define CGEN_ATTR_CGEN_INSN_PRESERVE_OVF_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PRESERVE_OVF)) != 0) +#define CGEN_ATTR_CGEN_INSN_AUDIO_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_AUDIO)) != 0) + /* cgen.h uses things we just defined. */ #include "opcode/cgen.h" diff --git a/opcodes/frv-dis.c b/opcodes/frv-dis.c index a82fe2b6846..f74eb6251cc 100644 --- a/opcodes/frv-dis.c +++ b/opcodes/frv-dis.c @@ -4,7 +4,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. - the resultant file is machine generated, cgen-dis.in isn't - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005 + Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005 Free Software Foundation, Inc. This file is part of the GNU Binutils and GDB, the GNU debugger. @@ -704,7 +704,7 @@ default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) typedef struct cpu_desc_list { struct cpu_desc_list *next; - int isa; + CGEN_BITSET *isa; int mach; int endian; CGEN_CPU_DESC cd; @@ -716,11 +716,12 @@ print_insn_frv (bfd_vma pc, disassemble_info *info) static cpu_desc_list *cd_list = 0; cpu_desc_list *cl = 0; static CGEN_CPU_DESC cd = 0; - static int prev_isa; + static CGEN_BITSET *prev_isa; static int prev_mach; static int prev_endian; int length; - int isa,mach; + CGEN_BITSET *isa; + int mach; int endian = (info->endian == BFD_ENDIAN_BIG ? CGEN_ENDIAN_BIG : CGEN_ENDIAN_LITTLE); @@ -743,25 +744,34 @@ print_insn_frv (bfd_vma pc, disassemble_info *info) #endif #ifdef CGEN_COMPUTE_ISA - isa = CGEN_COMPUTE_ISA (info); + { + static CGEN_BITSET *permanent_isa; + + if (!permanent_isa) + permanent_isa = cgen_bitset_create (MAX_ISAS); + isa = permanent_isa; + cgen_bitset_clear (isa); + cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); + } #else isa = info->insn_sets; #endif /* If we've switched cpu's, try to find a handle we've used before */ if (cd - && (isa != prev_isa + && (cgen_bitset_compare (isa, prev_isa) != 0 || mach != prev_mach || endian != prev_endian)) { cd = 0; for (cl = cd_list; cl; cl = cl->next) { - if (cl->isa == isa && + if (cgen_bitset_compare (cl->isa, isa) == 0 && cl->mach == mach && cl->endian == endian) { cd = cl->cd; + prev_isa = cd->isas; break; } } @@ -777,7 +787,7 @@ print_insn_frv (bfd_vma pc, disassemble_info *info) abort (); mach_name = arch_type->printable_name; - prev_isa = isa; + prev_isa = cgen_bitset_copy (isa); prev_mach = mach; prev_endian = endian; cd = frv_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, @@ -790,7 +800,7 @@ print_insn_frv (bfd_vma pc, disassemble_info *info) /* Save this away for future reference. */ cl = xmalloc (sizeof (struct cpu_desc_list)); cl->cd = cd; - cl->isa = isa; + cl->isa = prev_isa; cl->mach = mach; cl->endian = endian; cl->next = cd_list; diff --git a/opcodes/frv-opc.c b/opcodes/frv-opc.c index 293ae61f6e9..d3e2b351e1a 100644 --- a/opcodes/frv-opc.c +++ b/opcodes/frv-opc.c @@ -38,7 +38,7 @@ with this program; if not, write to the Free Software Foundation, Inc., development tree. */ bfd_boolean -frv_is_branch_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach) +frv_is_branch_major (CGEN_ATTR_VALUE_ENUM_TYPE major, unsigned long mach) { switch (mach) { @@ -62,7 +62,7 @@ frv_is_branch_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach) /* Returns TRUE if {MAJOR,MACH} supports floating point insns. */ bfd_boolean -frv_is_float_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach) +frv_is_float_major (CGEN_ATTR_VALUE_ENUM_TYPE major, unsigned long mach) { switch (mach) { @@ -81,7 +81,7 @@ frv_is_float_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach) /* Returns TRUE if {MAJOR,MACH} supports media insns. */ bfd_boolean -frv_is_media_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach) +frv_is_media_major (CGEN_ATTR_VALUE_ENUM_TYPE major, unsigned long mach) { switch (mach) { @@ -225,7 +225,7 @@ static VLIW_COMBO fr550_allowed_vliw[] = /* Some insns are assigned specialized implementation units which map to different actual implementation units on different machines. These tables perform that mapping. */ -static CGEN_ATTR_VALUE_TYPE fr400_unit_mapping[] = +static CGEN_ATTR_VALUE_ENUM_TYPE fr400_unit_mapping[] = { /* unit in insn actual unit */ /* NIL */ UNIT_NIL, @@ -260,7 +260,7 @@ static CGEN_ATTR_VALUE_TYPE fr400_unit_mapping[] = /* Some insns are assigned specialized implementation units which map to different actual implementation units on different machines. These tables perform that mapping. */ -static CGEN_ATTR_VALUE_TYPE fr450_unit_mapping[] = +static CGEN_ATTR_VALUE_ENUM_TYPE fr450_unit_mapping[] = { /* unit in insn actual unit */ /* NIL */ UNIT_NIL, @@ -292,7 +292,7 @@ static CGEN_ATTR_VALUE_TYPE fr450_unit_mapping[] = /* MCLRACC-1*/ UNIT_FM0 /* mclracc,A==1 insn only in FM0 unit. */ }; -static CGEN_ATTR_VALUE_TYPE fr500_unit_mapping[] = +static CGEN_ATTR_VALUE_ENUM_TYPE fr500_unit_mapping[] = { /* unit in insn actual unit */ /* NIL */ UNIT_NIL, @@ -324,7 +324,7 @@ static CGEN_ATTR_VALUE_TYPE fr500_unit_mapping[] = /* MCLRACC-1*/ UNIT_FM01 /* mclracc,A==1 in FM0 or FM1 unit. */ }; -static CGEN_ATTR_VALUE_TYPE fr550_unit_mapping[] = +static CGEN_ATTR_VALUE_ENUM_TYPE fr550_unit_mapping[] = { /* unit in insn actual unit */ /* NIL */ UNIT_NIL, @@ -390,7 +390,7 @@ frv_vliw_reset (FRV_VLIW *vliw, unsigned long mach, unsigned long elf_flags) *_allowed_vliw tables above. */ static bfd_boolean match_unit (FRV_VLIW *vliw, - CGEN_ATTR_VALUE_TYPE unit1, CGEN_ATTR_VALUE_TYPE unit2) + CGEN_ATTR_VALUE_ENUM_TYPE unit1, CGEN_ATTR_VALUE_ENUM_TYPE unit2) { /* Map any specialized implementation units to actual ones. */ unit1 = vliw->unit_mapping[unit1]; @@ -442,7 +442,7 @@ match_vliw (VLIW_COMBO *vliw1, VLIW_COMBO *vliw2, int vliw_size) If one is found then return it. Otherwise return NULL. */ static VLIW_COMBO * -add_next_to_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE unit) +add_next_to_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE unit) { int next = vliw->next_slot; VLIW_COMBO *current = vliw->current_vliw; @@ -473,7 +473,7 @@ add_next_to_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE unit) Returns TRUE if found, FALSE otherwise. */ static bfd_boolean -find_major_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major) +find_major_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major) { int i; @@ -488,7 +488,7 @@ find_major_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major) types. */ static bfd_boolean -fr400_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major) +fr400_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major) { /* In the cpu file, all media insns are represented as being allowed in both media units. This makes it easier since this is the case for fr500. @@ -508,9 +508,9 @@ fr400_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major) } static bfd_boolean -fr450_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major) +fr450_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major) { - CGEN_ATTR_VALUE_TYPE other_major; + CGEN_ATTR_VALUE_ENUM_TYPE other_major; /* Our caller guarantees there's at least one other instruction. */ other_major = CGEN_INSN_ATTR_VALUE (vliw->insn[0], CGEN_INSN_FR450_MAJOR); @@ -543,7 +543,7 @@ fr450_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major) } static bfd_boolean -find_unit_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE unit) +find_unit_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE unit) { int i; @@ -556,8 +556,8 @@ find_unit_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE unit) static bfd_boolean find_major_in_slot (FRV_VLIW *vliw, - CGEN_ATTR_VALUE_TYPE major, - CGEN_ATTR_VALUE_TYPE slot) + CGEN_ATTR_VALUE_ENUM_TYPE major, + CGEN_ATTR_VALUE_ENUM_TYPE slot) { int i; @@ -612,11 +612,11 @@ fr550_find_float_in_vliw (FRV_VLIW *vliw) static bfd_boolean fr550_check_insn_major_constraints (FRV_VLIW *vliw, - CGEN_ATTR_VALUE_TYPE major, + CGEN_ATTR_VALUE_ENUM_TYPE major, const CGEN_INSN *insn) { - CGEN_ATTR_VALUE_TYPE unit; - CGEN_ATTR_VALUE_TYPE slot = (*vliw->current_vliw)[vliw->next_slot]; + CGEN_ATTR_VALUE_ENUM_TYPE unit; + CGEN_ATTR_VALUE_ENUM_TYPE slot = (*vliw->current_vliw)[vliw->next_slot]; switch (slot) { case UNIT_I2: @@ -662,7 +662,7 @@ fr550_check_insn_major_constraints (FRV_VLIW *vliw, } static bfd_boolean -fr500_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major) +fr500_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major) { /* TODO: A table might be faster for some of the more complex instances here. */ @@ -770,7 +770,7 @@ fr500_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major) static bfd_boolean check_insn_major_constraints (FRV_VLIW *vliw, - CGEN_ATTR_VALUE_TYPE major, + CGEN_ATTR_VALUE_ENUM_TYPE major, const CGEN_INSN *insn) { switch (vliw->mach) @@ -796,8 +796,8 @@ int frv_vliw_add_insn (FRV_VLIW *vliw, const CGEN_INSN *insn) { int index; - CGEN_ATTR_VALUE_TYPE major; - CGEN_ATTR_VALUE_TYPE unit; + CGEN_ATTR_VALUE_ENUM_TYPE major; + CGEN_ATTR_VALUE_ENUM_TYPE unit; VLIW_COMBO *new_vliw; if (vliw->constraint_violation || CGEN_INSN_INVALID_P (insn)) @@ -6046,37 +6046,37 @@ static const CGEN_IBASE frv_cgen_macro_insn_table[] = /* nop$pack */ { -1, "nop", "nop", 32, - { 0|A(ALIAS), { (1<isas; + CGEN_BITSET *isas = cd->isas; unsigned int machs = cd->machs; cd->int_insn_p = CGEN_INT_INSN_P; @@ -985,7 +985,7 @@ ip2k_cgen_rebuild_tables (CGEN_CPU_TABLE *cd) cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */ cd->max_insn_bitsize = 0; for (i = 0; i < MAX_ISAS; ++i) - if (((1 << i) & isas) != 0) + if (cgen_bitset_contains (isas, i)) { const CGEN_ISA *isa = & ip2k_cgen_isa_table[i]; @@ -1070,7 +1070,7 @@ ip2k_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) { CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE)); static int init_p; - unsigned int isas = 0; /* 0 = "unspecified" */ + CGEN_BITSET *isas = 0; /* 0 = "unspecified" */ unsigned int machs = 0; /* 0 = "unspecified" */ enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN; va_list ap; @@ -1089,7 +1089,7 @@ ip2k_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) switch (arg_type) { case CGEN_CPU_OPEN_ISAS : - isas = va_arg (ap, unsigned int); + isas = va_arg (ap, CGEN_BITSET *); break; case CGEN_CPU_OPEN_MACHS : machs = va_arg (ap, unsigned int); @@ -1120,9 +1120,6 @@ ip2k_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) machs = (1 << MAX_MACHS) - 1; /* Base mach is always selected. */ machs |= 1; - /* ISA unspecified means "all". */ - if (isas == 0) - isas = (1 << MAX_ISAS) - 1; if (endian == CGEN_ENDIAN_UNKNOWN) { /* ??? If target has only one, could have a default. */ @@ -1130,7 +1127,7 @@ ip2k_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) abort (); } - cd->isas = isas; + cd->isas = cgen_bitset_copy (isas); cd->machs = machs; cd->endian = endian; /* FIXME: for the sparc case we can determine insn-endianness statically. diff --git a/opcodes/ip2k-desc.h b/opcodes/ip2k-desc.h index fa85fbdf366..125849fbc8d 100644 --- a/opcodes/ip2k-desc.h +++ b/opcodes/ip2k-desc.h @@ -25,6 +25,8 @@ with this program; if not, write to the Free Software Foundation, Inc., #ifndef IP2K_CPU_H #define IP2K_CPU_H +#include "opcode/cgen-bitset.h" + #define CGEN_ARCH ip2k /* Given symbol S, return ip2k_cgen_. */ @@ -160,6 +162,15 @@ typedef enum cgen_ifld_attr { /* Number of non-boolean elements in cgen_ifld_attr. */ #define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1) +/* cgen_ifld attribute accessor macros. */ +#define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_PCREL_ADDR)) != 0) +#define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_ABS_ADDR)) != 0) +#define CGEN_ATTR_CGEN_IFLD_RESERVED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_RESERVED)) != 0) +#define CGEN_ATTR_CGEN_IFLD_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGN_OPT)) != 0) +#define CGEN_ATTR_CGEN_IFLD_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGNED)) != 0) + /* Enum declaration for ip2k ifield types. */ typedef enum ifield_type { IP2K_F_NIL, IP2K_F_ANYOF, IP2K_F_IMM8, IP2K_F_REG @@ -182,6 +193,13 @@ typedef enum cgen_hw_attr { /* Number of non-boolean elements in cgen_hw_attr. */ #define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1) +/* cgen_hw attribute accessor macros. */ +#define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_CACHE_ADDR)) != 0) +#define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PC)) != 0) +#define CGEN_ATTR_CGEN_HW_PROFILE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PROFILE)) != 0) + /* Enum declaration for ip2k hardware types. */ typedef enum cgen_hw_type { HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR @@ -204,6 +222,17 @@ typedef enum cgen_operand_attr { /* Number of non-boolean elements in cgen_operand_attr. */ #define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1) +/* cgen_operand attribute accessor macros. */ +#define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_ABS_ADDR)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGN_OPT)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGNED)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_NEGATIVE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_NEGATIVE)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_RELAX)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SEM_ONLY)) != 0) + /* Enum declaration for ip2k operand types. */ typedef enum cgen_operand_type { IP2K_OPERAND_PC, IP2K_OPERAND_ADDR16CJP, IP2K_OPERAND_FR, IP2K_OPERAND_LIT8 @@ -231,6 +260,21 @@ typedef enum cgen_insn_attr { /* Number of non-boolean elements in cgen_insn_attr. */ #define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1) +/* cgen_insn attribute accessor macros. */ +#define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_ALIAS)) != 0) +#define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_UNCOND_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_COND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_COND_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_SKIP_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SKIP_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_DELAY_SLOT)) != 0) +#define CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXABLE)) != 0) +#define CGEN_ATTR_CGEN_INSN_RELAXED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXED)) != 0) +#define CGEN_ATTR_CGEN_INSN_NO_DIS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NO_DIS)) != 0) +#define CGEN_ATTR_CGEN_INSN_PBB_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PBB)) != 0) +#define CGEN_ATTR_CGEN_INSN_EXT_SKIP_INSN_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_EXT_SKIP_INSN)) != 0) +#define CGEN_ATTR_CGEN_INSN_SKIPA_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SKIPA)) != 0) + /* cgen.h uses things we just defined. */ #include "opcode/cgen.h" diff --git a/opcodes/ip2k-dis.c b/opcodes/ip2k-dis.c index 95cb9e49e97..b80e97fb6a1 100644 --- a/opcodes/ip2k-dis.c +++ b/opcodes/ip2k-dis.c @@ -4,7 +4,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. - the resultant file is machine generated, cgen-dis.in isn't - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005 + Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005 Free Software Foundation, Inc. This file is part of the GNU Binutils and GDB, the GNU debugger. @@ -596,7 +596,7 @@ default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) typedef struct cpu_desc_list { struct cpu_desc_list *next; - int isa; + CGEN_BITSET *isa; int mach; int endian; CGEN_CPU_DESC cd; @@ -608,11 +608,12 @@ print_insn_ip2k (bfd_vma pc, disassemble_info *info) static cpu_desc_list *cd_list = 0; cpu_desc_list *cl = 0; static CGEN_CPU_DESC cd = 0; - static int prev_isa; + static CGEN_BITSET *prev_isa; static int prev_mach; static int prev_endian; int length; - int isa,mach; + CGEN_BITSET *isa; + int mach; int endian = (info->endian == BFD_ENDIAN_BIG ? CGEN_ENDIAN_BIG : CGEN_ENDIAN_LITTLE); @@ -635,25 +636,34 @@ print_insn_ip2k (bfd_vma pc, disassemble_info *info) #endif #ifdef CGEN_COMPUTE_ISA - isa = CGEN_COMPUTE_ISA (info); + { + static CGEN_BITSET *permanent_isa; + + if (!permanent_isa) + permanent_isa = cgen_bitset_create (MAX_ISAS); + isa = permanent_isa; + cgen_bitset_clear (isa); + cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); + } #else isa = info->insn_sets; #endif /* If we've switched cpu's, try to find a handle we've used before */ if (cd - && (isa != prev_isa + && (cgen_bitset_compare (isa, prev_isa) != 0 || mach != prev_mach || endian != prev_endian)) { cd = 0; for (cl = cd_list; cl; cl = cl->next) { - if (cl->isa == isa && + if (cgen_bitset_compare (cl->isa, isa) == 0 && cl->mach == mach && cl->endian == endian) { cd = cl->cd; + prev_isa = cd->isas; break; } } @@ -669,7 +679,7 @@ print_insn_ip2k (bfd_vma pc, disassemble_info *info) abort (); mach_name = arch_type->printable_name; - prev_isa = isa; + prev_isa = cgen_bitset_copy (isa); prev_mach = mach; prev_endian = endian; cd = ip2k_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, @@ -682,7 +692,7 @@ print_insn_ip2k (bfd_vma pc, disassemble_info *info) /* Save this away for future reference. */ cl = xmalloc (sizeof (struct cpu_desc_list)); cl->cd = cd; - cl->isa = isa; + cl->isa = prev_isa; cl->mach = mach; cl->endian = endian; cl->next = cd_list; diff --git a/opcodes/ip2k-opc.c b/opcodes/ip2k-opc.c index dd4648f8f11..30a734ec1ff 100644 --- a/opcodes/ip2k-opc.c +++ b/opcodes/ip2k-opc.c @@ -726,32 +726,32 @@ static const CGEN_IBASE ip2k_cgen_macro_insn_table[] = /* sc */ { -1, "sc", "sc", 16, - { 0|A(ALIAS), { (1< 8) + return _("Immediate is out of range -7 to 8"); + + /* If this field may require a relocation then use larger dsp16. */ + if (! have_zero && value == 0) + return _("Immediate is out of range -7 to 8"); + + *valuep = -value; + return 0; +} + static const char * parse_signed8 (CGEN_CPU_DESC cd, const char **strp, int opindex, signed long *valuep) @@ -407,6 +432,26 @@ parse_unsigned24 (CGEN_CPU_DESC cd, const char **strp, return 0; } +/* This should only be used for #imm->reg. */ +static const char * +parse_signed24 (CGEN_CPU_DESC cd, const char **strp, + int opindex, signed long *valuep) +{ + const char *errmsg = 0; + signed long value; + + PARSE_SIGNED; + + if (value <= 0xffffff && value > 0x7fffff) + value -= 0x1000000; + + if (value > 0xffffff) + return _("dsp:24 immediate is out of range"); + + *valuep = value; + return 0; +} + static const char * parse_signed32 (CGEN_CPU_DESC cd, const char **strp, int opindex, signed long *valuep) @@ -749,14 +794,14 @@ m32c_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn) { int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH); - int isas = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_ISA); + CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA); /* If attributes are absent, assume no restriction. */ if (machs == 0) machs = ~0; return ((machs & cd->machs) - && (isas & cd->isas)); + && cgen_bitset_intersect_p (& isas, cd->isas)); } /* Parse a set of registers, R0,R1,A0,A1,SB,FB. */ @@ -1038,6 +1083,9 @@ m32c_cgen_parse_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_DSP_48_U8 : errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_48_U8, (unsigned long *) (& fields->f_dsp_48_u8)); break; + case M32C_OPERAND_DSP_8_S24 : + errmsg = parse_signed24 (cd, strp, M32C_OPERAND_DSP_8_S24, (long *) (& fields->f_dsp_8_s24)); + break; case M32C_OPERAND_DSP_8_S8 : errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_8_S8, (long *) (& fields->f_dsp_8_s8)); break; @@ -1149,6 +1197,9 @@ m32c_cgen_parse_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_IMM_12_S4 : errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_12_S4, (long *) (& fields->f_imm_12_s4)); break; + case M32C_OPERAND_IMM_12_S4N : + errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_12_S4N, (long *) (& fields->f_imm_12_s4)); + break; case M32C_OPERAND_IMM_13_U3 : errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_13_U3, (long *) (& fields->f_imm_13_u3)); break; @@ -1218,6 +1269,9 @@ m32c_cgen_parse_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_IMM_8_S4 : errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_8_S4, (long *) (& fields->f_imm_8_s4)); break; + case M32C_OPERAND_IMM_8_S4N : + errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_8_S4N, (long *) (& fields->f_imm_8_s4)); + break; case M32C_OPERAND_IMM_SH_12_S4 : errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_12_s4); break; diff --git a/opcodes/m32c-desc.c b/opcodes/m32c-desc.c index a86c086a773..12b9a1b385a 100644 --- a/opcodes/m32c-desc.c +++ b/opcodes/m32c-desc.c @@ -134,10 +134,10 @@ static const CGEN_MACH m32c_cgen_mach_table[] = { static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_gr_entries[] = { - { "r0", 0, {0, {0}}, 0, 0 }, - { "r1", 1, {0, {0}}, 0, 0 }, - { "r2", 2, {0, {0}}, 0, 0 }, - { "r3", 3, {0, {0}}, 0, 0 } + { "r0", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "r1", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "r2", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "r3", 3, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_gr = @@ -149,10 +149,10 @@ CGEN_KEYWORD m32c_cgen_opval_h_gr = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_gr_QI_entries[] = { - { "r0l", 0, {0, {0}}, 0, 0 }, - { "r0h", 1, {0, {0}}, 0, 0 }, - { "r1l", 2, {0, {0}}, 0, 0 }, - { "r1h", 3, {0, {0}}, 0, 0 } + { "r0l", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "r0h", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "r1l", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "r1h", 3, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_gr_QI = @@ -164,10 +164,10 @@ CGEN_KEYWORD m32c_cgen_opval_h_gr_QI = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_gr_HI_entries[] = { - { "r0", 0, {0, {0}}, 0, 0 }, - { "r1", 1, {0, {0}}, 0, 0 }, - { "r2", 2, {0, {0}}, 0, 0 }, - { "r3", 3, {0, {0}}, 0, 0 } + { "r0", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "r1", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "r2", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "r3", 3, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_gr_HI = @@ -179,8 +179,8 @@ CGEN_KEYWORD m32c_cgen_opval_h_gr_HI = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_gr_SI_entries[] = { - { "r2r0", 0, {0, {0}}, 0, 0 }, - { "r3r1", 1, {0, {0}}, 0, 0 } + { "r2r0", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "r3r1", 1, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_gr_SI = @@ -192,8 +192,8 @@ CGEN_KEYWORD m32c_cgen_opval_h_gr_SI = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_gr_ext_QI_entries[] = { - { "r0l", 0, {0, {0}}, 0, 0 }, - { "r1l", 1, {0, {0}}, 0, 0 } + { "r0l", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "r1l", 1, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_gr_ext_QI = @@ -205,8 +205,8 @@ CGEN_KEYWORD m32c_cgen_opval_h_gr_ext_QI = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_gr_ext_HI_entries[] = { - { "r0", 0, {0, {0}}, 0, 0 }, - { "r1", 1, {0, {0}}, 0, 0 } + { "r0", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "r1", 1, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_gr_ext_HI = @@ -218,7 +218,7 @@ CGEN_KEYWORD m32c_cgen_opval_h_gr_ext_HI = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_r0l_entries[] = { - { "r0l", 0, {0, {0}}, 0, 0 } + { "r0l", 0, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_r0l = @@ -230,7 +230,7 @@ CGEN_KEYWORD m32c_cgen_opval_h_r0l = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_r0h_entries[] = { - { "r0h", 0, {0, {0}}, 0, 0 } + { "r0h", 0, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_r0h = @@ -242,7 +242,7 @@ CGEN_KEYWORD m32c_cgen_opval_h_r0h = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_r1l_entries[] = { - { "r1l", 0, {0, {0}}, 0, 0 } + { "r1l", 0, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_r1l = @@ -254,7 +254,7 @@ CGEN_KEYWORD m32c_cgen_opval_h_r1l = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_r1h_entries[] = { - { "r1h", 0, {0, {0}}, 0, 0 } + { "r1h", 0, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_r1h = @@ -266,7 +266,7 @@ CGEN_KEYWORD m32c_cgen_opval_h_r1h = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_r0_entries[] = { - { "r0", 0, {0, {0}}, 0, 0 } + { "r0", 0, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_r0 = @@ -278,7 +278,7 @@ CGEN_KEYWORD m32c_cgen_opval_h_r0 = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_r1_entries[] = { - { "r1", 0, {0, {0}}, 0, 0 } + { "r1", 0, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_r1 = @@ -290,7 +290,7 @@ CGEN_KEYWORD m32c_cgen_opval_h_r1 = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_r2_entries[] = { - { "r2", 0, {0, {0}}, 0, 0 } + { "r2", 0, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_r2 = @@ -302,7 +302,7 @@ CGEN_KEYWORD m32c_cgen_opval_h_r2 = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_r3_entries[] = { - { "r3", 0, {0, {0}}, 0, 0 } + { "r3", 0, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_r3 = @@ -314,8 +314,8 @@ CGEN_KEYWORD m32c_cgen_opval_h_r3 = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_r0l_r0h_entries[] = { - { "r0l", 0, {0, {0}}, 0, 0 }, - { "r0h", 1, {0, {0}}, 0, 0 } + { "r0l", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "r0h", 1, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_r0l_r0h = @@ -327,7 +327,7 @@ CGEN_KEYWORD m32c_cgen_opval_h_r0l_r0h = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_r2r0_entries[] = { - { "r2r0", 0, {0, {0}}, 0, 0 } + { "r2r0", 0, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_r2r0 = @@ -339,7 +339,7 @@ CGEN_KEYWORD m32c_cgen_opval_h_r2r0 = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_r3r1_entries[] = { - { "r3r1", 0, {0, {0}}, 0, 0 } + { "r3r1", 0, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_r3r1 = @@ -351,7 +351,7 @@ CGEN_KEYWORD m32c_cgen_opval_h_r3r1 = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_r1r2r0_entries[] = { - { "r1r2r0", 0, {0, {0}}, 0, 0 } + { "r1r2r0", 0, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_r1r2r0 = @@ -363,8 +363,8 @@ CGEN_KEYWORD m32c_cgen_opval_h_r1r2r0 = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_ar_entries[] = { - { "a0", 0, {0, {0}}, 0, 0 }, - { "a1", 1, {0, {0}}, 0, 0 } + { "a0", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "a1", 1, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_ar = @@ -376,8 +376,8 @@ CGEN_KEYWORD m32c_cgen_opval_h_ar = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_ar_QI_entries[] = { - { "a0", 0, {0, {0}}, 0, 0 }, - { "a1", 1, {0, {0}}, 0, 0 } + { "a0", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "a1", 1, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_ar_QI = @@ -389,8 +389,8 @@ CGEN_KEYWORD m32c_cgen_opval_h_ar_QI = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_ar_HI_entries[] = { - { "a0", 0, {0, {0}}, 0, 0 }, - { "a1", 1, {0, {0}}, 0, 0 } + { "a0", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "a1", 1, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_ar_HI = @@ -402,7 +402,7 @@ CGEN_KEYWORD m32c_cgen_opval_h_ar_HI = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_ar_SI_entries[] = { - { "a1a0", 0, {0, {0}}, 0, 0 } + { "a1a0", 0, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_ar_SI = @@ -414,7 +414,7 @@ CGEN_KEYWORD m32c_cgen_opval_h_ar_SI = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_a0_entries[] = { - { "a0", 0, {0, {0}}, 0, 0 } + { "a0", 0, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_a0 = @@ -426,7 +426,7 @@ CGEN_KEYWORD m32c_cgen_opval_h_a0 = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_a1_entries[] = { - { "a1", 1, {0, {0}}, 0, 0 } + { "a1", 1, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_a1 = @@ -438,24 +438,24 @@ CGEN_KEYWORD m32c_cgen_opval_h_a1 = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_cond16_entries[] = { - { "geu", 0, {0, {0}}, 0, 0 }, - { "c", 0, {0, {0}}, 0, 0 }, - { "gtu", 1, {0, {0}}, 0, 0 }, - { "eq", 2, {0, {0}}, 0, 0 }, - { "z", 2, {0, {0}}, 0, 0 }, - { "n", 3, {0, {0}}, 0, 0 }, - { "le", 4, {0, {0}}, 0, 0 }, - { "o", 5, {0, {0}}, 0, 0 }, - { "ge", 6, {0, {0}}, 0, 0 }, - { "ltu", 248, {0, {0}}, 0, 0 }, - { "nc", 248, {0, {0}}, 0, 0 }, - { "leu", 249, {0, {0}}, 0, 0 }, - { "ne", 250, {0, {0}}, 0, 0 }, - { "nz", 250, {0, {0}}, 0, 0 }, - { "pz", 251, {0, {0}}, 0, 0 }, - { "gt", 252, {0, {0}}, 0, 0 }, - { "no", 253, {0, {0}}, 0, 0 }, - { "lt", 254, {0, {0}}, 0, 0 } + { "geu", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "c", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "gtu", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "eq", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "z", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "n", 3, {0, {{{0, 0}}}}, 0, 0 }, + { "le", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "o", 5, {0, {{{0, 0}}}}, 0, 0 }, + { "ge", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "ltu", 248, {0, {{{0, 0}}}}, 0, 0 }, + { "nc", 248, {0, {{{0, 0}}}}, 0, 0 }, + { "leu", 249, {0, {{{0, 0}}}}, 0, 0 }, + { "ne", 250, {0, {{{0, 0}}}}, 0, 0 }, + { "nz", 250, {0, {{{0, 0}}}}, 0, 0 }, + { "pz", 251, {0, {{{0, 0}}}}, 0, 0 }, + { "gt", 252, {0, {{{0, 0}}}}, 0, 0 }, + { "no", 253, {0, {{{0, 0}}}}, 0, 0 }, + { "lt", 254, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_cond16 = @@ -467,24 +467,24 @@ CGEN_KEYWORD m32c_cgen_opval_h_cond16 = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_cond16c_entries[] = { - { "geu", 0, {0, {0}}, 0, 0 }, - { "c", 0, {0, {0}}, 0, 0 }, - { "gtu", 1, {0, {0}}, 0, 0 }, - { "eq", 2, {0, {0}}, 0, 0 }, - { "z", 2, {0, {0}}, 0, 0 }, - { "n", 3, {0, {0}}, 0, 0 }, - { "ltu", 4, {0, {0}}, 0, 0 }, - { "nc", 4, {0, {0}}, 0, 0 }, - { "leu", 5, {0, {0}}, 0, 0 }, - { "ne", 6, {0, {0}}, 0, 0 }, - { "nz", 6, {0, {0}}, 0, 0 }, - { "pz", 7, {0, {0}}, 0, 0 }, - { "le", 8, {0, {0}}, 0, 0 }, - { "o", 9, {0, {0}}, 0, 0 }, - { "ge", 10, {0, {0}}, 0, 0 }, - { "gt", 12, {0, {0}}, 0, 0 }, - { "no", 13, {0, {0}}, 0, 0 }, - { "lt", 14, {0, {0}}, 0, 0 } + { "geu", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "c", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "gtu", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "eq", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "z", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "n", 3, {0, {{{0, 0}}}}, 0, 0 }, + { "ltu", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "nc", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "leu", 5, {0, {{{0, 0}}}}, 0, 0 }, + { "ne", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "nz", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "pz", 7, {0, {{{0, 0}}}}, 0, 0 }, + { "le", 8, {0, {{{0, 0}}}}, 0, 0 }, + { "o", 9, {0, {{{0, 0}}}}, 0, 0 }, + { "ge", 10, {0, {{{0, 0}}}}, 0, 0 }, + { "gt", 12, {0, {{{0, 0}}}}, 0, 0 }, + { "no", 13, {0, {{{0, 0}}}}, 0, 0 }, + { "lt", 14, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_cond16c = @@ -496,12 +496,12 @@ CGEN_KEYWORD m32c_cgen_opval_h_cond16c = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_cond16j_entries[] = { - { "le", 8, {0, {0}}, 0, 0 }, - { "o", 9, {0, {0}}, 0, 0 }, - { "ge", 10, {0, {0}}, 0, 0 }, - { "gt", 12, {0, {0}}, 0, 0 }, - { "no", 13, {0, {0}}, 0, 0 }, - { "lt", 14, {0, {0}}, 0, 0 } + { "le", 8, {0, {{{0, 0}}}}, 0, 0 }, + { "o", 9, {0, {{{0, 0}}}}, 0, 0 }, + { "ge", 10, {0, {{{0, 0}}}}, 0, 0 }, + { "gt", 12, {0, {{{0, 0}}}}, 0, 0 }, + { "no", 13, {0, {{{0, 0}}}}, 0, 0 }, + { "lt", 14, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_cond16j = @@ -513,18 +513,18 @@ CGEN_KEYWORD m32c_cgen_opval_h_cond16j = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_cond16j_5_entries[] = { - { "geu", 0, {0, {0}}, 0, 0 }, - { "c", 0, {0, {0}}, 0, 0 }, - { "gtu", 1, {0, {0}}, 0, 0 }, - { "eq", 2, {0, {0}}, 0, 0 }, - { "z", 2, {0, {0}}, 0, 0 }, - { "n", 3, {0, {0}}, 0, 0 }, - { "ltu", 4, {0, {0}}, 0, 0 }, - { "nc", 4, {0, {0}}, 0, 0 }, - { "leu", 5, {0, {0}}, 0, 0 }, - { "ne", 6, {0, {0}}, 0, 0 }, - { "nz", 6, {0, {0}}, 0, 0 }, - { "pz", 7, {0, {0}}, 0, 0 } + { "geu", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "c", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "gtu", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "eq", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "z", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "n", 3, {0, {{{0, 0}}}}, 0, 0 }, + { "ltu", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "nc", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "leu", 5, {0, {{{0, 0}}}}, 0, 0 }, + { "ne", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "nz", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "pz", 7, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_cond16j_5 = @@ -536,24 +536,24 @@ CGEN_KEYWORD m32c_cgen_opval_h_cond16j_5 = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_cond32_entries[] = { - { "ltu", 0, {0, {0}}, 0, 0 }, - { "nc", 0, {0, {0}}, 0, 0 }, - { "leu", 1, {0, {0}}, 0, 0 }, - { "ne", 2, {0, {0}}, 0, 0 }, - { "nz", 2, {0, {0}}, 0, 0 }, - { "pz", 3, {0, {0}}, 0, 0 }, - { "no", 4, {0, {0}}, 0, 0 }, - { "gt", 5, {0, {0}}, 0, 0 }, - { "ge", 6, {0, {0}}, 0, 0 }, - { "geu", 8, {0, {0}}, 0, 0 }, - { "c", 8, {0, {0}}, 0, 0 }, - { "gtu", 9, {0, {0}}, 0, 0 }, - { "eq", 10, {0, {0}}, 0, 0 }, - { "z", 10, {0, {0}}, 0, 0 }, - { "n", 11, {0, {0}}, 0, 0 }, - { "o", 12, {0, {0}}, 0, 0 }, - { "le", 13, {0, {0}}, 0, 0 }, - { "lt", 14, {0, {0}}, 0, 0 } + { "ltu", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "nc", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "leu", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "ne", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "nz", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "pz", 3, {0, {{{0, 0}}}}, 0, 0 }, + { "no", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "gt", 5, {0, {{{0, 0}}}}, 0, 0 }, + { "ge", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "geu", 8, {0, {{{0, 0}}}}, 0, 0 }, + { "c", 8, {0, {{{0, 0}}}}, 0, 0 }, + { "gtu", 9, {0, {{{0, 0}}}}, 0, 0 }, + { "eq", 10, {0, {{{0, 0}}}}, 0, 0 }, + { "z", 10, {0, {{{0, 0}}}}, 0, 0 }, + { "n", 11, {0, {{{0, 0}}}}, 0, 0 }, + { "o", 12, {0, {{{0, 0}}}}, 0, 0 }, + { "le", 13, {0, {{{0, 0}}}}, 0, 0 }, + { "lt", 14, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_cond32 = @@ -565,14 +565,14 @@ CGEN_KEYWORD m32c_cgen_opval_h_cond32 = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_cr1_32_entries[] = { - { "dct0", 0, {0, {0}}, 0, 0 }, - { "dct1", 1, {0, {0}}, 0, 0 }, - { "flg", 2, {0, {0}}, 0, 0 }, - { "svf", 3, {0, {0}}, 0, 0 }, - { "drc0", 4, {0, {0}}, 0, 0 }, - { "drc1", 5, {0, {0}}, 0, 0 }, - { "dmd0", 6, {0, {0}}, 0, 0 }, - { "dmd1", 7, {0, {0}}, 0, 0 } + { "dct0", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "dct1", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "flg", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "svf", 3, {0, {{{0, 0}}}}, 0, 0 }, + { "drc0", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "drc1", 5, {0, {{{0, 0}}}}, 0, 0 }, + { "dmd0", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "dmd1", 7, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_cr1_32 = @@ -584,13 +584,13 @@ CGEN_KEYWORD m32c_cgen_opval_h_cr1_32 = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_cr2_32_entries[] = { - { "intb", 0, {0, {0}}, 0, 0 }, - { "sp", 1, {0, {0}}, 0, 0 }, - { "sb", 2, {0, {0}}, 0, 0 }, - { "fb", 3, {0, {0}}, 0, 0 }, - { "svp", 4, {0, {0}}, 0, 0 }, - { "vct", 5, {0, {0}}, 0, 0 }, - { "isp", 7, {0, {0}}, 0, 0 } + { "intb", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "sp", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "sb", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "fb", 3, {0, {{{0, 0}}}}, 0, 0 }, + { "svp", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "vct", 5, {0, {{{0, 0}}}}, 0, 0 }, + { "isp", 7, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_cr2_32 = @@ -602,12 +602,12 @@ CGEN_KEYWORD m32c_cgen_opval_h_cr2_32 = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_cr3_32_entries[] = { - { "dma0", 2, {0, {0}}, 0, 0 }, - { "dma1", 3, {0, {0}}, 0, 0 }, - { "dra0", 4, {0, {0}}, 0, 0 }, - { "dra1", 5, {0, {0}}, 0, 0 }, - { "dsa0", 6, {0, {0}}, 0, 0 }, - { "dsa1", 7, {0, {0}}, 0, 0 } + { "dma0", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "dma1", 3, {0, {{{0, 0}}}}, 0, 0 }, + { "dra0", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "dra1", 5, {0, {{{0, 0}}}}, 0, 0 }, + { "dsa0", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "dsa1", 7, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_cr3_32 = @@ -619,13 +619,13 @@ CGEN_KEYWORD m32c_cgen_opval_h_cr3_32 = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_cr_16_entries[] = { - { "intbl", 1, {0, {0}}, 0, 0 }, - { "intbh", 2, {0, {0}}, 0, 0 }, - { "flg", 3, {0, {0}}, 0, 0 }, - { "isp", 4, {0, {0}}, 0, 0 }, - { "sp", 5, {0, {0}}, 0, 0 }, - { "sb", 6, {0, {0}}, 0, 0 }, - { "fb", 7, {0, {0}}, 0, 0 } + { "intbl", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "intbh", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "flg", 3, {0, {{{0, 0}}}}, 0, 0 }, + { "isp", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "sp", 5, {0, {{{0, 0}}}}, 0, 0 }, + { "sb", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "fb", 7, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_cr_16 = @@ -637,14 +637,14 @@ CGEN_KEYWORD m32c_cgen_opval_h_cr_16 = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_flags_entries[] = { - { "c", 0, {0, {0}}, 0, 0 }, - { "d", 1, {0, {0}}, 0, 0 }, - { "z", 2, {0, {0}}, 0, 0 }, - { "s", 3, {0, {0}}, 0, 0 }, - { "b", 4, {0, {0}}, 0, 0 }, - { "o", 5, {0, {0}}, 0, 0 }, - { "i", 6, {0, {0}}, 0, 0 }, - { "u", 7, {0, {0}}, 0, 0 } + { "c", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "d", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "z", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "s", 3, {0, {{{0, 0}}}}, 0, 0 }, + { "b", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "o", 5, {0, {{{0, 0}}}}, 0, 0 }, + { "i", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "u", 7, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_flags = @@ -656,22 +656,22 @@ CGEN_KEYWORD m32c_cgen_opval_h_flags = static CGEN_KEYWORD_ENTRY m32c_cgen_opval_h_shimm_entries[] = { - { "1", 0, {0, {0}}, 0, 0 }, - { "2", 1, {0, {0}}, 0, 0 }, - { "3", 2, {0, {0}}, 0, 0 }, - { "4", 3, {0, {0}}, 0, 0 }, - { "5", 4, {0, {0}}, 0, 0 }, - { "6", 5, {0, {0}}, 0, 0 }, - { "7", 6, {0, {0}}, 0, 0 }, - { "8", 7, {0, {0}}, 0, 0 }, - { "-1", -8, {0, {0}}, 0, 0 }, - { "-2", -7, {0, {0}}, 0, 0 }, - { "-3", -6, {0, {0}}, 0, 0 }, - { "-4", -5, {0, {0}}, 0, 0 }, - { "-5", -4, {0, {0}}, 0, 0 }, - { "-6", -3, {0, {0}}, 0, 0 }, - { "-7", -2, {0, {0}}, 0, 0 }, - { "-8", -1, {0, {0}}, 0, 0 } + { "1", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "2", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "3", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "4", 3, {0, {{{0, 0}}}}, 0, 0 }, + { "5", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "6", 5, {0, {{{0, 0}}}}, 0, 0 }, + { "7", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "8", 7, {0, {{{0, 0}}}}, 0, 0 }, + { "-1", -8, {0, {{{0, 0}}}}, 0, 0 }, + { "-2", -7, {0, {{{0, 0}}}}, 0, 0 }, + { "-3", -6, {0, {{{0, 0}}}}, 0, 0 }, + { "-4", -5, {0, {{{0, 0}}}}, 0, 0 }, + { "-5", -4, {0, {{{0, 0}}}}, 0, 0 }, + { "-6", -3, {0, {{{0, 0}}}}, 0, 0 }, + { "-7", -2, {0, {{{0, 0}}}}, 0, 0 }, + { "-8", -1, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32c_cgen_opval_h_shimm = @@ -692,82 +692,82 @@ CGEN_KEYWORD m32c_cgen_opval_h_shimm = const CGEN_HW_ENTRY m32c_cgen_hw_table[] = { - { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { (1<isas; + CGEN_BITSET *isas = cd->isas; unsigned int machs = cd->machs; cd->int_insn_p = CGEN_INT_INSN_P; @@ -62400,7 +62798,7 @@ m32c_cgen_rebuild_tables (CGEN_CPU_TABLE *cd) cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */ cd->max_insn_bitsize = 0; for (i = 0; i < MAX_ISAS; ++i) - if (((1 << i) & isas) != 0) + if (cgen_bitset_contains (isas, i)) { const CGEN_ISA *isa = & m32c_cgen_isa_table[i]; @@ -62485,7 +62883,7 @@ m32c_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) { CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE)); static int init_p; - unsigned int isas = 0; /* 0 = "unspecified" */ + CGEN_BITSET *isas = 0; /* 0 = "unspecified" */ unsigned int machs = 0; /* 0 = "unspecified" */ enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN; va_list ap; @@ -62504,7 +62902,7 @@ m32c_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) switch (arg_type) { case CGEN_CPU_OPEN_ISAS : - isas = va_arg (ap, unsigned int); + isas = va_arg (ap, CGEN_BITSET *); break; case CGEN_CPU_OPEN_MACHS : machs = va_arg (ap, unsigned int); @@ -62535,9 +62933,6 @@ m32c_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) machs = (1 << MAX_MACHS) - 1; /* Base mach is always selected. */ machs |= 1; - /* ISA unspecified means "all". */ - if (isas == 0) - isas = (1 << MAX_ISAS) - 1; if (endian == CGEN_ENDIAN_UNKNOWN) { /* ??? If target has only one, could have a default. */ @@ -62545,7 +62940,7 @@ m32c_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) abort (); } - cd->isas = isas; + cd->isas = cgen_bitset_copy (isas); cd->machs = machs; cd->endian = endian; /* FIXME: for the sparc case we can determine insn-endianness statically. diff --git a/opcodes/m32c-desc.h b/opcodes/m32c-desc.h index ef275415933..3fa1db9e435 100644 --- a/opcodes/m32c-desc.h +++ b/opcodes/m32c-desc.h @@ -25,6 +25,8 @@ with this program; if not, write to the Free Software Foundation, Inc., #ifndef M32C_CPU_H #define M32C_CPU_H +#include "opcode/cgen-bitset.h" + #define CGEN_ARCH m32c /* Given symbol S, return m32c_cgen_. */ @@ -50,7 +52,7 @@ with this program; if not, write to the Free Software Foundation, Inc., #define CGEN_INT_INSN_P 0 /* Maximum number of syntax elements in an instruction. */ -#define CGEN_ACTUAL_MAX_SYNTAX_ELEMENTS 26 +#define CGEN_ACTUAL_MAX_SYNTAX_ELEMENTS 21 /* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands. e.g. In "b,a foo" the ",a" is an operand. If mnemonics have operands @@ -92,6 +94,16 @@ typedef enum cgen_ifld_attr { /* Number of non-boolean elements in cgen_ifld_attr. */ #define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1) +/* cgen_ifld attribute accessor macros. */ +#define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_IFLD_ISA_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_ISA-CGEN_IFLD_START_NBOOLS-1].bitset) +#define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_PCREL_ADDR)) != 0) +#define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_ABS_ADDR)) != 0) +#define CGEN_ATTR_CGEN_IFLD_RESERVED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_RESERVED)) != 0) +#define CGEN_ATTR_CGEN_IFLD_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGN_OPT)) != 0) +#define CGEN_ATTR_CGEN_IFLD_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGNED)) != 0) + /* Enum declaration for m32c ifield types. */ typedef enum ifield_type { M32C_F_NIL, M32C_F_ANYOF, M32C_F_0_1, M32C_F_0_2 @@ -122,18 +134,18 @@ typedef enum ifield_type { , M32C_F_DSP_64_U8, M32C_F_DSP_64_S8, M32C_F_DSP_8_U16, M32C_F_DSP_8_S16 , M32C_F_DSP_16_U16, M32C_F_DSP_16_S16, M32C_F_DSP_24_U16, M32C_F_DSP_24_S16 , M32C_F_DSP_32_U16, M32C_F_DSP_32_S16, M32C_F_DSP_40_U16, M32C_F_DSP_40_S16 - , M32C_F_DSP_48_U16, M32C_F_DSP_48_S16, M32C_F_DSP_64_U16, M32C_F_DSP_8_U24 - , M32C_F_DSP_16_U24, M32C_F_DSP_24_U24, M32C_F_DSP_32_U24, M32C_F_DSP_40_U24 - , M32C_F_DSP_40_S32, M32C_F_DSP_48_U24, M32C_F_DSP_16_S32, M32C_F_DSP_24_S32 - , M32C_F_DSP_32_S32, M32C_F_DSP_48_U32, M32C_F_DSP_48_S32, M32C_F_DSP_56_S16 - , M32C_F_DSP_64_S16, M32C_F_BITNO16_S, M32C_F_BITNO32_PREFIXED, M32C_F_BITNO32_UNPREFIXED - , M32C_F_BITBASE16_U11_S, M32C_F_BITBASE32_16_U11_UNPREFIXED, M32C_F_BITBASE32_16_S11_UNPREFIXED, M32C_F_BITBASE32_16_U19_UNPREFIXED - , M32C_F_BITBASE32_16_S19_UNPREFIXED, M32C_F_BITBASE32_16_U27_UNPREFIXED, M32C_F_BITBASE32_24_U11_PREFIXED, M32C_F_BITBASE32_24_S11_PREFIXED - , M32C_F_BITBASE32_24_U19_PREFIXED, M32C_F_BITBASE32_24_S19_PREFIXED, M32C_F_BITBASE32_24_U27_PREFIXED, M32C_F_LAB_5_3 - , M32C_F_LAB32_JMP_S, M32C_F_LAB_8_8, M32C_F_LAB_8_16, M32C_F_LAB_8_24 - , M32C_F_LAB_16_8, M32C_F_LAB_24_8, M32C_F_LAB_32_8, M32C_F_LAB_40_8 - , M32C_F_COND16, M32C_F_COND16J_5, M32C_F_COND32, M32C_F_COND32J - , M32C_F_MAX + , M32C_F_DSP_48_U16, M32C_F_DSP_48_S16, M32C_F_DSP_64_U16, M32C_F_DSP_8_S24 + , M32C_F_DSP_8_U24, M32C_F_DSP_16_U24, M32C_F_DSP_24_U24, M32C_F_DSP_32_U24 + , M32C_F_DSP_40_U24, M32C_F_DSP_40_S32, M32C_F_DSP_48_U24, M32C_F_DSP_16_S32 + , M32C_F_DSP_24_S32, M32C_F_DSP_32_S32, M32C_F_DSP_48_U32, M32C_F_DSP_48_S32 + , M32C_F_DSP_56_S16, M32C_F_DSP_64_S16, M32C_F_BITNO16_S, M32C_F_BITNO32_PREFIXED + , M32C_F_BITNO32_UNPREFIXED, M32C_F_BITBASE16_U11_S, M32C_F_BITBASE32_16_U11_UNPREFIXED, M32C_F_BITBASE32_16_S11_UNPREFIXED + , M32C_F_BITBASE32_16_U19_UNPREFIXED, M32C_F_BITBASE32_16_S19_UNPREFIXED, M32C_F_BITBASE32_16_U27_UNPREFIXED, M32C_F_BITBASE32_24_U11_PREFIXED + , M32C_F_BITBASE32_24_S11_PREFIXED, M32C_F_BITBASE32_24_U19_PREFIXED, M32C_F_BITBASE32_24_S19_PREFIXED, M32C_F_BITBASE32_24_U27_PREFIXED + , M32C_F_LAB_5_3, M32C_F_LAB32_JMP_S, M32C_F_LAB_8_8, M32C_F_LAB_8_16 + , M32C_F_LAB_8_24, M32C_F_LAB_16_8, M32C_F_LAB_24_8, M32C_F_LAB_32_8 + , M32C_F_LAB_40_8, M32C_F_COND16, M32C_F_COND16J_5, M32C_F_COND32 + , M32C_F_COND32J, M32C_F_MAX } IFIELD_TYPE; #define MAX_IFLD ((int) M32C_F_MAX) @@ -150,6 +162,14 @@ typedef enum cgen_hw_attr { /* Number of non-boolean elements in cgen_hw_attr. */ #define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1) +/* cgen_hw attribute accessor macros. */ +#define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_HW_ISA_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_ISA-CGEN_HW_START_NBOOLS-1].bitset) +#define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_CACHE_ADDR)) != 0) +#define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PC)) != 0) +#define CGEN_ATTR_CGEN_HW_PROFILE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PROFILE)) != 0) + /* Enum declaration for m32c hardware types. */ typedef enum cgen_hw_type { HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR @@ -188,6 +208,18 @@ typedef enum cgen_operand_attr { /* Number of non-boolean elements in cgen_operand_attr. */ #define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1) +/* cgen_operand attribute accessor macros. */ +#define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_OPERAND_ISA_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_ISA-CGEN_OPERAND_START_NBOOLS-1].bitset) +#define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_ABS_ADDR)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGN_OPT)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGNED)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_NEGATIVE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_NEGATIVE)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_RELAX)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SEM_ONLY)) != 0) + /* Enum declaration for m32c operand types. */ typedef enum cgen_operand_type { M32C_OPERAND_PC, M32C_OPERAND_SRC16RNQI, M32C_OPERAND_SRC16RNHI, M32C_OPERAND_SRC32RNUNPREFIXEDQI @@ -209,209 +241,210 @@ typedef enum cgen_operand_type { , M32C_OPERAND_BIT32ANUNPREFIXED, M32C_OPERAND_A0, M32C_OPERAND_A1, M32C_OPERAND_SB , M32C_OPERAND_FB, M32C_OPERAND_SP, M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL, M32C_OPERAND_REGSETPOP , M32C_OPERAND_REGSETPUSH, M32C_OPERAND_RN16_PUSH_S, M32C_OPERAND_AN16_PUSH_S, M32C_OPERAND_DSP_8_U6 - , M32C_OPERAND_DSP_8_U8, M32C_OPERAND_DSP_8_U16, M32C_OPERAND_DSP_8_S8, M32C_OPERAND_DSP_8_U24 - , M32C_OPERAND_DSP_10_U6, M32C_OPERAND_DSP_16_U8, M32C_OPERAND_DSP_16_U16, M32C_OPERAND_DSP_16_U20 - , M32C_OPERAND_DSP_16_U24, M32C_OPERAND_DSP_16_S8, M32C_OPERAND_DSP_16_S16, M32C_OPERAND_DSP_24_U8 - , M32C_OPERAND_DSP_24_U16, M32C_OPERAND_DSP_24_U20, M32C_OPERAND_DSP_24_U24, M32C_OPERAND_DSP_24_S8 - , M32C_OPERAND_DSP_24_S16, M32C_OPERAND_DSP_32_U8, M32C_OPERAND_DSP_32_U16, M32C_OPERAND_DSP_32_U24 - , M32C_OPERAND_DSP_32_U20, M32C_OPERAND_DSP_32_S8, M32C_OPERAND_DSP_32_S16, M32C_OPERAND_DSP_40_U8 - , M32C_OPERAND_DSP_40_S8, M32C_OPERAND_DSP_40_U16, M32C_OPERAND_DSP_40_S16, M32C_OPERAND_DSP_40_U24 - , M32C_OPERAND_DSP_48_U8, M32C_OPERAND_DSP_48_S8, M32C_OPERAND_DSP_48_U16, M32C_OPERAND_DSP_48_S16 - , M32C_OPERAND_DSP_48_U24, M32C_OPERAND_IMM_8_S4, M32C_OPERAND_IMM_SH_8_S4, M32C_OPERAND_IMM_8_QI - , M32C_OPERAND_IMM_8_HI, M32C_OPERAND_IMM_12_S4, M32C_OPERAND_IMM_SH_12_S4, M32C_OPERAND_IMM_13_U3 - , M32C_OPERAND_IMM_20_S4, M32C_OPERAND_IMM_SH_20_S4, M32C_OPERAND_IMM_16_QI, M32C_OPERAND_IMM_16_HI - , M32C_OPERAND_IMM_16_SI, M32C_OPERAND_IMM_24_QI, M32C_OPERAND_IMM_24_HI, M32C_OPERAND_IMM_24_SI - , M32C_OPERAND_IMM_32_QI, M32C_OPERAND_IMM_32_SI, M32C_OPERAND_IMM_32_HI, M32C_OPERAND_IMM_40_QI - , M32C_OPERAND_IMM_40_HI, M32C_OPERAND_IMM_40_SI, M32C_OPERAND_IMM_48_QI, M32C_OPERAND_IMM_48_HI - , M32C_OPERAND_IMM_48_SI, M32C_OPERAND_IMM_56_QI, M32C_OPERAND_IMM_56_HI, M32C_OPERAND_IMM_64_HI - , M32C_OPERAND_IMM1_S, M32C_OPERAND_IMM3_S, M32C_OPERAND_BITNO16R, M32C_OPERAND_BITNO32PREFIXED - , M32C_OPERAND_BITNO32UNPREFIXED, M32C_OPERAND_BITBASE16_16_U8, M32C_OPERAND_BITBASE16_16_S8, M32C_OPERAND_BITBASE16_16_U16 - , M32C_OPERAND_BITBASE16_8_U11_S, M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED, M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED, M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED - , M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED, M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED, M32C_OPERAND_BITBASE32_24_U11_PREFIXED, M32C_OPERAND_BITBASE32_24_S11_PREFIXED - , M32C_OPERAND_BITBASE32_24_U19_PREFIXED, M32C_OPERAND_BITBASE32_24_S19_PREFIXED, M32C_OPERAND_BITBASE32_24_U27_PREFIXED, M32C_OPERAND_LAB_5_3 - , M32C_OPERAND_LAB32_JMP_S, M32C_OPERAND_LAB_8_8, M32C_OPERAND_LAB_8_16, M32C_OPERAND_LAB_8_24 - , M32C_OPERAND_LAB_16_8, M32C_OPERAND_LAB_24_8, M32C_OPERAND_LAB_32_8, M32C_OPERAND_LAB_40_8 - , M32C_OPERAND_SBIT, M32C_OPERAND_OBIT, M32C_OPERAND_ZBIT, M32C_OPERAND_CBIT - , M32C_OPERAND_UBIT, M32C_OPERAND_IBIT, M32C_OPERAND_BBIT, M32C_OPERAND_DBIT - , M32C_OPERAND_COND16_16, M32C_OPERAND_COND16_24, M32C_OPERAND_COND16_32, M32C_OPERAND_COND32_16 - , M32C_OPERAND_COND32_24, M32C_OPERAND_COND32_32, M32C_OPERAND_COND32_40, M32C_OPERAND_COND16C - , M32C_OPERAND_COND16J, M32C_OPERAND_COND16J5, M32C_OPERAND_COND32, M32C_OPERAND_COND32J - , M32C_OPERAND_SCCOND32, M32C_OPERAND_FLAGS16, M32C_OPERAND_FLAGS32, M32C_OPERAND_CR16 - , M32C_OPERAND_CR1_UNPREFIXED_32, M32C_OPERAND_CR1_PREFIXED_32, M32C_OPERAND_CR2_32, M32C_OPERAND_CR3_UNPREFIXED_32 - , M32C_OPERAND_CR3_PREFIXED_32, M32C_OPERAND_Z, M32C_OPERAND_S, M32C_OPERAND_Q - , M32C_OPERAND_G, M32C_OPERAND_X, M32C_OPERAND_SIZE, M32C_OPERAND_BITINDEX - , M32C_OPERAND_SRCINDEX, M32C_OPERAND_DSTINDEX, M32C_OPERAND_NOREMAINDER, M32C_OPERAND_SRC16_RN_DIRECT_QI - , M32C_OPERAND_SRC16_RN_DIRECT_HI, M32C_OPERAND_SRC32_RN_DIRECT_UNPREFIXED_QI, M32C_OPERAND_SRC32_RN_DIRECT_PREFIXED_QI, M32C_OPERAND_SRC32_RN_DIRECT_UNPREFIXED_HI - , M32C_OPERAND_SRC32_RN_DIRECT_PREFIXED_HI, M32C_OPERAND_SRC32_RN_DIRECT_UNPREFIXED_SI, M32C_OPERAND_SRC32_RN_DIRECT_PREFIXED_SI, M32C_OPERAND_SRC16_AN_DIRECT_QI - , M32C_OPERAND_SRC16_AN_DIRECT_HI, M32C_OPERAND_SRC32_AN_DIRECT_UNPREFIXED_QI, M32C_OPERAND_SRC32_AN_DIRECT_UNPREFIXED_HI, M32C_OPERAND_SRC32_AN_DIRECT_UNPREFIXED_SI - , M32C_OPERAND_SRC32_AN_DIRECT_PREFIXED_QI, M32C_OPERAND_SRC32_AN_DIRECT_PREFIXED_HI, M32C_OPERAND_SRC32_AN_DIRECT_PREFIXED_SI, M32C_OPERAND_SRC16_AN_INDIRECT_QI - , M32C_OPERAND_SRC16_AN_INDIRECT_HI, M32C_OPERAND_SRC32_AN_INDIRECT_UNPREFIXED_QI, M32C_OPERAND_SRC32_AN_INDIRECT_UNPREFIXED_HI, M32C_OPERAND_SRC32_AN_INDIRECT_UNPREFIXED_SI - , M32C_OPERAND_SRC32_AN_INDIRECT_PREFIXED_QI, M32C_OPERAND_SRC32_AN_INDIRECT_PREFIXED_HI, M32C_OPERAND_SRC32_AN_INDIRECT_PREFIXED_SI, M32C_OPERAND_SRC16_16_8_SB_RELATIVE_QI - , M32C_OPERAND_SRC16_16_16_SB_RELATIVE_QI, M32C_OPERAND_SRC16_16_8_FB_RELATIVE_QI, M32C_OPERAND_SRC16_16_8_AN_RELATIVE_QI, M32C_OPERAND_SRC16_16_16_AN_RELATIVE_QI - , M32C_OPERAND_SRC16_16_8_SB_RELATIVE_HI, M32C_OPERAND_SRC16_16_16_SB_RELATIVE_HI, M32C_OPERAND_SRC16_16_8_FB_RELATIVE_HI, M32C_OPERAND_SRC16_16_8_AN_RELATIVE_HI - , M32C_OPERAND_SRC16_16_16_AN_RELATIVE_HI, M32C_OPERAND_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI - , M32C_OPERAND_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI - , M32C_OPERAND_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI - , M32C_OPERAND_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI - , M32C_OPERAND_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI - , M32C_OPERAND_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_24_8_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_16_SB_RELATIVE_PREFIXED_QI - , M32C_OPERAND_SRC32_24_8_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_16_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_8_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_16_AN_RELATIVE_PREFIXED_QI - , M32C_OPERAND_SRC32_24_24_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_8_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_8_FB_RELATIVE_PREFIXED_HI - , M32C_OPERAND_SRC32_24_16_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_8_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_24_AN_RELATIVE_PREFIXED_HI - , M32C_OPERAND_SRC32_24_8_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_16_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_8_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_16_FB_RELATIVE_PREFIXED_SI - , M32C_OPERAND_SRC32_24_8_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_16_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_24_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC16_16_16_ABSOLUTE_QI - , M32C_OPERAND_SRC16_16_16_ABSOLUTE_HI, M32C_OPERAND_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI - , M32C_OPERAND_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_SRC32_24_16_ABSOLUTE_PREFIXED_QI - , M32C_OPERAND_SRC32_24_24_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_SRC32_24_16_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_SRC32_24_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_ABSOLUTE_PREFIXED_SI - , M32C_OPERAND_SRC32_24_24_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_SRC16_2_S_8_SB_RELATIVE_QI, M32C_OPERAND_SRC16_2_S_8_FB_RELATIVE_QI, M32C_OPERAND_SRC16_2_S_16_ABSOLUTE_QI - , M32C_OPERAND_SRC32_2_S_8_SB_RELATIVE_QI, M32C_OPERAND_SRC32_2_S_8_FB_RELATIVE_QI, M32C_OPERAND_SRC32_2_S_16_ABSOLUTE_QI, M32C_OPERAND_SRC32_2_S_8_SB_RELATIVE_HI - , M32C_OPERAND_SRC32_2_S_8_FB_RELATIVE_HI, M32C_OPERAND_SRC32_2_S_16_ABSOLUTE_HI, M32C_OPERAND_DST16_RN_DIRECT_QI, M32C_OPERAND_DST16_RN_DIRECT_HI - , M32C_OPERAND_DST16_RN_DIRECT_SI, M32C_OPERAND_DST16_RN_DIRECT_EXT_QI, M32C_OPERAND_DST32_RN_DIRECT_UNPREFIXED_QI, M32C_OPERAND_DST32_RN_DIRECT_PREFIXED_QI - , M32C_OPERAND_DST32_RN_DIRECT_UNPREFIXED_HI, M32C_OPERAND_DST32_RN_DIRECT_PREFIXED_HI, M32C_OPERAND_DST32_RN_DIRECT_UNPREFIXED_SI, M32C_OPERAND_DST32_RN_DIRECT_PREFIXED_SI - , M32C_OPERAND_DST32_RN_DIRECT_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_RN_DIRECT_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_R3_DIRECT_UNPREFIXED_HI, M32C_OPERAND_DST16_AN_DIRECT_QI - , M32C_OPERAND_DST16_AN_DIRECT_HI, M32C_OPERAND_DST16_AN_DIRECT_SI, M32C_OPERAND_DST32_AN_DIRECT_UNPREFIXED_QI, M32C_OPERAND_DST32_AN_DIRECT_PREFIXED_QI - , M32C_OPERAND_DST32_AN_DIRECT_UNPREFIXED_HI, M32C_OPERAND_DST32_AN_DIRECT_PREFIXED_HI, M32C_OPERAND_DST32_AN_DIRECT_UNPREFIXED_SI, M32C_OPERAND_DST32_AN_DIRECT_PREFIXED_SI - , M32C_OPERAND_DST16_AN_INDIRECT_QI, M32C_OPERAND_DST16_AN_INDIRECT_HI, M32C_OPERAND_DST16_AN_INDIRECT_SI, M32C_OPERAND_DST16_AN_INDIRECT_EXT_QI - , M32C_OPERAND_DST32_AN_INDIRECT_UNPREFIXED_QI, M32C_OPERAND_DST32_AN_INDIRECT_PREFIXED_QI, M32C_OPERAND_DST32_AN_INDIRECT_UNPREFIXED_HI, M32C_OPERAND_DST32_AN_INDIRECT_PREFIXED_HI - , M32C_OPERAND_DST32_AN_INDIRECT_UNPREFIXED_SI, M32C_OPERAND_DST32_AN_INDIRECT_PREFIXED_SI, M32C_OPERAND_DST32_AN_INDIRECT_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_AN_INDIRECT_EXTUNPREFIXED_HI - , M32C_OPERAND_DST16_16_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_16_16_SB_RELATIVE_QI, M32C_OPERAND_DST16_16_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_16_8_AN_RELATIVE_QI - , M32C_OPERAND_DST16_16_16_AN_RELATIVE_QI, M32C_OPERAND_DST16_24_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_24_16_SB_RELATIVE_QI, M32C_OPERAND_DST16_24_8_FB_RELATIVE_QI - , M32C_OPERAND_DST16_24_8_AN_RELATIVE_QI, M32C_OPERAND_DST16_24_16_AN_RELATIVE_QI, M32C_OPERAND_DST16_32_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_32_16_SB_RELATIVE_QI - , M32C_OPERAND_DST16_32_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_32_8_AN_RELATIVE_QI, M32C_OPERAND_DST16_32_16_AN_RELATIVE_QI, M32C_OPERAND_DST16_40_8_SB_RELATIVE_QI - , M32C_OPERAND_DST16_40_16_SB_RELATIVE_QI, M32C_OPERAND_DST16_40_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_40_8_AN_RELATIVE_QI, M32C_OPERAND_DST16_40_16_AN_RELATIVE_QI - , M32C_OPERAND_DST16_48_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_48_16_SB_RELATIVE_QI, M32C_OPERAND_DST16_48_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_48_8_AN_RELATIVE_QI - , M32C_OPERAND_DST16_48_16_AN_RELATIVE_QI, M32C_OPERAND_DST16_16_8_SB_RELATIVE_HI, M32C_OPERAND_DST16_16_16_SB_RELATIVE_HI, M32C_OPERAND_DST16_16_8_FB_RELATIVE_HI - , M32C_OPERAND_DST16_16_8_AN_RELATIVE_HI, M32C_OPERAND_DST16_16_16_AN_RELATIVE_HI, M32C_OPERAND_DST16_24_8_SB_RELATIVE_HI, M32C_OPERAND_DST16_24_16_SB_RELATIVE_HI - , M32C_OPERAND_DST16_24_8_FB_RELATIVE_HI, M32C_OPERAND_DST16_24_8_AN_RELATIVE_HI, M32C_OPERAND_DST16_24_16_AN_RELATIVE_HI, M32C_OPERAND_DST16_32_8_SB_RELATIVE_HI - , M32C_OPERAND_DST16_32_16_SB_RELATIVE_HI, M32C_OPERAND_DST16_32_8_FB_RELATIVE_HI, M32C_OPERAND_DST16_32_8_AN_RELATIVE_HI, M32C_OPERAND_DST16_32_16_AN_RELATIVE_HI - , M32C_OPERAND_DST16_40_8_SB_RELATIVE_HI, M32C_OPERAND_DST16_40_16_SB_RELATIVE_HI, M32C_OPERAND_DST16_40_8_FB_RELATIVE_HI, M32C_OPERAND_DST16_40_8_AN_RELATIVE_HI - , M32C_OPERAND_DST16_40_16_AN_RELATIVE_HI, M32C_OPERAND_DST16_48_8_SB_RELATIVE_HI, M32C_OPERAND_DST16_48_16_SB_RELATIVE_HI, M32C_OPERAND_DST16_48_8_FB_RELATIVE_HI - , M32C_OPERAND_DST16_48_8_AN_RELATIVE_HI, M32C_OPERAND_DST16_48_16_AN_RELATIVE_HI, M32C_OPERAND_DST16_16_8_SB_RELATIVE_SI, M32C_OPERAND_DST16_16_16_SB_RELATIVE_SI - , M32C_OPERAND_DST16_16_8_FB_RELATIVE_SI, M32C_OPERAND_DST16_16_8_AN_RELATIVE_SI, M32C_OPERAND_DST16_16_16_AN_RELATIVE_SI, M32C_OPERAND_DST16_24_8_SB_RELATIVE_SI - , M32C_OPERAND_DST16_24_16_SB_RELATIVE_SI, M32C_OPERAND_DST16_24_8_FB_RELATIVE_SI, M32C_OPERAND_DST16_24_8_AN_RELATIVE_SI, M32C_OPERAND_DST16_24_16_AN_RELATIVE_SI - , M32C_OPERAND_DST16_32_8_SB_RELATIVE_SI, M32C_OPERAND_DST16_32_16_SB_RELATIVE_SI, M32C_OPERAND_DST16_32_8_FB_RELATIVE_SI, M32C_OPERAND_DST16_32_8_AN_RELATIVE_SI - , M32C_OPERAND_DST16_32_16_AN_RELATIVE_SI, M32C_OPERAND_DST16_40_8_SB_RELATIVE_SI, M32C_OPERAND_DST16_40_16_SB_RELATIVE_SI, M32C_OPERAND_DST16_40_8_FB_RELATIVE_SI - , M32C_OPERAND_DST16_40_8_AN_RELATIVE_SI, M32C_OPERAND_DST16_40_16_AN_RELATIVE_SI, M32C_OPERAND_DST16_48_8_SB_RELATIVE_SI, M32C_OPERAND_DST16_48_16_SB_RELATIVE_SI - , M32C_OPERAND_DST16_48_8_FB_RELATIVE_SI, M32C_OPERAND_DST16_48_8_AN_RELATIVE_SI, M32C_OPERAND_DST16_48_16_AN_RELATIVE_SI, M32C_OPERAND_DST16_16_8_SB_RELATIVE_EXT_QI - , M32C_OPERAND_DST16_16_16_SB_RELATIVE_EXT_QI, M32C_OPERAND_DST16_16_8_FB_RELATIVE_EXT_QI, M32C_OPERAND_DST16_16_8_AN_RELATIVE_EXT_QI, M32C_OPERAND_DST16_16_16_AN_RELATIVE_EXT_QI - , M32C_OPERAND_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI - , M32C_OPERAND_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI - , M32C_OPERAND_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI - , M32C_OPERAND_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI - , M32C_OPERAND_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI - , M32C_OPERAND_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI - , M32C_OPERAND_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI - , M32C_OPERAND_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI - , M32C_OPERAND_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI - , M32C_OPERAND_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI - , M32C_OPERAND_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI - , M32C_OPERAND_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI - , M32C_OPERAND_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI - , M32C_OPERAND_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI - , M32C_OPERAND_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI - , M32C_OPERAND_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI - , M32C_OPERAND_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI - , M32C_OPERAND_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI - , M32C_OPERAND_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI - , M32C_OPERAND_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_UNPREFIXED_SI - , M32C_OPERAND_DST32_40_16_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_UNPREFIXED_SI - , M32C_OPERAND_DST32_24_8_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_16_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_PREFIXED_QI - , M32C_OPERAND_DST32_24_8_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_16_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_PREFIXED_QI - , M32C_OPERAND_DST32_32_16_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_8_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_PREFIXED_QI - , M32C_OPERAND_DST32_32_16_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_24_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_PREFIXED_QI - , M32C_OPERAND_DST32_40_8_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_16_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_PREFIXED_QI - , M32C_OPERAND_DST32_40_24_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_8_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_16_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_8_FB_RELATIVE_PREFIXED_QI - , M32C_OPERAND_DST32_48_16_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_8_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_16_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_24_AN_RELATIVE_PREFIXED_QI - , M32C_OPERAND_DST32_24_8_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_16_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_PREFIXED_HI - , M32C_OPERAND_DST32_24_8_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_16_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_PREFIXED_HI - , M32C_OPERAND_DST32_32_16_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_8_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_PREFIXED_HI - , M32C_OPERAND_DST32_32_16_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_24_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_PREFIXED_HI - , M32C_OPERAND_DST32_40_8_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_16_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_PREFIXED_HI - , M32C_OPERAND_DST32_40_24_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_8_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_16_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_8_FB_RELATIVE_PREFIXED_HI - , M32C_OPERAND_DST32_48_16_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_8_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_16_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_24_AN_RELATIVE_PREFIXED_HI - , M32C_OPERAND_DST32_24_8_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_16_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_PREFIXED_SI - , M32C_OPERAND_DST32_24_8_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_16_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_PREFIXED_SI - , M32C_OPERAND_DST32_32_16_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_8_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_PREFIXED_SI - , M32C_OPERAND_DST32_32_16_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_24_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_PREFIXED_SI - , M32C_OPERAND_DST32_40_8_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_16_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_PREFIXED_SI - , M32C_OPERAND_DST32_40_24_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_8_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_16_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_8_FB_RELATIVE_PREFIXED_SI - , M32C_OPERAND_DST32_48_16_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_8_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_16_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_24_AN_RELATIVE_PREFIXED_SI - , M32C_OPERAND_DST32_16_8_SB_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_16_SB_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_EXTUNPREFIXED_QI - , M32C_OPERAND_DST32_16_8_AN_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_16_AN_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_EXTUNPREFIXED_HI - , M32C_OPERAND_DST32_16_16_SB_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_EXTUNPREFIXED_HI - , M32C_OPERAND_DST32_16_16_AN_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST16_16_16_ABSOLUTE_QI, M32C_OPERAND_DST16_24_16_ABSOLUTE_QI - , M32C_OPERAND_DST16_32_16_ABSOLUTE_QI, M32C_OPERAND_DST16_40_16_ABSOLUTE_QI, M32C_OPERAND_DST16_48_16_ABSOLUTE_QI, M32C_OPERAND_DST16_16_16_ABSOLUTE_HI - , M32C_OPERAND_DST16_24_16_ABSOLUTE_HI, M32C_OPERAND_DST16_32_16_ABSOLUTE_HI, M32C_OPERAND_DST16_40_16_ABSOLUTE_HI, M32C_OPERAND_DST16_48_16_ABSOLUTE_HI - , M32C_OPERAND_DST16_16_16_ABSOLUTE_SI, M32C_OPERAND_DST16_24_16_ABSOLUTE_SI, M32C_OPERAND_DST16_32_16_ABSOLUTE_SI, M32C_OPERAND_DST16_40_16_ABSOLUTE_SI - , M32C_OPERAND_DST16_48_16_ABSOLUTE_SI, M32C_OPERAND_DST16_16_16_ABSOLUTE_EXT_QI, M32C_OPERAND_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_24_ABSOLUTE_UNPREFIXED_QI - , M32C_OPERAND_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_24_ABSOLUTE_UNPREFIXED_QI - , M32C_OPERAND_DST32_40_16_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_24_ABSOLUTE_UNPREFIXED_HI - , M32C_OPERAND_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_24_ABSOLUTE_UNPREFIXED_HI - , M32C_OPERAND_DST32_40_16_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_24_ABSOLUTE_UNPREFIXED_SI - , M32C_OPERAND_DST32_24_16_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_24_ABSOLUTE_UNPREFIXED_SI - , M32C_OPERAND_DST32_40_16_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_16_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_24_24_ABSOLUTE_PREFIXED_QI - , M32C_OPERAND_DST32_32_16_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_32_24_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_40_16_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_40_24_ABSOLUTE_PREFIXED_QI - , M32C_OPERAND_DST32_48_16_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_48_24_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_24_16_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_24_24_ABSOLUTE_PREFIXED_HI - , M32C_OPERAND_DST32_32_16_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_32_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_40_16_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_40_24_ABSOLUTE_PREFIXED_HI - , M32C_OPERAND_DST32_48_16_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_48_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_24_16_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_24_24_ABSOLUTE_PREFIXED_SI - , M32C_OPERAND_DST32_32_16_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_32_24_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_40_16_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_40_24_ABSOLUTE_PREFIXED_SI - , M32C_OPERAND_DST32_48_16_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_48_24_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_16_16_ABSOLUTE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_24_ABSOLUTE_EXTUNPREFIXED_QI - , M32C_OPERAND_DST32_16_16_ABSOLUTE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_24_ABSOLUTE_EXTUNPREFIXED_HI, M32C_OPERAND_BIT16_RN_DIRECT, M32C_OPERAND_BIT32_RN_DIRECT_UNPREFIXED - , M32C_OPERAND_BIT32_RN_DIRECT_PREFIXED, M32C_OPERAND_BIT16_AN_DIRECT, M32C_OPERAND_BIT32_AN_DIRECT_UNPREFIXED, M32C_OPERAND_BIT32_AN_DIRECT_PREFIXED - , M32C_OPERAND_BIT16_AN_INDIRECT, M32C_OPERAND_BIT32_AN_INDIRECT_UNPREFIXED, M32C_OPERAND_BIT32_AN_INDIRECT_PREFIXED, M32C_OPERAND_BIT16_16_8_SB_RELATIVE - , M32C_OPERAND_BIT16_16_16_SB_RELATIVE, M32C_OPERAND_BIT16_16_8_FB_RELATIVE, M32C_OPERAND_BIT16_16_8_AN_RELATIVE, M32C_OPERAND_BIT16_16_16_AN_RELATIVE - , M32C_OPERAND_BIT32_16_11_SB_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_19_SB_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_11_FB_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_19_FB_RELATIVE_UNPREFIXED - , M32C_OPERAND_BIT32_16_11_AN_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_19_AN_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_27_AN_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_24_11_SB_RELATIVE_PREFIXED - , M32C_OPERAND_BIT32_24_19_SB_RELATIVE_PREFIXED, M32C_OPERAND_BIT32_24_11_FB_RELATIVE_PREFIXED, M32C_OPERAND_BIT32_24_19_FB_RELATIVE_PREFIXED, M32C_OPERAND_BIT32_24_11_AN_RELATIVE_PREFIXED - , M32C_OPERAND_BIT32_24_19_AN_RELATIVE_PREFIXED, M32C_OPERAND_BIT32_24_27_AN_RELATIVE_PREFIXED, M32C_OPERAND_BIT16_11_SB_RELATIVE_S, M32C_OPERAND_RN16_PUSH_S_DERIVED - , M32C_OPERAND_AN16_PUSH_S_DERIVED, M32C_OPERAND_BIT16_16_16_ABSOLUTE, M32C_OPERAND_BIT32_16_19_ABSOLUTE_UNPREFIXED, M32C_OPERAND_BIT32_16_27_ABSOLUTE_UNPREFIXED - , M32C_OPERAND_BIT32_24_19_ABSOLUTE_PREFIXED, M32C_OPERAND_BIT32_24_27_ABSOLUTE_PREFIXED, M32C_OPERAND_DST16_3_S_R0L_DIRECT_QI, M32C_OPERAND_DST16_3_S_R0H_DIRECT_QI - , M32C_OPERAND_DST16_3_S_8_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_3_S_8_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_3_S_8_16_ABSOLUTE_QI, M32C_OPERAND_DST16_3_S_16_8_SB_RELATIVE_QI - , M32C_OPERAND_DST16_3_S_16_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_3_S_16_16_ABSOLUTE_QI, M32C_OPERAND_SRCDST16_R0L_R0H_S_DERIVED, M32C_OPERAND_DST32_2_S_R0L_DIRECT_QI - , M32C_OPERAND_DST32_2_S_R0_DIRECT_HI, M32C_OPERAND_DST32_1_S_A0_DIRECT_HI, M32C_OPERAND_DST32_1_S_A1_DIRECT_HI, M32C_OPERAND_DST32_2_S_8_SB_RELATIVE_QI - , M32C_OPERAND_DST32_2_S_8_FB_RELATIVE_QI, M32C_OPERAND_DST32_2_S_16_ABSOLUTE_QI, M32C_OPERAND_DST32_2_S_8_SB_RELATIVE_HI, M32C_OPERAND_DST32_2_S_8_FB_RELATIVE_HI - , M32C_OPERAND_DST32_2_S_16_ABSOLUTE_HI, M32C_OPERAND_DST32_2_S_8_SB_RELATIVE_SI, M32C_OPERAND_DST32_2_S_8_FB_RELATIVE_SI, M32C_OPERAND_DST32_2_S_16_ABSOLUTE_SI - , M32C_OPERAND_SRC16_BASIC_QI, M32C_OPERAND_SRC16_BASIC_HI, M32C_OPERAND_SRC32_BASIC_UNPREFIXED_QI, M32C_OPERAND_SRC32_BASIC_PREFIXED_QI - , M32C_OPERAND_SRC32_BASIC_UNPREFIXED_HI, M32C_OPERAND_SRC32_BASIC_PREFIXED_HI, M32C_OPERAND_SRC32_BASIC_UNPREFIXED_SI, M32C_OPERAND_SRC32_BASIC_PREFIXED_SI - , M32C_OPERAND_SRC32_BASIC_EXTPREFIXED_QI, M32C_OPERAND_SRC16_16_8_QI, M32C_OPERAND_SRC16_16_16_QI, M32C_OPERAND_SRC16_16_8_HI - , M32C_OPERAND_SRC16_16_16_HI, M32C_OPERAND_SRC32_16_8_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_24_UNPREFIXED_QI - , M32C_OPERAND_SRC32_16_8_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_16_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_24_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_8_UNPREFIXED_SI - , M32C_OPERAND_SRC32_16_16_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_24_UNPREFIXED_SI, M32C_OPERAND_SRC32_24_8_PREFIXED_QI, M32C_OPERAND_SRC32_24_16_PREFIXED_QI - , M32C_OPERAND_SRC32_24_24_PREFIXED_QI, M32C_OPERAND_SRC32_24_8_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_PREFIXED_HI, M32C_OPERAND_SRC32_24_24_PREFIXED_HI - , M32C_OPERAND_SRC32_24_8_PREFIXED_SI, M32C_OPERAND_SRC32_24_16_PREFIXED_SI, M32C_OPERAND_SRC32_24_24_PREFIXED_SI, M32C_OPERAND_DST16_BASIC_QI - , M32C_OPERAND_DST16_BASIC_HI, M32C_OPERAND_DST16_BASIC_SI, M32C_OPERAND_DST32_BASIC_UNPREFIXED_QI, M32C_OPERAND_DST32_BASIC_PREFIXED_QI - , M32C_OPERAND_DST32_BASIC_UNPREFIXED_HI, M32C_OPERAND_DST32_BASIC_PREFIXED_HI, M32C_OPERAND_DST32_BASIC_UNPREFIXED_SI, M32C_OPERAND_DST32_BASIC_PREFIXED_SI - , M32C_OPERAND_DST16_16_QI, M32C_OPERAND_DST16_16_8_QI, M32C_OPERAND_DST16_16_16_QI, M32C_OPERAND_DST16_16_HI - , M32C_OPERAND_DST16_16_8_HI, M32C_OPERAND_DST16_16_16_HI, M32C_OPERAND_DST16_16_SI, M32C_OPERAND_DST16_16_8_SI - , M32C_OPERAND_DST16_16_16_SI, M32C_OPERAND_DST16_16_EXT_QI, M32C_OPERAND_DST16_AN_INDIRECT_MOVA_HI, M32C_OPERAND_DST16_16_8_AN_RELATIVE_MOVA_HI - , M32C_OPERAND_DST16_16_16_AN_RELATIVE_MOVA_HI, M32C_OPERAND_DST16_16_8_SB_RELATIVE_MOVA_HI, M32C_OPERAND_DST16_16_16_SB_RELATIVE_MOVA_HI, M32C_OPERAND_DST16_16_8_FB_RELATIVE_MOVA_HI - , M32C_OPERAND_DST16_16_16_ABSOLUTE_MOVA_HI, M32C_OPERAND_DST16_16_MOVA_HI, M32C_OPERAND_DST32_AN_INDIRECT_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_UNPREFIXED_MOVA_SI - , M32C_OPERAND_DST32_16_16_AN_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_16_SB_RELATIVE_UNPREFIXED_MOVA_SI - , M32C_OPERAND_DST32_16_8_FB_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_16_ABSOLUTE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_24_ABSOLUTE_UNPREFIXED_MOVA_SI - , M32C_OPERAND_DST32_16_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_UNPREFIXED_QI, M32C_OPERAND_DST32_16_8_UNPREFIXED_QI, M32C_OPERAND_DST32_16_16_UNPREFIXED_QI - , M32C_OPERAND_DST32_16_24_UNPREFIXED_QI, M32C_OPERAND_DST32_16_UNPREFIXED_HI, M32C_OPERAND_DST32_16_8_UNPREFIXED_HI, M32C_OPERAND_DST32_16_16_UNPREFIXED_HI - , M32C_OPERAND_DST32_16_24_UNPREFIXED_HI, M32C_OPERAND_DST32_16_UNPREFIXED_SI, M32C_OPERAND_DST32_16_8_UNPREFIXED_SI, M32C_OPERAND_DST32_16_16_UNPREFIXED_SI - , M32C_OPERAND_DST32_16_24_UNPREFIXED_SI, M32C_OPERAND_DST32_16_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_UNPREFIXED_MULEX_HI - , M32C_OPERAND_DST16_24_QI, M32C_OPERAND_DST16_24_HI, M32C_OPERAND_DST32_24_UNPREFIXED_QI, M32C_OPERAND_DST32_24_PREFIXED_QI - , M32C_OPERAND_DST32_24_8_PREFIXED_QI, M32C_OPERAND_DST32_24_16_PREFIXED_QI, M32C_OPERAND_DST32_24_24_PREFIXED_QI, M32C_OPERAND_DST32_24_UNPREFIXED_HI - , M32C_OPERAND_DST32_24_PREFIXED_HI, M32C_OPERAND_DST32_24_8_PREFIXED_HI, M32C_OPERAND_DST32_24_16_PREFIXED_HI, M32C_OPERAND_DST32_24_24_PREFIXED_HI - , M32C_OPERAND_DST32_24_UNPREFIXED_SI, M32C_OPERAND_DST32_24_PREFIXED_SI, M32C_OPERAND_DST32_24_8_PREFIXED_SI, M32C_OPERAND_DST32_24_16_PREFIXED_SI - , M32C_OPERAND_DST32_24_24_PREFIXED_SI, M32C_OPERAND_DST16_32_QI, M32C_OPERAND_DST16_32_HI, M32C_OPERAND_DST32_32_UNPREFIXED_QI - , M32C_OPERAND_DST32_32_PREFIXED_QI, M32C_OPERAND_DST32_32_UNPREFIXED_HI, M32C_OPERAND_DST32_32_PREFIXED_HI, M32C_OPERAND_DST32_32_UNPREFIXED_SI - , M32C_OPERAND_DST32_32_PREFIXED_SI, M32C_OPERAND_DST32_40_UNPREFIXED_QI, M32C_OPERAND_DST32_40_PREFIXED_QI, M32C_OPERAND_DST32_40_UNPREFIXED_HI - , M32C_OPERAND_DST32_40_PREFIXED_HI, M32C_OPERAND_DST32_40_UNPREFIXED_SI, M32C_OPERAND_DST32_40_PREFIXED_SI, M32C_OPERAND_DST32_48_PREFIXED_QI - , M32C_OPERAND_DST32_48_PREFIXED_HI, M32C_OPERAND_DST32_48_PREFIXED_SI, M32C_OPERAND_BIT16_16, M32C_OPERAND_BIT16_16_BASIC - , M32C_OPERAND_BIT16_16_8, M32C_OPERAND_BIT16_16_16, M32C_OPERAND_BIT32_16_UNPREFIXED, M32C_OPERAND_BIT32_24_PREFIXED - , M32C_OPERAND_BIT32_BASIC_UNPREFIXED, M32C_OPERAND_BIT32_16_8_UNPREFIXED, M32C_OPERAND_BIT32_16_16_UNPREFIXED, M32C_OPERAND_BIT32_16_24_UNPREFIXED - , M32C_OPERAND_SRC16_2_S, M32C_OPERAND_SRC32_2_S_QI, M32C_OPERAND_SRC32_2_S_HI, M32C_OPERAND_DST16_3_S_8 - , M32C_OPERAND_DST16_3_S_16, M32C_OPERAND_SRCDST16_R0L_R0H_S, M32C_OPERAND_DST32_2_S_BASIC_QI, M32C_OPERAND_DST32_2_S_BASIC_HI - , M32C_OPERAND_DST32_2_S_8_QI, M32C_OPERAND_DST32_2_S_16_QI, M32C_OPERAND_DST32_2_S_8_HI, M32C_OPERAND_DST32_2_S_16_HI - , M32C_OPERAND_DST32_2_S_8_SI, M32C_OPERAND_DST32_2_S_16_SI, M32C_OPERAND_DST32_AN_S, M32C_OPERAND_BIT16_11_S - , M32C_OPERAND_RN16_PUSH_S_ANYOF, M32C_OPERAND_AN16_PUSH_S_ANYOF, M32C_OPERAND_MAX + , M32C_OPERAND_DSP_8_U8, M32C_OPERAND_DSP_8_U16, M32C_OPERAND_DSP_8_S8, M32C_OPERAND_DSP_8_S24 + , M32C_OPERAND_DSP_8_U24, M32C_OPERAND_DSP_10_U6, M32C_OPERAND_DSP_16_U8, M32C_OPERAND_DSP_16_U16 + , M32C_OPERAND_DSP_16_U20, M32C_OPERAND_DSP_16_U24, M32C_OPERAND_DSP_16_S8, M32C_OPERAND_DSP_16_S16 + , M32C_OPERAND_DSP_24_U8, M32C_OPERAND_DSP_24_U16, M32C_OPERAND_DSP_24_U20, M32C_OPERAND_DSP_24_U24 + , M32C_OPERAND_DSP_24_S8, M32C_OPERAND_DSP_24_S16, M32C_OPERAND_DSP_32_U8, M32C_OPERAND_DSP_32_U16 + , M32C_OPERAND_DSP_32_U24, M32C_OPERAND_DSP_32_U20, M32C_OPERAND_DSP_32_S8, M32C_OPERAND_DSP_32_S16 + , M32C_OPERAND_DSP_40_U8, M32C_OPERAND_DSP_40_S8, M32C_OPERAND_DSP_40_U16, M32C_OPERAND_DSP_40_S16 + , M32C_OPERAND_DSP_40_U24, M32C_OPERAND_DSP_48_U8, M32C_OPERAND_DSP_48_S8, M32C_OPERAND_DSP_48_U16 + , M32C_OPERAND_DSP_48_S16, M32C_OPERAND_DSP_48_U24, M32C_OPERAND_IMM_8_S4, M32C_OPERAND_IMM_8_S4N + , M32C_OPERAND_IMM_SH_8_S4, M32C_OPERAND_IMM_8_QI, M32C_OPERAND_IMM_8_HI, M32C_OPERAND_IMM_12_S4 + , M32C_OPERAND_IMM_12_S4N, M32C_OPERAND_IMM_SH_12_S4, M32C_OPERAND_IMM_13_U3, M32C_OPERAND_IMM_20_S4 + , M32C_OPERAND_IMM_SH_20_S4, M32C_OPERAND_IMM_16_QI, M32C_OPERAND_IMM_16_HI, M32C_OPERAND_IMM_16_SI + , M32C_OPERAND_IMM_24_QI, M32C_OPERAND_IMM_24_HI, M32C_OPERAND_IMM_24_SI, M32C_OPERAND_IMM_32_QI + , M32C_OPERAND_IMM_32_SI, M32C_OPERAND_IMM_32_HI, M32C_OPERAND_IMM_40_QI, M32C_OPERAND_IMM_40_HI + , M32C_OPERAND_IMM_40_SI, M32C_OPERAND_IMM_48_QI, M32C_OPERAND_IMM_48_HI, M32C_OPERAND_IMM_48_SI + , M32C_OPERAND_IMM_56_QI, M32C_OPERAND_IMM_56_HI, M32C_OPERAND_IMM_64_HI, M32C_OPERAND_IMM1_S + , M32C_OPERAND_IMM3_S, M32C_OPERAND_BITNO16R, M32C_OPERAND_BITNO32PREFIXED, M32C_OPERAND_BITNO32UNPREFIXED + , M32C_OPERAND_BITBASE16_16_U8, M32C_OPERAND_BITBASE16_16_S8, M32C_OPERAND_BITBASE16_16_U16, M32C_OPERAND_BITBASE16_8_U11_S + , M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED, M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED, M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED, M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED + , M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED, M32C_OPERAND_BITBASE32_24_U11_PREFIXED, M32C_OPERAND_BITBASE32_24_S11_PREFIXED, M32C_OPERAND_BITBASE32_24_U19_PREFIXED + , M32C_OPERAND_BITBASE32_24_S19_PREFIXED, M32C_OPERAND_BITBASE32_24_U27_PREFIXED, M32C_OPERAND_LAB_5_3, M32C_OPERAND_LAB32_JMP_S + , M32C_OPERAND_LAB_8_8, M32C_OPERAND_LAB_8_16, M32C_OPERAND_LAB_8_24, M32C_OPERAND_LAB_16_8 + , M32C_OPERAND_LAB_24_8, M32C_OPERAND_LAB_32_8, M32C_OPERAND_LAB_40_8, M32C_OPERAND_SBIT + , M32C_OPERAND_OBIT, M32C_OPERAND_ZBIT, M32C_OPERAND_CBIT, M32C_OPERAND_UBIT + , M32C_OPERAND_IBIT, M32C_OPERAND_BBIT, M32C_OPERAND_DBIT, M32C_OPERAND_COND16_16 + , M32C_OPERAND_COND16_24, M32C_OPERAND_COND16_32, M32C_OPERAND_COND32_16, M32C_OPERAND_COND32_24 + , M32C_OPERAND_COND32_32, M32C_OPERAND_COND32_40, M32C_OPERAND_COND16C, M32C_OPERAND_COND16J + , M32C_OPERAND_COND16J5, M32C_OPERAND_COND32, M32C_OPERAND_COND32J, M32C_OPERAND_SCCOND32 + , M32C_OPERAND_FLAGS16, M32C_OPERAND_FLAGS32, M32C_OPERAND_CR16, M32C_OPERAND_CR1_UNPREFIXED_32 + , M32C_OPERAND_CR1_PREFIXED_32, M32C_OPERAND_CR2_32, M32C_OPERAND_CR3_UNPREFIXED_32, M32C_OPERAND_CR3_PREFIXED_32 + , M32C_OPERAND_Z, M32C_OPERAND_S, M32C_OPERAND_Q, M32C_OPERAND_G + , M32C_OPERAND_X, M32C_OPERAND_SIZE, M32C_OPERAND_BITINDEX, M32C_OPERAND_SRCINDEX + , M32C_OPERAND_DSTINDEX, M32C_OPERAND_NOREMAINDER, M32C_OPERAND_SRC16_RN_DIRECT_QI, M32C_OPERAND_SRC16_RN_DIRECT_HI + , M32C_OPERAND_SRC32_RN_DIRECT_UNPREFIXED_QI, M32C_OPERAND_SRC32_RN_DIRECT_PREFIXED_QI, M32C_OPERAND_SRC32_RN_DIRECT_UNPREFIXED_HI, M32C_OPERAND_SRC32_RN_DIRECT_PREFIXED_HI + , M32C_OPERAND_SRC32_RN_DIRECT_UNPREFIXED_SI, M32C_OPERAND_SRC32_RN_DIRECT_PREFIXED_SI, M32C_OPERAND_SRC16_AN_DIRECT_QI, M32C_OPERAND_SRC16_AN_DIRECT_HI + , M32C_OPERAND_SRC32_AN_DIRECT_UNPREFIXED_QI, M32C_OPERAND_SRC32_AN_DIRECT_UNPREFIXED_HI, M32C_OPERAND_SRC32_AN_DIRECT_UNPREFIXED_SI, M32C_OPERAND_SRC32_AN_DIRECT_PREFIXED_QI + , M32C_OPERAND_SRC32_AN_DIRECT_PREFIXED_HI, M32C_OPERAND_SRC32_AN_DIRECT_PREFIXED_SI, M32C_OPERAND_SRC16_AN_INDIRECT_QI, M32C_OPERAND_SRC16_AN_INDIRECT_HI + , M32C_OPERAND_SRC32_AN_INDIRECT_UNPREFIXED_QI, M32C_OPERAND_SRC32_AN_INDIRECT_UNPREFIXED_HI, M32C_OPERAND_SRC32_AN_INDIRECT_UNPREFIXED_SI, M32C_OPERAND_SRC32_AN_INDIRECT_PREFIXED_QI + , M32C_OPERAND_SRC32_AN_INDIRECT_PREFIXED_HI, M32C_OPERAND_SRC32_AN_INDIRECT_PREFIXED_SI, M32C_OPERAND_SRC16_16_8_SB_RELATIVE_QI, M32C_OPERAND_SRC16_16_16_SB_RELATIVE_QI + , M32C_OPERAND_SRC16_16_8_FB_RELATIVE_QI, M32C_OPERAND_SRC16_16_8_AN_RELATIVE_QI, M32C_OPERAND_SRC16_16_16_AN_RELATIVE_QI, M32C_OPERAND_SRC16_16_8_SB_RELATIVE_HI + , M32C_OPERAND_SRC16_16_16_SB_RELATIVE_HI, M32C_OPERAND_SRC16_16_8_FB_RELATIVE_HI, M32C_OPERAND_SRC16_16_8_AN_RELATIVE_HI, M32C_OPERAND_SRC16_16_16_AN_RELATIVE_HI + , M32C_OPERAND_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI + , M32C_OPERAND_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI + , M32C_OPERAND_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI + , M32C_OPERAND_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI + , M32C_OPERAND_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI + , M32C_OPERAND_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_24_8_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_16_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_8_FB_RELATIVE_PREFIXED_QI + , M32C_OPERAND_SRC32_24_16_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_8_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_16_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_24_AN_RELATIVE_PREFIXED_QI + , M32C_OPERAND_SRC32_24_8_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_8_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_FB_RELATIVE_PREFIXED_HI + , M32C_OPERAND_SRC32_24_8_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_24_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_8_SB_RELATIVE_PREFIXED_SI + , M32C_OPERAND_SRC32_24_16_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_8_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_16_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_8_AN_RELATIVE_PREFIXED_SI + , M32C_OPERAND_SRC32_24_16_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_24_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC16_16_16_ABSOLUTE_QI, M32C_OPERAND_SRC16_16_16_ABSOLUTE_HI + , M32C_OPERAND_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI + , M32C_OPERAND_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_SRC32_24_16_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_SRC32_24_24_ABSOLUTE_PREFIXED_QI + , M32C_OPERAND_SRC32_24_16_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_SRC32_24_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_SRC32_24_24_ABSOLUTE_PREFIXED_SI + , M32C_OPERAND_SRC16_2_S_8_SB_RELATIVE_QI, M32C_OPERAND_SRC16_2_S_8_FB_RELATIVE_QI, M32C_OPERAND_SRC16_2_S_16_ABSOLUTE_QI, M32C_OPERAND_SRC32_2_S_8_SB_RELATIVE_QI + , M32C_OPERAND_SRC32_2_S_8_FB_RELATIVE_QI, M32C_OPERAND_SRC32_2_S_16_ABSOLUTE_QI, M32C_OPERAND_SRC32_2_S_8_SB_RELATIVE_HI, M32C_OPERAND_SRC32_2_S_8_FB_RELATIVE_HI + , M32C_OPERAND_SRC32_2_S_16_ABSOLUTE_HI, M32C_OPERAND_DST16_RN_DIRECT_QI, M32C_OPERAND_DST16_RN_DIRECT_HI, M32C_OPERAND_DST16_RN_DIRECT_SI + , M32C_OPERAND_DST16_RN_DIRECT_EXT_QI, M32C_OPERAND_DST32_RN_DIRECT_UNPREFIXED_QI, M32C_OPERAND_DST32_RN_DIRECT_PREFIXED_QI, M32C_OPERAND_DST32_RN_DIRECT_UNPREFIXED_HI + , M32C_OPERAND_DST32_RN_DIRECT_PREFIXED_HI, M32C_OPERAND_DST32_RN_DIRECT_UNPREFIXED_SI, M32C_OPERAND_DST32_RN_DIRECT_PREFIXED_SI, M32C_OPERAND_DST32_RN_DIRECT_EXTUNPREFIXED_QI + , M32C_OPERAND_DST32_RN_DIRECT_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_R3_DIRECT_UNPREFIXED_HI, M32C_OPERAND_DST16_AN_DIRECT_QI, M32C_OPERAND_DST16_AN_DIRECT_HI + , M32C_OPERAND_DST16_AN_DIRECT_SI, M32C_OPERAND_DST32_AN_DIRECT_UNPREFIXED_QI, M32C_OPERAND_DST32_AN_DIRECT_PREFIXED_QI, M32C_OPERAND_DST32_AN_DIRECT_UNPREFIXED_HI + , M32C_OPERAND_DST32_AN_DIRECT_PREFIXED_HI, M32C_OPERAND_DST32_AN_DIRECT_UNPREFIXED_SI, M32C_OPERAND_DST32_AN_DIRECT_PREFIXED_SI, M32C_OPERAND_DST16_AN_INDIRECT_QI + , M32C_OPERAND_DST16_AN_INDIRECT_HI, M32C_OPERAND_DST16_AN_INDIRECT_SI, M32C_OPERAND_DST16_AN_INDIRECT_EXT_QI, M32C_OPERAND_DST32_AN_INDIRECT_UNPREFIXED_QI + , M32C_OPERAND_DST32_AN_INDIRECT_PREFIXED_QI, M32C_OPERAND_DST32_AN_INDIRECT_UNPREFIXED_HI, M32C_OPERAND_DST32_AN_INDIRECT_PREFIXED_HI, M32C_OPERAND_DST32_AN_INDIRECT_UNPREFIXED_SI + , M32C_OPERAND_DST32_AN_INDIRECT_PREFIXED_SI, M32C_OPERAND_DST32_AN_INDIRECT_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_AN_INDIRECT_EXTUNPREFIXED_HI, M32C_OPERAND_DST16_16_8_SB_RELATIVE_QI + , M32C_OPERAND_DST16_16_16_SB_RELATIVE_QI, M32C_OPERAND_DST16_16_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_16_8_AN_RELATIVE_QI, M32C_OPERAND_DST16_16_16_AN_RELATIVE_QI + , M32C_OPERAND_DST16_24_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_24_16_SB_RELATIVE_QI, M32C_OPERAND_DST16_24_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_24_8_AN_RELATIVE_QI + , M32C_OPERAND_DST16_24_16_AN_RELATIVE_QI, M32C_OPERAND_DST16_32_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_32_16_SB_RELATIVE_QI, M32C_OPERAND_DST16_32_8_FB_RELATIVE_QI + , M32C_OPERAND_DST16_32_8_AN_RELATIVE_QI, M32C_OPERAND_DST16_32_16_AN_RELATIVE_QI, M32C_OPERAND_DST16_40_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_40_16_SB_RELATIVE_QI + , M32C_OPERAND_DST16_40_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_40_8_AN_RELATIVE_QI, M32C_OPERAND_DST16_40_16_AN_RELATIVE_QI, M32C_OPERAND_DST16_48_8_SB_RELATIVE_QI + , M32C_OPERAND_DST16_48_16_SB_RELATIVE_QI, M32C_OPERAND_DST16_48_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_48_8_AN_RELATIVE_QI, M32C_OPERAND_DST16_48_16_AN_RELATIVE_QI + , M32C_OPERAND_DST16_16_8_SB_RELATIVE_HI, M32C_OPERAND_DST16_16_16_SB_RELATIVE_HI, M32C_OPERAND_DST16_16_8_FB_RELATIVE_HI, M32C_OPERAND_DST16_16_8_AN_RELATIVE_HI + , M32C_OPERAND_DST16_16_16_AN_RELATIVE_HI, M32C_OPERAND_DST16_24_8_SB_RELATIVE_HI, M32C_OPERAND_DST16_24_16_SB_RELATIVE_HI, M32C_OPERAND_DST16_24_8_FB_RELATIVE_HI + , M32C_OPERAND_DST16_24_8_AN_RELATIVE_HI, M32C_OPERAND_DST16_24_16_AN_RELATIVE_HI, M32C_OPERAND_DST16_32_8_SB_RELATIVE_HI, M32C_OPERAND_DST16_32_16_SB_RELATIVE_HI + , M32C_OPERAND_DST16_32_8_FB_RELATIVE_HI, M32C_OPERAND_DST16_32_8_AN_RELATIVE_HI, M32C_OPERAND_DST16_32_16_AN_RELATIVE_HI, M32C_OPERAND_DST16_40_8_SB_RELATIVE_HI + , M32C_OPERAND_DST16_40_16_SB_RELATIVE_HI, M32C_OPERAND_DST16_40_8_FB_RELATIVE_HI, M32C_OPERAND_DST16_40_8_AN_RELATIVE_HI, M32C_OPERAND_DST16_40_16_AN_RELATIVE_HI + , M32C_OPERAND_DST16_48_8_SB_RELATIVE_HI, M32C_OPERAND_DST16_48_16_SB_RELATIVE_HI, M32C_OPERAND_DST16_48_8_FB_RELATIVE_HI, M32C_OPERAND_DST16_48_8_AN_RELATIVE_HI + , M32C_OPERAND_DST16_48_16_AN_RELATIVE_HI, M32C_OPERAND_DST16_16_8_SB_RELATIVE_SI, M32C_OPERAND_DST16_16_16_SB_RELATIVE_SI, M32C_OPERAND_DST16_16_8_FB_RELATIVE_SI + , M32C_OPERAND_DST16_16_8_AN_RELATIVE_SI, M32C_OPERAND_DST16_16_16_AN_RELATIVE_SI, M32C_OPERAND_DST16_24_8_SB_RELATIVE_SI, M32C_OPERAND_DST16_24_16_SB_RELATIVE_SI + , M32C_OPERAND_DST16_24_8_FB_RELATIVE_SI, M32C_OPERAND_DST16_24_8_AN_RELATIVE_SI, M32C_OPERAND_DST16_24_16_AN_RELATIVE_SI, M32C_OPERAND_DST16_32_8_SB_RELATIVE_SI + , M32C_OPERAND_DST16_32_16_SB_RELATIVE_SI, M32C_OPERAND_DST16_32_8_FB_RELATIVE_SI, M32C_OPERAND_DST16_32_8_AN_RELATIVE_SI, M32C_OPERAND_DST16_32_16_AN_RELATIVE_SI + , M32C_OPERAND_DST16_40_8_SB_RELATIVE_SI, M32C_OPERAND_DST16_40_16_SB_RELATIVE_SI, M32C_OPERAND_DST16_40_8_FB_RELATIVE_SI, M32C_OPERAND_DST16_40_8_AN_RELATIVE_SI + , M32C_OPERAND_DST16_40_16_AN_RELATIVE_SI, M32C_OPERAND_DST16_48_8_SB_RELATIVE_SI, M32C_OPERAND_DST16_48_16_SB_RELATIVE_SI, M32C_OPERAND_DST16_48_8_FB_RELATIVE_SI + , M32C_OPERAND_DST16_48_8_AN_RELATIVE_SI, M32C_OPERAND_DST16_48_16_AN_RELATIVE_SI, M32C_OPERAND_DST16_16_8_SB_RELATIVE_EXT_QI, M32C_OPERAND_DST16_16_16_SB_RELATIVE_EXT_QI + , M32C_OPERAND_DST16_16_8_FB_RELATIVE_EXT_QI, M32C_OPERAND_DST16_16_8_AN_RELATIVE_EXT_QI, M32C_OPERAND_DST16_16_16_AN_RELATIVE_EXT_QI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI + , M32C_OPERAND_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI + , M32C_OPERAND_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI + , M32C_OPERAND_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI + , M32C_OPERAND_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI + , M32C_OPERAND_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI + , M32C_OPERAND_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI + , M32C_OPERAND_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI + , M32C_OPERAND_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI + , M32C_OPERAND_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI + , M32C_OPERAND_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI + , M32C_OPERAND_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI + , M32C_OPERAND_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI + , M32C_OPERAND_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI + , M32C_OPERAND_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI + , M32C_OPERAND_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI + , M32C_OPERAND_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI + , M32C_OPERAND_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI + , M32C_OPERAND_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI + , M32C_OPERAND_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI + , M32C_OPERAND_DST32_40_8_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_16_FB_RELATIVE_UNPREFIXED_SI + , M32C_OPERAND_DST32_40_8_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_PREFIXED_QI + , M32C_OPERAND_DST32_24_16_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_PREFIXED_QI + , M32C_OPERAND_DST32_24_16_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_PREFIXED_QI + , M32C_OPERAND_DST32_32_8_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_PREFIXED_QI + , M32C_OPERAND_DST32_32_24_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_PREFIXED_QI + , M32C_OPERAND_DST32_40_16_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_PREFIXED_QI + , M32C_OPERAND_DST32_48_8_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_16_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_8_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_16_FB_RELATIVE_PREFIXED_QI + , M32C_OPERAND_DST32_48_8_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_16_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_24_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_PREFIXED_HI + , M32C_OPERAND_DST32_24_16_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_PREFIXED_HI + , M32C_OPERAND_DST32_24_16_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_PREFIXED_HI + , M32C_OPERAND_DST32_32_8_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_PREFIXED_HI + , M32C_OPERAND_DST32_32_24_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_PREFIXED_HI + , M32C_OPERAND_DST32_40_16_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_PREFIXED_HI + , M32C_OPERAND_DST32_48_8_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_16_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_8_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_16_FB_RELATIVE_PREFIXED_HI + , M32C_OPERAND_DST32_48_8_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_16_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_24_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_PREFIXED_SI + , M32C_OPERAND_DST32_24_16_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_PREFIXED_SI + , M32C_OPERAND_DST32_24_16_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_PREFIXED_SI + , M32C_OPERAND_DST32_32_8_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_PREFIXED_SI + , M32C_OPERAND_DST32_32_24_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_PREFIXED_SI + , M32C_OPERAND_DST32_40_16_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_PREFIXED_SI + , M32C_OPERAND_DST32_48_8_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_16_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_8_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_16_FB_RELATIVE_PREFIXED_SI + , M32C_OPERAND_DST32_48_8_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_16_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_24_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_EXTUNPREFIXED_QI + , M32C_OPERAND_DST32_16_16_SB_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_EXTUNPREFIXED_QI + , M32C_OPERAND_DST32_16_16_AN_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_16_SB_RELATIVE_EXTUNPREFIXED_HI + , M32C_OPERAND_DST32_16_8_FB_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_16_AN_RELATIVE_EXTUNPREFIXED_HI + , M32C_OPERAND_DST32_16_24_AN_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST16_16_16_ABSOLUTE_QI, M32C_OPERAND_DST16_24_16_ABSOLUTE_QI, M32C_OPERAND_DST16_32_16_ABSOLUTE_QI + , M32C_OPERAND_DST16_40_16_ABSOLUTE_QI, M32C_OPERAND_DST16_48_16_ABSOLUTE_QI, M32C_OPERAND_DST16_16_16_ABSOLUTE_HI, M32C_OPERAND_DST16_24_16_ABSOLUTE_HI + , M32C_OPERAND_DST16_32_16_ABSOLUTE_HI, M32C_OPERAND_DST16_40_16_ABSOLUTE_HI, M32C_OPERAND_DST16_48_16_ABSOLUTE_HI, M32C_OPERAND_DST16_16_16_ABSOLUTE_SI + , M32C_OPERAND_DST16_24_16_ABSOLUTE_SI, M32C_OPERAND_DST16_32_16_ABSOLUTE_SI, M32C_OPERAND_DST16_40_16_ABSOLUTE_SI, M32C_OPERAND_DST16_48_16_ABSOLUTE_SI + , M32C_OPERAND_DST16_16_16_ABSOLUTE_EXT_QI, M32C_OPERAND_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_16_ABSOLUTE_UNPREFIXED_QI + , M32C_OPERAND_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_16_ABSOLUTE_UNPREFIXED_QI + , M32C_OPERAND_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_16_ABSOLUTE_UNPREFIXED_HI + , M32C_OPERAND_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_16_ABSOLUTE_UNPREFIXED_HI + , M32C_OPERAND_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_16_ABSOLUTE_UNPREFIXED_SI + , M32C_OPERAND_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_16_ABSOLUTE_UNPREFIXED_SI + , M32C_OPERAND_DST32_40_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_16_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_24_24_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_32_16_ABSOLUTE_PREFIXED_QI + , M32C_OPERAND_DST32_32_24_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_40_16_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_40_24_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_48_16_ABSOLUTE_PREFIXED_QI + , M32C_OPERAND_DST32_48_24_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_24_16_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_24_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_32_16_ABSOLUTE_PREFIXED_HI + , M32C_OPERAND_DST32_32_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_40_16_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_40_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_48_16_ABSOLUTE_PREFIXED_HI + , M32C_OPERAND_DST32_48_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_24_16_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_24_24_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_32_16_ABSOLUTE_PREFIXED_SI + , M32C_OPERAND_DST32_32_24_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_40_16_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_40_24_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_48_16_ABSOLUTE_PREFIXED_SI + , M32C_OPERAND_DST32_48_24_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_16_16_ABSOLUTE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_24_ABSOLUTE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_16_ABSOLUTE_EXTUNPREFIXED_HI + , M32C_OPERAND_DST32_16_24_ABSOLUTE_EXTUNPREFIXED_HI, M32C_OPERAND_BIT16_RN_DIRECT, M32C_OPERAND_BIT32_RN_DIRECT_UNPREFIXED, M32C_OPERAND_BIT32_RN_DIRECT_PREFIXED + , M32C_OPERAND_BIT16_AN_DIRECT, M32C_OPERAND_BIT32_AN_DIRECT_UNPREFIXED, M32C_OPERAND_BIT32_AN_DIRECT_PREFIXED, M32C_OPERAND_BIT16_AN_INDIRECT + , M32C_OPERAND_BIT32_AN_INDIRECT_UNPREFIXED, M32C_OPERAND_BIT32_AN_INDIRECT_PREFIXED, M32C_OPERAND_BIT16_16_8_SB_RELATIVE, M32C_OPERAND_BIT16_16_16_SB_RELATIVE + , M32C_OPERAND_BIT16_16_8_FB_RELATIVE, M32C_OPERAND_BIT16_16_8_AN_RELATIVE, M32C_OPERAND_BIT16_16_16_AN_RELATIVE, M32C_OPERAND_BIT32_16_11_SB_RELATIVE_UNPREFIXED + , M32C_OPERAND_BIT32_16_19_SB_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_11_FB_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_19_FB_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_11_AN_RELATIVE_UNPREFIXED + , M32C_OPERAND_BIT32_16_19_AN_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_27_AN_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_24_11_SB_RELATIVE_PREFIXED, M32C_OPERAND_BIT32_24_19_SB_RELATIVE_PREFIXED + , M32C_OPERAND_BIT32_24_11_FB_RELATIVE_PREFIXED, M32C_OPERAND_BIT32_24_19_FB_RELATIVE_PREFIXED, M32C_OPERAND_BIT32_24_11_AN_RELATIVE_PREFIXED, M32C_OPERAND_BIT32_24_19_AN_RELATIVE_PREFIXED + , M32C_OPERAND_BIT32_24_27_AN_RELATIVE_PREFIXED, M32C_OPERAND_BIT16_11_SB_RELATIVE_S, M32C_OPERAND_RN16_PUSH_S_DERIVED, M32C_OPERAND_AN16_PUSH_S_DERIVED + , M32C_OPERAND_BIT16_16_16_ABSOLUTE, M32C_OPERAND_BIT32_16_19_ABSOLUTE_UNPREFIXED, M32C_OPERAND_BIT32_16_27_ABSOLUTE_UNPREFIXED, M32C_OPERAND_BIT32_24_19_ABSOLUTE_PREFIXED + , M32C_OPERAND_BIT32_24_27_ABSOLUTE_PREFIXED, M32C_OPERAND_DST16_3_S_R0L_DIRECT_QI, M32C_OPERAND_DST16_3_S_R0H_DIRECT_QI, M32C_OPERAND_DST16_3_S_8_8_SB_RELATIVE_QI + , M32C_OPERAND_DST16_3_S_8_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_3_S_8_16_ABSOLUTE_QI, M32C_OPERAND_DST16_3_S_16_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_3_S_16_8_FB_RELATIVE_QI + , M32C_OPERAND_DST16_3_S_16_16_ABSOLUTE_QI, M32C_OPERAND_SRCDST16_R0L_R0H_S_DERIVED, M32C_OPERAND_DST32_2_S_R0L_DIRECT_QI, M32C_OPERAND_DST32_2_S_R0_DIRECT_HI + , M32C_OPERAND_DST32_1_S_A0_DIRECT_HI, M32C_OPERAND_DST32_1_S_A1_DIRECT_HI, M32C_OPERAND_DST32_2_S_8_SB_RELATIVE_QI, M32C_OPERAND_DST32_2_S_8_FB_RELATIVE_QI + , M32C_OPERAND_DST32_2_S_16_ABSOLUTE_QI, M32C_OPERAND_DST32_2_S_8_SB_RELATIVE_HI, M32C_OPERAND_DST32_2_S_8_FB_RELATIVE_HI, M32C_OPERAND_DST32_2_S_16_ABSOLUTE_HI + , M32C_OPERAND_DST32_2_S_8_SB_RELATIVE_SI, M32C_OPERAND_DST32_2_S_8_FB_RELATIVE_SI, M32C_OPERAND_DST32_2_S_16_ABSOLUTE_SI, M32C_OPERAND_SRC16_BASIC_QI + , M32C_OPERAND_SRC16_BASIC_HI, M32C_OPERAND_SRC32_BASIC_UNPREFIXED_QI, M32C_OPERAND_SRC32_BASIC_PREFIXED_QI, M32C_OPERAND_SRC32_BASIC_UNPREFIXED_HI + , M32C_OPERAND_SRC32_BASIC_PREFIXED_HI, M32C_OPERAND_SRC32_BASIC_UNPREFIXED_SI, M32C_OPERAND_SRC32_BASIC_PREFIXED_SI, M32C_OPERAND_SRC32_BASIC_EXTPREFIXED_QI + , M32C_OPERAND_SRC16_16_8_QI, M32C_OPERAND_SRC16_16_16_QI, M32C_OPERAND_SRC16_16_8_HI, M32C_OPERAND_SRC16_16_16_HI + , M32C_OPERAND_SRC32_16_8_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_24_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_8_UNPREFIXED_HI + , M32C_OPERAND_SRC32_16_16_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_24_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_8_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_16_UNPREFIXED_SI + , M32C_OPERAND_SRC32_16_24_UNPREFIXED_SI, M32C_OPERAND_SRC32_24_8_PREFIXED_QI, M32C_OPERAND_SRC32_24_16_PREFIXED_QI, M32C_OPERAND_SRC32_24_24_PREFIXED_QI + , M32C_OPERAND_SRC32_24_8_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_PREFIXED_HI, M32C_OPERAND_SRC32_24_24_PREFIXED_HI, M32C_OPERAND_SRC32_24_8_PREFIXED_SI + , M32C_OPERAND_SRC32_24_16_PREFIXED_SI, M32C_OPERAND_SRC32_24_24_PREFIXED_SI, M32C_OPERAND_DST16_BASIC_QI, M32C_OPERAND_DST16_BASIC_HI + , M32C_OPERAND_DST16_BASIC_SI, M32C_OPERAND_DST32_BASIC_UNPREFIXED_QI, M32C_OPERAND_DST32_BASIC_PREFIXED_QI, M32C_OPERAND_DST32_BASIC_UNPREFIXED_HI + , M32C_OPERAND_DST32_BASIC_PREFIXED_HI, M32C_OPERAND_DST32_BASIC_UNPREFIXED_SI, M32C_OPERAND_DST32_BASIC_PREFIXED_SI, M32C_OPERAND_DST16_16_QI + , M32C_OPERAND_DST16_16_8_QI, M32C_OPERAND_DST16_16_16_QI, M32C_OPERAND_DST16_16_HI, M32C_OPERAND_DST16_16_8_HI + , M32C_OPERAND_DST16_16_16_HI, M32C_OPERAND_DST16_16_SI, M32C_OPERAND_DST16_16_8_SI, M32C_OPERAND_DST16_16_16_SI + , M32C_OPERAND_DST16_16_EXT_QI, M32C_OPERAND_DST16_AN_INDIRECT_MOVA_HI, M32C_OPERAND_DST16_16_8_AN_RELATIVE_MOVA_HI, M32C_OPERAND_DST16_16_16_AN_RELATIVE_MOVA_HI + , M32C_OPERAND_DST16_16_8_SB_RELATIVE_MOVA_HI, M32C_OPERAND_DST16_16_16_SB_RELATIVE_MOVA_HI, M32C_OPERAND_DST16_16_8_FB_RELATIVE_MOVA_HI, M32C_OPERAND_DST16_16_16_ABSOLUTE_MOVA_HI + , M32C_OPERAND_DST16_16_MOVA_HI, M32C_OPERAND_DST32_AN_INDIRECT_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_16_AN_RELATIVE_UNPREFIXED_MOVA_SI + , M32C_OPERAND_DST32_16_24_AN_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_16_SB_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_UNPREFIXED_MOVA_SI + , M32C_OPERAND_DST32_16_16_FB_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_16_ABSOLUTE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_24_ABSOLUTE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_UNPREFIXED_MOVA_SI + , M32C_OPERAND_DST32_16_UNPREFIXED_QI, M32C_OPERAND_DST32_16_8_UNPREFIXED_QI, M32C_OPERAND_DST32_16_16_UNPREFIXED_QI, M32C_OPERAND_DST32_16_24_UNPREFIXED_QI + , M32C_OPERAND_DST32_16_UNPREFIXED_HI, M32C_OPERAND_DST32_16_8_UNPREFIXED_HI, M32C_OPERAND_DST32_16_16_UNPREFIXED_HI, M32C_OPERAND_DST32_16_24_UNPREFIXED_HI + , M32C_OPERAND_DST32_16_UNPREFIXED_SI, M32C_OPERAND_DST32_16_8_UNPREFIXED_SI, M32C_OPERAND_DST32_16_16_UNPREFIXED_SI, M32C_OPERAND_DST32_16_24_UNPREFIXED_SI + , M32C_OPERAND_DST32_16_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_UNPREFIXED_MULEX_HI, M32C_OPERAND_DST16_24_QI + , M32C_OPERAND_DST16_24_HI, M32C_OPERAND_DST32_24_UNPREFIXED_QI, M32C_OPERAND_DST32_24_PREFIXED_QI, M32C_OPERAND_DST32_24_8_PREFIXED_QI + , M32C_OPERAND_DST32_24_16_PREFIXED_QI, M32C_OPERAND_DST32_24_24_PREFIXED_QI, M32C_OPERAND_DST32_24_UNPREFIXED_HI, M32C_OPERAND_DST32_24_PREFIXED_HI + , M32C_OPERAND_DST32_24_8_PREFIXED_HI, M32C_OPERAND_DST32_24_16_PREFIXED_HI, M32C_OPERAND_DST32_24_24_PREFIXED_HI, M32C_OPERAND_DST32_24_UNPREFIXED_SI + , M32C_OPERAND_DST32_24_PREFIXED_SI, M32C_OPERAND_DST32_24_8_PREFIXED_SI, M32C_OPERAND_DST32_24_16_PREFIXED_SI, M32C_OPERAND_DST32_24_24_PREFIXED_SI + , M32C_OPERAND_DST16_32_QI, M32C_OPERAND_DST16_32_HI, M32C_OPERAND_DST32_32_UNPREFIXED_QI, M32C_OPERAND_DST32_32_PREFIXED_QI + , M32C_OPERAND_DST32_32_UNPREFIXED_HI, M32C_OPERAND_DST32_32_PREFIXED_HI, M32C_OPERAND_DST32_32_UNPREFIXED_SI, M32C_OPERAND_DST32_32_PREFIXED_SI + , M32C_OPERAND_DST32_40_UNPREFIXED_QI, M32C_OPERAND_DST32_40_PREFIXED_QI, M32C_OPERAND_DST32_40_UNPREFIXED_HI, M32C_OPERAND_DST32_40_PREFIXED_HI + , M32C_OPERAND_DST32_40_UNPREFIXED_SI, M32C_OPERAND_DST32_40_PREFIXED_SI, M32C_OPERAND_DST32_48_PREFIXED_QI, M32C_OPERAND_DST32_48_PREFIXED_HI + , M32C_OPERAND_DST32_48_PREFIXED_SI, M32C_OPERAND_BIT16_16, M32C_OPERAND_BIT16_16_BASIC, M32C_OPERAND_BIT16_16_8 + , M32C_OPERAND_BIT16_16_16, M32C_OPERAND_BIT32_16_UNPREFIXED, M32C_OPERAND_BIT32_24_PREFIXED, M32C_OPERAND_BIT32_BASIC_UNPREFIXED + , M32C_OPERAND_BIT32_16_8_UNPREFIXED, M32C_OPERAND_BIT32_16_16_UNPREFIXED, M32C_OPERAND_BIT32_16_24_UNPREFIXED, M32C_OPERAND_SRC16_2_S + , M32C_OPERAND_SRC32_2_S_QI, M32C_OPERAND_SRC32_2_S_HI, M32C_OPERAND_DST16_3_S_8, M32C_OPERAND_DST16_3_S_16 + , M32C_OPERAND_SRCDST16_R0L_R0H_S, M32C_OPERAND_DST32_2_S_BASIC_QI, M32C_OPERAND_DST32_2_S_BASIC_HI, M32C_OPERAND_DST32_2_S_8_QI + , M32C_OPERAND_DST32_2_S_16_QI, M32C_OPERAND_DST32_2_S_8_HI, M32C_OPERAND_DST32_2_S_16_HI, M32C_OPERAND_DST32_2_S_8_SI + , M32C_OPERAND_DST32_2_S_16_SI, M32C_OPERAND_DST32_AN_S, M32C_OPERAND_BIT16_11_S, M32C_OPERAND_RN16_PUSH_S_ANYOF + , M32C_OPERAND_AN16_PUSH_S_ANYOF, M32C_OPERAND_MAX } CGEN_OPERAND_TYPE; /* Number of operands types. */ -#define MAX_OPERANDS 870 +#define MAX_OPERANDS 873 /* Maximum number of operands referenced by any insn. */ #define MAX_OPERAND_INSTANCES 8 @@ -429,6 +462,20 @@ typedef enum cgen_insn_attr { /* Number of non-boolean elements in cgen_insn_attr. */ #define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1) +/* cgen_insn attribute accessor macros. */ +#define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_INSN_ISA_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_ISA-CGEN_INSN_START_NBOOLS-1].bitset) +#define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_ALIAS)) != 0) +#define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_UNCOND_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_COND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_COND_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_SKIP_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SKIP_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_DELAY_SLOT)) != 0) +#define CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXABLE)) != 0) +#define CGEN_ATTR_CGEN_INSN_RELAXED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXED)) != 0) +#define CGEN_ATTR_CGEN_INSN_NO_DIS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NO_DIS)) != 0) +#define CGEN_ATTR_CGEN_INSN_PBB_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PBB)) != 0) + /* cgen.h uses things we just defined. */ #include "opcode/cgen.h" diff --git a/opcodes/m32c-dis.c b/opcodes/m32c-dis.c index 70dc85f2dfd..43f93e2b2b8 100644 --- a/opcodes/m32c-dis.c +++ b/opcodes/m32c-dis.c @@ -4,7 +4,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. - the resultant file is machine generated, cgen-dis.in isn't - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005 + Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005 Free Software Foundation, Inc. This file is part of the GNU Binutils and GDB, the GNU debugger. @@ -262,6 +262,19 @@ print_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, print_regset (cd, dis_info, value, attrs, pc, length, PUSH); } +static void +print_signed4n (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + signed long value, + unsigned int attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ + disassemble_info *info = dis_info; + + (*info->fprintf_func) (info->stream, "%ld", -value); +} + void m32c_cgen_print_operand (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int); @@ -458,6 +471,9 @@ m32c_cgen_print_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_DSP_48_U8 : print_normal (cd, info, fields->f_dsp_48_u8, 0, pc, length); break; + case M32C_OPERAND_DSP_8_S24 : + print_normal (cd, info, fields->f_dsp_8_s24, 0|(1<f_dsp_8_s8, 0|(1<f_imm_12_s4, 0|(1<f_imm_12_s4, 0|(1<f_imm_13_u3, 0|(1<f_imm_8_s4, 0|(1<f_imm_8_s4, 0|(1<f_imm_12_s4, 0); break; @@ -1168,7 +1190,7 @@ default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) typedef struct cpu_desc_list { struct cpu_desc_list *next; - int isa; + CGEN_BITSET *isa; int mach; int endian; CGEN_CPU_DESC cd; @@ -1180,11 +1202,12 @@ print_insn_m32c (bfd_vma pc, disassemble_info *info) static cpu_desc_list *cd_list = 0; cpu_desc_list *cl = 0; static CGEN_CPU_DESC cd = 0; - static int prev_isa; + static CGEN_BITSET *prev_isa; static int prev_mach; static int prev_endian; int length; - int isa,mach; + CGEN_BITSET *isa; + int mach; int endian = (info->endian == BFD_ENDIAN_BIG ? CGEN_ENDIAN_BIG : CGEN_ENDIAN_LITTLE); @@ -1207,25 +1230,34 @@ print_insn_m32c (bfd_vma pc, disassemble_info *info) #endif #ifdef CGEN_COMPUTE_ISA - isa = CGEN_COMPUTE_ISA (info); + { + static CGEN_BITSET *permanent_isa; + + if (!permanent_isa) + permanent_isa = cgen_bitset_create (MAX_ISAS); + isa = permanent_isa; + cgen_bitset_clear (isa); + cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); + } #else isa = info->insn_sets; #endif /* If we've switched cpu's, try to find a handle we've used before */ if (cd - && (isa != prev_isa + && (cgen_bitset_compare (isa, prev_isa) != 0 || mach != prev_mach || endian != prev_endian)) { cd = 0; for (cl = cd_list; cl; cl = cl->next) { - if (cl->isa == isa && + if (cgen_bitset_compare (cl->isa, isa) == 0 && cl->mach == mach && cl->endian == endian) { cd = cl->cd; + prev_isa = cd->isas; break; } } @@ -1241,7 +1273,7 @@ print_insn_m32c (bfd_vma pc, disassemble_info *info) abort (); mach_name = arch_type->printable_name; - prev_isa = isa; + prev_isa = cgen_bitset_copy (isa); prev_mach = mach; prev_endian = endian; cd = m32c_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, @@ -1254,7 +1286,7 @@ print_insn_m32c (bfd_vma pc, disassemble_info *info) /* Save this away for future reference. */ cl = xmalloc (sizeof (struct cpu_desc_list)); cl->cd = cd; - cl->isa = isa; + cl->isa = prev_isa; cl->mach = mach; cl->endian = endian; cl->next = cd_list; diff --git a/opcodes/m32c-ibld.c b/opcodes/m32c-ibld.c index f5c2dc32946..16f0048e3b0 100644 --- a/opcodes/m32c-ibld.c +++ b/opcodes/m32c-ibld.c @@ -1027,6 +1027,13 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_DSP_48_U8 : errmsg = insert_normal (cd, fields->f_dsp_48_u8, 0, 32, 16, 8, 32, total_length, buffer); break; + case M32C_OPERAND_DSP_8_S24 : + { + long value = fields->f_dsp_8_s24; + value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16)))); + errmsg = insert_normal (cd, value, 0|(1<f_dsp_8_s8, 0|(1<f_imm_12_s4, 0|(1<f_imm_12_s4, 0|(1<f_imm_13_u3, 0, 0, 13, 3, 32, total_length, buffer); break; @@ -1354,6 +1364,9 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_IMM_8_S4 : errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<f_imm_8_s4, 0|(1<f_imm_12_s4, 0|(1<f_dsp_48_u8); break; + case M32C_OPERAND_DSP_8_S24 : + { + long value; + length = extract_normal (cd, ex_info, insn_value, 0|(1<> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16)))); + fields->f_dsp_8_s24 = value; + } + break; case M32C_OPERAND_DSP_8_S8 : length = extract_normal (cd, ex_info, insn_value, 0|(1<f_dsp_8_s8); break; @@ -2283,6 +2304,9 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_IMM_12_S4 : length = extract_normal (cd, ex_info, insn_value, 0|(1<f_imm_12_s4); break; + case M32C_OPERAND_IMM_12_S4N : + length = extract_normal (cd, ex_info, insn_value, 0|(1<f_imm_12_s4); + break; case M32C_OPERAND_IMM_13_U3 : length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_imm_13_u3); break; @@ -2465,6 +2489,9 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_IMM_8_S4 : length = extract_normal (cd, ex_info, insn_value, 0|(1<f_imm_8_s4); break; + case M32C_OPERAND_IMM_8_S4N : + length = extract_normal (cd, ex_info, insn_value, 0|(1<f_imm_8_s4); + break; case M32C_OPERAND_IMM_SH_12_S4 : length = extract_normal (cd, ex_info, insn_value, 0|(1<f_imm_12_s4); break; @@ -2977,6 +3004,9 @@ m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_DSP_48_U8 : value = fields->f_dsp_48_u8; break; + case M32C_OPERAND_DSP_8_S24 : + value = fields->f_dsp_8_s24; + break; case M32C_OPERAND_DSP_8_S8 : value = fields->f_dsp_8_s8; break; @@ -3088,6 +3118,9 @@ m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_IMM_12_S4 : value = fields->f_imm_12_s4; break; + case M32C_OPERAND_IMM_12_S4N : + value = fields->f_imm_12_s4; + break; case M32C_OPERAND_IMM_13_U3 : value = fields->f_imm_13_u3; break; @@ -3157,6 +3190,9 @@ m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_IMM_8_S4 : value = fields->f_imm_8_s4; break; + case M32C_OPERAND_IMM_8_S4N : + value = fields->f_imm_8_s4; + break; case M32C_OPERAND_IMM_SH_12_S4 : value = fields->f_imm_12_s4; break; @@ -3558,6 +3594,9 @@ m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_DSP_48_U8 : value = fields->f_dsp_48_u8; break; + case M32C_OPERAND_DSP_8_S24 : + value = fields->f_dsp_8_s24; + break; case M32C_OPERAND_DSP_8_S8 : value = fields->f_dsp_8_s8; break; @@ -3669,6 +3708,9 @@ m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_IMM_12_S4 : value = fields->f_imm_12_s4; break; + case M32C_OPERAND_IMM_12_S4N : + value = fields->f_imm_12_s4; + break; case M32C_OPERAND_IMM_13_U3 : value = fields->f_imm_13_u3; break; @@ -3738,6 +3780,9 @@ m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_IMM_8_S4 : value = fields->f_imm_8_s4; break; + case M32C_OPERAND_IMM_8_S4N : + value = fields->f_imm_8_s4; + break; case M32C_OPERAND_IMM_SH_12_S4 : value = fields->f_imm_12_s4; break; @@ -4144,6 +4189,9 @@ m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_DSP_48_U8 : fields->f_dsp_48_u8 = value; break; + case M32C_OPERAND_DSP_8_S24 : + fields->f_dsp_8_s24 = value; + break; case M32C_OPERAND_DSP_8_S8 : fields->f_dsp_8_s8 = value; break; @@ -4252,6 +4300,9 @@ m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_IMM_12_S4 : fields->f_imm_12_s4 = value; break; + case M32C_OPERAND_IMM_12_S4N : + fields->f_imm_12_s4 = value; + break; case M32C_OPERAND_IMM_13_U3 : fields->f_imm_13_u3 = value; break; @@ -4321,6 +4372,9 @@ m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_IMM_8_S4 : fields->f_imm_8_s4 = value; break; + case M32C_OPERAND_IMM_8_S4N : + fields->f_imm_8_s4 = value; + break; case M32C_OPERAND_IMM_SH_12_S4 : fields->f_imm_12_s4 = value; break; @@ -4703,6 +4757,9 @@ m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_DSP_48_U8 : fields->f_dsp_48_u8 = value; break; + case M32C_OPERAND_DSP_8_S24 : + fields->f_dsp_8_s24 = value; + break; case M32C_OPERAND_DSP_8_S8 : fields->f_dsp_8_s8 = value; break; @@ -4811,6 +4868,9 @@ m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_IMM_12_S4 : fields->f_imm_12_s4 = value; break; + case M32C_OPERAND_IMM_12_S4N : + fields->f_imm_12_s4 = value; + break; case M32C_OPERAND_IMM_13_U3 : fields->f_imm_13_u3 = value; break; @@ -4880,6 +4940,9 @@ m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, case M32C_OPERAND_IMM_8_S4 : fields->f_imm_8_s4 = value; break; + case M32C_OPERAND_IMM_8_S4N : + fields->f_imm_8_s4 = value; + break; case M32C_OPERAND_IMM_SH_12_S4 : fields->f_imm_12_s4 = value; break; diff --git a/opcodes/m32c-opc.c b/opcodes/m32c-opc.c index eeb7321f7d1..0913c2cb22b 100644 --- a/opcodes/m32c-opc.c +++ b/opcodes/m32c-opc.c @@ -44,6 +44,10 @@ m32c_asm_hash (const char *mnem) if (mnem[0] == 's' && mnem[1] == 'c') return 's'; + /* Don't hash bmCND */ + if (mnem[0] == 'b' && mnem[1] == 'm') + return 'b'; + for (h = 0; *mnem && *mnem != ' ' && *mnem != ':'; ++mnem) h += *mnem; return h % CGEN_ASM_HASH_SIZE; @@ -2825,39 +2829,39 @@ static const CGEN_IFMT ifmt_xchg16w_r3_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED 32, 32, 0xffff0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_2) }, { F (F_10_2) }, { 0 } } }; -static const CGEN_IFMT ifmt_xchg16w_r0_dst16_Rn_direct_QI ATTRIBUTE_UNUSED = { +static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_Rn_direct_QI ATTRIBUTE_UNUSED = { 16, 16, 0xfffc, { { F (F_0_4) }, { F (F_12_2) }, { F (F_DST16_RN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_2) }, { F (F_10_2) }, { 0 } } }; -static const CGEN_IFMT ifmt_xchg16w_r0_dst16_An_direct_QI ATTRIBUTE_UNUSED = { +static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_An_direct_QI ATTRIBUTE_UNUSED = { 16, 16, 0xfffe, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_2) }, { F (F_10_2) }, { 0 } } }; -static const CGEN_IFMT ifmt_xchg16w_r0_dst16_An_indirect_QI ATTRIBUTE_UNUSED = { +static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_An_indirect_QI ATTRIBUTE_UNUSED = { 16, 16, 0xfffe, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_2) }, { F (F_10_2) }, { 0 } } }; -static const CGEN_IFMT ifmt_xchg16w_r0_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED = { +static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED = { 24, 24, 0xfffe00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U8) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_2) }, { F (F_10_2) }, { 0 } } }; -static const CGEN_IFMT ifmt_xchg16w_r0_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED = { +static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED = { 32, 32, 0xfffe0000, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U16) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_2) }, { F (F_10_2) }, { 0 } } }; -static const CGEN_IFMT ifmt_xchg16w_r0_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED = { +static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED = { 24, 24, 0xffff00, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_2) }, { F (F_10_2) }, { 0 } } }; -static const CGEN_IFMT ifmt_xchg16w_r0_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED = { +static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED = { 32, 32, 0xffff0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_2) }, { F (F_10_2) }, { 0 } } }; -static const CGEN_IFMT ifmt_xchg16w_r0_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED = { +static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED = { 24, 24, 0xffff00, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_2) }, { F (F_10_2) }, { 0 } } }; -static const CGEN_IFMT ifmt_xchg16w_r0_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED = { +static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED = { 32, 32, 0xffff0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_2) }, { F (F_10_2) }, { 0 } } }; @@ -5621,6 +5625,26 @@ static const CGEN_IFMT ifmt_push16_b_s_rn_Rn16_push_S_derived ATTRIBUTE_UNUSED = 8, 8, 0xf7, { { F (F_0_4) }, { F (F_4_1) }, { F (F_5_3) }, { 0 } } }; +static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_R0l_direct_QI ATTRIBUTE_UNUSED = { + 8, 8, 0xff, { { F (F_0_4) }, { F (F_5_3) }, { F (F_4_1) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_R0h_direct_QI ATTRIBUTE_UNUSED = { + 8, 8, 0xff, { { F (F_0_4) }, { F (F_5_3) }, { F (F_4_1) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_8_8_SB_relative_QI ATTRIBUTE_UNUSED = { + 16, 16, 0xff00, { { F (F_0_4) }, { F (F_5_3) }, { F (F_DSP_8_U8) }, { F (F_4_1) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_8_8_FB_relative_QI ATTRIBUTE_UNUSED = { + 16, 16, 0xff00, { { F (F_0_4) }, { F (F_5_3) }, { F (F_DSP_8_S8) }, { F (F_4_1) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_8_16_absolute_QI ATTRIBUTE_UNUSED = { + 24, 24, 0xff0000, { { F (F_0_4) }, { F (F_5_3) }, { F (F_DSP_8_U16) }, { F (F_4_1) }, { 0 } } +}; + static const CGEN_IFMT ifmt_mulex_dst32_R3_direct_Unprefixed_HI ATTRIBUTE_UNUSED = { 16, 16, 0xffff, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } }; @@ -5714,171 +5738,171 @@ static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_24_absolute_Unprefixed_Mova_S }; static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED = { - 32, 32, 0xffbf0000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DSP_16_U8) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_24_U8) }, { 0 } } + 32, 32, 0xffbf0000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DSP_16_U8) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_24_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED = { - 32, 32, 0xffff0000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U8) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_24_U8) }, { 0 } } + 32, 32, 0xffff0000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U8) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_24_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED = { - 32, 32, 0xffff0000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_S8) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_24_U8) }, { 0 } } + 32, 32, 0xffff0000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_S8) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_24_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED = { - 32, 40, 0xffbf0000, { { F (F_0_4) }, { F (F_DSP_32_U8) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DSP_16_U16) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } + 32, 40, 0xffbf0000, { { F (F_0_4) }, { F (F_DSP_32_S8) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DSP_16_U16) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED = { - 32, 40, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_U8) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U16) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } + 32, 40, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_S8) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U16) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED = { - 32, 40, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_U8) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_S16) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } + 32, 40, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_S8) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_S16) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED = { - 32, 40, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_U8) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U16) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } + 32, 40, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_S8) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U16) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED = { - 32, 48, 0xffbf0000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DSP_16_U24) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_DSP_40_U8) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } + 32, 48, 0xffbf0000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DSP_16_U24) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_DSP_40_S8) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED = { - 32, 48, 0xffff0000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U24) }, { F (F_7_1) }, { F (F_DSP_40_U8) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } + 32, 48, 0xffff0000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U24) }, { F (F_7_1) }, { F (F_DSP_40_S8) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED = { - 24, 24, 0xff3f00, { { F (F_0_4) }, { F (F_4_3) }, { F (F_DST32_RN_UNPREFIXED_HI) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_16_U8) }, { 0 } } + 24, 24, 0xff3f00, { { F (F_0_4) }, { F (F_4_3) }, { F (F_DST32_RN_UNPREFIXED_HI) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED = { - 24, 24, 0xffbf00, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_16_U8) }, { 0 } } + 24, 24, 0xffbf00, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED = { - 24, 24, 0xffbf00, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_16_U8) }, { 0 } } + 24, 24, 0xffbf00, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED = { - 32, 32, 0xffbf0000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DSP_16_U8) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_24_U8) }, { 0 } } + 32, 32, 0xffbf0000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DSP_16_U8) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_24_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED = { - 32, 32, 0xffff0000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U8) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_24_U8) }, { 0 } } + 32, 32, 0xffff0000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U8) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_24_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED = { - 32, 32, 0xffff0000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_S8) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_24_U8) }, { 0 } } + 32, 32, 0xffff0000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_S8) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_24_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED = { - 32, 40, 0xffbf0000, { { F (F_0_4) }, { F (F_DSP_32_U8) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DSP_16_U16) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } + 32, 40, 0xffbf0000, { { F (F_0_4) }, { F (F_DSP_32_S8) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DSP_16_U16) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED = { - 32, 40, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_U8) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U16) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } + 32, 40, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_S8) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U16) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED = { - 32, 40, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_U8) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_S16) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } + 32, 40, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_S8) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_S16) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED = { - 32, 40, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_U8) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U16) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } + 32, 40, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_S8) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U16) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED = { - 32, 48, 0xffbf0000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DSP_16_U24) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_DSP_40_U8) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } + 32, 48, 0xffbf0000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DSP_16_U24) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_DSP_40_S8) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED = { - 32, 48, 0xffff0000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U24) }, { F (F_7_1) }, { F (F_DSP_40_U8) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } + 32, 48, 0xffff0000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U24) }, { F (F_7_1) }, { F (F_DSP_40_S8) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED = { - 24, 24, 0xff3f00, { { F (F_0_4) }, { F (F_4_3) }, { F (F_DST32_RN_UNPREFIXED_QI) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_16_U8) }, { 0 } } + 24, 24, 0xff3f00, { { F (F_0_4) }, { F (F_4_3) }, { F (F_DST32_RN_UNPREFIXED_QI) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED = { - 24, 24, 0xffbf00, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_16_U8) }, { 0 } } + 24, 24, 0xffbf00, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED = { - 24, 24, 0xffbf00, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_16_U8) }, { 0 } } + 24, 24, 0xffbf00, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED = { - 32, 32, 0xfffe0000, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U8) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_24_U8) }, { 0 } } + 32, 32, 0xfffe0000, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U8) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_24_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED = { - 32, 32, 0xffff0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_24_U8) }, { 0 } } + 32, 32, 0xffff0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_24_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED = { - 32, 32, 0xffff0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_24_U8) }, { 0 } } + 32, 32, 0xffff0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_24_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED = { - 32, 40, 0xfffe0000, { { F (F_0_4) }, { F (F_DSP_32_U8) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U16) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } + 32, 40, 0xfffe0000, { { F (F_0_4) }, { F (F_DSP_32_S8) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U16) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED = { - 32, 40, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_U8) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } + 32, 40, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_S8) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED = { - 32, 40, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_U8) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } + 32, 40, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_S8) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_basic_dst16_Rn_direct_HI ATTRIBUTE_UNUSED = { - 24, 24, 0xfffc00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_DST16_RN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_16_U8) }, { 0 } } + 24, 24, 0xfffc00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_DST16_RN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_16_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_basic_dst16_An_direct_HI ATTRIBUTE_UNUSED = { - 24, 24, 0xfffe00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_16_U8) }, { 0 } } + 24, 24, 0xfffe00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_16_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_basic_dst16_An_indirect_HI ATTRIBUTE_UNUSED = { - 24, 24, 0xfffe00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_16_U8) }, { 0 } } + 24, 24, 0xfffe00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_16_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED = { - 32, 32, 0xfffe0000, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U8) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_24_U8) }, { 0 } } + 32, 32, 0xfffe0000, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U8) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_24_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED = { - 32, 32, 0xffff0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_24_U8) }, { 0 } } + 32, 32, 0xffff0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_24_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED = { - 32, 32, 0xffff0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_24_U8) }, { 0 } } + 32, 32, 0xffff0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_24_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED = { - 32, 40, 0xfffe0000, { { F (F_0_4) }, { F (F_DSP_32_U8) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U16) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } + 32, 40, 0xfffe0000, { { F (F_0_4) }, { F (F_DSP_32_S8) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U16) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED = { - 32, 40, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_U8) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } + 32, 40, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_S8) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED = { - 32, 40, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_U8) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } + 32, 40, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_S8) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_basic_dst16_Rn_direct_QI ATTRIBUTE_UNUSED = { - 24, 24, 0xfffc00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_DST16_RN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_16_U8) }, { 0 } } + 24, 24, 0xfffc00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_DST16_RN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_16_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_basic_dst16_An_direct_QI ATTRIBUTE_UNUSED = { - 24, 24, 0xfffe00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_16_U8) }, { 0 } } + 24, 24, 0xfffe00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_16_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_basic_dst16_An_indirect_QI ATTRIBUTE_UNUSED = { - 24, 24, 0xfffe00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_16_U8) }, { 0 } } + 24, 24, 0xfffe00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { F (F_DSP_16_S8) }, { 0 } } }; static const CGEN_IFMT ifmt_mov32_sz_dst32_2_S_8_a1_dst32_2_S_8_SB_relative_SI ATTRIBUTE_UNUSED = { @@ -5917,7 +5941,7 @@ static const CGEN_IFMT ifmt_mov32_b_r0l_dst32_2_S_16_dst32_2_S_16_absolute_QI AT 24, 24, 0xff0000, { { F (F_0_2) }, { F (F_2_2) }, { F (F_DSP_8_U16) }, { F (F_4_3) }, { F (F_7_1) }, { 0 } } }; -static const CGEN_IFMT ifmt_mov32_w_dst32_2_S_basic_r1l_dst32_2_S_R0_direct_HI ATTRIBUTE_UNUSED = { +static const CGEN_IFMT ifmt_mov32_w_dst32_2_S_basic_r1_dst32_2_S_R0_direct_HI ATTRIBUTE_UNUSED = { 8, 8, 0xff, { { F (F_0_2) }, { F (F_2_2) }, { F (F_4_3) }, { F (F_7_1) }, { 0 } } }; @@ -6529,26 +6553,6 @@ static const CGEN_IFMT ifmt_mov16_b_S_An_src16_2_S_16_absolute_QI ATTRIBUTE_UNUS 24, 24, 0xfb0000, { { F (F_0_4) }, { F (F_6_2) }, { F (F_DSP_8_U16) }, { F (F_4_1) }, { F (F_DST16_RN_QI_S) }, { 0 } } }; -static const CGEN_IFMT ifmt_mov16_b_Z_imm8_dst3_dst16_3_S_R0l_direct_QI ATTRIBUTE_UNUSED = { - 8, 8, 0xff, { { F (F_0_4) }, { F (F_5_3) }, { F (F_4_1) }, { 0 } } -}; - -static const CGEN_IFMT ifmt_mov16_b_Z_imm8_dst3_dst16_3_S_R0h_direct_QI ATTRIBUTE_UNUSED = { - 8, 8, 0xff, { { F (F_0_4) }, { F (F_5_3) }, { F (F_4_1) }, { 0 } } -}; - -static const CGEN_IFMT ifmt_mov16_b_Z_imm8_dst3_dst16_3_S_8_8_SB_relative_QI ATTRIBUTE_UNUSED = { - 16, 16, 0xff00, { { F (F_0_4) }, { F (F_5_3) }, { F (F_DSP_8_U8) }, { F (F_4_1) }, { 0 } } -}; - -static const CGEN_IFMT ifmt_mov16_b_Z_imm8_dst3_dst16_3_S_8_8_FB_relative_QI ATTRIBUTE_UNUSED = { - 16, 16, 0xff00, { { F (F_0_4) }, { F (F_5_3) }, { F (F_DSP_8_S8) }, { F (F_4_1) }, { 0 } } -}; - -static const CGEN_IFMT ifmt_mov16_b_Z_imm8_dst3_dst16_3_S_8_16_absolute_QI ATTRIBUTE_UNUSED = { - 24, 24, 0xff0000, { { F (F_0_4) }, { F (F_5_3) }, { F (F_DSP_8_U16) }, { F (F_4_1) }, { 0 } } -}; - static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED = { 16, 16, 0xff30, { { F (F_0_3) }, { F (F_4_3) }, { F (F_DST32_RN_UNPREFIXED_HI) }, { F (F_3_1) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { 0 } } }; @@ -6729,75 +6733,75 @@ static const CGEN_IFMT ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_absolute_ 32, 72, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_40_S32) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U24) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } } }; -static const CGEN_IFMT ifmt_ste16_w_dst_dspsp_16_8_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED = { - 32, 48, 0xfffe0000, { { F (F_0_4) }, { F (F_DSP_24_U24) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U8) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } +static const CGEN_IFMT ifmt_ste_w_16_16_u20a0_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED = { + 32, 56, 0xfffe0000, { { F (F_0_4) }, { F (F_DSP_32_U24) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U16) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; -static const CGEN_IFMT ifmt_ste16_w_dst_dspsp_16_8_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED = { - 32, 48, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_24_U24) }, { F (F_12_4) }, { F (F_DSP_16_U8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } +static const CGEN_IFMT ifmt_ste_w_16_16_u20a0_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED = { + 32, 56, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_U24) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; -static const CGEN_IFMT ifmt_ste16_w_dst_dspsp_16_8_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED = { - 32, 48, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_24_U24) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } +static const CGEN_IFMT ifmt_ste_w_16_16_u20a0_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED = { + 32, 56, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_U24) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; -static const CGEN_IFMT ifmt_ste16_w_dst_dspsp_16_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED = { - 32, 56, 0xfffe0000, { { F (F_0_4) }, { F (F_DSP_32_U24) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U16) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } +static const CGEN_IFMT ifmt_ste_w_16_8_u20a0_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED = { + 32, 48, 0xfffe0000, { { F (F_0_4) }, { F (F_DSP_24_U24) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U8) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; -static const CGEN_IFMT ifmt_ste16_w_dst_dspsp_16_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED = { - 32, 56, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_U24) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } +static const CGEN_IFMT ifmt_ste_w_16_8_u20a0_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED = { + 32, 48, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_24_U24) }, { F (F_12_4) }, { F (F_DSP_16_U8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; -static const CGEN_IFMT ifmt_ste16_w_dst_dspsp_16_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED = { - 32, 56, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_U24) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } +static const CGEN_IFMT ifmt_ste_w_16_8_u20a0_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED = { + 32, 48, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_24_U24) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; -static const CGEN_IFMT ifmt_ste16_w_dst_dspsp_basic_dst16_Rn_direct_HI ATTRIBUTE_UNUSED = { +static const CGEN_IFMT ifmt_ste_w_basic_u20a0_dst16_Rn_direct_HI ATTRIBUTE_UNUSED = { 32, 40, 0xfffc0000, { { F (F_0_4) }, { F (F_DSP_16_U24) }, { F (F_12_2) }, { F (F_DST16_RN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; -static const CGEN_IFMT ifmt_ste16_w_dst_dspsp_basic_dst16_An_direct_HI ATTRIBUTE_UNUSED = { +static const CGEN_IFMT ifmt_ste_w_basic_u20a0_dst16_An_direct_HI ATTRIBUTE_UNUSED = { 32, 40, 0xfffe0000, { { F (F_0_4) }, { F (F_DSP_16_U24) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; -static const CGEN_IFMT ifmt_ste16_w_dst_dspsp_basic_dst16_An_indirect_HI ATTRIBUTE_UNUSED = { +static const CGEN_IFMT ifmt_ste_w_basic_u20a0_dst16_An_indirect_HI ATTRIBUTE_UNUSED = { 32, 40, 0xfffe0000, { { F (F_0_4) }, { F (F_DSP_16_U24) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; -static const CGEN_IFMT ifmt_ste16_b_dst_dspsp_16_8_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED = { - 32, 48, 0xfffe0000, { { F (F_0_4) }, { F (F_DSP_24_U24) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U8) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } +static const CGEN_IFMT ifmt_ste_b_16_16_u20a0_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED = { + 32, 56, 0xfffe0000, { { F (F_0_4) }, { F (F_DSP_32_U24) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U16) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; -static const CGEN_IFMT ifmt_ste16_b_dst_dspsp_16_8_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED = { - 32, 48, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_24_U24) }, { F (F_12_4) }, { F (F_DSP_16_U8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } +static const CGEN_IFMT ifmt_ste_b_16_16_u20a0_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED = { + 32, 56, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_U24) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; -static const CGEN_IFMT ifmt_ste16_b_dst_dspsp_16_8_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED = { - 32, 48, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_24_U24) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } +static const CGEN_IFMT ifmt_ste_b_16_16_u20a0_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED = { + 32, 56, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_U24) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; -static const CGEN_IFMT ifmt_ste16_b_dst_dspsp_16_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED = { - 32, 56, 0xfffe0000, { { F (F_0_4) }, { F (F_DSP_32_U24) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U16) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } +static const CGEN_IFMT ifmt_ste_b_16_8_u20a0_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED = { + 32, 48, 0xfffe0000, { { F (F_0_4) }, { F (F_DSP_24_U24) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U8) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; -static const CGEN_IFMT ifmt_ste16_b_dst_dspsp_16_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED = { - 32, 56, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_U24) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } +static const CGEN_IFMT ifmt_ste_b_16_8_u20a0_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED = { + 32, 48, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_24_U24) }, { F (F_12_4) }, { F (F_DSP_16_U8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; -static const CGEN_IFMT ifmt_ste16_b_dst_dspsp_16_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED = { - 32, 56, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_32_U24) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } +static const CGEN_IFMT ifmt_ste_b_16_8_u20a0_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED = { + 32, 48, 0xffff0000, { { F (F_0_4) }, { F (F_DSP_24_U24) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; -static const CGEN_IFMT ifmt_ste16_b_dst_dspsp_basic_dst16_Rn_direct_QI ATTRIBUTE_UNUSED = { +static const CGEN_IFMT ifmt_ste_b_basic_u20a0_dst16_Rn_direct_QI ATTRIBUTE_UNUSED = { 32, 40, 0xfffc0000, { { F (F_0_4) }, { F (F_DSP_16_U24) }, { F (F_12_2) }, { F (F_DST16_RN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; -static const CGEN_IFMT ifmt_ste16_b_dst_dspsp_basic_dst16_An_direct_QI ATTRIBUTE_UNUSED = { +static const CGEN_IFMT ifmt_ste_b_basic_u20a0_dst16_An_direct_QI ATTRIBUTE_UNUSED = { 32, 40, 0xfffe0000, { { F (F_0_4) }, { F (F_DSP_16_U24) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; -static const CGEN_IFMT ifmt_ste16_b_dst_dspsp_basic_dst16_An_indirect_QI ATTRIBUTE_UNUSED = { +static const CGEN_IFMT ifmt_ste_b_basic_u20a0_dst16_An_indirect_QI ATTRIBUTE_UNUSED = { 32, 40, 0xfffe0000, { { F (F_0_4) }, { F (F_DSP_16_U24) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_8_4) }, { 0 } } }; @@ -7441,6 +7445,174 @@ static const CGEN_IFMT ifmt_bm16_bit16_16_basic_cond16_16_bit16_An_indirect ATTR 24, 24, 0xfffe00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_DSP_16_U8) }, { 0 } } }; +static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED = { + 32, 32, 0xffb00000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DSP_16_U8) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { F (F_LAB_24_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED = { + 32, 32, 0xfff00000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U8) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { F (F_LAB_24_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED = { + 32, 32, 0xfff00000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_S8) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { F (F_LAB_24_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED = { + 32, 40, 0xffb00000, { { F (F_0_4) }, { F (F_LAB_32_8) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DSP_16_U16) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED = { + 32, 40, 0xfff00000, { { F (F_0_4) }, { F (F_LAB_32_8) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U16) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED = { + 32, 40, 0xfff00000, { { F (F_0_4) }, { F (F_LAB_32_8) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_S16) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED = { + 32, 40, 0xfff00000, { { F (F_0_4) }, { F (F_LAB_32_8) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U16) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED = { + 32, 48, 0xffb00000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DSP_16_U24) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_LAB_40_8) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED = { + 32, 48, 0xfff00000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U24) }, { F (F_7_1) }, { F (F_LAB_40_8) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED = { + 24, 24, 0xff3000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_DST32_RN_UNPREFIXED_HI) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED = { + 24, 24, 0xffb000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED = { + 24, 24, 0xffb000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED = { + 32, 32, 0xffb00000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DSP_16_U8) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { F (F_LAB_24_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED = { + 32, 32, 0xfff00000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U8) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { F (F_LAB_24_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED = { + 32, 32, 0xfff00000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_S8) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { F (F_LAB_24_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED = { + 32, 40, 0xffb00000, { { F (F_0_4) }, { F (F_LAB_32_8) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DSP_16_U16) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED = { + 32, 40, 0xfff00000, { { F (F_0_4) }, { F (F_LAB_32_8) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U16) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED = { + 32, 40, 0xfff00000, { { F (F_0_4) }, { F (F_LAB_32_8) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_S16) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED = { + 32, 40, 0xfff00000, { { F (F_0_4) }, { F (F_LAB_32_8) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U16) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED = { + 32, 48, 0xffb00000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DSP_16_U24) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_LAB_40_8) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED = { + 32, 48, 0xfff00000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U24) }, { F (F_7_1) }, { F (F_LAB_40_8) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED = { + 24, 24, 0xff3000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_DST32_RN_UNPREFIXED_QI) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED = { + 24, 24, 0xffb000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED = { + 24, 24, 0xffb000, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_1) }, { F (F_DST32_AN_UNPREFIXED) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_8_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED = { + 32, 32, 0xff0e0000, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U8) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_8_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED = { + 32, 32, 0xff0f0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_8_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED = { + 32, 32, 0xff0f0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED = { + 32, 40, 0xff0e0000, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U16) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED = { + 32, 40, 0xff0f0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED = { + 32, 40, 0xff0f0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz16_w_imm4_basic_dst16_Rn_direct_HI ATTRIBUTE_UNUSED = { + 24, 24, 0xff0c00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_DST16_RN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz16_w_imm4_basic_dst16_An_direct_HI ATTRIBUTE_UNUSED = { + 24, 24, 0xff0e00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz16_w_imm4_basic_dst16_An_indirect_HI ATTRIBUTE_UNUSED = { + 24, 24, 0xff0e00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_8_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED = { + 32, 32, 0xff0e0000, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U8) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_8_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED = { + 32, 32, 0xff0f0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_8_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED = { + 32, 32, 0xff0f0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED = { + 32, 40, 0xff0e0000, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U16) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED = { + 32, 40, 0xff0f0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED = { + 32, 40, 0xff0f0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz16_b_imm4_basic_dst16_Rn_direct_QI ATTRIBUTE_UNUSED = { + 24, 24, 0xff0c00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_DST16_RN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz16_b_imm4_basic_dst16_An_direct_QI ATTRIBUTE_UNUSED = { + 24, 24, 0xff0e00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_adjnz16_b_imm4_basic_dst16_An_indirect_QI ATTRIBUTE_UNUSED = { + 24, 24, 0xff0e00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { F (F_LAB_16_8) }, { 0 } } +}; + static const CGEN_IFMT ifmt_add32_l_s_imm1_S_an_dst32_1_S_A0_direct_HI ATTRIBUTE_UNUSED = { 8, 8, 0xdf, { { F (F_0_2) }, { F (F_7_1) }, { F (F_IMM1_S) }, { F (F_3_4) }, { 0 } } }; @@ -7497,7 +7669,7 @@ static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Un 32, 40, 0xfff00000, { { F (F_0_3) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U24) }, { F (F_3_1) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { 0 } } }; -static const CGEN_IFMT ifmt_add16_Q_sp ATTRIBUTE_UNUSED = { +static const CGEN_IFMT ifmt_add16_wQ_sp ATTRIBUTE_UNUSED = { 16, 16, 0xfff0, { { F (F_0_4) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_IMM_12_S4) }, { 0 } } }; @@ -7638,7 +7810,7 @@ static const CGEN_IFMT ifmt_mov16_w_S_imm_a0 ATTRIBUTE_UNUSED = { }; static const CGEN_IFMT ifmt_mov32_l_a0 ATTRIBUTE_UNUSED = { - 32, 32, 0xff000000, { { F (F_0_4) }, { F (F_4_4) }, { F (F_DSP_8_U24) }, { 0 } } + 32, 32, 0xff000000, { { F (F_0_4) }, { F (F_4_4) }, { F (F_DSP_8_S24) }, { 0 } } }; static const CGEN_IFMT ifmt_popc16_imm16 ATTRIBUTE_UNUSED = { @@ -7677,6 +7849,10 @@ static const CGEN_IFMT ifmt_stzx16_imm8_imm8_dsp8sb ATTRIBUTE_UNUSED = { 32, 32, 0xff000000, { { F (F_0_4) }, { F (F_4_4) }, { F (F_DSP_8_S8) }, { F (F_DSP_16_U8) }, { F (F_DSP_24_S8) }, { 0 } } }; +static const CGEN_IFMT ifmt_stzx16_imm8_imm8_dsp8fb ATTRIBUTE_UNUSED = { + 32, 32, 0xff000000, { { F (F_0_4) }, { F (F_4_4) }, { F (F_DSP_8_S8) }, { F (F_DSP_16_S8) }, { F (F_DSP_24_S8) }, { 0 } } +}; + static const CGEN_IFMT ifmt_stzx16_imm8_imm8_abs16 ATTRIBUTE_UNUSED = { 32, 40, 0xff000000, { { F (F_0_4) }, { F (F_DSP_32_S8) }, { F (F_4_4) }, { F (F_DSP_8_S8) }, { F (F_DSP_16_U16) }, { 0 } } }; @@ -13458,275 +13634,275 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, ' ', 'r', '1', ',', OP (DSP_16_U16), 0 } }, & ifmt_xchg16w_r3_dst16_16_16_absolute_HI, { 0x7b1f0000 } }, -/* xchg.w r0,$Dst16RnQI */ +/* xchg.w r0,$Dst16RnHI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', 'r', '0', ',', OP (DST16RNQI), 0 } }, - & ifmt_xchg16w_r0_dst16_Rn_direct_QI, { 0x7b00 } + { { MNEM, ' ', 'r', '0', ',', OP (DST16RNHI), 0 } }, + & ifmt_xchg16w_r3_dst16_Rn_direct_HI, { 0x7b00 } }, -/* xchg.w r0,$Dst16AnQI */ +/* xchg.w r0,$Dst16AnHI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', 'r', '0', ',', OP (DST16ANQI), 0 } }, - & ifmt_xchg16w_r0_dst16_An_direct_QI, { 0x7b04 } + { { MNEM, ' ', 'r', '0', ',', OP (DST16ANHI), 0 } }, + & ifmt_xchg16w_r3_dst16_An_direct_HI, { 0x7b04 } }, /* xchg.w r0,[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', ',', '[', OP (DST16AN), ']', 0 } }, - & ifmt_xchg16w_r0_dst16_An_indirect_QI, { 0x7b06 } + & ifmt_xchg16w_r3_dst16_An_indirect_HI, { 0x7b06 } }, /* xchg.w r0,${Dsp-16-u8}[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_8_An_relative_QI, { 0x7b0800 } + & ifmt_xchg16w_r3_dst16_16_8_An_relative_HI, { 0x7b0800 } }, /* xchg.w r0,${Dsp-16-u16}[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_16_An_relative_QI, { 0x7b0c0000 } + & ifmt_xchg16w_r3_dst16_16_16_An_relative_HI, { 0x7b0c0000 } }, /* xchg.w r0,${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_8_SB_relative_QI, { 0x7b0a00 } + & ifmt_xchg16w_r3_dst16_16_8_SB_relative_HI, { 0x7b0a00 } }, /* xchg.w r0,${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_16_SB_relative_QI, { 0x7b0e0000 } + & ifmt_xchg16w_r3_dst16_16_16_SB_relative_HI, { 0x7b0e0000 } }, /* xchg.w r0,${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_8_FB_relative_QI, { 0x7b0b00 } + & ifmt_xchg16w_r3_dst16_16_8_FB_relative_HI, { 0x7b0b00 } }, /* xchg.w r0,${Dsp-16-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', ',', OP (DSP_16_U16), 0 } }, - & ifmt_xchg16w_r0_dst16_16_16_absolute_QI, { 0x7b0f0000 } + & ifmt_xchg16w_r3_dst16_16_16_absolute_HI, { 0x7b0f0000 } }, /* xchg.b r1h,$Dst16RnQI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DST16RNQI), 0 } }, - & ifmt_xchg16w_r0_dst16_Rn_direct_QI, { 0x7a30 } + & ifmt_xchg16b_r1h_dst16_Rn_direct_QI, { 0x7a30 } }, /* xchg.b r1h,$Dst16AnQI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DST16ANQI), 0 } }, - & ifmt_xchg16w_r0_dst16_An_direct_QI, { 0x7a34 } + & ifmt_xchg16b_r1h_dst16_An_direct_QI, { 0x7a34 } }, /* xchg.b r1h,[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN), ']', 0 } }, - & ifmt_xchg16w_r0_dst16_An_indirect_QI, { 0x7a36 } + & ifmt_xchg16b_r1h_dst16_An_indirect_QI, { 0x7a36 } }, /* xchg.b r1h,${Dsp-16-u8}[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_8_An_relative_QI, { 0x7a3800 } + & ifmt_xchg16b_r1h_dst16_16_8_An_relative_QI, { 0x7a3800 } }, /* xchg.b r1h,${Dsp-16-u16}[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_16_An_relative_QI, { 0x7a3c0000 } + & ifmt_xchg16b_r1h_dst16_16_16_An_relative_QI, { 0x7a3c0000 } }, /* xchg.b r1h,${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_8_SB_relative_QI, { 0x7a3a00 } + & ifmt_xchg16b_r1h_dst16_16_8_SB_relative_QI, { 0x7a3a00 } }, /* xchg.b r1h,${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_16_SB_relative_QI, { 0x7a3e0000 } + & ifmt_xchg16b_r1h_dst16_16_16_SB_relative_QI, { 0x7a3e0000 } }, /* xchg.b r1h,${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_8_FB_relative_QI, { 0x7a3b00 } + & ifmt_xchg16b_r1h_dst16_16_8_FB_relative_QI, { 0x7a3b00 } }, /* xchg.b r1h,${Dsp-16-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16), 0 } }, - & ifmt_xchg16w_r0_dst16_16_16_absolute_QI, { 0x7a3f0000 } + & ifmt_xchg16b_r1h_dst16_16_16_absolute_QI, { 0x7a3f0000 } }, /* xchg.b r1l,$Dst16RnQI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'l', ',', OP (DST16RNQI), 0 } }, - & ifmt_xchg16w_r0_dst16_Rn_direct_QI, { 0x7a20 } + & ifmt_xchg16b_r1h_dst16_Rn_direct_QI, { 0x7a20 } }, /* xchg.b r1l,$Dst16AnQI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'l', ',', OP (DST16ANQI), 0 } }, - & ifmt_xchg16w_r0_dst16_An_direct_QI, { 0x7a24 } + & ifmt_xchg16b_r1h_dst16_An_direct_QI, { 0x7a24 } }, /* xchg.b r1l,[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'l', ',', '[', OP (DST16AN), ']', 0 } }, - & ifmt_xchg16w_r0_dst16_An_indirect_QI, { 0x7a26 } + & ifmt_xchg16b_r1h_dst16_An_indirect_QI, { 0x7a26 } }, /* xchg.b r1l,${Dsp-16-u8}[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'l', ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_8_An_relative_QI, { 0x7a2800 } + & ifmt_xchg16b_r1h_dst16_16_8_An_relative_QI, { 0x7a2800 } }, /* xchg.b r1l,${Dsp-16-u16}[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_16_An_relative_QI, { 0x7a2c0000 } + & ifmt_xchg16b_r1h_dst16_16_16_An_relative_QI, { 0x7a2c0000 } }, /* xchg.b r1l,${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'l', ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_8_SB_relative_QI, { 0x7a2a00 } + & ifmt_xchg16b_r1h_dst16_16_8_SB_relative_QI, { 0x7a2a00 } }, /* xchg.b r1l,${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_16_SB_relative_QI, { 0x7a2e0000 } + & ifmt_xchg16b_r1h_dst16_16_16_SB_relative_QI, { 0x7a2e0000 } }, /* xchg.b r1l,${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'l', ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_8_FB_relative_QI, { 0x7a2b00 } + & ifmt_xchg16b_r1h_dst16_16_8_FB_relative_QI, { 0x7a2b00 } }, /* xchg.b r1l,${Dsp-16-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16), 0 } }, - & ifmt_xchg16w_r0_dst16_16_16_absolute_QI, { 0x7a2f0000 } + & ifmt_xchg16b_r1h_dst16_16_16_absolute_QI, { 0x7a2f0000 } }, /* xchg.b r0h,$Dst16RnQI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'h', ',', OP (DST16RNQI), 0 } }, - & ifmt_xchg16w_r0_dst16_Rn_direct_QI, { 0x7a10 } + & ifmt_xchg16b_r1h_dst16_Rn_direct_QI, { 0x7a10 } }, /* xchg.b r0h,$Dst16AnQI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'h', ',', OP (DST16ANQI), 0 } }, - & ifmt_xchg16w_r0_dst16_An_direct_QI, { 0x7a14 } + & ifmt_xchg16b_r1h_dst16_An_direct_QI, { 0x7a14 } }, /* xchg.b r0h,[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'h', ',', '[', OP (DST16AN), ']', 0 } }, - & ifmt_xchg16w_r0_dst16_An_indirect_QI, { 0x7a16 } + & ifmt_xchg16b_r1h_dst16_An_indirect_QI, { 0x7a16 } }, /* xchg.b r0h,${Dsp-16-u8}[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'h', ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_8_An_relative_QI, { 0x7a1800 } + & ifmt_xchg16b_r1h_dst16_16_8_An_relative_QI, { 0x7a1800 } }, /* xchg.b r0h,${Dsp-16-u16}[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_16_An_relative_QI, { 0x7a1c0000 } + & ifmt_xchg16b_r1h_dst16_16_16_An_relative_QI, { 0x7a1c0000 } }, /* xchg.b r0h,${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'h', ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_8_SB_relative_QI, { 0x7a1a00 } + & ifmt_xchg16b_r1h_dst16_16_8_SB_relative_QI, { 0x7a1a00 } }, /* xchg.b r0h,${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_16_SB_relative_QI, { 0x7a1e0000 } + & ifmt_xchg16b_r1h_dst16_16_16_SB_relative_QI, { 0x7a1e0000 } }, /* xchg.b r0h,${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'h', ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_8_FB_relative_QI, { 0x7a1b00 } + & ifmt_xchg16b_r1h_dst16_16_8_FB_relative_QI, { 0x7a1b00 } }, /* xchg.b r0h,${Dsp-16-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16), 0 } }, - & ifmt_xchg16w_r0_dst16_16_16_absolute_QI, { 0x7a1f0000 } + & ifmt_xchg16b_r1h_dst16_16_16_absolute_QI, { 0x7a1f0000 } }, /* xchg.b r0l,$Dst16RnQI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'l', ',', OP (DST16RNQI), 0 } }, - & ifmt_xchg16w_r0_dst16_Rn_direct_QI, { 0x7a00 } + & ifmt_xchg16b_r1h_dst16_Rn_direct_QI, { 0x7a00 } }, /* xchg.b r0l,$Dst16AnQI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'l', ',', OP (DST16ANQI), 0 } }, - & ifmt_xchg16w_r0_dst16_An_direct_QI, { 0x7a04 } + & ifmt_xchg16b_r1h_dst16_An_direct_QI, { 0x7a04 } }, /* xchg.b r0l,[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'l', ',', '[', OP (DST16AN), ']', 0 } }, - & ifmt_xchg16w_r0_dst16_An_indirect_QI, { 0x7a06 } + & ifmt_xchg16b_r1h_dst16_An_indirect_QI, { 0x7a06 } }, /* xchg.b r0l,${Dsp-16-u8}[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_8_An_relative_QI, { 0x7a0800 } + & ifmt_xchg16b_r1h_dst16_16_8_An_relative_QI, { 0x7a0800 } }, /* xchg.b r0l,${Dsp-16-u16}[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_16_An_relative_QI, { 0x7a0c0000 } + & ifmt_xchg16b_r1h_dst16_16_16_An_relative_QI, { 0x7a0c0000 } }, /* xchg.b r0l,${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_8_SB_relative_QI, { 0x7a0a00 } + & ifmt_xchg16b_r1h_dst16_16_8_SB_relative_QI, { 0x7a0a00 } }, /* xchg.b r0l,${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_16_SB_relative_QI, { 0x7a0e0000 } + & ifmt_xchg16b_r1h_dst16_16_16_SB_relative_QI, { 0x7a0e0000 } }, /* xchg.b r0l,${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'l', ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_xchg16w_r0_dst16_16_8_FB_relative_QI, { 0x7a0b00 } + & ifmt_xchg16b_r1h_dst16_16_8_FB_relative_QI, { 0x7a0b00 } }, /* xchg.b r0l,${Dsp-16-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16), 0 } }, - & ifmt_xchg16w_r0_dst16_16_16_absolute_QI, { 0x7a0f0000 } + & ifmt_xchg16b_r1h_dst16_16_16_absolute_QI, { 0x7a0f0000 } }, /* tst.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */ { @@ -13776,1732 +13952,1732 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, OP (S), ' ', '#', OP (IMM_8_QI), ',', 'r', '0', 'l', 0 } }, & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI, { 0xc00 } }, -/* tst.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */ +/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32RNPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32RNPREFIXEDHI), 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI, { 0x1990900 } }, -/* tst.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */ +/* tst.w${G} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI), 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI, { 0x1992900 } }, -/* tst.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */ +/* tst.w${G} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI), 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI, { 0x1993900 } }, -/* tst.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */ +/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32ANPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32ANPREFIXEDHI), 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI, { 0x1918900 } }, -/* tst.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */ +/* tst.w${G} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI), 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI, { 0x191a900 } }, -/* tst.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */ +/* tst.w${G} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI), 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI, { 0x191b900 } }, -/* tst.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI, { 0x1910900 } }, -/* tst.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI, { 0x1912900 } }, -/* tst.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI, { 0x1913900 } }, -/* tst.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI, { 0x1930900 } }, -/* tst.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI, { 0x1932900 } }, -/* tst.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI, { 0x1933900 } }, -/* tst.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI, { 0x1950900 } }, -/* tst.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI, { 0x1952900 } }, -/* tst.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI, { 0x1953900 } }, -/* tst.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI, { 0x1970900 } }, -/* tst.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI, { 0x1972900 } }, -/* tst.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI, { 0x1973900 } }, -/* tst.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */ +/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI, { 0x1938900 } }, -/* tst.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */ +/* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI, { 0x193a900 } }, -/* tst.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */ +/* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI, { 0x193b900 } }, -/* tst.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */ +/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI, { 0x1958900 } }, -/* tst.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */ +/* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI, { 0x195a900 } }, -/* tst.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */ +/* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI, { 0x195b900 } }, -/* tst.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */ +/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI, { 0x193c900 } }, -/* tst.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */ +/* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI, { 0x193e900 } }, -/* tst.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */ +/* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI, { 0x193f900 } }, -/* tst.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */ +/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI, { 0x195c900 } }, -/* tst.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */ +/* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI, { 0x195e900 } }, -/* tst.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */ +/* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI, { 0x195f900 } }, -/* tst.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */ +/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U16), 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI, { 0x197c900 } }, -/* tst.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */ +/* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U16), 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI, { 0x197e900 } }, -/* tst.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */ +/* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U16), 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI, { 0x197f900 } }, -/* tst.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */ +/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U24), 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI, { 0x1978900 } }, -/* tst.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */ +/* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U24), 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI, { 0x197a900 } }, -/* tst.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */ +/* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U24), 0 } }, & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI, { 0x197b900 } }, -/* tst.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */ +/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32RNPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32RNPREFIXEDHI), 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI, { 0x1a90900 } }, -/* tst.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */ +/* tst.w${G} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI), 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI, { 0x1a92900 } }, -/* tst.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */ +/* tst.w${G} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI), 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI, { 0x1a93900 } }, -/* tst.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */ +/* tst.w${G} ${Dsp-24-u16},$Dst32RnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DST32RNPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DST32RNPREFIXEDHI), 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI, { 0x1b93900 } }, -/* tst.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */ +/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32ANPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32ANPREFIXEDHI), 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI, { 0x1a18900 } }, -/* tst.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */ +/* tst.w${G} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI), 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI, { 0x1a1a900 } }, -/* tst.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */ +/* tst.w${G} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI), 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI, { 0x1a1b900 } }, -/* tst.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */ +/* tst.w${G} ${Dsp-24-u16},$Dst32AnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DST32ANPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DST32ANPREFIXEDHI), 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI, { 0x1b1b900 } }, -/* tst.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI, { 0x1a10900 } }, -/* tst.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI, { 0x1a12900 } }, -/* tst.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI, { 0x1a13900 } }, -/* tst.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u16},[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI, { 0x1b13900 } }, -/* tst.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI, { 0x1a30900 } }, -/* tst.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI, { 0x1a32900 } }, -/* tst.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI, { 0x1a33900 } }, -/* tst.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI, { 0x1b33900 } }, -/* tst.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI, { 0x1a50900 } }, -/* tst.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI, { 0x1a52900 } }, -/* tst.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI, { 0x1a53900 } }, -/* tst.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI, { 0x1b53900 } }, -/* tst.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI, { 0x1a70900 } }, -/* tst.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI, { 0x1a72900 } }, -/* tst.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI, { 0x1a73900 } }, -/* tst.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI, { 0x1b73900 } }, -/* tst.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */ +/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI, { 0x1a38900 } }, -/* tst.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */ +/* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI, { 0x1a3a900 } }, -/* tst.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */ +/* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI, { 0x1a3b900 } }, -/* tst.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */ +/* tst.w${G} ${Dsp-24-u16},${Dsp-40-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI, { 0x1b3b900 } }, -/* tst.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */ +/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI, { 0x1a58900 } }, -/* tst.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */ +/* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI, { 0x1a5a900 } }, -/* tst.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */ +/* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI, { 0x1a5b900 } }, -/* tst.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */ +/* tst.w${G} ${Dsp-24-u16},${Dsp-40-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI, { 0x1b5b900 } }, -/* tst.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */ +/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI, { 0x1a3c900 } }, -/* tst.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */ +/* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI, { 0x1a3e900 } }, -/* tst.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */ +/* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI, { 0x1a3f900 } }, -/* tst.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */ +/* tst.w${G} ${Dsp-24-u16},${Dsp-40-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DSP_40_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DSP_40_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI, { 0x1b3f900 } }, -/* tst.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */ +/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI, { 0x1a5c900 } }, -/* tst.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */ +/* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI, { 0x1a5e900 } }, -/* tst.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */ +/* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI, { 0x1a5f900 } }, -/* tst.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */ +/* tst.w${G} ${Dsp-24-u16},${Dsp-40-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DSP_40_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DSP_40_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI, { 0x1b5f900 } }, -/* tst.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */ +/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U16), 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI, { 0x1a7c900 } }, -/* tst.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */ +/* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U16), 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI, { 0x1a7e900 } }, -/* tst.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */ +/* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U16), 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI, { 0x1a7f900 } }, -/* tst.w${X} ${Dsp-24-u16},${Dsp-40-u16} */ +/* tst.w${G} ${Dsp-24-u16},${Dsp-40-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U16), 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI, { 0x1b7f900 } }, -/* tst.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */ +/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U24), 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI, { 0x1a78900 } }, -/* tst.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */ +/* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U24), 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI, { 0x1a7a900 } }, -/* tst.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */ +/* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U24), 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI, { 0x1a7b900 } }, -/* tst.w${X} ${Dsp-24-u16},${Dsp-40-u24} */ +/* tst.w${G} ${Dsp-24-u16},${Dsp-40-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U24), 0 } }, & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI, { 0x1b7b900 } }, -/* tst.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */ +/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32RNPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32RNPREFIXEDHI), 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI, { 0x1b90900 } }, -/* tst.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */ +/* tst.w${G} ${Dsp-24-u24},$Dst32RnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DST32RNPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DST32RNPREFIXEDHI), 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI, { 0x1b92900 } }, -/* tst.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */ +/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32ANPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32ANPREFIXEDHI), 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI, { 0x1b18900 } }, -/* tst.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */ +/* tst.w${G} ${Dsp-24-u24},$Dst32AnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DST32ANPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DST32ANPREFIXEDHI), 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI, { 0x1b1a900 } }, -/* tst.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI, { 0x1b10900 } }, -/* tst.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u24},[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI, { 0x1b12900 } }, -/* tst.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI, { 0x1b30900 } }, -/* tst.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI, { 0x1b32900 } }, -/* tst.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI, { 0x1b50900 } }, -/* tst.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI, { 0x1b52900 } }, -/* tst.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI, { 0x1b70900 } }, -/* tst.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */ +/* tst.w${G} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI, { 0x1b72900 } }, -/* tst.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */ +/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI, { 0x1b38900 } }, -/* tst.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */ +/* tst.w${G} ${Dsp-24-u24},${Dsp-48-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI, { 0x1b3a900 } }, -/* tst.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */ +/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI, { 0x1b58900 } }, -/* tst.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */ +/* tst.w${G} ${Dsp-24-u24},${Dsp-48-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI, { 0x1b5a900 } }, -/* tst.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */ +/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI, { 0x1b3c900 } }, -/* tst.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */ +/* tst.w${G} ${Dsp-24-u24},${Dsp-48-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DSP_48_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DSP_48_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI, { 0x1b3e900 } }, -/* tst.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */ +/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI, { 0x1b5c900 } }, -/* tst.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */ +/* tst.w${G} ${Dsp-24-u24},${Dsp-48-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DSP_48_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DSP_48_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI, { 0x1b5e900 } }, -/* tst.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */ +/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U16), 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI, { 0x1b7c900 } }, -/* tst.w${X} ${Dsp-24-u24},${Dsp-48-u16} */ +/* tst.w${G} ${Dsp-24-u24},${Dsp-48-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U16), 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI, { 0x1b7e900 } }, -/* tst.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */ +/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U24), 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI, { 0x1b78900 } }, -/* tst.w${X} ${Dsp-24-u24},${Dsp-48-u24} */ +/* tst.w${G} ${Dsp-24-u24},${Dsp-48-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U24), 0 } }, & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI, { 0x1b7a900 } }, -/* tst.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */ +/* tst.w${G} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DST32RNPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DST32RNPREFIXEDHI), 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI, { 0x1c909 } }, -/* tst.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */ +/* tst.w${G} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DST32RNPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DST32RNPREFIXEDHI), 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI, { 0x18929 } }, -/* tst.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */ +/* tst.w${G} [$Src32AnPrefixed],$Dst32RnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32RNPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32RNPREFIXEDHI), 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI, { 0x18909 } }, -/* tst.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */ +/* tst.w${G} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DST32ANPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DST32ANPREFIXEDHI), 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI, { 0x1c189 } }, -/* tst.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */ +/* tst.w${G} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DST32ANPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DST32ANPREFIXEDHI), 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI, { 0x181a9 } }, -/* tst.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */ +/* tst.w${G} [$Src32AnPrefixed],$Dst32AnPrefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32ANPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32ANPREFIXEDHI), 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI, { 0x18189 } }, -/* tst.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */ +/* tst.w${G} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDHI), ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDHI), ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI, { 0x1c109 } }, -/* tst.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */ +/* tst.w${G} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDHI), ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDHI), ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI, { 0x18129 } }, -/* tst.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */ +/* tst.w${G} [$Src32AnPrefixed],[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI, { 0x18109 } }, -/* tst.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */ +/* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DSP_24_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DSP_24_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI, { 0x1c30900 } }, -/* tst.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */ +/* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DSP_24_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DSP_24_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI, { 0x1832900 } }, -/* tst.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */ +/* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI, { 0x1830900 } }, -/* tst.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */ +/* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DSP_24_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DSP_24_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI, { 0x1c50900 } }, -/* tst.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */ +/* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DSP_24_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DSP_24_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI, { 0x1852900 } }, -/* tst.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */ +/* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI, { 0x1850900 } }, -/* tst.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */ +/* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DSP_24_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DSP_24_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI, { 0x1c70900 } }, -/* tst.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */ +/* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DSP_24_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DSP_24_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI, { 0x1872900 } }, -/* tst.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */ +/* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI, { 0x1870900 } }, -/* tst.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */ +/* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DSP_24_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DSP_24_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI, { 0x1c38900 } }, -/* tst.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */ +/* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DSP_24_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DSP_24_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI, { 0x183a900 } }, -/* tst.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */ +/* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI, { 0x1838900 } }, -/* tst.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */ +/* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DSP_24_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DSP_24_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI, { 0x1c58900 } }, -/* tst.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */ +/* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DSP_24_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DSP_24_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI, { 0x185a900 } }, -/* tst.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */ +/* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI, { 0x1858900 } }, -/* tst.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */ +/* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DSP_24_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DSP_24_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI, { 0x1c3c900 } }, -/* tst.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */ +/* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DSP_24_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DSP_24_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI, { 0x183e900 } }, -/* tst.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */ +/* tst.w${G} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI, { 0x183c900 } }, -/* tst.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */ +/* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DSP_24_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DSP_24_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI, { 0x1c5c900 } }, -/* tst.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */ +/* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DSP_24_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DSP_24_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI, { 0x185e900 } }, -/* tst.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */ +/* tst.w${G} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI, { 0x185c900 } }, -/* tst.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */ +/* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DSP_24_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DSP_24_U16), 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI, { 0x1c7c900 } }, -/* tst.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */ +/* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DSP_24_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DSP_24_U16), 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI, { 0x187e900 } }, -/* tst.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */ +/* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U16), 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U16), 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI, { 0x187c900 } }, -/* tst.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */ +/* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DSP_24_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDHI), ',', OP (DSP_24_U24), 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI, { 0x1c78900 } }, -/* tst.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */ +/* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DSP_24_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDHI), ',', OP (DSP_24_U24), 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI, { 0x187a900 } }, -/* tst.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */ +/* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U24), 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U24), 0 } }, & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI, { 0x1878900 } }, -/* tst.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */ +/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32RNPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32RNPREFIXEDQI), 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI, { 0x1980900 } }, -/* tst.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */ +/* tst.b${G} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI), 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI, { 0x1982900 } }, -/* tst.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */ +/* tst.b${G} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI), 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI, { 0x1983900 } }, -/* tst.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */ +/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32ANPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32ANPREFIXEDQI), 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI, { 0x1908900 } }, -/* tst.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */ +/* tst.b${G} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI), 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI, { 0x190a900 } }, -/* tst.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */ +/* tst.b${G} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI), 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI, { 0x190b900 } }, -/* tst.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI, { 0x1900900 } }, -/* tst.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI, { 0x1902900 } }, -/* tst.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI, { 0x1903900 } }, -/* tst.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI, { 0x1920900 } }, -/* tst.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI, { 0x1922900 } }, -/* tst.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI, { 0x1923900 } }, -/* tst.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI, { 0x1940900 } }, -/* tst.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI, { 0x1942900 } }, -/* tst.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI, { 0x1943900 } }, -/* tst.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI, { 0x1960900 } }, -/* tst.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI, { 0x1962900 } }, -/* tst.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI, { 0x1963900 } }, -/* tst.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */ +/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI, { 0x1928900 } }, -/* tst.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */ +/* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI, { 0x192a900 } }, -/* tst.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */ +/* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI, { 0x192b900 } }, -/* tst.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */ +/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI, { 0x1948900 } }, -/* tst.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */ +/* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI, { 0x194a900 } }, -/* tst.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */ +/* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI, { 0x194b900 } }, -/* tst.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */ +/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI, { 0x192c900 } }, -/* tst.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */ +/* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI, { 0x192e900 } }, -/* tst.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */ +/* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI, { 0x192f900 } }, -/* tst.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */ +/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI, { 0x194c900 } }, -/* tst.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */ +/* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI, { 0x194e900 } }, -/* tst.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */ +/* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI, { 0x194f900 } }, -/* tst.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */ +/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U16), 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI, { 0x196c900 } }, -/* tst.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */ +/* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U16), 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI, { 0x196e900 } }, -/* tst.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */ +/* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U16), 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI, { 0x196f900 } }, -/* tst.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */ +/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_32_U24), 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI, { 0x1968900 } }, -/* tst.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */ +/* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', OP (DSP_32_U24), 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI, { 0x196a900 } }, -/* tst.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */ +/* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', OP (DSP_32_U24), 0 } }, & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI, { 0x196b900 } }, -/* tst.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */ +/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32RNPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32RNPREFIXEDQI), 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI, { 0x1a80900 } }, -/* tst.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */ +/* tst.b${G} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI), 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI, { 0x1a82900 } }, -/* tst.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */ +/* tst.b${G} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI), 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI, { 0x1a83900 } }, -/* tst.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */ +/* tst.b${G} ${Dsp-24-u16},$Dst32RnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DST32RNPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DST32RNPREFIXEDQI), 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI, { 0x1b83900 } }, -/* tst.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */ +/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32ANPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32ANPREFIXEDQI), 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI, { 0x1a08900 } }, -/* tst.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */ +/* tst.b${G} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI), 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI, { 0x1a0a900 } }, -/* tst.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */ +/* tst.b${G} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI), 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI, { 0x1a0b900 } }, -/* tst.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */ +/* tst.b${G} ${Dsp-24-u16},$Dst32AnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DST32ANPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DST32ANPREFIXEDQI), 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI, { 0x1b0b900 } }, -/* tst.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI, { 0x1a00900 } }, -/* tst.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI, { 0x1a02900 } }, -/* tst.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI, { 0x1a03900 } }, -/* tst.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u16},[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI, { 0x1b03900 } }, -/* tst.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI, { 0x1a20900 } }, -/* tst.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI, { 0x1a22900 } }, -/* tst.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI, { 0x1a23900 } }, -/* tst.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI, { 0x1b23900 } }, -/* tst.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI, { 0x1a40900 } }, -/* tst.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI, { 0x1a42900 } }, -/* tst.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI, { 0x1a43900 } }, -/* tst.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI, { 0x1b43900 } }, -/* tst.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI, { 0x1a60900 } }, -/* tst.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI, { 0x1a62900 } }, -/* tst.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI, { 0x1a63900 } }, -/* tst.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI, { 0x1b63900 } }, -/* tst.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */ +/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI, { 0x1a28900 } }, -/* tst.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */ +/* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI, { 0x1a2a900 } }, -/* tst.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */ +/* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI, { 0x1a2b900 } }, -/* tst.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */ +/* tst.b${G} ${Dsp-24-u16},${Dsp-40-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI, { 0x1b2b900 } }, -/* tst.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */ +/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI, { 0x1a48900 } }, -/* tst.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */ +/* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI, { 0x1a4a900 } }, -/* tst.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */ +/* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI, { 0x1a4b900 } }, -/* tst.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */ +/* tst.b${G} ${Dsp-24-u16},${Dsp-40-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI, { 0x1b4b900 } }, -/* tst.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */ +/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI, { 0x1a2c900 } }, -/* tst.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */ +/* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI, { 0x1a2e900 } }, -/* tst.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */ +/* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI, { 0x1a2f900 } }, -/* tst.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */ +/* tst.b${G} ${Dsp-24-u16},${Dsp-40-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DSP_40_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DSP_40_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI, { 0x1b2f900 } }, -/* tst.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */ +/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI, { 0x1a4c900 } }, -/* tst.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */ +/* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI, { 0x1a4e900 } }, -/* tst.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */ +/* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI, { 0x1a4f900 } }, -/* tst.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */ +/* tst.b${G} ${Dsp-24-u16},${Dsp-40-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DSP_40_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DSP_40_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI, { 0x1b4f900 } }, -/* tst.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */ +/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U16), 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI, { 0x1a6c900 } }, -/* tst.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */ +/* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U16), 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI, { 0x1a6e900 } }, -/* tst.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */ +/* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U16), 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI, { 0x1a6f900 } }, -/* tst.b${X} ${Dsp-24-u16},${Dsp-40-u16} */ +/* tst.b${G} ${Dsp-24-u16},${Dsp-40-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U16), 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI, { 0x1b6f900 } }, -/* tst.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */ +/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_40_U24), 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI, { 0x1a68900 } }, -/* tst.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */ +/* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', OP (DSP_40_U24), 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI, { 0x1a6a900 } }, -/* tst.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */ +/* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', OP (DSP_40_U24), 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI, { 0x1a6b900 } }, -/* tst.b${X} ${Dsp-24-u16},${Dsp-40-u24} */ +/* tst.b${G} ${Dsp-24-u16},${Dsp-40-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U16), ',', OP (DSP_40_U24), 0 } }, & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI, { 0x1b6b900 } }, -/* tst.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */ +/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32RNPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32RNPREFIXEDQI), 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI, { 0x1b80900 } }, -/* tst.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */ +/* tst.b${G} ${Dsp-24-u24},$Dst32RnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DST32RNPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DST32RNPREFIXEDQI), 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI, { 0x1b82900 } }, -/* tst.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */ +/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32ANPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32ANPREFIXEDQI), 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI, { 0x1b08900 } }, -/* tst.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */ +/* tst.b${G} ${Dsp-24-u24},$Dst32AnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DST32ANPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DST32ANPREFIXEDQI), 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI, { 0x1b0a900 } }, -/* tst.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI, { 0x1b00900 } }, -/* tst.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u24},[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI, { 0x1b02900 } }, -/* tst.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI, { 0x1b20900 } }, -/* tst.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI, { 0x1b22900 } }, -/* tst.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI, { 0x1b40900 } }, -/* tst.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI, { 0x1b42900 } }, -/* tst.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI, { 0x1b60900 } }, -/* tst.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */ +/* tst.b${G} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI, { 0x1b62900 } }, -/* tst.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */ +/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI, { 0x1b28900 } }, -/* tst.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */ +/* tst.b${G} ${Dsp-24-u24},${Dsp-48-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI, { 0x1b2a900 } }, -/* tst.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */ +/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI, { 0x1b48900 } }, -/* tst.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */ +/* tst.b${G} ${Dsp-24-u24},${Dsp-48-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI, { 0x1b4a900 } }, -/* tst.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */ +/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI, { 0x1b2c900 } }, -/* tst.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */ +/* tst.b${G} ${Dsp-24-u24},${Dsp-48-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DSP_48_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DSP_48_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI, { 0x1b2e900 } }, -/* tst.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */ +/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI, { 0x1b4c900 } }, -/* tst.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */ +/* tst.b${G} ${Dsp-24-u24},${Dsp-48-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DSP_48_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DSP_48_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI, { 0x1b4e900 } }, -/* tst.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */ +/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U16), 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI, { 0x1b6c900 } }, -/* tst.b${X} ${Dsp-24-u24},${Dsp-48-u16} */ +/* tst.b${G} ${Dsp-24-u24},${Dsp-48-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U16), 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI, { 0x1b6e900 } }, -/* tst.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */ +/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_48_U24), 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI, { 0x1b68900 } }, -/* tst.b${X} ${Dsp-24-u24},${Dsp-48-u24} */ +/* tst.b${G} ${Dsp-24-u24},${Dsp-48-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_U24), ',', OP (DSP_48_U24), 0 } }, & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI, { 0x1b6a900 } }, -/* tst.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */ +/* tst.b${G} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DST32RNPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DST32RNPREFIXEDQI), 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI, { 0x1c809 } }, -/* tst.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */ +/* tst.b${G} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DST32RNPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DST32RNPREFIXEDQI), 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI, { 0x18829 } }, -/* tst.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */ +/* tst.b${G} [$Src32AnPrefixed],$Dst32RnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32RNPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32RNPREFIXEDQI), 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI, { 0x18809 } }, -/* tst.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */ +/* tst.b${G} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DST32ANPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DST32ANPREFIXEDQI), 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI, { 0x1c089 } }, -/* tst.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */ +/* tst.b${G} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DST32ANPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DST32ANPREFIXEDQI), 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI, { 0x180a9 } }, -/* tst.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */ +/* tst.b${G} [$Src32AnPrefixed],$Dst32AnPrefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32ANPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DST32ANPREFIXEDQI), 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI, { 0x18089 } }, -/* tst.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */ +/* tst.b${G} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDQI), ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDQI), ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI, { 0x1c009 } }, -/* tst.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */ +/* tst.b${G} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDQI), ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDQI), ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI, { 0x18029 } }, -/* tst.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */ +/* tst.b${G} [$Src32AnPrefixed],[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI, { 0x18009 } }, -/* tst.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */ +/* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DSP_24_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DSP_24_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI, { 0x1c20900 } }, -/* tst.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */ +/* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DSP_24_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DSP_24_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI, { 0x1822900 } }, -/* tst.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */ +/* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U8), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI, { 0x1820900 } }, -/* tst.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */ +/* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DSP_24_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DSP_24_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI, { 0x1c40900 } }, -/* tst.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */ +/* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DSP_24_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DSP_24_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI, { 0x1842900 } }, -/* tst.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */ +/* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U16), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI, { 0x1840900 } }, -/* tst.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */ +/* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DSP_24_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DSP_24_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI, { 0x1c60900 } }, -/* tst.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */ +/* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DSP_24_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DSP_24_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI, { 0x1862900 } }, -/* tst.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */ +/* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U24), '[', OP (DST32ANPREFIXED), ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI, { 0x1860900 } }, -/* tst.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */ +/* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DSP_24_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DSP_24_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI, { 0x1c28900 } }, -/* tst.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */ +/* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DSP_24_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DSP_24_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI, { 0x182a900 } }, -/* tst.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */ +/* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U8), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI, { 0x1828900 } }, -/* tst.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */ +/* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DSP_24_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DSP_24_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI, { 0x1c48900 } }, -/* tst.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */ +/* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DSP_24_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DSP_24_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI, { 0x184a900 } }, -/* tst.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */ +/* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U16), '[', 's', 'b', ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI, { 0x1848900 } }, -/* tst.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */ +/* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DSP_24_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DSP_24_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI, { 0x1c2c900 } }, -/* tst.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */ +/* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DSP_24_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DSP_24_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI, { 0x182e900 } }, -/* tst.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */ +/* tst.b${G} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI, { 0x182c900 } }, -/* tst.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */ +/* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DSP_24_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DSP_24_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI, { 0x1c4c900 } }, -/* tst.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */ +/* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DSP_24_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DSP_24_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI, { 0x184e900 } }, -/* tst.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */ +/* tst.b${G} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI, { 0x184c900 } }, -/* tst.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */ +/* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DSP_24_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DSP_24_U16), 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI, { 0x1c6c900 } }, -/* tst.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */ +/* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DSP_24_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DSP_24_U16), 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI, { 0x186e900 } }, -/* tst.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */ +/* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U16), 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U16), 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI, { 0x186c900 } }, -/* tst.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */ +/* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DSP_24_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32RNPREFIXEDQI), ',', OP (DSP_24_U24), 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI, { 0x1c68900 } }, -/* tst.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */ +/* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DSP_24_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (SRC32ANPREFIXEDQI), ',', OP (DSP_24_U24), 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI, { 0x186a900 } }, -/* tst.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */ +/* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U24), 0 } }, + { { MNEM, OP (G), ' ', '[', OP (SRC32ANPREFIXED), ']', ',', OP (DSP_24_U24), 0 } }, & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI, { 0x1868900 } }, /* tst.w${X} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */ @@ -16476,256 +16652,256 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, OP (X), ' ', '[', OP (SRC16AN), ']', ',', OP (DSP_16_U16), 0 } }, & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI, { 0x806f0000 } }, -/* tst.w${X} #${Imm-16-HI},$Dst32RnUnprefixedHI */ +/* tst.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_16_HI), ',', OP (DST32RNUNPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_16_HI), ',', OP (DST32RNUNPREFIXEDHI), 0 } }, & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI, { 0x993e0000 } }, -/* tst.w${X} #${Imm-16-HI},$Dst32AnUnprefixedHI */ +/* tst.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_16_HI), ',', OP (DST32ANUNPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_16_HI), ',', OP (DST32ANUNPREFIXEDHI), 0 } }, & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI, { 0x91be0000 } }, -/* tst.w${X} #${Imm-16-HI},[$Dst32AnUnprefixed] */ +/* tst.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_16_HI), ',', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_16_HI), ',', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI, { 0x913e0000 } }, -/* tst.w${X} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */ +/* tst.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_24_HI), ',', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_24_HI), ',', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI, { 0x933e0000 } }, -/* tst.w${X} #${Imm-24-HI},${Dsp-16-u8}[sb] */ +/* tst.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_24_HI), ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_24_HI), ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI, { 0x93be0000 } }, -/* tst.w${X} #${Imm-24-HI},${Dsp-16-s8}[fb] */ +/* tst.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_24_HI), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_24_HI), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI, { 0x93fe0000 } }, -/* tst.w${X} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */ +/* tst.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_32_HI), ',', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_32_HI), ',', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI, { 0x953e0000 } }, -/* tst.w${X} #${Imm-32-HI},${Dsp-16-u16}[sb] */ +/* tst.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_32_HI), ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_32_HI), ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI, { 0x95be0000 } }, -/* tst.w${X} #${Imm-32-HI},${Dsp-16-s16}[fb] */ +/* tst.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_32_HI), ',', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_32_HI), ',', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI, { 0x95fe0000 } }, -/* tst.w${X} #${Imm-32-HI},${Dsp-16-u16} */ +/* tst.w${G} #${Imm-32-HI},${Dsp-16-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_32_HI), ',', OP (DSP_16_U16), 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_32_HI), ',', OP (DSP_16_U16), 0 } }, & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI, { 0x97fe0000 } }, -/* tst.w${X} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */ +/* tst.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_40_HI), ',', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_40_HI), ',', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI, { 0x973e0000 } }, -/* tst.w${X} #${Imm-40-HI},${Dsp-16-u24} */ +/* tst.w${G} #${Imm-40-HI},${Dsp-16-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_40_HI), ',', OP (DSP_16_U24), 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_40_HI), ',', OP (DSP_16_U24), 0 } }, & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI, { 0x97be0000 } }, -/* tst.b${X} #${Imm-16-QI},$Dst32RnUnprefixedQI */ +/* tst.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_16_QI), ',', OP (DST32RNUNPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_16_QI), ',', OP (DST32RNUNPREFIXEDQI), 0 } }, & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI, { 0x983e00 } }, -/* tst.b${X} #${Imm-16-QI},$Dst32AnUnprefixedQI */ +/* tst.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_16_QI), ',', OP (DST32ANUNPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_16_QI), ',', OP (DST32ANUNPREFIXEDQI), 0 } }, & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI, { 0x90be00 } }, -/* tst.b${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */ +/* tst.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_16_QI), ',', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_16_QI), ',', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI, { 0x903e00 } }, -/* tst.b${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */ +/* tst.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_24_QI), ',', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_24_QI), ',', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI, { 0x923e0000 } }, -/* tst.b${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */ +/* tst.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_24_QI), ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_24_QI), ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI, { 0x92be0000 } }, -/* tst.b${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */ +/* tst.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_24_QI), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_24_QI), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI, { 0x92fe0000 } }, -/* tst.b${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */ +/* tst.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_32_QI), ',', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_32_QI), ',', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI, { 0x943e0000 } }, -/* tst.b${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */ +/* tst.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_32_QI), ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_32_QI), ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI, { 0x94be0000 } }, -/* tst.b${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */ +/* tst.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_32_QI), ',', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_32_QI), ',', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI, { 0x94fe0000 } }, -/* tst.b${X} #${Imm-32-QI},${Dsp-16-u16} */ +/* tst.b${G} #${Imm-32-QI},${Dsp-16-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_32_QI), ',', OP (DSP_16_U16), 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_32_QI), ',', OP (DSP_16_U16), 0 } }, & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI, { 0x96fe0000 } }, -/* tst.b${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */ +/* tst.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_40_QI), ',', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_40_QI), ',', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI, { 0x963e0000 } }, -/* tst.b${X} #${Imm-40-QI},${Dsp-16-u24} */ +/* tst.b${G} #${Imm-40-QI},${Dsp-16-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_40_QI), ',', OP (DSP_16_U24), 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_40_QI), ',', OP (DSP_16_U24), 0 } }, & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI, { 0x96be0000 } }, -/* tst.w${X} #${Imm-16-HI},$Dst16RnHI */ +/* tst.w${G} #${Imm-16-HI},$Dst16RnHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_16_HI), ',', OP (DST16RNHI), 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_16_HI), ',', OP (DST16RNHI), 0 } }, & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI, { 0x77000000 } }, -/* tst.w${X} #${Imm-16-HI},$Dst16AnHI */ +/* tst.w${G} #${Imm-16-HI},$Dst16AnHI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_16_HI), ',', OP (DST16ANHI), 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_16_HI), ',', OP (DST16ANHI), 0 } }, & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI, { 0x77040000 } }, -/* tst.w${X} #${Imm-16-HI},[$Dst16An] */ +/* tst.w${G} #${Imm-16-HI},[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_16_HI), ',', '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_16_HI), ',', '[', OP (DST16AN), ']', 0 } }, & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI, { 0x77060000 } }, -/* tst.w${X} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */ +/* tst.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_24_HI), ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_24_HI), ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI, { 0x77080000 } }, -/* tst.w${X} #${Imm-24-HI},${Dsp-16-u8}[sb] */ +/* tst.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_24_HI), ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_24_HI), ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI, { 0x770a0000 } }, -/* tst.w${X} #${Imm-24-HI},${Dsp-16-s8}[fb] */ +/* tst.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_24_HI), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_24_HI), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI, { 0x770b0000 } }, -/* tst.w${X} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */ +/* tst.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_32_HI), ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_32_HI), ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI, { 0x770c0000 } }, -/* tst.w${X} #${Imm-32-HI},${Dsp-16-u16}[sb] */ +/* tst.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_32_HI), ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_32_HI), ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI, { 0x770e0000 } }, -/* tst.w${X} #${Imm-32-HI},${Dsp-16-u16} */ +/* tst.w${G} #${Imm-32-HI},${Dsp-16-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_32_HI), ',', OP (DSP_16_U16), 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_32_HI), ',', OP (DSP_16_U16), 0 } }, & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI, { 0x770f0000 } }, -/* tst.b${X} #${Imm-16-QI},$Dst16RnQI */ +/* tst.b${G} #${Imm-16-QI},$Dst16RnQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_16_QI), ',', OP (DST16RNQI), 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_16_QI), ',', OP (DST16RNQI), 0 } }, & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI, { 0x760000 } }, -/* tst.b${X} #${Imm-16-QI},$Dst16AnQI */ +/* tst.b${G} #${Imm-16-QI},$Dst16AnQI */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_16_QI), ',', OP (DST16ANQI), 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_16_QI), ',', OP (DST16ANQI), 0 } }, & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI, { 0x760400 } }, -/* tst.b${X} #${Imm-16-QI},[$Dst16An] */ +/* tst.b${G} #${Imm-16-QI},[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_16_QI), ',', '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_16_QI), ',', '[', OP (DST16AN), ']', 0 } }, & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI, { 0x760600 } }, -/* tst.b${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */ +/* tst.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_24_QI), ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_24_QI), ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI, { 0x76080000 } }, -/* tst.b${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */ +/* tst.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_24_QI), ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_24_QI), ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI, { 0x760a0000 } }, -/* tst.b${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */ +/* tst.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_24_QI), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_24_QI), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI, { 0x760b0000 } }, -/* tst.b${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */ +/* tst.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_32_QI), ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_32_QI), ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI, { 0x760c0000 } }, -/* tst.b${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */ +/* tst.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_32_QI), ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_32_QI), ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI, { 0x760e0000 } }, -/* tst.b${X} #${Imm-32-QI},${Dsp-16-u16} */ +/* tst.b${G} #${Imm-32-QI},${Dsp-16-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, OP (X), ' ', '#', OP (IMM_32_QI), ',', OP (DSP_16_U16), 0 } }, + { { MNEM, OP (G), ' ', '#', OP (IMM_32_QI), ',', OP (DSP_16_U16), 0 } }, & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI, { 0x760f0000 } }, /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */ @@ -19668,256 +19844,256 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, OP (SCCOND32), ' ', OP (DSP_16_U24), 0 } }, & ifmt_sccnd_dst32_16_24_absolute_Unprefixed_HI, { 0xd7b00000 } }, -/* sbjnz.w #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */ +/* sbjnz.w #${Imm-12-s4n},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_24_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_24_8), 0 } }, & ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI, { 0xf3100000 } }, -/* sbjnz.w #${Imm-12-s4},${Dsp-16-u8}[sb],${Lab-24-8} */ +/* sbjnz.w #${Imm-12-s4n},${Dsp-16-u8}[sb],${Lab-24-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (LAB_24_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (LAB_24_8), 0 } }, & ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI, { 0xf3900000 } }, -/* sbjnz.w #${Imm-12-s4},${Dsp-16-s8}[fb],${Lab-24-8} */ +/* sbjnz.w #${Imm-12-s4n},${Dsp-16-s8}[fb],${Lab-24-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (LAB_24_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (LAB_24_8), 0 } }, & ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI, { 0xf3d00000 } }, -/* sbjnz.w #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */ +/* sbjnz.w #${Imm-12-s4n},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_32_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_32_8), 0 } }, & ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI, { 0xf5100000 } }, -/* sbjnz.w #${Imm-12-s4},${Dsp-16-u16}[sb],${Lab-32-8} */ +/* sbjnz.w #${Imm-12-s4n},${Dsp-16-u16}[sb],${Lab-32-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (LAB_32_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (LAB_32_8), 0 } }, & ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI, { 0xf5900000 } }, -/* sbjnz.w #${Imm-12-s4},${Dsp-16-s16}[fb],${Lab-32-8} */ +/* sbjnz.w #${Imm-12-s4n},${Dsp-16-s16}[fb],${Lab-32-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_S16), '[', 'f', 'b', ']', ',', OP (LAB_32_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DSP_16_S16), '[', 'f', 'b', ']', ',', OP (LAB_32_8), 0 } }, & ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI, { 0xf5d00000 } }, -/* sbjnz.w #${Imm-12-s4},${Dsp-16-u16},${Lab-32-8} */ +/* sbjnz.w #${Imm-12-s4n},${Dsp-16-u16},${Lab-32-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U16), ',', OP (LAB_32_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DSP_16_U16), ',', OP (LAB_32_8), 0 } }, & ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI, { 0xf7d00000 } }, -/* sbjnz.w #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */ +/* sbjnz.w #${Imm-12-s4n},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_40_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_40_8), 0 } }, & ifmt_sbjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI, { 0xf7100000 } }, -/* sbjnz.w #${Imm-12-s4},${Dsp-16-u24},${Lab-40-8} */ +/* sbjnz.w #${Imm-12-s4n},${Dsp-16-u24},${Lab-40-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U24), ',', OP (LAB_40_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DSP_16_U24), ',', OP (LAB_40_8), 0 } }, & ifmt_sbjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI, { 0xf7900000 } }, -/* sbjnz.w #${Imm-12-s4},$Dst32RnUnprefixedHI,${Lab-16-8} */ +/* sbjnz.w #${Imm-12-s4n},$Dst32RnUnprefixedHI,${Lab-16-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DST32RNUNPREFIXEDHI), ',', OP (LAB_16_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DST32RNUNPREFIXEDHI), ',', OP (LAB_16_8), 0 } }, & ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI, { 0xf91000 } }, -/* sbjnz.w #${Imm-12-s4},$Dst32AnUnprefixedHI,${Lab-16-8} */ +/* sbjnz.w #${Imm-12-s4n},$Dst32AnUnprefixedHI,${Lab-16-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DST32ANUNPREFIXEDHI), ',', OP (LAB_16_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DST32ANUNPREFIXEDHI), ',', OP (LAB_16_8), 0 } }, & ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_HI, { 0xf19000 } }, -/* sbjnz.w #${Imm-12-s4},[$Dst32AnUnprefixed],${Lab-16-8} */ +/* sbjnz.w #${Imm-12-s4n},[$Dst32AnUnprefixed],${Lab-16-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_16_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_16_8), 0 } }, & ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI, { 0xf11000 } }, -/* sbjnz.b #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */ +/* sbjnz.b #${Imm-12-s4n},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_24_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_24_8), 0 } }, & ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI, { 0xf2100000 } }, -/* sbjnz.b #${Imm-12-s4},${Dsp-16-u8}[sb],${Lab-24-8} */ +/* sbjnz.b #${Imm-12-s4n},${Dsp-16-u8}[sb],${Lab-24-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (LAB_24_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (LAB_24_8), 0 } }, & ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI, { 0xf2900000 } }, -/* sbjnz.b #${Imm-12-s4},${Dsp-16-s8}[fb],${Lab-24-8} */ +/* sbjnz.b #${Imm-12-s4n},${Dsp-16-s8}[fb],${Lab-24-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (LAB_24_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (LAB_24_8), 0 } }, & ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI, { 0xf2d00000 } }, -/* sbjnz.b #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */ +/* sbjnz.b #${Imm-12-s4n},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_32_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_32_8), 0 } }, & ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI, { 0xf4100000 } }, -/* sbjnz.b #${Imm-12-s4},${Dsp-16-u16}[sb],${Lab-32-8} */ +/* sbjnz.b #${Imm-12-s4n},${Dsp-16-u16}[sb],${Lab-32-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (LAB_32_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (LAB_32_8), 0 } }, & ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI, { 0xf4900000 } }, -/* sbjnz.b #${Imm-12-s4},${Dsp-16-s16}[fb],${Lab-32-8} */ +/* sbjnz.b #${Imm-12-s4n},${Dsp-16-s16}[fb],${Lab-32-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_S16), '[', 'f', 'b', ']', ',', OP (LAB_32_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DSP_16_S16), '[', 'f', 'b', ']', ',', OP (LAB_32_8), 0 } }, & ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI, { 0xf4d00000 } }, -/* sbjnz.b #${Imm-12-s4},${Dsp-16-u16},${Lab-32-8} */ +/* sbjnz.b #${Imm-12-s4n},${Dsp-16-u16},${Lab-32-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U16), ',', OP (LAB_32_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DSP_16_U16), ',', OP (LAB_32_8), 0 } }, & ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI, { 0xf6d00000 } }, -/* sbjnz.b #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */ +/* sbjnz.b #${Imm-12-s4n},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_40_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_40_8), 0 } }, & ifmt_sbjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI, { 0xf6100000 } }, -/* sbjnz.b #${Imm-12-s4},${Dsp-16-u24},${Lab-40-8} */ +/* sbjnz.b #${Imm-12-s4n},${Dsp-16-u24},${Lab-40-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U24), ',', OP (LAB_40_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DSP_16_U24), ',', OP (LAB_40_8), 0 } }, & ifmt_sbjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI, { 0xf6900000 } }, -/* sbjnz.b #${Imm-12-s4},$Dst32RnUnprefixedQI,${Lab-16-8} */ +/* sbjnz.b #${Imm-12-s4n},$Dst32RnUnprefixedQI,${Lab-16-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DST32RNUNPREFIXEDQI), ',', OP (LAB_16_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DST32RNUNPREFIXEDQI), ',', OP (LAB_16_8), 0 } }, & ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI, { 0xf81000 } }, -/* sbjnz.b #${Imm-12-s4},$Dst32AnUnprefixedQI,${Lab-16-8} */ +/* sbjnz.b #${Imm-12-s4n},$Dst32AnUnprefixedQI,${Lab-16-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DST32ANUNPREFIXEDQI), ',', OP (LAB_16_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', OP (DST32ANUNPREFIXEDQI), ',', OP (LAB_16_8), 0 } }, & ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_QI, { 0xf09000 } }, -/* sbjnz.b #${Imm-12-s4},[$Dst32AnUnprefixed],${Lab-16-8} */ +/* sbjnz.b #${Imm-12-s4n},[$Dst32AnUnprefixed],${Lab-16-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_12_S4), ',', '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_16_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_12_S4N), ',', '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_16_8), 0 } }, & ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI, { 0xf01000 } }, -/* sbjnz.w #${Imm-8-s4},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */ +/* sbjnz.w #${Imm-8-s4n},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', ',', OP (LAB_24_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_8_S4N), ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', ',', OP (LAB_24_8), 0 } }, & ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_An_relative_HI, { 0xf9080000 } }, -/* sbjnz.w #${Imm-8-s4},${Dsp-16-u8}[sb],${Lab-24-8} */ +/* sbjnz.w #${Imm-8-s4n},${Dsp-16-u8}[sb],${Lab-24-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (LAB_24_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_8_S4N), ',', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (LAB_24_8), 0 } }, & ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_SB_relative_HI, { 0xf90a0000 } }, -/* sbjnz.w #${Imm-8-s4},${Dsp-16-s8}[fb],${Lab-24-8} */ +/* sbjnz.w #${Imm-8-s4n},${Dsp-16-s8}[fb],${Lab-24-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (LAB_24_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_8_S4N), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (LAB_24_8), 0 } }, & ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_FB_relative_HI, { 0xf90b0000 } }, -/* sbjnz.w #${Imm-8-s4},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */ +/* sbjnz.w #${Imm-8-s4n},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', ',', OP (LAB_32_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_8_S4N), ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', ',', OP (LAB_32_8), 0 } }, & ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_An_relative_HI, { 0xf90c0000 } }, -/* sbjnz.w #${Imm-8-s4},${Dsp-16-u16}[sb],${Lab-32-8} */ +/* sbjnz.w #${Imm-8-s4n},${Dsp-16-u16}[sb],${Lab-32-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (LAB_32_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_8_S4N), ',', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (LAB_32_8), 0 } }, & ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_SB_relative_HI, { 0xf90e0000 } }, -/* sbjnz.w #${Imm-8-s4},${Dsp-16-u16},${Lab-32-8} */ +/* sbjnz.w #${Imm-8-s4n},${Dsp-16-u16},${Lab-32-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), ',', OP (LAB_32_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_8_S4N), ',', OP (DSP_16_U16), ',', OP (LAB_32_8), 0 } }, & ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_absolute_HI, { 0xf90f0000 } }, -/* sbjnz.w #${Imm-8-s4},$Dst16RnHI,${Lab-16-8} */ +/* sbjnz.w #${Imm-8-s4n},$Dst16RnHI,${Lab-16-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DST16RNHI), ',', OP (LAB_16_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_8_S4N), ',', OP (DST16RNHI), ',', OP (LAB_16_8), 0 } }, & ifmt_sbjnz16_w_imm4_basic_dst16_Rn_direct_HI, { 0xf90000 } }, -/* sbjnz.w #${Imm-8-s4},$Dst16AnHI,${Lab-16-8} */ +/* sbjnz.w #${Imm-8-s4n},$Dst16AnHI,${Lab-16-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DST16ANHI), ',', OP (LAB_16_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_8_S4N), ',', OP (DST16ANHI), ',', OP (LAB_16_8), 0 } }, & ifmt_sbjnz16_w_imm4_basic_dst16_An_direct_HI, { 0xf90400 } }, -/* sbjnz.w #${Imm-8-s4},[$Dst16An],${Lab-16-8} */ +/* sbjnz.w #${Imm-8-s4n},[$Dst16An],${Lab-16-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_S4), ',', '[', OP (DST16AN), ']', ',', OP (LAB_16_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_8_S4N), ',', '[', OP (DST16AN), ']', ',', OP (LAB_16_8), 0 } }, & ifmt_sbjnz16_w_imm4_basic_dst16_An_indirect_HI, { 0xf90600 } }, -/* sbjnz.b #${Imm-8-s4},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */ +/* sbjnz.b #${Imm-8-s4n},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', ',', OP (LAB_24_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_8_S4N), ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', ',', OP (LAB_24_8), 0 } }, & ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_An_relative_QI, { 0xf8080000 } }, -/* sbjnz.b #${Imm-8-s4},${Dsp-16-u8}[sb],${Lab-24-8} */ +/* sbjnz.b #${Imm-8-s4n},${Dsp-16-u8}[sb],${Lab-24-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (LAB_24_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_8_S4N), ',', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (LAB_24_8), 0 } }, & ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_SB_relative_QI, { 0xf80a0000 } }, -/* sbjnz.b #${Imm-8-s4},${Dsp-16-s8}[fb],${Lab-24-8} */ +/* sbjnz.b #${Imm-8-s4n},${Dsp-16-s8}[fb],${Lab-24-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (LAB_24_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_8_S4N), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (LAB_24_8), 0 } }, & ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_FB_relative_QI, { 0xf80b0000 } }, -/* sbjnz.b #${Imm-8-s4},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */ +/* sbjnz.b #${Imm-8-s4n},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', ',', OP (LAB_32_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_8_S4N), ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', ',', OP (LAB_32_8), 0 } }, & ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_An_relative_QI, { 0xf80c0000 } }, -/* sbjnz.b #${Imm-8-s4},${Dsp-16-u16}[sb],${Lab-32-8} */ +/* sbjnz.b #${Imm-8-s4n},${Dsp-16-u16}[sb],${Lab-32-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (LAB_32_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_8_S4N), ',', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (LAB_32_8), 0 } }, & ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_SB_relative_QI, { 0xf80e0000 } }, -/* sbjnz.b #${Imm-8-s4},${Dsp-16-u16},${Lab-32-8} */ +/* sbjnz.b #${Imm-8-s4n},${Dsp-16-u16},${Lab-32-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), ',', OP (LAB_32_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_8_S4N), ',', OP (DSP_16_U16), ',', OP (LAB_32_8), 0 } }, & ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_absolute_QI, { 0xf80f0000 } }, -/* sbjnz.b #${Imm-8-s4},$Dst16RnQI,${Lab-16-8} */ +/* sbjnz.b #${Imm-8-s4n},$Dst16RnQI,${Lab-16-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DST16RNQI), ',', OP (LAB_16_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_8_S4N), ',', OP (DST16RNQI), ',', OP (LAB_16_8), 0 } }, & ifmt_sbjnz16_b_imm4_basic_dst16_Rn_direct_QI, { 0xf80000 } }, -/* sbjnz.b #${Imm-8-s4},$Dst16AnQI,${Lab-16-8} */ +/* sbjnz.b #${Imm-8-s4n},$Dst16AnQI,${Lab-16-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DST16ANQI), ',', OP (LAB_16_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_8_S4N), ',', OP (DST16ANQI), ',', OP (LAB_16_8), 0 } }, & ifmt_sbjnz16_b_imm4_basic_dst16_An_direct_QI, { 0xf80400 } }, -/* sbjnz.b #${Imm-8-s4},[$Dst16An],${Lab-16-8} */ +/* sbjnz.b #${Imm-8-s4n},[$Dst16An],${Lab-16-8} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_S4), ',', '[', OP (DST16AN), ']', ',', OP (LAB_16_8), 0 } }, + { { MNEM, ' ', '#', OP (IMM_8_S4N), ',', '[', OP (DST16AN), ']', ',', OP (LAB_16_8), 0 } }, & ifmt_sbjnz16_b_imm4_basic_dst16_An_indirect_QI, { 0xf80600 } }, /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */ @@ -22872,149 +23048,149 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, OP (X), ' ', '#', OP (IMM_32_QI), ',', OP (DSP_16_U16), 0 } }, & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI, { 0x767f0000 } }, -/* rot.w r1h,$Dst32RnUnprefixedSI */ +/* rot.w r1h,$Dst32RnUnprefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDSI), 0 } }, - & ifmt_shl32_l_dst_dst32_Rn_direct_Unprefixed_SI, { 0xa93f } + { { MNEM, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDHI), 0 } }, + & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI, { 0xa93f } }, -/* rot.w r1h,$Dst32AnUnprefixedSI */ +/* rot.w r1h,$Dst32AnUnprefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDSI), 0 } }, - & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI, { 0xa1bf } + { { MNEM, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDHI), 0 } }, + & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI, { 0xa1bf } }, /* rot.w r1h,[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_l_dst_dst32_An_indirect_Unprefixed_SI, { 0xa13f } + & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI, { 0xa13f } }, /* rot.w r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_l_dst_dst32_16_8_An_relative_Unprefixed_SI, { 0xa33f00 } + & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI, { 0xa33f00 } }, /* rot.w r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_l_dst_dst32_16_16_An_relative_Unprefixed_SI, { 0xa53f0000 } + & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI, { 0xa53f0000 } }, /* rot.w r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI, { 0xa73f0000 } + & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI, { 0xa73f0000 } }, /* rot.w r1h,${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_l_dst_dst32_16_8_SB_relative_Unprefixed_SI, { 0xa3bf00 } + & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI, { 0xa3bf00 } }, /* rot.w r1h,${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_l_dst_dst32_16_16_SB_relative_Unprefixed_SI, { 0xa5bf0000 } + & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI, { 0xa5bf0000 } }, /* rot.w r1h,${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_l_dst_dst32_16_8_FB_relative_Unprefixed_SI, { 0xa3ff00 } + & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI, { 0xa3ff00 } }, /* rot.w r1h,${Dsp-16-s16}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_l_dst_dst32_16_16_FB_relative_Unprefixed_SI, { 0xa5ff0000 } + & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI, { 0xa5ff0000 } }, /* rot.w r1h,${Dsp-16-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16), 0 } }, - & ifmt_shl32_l_dst_dst32_16_16_absolute_Unprefixed_SI, { 0xa7ff0000 } + & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI, { 0xa7ff0000 } }, /* rot.w r1h,${Dsp-16-u24} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24), 0 } }, - & ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI, { 0xa7bf0000 } + & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0xa7bf0000 } }, -/* rot.b r1h,$Dst32RnUnprefixedSI */ +/* rot.b r1h,$Dst32RnUnprefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDSI), 0 } }, - & ifmt_shl32_l_dst_dst32_Rn_direct_Unprefixed_SI, { 0xa83f } + { { MNEM, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDQI), 0 } }, + & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI, { 0xa83f } }, -/* rot.b r1h,$Dst32AnUnprefixedSI */ +/* rot.b r1h,$Dst32AnUnprefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDSI), 0 } }, - & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI, { 0xa0bf } + { { MNEM, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDQI), 0 } }, + & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI, { 0xa0bf } }, /* rot.b r1h,[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_l_dst_dst32_An_indirect_Unprefixed_SI, { 0xa03f } + & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI, { 0xa03f } }, /* rot.b r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_l_dst_dst32_16_8_An_relative_Unprefixed_SI, { 0xa23f00 } + & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI, { 0xa23f00 } }, /* rot.b r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_l_dst_dst32_16_16_An_relative_Unprefixed_SI, { 0xa43f0000 } + & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI, { 0xa43f0000 } }, /* rot.b r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI, { 0xa63f0000 } + & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI, { 0xa63f0000 } }, /* rot.b r1h,${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_l_dst_dst32_16_8_SB_relative_Unprefixed_SI, { 0xa2bf00 } + & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI, { 0xa2bf00 } }, /* rot.b r1h,${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_l_dst_dst32_16_16_SB_relative_Unprefixed_SI, { 0xa4bf0000 } + & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI, { 0xa4bf0000 } }, /* rot.b r1h,${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_l_dst_dst32_16_8_FB_relative_Unprefixed_SI, { 0xa2ff00 } + & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI, { 0xa2ff00 } }, /* rot.b r1h,${Dsp-16-s16}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_l_dst_dst32_16_16_FB_relative_Unprefixed_SI, { 0xa4ff0000 } + & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI, { 0xa4ff0000 } }, /* rot.b r1h,${Dsp-16-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16), 0 } }, - & ifmt_shl32_l_dst_dst32_16_16_absolute_Unprefixed_SI, { 0xa6ff0000 } + & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI, { 0xa6ff0000 } }, /* rot.b r1h,${Dsp-16-u24} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24), 0 } }, - & ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI, { 0xa6bf0000 } + & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI, { 0xa6bf0000 } }, /* rot.w r1h,$Dst16RnHI */ { @@ -23070,59 +23246,59 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16), 0 } }, & ifmt_shl16_w_dst_dst16_16_16_absolute_HI, { 0x756f0000 } }, -/* rot.b r1h,$Dst16RnHI */ +/* rot.b r1h,$Dst16RnQI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', 'r', '1', 'h', ',', OP (DST16RNHI), 0 } }, - & ifmt_shl16_w_dst_dst16_Rn_direct_HI, { 0x7460 } + { { MNEM, ' ', 'r', '1', 'h', ',', OP (DST16RNQI), 0 } }, + & ifmt_shl16_b_dst_dst16_Rn_direct_QI, { 0x7460 } }, -/* rot.b r1h,$Dst16AnHI */ +/* rot.b r1h,$Dst16AnQI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', 'r', '1', 'h', ',', OP (DST16ANHI), 0 } }, - & ifmt_shl16_w_dst_dst16_An_direct_HI, { 0x7464 } + { { MNEM, ' ', 'r', '1', 'h', ',', OP (DST16ANQI), 0 } }, + & ifmt_shl16_b_dst_dst16_An_direct_QI, { 0x7464 } }, /* rot.b r1h,[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN), ']', 0 } }, - & ifmt_shl16_w_dst_dst16_An_indirect_HI, { 0x7466 } + & ifmt_shl16_b_dst_dst16_An_indirect_QI, { 0x7466 } }, /* rot.b r1h,${Dsp-16-u8}[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, - & ifmt_shl16_w_dst_dst16_16_8_An_relative_HI, { 0x746800 } + & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI, { 0x746800 } }, /* rot.b r1h,${Dsp-16-u16}[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, - & ifmt_shl16_w_dst_dst16_16_16_An_relative_HI, { 0x746c0000 } + & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI, { 0x746c0000 } }, /* rot.b r1h,${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI, { 0x746a00 } + & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI, { 0x746a00 } }, /* rot.b r1h,${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, - & ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI, { 0x746e0000 } + & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI, { 0x746e0000 } }, /* rot.b r1h,${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI, { 0x746b00 } + & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI, { 0x746b00 } }, /* rot.b r1h,${Dsp-16-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16), 0 } }, - & ifmt_shl16_w_dst_dst16_16_16_absolute_HI, { 0x746f0000 } + & ifmt_shl16_b_dst_dst16_16_16_absolute_QI, { 0x746f0000 } }, /* rot.w${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedHI */ { @@ -24210,112 +24386,112 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, ' ', OP (DSP_16_U24), 0 } }, & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI, { 0xc68e0000 } }, -/* push.w $Dst16RnHI */ +/* push.w${G} $Dst16RnHI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DST16RNHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DST16RNHI), 0 } }, & ifmt_rorc16_w_16_dst16_Rn_direct_HI, { 0x7540 } }, -/* push.w $Dst16AnHI */ +/* push.w${G} $Dst16AnHI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DST16ANHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DST16ANHI), 0 } }, & ifmt_rorc16_w_16_dst16_An_direct_HI, { 0x7544 } }, -/* push.w [$Dst16An] */ +/* push.w${G} [$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (DST16AN), ']', 0 } }, & ifmt_rorc16_w_16_dst16_An_indirect_HI, { 0x7546 } }, -/* push.w ${Dsp-16-u8}[$Dst16An] */ +/* push.w${G} ${Dsp-16-u8}[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI, { 0x754800 } }, -/* push.w ${Dsp-16-u16}[$Dst16An] */ +/* push.w${G} ${Dsp-16-u16}[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI, { 0x754c0000 } }, -/* push.w ${Dsp-16-u8}[sb] */ +/* push.w${G} ${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI, { 0x754a00 } }, -/* push.w ${Dsp-16-u16}[sb] */ +/* push.w${G} ${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI, { 0x754e0000 } }, -/* push.w ${Dsp-16-s8}[fb] */ +/* push.w${G} ${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI, { 0x754b00 } }, -/* push.w ${Dsp-16-u16} */ +/* push.w${G} ${Dsp-16-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), 0 } }, & ifmt_rorc16_w_16_dst16_16_16_absolute_HI, { 0x754f0000 } }, -/* push.b $Dst16RnQI */ +/* push.b${G} $Dst16RnQI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DST16RNQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DST16RNQI), 0 } }, & ifmt_rorc16_b_16_dst16_Rn_direct_QI, { 0x7440 } }, -/* push.b $Dst16AnQI */ +/* push.b${G} $Dst16AnQI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DST16ANQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DST16ANQI), 0 } }, & ifmt_rorc16_b_16_dst16_An_direct_QI, { 0x7444 } }, -/* push.b [$Dst16An] */ +/* push.b${G} [$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (DST16AN), ']', 0 } }, & ifmt_rorc16_b_16_dst16_An_indirect_QI, { 0x7446 } }, -/* push.b ${Dsp-16-u8}[$Dst16An] */ +/* push.b${G} ${Dsp-16-u8}[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI, { 0x744800 } }, -/* push.b ${Dsp-16-u16}[$Dst16An] */ +/* push.b${G} ${Dsp-16-u16}[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI, { 0x744c0000 } }, -/* push.b ${Dsp-16-u8}[sb] */ +/* push.b${G} ${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI, { 0x744a00 } }, -/* push.b ${Dsp-16-u16}[sb] */ +/* push.b${G} ${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI, { 0x744e0000 } }, -/* push.b ${Dsp-16-s8}[fb] */ +/* push.b${G} ${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI, { 0x744b00 } }, -/* push.b ${Dsp-16-u16} */ +/* push.b${G} ${Dsp-16-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), 0 } }, & ifmt_rorc16_b_16_dst16_16_16_absolute_QI, { 0x744f0000 } }, /* pop.w${S} ${An16-push-S} */ @@ -27612,256 +27788,286 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, OP (G), ' ', '#', OP (IMM_32_QI), ',', OP (DSP_16_U16), 0 } }, & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI, { 0x763f0000 } }, -/* not.w $Dst32RnUnprefixedHI */ +/* not.b:s r0l */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DST32RNUNPREFIXEDHI), 0 } }, + { { MNEM, ' ', 'r', '0', 'l', 0 } }, + & ifmt_not16_b_s_dst16_3_S_R0l_direct_QI, { 0xbc } + }, +/* not.b:s r0h */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', 'r', '0', 'h', 0 } }, + & ifmt_not16_b_s_dst16_3_S_R0h_direct_QI, { 0xbb } + }, +/* not.b:s ${Dsp-8-u8}[sb] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_8_U8), '[', 's', 'b', ']', 0 } }, + & ifmt_not16_b_s_dst16_3_S_8_8_SB_relative_QI, { 0xbd00 } + }, +/* not.b:s ${Dsp-8-s8}[fb] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_8_S8), '[', 'f', 'b', ']', 0 } }, + & ifmt_not16_b_s_dst16_3_S_8_8_FB_relative_QI, { 0xbe00 } + }, +/* not.b:s ${Dsp-8-u16} */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_8_U16), 0 } }, + & ifmt_not16_b_s_dst16_3_S_8_16_absolute_QI, { 0xbf0000 } + }, +/* not.w${G} $Dst32RnUnprefixedHI */ + { + { 0, 0, 0, 0 }, + { { MNEM, OP (G), ' ', OP (DST32RNUNPREFIXEDHI), 0 } }, & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI, { 0xa91e } }, -/* not.w $Dst32AnUnprefixedHI */ +/* not.w${G} $Dst32AnUnprefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DST32ANUNPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DST32ANUNPREFIXEDHI), 0 } }, & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI, { 0xa19e } }, -/* not.w [$Dst32AnUnprefixed] */ +/* not.w${G} [$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI, { 0xa11e } }, -/* not.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */ +/* not.w${G} ${Dsp-16-u8}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI, { 0xa31e00 } }, -/* not.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */ +/* not.w${G} ${Dsp-16-u16}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI, { 0xa51e0000 } }, -/* not.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */ +/* not.w${G} ${Dsp-16-u24}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI, { 0xa71e0000 } }, -/* not.w ${Dsp-16-u8}[sb] */ +/* not.w${G} ${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI, { 0xa39e00 } }, -/* not.w ${Dsp-16-u16}[sb] */ +/* not.w${G} ${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI, { 0xa59e0000 } }, -/* not.w ${Dsp-16-s8}[fb] */ +/* not.w${G} ${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI, { 0xa3de00 } }, -/* not.w ${Dsp-16-s16}[fb] */ +/* not.w${G} ${Dsp-16-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI, { 0xa5de0000 } }, -/* not.w ${Dsp-16-u16} */ +/* not.w${G} ${Dsp-16-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), 0 } }, & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI, { 0xa7de0000 } }, -/* not.w ${Dsp-16-u24} */ +/* not.w${G} ${Dsp-16-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U24), 0 } }, & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0xa79e0000 } }, -/* not.b $Dst32RnUnprefixedQI */ +/* not.b${G} $Dst32RnUnprefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DST32RNUNPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DST32RNUNPREFIXEDQI), 0 } }, & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI, { 0xa81e } }, -/* not.b $Dst32AnUnprefixedQI */ +/* not.b${G} $Dst32AnUnprefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DST32ANUNPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DST32ANUNPREFIXEDQI), 0 } }, & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI, { 0xa09e } }, -/* not.b [$Dst32AnUnprefixed] */ +/* not.b${G} [$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI, { 0xa01e } }, -/* not.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */ +/* not.b${G} ${Dsp-16-u8}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI, { 0xa21e00 } }, -/* not.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */ +/* not.b${G} ${Dsp-16-u16}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI, { 0xa41e0000 } }, -/* not.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */ +/* not.b${G} ${Dsp-16-u24}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI, { 0xa61e0000 } }, -/* not.b ${Dsp-16-u8}[sb] */ +/* not.b${G} ${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI, { 0xa29e00 } }, -/* not.b ${Dsp-16-u16}[sb] */ +/* not.b${G} ${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI, { 0xa49e0000 } }, -/* not.b ${Dsp-16-s8}[fb] */ +/* not.b${G} ${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI, { 0xa2de00 } }, -/* not.b ${Dsp-16-s16}[fb] */ +/* not.b${G} ${Dsp-16-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI, { 0xa4de0000 } }, -/* not.b ${Dsp-16-u16} */ +/* not.b${G} ${Dsp-16-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), 0 } }, & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI, { 0xa6de0000 } }, -/* not.b ${Dsp-16-u24} */ +/* not.b${G} ${Dsp-16-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U24), 0 } }, & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI, { 0xa69e0000 } }, -/* not.w $Dst16RnHI */ +/* not.w${G} $Dst16RnHI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DST16RNHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DST16RNHI), 0 } }, & ifmt_rorc16_w_16_dst16_Rn_direct_HI, { 0x7570 } }, -/* not.w $Dst16AnHI */ +/* not.w${G} $Dst16AnHI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DST16ANHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DST16ANHI), 0 } }, & ifmt_rorc16_w_16_dst16_An_direct_HI, { 0x7574 } }, -/* not.w [$Dst16An] */ +/* not.w${G} [$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (DST16AN), ']', 0 } }, & ifmt_rorc16_w_16_dst16_An_indirect_HI, { 0x7576 } }, -/* not.w ${Dsp-16-u8}[$Dst16An] */ +/* not.w${G} ${Dsp-16-u8}[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI, { 0x757800 } }, -/* not.w ${Dsp-16-u16}[$Dst16An] */ +/* not.w${G} ${Dsp-16-u16}[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI, { 0x757c0000 } }, -/* not.w ${Dsp-16-u8}[sb] */ +/* not.w${G} ${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI, { 0x757a00 } }, -/* not.w ${Dsp-16-u16}[sb] */ +/* not.w${G} ${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI, { 0x757e0000 } }, -/* not.w ${Dsp-16-s8}[fb] */ +/* not.w${G} ${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI, { 0x757b00 } }, -/* not.w ${Dsp-16-u16} */ +/* not.w${G} ${Dsp-16-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), 0 } }, & ifmt_rorc16_w_16_dst16_16_16_absolute_HI, { 0x757f0000 } }, -/* not.b $Dst16RnQI */ +/* not.b${G} $Dst16RnQI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DST16RNQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DST16RNQI), 0 } }, & ifmt_rorc16_b_16_dst16_Rn_direct_QI, { 0x7470 } }, -/* not.b $Dst16AnQI */ +/* not.b${G} $Dst16AnQI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DST16ANQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DST16ANQI), 0 } }, & ifmt_rorc16_b_16_dst16_An_direct_QI, { 0x7474 } }, -/* not.b [$Dst16An] */ +/* not.b${G} [$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (DST16AN), ']', 0 } }, & ifmt_rorc16_b_16_dst16_An_indirect_QI, { 0x7476 } }, -/* not.b ${Dsp-16-u8}[$Dst16An] */ +/* not.b${G} ${Dsp-16-u8}[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI, { 0x747800 } }, -/* not.b ${Dsp-16-u16}[$Dst16An] */ +/* not.b${G} ${Dsp-16-u16}[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI, { 0x747c0000 } }, -/* not.b ${Dsp-16-u8}[sb] */ +/* not.b${G} ${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI, { 0x747a00 } }, -/* not.b ${Dsp-16-u16}[sb] */ +/* not.b${G} ${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI, { 0x747e0000 } }, -/* not.b ${Dsp-16-s8}[fb] */ +/* not.b${G} ${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI, { 0x747b00 } }, -/* not.b ${Dsp-16-u16} */ +/* not.b${G} ${Dsp-16-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), 0 } }, & ifmt_rorc16_b_16_dst16_16_16_absolute_QI, { 0x747f0000 } }, /* neg.w $Dst32RnUnprefixedHI */ @@ -35664,508 +35870,508 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, ' ', OP (DSP_16_U16), ',', 'r', '0', 0 } }, & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI, { 0xeb0f0000 } }, -/* mov.w ${Dsp-16-u8}[$Dst32AnUnprefixed],${Dsp-24-u8}[sp] */ +/* mov.w${G} ${Dsp-16-u8}[$Dst32AnUnprefixed],${Dsp-24-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (DSP_24_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (DSP_24_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI, { 0xa30f0000 } }, -/* mov.w ${Dsp-16-u8}[sb],${Dsp-24-u8}[sp] */ +/* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (DSP_24_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (DSP_24_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI, { 0xa38f0000 } }, -/* mov.w ${Dsp-16-s8}[fb],${Dsp-24-u8}[sp] */ +/* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (DSP_24_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (DSP_24_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI, { 0xa3cf0000 } }, -/* mov.w ${Dsp-16-u16}[$Dst32AnUnprefixed],${Dsp-32-u8}[sp] */ +/* mov.w${G} ${Dsp-16-u16}[$Dst32AnUnprefixed],${Dsp-32-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (DSP_32_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (DSP_32_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI, { 0xa50f0000 } }, -/* mov.w ${Dsp-16-u16}[sb],${Dsp-32-u8}[sp] */ +/* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (DSP_32_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (DSP_32_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI, { 0xa58f0000 } }, -/* mov.w ${Dsp-16-s16}[fb],${Dsp-32-u8}[sp] */ +/* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_S16), '[', 'f', 'b', ']', ',', OP (DSP_32_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S16), '[', 'f', 'b', ']', ',', OP (DSP_32_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI, { 0xa5cf0000 } }, -/* mov.w ${Dsp-16-u16},${Dsp-32-u8}[sp] */ +/* mov.w${G} ${Dsp-16-u16},${Dsp-32-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), ',', OP (DSP_32_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), ',', OP (DSP_32_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI, { 0xa7cf0000 } }, -/* mov.w ${Dsp-16-u24}[$Dst32AnUnprefixed],${Dsp-40-u8}[sp] */ +/* mov.w${G} ${Dsp-16-u24}[$Dst32AnUnprefixed],${Dsp-40-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (DSP_40_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (DSP_40_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI, { 0xa70f0000 } }, -/* mov.w ${Dsp-16-u24},${Dsp-40-u8}[sp] */ +/* mov.w${G} ${Dsp-16-u24},${Dsp-40-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U24), ',', OP (DSP_40_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U24), ',', OP (DSP_40_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI, { 0xa78f0000 } }, -/* mov.w $Dst32RnUnprefixedHI,${Dsp-16-u8}[sp] */ +/* mov.w${G} $Dst32RnUnprefixedHI,${Dsp-16-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DST32RNUNPREFIXEDHI), ',', OP (DSP_16_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DST32RNUNPREFIXEDHI), ',', OP (DSP_16_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI, { 0xa90f00 } }, -/* mov.w $Dst32AnUnprefixedHI,${Dsp-16-u8}[sp] */ +/* mov.w${G} $Dst32AnUnprefixedHI,${Dsp-16-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DST32ANUNPREFIXEDHI), ',', OP (DSP_16_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DST32ANUNPREFIXEDHI), ',', OP (DSP_16_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_HI, { 0xa18f00 } }, -/* mov.w [$Dst32AnUnprefixed],${Dsp-16-u8}[sp] */ +/* mov.w${G} [$Dst32AnUnprefixed],${Dsp-16-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '[', OP (DST32ANUNPREFIXED), ']', ',', OP (DSP_16_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (DST32ANUNPREFIXED), ']', ',', OP (DSP_16_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI, { 0xa10f00 } }, -/* mov.b ${Dsp-16-u8}[$Dst32AnUnprefixed],${Dsp-24-u8}[sp] */ +/* mov.b${G} ${Dsp-16-u8}[$Dst32AnUnprefixed],${Dsp-24-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (DSP_24_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (DSP_24_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI, { 0xa20f0000 } }, -/* mov.b ${Dsp-16-u8}[sb],${Dsp-24-u8}[sp] */ +/* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (DSP_24_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (DSP_24_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI, { 0xa28f0000 } }, -/* mov.b ${Dsp-16-s8}[fb],${Dsp-24-u8}[sp] */ +/* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (DSP_24_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (DSP_24_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI, { 0xa2cf0000 } }, -/* mov.b ${Dsp-16-u16}[$Dst32AnUnprefixed],${Dsp-32-u8}[sp] */ +/* mov.b${G} ${Dsp-16-u16}[$Dst32AnUnprefixed],${Dsp-32-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (DSP_32_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (DSP_32_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI, { 0xa40f0000 } }, -/* mov.b ${Dsp-16-u16}[sb],${Dsp-32-u8}[sp] */ +/* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (DSP_32_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (DSP_32_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI, { 0xa48f0000 } }, -/* mov.b ${Dsp-16-s16}[fb],${Dsp-32-u8}[sp] */ +/* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_S16), '[', 'f', 'b', ']', ',', OP (DSP_32_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S16), '[', 'f', 'b', ']', ',', OP (DSP_32_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI, { 0xa4cf0000 } }, -/* mov.b ${Dsp-16-u16},${Dsp-32-u8}[sp] */ +/* mov.b${G} ${Dsp-16-u16},${Dsp-32-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), ',', OP (DSP_32_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), ',', OP (DSP_32_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI, { 0xa6cf0000 } }, -/* mov.b ${Dsp-16-u24}[$Dst32AnUnprefixed],${Dsp-40-u8}[sp] */ +/* mov.b${G} ${Dsp-16-u24}[$Dst32AnUnprefixed],${Dsp-40-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (DSP_40_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (DSP_40_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI, { 0xa60f0000 } }, -/* mov.b ${Dsp-16-u24},${Dsp-40-u8}[sp] */ +/* mov.b${G} ${Dsp-16-u24},${Dsp-40-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U24), ',', OP (DSP_40_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U24), ',', OP (DSP_40_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI, { 0xa68f0000 } }, -/* mov.b $Dst32RnUnprefixedQI,${Dsp-16-u8}[sp] */ +/* mov.b${G} $Dst32RnUnprefixedQI,${Dsp-16-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DST32RNUNPREFIXEDQI), ',', OP (DSP_16_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DST32RNUNPREFIXEDQI), ',', OP (DSP_16_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI, { 0xa80f00 } }, -/* mov.b $Dst32AnUnprefixedQI,${Dsp-16-u8}[sp] */ +/* mov.b${G} $Dst32AnUnprefixedQI,${Dsp-16-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DST32ANUNPREFIXEDQI), ',', OP (DSP_16_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DST32ANUNPREFIXEDQI), ',', OP (DSP_16_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_QI, { 0xa08f00 } }, -/* mov.b [$Dst32AnUnprefixed],${Dsp-16-u8}[sp] */ +/* mov.b${G} [$Dst32AnUnprefixed],${Dsp-16-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '[', OP (DST32ANUNPREFIXED), ']', ',', OP (DSP_16_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (DST32ANUNPREFIXED), ']', ',', OP (DSP_16_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI, { 0xa00f00 } }, -/* mov.w ${Dsp-16-u8}[$Dst16An],${Dsp-24-u8}[sp] */ +/* mov.w${G} ${Dsp-16-u8}[$Dst16An],${Dsp-24-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', ',', OP (DSP_24_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', ',', OP (DSP_24_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_An_relative_HI, { 0x75380000 } }, -/* mov.w ${Dsp-16-u8}[sb],${Dsp-24-u8}[sp] */ +/* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (DSP_24_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (DSP_24_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_SB_relative_HI, { 0x753a0000 } }, -/* mov.w ${Dsp-16-s8}[fb],${Dsp-24-u8}[sp] */ +/* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (DSP_24_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (DSP_24_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_FB_relative_HI, { 0x753b0000 } }, -/* mov.w ${Dsp-16-u16}[$Dst16An],${Dsp-32-u8}[sp] */ +/* mov.w${G} ${Dsp-16-u16}[$Dst16An],${Dsp-32-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', ',', OP (DSP_32_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', ',', OP (DSP_32_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_An_relative_HI, { 0x753c0000 } }, -/* mov.w ${Dsp-16-u16}[sb],${Dsp-32-u8}[sp] */ +/* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (DSP_32_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (DSP_32_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_SB_relative_HI, { 0x753e0000 } }, -/* mov.w ${Dsp-16-u16},${Dsp-32-u8}[sp] */ +/* mov.w${G} ${Dsp-16-u16},${Dsp-32-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), ',', OP (DSP_32_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), ',', OP (DSP_32_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_absolute_HI, { 0x753f0000 } }, -/* mov.w $Dst16RnHI,${Dsp-16-u8}[sp] */ +/* mov.w${G} $Dst16RnHI,${Dsp-16-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DST16RNHI), ',', OP (DSP_16_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DST16RNHI), ',', OP (DSP_16_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov16_w_dst_dspsp_basic_dst16_Rn_direct_HI, { 0x753000 } }, -/* mov.w $Dst16AnHI,${Dsp-16-u8}[sp] */ +/* mov.w${G} $Dst16AnHI,${Dsp-16-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DST16ANHI), ',', OP (DSP_16_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DST16ANHI), ',', OP (DSP_16_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov16_w_dst_dspsp_basic_dst16_An_direct_HI, { 0x753400 } }, -/* mov.w [$Dst16An],${Dsp-16-u8}[sp] */ +/* mov.w${G} [$Dst16An],${Dsp-16-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '[', OP (DST16AN), ']', ',', OP (DSP_16_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (DST16AN), ']', ',', OP (DSP_16_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov16_w_dst_dspsp_basic_dst16_An_indirect_HI, { 0x753600 } }, -/* mov.b ${Dsp-16-u8}[$Dst16An],${Dsp-24-u8}[sp] */ +/* mov.b${G} ${Dsp-16-u8}[$Dst16An],${Dsp-24-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', ',', OP (DSP_24_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', ',', OP (DSP_24_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_An_relative_QI, { 0x74380000 } }, -/* mov.b ${Dsp-16-u8}[sb],${Dsp-24-u8}[sp] */ +/* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (DSP_24_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (DSP_24_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_SB_relative_QI, { 0x743a0000 } }, -/* mov.b ${Dsp-16-s8}[fb],${Dsp-24-u8}[sp] */ +/* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (DSP_24_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (DSP_24_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_FB_relative_QI, { 0x743b0000 } }, -/* mov.b ${Dsp-16-u16}[$Dst16An],${Dsp-32-u8}[sp] */ +/* mov.b${G} ${Dsp-16-u16}[$Dst16An],${Dsp-32-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', ',', OP (DSP_32_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', ',', OP (DSP_32_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_An_relative_QI, { 0x743c0000 } }, -/* mov.b ${Dsp-16-u16}[sb],${Dsp-32-u8}[sp] */ +/* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (DSP_32_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (DSP_32_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_SB_relative_QI, { 0x743e0000 } }, -/* mov.b ${Dsp-16-u16},${Dsp-32-u8}[sp] */ +/* mov.b${G} ${Dsp-16-u16},${Dsp-32-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U16), ',', OP (DSP_32_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_U16), ',', OP (DSP_32_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_absolute_QI, { 0x743f0000 } }, -/* mov.b $Dst16RnQI,${Dsp-16-u8}[sp] */ +/* mov.b${G} $Dst16RnQI,${Dsp-16-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DST16RNQI), ',', OP (DSP_16_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DST16RNQI), ',', OP (DSP_16_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov16_b_dst_dspsp_basic_dst16_Rn_direct_QI, { 0x743000 } }, -/* mov.b $Dst16AnQI,${Dsp-16-u8}[sp] */ +/* mov.b${G} $Dst16AnQI,${Dsp-16-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DST16ANQI), ',', OP (DSP_16_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DST16ANQI), ',', OP (DSP_16_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov16_b_dst_dspsp_basic_dst16_An_direct_QI, { 0x743400 } }, -/* mov.b [$Dst16An],${Dsp-16-u8}[sp] */ +/* mov.b${G} [$Dst16An],${Dsp-16-s8}[sp] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '[', OP (DST16AN), ']', ',', OP (DSP_16_U8), '[', 's', 'p', ']', 0 } }, + { { MNEM, OP (G), ' ', '[', OP (DST16AN), ']', ',', OP (DSP_16_S8), '[', 's', 'p', ']', 0 } }, & ifmt_mov16_b_dst_dspsp_basic_dst16_An_indirect_QI, { 0x743600 } }, -/* mov.w ${Dsp-24-u8}[sp],${Dsp-16-u8}[$Dst32AnUnprefixed] */ +/* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_24_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI, { 0xb30f0000 } }, -/* mov.w ${Dsp-24-u8}[sp],${Dsp-16-u8}[sb] */ +/* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_24_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI, { 0xb38f0000 } }, -/* mov.w ${Dsp-24-u8}[sp],${Dsp-16-s8}[fb] */ +/* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_24_U8), '[', 's', 'p', ']', ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 's', 'p', ']', ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI, { 0xb3cf0000 } }, -/* mov.w ${Dsp-32-u8}[sp],${Dsp-16-u16}[$Dst32AnUnprefixed] */ +/* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_32_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_32_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI, { 0xb50f0000 } }, -/* mov.w ${Dsp-32-u8}[sp],${Dsp-16-u16}[sb] */ +/* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_32_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_32_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI, { 0xb58f0000 } }, -/* mov.w ${Dsp-32-u8}[sp],${Dsp-16-s16}[fb] */ +/* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_32_U8), '[', 's', 'p', ']', ',', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_32_S8), '[', 's', 'p', ']', ',', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI, { 0xb5cf0000 } }, -/* mov.w ${Dsp-32-u8}[sp],${Dsp-16-u16} */ +/* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_32_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_32_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), 0 } }, & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI, { 0xb7cf0000 } }, -/* mov.w ${Dsp-40-u8}[sp],${Dsp-16-u24}[$Dst32AnUnprefixed] */ +/* mov.w${G} ${Dsp-40-s8}[sp],${Dsp-16-u24}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_40_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_40_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI, { 0xb70f0000 } }, -/* mov.w ${Dsp-40-u8}[sp],${Dsp-16-u24} */ +/* mov.w${G} ${Dsp-40-s8}[sp],${Dsp-16-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_40_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_40_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U24), 0 } }, & ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI, { 0xb78f0000 } }, -/* mov.w ${Dsp-16-u8}[sp],$Dst32RnUnprefixedHI */ +/* mov.w${G} ${Dsp-16-s8}[sp],$Dst32RnUnprefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'p', ']', ',', OP (DST32RNUNPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 's', 'p', ']', ',', OP (DST32RNUNPREFIXEDHI), 0 } }, & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI, { 0xb90f00 } }, -/* mov.w ${Dsp-16-u8}[sp],$Dst32AnUnprefixedHI */ +/* mov.w${G} ${Dsp-16-s8}[sp],$Dst32AnUnprefixedHI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'p', ']', ',', OP (DST32ANUNPREFIXEDHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 's', 'p', ']', ',', OP (DST32ANUNPREFIXEDHI), 0 } }, & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_HI, { 0xb18f00 } }, -/* mov.w ${Dsp-16-u8}[sp],[$Dst32AnUnprefixed] */ +/* mov.w${G} ${Dsp-16-s8}[sp],[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'p', ']', ',', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 's', 'p', ']', ',', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI, { 0xb10f00 } }, -/* mov.b ${Dsp-24-u8}[sp],${Dsp-16-u8}[$Dst32AnUnprefixed] */ +/* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_24_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI, { 0xb20f0000 } }, -/* mov.b ${Dsp-24-u8}[sp],${Dsp-16-u8}[sb] */ +/* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_24_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI, { 0xb28f0000 } }, -/* mov.b ${Dsp-24-u8}[sp],${Dsp-16-s8}[fb] */ +/* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_24_U8), '[', 's', 'p', ']', ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 's', 'p', ']', ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI, { 0xb2cf0000 } }, -/* mov.b ${Dsp-32-u8}[sp],${Dsp-16-u16}[$Dst32AnUnprefixed] */ +/* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_32_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_32_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI, { 0xb40f0000 } }, -/* mov.b ${Dsp-32-u8}[sp],${Dsp-16-u16}[sb] */ +/* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_32_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_32_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI, { 0xb48f0000 } }, -/* mov.b ${Dsp-32-u8}[sp],${Dsp-16-s16}[fb] */ +/* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-s16}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_32_U8), '[', 's', 'p', ']', ',', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_32_S8), '[', 's', 'p', ']', ',', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI, { 0xb4cf0000 } }, -/* mov.b ${Dsp-32-u8}[sp],${Dsp-16-u16} */ +/* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_32_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_32_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), 0 } }, & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI, { 0xb6cf0000 } }, -/* mov.b ${Dsp-40-u8}[sp],${Dsp-16-u24}[$Dst32AnUnprefixed] */ +/* mov.b${G} ${Dsp-40-s8}[sp],${Dsp-16-u24}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_40_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_40_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI, { 0xb60f0000 } }, -/* mov.b ${Dsp-40-u8}[sp],${Dsp-16-u24} */ +/* mov.b${G} ${Dsp-40-s8}[sp],${Dsp-16-u24} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_40_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U24), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_40_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U24), 0 } }, & ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI, { 0xb68f0000 } }, -/* mov.b ${Dsp-16-u8}[sp],$Dst32RnUnprefixedQI */ +/* mov.b${G} ${Dsp-16-s8}[sp],$Dst32RnUnprefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'p', ']', ',', OP (DST32RNUNPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 's', 'p', ']', ',', OP (DST32RNUNPREFIXEDQI), 0 } }, & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI, { 0xb80f00 } }, -/* mov.b ${Dsp-16-u8}[sp],$Dst32AnUnprefixedQI */ +/* mov.b${G} ${Dsp-16-s8}[sp],$Dst32AnUnprefixedQI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'p', ']', ',', OP (DST32ANUNPREFIXEDQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 's', 'p', ']', ',', OP (DST32ANUNPREFIXEDQI), 0 } }, & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_QI, { 0xb08f00 } }, -/* mov.b ${Dsp-16-u8}[sp],[$Dst32AnUnprefixed] */ +/* mov.b${G} ${Dsp-16-s8}[sp],[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'p', ']', ',', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 's', 'p', ']', ',', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI, { 0xb00f00 } }, -/* mov.w ${Dsp-24-u8}[sp],${Dsp-16-u8}[$Dst16An] */ +/* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_24_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_An_relative_HI, { 0x75b80000 } }, -/* mov.w ${Dsp-24-u8}[sp],${Dsp-16-u8}[sb] */ +/* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_24_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_SB_relative_HI, { 0x75ba0000 } }, -/* mov.w ${Dsp-24-u8}[sp],${Dsp-16-s8}[fb] */ +/* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_24_U8), '[', 's', 'p', ']', ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 's', 'p', ']', ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_FB_relative_HI, { 0x75bb0000 } }, -/* mov.w ${Dsp-32-u8}[sp],${Dsp-16-u16}[$Dst16An] */ +/* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_32_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_32_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_An_relative_HI, { 0x75bc0000 } }, -/* mov.w ${Dsp-32-u8}[sp],${Dsp-16-u16}[sb] */ +/* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_32_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_32_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_SB_relative_HI, { 0x75be0000 } }, -/* mov.w ${Dsp-32-u8}[sp],${Dsp-16-u16} */ +/* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_32_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_32_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), 0 } }, & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_absolute_HI, { 0x75bf0000 } }, -/* mov.w ${Dsp-16-u8}[sp],$Dst16RnHI */ +/* mov.w${G} ${Dsp-16-s8}[sp],$Dst16RnHI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'p', ']', ',', OP (DST16RNHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 's', 'p', ']', ',', OP (DST16RNHI), 0 } }, & ifmt_mov16_w_dst_dspsp_basic_dst16_Rn_direct_HI, { 0x75b000 } }, -/* mov.w ${Dsp-16-u8}[sp],$Dst16AnHI */ +/* mov.w${G} ${Dsp-16-s8}[sp],$Dst16AnHI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'p', ']', ',', OP (DST16ANHI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 's', 'p', ']', ',', OP (DST16ANHI), 0 } }, & ifmt_mov16_w_dst_dspsp_basic_dst16_An_direct_HI, { 0x75b400 } }, -/* mov.w ${Dsp-16-u8}[sp],[$Dst16An] */ +/* mov.w${G} ${Dsp-16-s8}[sp],[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'p', ']', ',', '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 's', 'p', ']', ',', '[', OP (DST16AN), ']', 0 } }, & ifmt_mov16_w_dst_dspsp_basic_dst16_An_indirect_HI, { 0x75b600 } }, -/* mov.b ${Dsp-24-u8}[sp],${Dsp-16-u8}[$Dst16An] */ +/* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_24_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_An_relative_QI, { 0x74b80000 } }, -/* mov.b ${Dsp-24-u8}[sp],${Dsp-16-u8}[sb] */ +/* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_24_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_SB_relative_QI, { 0x74ba0000 } }, -/* mov.b ${Dsp-24-u8}[sp],${Dsp-16-s8}[fb] */ +/* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_24_U8), '[', 's', 'p', ']', ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_24_S8), '[', 's', 'p', ']', ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_FB_relative_QI, { 0x74bb0000 } }, -/* mov.b ${Dsp-32-u8}[sp],${Dsp-16-u16}[$Dst16An] */ +/* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_32_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_32_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_An_relative_QI, { 0x74bc0000 } }, -/* mov.b ${Dsp-32-u8}[sp],${Dsp-16-u16}[sb] */ +/* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_32_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_32_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_SB_relative_QI, { 0x74be0000 } }, -/* mov.b ${Dsp-32-u8}[sp],${Dsp-16-u16} */ +/* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_32_U8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_32_S8), '[', 's', 'p', ']', ',', OP (DSP_16_U16), 0 } }, & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_absolute_QI, { 0x74bf0000 } }, -/* mov.b ${Dsp-16-u8}[sp],$Dst16RnQI */ +/* mov.b${G} ${Dsp-16-s8}[sp],$Dst16RnQI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'p', ']', ',', OP (DST16RNQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 's', 'p', ']', ',', OP (DST16RNQI), 0 } }, & ifmt_mov16_b_dst_dspsp_basic_dst16_Rn_direct_QI, { 0x74b000 } }, -/* mov.b ${Dsp-16-u8}[sp],$Dst16AnQI */ +/* mov.b${G} ${Dsp-16-s8}[sp],$Dst16AnQI */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'p', ']', ',', OP (DST16ANQI), 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 's', 'p', ']', ',', OP (DST16ANQI), 0 } }, & ifmt_mov16_b_dst_dspsp_basic_dst16_An_direct_QI, { 0x74b400 } }, -/* mov.b ${Dsp-16-u8}[sp],[$Dst16An] */ +/* mov.b${G} ${Dsp-16-s8}[sp],[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'p', ']', ',', '[', OP (DST16AN), ']', 0 } }, + { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 's', 'p', ']', ',', '[', OP (DST16AN), ']', 0 } }, & ifmt_mov16_b_dst_dspsp_basic_dst16_An_indirect_QI, { 0x74b600 } }, /* mov.l${S} ${Dsp-8-u8}[sb],a1 */ @@ -36276,11 +36482,11 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, OP (S), ' ', OP (DSP_8_U16), ',', 'r', '1', 'l', 0 } }, & ifmt_mov32_b_r0l_dst32_2_S_16_dst32_2_S_16_absolute_QI, { 0x5e0000 } }, -/* mov.w${S} r0,r1l */ +/* mov.w${S} r0,r1 */ { { 0, 0, 0, 0 }, - { { MNEM, OP (S), ' ', 'r', '0', ',', 'r', '1', 'l', 0 } }, - & ifmt_mov32_w_dst32_2_S_basic_r1l_dst32_2_S_R0_direct_HI, { 0x4f } + { { MNEM, OP (S), ' ', 'r', '0', ',', 'r', '1', 0 } }, + & ifmt_mov32_w_dst32_2_S_basic_r1_dst32_2_S_R0_direct_HI, { 0x4f } }, /* mov.b${S} r0l,r1l */ { @@ -39970,7 +40176,7 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { 0, 0, 0, 0 }, { { MNEM, OP (Z), ' ', '#', '0', ',', 'r', '0', 0 } }, - & ifmt_mov32_w_dst32_2_S_basic_r1l_dst32_2_S_R0_direct_HI, { 0x3 } + & ifmt_mov32_w_dst32_2_S_basic_r1_dst32_2_S_R0_direct_HI, { 0x3 } }, /* mov.b${Z} #0,${Dsp-8-u8}[sb] */ { @@ -40000,31 +40206,31 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { 0, 0, 0, 0 }, { { MNEM, OP (Z), ' ', '#', '0', ',', 'r', '0', 'l', 0 } }, - & ifmt_mov16_b_Z_imm8_dst3_dst16_3_S_R0l_direct_QI, { 0xb4 } + & ifmt_not16_b_s_dst16_3_S_R0l_direct_QI, { 0xb4 } }, /* mov.b${Z} #0,r0h */ { { 0, 0, 0, 0 }, { { MNEM, OP (Z), ' ', '#', '0', ',', 'r', '0', 'h', 0 } }, - & ifmt_mov16_b_Z_imm8_dst3_dst16_3_S_R0h_direct_QI, { 0xb3 } + & ifmt_not16_b_s_dst16_3_S_R0h_direct_QI, { 0xb3 } }, /* mov.b${Z} #0,${Dsp-8-u8}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, OP (Z), ' ', '#', '0', ',', OP (DSP_8_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_mov16_b_Z_imm8_dst3_dst16_3_S_8_8_SB_relative_QI, { 0xb500 } + & ifmt_not16_b_s_dst16_3_S_8_8_SB_relative_QI, { 0xb500 } }, /* mov.b${Z} #0,${Dsp-8-s8}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, OP (Z), ' ', '#', '0', ',', OP (DSP_8_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_mov16_b_Z_imm8_dst3_dst16_3_S_8_8_FB_relative_QI, { 0xb600 } + & ifmt_not16_b_s_dst16_3_S_8_8_FB_relative_QI, { 0xb600 } }, /* mov.b${Z} #0,${Dsp-8-u16} */ { { 0, 0, 0, 0 }, { { MNEM, OP (Z), ' ', '#', '0', ',', OP (DSP_8_U16), 0 } }, - & ifmt_mov16_b_Z_imm8_dst3_dst16_3_S_8_16_absolute_QI, { 0xb70000 } + & ifmt_not16_b_s_dst16_3_S_8_16_absolute_QI, { 0xb70000 } }, /* mov.w${Q} #${Imm-12-s4},$Dst32RnUnprefixedHI */ { @@ -44424,221 +44630,653 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, OP (X), ' ', '#', OP (IMM_48_QI), ',', OP (DSP_24_U24), 0 } }, & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI, { 0x186bf00 } }, -/* ste.w ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20} */ +/* ste.w ${Dsp-16-u16}[$Dst16An],[a1a0] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', ',', OP (DSP_24_U20), 0 } }, - & ifmt_ste16_w_dst_dspsp_16_8_dst16_16_8_An_relative_HI, { 0x75080000 } + { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } }, + & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI, { 0x752c0000 } }, -/* ste.w ${Dsp-16-u8}[sb],${Dsp-24-u20} */ +/* ste.w ${Dsp-16-u16}[sb],[a1a0] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (DSP_24_U20), 0 } }, - & ifmt_ste16_w_dst_dspsp_16_8_dst16_16_8_SB_relative_HI, { 0x750a0000 } + { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } }, + & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI, { 0x752e0000 } }, -/* ste.w ${Dsp-16-s8}[fb],${Dsp-24-u20} */ +/* ste.w ${Dsp-16-u16},[a1a0] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (DSP_24_U20), 0 } }, - & ifmt_ste16_w_dst_dspsp_16_8_dst16_16_8_FB_relative_HI, { 0x750b0000 } + { { MNEM, ' ', OP (DSP_16_U16), ',', '[', 'a', '1', 'a', '0', ']', 0 } }, + & ifmt_rorc16_w_16_dst16_16_16_absolute_HI, { 0x752f0000 } + }, +/* ste.w ${Dsp-16-u16}[$Dst16An],${Dsp-32-u20}[a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', ',', OP (DSP_32_U20), '[', 'a', '0', ']', 0 } }, + & ifmt_ste_w_16_16_u20a0_dst16_16_16_An_relative_HI, { 0x751c0000 } + }, +/* ste.w ${Dsp-16-u16}[sb],${Dsp-32-u20}[a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (DSP_32_U20), '[', 'a', '0', ']', 0 } }, + & ifmt_ste_w_16_16_u20a0_dst16_16_16_SB_relative_HI, { 0x751e0000 } + }, +/* ste.w ${Dsp-16-u16},${Dsp-32-u20}[a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U16), ',', OP (DSP_32_U20), '[', 'a', '0', ']', 0 } }, + & ifmt_ste_w_16_16_u20a0_dst16_16_16_absolute_HI, { 0x751f0000 } }, /* ste.w ${Dsp-16-u16}[$Dst16An],${Dsp-32-u20} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', ',', OP (DSP_32_U20), 0 } }, - & ifmt_ste16_w_dst_dspsp_16_16_dst16_16_16_An_relative_HI, { 0x750c0000 } + & ifmt_ste_w_16_16_u20a0_dst16_16_16_An_relative_HI, { 0x750c0000 } }, /* ste.w ${Dsp-16-u16}[sb],${Dsp-32-u20} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (DSP_32_U20), 0 } }, - & ifmt_ste16_w_dst_dspsp_16_16_dst16_16_16_SB_relative_HI, { 0x750e0000 } + & ifmt_ste_w_16_16_u20a0_dst16_16_16_SB_relative_HI, { 0x750e0000 } }, /* ste.w ${Dsp-16-u16},${Dsp-32-u20} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), ',', OP (DSP_32_U20), 0 } }, - & ifmt_ste16_w_dst_dspsp_16_16_dst16_16_16_absolute_HI, { 0x750f0000 } + & ifmt_ste_w_16_16_u20a0_dst16_16_16_absolute_HI, { 0x750f0000 } + }, +/* ste.w ${Dsp-16-u8}[$Dst16An],[a1a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } }, + & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI, { 0x752800 } + }, +/* ste.w ${Dsp-16-u8}[sb],[a1a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } }, + & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI, { 0x752a00 } + }, +/* ste.w ${Dsp-16-s8}[fb],[a1a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } }, + & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI, { 0x752b00 } + }, +/* ste.w ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20}[a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', ',', OP (DSP_24_U20), '[', 'a', '0', ']', 0 } }, + & ifmt_ste_w_16_8_u20a0_dst16_16_8_An_relative_HI, { 0x75180000 } + }, +/* ste.w ${Dsp-16-u8}[sb],${Dsp-24-u20}[a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (DSP_24_U20), '[', 'a', '0', ']', 0 } }, + & ifmt_ste_w_16_8_u20a0_dst16_16_8_SB_relative_HI, { 0x751a0000 } + }, +/* ste.w ${Dsp-16-s8}[fb],${Dsp-24-u20}[a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (DSP_24_U20), '[', 'a', '0', ']', 0 } }, + & ifmt_ste_w_16_8_u20a0_dst16_16_8_FB_relative_HI, { 0x751b0000 } + }, +/* ste.w ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20} */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', ',', OP (DSP_24_U20), 0 } }, + & ifmt_ste_w_16_8_u20a0_dst16_16_8_An_relative_HI, { 0x75080000 } + }, +/* ste.w ${Dsp-16-u8}[sb],${Dsp-24-u20} */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (DSP_24_U20), 0 } }, + & ifmt_ste_w_16_8_u20a0_dst16_16_8_SB_relative_HI, { 0x750a0000 } + }, +/* ste.w ${Dsp-16-s8}[fb],${Dsp-24-u20} */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (DSP_24_U20), 0 } }, + & ifmt_ste_w_16_8_u20a0_dst16_16_8_FB_relative_HI, { 0x750b0000 } + }, +/* ste.w $Dst16RnHI,[a1a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DST16RNHI), ',', '[', 'a', '1', 'a', '0', ']', 0 } }, + & ifmt_rorc16_w_16_dst16_Rn_direct_HI, { 0x7520 } + }, +/* ste.w $Dst16AnHI,[a1a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DST16ANHI), ',', '[', 'a', '1', 'a', '0', ']', 0 } }, + & ifmt_rorc16_w_16_dst16_An_direct_HI, { 0x7524 } + }, +/* ste.w [$Dst16An],[a1a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', '[', OP (DST16AN), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } }, + & ifmt_rorc16_w_16_dst16_An_indirect_HI, { 0x7526 } + }, +/* ste.w $Dst16RnHI,${Dsp-16-u20}[a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DST16RNHI), ',', OP (DSP_16_U20), '[', 'a', '0', ']', 0 } }, + & ifmt_ste_w_basic_u20a0_dst16_Rn_direct_HI, { 0x75100000 } + }, +/* ste.w $Dst16AnHI,${Dsp-16-u20}[a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DST16ANHI), ',', OP (DSP_16_U20), '[', 'a', '0', ']', 0 } }, + & ifmt_ste_w_basic_u20a0_dst16_An_direct_HI, { 0x75140000 } + }, +/* ste.w [$Dst16An],${Dsp-16-u20}[a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', '[', OP (DST16AN), ']', ',', OP (DSP_16_U20), '[', 'a', '0', ']', 0 } }, + & ifmt_ste_w_basic_u20a0_dst16_An_indirect_HI, { 0x75160000 } }, /* ste.w $Dst16RnHI,${Dsp-16-u20} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST16RNHI), ',', OP (DSP_16_U20), 0 } }, - & ifmt_ste16_w_dst_dspsp_basic_dst16_Rn_direct_HI, { 0x75000000 } + & ifmt_ste_w_basic_u20a0_dst16_Rn_direct_HI, { 0x75000000 } }, /* ste.w $Dst16AnHI,${Dsp-16-u20} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST16ANHI), ',', OP (DSP_16_U20), 0 } }, - & ifmt_ste16_w_dst_dspsp_basic_dst16_An_direct_HI, { 0x75040000 } + & ifmt_ste_w_basic_u20a0_dst16_An_direct_HI, { 0x75040000 } }, /* ste.w [$Dst16An],${Dsp-16-u20} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '[', OP (DST16AN), ']', ',', OP (DSP_16_U20), 0 } }, - & ifmt_ste16_w_dst_dspsp_basic_dst16_An_indirect_HI, { 0x75060000 } + & ifmt_ste_w_basic_u20a0_dst16_An_indirect_HI, { 0x75060000 } }, -/* ste.b ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20} */ +/* ste.b ${Dsp-16-u16}[$Dst16An],[a1a0] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', ',', OP (DSP_24_U20), 0 } }, - & ifmt_ste16_b_dst_dspsp_16_8_dst16_16_8_An_relative_QI, { 0x74080000 } + { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } }, + & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI, { 0x742c0000 } }, -/* ste.b ${Dsp-16-u8}[sb],${Dsp-24-u20} */ +/* ste.b ${Dsp-16-u16}[sb],[a1a0] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (DSP_24_U20), 0 } }, - & ifmt_ste16_b_dst_dspsp_16_8_dst16_16_8_SB_relative_QI, { 0x740a0000 } + { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } }, + & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI, { 0x742e0000 } }, -/* ste.b ${Dsp-16-s8}[fb],${Dsp-24-u20} */ +/* ste.b ${Dsp-16-u16},[a1a0] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (DSP_24_U20), 0 } }, - & ifmt_ste16_b_dst_dspsp_16_8_dst16_16_8_FB_relative_QI, { 0x740b0000 } + { { MNEM, ' ', OP (DSP_16_U16), ',', '[', 'a', '1', 'a', '0', ']', 0 } }, + & ifmt_rorc16_b_16_dst16_16_16_absolute_QI, { 0x742f0000 } + }, +/* ste.b ${Dsp-16-u16}[$Dst16An],${Dsp-32-u20}[a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', ',', OP (DSP_32_U20), '[', 'a', '0', ']', 0 } }, + & ifmt_ste_b_16_16_u20a0_dst16_16_16_An_relative_QI, { 0x741c0000 } + }, +/* ste.b ${Dsp-16-u16}[sb],${Dsp-32-u20}[a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (DSP_32_U20), '[', 'a', '0', ']', 0 } }, + & ifmt_ste_b_16_16_u20a0_dst16_16_16_SB_relative_QI, { 0x741e0000 } + }, +/* ste.b ${Dsp-16-u16},${Dsp-32-u20}[a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U16), ',', OP (DSP_32_U20), '[', 'a', '0', ']', 0 } }, + & ifmt_ste_b_16_16_u20a0_dst16_16_16_absolute_QI, { 0x741f0000 } }, /* ste.b ${Dsp-16-u16}[$Dst16An],${Dsp-32-u20} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', ',', OP (DSP_32_U20), 0 } }, - & ifmt_ste16_b_dst_dspsp_16_16_dst16_16_16_An_relative_QI, { 0x740c0000 } + & ifmt_ste_b_16_16_u20a0_dst16_16_16_An_relative_QI, { 0x740c0000 } }, /* ste.b ${Dsp-16-u16}[sb],${Dsp-32-u20} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (DSP_32_U20), 0 } }, - & ifmt_ste16_b_dst_dspsp_16_16_dst16_16_16_SB_relative_QI, { 0x740e0000 } + & ifmt_ste_b_16_16_u20a0_dst16_16_16_SB_relative_QI, { 0x740e0000 } }, /* ste.b ${Dsp-16-u16},${Dsp-32-u20} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), ',', OP (DSP_32_U20), 0 } }, - & ifmt_ste16_b_dst_dspsp_16_16_dst16_16_16_absolute_QI, { 0x740f0000 } + & ifmt_ste_b_16_16_u20a0_dst16_16_16_absolute_QI, { 0x740f0000 } + }, +/* ste.b ${Dsp-16-u8}[$Dst16An],[a1a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } }, + & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI, { 0x742800 } + }, +/* ste.b ${Dsp-16-u8}[sb],[a1a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } }, + & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI, { 0x742a00 } + }, +/* ste.b ${Dsp-16-s8}[fb],[a1a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } }, + & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI, { 0x742b00 } + }, +/* ste.b ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20}[a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', ',', OP (DSP_24_U20), '[', 'a', '0', ']', 0 } }, + & ifmt_ste_b_16_8_u20a0_dst16_16_8_An_relative_QI, { 0x74180000 } + }, +/* ste.b ${Dsp-16-u8}[sb],${Dsp-24-u20}[a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (DSP_24_U20), '[', 'a', '0', ']', 0 } }, + & ifmt_ste_b_16_8_u20a0_dst16_16_8_SB_relative_QI, { 0x741a0000 } + }, +/* ste.b ${Dsp-16-s8}[fb],${Dsp-24-u20}[a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (DSP_24_U20), '[', 'a', '0', ']', 0 } }, + & ifmt_ste_b_16_8_u20a0_dst16_16_8_FB_relative_QI, { 0x741b0000 } + }, +/* ste.b ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20} */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', ',', OP (DSP_24_U20), 0 } }, + & ifmt_ste_b_16_8_u20a0_dst16_16_8_An_relative_QI, { 0x74080000 } + }, +/* ste.b ${Dsp-16-u8}[sb],${Dsp-24-u20} */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (DSP_24_U20), 0 } }, + & ifmt_ste_b_16_8_u20a0_dst16_16_8_SB_relative_QI, { 0x740a0000 } + }, +/* ste.b ${Dsp-16-s8}[fb],${Dsp-24-u20} */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (DSP_24_U20), 0 } }, + & ifmt_ste_b_16_8_u20a0_dst16_16_8_FB_relative_QI, { 0x740b0000 } + }, +/* ste.b $Dst16RnQI,[a1a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DST16RNQI), ',', '[', 'a', '1', 'a', '0', ']', 0 } }, + & ifmt_rorc16_b_16_dst16_Rn_direct_QI, { 0x7420 } + }, +/* ste.b $Dst16AnQI,[a1a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DST16ANQI), ',', '[', 'a', '1', 'a', '0', ']', 0 } }, + & ifmt_rorc16_b_16_dst16_An_direct_QI, { 0x7424 } + }, +/* ste.b [$Dst16An],[a1a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', '[', OP (DST16AN), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } }, + & ifmt_rorc16_b_16_dst16_An_indirect_QI, { 0x7426 } + }, +/* ste.b $Dst16RnQI,${Dsp-16-u20}[a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DST16RNQI), ',', OP (DSP_16_U20), '[', 'a', '0', ']', 0 } }, + & ifmt_ste_b_basic_u20a0_dst16_Rn_direct_QI, { 0x74100000 } + }, +/* ste.b $Dst16AnQI,${Dsp-16-u20}[a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DST16ANQI), ',', OP (DSP_16_U20), '[', 'a', '0', ']', 0 } }, + & ifmt_ste_b_basic_u20a0_dst16_An_direct_QI, { 0x74140000 } + }, +/* ste.b [$Dst16An],${Dsp-16-u20}[a0] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', '[', OP (DST16AN), ']', ',', OP (DSP_16_U20), '[', 'a', '0', ']', 0 } }, + & ifmt_ste_b_basic_u20a0_dst16_An_indirect_QI, { 0x74160000 } }, /* ste.b $Dst16RnQI,${Dsp-16-u20} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST16RNQI), ',', OP (DSP_16_U20), 0 } }, - & ifmt_ste16_b_dst_dspsp_basic_dst16_Rn_direct_QI, { 0x74000000 } + & ifmt_ste_b_basic_u20a0_dst16_Rn_direct_QI, { 0x74000000 } }, /* ste.b $Dst16AnQI,${Dsp-16-u20} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST16ANQI), ',', OP (DSP_16_U20), 0 } }, - & ifmt_ste16_b_dst_dspsp_basic_dst16_An_direct_QI, { 0x74040000 } + & ifmt_ste_b_basic_u20a0_dst16_An_direct_QI, { 0x74040000 } }, /* ste.b [$Dst16An],${Dsp-16-u20} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '[', OP (DST16AN), ']', ',', OP (DSP_16_U20), 0 } }, - & ifmt_ste16_b_dst_dspsp_basic_dst16_An_indirect_QI, { 0x74060000 } + & ifmt_ste_b_basic_u20a0_dst16_An_indirect_QI, { 0x74060000 } }, -/* lde.w ${Dsp-24-u20},${Dsp-16-u8}[$Dst16An] */ +/* lde.w [a1a0],${Dsp-16-u16}[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_24_U20), ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, - & ifmt_ste16_w_dst_dspsp_16_8_dst16_16_8_An_relative_HI, { 0x75880000 } + { { MNEM, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, + & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI, { 0x75ac0000 } }, -/* lde.w ${Dsp-24-u20},${Dsp-16-u8}[sb] */ +/* lde.w [a1a0],${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_24_U20), ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_ste16_w_dst_dspsp_16_8_dst16_16_8_SB_relative_HI, { 0x758a0000 } + { { MNEM, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, + & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI, { 0x75ae0000 } }, -/* lde.w ${Dsp-24-u20},${Dsp-16-s8}[fb] */ +/* lde.w [a1a0],${Dsp-16-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_24_U20), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_ste16_w_dst_dspsp_16_8_dst16_16_8_FB_relative_HI, { 0x758b0000 } + { { MNEM, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16), 0 } }, + & ifmt_rorc16_w_16_dst16_16_16_absolute_HI, { 0x75af0000 } + }, +/* lde.w ${Dsp-32-u20}[a0],${Dsp-16-u16}[$Dst16An] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_32_U20), '[', 'a', '0', ']', ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, + & ifmt_ste_w_16_16_u20a0_dst16_16_16_An_relative_HI, { 0x759c0000 } + }, +/* lde.w ${Dsp-32-u20}[a0],${Dsp-16-u16}[sb] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_32_U20), '[', 'a', '0', ']', ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, + & ifmt_ste_w_16_16_u20a0_dst16_16_16_SB_relative_HI, { 0x759e0000 } + }, +/* lde.w ${Dsp-32-u20}[a0],${Dsp-16-u16} */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_32_U20), '[', 'a', '0', ']', ',', OP (DSP_16_U16), 0 } }, + & ifmt_ste_w_16_16_u20a0_dst16_16_16_absolute_HI, { 0x759f0000 } }, /* lde.w ${Dsp-32-u20},${Dsp-16-u16}[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_32_U20), ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, - & ifmt_ste16_w_dst_dspsp_16_16_dst16_16_16_An_relative_HI, { 0x758c0000 } + & ifmt_ste_w_16_16_u20a0_dst16_16_16_An_relative_HI, { 0x758c0000 } }, /* lde.w ${Dsp-32-u20},${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_32_U20), ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, - & ifmt_ste16_w_dst_dspsp_16_16_dst16_16_16_SB_relative_HI, { 0x758e0000 } + & ifmt_ste_w_16_16_u20a0_dst16_16_16_SB_relative_HI, { 0x758e0000 } }, /* lde.w ${Dsp-32-u20},${Dsp-16-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_32_U20), ',', OP (DSP_16_U16), 0 } }, - & ifmt_ste16_w_dst_dspsp_16_16_dst16_16_16_absolute_HI, { 0x758f0000 } + & ifmt_ste_w_16_16_u20a0_dst16_16_16_absolute_HI, { 0x758f0000 } + }, +/* lde.w [a1a0],${Dsp-16-u8}[$Dst16An] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, + & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI, { 0x75a800 } + }, +/* lde.w [a1a0],${Dsp-16-u8}[sb] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, + & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI, { 0x75aa00 } + }, +/* lde.w [a1a0],${Dsp-16-s8}[fb] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI, { 0x75ab00 } + }, +/* lde.w ${Dsp-24-u20}[a0],${Dsp-16-u8}[$Dst16An] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_24_U20), '[', 'a', '0', ']', ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, + & ifmt_ste_w_16_8_u20a0_dst16_16_8_An_relative_HI, { 0x75980000 } + }, +/* lde.w ${Dsp-24-u20}[a0],${Dsp-16-u8}[sb] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_24_U20), '[', 'a', '0', ']', ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, + & ifmt_ste_w_16_8_u20a0_dst16_16_8_SB_relative_HI, { 0x759a0000 } + }, +/* lde.w ${Dsp-24-u20}[a0],${Dsp-16-s8}[fb] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_24_U20), '[', 'a', '0', ']', ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + & ifmt_ste_w_16_8_u20a0_dst16_16_8_FB_relative_HI, { 0x759b0000 } + }, +/* lde.w ${Dsp-24-u20},${Dsp-16-u8}[$Dst16An] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_24_U20), ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, + & ifmt_ste_w_16_8_u20a0_dst16_16_8_An_relative_HI, { 0x75880000 } + }, +/* lde.w ${Dsp-24-u20},${Dsp-16-u8}[sb] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_24_U20), ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, + & ifmt_ste_w_16_8_u20a0_dst16_16_8_SB_relative_HI, { 0x758a0000 } + }, +/* lde.w ${Dsp-24-u20},${Dsp-16-s8}[fb] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_24_U20), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + & ifmt_ste_w_16_8_u20a0_dst16_16_8_FB_relative_HI, { 0x758b0000 } + }, +/* lde.w [a1a0],$Dst16RnHI */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DST16RNHI), 0 } }, + & ifmt_rorc16_w_16_dst16_Rn_direct_HI, { 0x75a0 } + }, +/* lde.w [a1a0],$Dst16AnHI */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DST16ANHI), 0 } }, + & ifmt_rorc16_w_16_dst16_An_direct_HI, { 0x75a4 } + }, +/* lde.w [a1a0],[$Dst16An] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', '[', 'a', '1', 'a', '0', ']', ',', '[', OP (DST16AN), ']', 0 } }, + & ifmt_rorc16_w_16_dst16_An_indirect_HI, { 0x75a6 } + }, +/* lde.w ${Dsp-16-u20}[a0],$Dst16RnHI */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U20), '[', 'a', '0', ']', ',', OP (DST16RNHI), 0 } }, + & ifmt_ste_w_basic_u20a0_dst16_Rn_direct_HI, { 0x75900000 } + }, +/* lde.w ${Dsp-16-u20}[a0],$Dst16AnHI */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U20), '[', 'a', '0', ']', ',', OP (DST16ANHI), 0 } }, + & ifmt_ste_w_basic_u20a0_dst16_An_direct_HI, { 0x75940000 } + }, +/* lde.w ${Dsp-16-u20}[a0],[$Dst16An] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U20), '[', 'a', '0', ']', ',', '[', OP (DST16AN), ']', 0 } }, + & ifmt_ste_w_basic_u20a0_dst16_An_indirect_HI, { 0x75960000 } }, /* lde.w ${Dsp-16-u20},$Dst16RnHI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U20), ',', OP (DST16RNHI), 0 } }, - & ifmt_ste16_w_dst_dspsp_basic_dst16_Rn_direct_HI, { 0x75800000 } + & ifmt_ste_w_basic_u20a0_dst16_Rn_direct_HI, { 0x75800000 } }, /* lde.w ${Dsp-16-u20},$Dst16AnHI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U20), ',', OP (DST16ANHI), 0 } }, - & ifmt_ste16_w_dst_dspsp_basic_dst16_An_direct_HI, { 0x75840000 } + & ifmt_ste_w_basic_u20a0_dst16_An_direct_HI, { 0x75840000 } }, /* lde.w ${Dsp-16-u20},[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U20), ',', '[', OP (DST16AN), ']', 0 } }, - & ifmt_ste16_w_dst_dspsp_basic_dst16_An_indirect_HI, { 0x75860000 } + & ifmt_ste_w_basic_u20a0_dst16_An_indirect_HI, { 0x75860000 } }, -/* lde.b ${Dsp-24-u20},${Dsp-16-u8}[$Dst16An] */ +/* lde.b [a1a0],${Dsp-16-u16}[$Dst16An] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_24_U20), ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, - & ifmt_ste16_b_dst_dspsp_16_8_dst16_16_8_An_relative_QI, { 0x74880000 } + { { MNEM, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, + & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI, { 0x74ac0000 } }, -/* lde.b ${Dsp-24-u20},${Dsp-16-u8}[sb] */ +/* lde.b [a1a0],${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_24_U20), ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_ste16_b_dst_dspsp_16_8_dst16_16_8_SB_relative_QI, { 0x748a0000 } + { { MNEM, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, + & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI, { 0x74ae0000 } }, -/* lde.b ${Dsp-24-u20},${Dsp-16-s8}[fb] */ +/* lde.b [a1a0],${Dsp-16-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (DSP_24_U20), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_ste16_b_dst_dspsp_16_8_dst16_16_8_FB_relative_QI, { 0x748b0000 } + { { MNEM, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16), 0 } }, + & ifmt_rorc16_b_16_dst16_16_16_absolute_QI, { 0x74af0000 } + }, +/* lde.b ${Dsp-32-u20}[a0],${Dsp-16-u16}[$Dst16An] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_32_U20), '[', 'a', '0', ']', ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, + & ifmt_ste_b_16_16_u20a0_dst16_16_16_An_relative_QI, { 0x749c0000 } + }, +/* lde.b ${Dsp-32-u20}[a0],${Dsp-16-u16}[sb] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_32_U20), '[', 'a', '0', ']', ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, + & ifmt_ste_b_16_16_u20a0_dst16_16_16_SB_relative_QI, { 0x749e0000 } + }, +/* lde.b ${Dsp-32-u20}[a0],${Dsp-16-u16} */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_32_U20), '[', 'a', '0', ']', ',', OP (DSP_16_U16), 0 } }, + & ifmt_ste_b_16_16_u20a0_dst16_16_16_absolute_QI, { 0x749f0000 } }, /* lde.b ${Dsp-32-u20},${Dsp-16-u16}[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_32_U20), ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } }, - & ifmt_ste16_b_dst_dspsp_16_16_dst16_16_16_An_relative_QI, { 0x748c0000 } + & ifmt_ste_b_16_16_u20a0_dst16_16_16_An_relative_QI, { 0x748c0000 } }, /* lde.b ${Dsp-32-u20},${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_32_U20), ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, - & ifmt_ste16_b_dst_dspsp_16_16_dst16_16_16_SB_relative_QI, { 0x748e0000 } + & ifmt_ste_b_16_16_u20a0_dst16_16_16_SB_relative_QI, { 0x748e0000 } }, /* lde.b ${Dsp-32-u20},${Dsp-16-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_32_U20), ',', OP (DSP_16_U16), 0 } }, - & ifmt_ste16_b_dst_dspsp_16_16_dst16_16_16_absolute_QI, { 0x748f0000 } + & ifmt_ste_b_16_16_u20a0_dst16_16_16_absolute_QI, { 0x748f0000 } + }, +/* lde.b [a1a0],${Dsp-16-u8}[$Dst16An] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, + & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI, { 0x74a800 } + }, +/* lde.b [a1a0],${Dsp-16-u8}[sb] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, + & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI, { 0x74aa00 } + }, +/* lde.b [a1a0],${Dsp-16-s8}[fb] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI, { 0x74ab00 } + }, +/* lde.b ${Dsp-24-u20}[a0],${Dsp-16-u8}[$Dst16An] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_24_U20), '[', 'a', '0', ']', ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, + & ifmt_ste_b_16_8_u20a0_dst16_16_8_An_relative_QI, { 0x74980000 } + }, +/* lde.b ${Dsp-24-u20}[a0],${Dsp-16-u8}[sb] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_24_U20), '[', 'a', '0', ']', ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, + & ifmt_ste_b_16_8_u20a0_dst16_16_8_SB_relative_QI, { 0x749a0000 } + }, +/* lde.b ${Dsp-24-u20}[a0],${Dsp-16-s8}[fb] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_24_U20), '[', 'a', '0', ']', ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + & ifmt_ste_b_16_8_u20a0_dst16_16_8_FB_relative_QI, { 0x749b0000 } + }, +/* lde.b ${Dsp-24-u20},${Dsp-16-u8}[$Dst16An] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_24_U20), ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } }, + & ifmt_ste_b_16_8_u20a0_dst16_16_8_An_relative_QI, { 0x74880000 } + }, +/* lde.b ${Dsp-24-u20},${Dsp-16-u8}[sb] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_24_U20), ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, + & ifmt_ste_b_16_8_u20a0_dst16_16_8_SB_relative_QI, { 0x748a0000 } + }, +/* lde.b ${Dsp-24-u20},${Dsp-16-s8}[fb] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_24_U20), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + & ifmt_ste_b_16_8_u20a0_dst16_16_8_FB_relative_QI, { 0x748b0000 } + }, +/* lde.b [a1a0],$Dst16RnQI */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DST16RNQI), 0 } }, + & ifmt_rorc16_b_16_dst16_Rn_direct_QI, { 0x74a0 } + }, +/* lde.b [a1a0],$Dst16AnQI */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DST16ANQI), 0 } }, + & ifmt_rorc16_b_16_dst16_An_direct_QI, { 0x74a4 } + }, +/* lde.b [a1a0],[$Dst16An] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', '[', 'a', '1', 'a', '0', ']', ',', '[', OP (DST16AN), ']', 0 } }, + & ifmt_rorc16_b_16_dst16_An_indirect_QI, { 0x74a6 } + }, +/* lde.b ${Dsp-16-u20}[a0],$Dst16RnQI */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U20), '[', 'a', '0', ']', ',', OP (DST16RNQI), 0 } }, + & ifmt_ste_b_basic_u20a0_dst16_Rn_direct_QI, { 0x74900000 } + }, +/* lde.b ${Dsp-16-u20}[a0],$Dst16AnQI */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U20), '[', 'a', '0', ']', ',', OP (DST16ANQI), 0 } }, + & ifmt_ste_b_basic_u20a0_dst16_An_direct_QI, { 0x74940000 } + }, +/* lde.b ${Dsp-16-u20}[a0],[$Dst16An] */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (DSP_16_U20), '[', 'a', '0', ']', ',', '[', OP (DST16AN), ']', 0 } }, + & ifmt_ste_b_basic_u20a0_dst16_An_indirect_QI, { 0x74960000 } }, /* lde.b ${Dsp-16-u20},$Dst16RnQI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U20), ',', OP (DST16RNQI), 0 } }, - & ifmt_ste16_b_dst_dspsp_basic_dst16_Rn_direct_QI, { 0x74800000 } + & ifmt_ste_b_basic_u20a0_dst16_Rn_direct_QI, { 0x74800000 } }, /* lde.b ${Dsp-16-u20},$Dst16AnQI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U20), ',', OP (DST16ANQI), 0 } }, - & ifmt_ste16_b_dst_dspsp_basic_dst16_An_direct_QI, { 0x74840000 } + & ifmt_ste_b_basic_u20a0_dst16_An_direct_QI, { 0x74840000 } }, /* lde.b ${Dsp-16-u20},[$Dst16An] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U20), ',', '[', OP (DST16AN), ']', 0 } }, - & ifmt_ste16_b_dst_dspsp_basic_dst16_An_indirect_QI, { 0x74860000 } + & ifmt_ste_b_basic_u20a0_dst16_An_indirect_QI, { 0x74860000 } }, /* stc ${cr3-Prefixed-32},$Dst32RnPrefixedSI */ { @@ -45742,73 +46380,73 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST32RNUNPREFIXEDHI), 0 } }, - & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI, { 0xc833 } + & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI, { 0xc933 } }, /* indexws.w $Dst32AnUnprefixedHI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST32ANUNPREFIXEDHI), 0 } }, - & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI, { 0xc0b3 } + & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI, { 0xc1b3 } }, /* indexws.w [$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI, { 0xc033 } + & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI, { 0xc133 } }, /* indexws.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI, { 0xc23300 } + & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI, { 0xc33300 } }, /* indexws.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI, { 0xc4330000 } + & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI, { 0xc5330000 } }, /* indexws.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI, { 0xc6330000 } + & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI, { 0xc7330000 } }, /* indexws.w ${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI, { 0xc2b300 } + & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI, { 0xc3b300 } }, /* indexws.w ${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI, { 0xc4b30000 } + & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI, { 0xc5b30000 } }, /* indexws.w ${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI, { 0xc2f300 } + & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI, { 0xc3f300 } }, /* indexws.w ${Dsp-16-s16}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI, { 0xc4f30000 } + & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI, { 0xc5f30000 } }, /* indexws.w ${Dsp-16-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI, { 0xc6f30000 } + & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI, { 0xc7f30000 } }, /* indexws.w ${Dsp-16-u24} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U24), 0 } }, - & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0xc6b30000 } + & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0xc7b30000 } }, /* indexws.b $Dst32RnUnprefixedQI */ { @@ -45886,73 +46524,73 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST32RNUNPREFIXEDHI), 0 } }, - & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI, { 0xa833 } + & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI, { 0xa933 } }, /* indexwd.w $Dst32AnUnprefixedHI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST32ANUNPREFIXEDHI), 0 } }, - & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI, { 0xa0b3 } + & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI, { 0xa1b3 } }, /* indexwd.w [$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI, { 0xa033 } + & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI, { 0xa133 } }, /* indexwd.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI, { 0xa23300 } + & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI, { 0xa33300 } }, /* indexwd.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI, { 0xa4330000 } + & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI, { 0xa5330000 } }, /* indexwd.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI, { 0xa6330000 } + & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI, { 0xa7330000 } }, /* indexwd.w ${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI, { 0xa2b300 } + & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI, { 0xa3b300 } }, /* indexwd.w ${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI, { 0xa4b30000 } + & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI, { 0xa5b30000 } }, /* indexwd.w ${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI, { 0xa2f300 } + & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI, { 0xa3f300 } }, /* indexwd.w ${Dsp-16-s16}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI, { 0xa4f30000 } + & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI, { 0xa5f30000 } }, /* indexwd.w ${Dsp-16-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI, { 0xa6f30000 } + & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI, { 0xa7f30000 } }, /* indexwd.w ${Dsp-16-u24} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U24), 0 } }, - & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0xa6b30000 } + & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0xa7b30000 } }, /* indexwd.b $Dst32RnUnprefixedQI */ { @@ -46030,73 +46668,73 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST32RNUNPREFIXEDHI), 0 } }, - & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI, { 0x8833 } + & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI, { 0x8933 } }, /* indexw.w $Dst32AnUnprefixedHI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST32ANUNPREFIXEDHI), 0 } }, - & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI, { 0x80b3 } + & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI, { 0x81b3 } }, /* indexw.w [$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI, { 0x8033 } + & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI, { 0x8133 } }, /* indexw.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI, { 0x823300 } + & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI, { 0x833300 } }, /* indexw.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI, { 0x84330000 } + & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI, { 0x85330000 } }, /* indexw.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI, { 0x86330000 } + & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI, { 0x87330000 } }, /* indexw.w ${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI, { 0x82b300 } + & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI, { 0x83b300 } }, /* indexw.w ${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI, { 0x84b30000 } + & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI, { 0x85b30000 } }, /* indexw.w ${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI, { 0x82f300 } + & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI, { 0x83f300 } }, /* indexw.w ${Dsp-16-s16}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI, { 0x84f30000 } + & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI, { 0x85f30000 } }, /* indexw.w ${Dsp-16-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI, { 0x86f30000 } + & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI, { 0x87f30000 } }, /* indexw.w ${Dsp-16-u24} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U24), 0 } }, - & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0x86b30000 } + & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0x87b30000 } }, /* indexw.b $Dst32RnUnprefixedQI */ { @@ -46174,73 +46812,73 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST32RNUNPREFIXEDHI), 0 } }, - & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI, { 0x9813 } + & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI, { 0x9913 } }, /* indexls.w $Dst32AnUnprefixedHI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST32ANUNPREFIXEDHI), 0 } }, - & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI, { 0x9093 } + & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI, { 0x9193 } }, /* indexls.w [$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI, { 0x9013 } + & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI, { 0x9113 } }, /* indexls.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI, { 0x921300 } + & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI, { 0x931300 } }, /* indexls.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI, { 0x94130000 } + & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI, { 0x95130000 } }, /* indexls.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI, { 0x96130000 } + & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI, { 0x97130000 } }, /* indexls.w ${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI, { 0x929300 } + & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI, { 0x939300 } }, /* indexls.w ${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI, { 0x94930000 } + & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI, { 0x95930000 } }, /* indexls.w ${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI, { 0x92d300 } + & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI, { 0x93d300 } }, /* indexls.w ${Dsp-16-s16}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI, { 0x94d30000 } + & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI, { 0x95d30000 } }, /* indexls.w ${Dsp-16-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI, { 0x96d30000 } + & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI, { 0x97d30000 } }, /* indexls.w ${Dsp-16-u24} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U24), 0 } }, - & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0x96930000 } + & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0x97930000 } }, /* indexls.b $Dst32RnUnprefixedQI */ { @@ -46318,73 +46956,73 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST32RNUNPREFIXEDHI), 0 } }, - & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI, { 0xb833 } + & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI, { 0xb933 } }, /* indexld.w $Dst32AnUnprefixedHI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST32ANUNPREFIXEDHI), 0 } }, - & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI, { 0xb0b3 } + & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI, { 0xb1b3 } }, /* indexld.w [$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI, { 0xb033 } + & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI, { 0xb133 } }, /* indexld.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI, { 0xb23300 } + & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI, { 0xb33300 } }, /* indexld.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI, { 0xb4330000 } + & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI, { 0xb5330000 } }, /* indexld.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI, { 0xb6330000 } + & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI, { 0xb7330000 } }, /* indexld.w ${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI, { 0xb2b300 } + & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI, { 0xb3b300 } }, /* indexld.w ${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI, { 0xb4b30000 } + & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI, { 0xb5b30000 } }, /* indexld.w ${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI, { 0xb2f300 } + & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI, { 0xb3f300 } }, /* indexld.w ${Dsp-16-s16}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI, { 0xb4f30000 } + & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI, { 0xb5f30000 } }, /* indexld.w ${Dsp-16-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI, { 0xb6f30000 } + & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI, { 0xb7f30000 } }, /* indexld.w ${Dsp-16-u24} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U24), 0 } }, - & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0xb6b30000 } + & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0xb7b30000 } }, /* indexld.b $Dst32RnUnprefixedQI */ { @@ -46462,73 +47100,73 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST32RNUNPREFIXEDHI), 0 } }, - & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI, { 0x9833 } + & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI, { 0x9933 } }, /* indexl.w $Dst32AnUnprefixedHI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST32ANUNPREFIXEDHI), 0 } }, - & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI, { 0x90b3 } + & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI, { 0x91b3 } }, /* indexl.w [$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI, { 0x9033 } + & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI, { 0x9133 } }, /* indexl.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI, { 0x923300 } + & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI, { 0x933300 } }, /* indexl.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI, { 0x94330000 } + & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI, { 0x95330000 } }, /* indexl.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI, { 0x96330000 } + & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI, { 0x97330000 } }, /* indexl.w ${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI, { 0x92b300 } + & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI, { 0x93b300 } }, /* indexl.w ${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI, { 0x94b30000 } + & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI, { 0x95b30000 } }, /* indexl.w ${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI, { 0x92f300 } + & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI, { 0x93f300 } }, /* indexl.w ${Dsp-16-s16}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI, { 0x94f30000 } + & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI, { 0x95f30000 } }, /* indexl.w ${Dsp-16-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI, { 0x96f30000 } + & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI, { 0x97f30000 } }, /* indexl.w ${Dsp-16-u24} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U24), 0 } }, - & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0x96b30000 } + & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0x97b30000 } }, /* indexl.b $Dst32RnUnprefixedQI */ { @@ -46606,73 +47244,73 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST32RNUNPREFIXEDHI), 0 } }, - & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI, { 0xc813 } + & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI, { 0xc913 } }, /* indexbs.w $Dst32AnUnprefixedHI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST32ANUNPREFIXEDHI), 0 } }, - & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI, { 0xc093 } + & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI, { 0xc193 } }, /* indexbs.w [$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI, { 0xc013 } + & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI, { 0xc113 } }, /* indexbs.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI, { 0xc21300 } + & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI, { 0xc31300 } }, /* indexbs.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI, { 0xc4130000 } + & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI, { 0xc5130000 } }, /* indexbs.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI, { 0xc6130000 } + & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI, { 0xc7130000 } }, /* indexbs.w ${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI, { 0xc29300 } + & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI, { 0xc39300 } }, /* indexbs.w ${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI, { 0xc4930000 } + & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI, { 0xc5930000 } }, /* indexbs.w ${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI, { 0xc2d300 } + & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI, { 0xc3d300 } }, /* indexbs.w ${Dsp-16-s16}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI, { 0xc4d30000 } + & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI, { 0xc5d30000 } }, /* indexbs.w ${Dsp-16-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI, { 0xc6d30000 } + & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI, { 0xc7d30000 } }, /* indexbs.w ${Dsp-16-u24} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U24), 0 } }, - & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0xc6930000 } + & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0xc7930000 } }, /* indexbs.b $Dst32RnUnprefixedQI */ { @@ -46750,73 +47388,73 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST32RNUNPREFIXEDHI), 0 } }, - & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI, { 0xa813 } + & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI, { 0xa913 } }, /* indexbd.w $Dst32AnUnprefixedHI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST32ANUNPREFIXEDHI), 0 } }, - & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI, { 0xa093 } + & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI, { 0xa193 } }, /* indexbd.w [$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI, { 0xa013 } + & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI, { 0xa113 } }, /* indexbd.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI, { 0xa21300 } + & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI, { 0xa31300 } }, /* indexbd.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI, { 0xa4130000 } + & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI, { 0xa5130000 } }, /* indexbd.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI, { 0xa6130000 } + & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI, { 0xa7130000 } }, /* indexbd.w ${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI, { 0xa29300 } + & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI, { 0xa39300 } }, /* indexbd.w ${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI, { 0xa4930000 } + & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI, { 0xa5930000 } }, /* indexbd.w ${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI, { 0xa2d300 } + & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI, { 0xa3d300 } }, /* indexbd.w ${Dsp-16-s16}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI, { 0xa4d30000 } + & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI, { 0xa5d30000 } }, /* indexbd.w ${Dsp-16-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI, { 0xa6d30000 } + & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI, { 0xa7d30000 } }, /* indexbd.w ${Dsp-16-u24} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U24), 0 } }, - & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0xa6930000 } + & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0xa7930000 } }, /* indexbd.b $Dst32RnUnprefixedQI */ { @@ -46894,73 +47532,73 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST32RNUNPREFIXEDHI), 0 } }, - & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI, { 0x8813 } + & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI, { 0x8913 } }, /* indexb.w $Dst32AnUnprefixedHI */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DST32ANUNPREFIXEDHI), 0 } }, - & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI, { 0x8093 } + & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI, { 0x8193 } }, /* indexb.w [$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI, { 0x8013 } + & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI, { 0x8113 } }, /* indexb.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI, { 0x821300 } + & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI, { 0x831300 } }, /* indexb.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI, { 0x84130000 } + & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI, { 0x85130000 } }, /* indexb.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI, { 0x86130000 } + & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI, { 0x87130000 } }, /* indexb.w ${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI, { 0x829300 } + & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI, { 0x839300 } }, /* indexb.w ${Dsp-16-u16}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI, { 0x84930000 } + & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI, { 0x85930000 } }, /* indexb.w ${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI, { 0x82d300 } + & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI, { 0x83d300 } }, /* indexb.w ${Dsp-16-s16}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_S16), '[', 'f', 'b', ']', 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI, { 0x84d30000 } + & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI, { 0x85d30000 } }, /* indexb.w ${Dsp-16-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U16), 0 } }, - & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI, { 0x86d30000 } + & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI, { 0x87d30000 } }, /* indexb.w ${Dsp-16-u24} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_16_U24), 0 } }, - & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0x86930000 } + & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0x87930000 } }, /* indexb.b $Dst32RnUnprefixedQI */ { @@ -47182,31 +47820,31 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'l', 0 } }, - & ifmt_mov16_b_Z_imm8_dst3_dst16_3_S_R0l_direct_QI, { 0xa4 } + & ifmt_not16_b_s_dst16_3_S_R0l_direct_QI, { 0xa4 } }, /* inc.b r0h */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'h', 0 } }, - & ifmt_mov16_b_Z_imm8_dst3_dst16_3_S_R0h_direct_QI, { 0xa3 } + & ifmt_not16_b_s_dst16_3_S_R0h_direct_QI, { 0xa3 } }, /* inc.b ${Dsp-8-u8}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_8_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_mov16_b_Z_imm8_dst3_dst16_3_S_8_8_SB_relative_QI, { 0xa500 } + & ifmt_not16_b_s_dst16_3_S_8_8_SB_relative_QI, { 0xa500 } }, /* inc.b ${Dsp-8-s8}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_8_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_mov16_b_Z_imm8_dst3_dst16_3_S_8_8_FB_relative_QI, { 0xa600 } + & ifmt_not16_b_s_dst16_3_S_8_8_FB_relative_QI, { 0xa600 } }, /* inc.b ${Dsp-8-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_8_U16), 0 } }, - & ifmt_mov16_b_Z_imm8_dst3_dst16_3_S_8_16_absolute_QI, { 0xa70000 } + & ifmt_not16_b_s_dst16_3_S_8_16_absolute_QI, { 0xa70000 } }, /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */ { @@ -56062,31 +56700,31 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'l', 0 } }, - & ifmt_mov16_b_Z_imm8_dst3_dst16_3_S_R0l_direct_QI, { 0xac } + & ifmt_not16_b_s_dst16_3_S_R0l_direct_QI, { 0xac } }, /* dec.b r0h */ { { 0, 0, 0, 0 }, { { MNEM, ' ', 'r', '0', 'h', 0 } }, - & ifmt_mov16_b_Z_imm8_dst3_dst16_3_S_R0h_direct_QI, { 0xab } + & ifmt_not16_b_s_dst16_3_S_R0h_direct_QI, { 0xab } }, /* dec.b ${Dsp-8-u8}[sb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_8_U8), '[', 's', 'b', ']', 0 } }, - & ifmt_mov16_b_Z_imm8_dst3_dst16_3_S_8_8_SB_relative_QI, { 0xad00 } + & ifmt_not16_b_s_dst16_3_S_8_8_SB_relative_QI, { 0xad00 } }, /* dec.b ${Dsp-8-s8}[fb] */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_8_S8), '[', 'f', 'b', ']', 0 } }, - & ifmt_mov16_b_Z_imm8_dst3_dst16_3_S_8_8_FB_relative_QI, { 0xae00 } + & ifmt_not16_b_s_dst16_3_S_8_8_FB_relative_QI, { 0xae00 } }, /* dec.b ${Dsp-8-u16} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSP_8_U16), 0 } }, - & ifmt_mov16_b_Z_imm8_dst3_dst16_3_S_8_16_absolute_QI, { 0xaf0000 } + & ifmt_not16_b_s_dst16_3_S_8_16_absolute_QI, { 0xaf0000 } }, /* cmpx${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */ { @@ -65572,253 +66210,253 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_24_8), 0 } }, - & ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI, { 0xf3100000 } + & ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI, { 0xf3100000 } }, /* adjnz.w #${Imm-12-s4},${Dsp-16-u8}[sb],${Lab-24-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (LAB_24_8), 0 } }, - & ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI, { 0xf3900000 } + & ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI, { 0xf3900000 } }, /* adjnz.w #${Imm-12-s4},${Dsp-16-s8}[fb],${Lab-24-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (LAB_24_8), 0 } }, - & ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI, { 0xf3d00000 } + & ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI, { 0xf3d00000 } }, /* adjnz.w #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_32_8), 0 } }, - & ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI, { 0xf5100000 } + & ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI, { 0xf5100000 } }, /* adjnz.w #${Imm-12-s4},${Dsp-16-u16}[sb],${Lab-32-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (LAB_32_8), 0 } }, - & ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI, { 0xf5900000 } + & ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI, { 0xf5900000 } }, /* adjnz.w #${Imm-12-s4},${Dsp-16-s16}[fb],${Lab-32-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_S16), '[', 'f', 'b', ']', ',', OP (LAB_32_8), 0 } }, - & ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI, { 0xf5d00000 } + & ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI, { 0xf5d00000 } }, /* adjnz.w #${Imm-12-s4},${Dsp-16-u16},${Lab-32-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U16), ',', OP (LAB_32_8), 0 } }, - & ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI, { 0xf7d00000 } + & ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI, { 0xf7d00000 } }, /* adjnz.w #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_40_8), 0 } }, - & ifmt_sbjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI, { 0xf7100000 } + & ifmt_adjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI, { 0xf7100000 } }, /* adjnz.w #${Imm-12-s4},${Dsp-16-u24},${Lab-40-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U24), ',', OP (LAB_40_8), 0 } }, - & ifmt_sbjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI, { 0xf7900000 } + & ifmt_adjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI, { 0xf7900000 } }, /* adjnz.w #${Imm-12-s4},$Dst32RnUnprefixedHI,${Lab-16-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DST32RNUNPREFIXEDHI), ',', OP (LAB_16_8), 0 } }, - & ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI, { 0xf91000 } + & ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI, { 0xf91000 } }, /* adjnz.w #${Imm-12-s4},$Dst32AnUnprefixedHI,${Lab-16-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DST32ANUNPREFIXEDHI), ',', OP (LAB_16_8), 0 } }, - & ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_HI, { 0xf19000 } + & ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_HI, { 0xf19000 } }, /* adjnz.w #${Imm-12-s4},[$Dst32AnUnprefixed],${Lab-16-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_16_8), 0 } }, - & ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI, { 0xf11000 } + & ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI, { 0xf11000 } }, /* adjnz.b #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U8), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_24_8), 0 } }, - & ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI, { 0xf2100000 } + & ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI, { 0xf2100000 } }, /* adjnz.b #${Imm-12-s4},${Dsp-16-u8}[sb],${Lab-24-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (LAB_24_8), 0 } }, - & ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI, { 0xf2900000 } + & ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI, { 0xf2900000 } }, /* adjnz.b #${Imm-12-s4},${Dsp-16-s8}[fb],${Lab-24-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (LAB_24_8), 0 } }, - & ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI, { 0xf2d00000 } + & ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI, { 0xf2d00000 } }, /* adjnz.b #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U16), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_32_8), 0 } }, - & ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI, { 0xf4100000 } + & ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI, { 0xf4100000 } }, /* adjnz.b #${Imm-12-s4},${Dsp-16-u16}[sb],${Lab-32-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (LAB_32_8), 0 } }, - & ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI, { 0xf4900000 } + & ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI, { 0xf4900000 } }, /* adjnz.b #${Imm-12-s4},${Dsp-16-s16}[fb],${Lab-32-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_S16), '[', 'f', 'b', ']', ',', OP (LAB_32_8), 0 } }, - & ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI, { 0xf4d00000 } + & ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI, { 0xf4d00000 } }, /* adjnz.b #${Imm-12-s4},${Dsp-16-u16},${Lab-32-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U16), ',', OP (LAB_32_8), 0 } }, - & ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI, { 0xf6d00000 } + & ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI, { 0xf6d00000 } }, /* adjnz.b #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U24), '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_40_8), 0 } }, - & ifmt_sbjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI, { 0xf6100000 } + & ifmt_adjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI, { 0xf6100000 } }, /* adjnz.b #${Imm-12-s4},${Dsp-16-u24},${Lab-40-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U24), ',', OP (LAB_40_8), 0 } }, - & ifmt_sbjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI, { 0xf6900000 } + & ifmt_adjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI, { 0xf6900000 } }, /* adjnz.b #${Imm-12-s4},$Dst32RnUnprefixedQI,${Lab-16-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DST32RNUNPREFIXEDQI), ',', OP (LAB_16_8), 0 } }, - & ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI, { 0xf81000 } + & ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI, { 0xf81000 } }, /* adjnz.b #${Imm-12-s4},$Dst32AnUnprefixedQI,${Lab-16-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', OP (DST32ANUNPREFIXEDQI), ',', OP (LAB_16_8), 0 } }, - & ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_QI, { 0xf09000 } + & ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_QI, { 0xf09000 } }, /* adjnz.b #${Imm-12-s4},[$Dst32AnUnprefixed],${Lab-16-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_12_S4), ',', '[', OP (DST32ANUNPREFIXED), ']', ',', OP (LAB_16_8), 0 } }, - & ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI, { 0xf01000 } + & ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI, { 0xf01000 } }, /* adjnz.w #${Imm-8-s4},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', ',', OP (LAB_24_8), 0 } }, - & ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_An_relative_HI, { 0xf9080000 } + & ifmt_adjnz16_w_imm4_16_8_dst16_16_8_An_relative_HI, { 0xf9080000 } }, /* adjnz.w #${Imm-8-s4},${Dsp-16-u8}[sb],${Lab-24-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (LAB_24_8), 0 } }, - & ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_SB_relative_HI, { 0xf90a0000 } + & ifmt_adjnz16_w_imm4_16_8_dst16_16_8_SB_relative_HI, { 0xf90a0000 } }, /* adjnz.w #${Imm-8-s4},${Dsp-16-s8}[fb],${Lab-24-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (LAB_24_8), 0 } }, - & ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_FB_relative_HI, { 0xf90b0000 } + & ifmt_adjnz16_w_imm4_16_8_dst16_16_8_FB_relative_HI, { 0xf90b0000 } }, /* adjnz.w #${Imm-8-s4},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', ',', OP (LAB_32_8), 0 } }, - & ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_An_relative_HI, { 0xf90c0000 } + & ifmt_adjnz16_w_imm4_16_16_dst16_16_16_An_relative_HI, { 0xf90c0000 } }, /* adjnz.w #${Imm-8-s4},${Dsp-16-u16}[sb],${Lab-32-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (LAB_32_8), 0 } }, - & ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_SB_relative_HI, { 0xf90e0000 } + & ifmt_adjnz16_w_imm4_16_16_dst16_16_16_SB_relative_HI, { 0xf90e0000 } }, /* adjnz.w #${Imm-8-s4},${Dsp-16-u16},${Lab-32-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), ',', OP (LAB_32_8), 0 } }, - & ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_absolute_HI, { 0xf90f0000 } + & ifmt_adjnz16_w_imm4_16_16_dst16_16_16_absolute_HI, { 0xf90f0000 } }, /* adjnz.w #${Imm-8-s4},$Dst16RnHI,${Lab-16-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DST16RNHI), ',', OP (LAB_16_8), 0 } }, - & ifmt_sbjnz16_w_imm4_basic_dst16_Rn_direct_HI, { 0xf90000 } + & ifmt_adjnz16_w_imm4_basic_dst16_Rn_direct_HI, { 0xf90000 } }, /* adjnz.w #${Imm-8-s4},$Dst16AnHI,${Lab-16-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DST16ANHI), ',', OP (LAB_16_8), 0 } }, - & ifmt_sbjnz16_w_imm4_basic_dst16_An_direct_HI, { 0xf90400 } + & ifmt_adjnz16_w_imm4_basic_dst16_An_direct_HI, { 0xf90400 } }, /* adjnz.w #${Imm-8-s4},[$Dst16An],${Lab-16-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_8_S4), ',', '[', OP (DST16AN), ']', ',', OP (LAB_16_8), 0 } }, - & ifmt_sbjnz16_w_imm4_basic_dst16_An_indirect_HI, { 0xf90600 } + & ifmt_adjnz16_w_imm4_basic_dst16_An_indirect_HI, { 0xf90600 } }, /* adjnz.b #${Imm-8-s4},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', ',', OP (LAB_24_8), 0 } }, - & ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_An_relative_QI, { 0xf8080000 } + & ifmt_adjnz16_b_imm4_16_8_dst16_16_8_An_relative_QI, { 0xf8080000 } }, /* adjnz.b #${Imm-8-s4},${Dsp-16-u8}[sb],${Lab-24-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (LAB_24_8), 0 } }, - & ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_SB_relative_QI, { 0xf80a0000 } + & ifmt_adjnz16_b_imm4_16_8_dst16_16_8_SB_relative_QI, { 0xf80a0000 } }, /* adjnz.b #${Imm-8-s4},${Dsp-16-s8}[fb],${Lab-24-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (LAB_24_8), 0 } }, - & ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_FB_relative_QI, { 0xf80b0000 } + & ifmt_adjnz16_b_imm4_16_8_dst16_16_8_FB_relative_QI, { 0xf80b0000 } }, /* adjnz.b #${Imm-8-s4},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', ',', OP (LAB_32_8), 0 } }, - & ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_An_relative_QI, { 0xf80c0000 } + & ifmt_adjnz16_b_imm4_16_16_dst16_16_16_An_relative_QI, { 0xf80c0000 } }, /* adjnz.b #${Imm-8-s4},${Dsp-16-u16}[sb],${Lab-32-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), '[', 's', 'b', ']', ',', OP (LAB_32_8), 0 } }, - & ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_SB_relative_QI, { 0xf80e0000 } + & ifmt_adjnz16_b_imm4_16_16_dst16_16_16_SB_relative_QI, { 0xf80e0000 } }, /* adjnz.b #${Imm-8-s4},${Dsp-16-u16},${Lab-32-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), ',', OP (LAB_32_8), 0 } }, - & ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_absolute_QI, { 0xf80f0000 } + & ifmt_adjnz16_b_imm4_16_16_dst16_16_16_absolute_QI, { 0xf80f0000 } }, /* adjnz.b #${Imm-8-s4},$Dst16RnQI,${Lab-16-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DST16RNQI), ',', OP (LAB_16_8), 0 } }, - & ifmt_sbjnz16_b_imm4_basic_dst16_Rn_direct_QI, { 0xf80000 } + & ifmt_adjnz16_b_imm4_basic_dst16_Rn_direct_QI, { 0xf80000 } }, /* adjnz.b #${Imm-8-s4},$Dst16AnQI,${Lab-16-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_8_S4), ',', OP (DST16ANQI), ',', OP (LAB_16_8), 0 } }, - & ifmt_sbjnz16_b_imm4_basic_dst16_An_direct_QI, { 0xf80400 } + & ifmt_adjnz16_b_imm4_basic_dst16_An_direct_QI, { 0xf80400 } }, /* adjnz.b #${Imm-8-s4},[$Dst16An],${Lab-16-8} */ { { 0, 0, 0, 0 }, { { MNEM, ' ', '#', OP (IMM_8_S4), ',', '[', OP (DST16AN), ']', ',', OP (LAB_16_8), 0 } }, - & ifmt_sbjnz16_b_imm4_basic_dst16_An_indirect_QI, { 0xf80600 } + & ifmt_adjnz16_b_imm4_basic_dst16_An_indirect_QI, { 0xf80600 } }, /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */ { @@ -78282,11 +78920,11 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, ' ', OP (DSP_16_U16), 0 } }, & ifmt_rorc16_b_16_dst16_16_16_absolute_QI, { 0x76ff0000 } }, -/* add${size}$Q #${Imm-12-s4},sp */ +/* add.w$Q #${Imm-12-s4},sp */ { { 0, 0, 0, 0 }, - { { MNEM, OP (SIZE), OP (Q), ' ', '#', OP (IMM_12_S4), ',', 's', 'p', 0 } }, - & ifmt_add16_Q_sp, { 0x7db0 } + { { MNEM, OP (Q), ' ', '#', OP (IMM_12_S4), ',', 's', 'p', 0 } }, + & ifmt_add16_wQ_sp, { 0x7db0 } }, /* add.b$G #${Imm-16-QI},sp */ { @@ -78816,16 +79454,16 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, OP (S), ' ', '#', OP (IMM_8_HI), ',', 'a', '1', 0 } }, & ifmt_mov16_w_S_imm_a0, { 0x9d0000 } }, -/* mov.l$S #${Dsp-8-u24},a0 */ +/* mov.l$S #${Dsp-8-s24},a0 */ { { 0, 0, 0, 0 }, - { { MNEM, OP (S), ' ', '#', OP (DSP_8_U24), ',', 'a', '0', 0 } }, + { { MNEM, OP (S), ' ', '#', OP (DSP_8_S24), ',', 'a', '0', 0 } }, & ifmt_mov32_l_a0, { 0xbc000000 } }, -/* mov.l$S #${Dsp-8-u24},a1 */ +/* mov.l$S #${Dsp-8-s24},a1 */ { { 0, 0, 0, 0 }, - { { MNEM, OP (S), ' ', '#', OP (DSP_8_U24), ',', 'a', '1', 0 } }, + { { MNEM, OP (S), ' ', '#', OP (DSP_8_S24), ',', 'a', '1', 0 } }, & ifmt_mov32_l_a0, { 0xbd000000 } }, /* mov.b$S r0l,a1 */ @@ -79170,22 +79808,22 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, ' ', '#', OP (IMM_8_QI), ',', '#', OP (IMM_16_QI), ',', 'r', '0', 'l', 0 } }, & ifmt_stzx16_imm8_imm8_r0h, { 0xdc0000 } }, -/* stzx #${Imm-8-QI},#${Imm-16-QI},Dsp-24-u8[sb] */ +/* stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-u8}[sb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_QI), ',', '#', OP (IMM_16_QI), ',', 'D', 's', 'p', '-', '2', '4', '-', 'u', '8', '[', 's', 'b', ']', 0 } }, + { { MNEM, ' ', '#', OP (IMM_8_QI), ',', '#', OP (IMM_24_QI), ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } }, & ifmt_stzx16_imm8_imm8_dsp8sb, { 0xdd000000 } }, -/* stzx #${Imm-8-QI},#${Imm-16-QI},Dsp-24-u8[fb] */ +/* stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-s8}[fb] */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_QI), ',', '#', OP (IMM_16_QI), ',', 'D', 's', 'p', '-', '2', '4', '-', 'u', '8', '[', 'f', 'b', ']', 0 } }, - & ifmt_stzx16_imm8_imm8_dsp8sb, { 0xde000000 } + { { MNEM, ' ', '#', OP (IMM_8_QI), ',', '#', OP (IMM_24_QI), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } }, + & ifmt_stzx16_imm8_imm8_dsp8fb, { 0xde000000 } }, -/* stzx #${Imm-8-QI},#${Imm-16-QI},Dsp-24-u16 */ +/* stzx #${Imm-8-QI},#${Imm-32-QI},${Dsp-16-u16} */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', '#', OP (IMM_8_QI), ',', '#', OP (IMM_16_QI), ',', 'D', 's', 'p', '-', '2', '4', '-', 'u', '1', '6', 0 } }, + { { MNEM, ' ', '#', OP (IMM_8_QI), ',', '#', OP (IMM_32_QI), ',', OP (DSP_16_U16), 0 } }, & ifmt_stzx16_imm8_imm8_abs16, { 0xde000000 } }, /* und */ @@ -79250,6 +79888,10 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = #else #define F(f) & m32c_cgen_ifld_table[M32C_/**/f] #endif +static const CGEN_IFMT ifmt_add16_bQ_sp ATTRIBUTE_UNUSED = { + 16, 16, 0xfff0, { { F (F_0_4) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_IMM_12_S4) }, { 0 } } +}; + #undef F /* Each non-simple macro entry points to an array of expansion possibilities. */ @@ -79271,12 +79913,23 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] = static const CGEN_IBASE m32c_cgen_macro_insn_table[] = { +/* add.b:q #${Imm-12-s4},sp */ + { + -1, "add16-bQ-sp", "add.b:q", 16, + { 0|A(ALIAS), { { { (1<>= 16; + { + value >>= 16; + value &= 0xffff; + } *valuep = value; return errmsg; } @@ -104,8 +107,9 @@ parse_hi16 (CGEN_CPU_DESC cd, if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) { - value = value + (value & 0x8000 ? 0x10000 : 0); + value += 0x8000; value >>= 16; + value &= 0xffff; } *valuep = value; return errmsg; diff --git a/opcodes/m32r-desc.c b/opcodes/m32r-desc.c index 3b8cb56c7c9..c9cd3bb5163 100644 --- a/opcodes/m32r-desc.c +++ b/opcodes/m32r-desc.c @@ -148,25 +148,25 @@ static const CGEN_MACH m32r_cgen_mach_table[] = { static CGEN_KEYWORD_ENTRY m32r_cgen_opval_gr_names_entries[] = { - { "fp", 13, {0, {0}}, 0, 0 }, - { "lr", 14, {0, {0}}, 0, 0 }, - { "sp", 15, {0, {0}}, 0, 0 }, - { "r0", 0, {0, {0}}, 0, 0 }, - { "r1", 1, {0, {0}}, 0, 0 }, - { "r2", 2, {0, {0}}, 0, 0 }, - { "r3", 3, {0, {0}}, 0, 0 }, - { "r4", 4, {0, {0}}, 0, 0 }, - { "r5", 5, {0, {0}}, 0, 0 }, - { "r6", 6, {0, {0}}, 0, 0 }, - { "r7", 7, {0, {0}}, 0, 0 }, - { "r8", 8, {0, {0}}, 0, 0 }, - { "r9", 9, {0, {0}}, 0, 0 }, - { "r10", 10, {0, {0}}, 0, 0 }, - { "r11", 11, {0, {0}}, 0, 0 }, - { "r12", 12, {0, {0}}, 0, 0 }, - { "r13", 13, {0, {0}}, 0, 0 }, - { "r14", 14, {0, {0}}, 0, 0 }, - { "r15", 15, {0, {0}}, 0, 0 } + { "fp", 13, {0, {{{0, 0}}}}, 0, 0 }, + { "lr", 14, {0, {{{0, 0}}}}, 0, 0 }, + { "sp", 15, {0, {{{0, 0}}}}, 0, 0 }, + { "r0", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "r1", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "r2", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "r3", 3, {0, {{{0, 0}}}}, 0, 0 }, + { "r4", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "r5", 5, {0, {{{0, 0}}}}, 0, 0 }, + { "r6", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "r7", 7, {0, {{{0, 0}}}}, 0, 0 }, + { "r8", 8, {0, {{{0, 0}}}}, 0, 0 }, + { "r9", 9, {0, {{{0, 0}}}}, 0, 0 }, + { "r10", 10, {0, {{{0, 0}}}}, 0, 0 }, + { "r11", 11, {0, {{{0, 0}}}}, 0, 0 }, + { "r12", 12, {0, {{{0, 0}}}}, 0, 0 }, + { "r13", 13, {0, {{{0, 0}}}}, 0, 0 }, + { "r14", 14, {0, {{{0, 0}}}}, 0, 0 }, + { "r15", 15, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32r_cgen_opval_gr_names = @@ -178,30 +178,30 @@ CGEN_KEYWORD m32r_cgen_opval_gr_names = static CGEN_KEYWORD_ENTRY m32r_cgen_opval_cr_names_entries[] = { - { "psw", 0, {0, {0}}, 0, 0 }, - { "cbr", 1, {0, {0}}, 0, 0 }, - { "spi", 2, {0, {0}}, 0, 0 }, - { "spu", 3, {0, {0}}, 0, 0 }, - { "bpc", 6, {0, {0}}, 0, 0 }, - { "bbpsw", 8, {0, {0}}, 0, 0 }, - { "bbpc", 14, {0, {0}}, 0, 0 }, - { "evb", 5, {0, {0}}, 0, 0 }, - { "cr0", 0, {0, {0}}, 0, 0 }, - { "cr1", 1, {0, {0}}, 0, 0 }, - { "cr2", 2, {0, {0}}, 0, 0 }, - { "cr3", 3, {0, {0}}, 0, 0 }, - { "cr4", 4, {0, {0}}, 0, 0 }, - { "cr5", 5, {0, {0}}, 0, 0 }, - { "cr6", 6, {0, {0}}, 0, 0 }, - { "cr7", 7, {0, {0}}, 0, 0 }, - { "cr8", 8, {0, {0}}, 0, 0 }, - { "cr9", 9, {0, {0}}, 0, 0 }, - { "cr10", 10, {0, {0}}, 0, 0 }, - { "cr11", 11, {0, {0}}, 0, 0 }, - { "cr12", 12, {0, {0}}, 0, 0 }, - { "cr13", 13, {0, {0}}, 0, 0 }, - { "cr14", 14, {0, {0}}, 0, 0 }, - { "cr15", 15, {0, {0}}, 0, 0 } + { "psw", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "cbr", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "spi", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "spu", 3, {0, {{{0, 0}}}}, 0, 0 }, + { "bpc", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "bbpsw", 8, {0, {{{0, 0}}}}, 0, 0 }, + { "bbpc", 14, {0, {{{0, 0}}}}, 0, 0 }, + { "evb", 5, {0, {{{0, 0}}}}, 0, 0 }, + { "cr0", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "cr1", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "cr2", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "cr3", 3, {0, {{{0, 0}}}}, 0, 0 }, + { "cr4", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "cr5", 5, {0, {{{0, 0}}}}, 0, 0 }, + { "cr6", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "cr7", 7, {0, {{{0, 0}}}}, 0, 0 }, + { "cr8", 8, {0, {{{0, 0}}}}, 0, 0 }, + { "cr9", 9, {0, {{{0, 0}}}}, 0, 0 }, + { "cr10", 10, {0, {{{0, 0}}}}, 0, 0 }, + { "cr11", 11, {0, {{{0, 0}}}}, 0, 0 }, + { "cr12", 12, {0, {{{0, 0}}}}, 0, 0 }, + { "cr13", 13, {0, {{{0, 0}}}}, 0, 0 }, + { "cr14", 14, {0, {{{0, 0}}}}, 0, 0 }, + { "cr15", 15, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32r_cgen_opval_cr_names = @@ -213,8 +213,8 @@ CGEN_KEYWORD m32r_cgen_opval_cr_names = static CGEN_KEYWORD_ENTRY m32r_cgen_opval_h_accums_entries[] = { - { "a0", 0, {0, {0}}, 0, 0 }, - { "a1", 1, {0, {0}}, 0, 0 } + { "a0", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "a1", 1, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD m32r_cgen_opval_h_accums = @@ -235,25 +235,25 @@ CGEN_KEYWORD m32r_cgen_opval_h_accums = const CGEN_HW_ENTRY m32r_cgen_hw_table[] = { - { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { (1<isas; + CGEN_BITSET *isas = cd->isas; unsigned int machs = cd->machs; cd->int_insn_p = CGEN_INT_INSN_P; @@ -1336,7 +1336,7 @@ m32r_cgen_rebuild_tables (CGEN_CPU_TABLE *cd) cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */ cd->max_insn_bitsize = 0; for (i = 0; i < MAX_ISAS; ++i) - if (((1 << i) & isas) != 0) + if (cgen_bitset_contains (isas, i)) { const CGEN_ISA *isa = & m32r_cgen_isa_table[i]; @@ -1421,7 +1421,7 @@ m32r_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) { CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE)); static int init_p; - unsigned int isas = 0; /* 0 = "unspecified" */ + CGEN_BITSET *isas = 0; /* 0 = "unspecified" */ unsigned int machs = 0; /* 0 = "unspecified" */ enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN; va_list ap; @@ -1440,7 +1440,7 @@ m32r_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) switch (arg_type) { case CGEN_CPU_OPEN_ISAS : - isas = va_arg (ap, unsigned int); + isas = va_arg (ap, CGEN_BITSET *); break; case CGEN_CPU_OPEN_MACHS : machs = va_arg (ap, unsigned int); @@ -1471,9 +1471,6 @@ m32r_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) machs = (1 << MAX_MACHS) - 1; /* Base mach is always selected. */ machs |= 1; - /* ISA unspecified means "all". */ - if (isas == 0) - isas = (1 << MAX_ISAS) - 1; if (endian == CGEN_ENDIAN_UNKNOWN) { /* ??? If target has only one, could have a default. */ @@ -1481,7 +1478,7 @@ m32r_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) abort (); } - cd->isas = isas; + cd->isas = cgen_bitset_copy (isas); cd->machs = machs; cd->endian = endian; /* FIXME: for the sparc case we can determine insn-endianness statically. diff --git a/opcodes/m32r-desc.h b/opcodes/m32r-desc.h index 2080b5cdc0f..9624852bea9 100644 --- a/opcodes/m32r-desc.h +++ b/opcodes/m32r-desc.h @@ -25,6 +25,8 @@ with this program; if not, write to the Free Software Foundation, Inc., #ifndef M32R_CPU_H #define M32R_CPU_H +#include "opcode/cgen-bitset.h" + #define CGEN_ARCH m32r /* Given symbol S, return m32r_cgen_. */ @@ -135,6 +137,16 @@ typedef enum cgen_ifld_attr { /* Number of non-boolean elements in cgen_ifld_attr. */ #define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1) +/* cgen_ifld attribute accessor macros. */ +#define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_PCREL_ADDR)) != 0) +#define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_ABS_ADDR)) != 0) +#define CGEN_ATTR_CGEN_IFLD_RESERVED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_RESERVED)) != 0) +#define CGEN_ATTR_CGEN_IFLD_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGN_OPT)) != 0) +#define CGEN_ATTR_CGEN_IFLD_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGNED)) != 0) +#define CGEN_ATTR_CGEN_IFLD_RELOC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_RELOC)) != 0) + /* Enum declaration for m32r ifield types. */ typedef enum ifield_type { M32R_F_NIL, M32R_F_ANYOF, M32R_F_OP1, M32R_F_OP2 @@ -160,6 +172,13 @@ typedef enum cgen_hw_attr { /* Number of non-boolean elements in cgen_hw_attr. */ #define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1) +/* cgen_hw attribute accessor macros. */ +#define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_CACHE_ADDR)) != 0) +#define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PC)) != 0) +#define CGEN_ATTR_CGEN_HW_PROFILE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PROFILE)) != 0) + /* Enum declaration for m32r hardware types. */ typedef enum cgen_hw_type { HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR @@ -184,6 +203,19 @@ typedef enum cgen_operand_attr { /* Number of non-boolean elements in cgen_operand_attr. */ #define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1) +/* cgen_operand attribute accessor macros. */ +#define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_ABS_ADDR)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGN_OPT)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGNED)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_NEGATIVE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_NEGATIVE)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_RELAX)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SEM_ONLY)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_RELOC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_RELOC)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_HASH_PREFIX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_HASH_PREFIX)) != 0) + /* Enum declaration for m32r operand types. */ typedef enum cgen_operand_type { M32R_OPERAND_PC, M32R_OPERAND_SR, M32R_OPERAND_DR, M32R_OPERAND_SRC1 @@ -216,6 +248,24 @@ typedef enum cgen_insn_attr { /* Number of non-boolean elements in cgen_insn_attr. */ #define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1) +/* cgen_insn attribute accessor macros. */ +#define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_INSN_PIPE_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_PIPE-CGEN_INSN_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_ALIAS)) != 0) +#define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_UNCOND_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_COND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_COND_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_SKIP_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SKIP_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_DELAY_SLOT)) != 0) +#define CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXABLE)) != 0) +#define CGEN_ATTR_CGEN_INSN_RELAXED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXED)) != 0) +#define CGEN_ATTR_CGEN_INSN_NO_DIS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NO_DIS)) != 0) +#define CGEN_ATTR_CGEN_INSN_PBB_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PBB)) != 0) +#define CGEN_ATTR_CGEN_INSN_FILL_SLOT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_FILL_SLOT)) != 0) +#define CGEN_ATTR_CGEN_INSN_SPECIAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SPECIAL)) != 0) +#define CGEN_ATTR_CGEN_INSN_SPECIAL_M32R_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SPECIAL_M32R)) != 0) +#define CGEN_ATTR_CGEN_INSN_SPECIAL_FLOAT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SPECIAL_FLOAT)) != 0) + /* cgen.h uses things we just defined. */ #include "opcode/cgen.h" diff --git a/opcodes/m32r-dis.c b/opcodes/m32r-dis.c index fb65bfee728..e381c919d75 100644 --- a/opcodes/m32r-dis.c +++ b/opcodes/m32r-dis.c @@ -4,7 +4,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. - the resultant file is machine generated, cgen-dis.in isn't - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005 + Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005 Free Software Foundation, Inc. This file is part of the GNU Binutils and GDB, the GNU debugger. @@ -564,7 +564,7 @@ default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) typedef struct cpu_desc_list { struct cpu_desc_list *next; - int isa; + CGEN_BITSET *isa; int mach; int endian; CGEN_CPU_DESC cd; @@ -576,11 +576,12 @@ print_insn_m32r (bfd_vma pc, disassemble_info *info) static cpu_desc_list *cd_list = 0; cpu_desc_list *cl = 0; static CGEN_CPU_DESC cd = 0; - static int prev_isa; + static CGEN_BITSET *prev_isa; static int prev_mach; static int prev_endian; int length; - int isa,mach; + CGEN_BITSET *isa; + int mach; int endian = (info->endian == BFD_ENDIAN_BIG ? CGEN_ENDIAN_BIG : CGEN_ENDIAN_LITTLE); @@ -603,25 +604,34 @@ print_insn_m32r (bfd_vma pc, disassemble_info *info) #endif #ifdef CGEN_COMPUTE_ISA - isa = CGEN_COMPUTE_ISA (info); + { + static CGEN_BITSET *permanent_isa; + + if (!permanent_isa) + permanent_isa = cgen_bitset_create (MAX_ISAS); + isa = permanent_isa; + cgen_bitset_clear (isa); + cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); + } #else isa = info->insn_sets; #endif /* If we've switched cpu's, try to find a handle we've used before */ if (cd - && (isa != prev_isa + && (cgen_bitset_compare (isa, prev_isa) != 0 || mach != prev_mach || endian != prev_endian)) { cd = 0; for (cl = cd_list; cl; cl = cl->next) { - if (cl->isa == isa && + if (cgen_bitset_compare (cl->isa, isa) == 0 && cl->mach == mach && cl->endian == endian) { cd = cl->cd; + prev_isa = cd->isas; break; } } @@ -637,7 +647,7 @@ print_insn_m32r (bfd_vma pc, disassemble_info *info) abort (); mach_name = arch_type->printable_name; - prev_isa = isa; + prev_isa = cgen_bitset_copy (isa); prev_mach = mach; prev_endian = endian; cd = m32r_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, @@ -650,7 +660,7 @@ print_insn_m32r (bfd_vma pc, disassemble_info *info) /* Save this away for future reference. */ cl = xmalloc (sizeof (struct cpu_desc_list)); cl->cd = cd; - cl->isa = isa; + cl->isa = prev_isa; cl->mach = mach; cl->endian = endian; cl->next = cd_list; diff --git a/opcodes/m32r-opc.c b/opcodes/m32r-opc.c index 29b7a21c290..7669eb6187c 100644 --- a/opcodes/m32r-opc.c +++ b/opcodes/m32r-opc.c @@ -1301,182 +1301,182 @@ static const CGEN_IBASE m32r_cgen_macro_insn_table[] = /* bc $disp8 */ { -1, "bc8r", "bc", 16, - { 0|A(RELAXABLE)|A(COND_CTI)|A(ALIAS), { (1<isas; + CGEN_BITSET *isas = cd->isas; unsigned int machs = cd->machs; cd->int_insn_p = CGEN_INT_INSN_P; @@ -1046,7 +1046,7 @@ ms1_cgen_rebuild_tables (CGEN_CPU_TABLE *cd) cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */ cd->max_insn_bitsize = 0; for (i = 0; i < MAX_ISAS; ++i) - if (((1 << i) & isas) != 0) + if (cgen_bitset_contains (isas, i)) { const CGEN_ISA *isa = & ms1_cgen_isa_table[i]; @@ -1131,7 +1131,7 @@ ms1_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) { CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE)); static int init_p; - unsigned int isas = 0; /* 0 = "unspecified" */ + CGEN_BITSET *isas = 0; /* 0 = "unspecified" */ unsigned int machs = 0; /* 0 = "unspecified" */ enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN; va_list ap; @@ -1150,7 +1150,7 @@ ms1_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) switch (arg_type) { case CGEN_CPU_OPEN_ISAS : - isas = va_arg (ap, unsigned int); + isas = va_arg (ap, CGEN_BITSET *); break; case CGEN_CPU_OPEN_MACHS : machs = va_arg (ap, unsigned int); @@ -1181,9 +1181,6 @@ ms1_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) machs = (1 << MAX_MACHS) - 1; /* Base mach is always selected. */ machs |= 1; - /* ISA unspecified means "all". */ - if (isas == 0) - isas = (1 << MAX_ISAS) - 1; if (endian == CGEN_ENDIAN_UNKNOWN) { /* ??? If target has only one, could have a default. */ @@ -1191,7 +1188,7 @@ ms1_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) abort (); } - cd->isas = isas; + cd->isas = cgen_bitset_copy (isas); cd->machs = machs; cd->endian = endian; /* FIXME: for the sparc case we can determine insn-endianness statically. diff --git a/opcodes/ms1-desc.h b/opcodes/ms1-desc.h index 9dfd4da44d2..4a3dd2f5e21 100644 --- a/opcodes/ms1-desc.h +++ b/opcodes/ms1-desc.h @@ -25,6 +25,8 @@ with this program; if not, write to the Free Software Foundation, Inc., #ifndef MS1_CPU_H #define MS1_CPU_H +#include "opcode/cgen-bitset.h" + #define CGEN_ARCH ms1 /* Given symbol S, return ms1_cgen_. */ @@ -131,6 +133,15 @@ typedef enum cgen_ifld_attr { /* Number of non-boolean elements in cgen_ifld_attr. */ #define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1) +/* cgen_ifld attribute accessor macros. */ +#define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_PCREL_ADDR)) != 0) +#define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_ABS_ADDR)) != 0) +#define CGEN_ATTR_CGEN_IFLD_RESERVED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_RESERVED)) != 0) +#define CGEN_ATTR_CGEN_IFLD_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGN_OPT)) != 0) +#define CGEN_ATTR_CGEN_IFLD_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGNED)) != 0) + /* Enum declaration for ms1 ifield types. */ typedef enum ifield_type { MS1_F_NIL, MS1_F_ANYOF, MS1_F_MSYS, MS1_F_OPC @@ -166,6 +177,13 @@ typedef enum cgen_hw_attr { /* Number of non-boolean elements in cgen_hw_attr. */ #define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1) +/* cgen_hw attribute accessor macros. */ +#define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_CACHE_ADDR)) != 0) +#define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PC)) != 0) +#define CGEN_ATTR_CGEN_HW_PROFILE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PROFILE)) != 0) + /* Enum declaration for ms1 hardware types. */ typedef enum cgen_hw_type { HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR @@ -186,6 +204,17 @@ typedef enum cgen_operand_attr { /* Number of non-boolean elements in cgen_operand_attr. */ #define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1) +/* cgen_operand attribute accessor macros. */ +#define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_ABS_ADDR)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGN_OPT)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGNED)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_NEGATIVE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_NEGATIVE)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_RELAX)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SEM_ONLY)) != 0) + /* Enum declaration for ms1 operand types. */ typedef enum cgen_operand_type { MS1_OPERAND_PC, MS1_OPERAND_FRSR1, MS1_OPERAND_FRSR2, MS1_OPERAND_FRDR @@ -224,6 +253,29 @@ typedef enum cgen_insn_attr { /* Number of non-boolean elements in cgen_insn_attr. */ #define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1) +/* cgen_insn attribute accessor macros. */ +#define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_ALIAS)) != 0) +#define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_UNCOND_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_COND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_COND_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_SKIP_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SKIP_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_DELAY_SLOT)) != 0) +#define CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXABLE)) != 0) +#define CGEN_ATTR_CGEN_INSN_RELAXED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXED)) != 0) +#define CGEN_ATTR_CGEN_INSN_NO_DIS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NO_DIS)) != 0) +#define CGEN_ATTR_CGEN_INSN_PBB_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PBB)) != 0) +#define CGEN_ATTR_CGEN_INSN_LOAD_DELAY_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_LOAD_DELAY)) != 0) +#define CGEN_ATTR_CGEN_INSN_MEMORY_ACCESS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_MEMORY_ACCESS)) != 0) +#define CGEN_ATTR_CGEN_INSN_AL_INSN_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_AL_INSN)) != 0) +#define CGEN_ATTR_CGEN_INSN_IO_INSN_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_IO_INSN)) != 0) +#define CGEN_ATTR_CGEN_INSN_BR_INSN_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_BR_INSN)) != 0) +#define CGEN_ATTR_CGEN_INSN_USES_FRDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_USES_FRDR)) != 0) +#define CGEN_ATTR_CGEN_INSN_USES_FRDRRR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_USES_FRDRRR)) != 0) +#define CGEN_ATTR_CGEN_INSN_USES_FRSR1_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_USES_FRSR1)) != 0) +#define CGEN_ATTR_CGEN_INSN_USES_FRSR2_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_USES_FRSR2)) != 0) +#define CGEN_ATTR_CGEN_INSN_SKIPA_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SKIPA)) != 0) + /* cgen.h uses things we just defined. */ #include "opcode/cgen.h" diff --git a/opcodes/ms1-dis.c b/opcodes/ms1-dis.c index 980e8e09632..0026124f7db 100644 --- a/opcodes/ms1-dis.c +++ b/opcodes/ms1-dis.c @@ -4,7 +4,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. - the resultant file is machine generated, cgen-dis.in isn't - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005 + Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005 Free Software Foundation, Inc. This file is part of the GNU Binutils and GDB, the GNU debugger. @@ -566,7 +566,7 @@ default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) typedef struct cpu_desc_list { struct cpu_desc_list *next; - int isa; + CGEN_BITSET *isa; int mach; int endian; CGEN_CPU_DESC cd; @@ -578,11 +578,12 @@ print_insn_ms1 (bfd_vma pc, disassemble_info *info) static cpu_desc_list *cd_list = 0; cpu_desc_list *cl = 0; static CGEN_CPU_DESC cd = 0; - static int prev_isa; + static CGEN_BITSET *prev_isa; static int prev_mach; static int prev_endian; int length; - int isa,mach; + CGEN_BITSET *isa; + int mach; int endian = (info->endian == BFD_ENDIAN_BIG ? CGEN_ENDIAN_BIG : CGEN_ENDIAN_LITTLE); @@ -605,25 +606,34 @@ print_insn_ms1 (bfd_vma pc, disassemble_info *info) #endif #ifdef CGEN_COMPUTE_ISA - isa = CGEN_COMPUTE_ISA (info); + { + static CGEN_BITSET *permanent_isa; + + if (!permanent_isa) + permanent_isa = cgen_bitset_create (MAX_ISAS); + isa = permanent_isa; + cgen_bitset_clear (isa); + cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); + } #else isa = info->insn_sets; #endif /* If we've switched cpu's, try to find a handle we've used before */ if (cd - && (isa != prev_isa + && (cgen_bitset_compare (isa, prev_isa) != 0 || mach != prev_mach || endian != prev_endian)) { cd = 0; for (cl = cd_list; cl; cl = cl->next) { - if (cl->isa == isa && + if (cgen_bitset_compare (cl->isa, isa) == 0 && cl->mach == mach && cl->endian == endian) { cd = cl->cd; + prev_isa = cd->isas; break; } } @@ -639,7 +649,7 @@ print_insn_ms1 (bfd_vma pc, disassemble_info *info) abort (); mach_name = arch_type->printable_name; - prev_isa = isa; + prev_isa = cgen_bitset_copy (isa); prev_mach = mach; prev_endian = endian; cd = ms1_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, @@ -652,7 +662,7 @@ print_insn_ms1 (bfd_vma pc, disassemble_info *info) /* Save this away for future reference. */ cl = xmalloc (sizeof (struct cpu_desc_list)); cl->cd = cd; - cl->isa = isa; + cl->isa = prev_isa; cl->mach = mach; cl->endian = endian; cl->next = cd_list; diff --git a/opcodes/openrisc-desc.c b/opcodes/openrisc-desc.c index c469694cf59..5bdbeca536b 100644 --- a/opcodes/openrisc-desc.c +++ b/opcodes/openrisc-desc.c @@ -136,41 +136,41 @@ static const CGEN_MACH openrisc_cgen_mach_table[] = { static CGEN_KEYWORD_ENTRY openrisc_cgen_opval_h_gr_entries[] = { - { "r0", 0, {0, {0}}, 0, 0 }, - { "r1", 1, {0, {0}}, 0, 0 }, - { "r2", 2, {0, {0}}, 0, 0 }, - { "r3", 3, {0, {0}}, 0, 0 }, - { "r4", 4, {0, {0}}, 0, 0 }, - { "r5", 5, {0, {0}}, 0, 0 }, - { "r6", 6, {0, {0}}, 0, 0 }, - { "r7", 7, {0, {0}}, 0, 0 }, - { "r8", 8, {0, {0}}, 0, 0 }, - { "r9", 9, {0, {0}}, 0, 0 }, - { "r10", 10, {0, {0}}, 0, 0 }, - { "r11", 11, {0, {0}}, 0, 0 }, - { "r12", 12, {0, {0}}, 0, 0 }, - { "r13", 13, {0, {0}}, 0, 0 }, - { "r14", 14, {0, {0}}, 0, 0 }, - { "r15", 15, {0, {0}}, 0, 0 }, - { "r16", 16, {0, {0}}, 0, 0 }, - { "r17", 17, {0, {0}}, 0, 0 }, - { "r18", 18, {0, {0}}, 0, 0 }, - { "r19", 19, {0, {0}}, 0, 0 }, - { "r20", 20, {0, {0}}, 0, 0 }, - { "r21", 21, {0, {0}}, 0, 0 }, - { "r22", 22, {0, {0}}, 0, 0 }, - { "r23", 23, {0, {0}}, 0, 0 }, - { "r24", 24, {0, {0}}, 0, 0 }, - { "r25", 25, {0, {0}}, 0, 0 }, - { "r26", 26, {0, {0}}, 0, 0 }, - { "r27", 27, {0, {0}}, 0, 0 }, - { "r28", 28, {0, {0}}, 0, 0 }, - { "r29", 29, {0, {0}}, 0, 0 }, - { "r30", 30, {0, {0}}, 0, 0 }, - { "r31", 31, {0, {0}}, 0, 0 }, - { "lr", 11, {0, {0}}, 0, 0 }, - { "sp", 1, {0, {0}}, 0, 0 }, - { "fp", 2, {0, {0}}, 0, 0 } + { "r0", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "r1", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "r2", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "r3", 3, {0, {{{0, 0}}}}, 0, 0 }, + { "r4", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "r5", 5, {0, {{{0, 0}}}}, 0, 0 }, + { "r6", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "r7", 7, {0, {{{0, 0}}}}, 0, 0 }, + { "r8", 8, {0, {{{0, 0}}}}, 0, 0 }, + { "r9", 9, {0, {{{0, 0}}}}, 0, 0 }, + { "r10", 10, {0, {{{0, 0}}}}, 0, 0 }, + { "r11", 11, {0, {{{0, 0}}}}, 0, 0 }, + { "r12", 12, {0, {{{0, 0}}}}, 0, 0 }, + { "r13", 13, {0, {{{0, 0}}}}, 0, 0 }, + { "r14", 14, {0, {{{0, 0}}}}, 0, 0 }, + { "r15", 15, {0, {{{0, 0}}}}, 0, 0 }, + { "r16", 16, {0, {{{0, 0}}}}, 0, 0 }, + { "r17", 17, {0, {{{0, 0}}}}, 0, 0 }, + { "r18", 18, {0, {{{0, 0}}}}, 0, 0 }, + { "r19", 19, {0, {{{0, 0}}}}, 0, 0 }, + { "r20", 20, {0, {{{0, 0}}}}, 0, 0 }, + { "r21", 21, {0, {{{0, 0}}}}, 0, 0 }, + { "r22", 22, {0, {{{0, 0}}}}, 0, 0 }, + { "r23", 23, {0, {{{0, 0}}}}, 0, 0 }, + { "r24", 24, {0, {{{0, 0}}}}, 0, 0 }, + { "r25", 25, {0, {{{0, 0}}}}, 0, 0 }, + { "r26", 26, {0, {{{0, 0}}}}, 0, 0 }, + { "r27", 27, {0, {{{0, 0}}}}, 0, 0 }, + { "r28", 28, {0, {{{0, 0}}}}, 0, 0 }, + { "r29", 29, {0, {{{0, 0}}}}, 0, 0 }, + { "r30", 30, {0, {{{0, 0}}}}, 0, 0 }, + { "r31", 31, {0, {{{0, 0}}}}, 0, 0 }, + { "lr", 11, {0, {{{0, 0}}}}, 0, 0 }, + { "sp", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "fp", 2, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD openrisc_cgen_opval_h_gr = @@ -191,19 +191,19 @@ CGEN_KEYWORD openrisc_cgen_opval_h_gr = const CGEN_HW_ENTRY openrisc_cgen_hw_table[] = { - { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { (1<isas; + CGEN_BITSET *isas = cd->isas; unsigned int machs = cd->machs; cd->int_insn_p = CGEN_INT_INSN_P; @@ -826,7 +826,7 @@ openrisc_cgen_rebuild_tables (CGEN_CPU_TABLE *cd) cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */ cd->max_insn_bitsize = 0; for (i = 0; i < MAX_ISAS; ++i) - if (((1 << i) & isas) != 0) + if (cgen_bitset_contains (isas, i)) { const CGEN_ISA *isa = & openrisc_cgen_isa_table[i]; @@ -911,7 +911,7 @@ openrisc_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) { CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE)); static int init_p; - unsigned int isas = 0; /* 0 = "unspecified" */ + CGEN_BITSET *isas = 0; /* 0 = "unspecified" */ unsigned int machs = 0; /* 0 = "unspecified" */ enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN; va_list ap; @@ -930,7 +930,7 @@ openrisc_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) switch (arg_type) { case CGEN_CPU_OPEN_ISAS : - isas = va_arg (ap, unsigned int); + isas = va_arg (ap, CGEN_BITSET *); break; case CGEN_CPU_OPEN_MACHS : machs = va_arg (ap, unsigned int); @@ -961,9 +961,6 @@ openrisc_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) machs = (1 << MAX_MACHS) - 1; /* Base mach is always selected. */ machs |= 1; - /* ISA unspecified means "all". */ - if (isas == 0) - isas = (1 << MAX_ISAS) - 1; if (endian == CGEN_ENDIAN_UNKNOWN) { /* ??? If target has only one, could have a default. */ @@ -971,7 +968,7 @@ openrisc_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) abort (); } - cd->isas = isas; + cd->isas = cgen_bitset_copy (isas); cd->machs = machs; cd->endian = endian; /* FIXME: for the sparc case we can determine insn-endianness statically. diff --git a/opcodes/openrisc-desc.h b/opcodes/openrisc-desc.h index b47da960eae..dd0ccf8b2a7 100644 --- a/opcodes/openrisc-desc.h +++ b/opcodes/openrisc-desc.h @@ -25,6 +25,8 @@ with this program; if not, write to the Free Software Foundation, Inc., #ifndef OPENRISC_CPU_H #define OPENRISC_CPU_H +#include "opcode/cgen-bitset.h" + #define CGEN_ARCH openrisc /* Given symbol S, return openrisc_cgen_. */ @@ -154,6 +156,15 @@ typedef enum cgen_ifld_attr { /* Number of non-boolean elements in cgen_ifld_attr. */ #define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1) +/* cgen_ifld attribute accessor macros. */ +#define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_PCREL_ADDR)) != 0) +#define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_ABS_ADDR)) != 0) +#define CGEN_ATTR_CGEN_IFLD_RESERVED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_RESERVED)) != 0) +#define CGEN_ATTR_CGEN_IFLD_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGN_OPT)) != 0) +#define CGEN_ATTR_CGEN_IFLD_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGNED)) != 0) + /* Enum declaration for openrisc ifield types. */ typedef enum ifield_type { OPENRISC_F_NIL, OPENRISC_F_ANYOF, OPENRISC_F_CLASS, OPENRISC_F_SUB @@ -179,6 +190,13 @@ typedef enum cgen_hw_attr { /* Number of non-boolean elements in cgen_hw_attr. */ #define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1) +/* cgen_hw attribute accessor macros. */ +#define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_CACHE_ADDR)) != 0) +#define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PC)) != 0) +#define CGEN_ATTR_CGEN_HW_PROFILE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PROFILE)) != 0) + /* Enum declaration for openrisc hardware types. */ typedef enum cgen_hw_type { HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR @@ -201,6 +219,17 @@ typedef enum cgen_operand_attr { /* Number of non-boolean elements in cgen_operand_attr. */ #define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1) +/* cgen_operand attribute accessor macros. */ +#define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_ABS_ADDR)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGN_OPT)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGNED)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_NEGATIVE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_NEGATIVE)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_RELAX)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SEM_ONLY)) != 0) + /* Enum declaration for openrisc operand types. */ typedef enum cgen_operand_type { OPENRISC_OPERAND_PC, OPENRISC_OPERAND_SR, OPENRISC_OPERAND_CBIT, OPENRISC_OPERAND_SIMM_16 @@ -229,6 +258,20 @@ typedef enum cgen_insn_attr { /* Number of non-boolean elements in cgen_insn_attr. */ #define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1) +/* cgen_insn attribute accessor macros. */ +#define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_ALIAS)) != 0) +#define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_UNCOND_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_COND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_COND_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_SKIP_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SKIP_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_DELAY_SLOT)) != 0) +#define CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXABLE)) != 0) +#define CGEN_ATTR_CGEN_INSN_RELAXED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXED)) != 0) +#define CGEN_ATTR_CGEN_INSN_NO_DIS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NO_DIS)) != 0) +#define CGEN_ATTR_CGEN_INSN_PBB_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PBB)) != 0) +#define CGEN_ATTR_CGEN_INSN_NOT_IN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NOT_IN_DELAY_SLOT)) != 0) + /* cgen.h uses things we just defined. */ #include "opcode/cgen.h" diff --git a/opcodes/openrisc-dis.c b/opcodes/openrisc-dis.c index cb3f99b82e0..d3c4f681d95 100644 --- a/opcodes/openrisc-dis.c +++ b/opcodes/openrisc-dis.c @@ -4,7 +4,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. - the resultant file is machine generated, cgen-dis.in isn't - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005 + Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005 Free Software Foundation, Inc. This file is part of the GNU Binutils and GDB, the GNU debugger. @@ -443,7 +443,7 @@ default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) typedef struct cpu_desc_list { struct cpu_desc_list *next; - int isa; + CGEN_BITSET *isa; int mach; int endian; CGEN_CPU_DESC cd; @@ -455,11 +455,12 @@ print_insn_openrisc (bfd_vma pc, disassemble_info *info) static cpu_desc_list *cd_list = 0; cpu_desc_list *cl = 0; static CGEN_CPU_DESC cd = 0; - static int prev_isa; + static CGEN_BITSET *prev_isa; static int prev_mach; static int prev_endian; int length; - int isa,mach; + CGEN_BITSET *isa; + int mach; int endian = (info->endian == BFD_ENDIAN_BIG ? CGEN_ENDIAN_BIG : CGEN_ENDIAN_LITTLE); @@ -482,25 +483,34 @@ print_insn_openrisc (bfd_vma pc, disassemble_info *info) #endif #ifdef CGEN_COMPUTE_ISA - isa = CGEN_COMPUTE_ISA (info); + { + static CGEN_BITSET *permanent_isa; + + if (!permanent_isa) + permanent_isa = cgen_bitset_create (MAX_ISAS); + isa = permanent_isa; + cgen_bitset_clear (isa); + cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); + } #else isa = info->insn_sets; #endif /* If we've switched cpu's, try to find a handle we've used before */ if (cd - && (isa != prev_isa + && (cgen_bitset_compare (isa, prev_isa) != 0 || mach != prev_mach || endian != prev_endian)) { cd = 0; for (cl = cd_list; cl; cl = cl->next) { - if (cl->isa == isa && + if (cgen_bitset_compare (cl->isa, isa) == 0 && cl->mach == mach && cl->endian == endian) { cd = cl->cd; + prev_isa = cd->isas; break; } } @@ -516,7 +526,7 @@ print_insn_openrisc (bfd_vma pc, disassemble_info *info) abort (); mach_name = arch_type->printable_name; - prev_isa = isa; + prev_isa = cgen_bitset_copy (isa); prev_mach = mach; prev_endian = endian; cd = openrisc_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, @@ -529,7 +539,7 @@ print_insn_openrisc (bfd_vma pc, disassemble_info *info) /* Save this away for future reference. */ cl = xmalloc (sizeof (struct cpu_desc_list)); cl->cd = cd; - cl->isa = isa; + cl->isa = prev_isa; cl->mach = mach; cl->endian = endian; cl->next = cd_list; diff --git a/opcodes/openrisc-opc.c b/opcodes/openrisc-opc.c index 58aed98c667..ff9d52c37d8 100644 --- a/opcodes/openrisc-opc.c +++ b/opcodes/openrisc-opc.c @@ -560,7 +560,7 @@ static const CGEN_IBASE openrisc_cgen_macro_insn_table[] = /* l.ret */ { -1, "l-ret", "l.ret", 32, - { 0|A(ALIAS), { (1<\n" "Language-Team: LANGUAGE \n" @@ -110,23 +110,23 @@ msgstr "" msgid "must specify .jd or no nullify suffix" msgstr "" -#: arm-dis.c:1505 +#: arm-dis.c:1302 msgid "" msgstr "" #. XXX - should break 'option' at following delimiter. -#: arm-dis.c:2551 +#: arm-dis.c:2746 #, c-format msgid "Unrecognised register name set: %s\n" msgstr "" #. XXX - should break 'option' at following delimiter. -#: arm-dis.c:2559 +#: arm-dis.c:2754 #, c-format msgid "Unrecognised disassembler option: %s\n" msgstr "" -#: arm-dis.c:2721 +#: arm-dis.c:2916 #, c-format msgid "" "\n" @@ -150,7 +150,7 @@ msgid "unknown constraint `%c'" msgstr "" #: cgen-asm.c:336 fr30-ibld.c:192 frv-ibld.c:192 ip2k-ibld.c:192 -#: iq2000-ibld.c:192 m32c-ibld.c:197 m32r-ibld.c:192 ms1-ibld.c:192 +#: iq2000-ibld.c:192 m32c-ibld.c:192 m32r-ibld.c:192 ms1-ibld.c:192 #: openrisc-ibld.c:192 xstormy16-ibld.c:192 #, c-format msgid "operand out of range (%ld not between %ld and %ld)" @@ -177,7 +177,7 @@ msgstr "" msgid "Address 0x%s is out of bounds.\n" msgstr "" -#: fr30-asm.c:92 m32c-asm.c:872 m32c-asm.c:879 +#: fr30-asm.c:92 m32c-asm.c:782 m32c-asm.c:789 msgid "Register number is not valid" msgstr "" @@ -189,19 +189,19 @@ msgstr "" msgid "Register must be between r8 and r15" msgstr "" -#: fr30-asm.c:115 m32c-asm.c:910 +#: fr30-asm.c:115 m32c-asm.c:820 msgid "Register list is not valid" msgstr "" #: fr30-asm.c:309 frv-asm.c:1262 ip2k-asm.c:510 iq2000-asm.c:456 -#: m32c-asm.c:1564 m32r-asm.c:327 ms1-asm.c:546 openrisc-asm.c:240 +#: m32c-asm.c:1476 m32r-asm.c:323 ms1-asm.c:546 openrisc-asm.c:240 #: xstormy16-asm.c:275 #, c-format msgid "Unrecognized field %d while parsing.\n" msgstr "" #: fr30-asm.c:357 frv-asm.c:1310 ip2k-asm.c:558 iq2000-asm.c:504 -#: m32c-asm.c:1613 m32r-asm.c:375 ms1-asm.c:594 openrisc-asm.c:288 +#: m32c-asm.c:1524 m32r-asm.c:371 ms1-asm.c:594 openrisc-asm.c:288 #: xstormy16-asm.c:323 msgid "missing mnemonic in syntax string" msgstr "" @@ -210,9 +210,9 @@ msgstr "" #: fr30-asm.c:492 fr30-asm.c:496 fr30-asm.c:583 fr30-asm.c:684 frv-asm.c:1445 #: frv-asm.c:1449 frv-asm.c:1536 frv-asm.c:1637 ip2k-asm.c:693 ip2k-asm.c:697 #: ip2k-asm.c:784 ip2k-asm.c:885 iq2000-asm.c:639 iq2000-asm.c:643 -#: iq2000-asm.c:730 iq2000-asm.c:831 m32c-asm.c:1748 m32c-asm.c:1752 -#: m32c-asm.c:1839 m32c-asm.c:1940 m32r-asm.c:510 m32r-asm.c:514 -#: m32r-asm.c:601 m32r-asm.c:702 ms1-asm.c:729 ms1-asm.c:733 ms1-asm.c:820 +#: iq2000-asm.c:730 iq2000-asm.c:831 m32c-asm.c:1659 m32c-asm.c:1663 +#: m32c-asm.c:1750 m32c-asm.c:1851 m32r-asm.c:506 m32r-asm.c:510 +#: m32r-asm.c:597 m32r-asm.c:698 ms1-asm.c:729 ms1-asm.c:733 ms1-asm.c:820 #: ms1-asm.c:921 openrisc-asm.c:423 openrisc-asm.c:427 openrisc-asm.c:514 #: openrisc-asm.c:615 xstormy16-asm.c:458 xstormy16-asm.c:462 #: xstormy16-asm.c:549 xstormy16-asm.c:650 @@ -220,40 +220,40 @@ msgid "unrecognized instruction" msgstr "" #: fr30-asm.c:539 frv-asm.c:1492 ip2k-asm.c:740 iq2000-asm.c:686 -#: m32c-asm.c:1795 m32r-asm.c:557 ms1-asm.c:776 openrisc-asm.c:470 +#: m32c-asm.c:1706 m32r-asm.c:553 ms1-asm.c:776 openrisc-asm.c:470 #: xstormy16-asm.c:505 #, c-format msgid "syntax error (expected char `%c', found `%c')" msgstr "" #: fr30-asm.c:549 frv-asm.c:1502 ip2k-asm.c:750 iq2000-asm.c:696 -#: m32c-asm.c:1805 m32r-asm.c:567 ms1-asm.c:786 openrisc-asm.c:480 +#: m32c-asm.c:1716 m32r-asm.c:563 ms1-asm.c:786 openrisc-asm.c:480 #: xstormy16-asm.c:515 #, c-format msgid "syntax error (expected char `%c', found end of instruction)" msgstr "" #: fr30-asm.c:577 frv-asm.c:1530 ip2k-asm.c:778 iq2000-asm.c:724 -#: m32c-asm.c:1833 m32r-asm.c:595 ms1-asm.c:814 openrisc-asm.c:508 +#: m32c-asm.c:1744 m32r-asm.c:591 ms1-asm.c:814 openrisc-asm.c:508 #: xstormy16-asm.c:543 msgid "junk at end of line" msgstr "" #: fr30-asm.c:683 frv-asm.c:1636 ip2k-asm.c:884 iq2000-asm.c:830 -#: m32c-asm.c:1939 m32r-asm.c:701 ms1-asm.c:920 openrisc-asm.c:614 +#: m32c-asm.c:1850 m32r-asm.c:697 ms1-asm.c:920 openrisc-asm.c:614 #: xstormy16-asm.c:649 msgid "unrecognized form of instruction" msgstr "" #: fr30-asm.c:695 frv-asm.c:1648 ip2k-asm.c:896 iq2000-asm.c:842 -#: m32c-asm.c:1951 m32r-asm.c:713 ms1-asm.c:932 openrisc-asm.c:626 +#: m32c-asm.c:1862 m32r-asm.c:709 ms1-asm.c:932 openrisc-asm.c:626 #: xstormy16-asm.c:661 #, c-format msgid "bad instruction `%.50s...'" msgstr "" #: fr30-asm.c:698 frv-asm.c:1651 ip2k-asm.c:899 iq2000-asm.c:845 -#: m32c-asm.c:1954 m32r-asm.c:716 ms1-asm.c:935 openrisc-asm.c:629 +#: m32c-asm.c:1865 m32r-asm.c:712 ms1-asm.c:935 openrisc-asm.c:629 #: xstormy16-asm.c:664 #, c-format msgid "bad instruction `%.50s'" @@ -266,63 +266,63 @@ msgstr "" msgid "*unknown*" msgstr "" -#: fr30-dis.c:299 frv-dis.c:396 ip2k-dis.c:288 iq2000-dis.c:189 m32c-dis.c:868 +#: fr30-dis.c:299 frv-dis.c:396 ip2k-dis.c:288 iq2000-dis.c:189 m32c-dis.c:860 #: m32r-dis.c:256 ms1-dis.c:258 openrisc-dis.c:135 xstormy16-dis.c:168 #, c-format msgid "Unrecognized field %d while printing insn.\n" msgstr "" #: fr30-ibld.c:163 frv-ibld.c:163 ip2k-ibld.c:163 iq2000-ibld.c:163 -#: m32c-ibld.c:168 m32r-ibld.c:163 ms1-ibld.c:163 openrisc-ibld.c:163 +#: m32c-ibld.c:163 m32r-ibld.c:163 ms1-ibld.c:163 openrisc-ibld.c:163 #: xstormy16-ibld.c:163 #, c-format msgid "operand out of range (%ld not between %ld and %lu)" msgstr "" #: fr30-ibld.c:176 frv-ibld.c:176 ip2k-ibld.c:176 iq2000-ibld.c:176 -#: m32c-ibld.c:181 m32r-ibld.c:176 ms1-ibld.c:176 openrisc-ibld.c:176 +#: m32c-ibld.c:176 m32r-ibld.c:176 ms1-ibld.c:176 openrisc-ibld.c:176 #: xstormy16-ibld.c:176 #, c-format msgid "operand out of range (%lu not between 0 and %lu)" msgstr "" #: fr30-ibld.c:719 frv-ibld.c:845 ip2k-ibld.c:596 iq2000-ibld.c:702 -#: m32c-ibld.c:1672 m32r-ibld.c:654 ms1-ibld.c:713 openrisc-ibld.c:622 +#: m32c-ibld.c:1668 m32r-ibld.c:654 ms1-ibld.c:713 openrisc-ibld.c:622 #: xstormy16-ibld.c:667 #, c-format msgid "Unrecognized field %d while building insn.\n" msgstr "" #: fr30-ibld.c:924 frv-ibld.c:1162 ip2k-ibld.c:671 iq2000-ibld.c:877 -#: m32c-ibld.c:2778 m32r-ibld.c:791 ms1-ibld.c:907 openrisc-ibld.c:722 +#: m32c-ibld.c:2780 m32r-ibld.c:791 ms1-ibld.c:907 openrisc-ibld.c:722 #: xstormy16-ibld.c:813 #, c-format msgid "Unrecognized field %d while decoding insn.\n" msgstr "" #: fr30-ibld.c:1070 frv-ibld.c:1440 ip2k-ibld.c:745 iq2000-ibld.c:1008 -#: m32c-ibld.c:3377 m32r-ibld.c:904 ms1-ibld.c:1086 openrisc-ibld.c:799 +#: m32c-ibld.c:3379 m32r-ibld.c:904 ms1-ibld.c:1086 openrisc-ibld.c:799 #: xstormy16-ibld.c:923 #, c-format msgid "Unrecognized field %d while getting int operand.\n" msgstr "" #: fr30-ibld.c:1198 frv-ibld.c:1700 ip2k-ibld.c:801 iq2000-ibld.c:1121 -#: m32c-ibld.c:3956 m32r-ibld.c:999 ms1-ibld.c:1247 openrisc-ibld.c:858 +#: m32c-ibld.c:3960 m32r-ibld.c:999 ms1-ibld.c:1247 openrisc-ibld.c:858 #: xstormy16-ibld.c:1015 #, c-format msgid "Unrecognized field %d while getting vma operand.\n" msgstr "" #: fr30-ibld.c:1329 frv-ibld.c:1967 ip2k-ibld.c:860 iq2000-ibld.c:1241 -#: m32c-ibld.c:4525 m32r-ibld.c:1100 ms1-ibld.c:1415 openrisc-ibld.c:924 +#: m32c-ibld.c:4529 m32r-ibld.c:1100 ms1-ibld.c:1415 openrisc-ibld.c:924 #: xstormy16-ibld.c:1114 #, c-format msgid "Unrecognized field %d while setting int operand.\n" msgstr "" #: fr30-ibld.c:1450 frv-ibld.c:2224 ip2k-ibld.c:909 iq2000-ibld.c:1351 -#: m32c-ibld.c:5082 m32r-ibld.c:1191 ms1-ibld.c:1573 openrisc-ibld.c:980 +#: m32c-ibld.c:5088 m32r-ibld.c:1191 ms1-ibld.c:1573 openrisc-ibld.c:980 #: xstormy16-ibld.c:1203 #, c-format msgid "Unrecognized field %d while setting vma operand.\n" @@ -346,7 +346,8 @@ msgstr "" #. -- assembler routines inserted here. #. -- asm.c -#: frv-asm.c:971 iq2000-asm.c:55 m32r-asm.c:52 openrisc-asm.c:53 +#: frv-asm.c:971 iq2000-asm.c:55 m32c-asm.c:140 m32c-asm.c:211 m32c-asm.c:253 +#: m32c-asm.c:312 m32c-asm.c:334 m32r-asm.c:52 openrisc-asm.c:53 msgid "missing `)'" msgstr "" @@ -371,7 +372,7 @@ msgstr "" msgid "%02x\t\t*unknown*" msgstr "" -#: i386-dis.c:1737 +#: i386-dis.c:1742 msgid "" msgstr "" @@ -555,46 +556,68 @@ msgstr "" msgid "unknown\t0x%02lx" msgstr "" -#: m32c-asm.c:100 +#: m32c-asm.c:116 msgid "imm:6 immediate is out of range" msgstr "" -#: m32c-asm.c:127 m32c-asm.c:131 m32c-asm.c:187 +#: m32c-asm.c:146 +#, c-format +msgid "%dsp8() takes a symbolic address, not a number" +msgstr "" + +#: m32c-asm.c:159 m32c-asm.c:163 m32c-asm.c:229 msgid "dsp:8 immediate is out of range" msgstr "" -#: m32c-asm.c:158 m32c-asm.c:162 +#: m32c-asm.c:184 m32c-asm.c:188 msgid "Immediate is out of range -8 to 7" msgstr "" -#: m32c-asm.c:218 m32c-asm.c:225 m32c-asm.c:250 +#: m32c-asm.c:259 +#, c-format +msgid "%dsp16() takes a symbolic address, not a number" +msgstr "" + +#: m32c-asm.c:282 m32c-asm.c:289 m32c-asm.c:352 msgid "dsp:16 immediate is out of range" msgstr "" -#: m32c-asm.c:276 +#: m32c-asm.c:378 msgid "dsp:20 immediate is out of range" msgstr "" -#: m32c-asm.c:302 +#: m32c-asm.c:404 msgid "dsp:24 immediate is out of range" msgstr "" -#: m32c-asm.c:355 +#: m32c-asm.c:437 msgid "immediate is out of range 1-2" msgstr "" -#: m32c-asm.c:383 +#: m32c-asm.c:455 msgid "immediate is out of range 1-8" msgstr "" -#: m32c-asm.c:407 +#: m32c-asm.c:491 +msgid "immediate is out of range 2-9" +msgstr "" + +#: m32c-asm.c:509 msgid "Bit number for indexing general register is out of range 0-15" msgstr "" -#: m32c-asm.c:445 m32c-asm.c:486 +#: m32c-asm.c:541 m32c-asm.c:576 msgid "bit,base is out of range" msgstr "" +#: m32c-asm.c:712 +msgid "not a valid r0l/r0h pair" +msgstr "" + +#: m32c-asm.c:742 +msgid "Invalid size specifier" +msgstr "" + #: m68k-dis.c:1162 #, c-format msgid "" @@ -614,22 +637,22 @@ msgstr "" msgid "# internal error, incomplete extension sequence (+)" msgstr "" -#: mips-dis.c:777 +#: mips-dis.c:805 #, c-format msgid "# internal error, undefined extension sequence (+%c)" msgstr "" -#: mips-dis.c:1038 +#: mips-dis.c:1153 #, c-format msgid "# internal error, undefined modifier(%c)" msgstr "" -#: mips-dis.c:1548 +#: mips-dis.c:1663 #, c-format msgid "# internal disassembler error, unrecognised modifier (%c)" msgstr "" -#: mips-dis.c:1779 +#: mips-dis.c:1894 #, c-format msgid "" "\n" @@ -637,7 +660,7 @@ msgid "" "with the -M switch (multiple options should be separated by commas):\n" msgstr "" -#: mips-dis.c:1783 +#: mips-dis.c:1898 #, c-format msgid "" "\n" @@ -645,7 +668,7 @@ msgid "" " Default: based on binary being disassembled.\n" msgstr "" -#: mips-dis.c:1787 +#: mips-dis.c:1902 #, c-format msgid "" "\n" @@ -653,7 +676,7 @@ msgid "" " Default: numeric.\n" msgstr "" -#: mips-dis.c:1791 +#: mips-dis.c:1906 #, c-format msgid "" "\n" @@ -662,7 +685,7 @@ msgid "" " Default: based on binary being disassembled.\n" msgstr "" -#: mips-dis.c:1796 +#: mips-dis.c:1911 #, c-format msgid "" "\n" @@ -671,7 +694,7 @@ msgid "" " Default: based on binary being disassembled.\n" msgstr "" -#: mips-dis.c:1801 +#: mips-dis.c:1916 #, c-format msgid "" "\n" @@ -679,7 +702,7 @@ msgid "" " specified ABI.\n" msgstr "" -#: mips-dis.c:1805 +#: mips-dis.c:1920 #, c-format msgid "" "\n" @@ -687,7 +710,7 @@ msgid "" " specified architecture.\n" msgstr "" -#: mips-dis.c:1809 +#: mips-dis.c:1924 #, c-format msgid "" "\n" @@ -695,12 +718,12 @@ msgid "" " " msgstr "" -#: mips-dis.c:1814 mips-dis.c:1822 mips-dis.c:1824 +#: mips-dis.c:1929 mips-dis.c:1937 mips-dis.c:1939 #, c-format msgid "\n" msgstr "" -#: mips-dis.c:1816 +#: mips-dis.c:1931 #, c-format msgid "" "\n" diff --git a/opcodes/xstormy16-desc.c b/opcodes/xstormy16-desc.c index a63a4518499..80c7bf92984 100644 --- a/opcodes/xstormy16-desc.c +++ b/opcodes/xstormy16-desc.c @@ -126,24 +126,24 @@ static const CGEN_MACH xstormy16_cgen_mach_table[] = { static CGEN_KEYWORD_ENTRY xstormy16_cgen_opval_gr_names_entries[] = { - { "r0", 0, {0, {0}}, 0, 0 }, - { "r1", 1, {0, {0}}, 0, 0 }, - { "r2", 2, {0, {0}}, 0, 0 }, - { "r3", 3, {0, {0}}, 0, 0 }, - { "r4", 4, {0, {0}}, 0, 0 }, - { "r5", 5, {0, {0}}, 0, 0 }, - { "r6", 6, {0, {0}}, 0, 0 }, - { "r7", 7, {0, {0}}, 0, 0 }, - { "r8", 8, {0, {0}}, 0, 0 }, - { "r9", 9, {0, {0}}, 0, 0 }, - { "r10", 10, {0, {0}}, 0, 0 }, - { "r11", 11, {0, {0}}, 0, 0 }, - { "r12", 12, {0, {0}}, 0, 0 }, - { "r13", 13, {0, {0}}, 0, 0 }, - { "r14", 14, {0, {0}}, 0, 0 }, - { "r15", 15, {0, {0}}, 0, 0 }, - { "psw", 14, {0, {0}}, 0, 0 }, - { "sp", 15, {0, {0}}, 0, 0 } + { "r0", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "r1", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "r2", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "r3", 3, {0, {{{0, 0}}}}, 0, 0 }, + { "r4", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "r5", 5, {0, {{{0, 0}}}}, 0, 0 }, + { "r6", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "r7", 7, {0, {{{0, 0}}}}, 0, 0 }, + { "r8", 8, {0, {{{0, 0}}}}, 0, 0 }, + { "r9", 9, {0, {{{0, 0}}}}, 0, 0 }, + { "r10", 10, {0, {{{0, 0}}}}, 0, 0 }, + { "r11", 11, {0, {{{0, 0}}}}, 0, 0 }, + { "r12", 12, {0, {{{0, 0}}}}, 0, 0 }, + { "r13", 13, {0, {{{0, 0}}}}, 0, 0 }, + { "r14", 14, {0, {{{0, 0}}}}, 0, 0 }, + { "r15", 15, {0, {{{0, 0}}}}, 0, 0 }, + { "psw", 14, {0, {{{0, 0}}}}, 0, 0 }, + { "sp", 15, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD xstormy16_cgen_opval_gr_names = @@ -155,16 +155,16 @@ CGEN_KEYWORD xstormy16_cgen_opval_gr_names = static CGEN_KEYWORD_ENTRY xstormy16_cgen_opval_gr_Rb_names_entries[] = { - { "r8", 0, {0, {0}}, 0, 0 }, - { "r9", 1, {0, {0}}, 0, 0 }, - { "r10", 2, {0, {0}}, 0, 0 }, - { "r11", 3, {0, {0}}, 0, 0 }, - { "r12", 4, {0, {0}}, 0, 0 }, - { "r13", 5, {0, {0}}, 0, 0 }, - { "r14", 6, {0, {0}}, 0, 0 }, - { "r15", 7, {0, {0}}, 0, 0 }, - { "psw", 6, {0, {0}}, 0, 0 }, - { "sp", 7, {0, {0}}, 0, 0 } + { "r8", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "r9", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "r10", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "r11", 3, {0, {{{0, 0}}}}, 0, 0 }, + { "r12", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "r13", 5, {0, {{{0, 0}}}}, 0, 0 }, + { "r14", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "r15", 7, {0, {{{0, 0}}}}, 0, 0 }, + { "psw", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "sp", 7, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD xstormy16_cgen_opval_gr_Rb_names = @@ -176,22 +176,22 @@ CGEN_KEYWORD xstormy16_cgen_opval_gr_Rb_names = static CGEN_KEYWORD_ENTRY xstormy16_cgen_opval_h_branchcond_entries[] = { - { "ge", 0, {0, {0}}, 0, 0 }, - { "nc", 1, {0, {0}}, 0, 0 }, - { "lt", 2, {0, {0}}, 0, 0 }, - { "c", 3, {0, {0}}, 0, 0 }, - { "gt", 4, {0, {0}}, 0, 0 }, - { "hi", 5, {0, {0}}, 0, 0 }, - { "le", 6, {0, {0}}, 0, 0 }, - { "ls", 7, {0, {0}}, 0, 0 }, - { "pl", 8, {0, {0}}, 0, 0 }, - { "nv", 9, {0, {0}}, 0, 0 }, - { "mi", 10, {0, {0}}, 0, 0 }, - { "v", 11, {0, {0}}, 0, 0 }, - { "nz.b", 12, {0, {0}}, 0, 0 }, - { "nz", 13, {0, {0}}, 0, 0 }, - { "z.b", 14, {0, {0}}, 0, 0 }, - { "z", 15, {0, {0}}, 0, 0 } + { "ge", 0, {0, {{{0, 0}}}}, 0, 0 }, + { "nc", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "lt", 2, {0, {{{0, 0}}}}, 0, 0 }, + { "c", 3, {0, {{{0, 0}}}}, 0, 0 }, + { "gt", 4, {0, {{{0, 0}}}}, 0, 0 }, + { "hi", 5, {0, {{{0, 0}}}}, 0, 0 }, + { "le", 6, {0, {{{0, 0}}}}, 0, 0 }, + { "ls", 7, {0, {{{0, 0}}}}, 0, 0 }, + { "pl", 8, {0, {{{0, 0}}}}, 0, 0 }, + { "nv", 9, {0, {{{0, 0}}}}, 0, 0 }, + { "mi", 10, {0, {{{0, 0}}}}, 0, 0 }, + { "v", 11, {0, {{{0, 0}}}}, 0, 0 }, + { "nz.b", 12, {0, {{{0, 0}}}}, 0, 0 }, + { "nz", 13, {0, {{{0, 0}}}}, 0, 0 }, + { "z.b", 14, {0, {{{0, 0}}}}, 0, 0 }, + { "z", 15, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD xstormy16_cgen_opval_h_branchcond = @@ -203,9 +203,9 @@ CGEN_KEYWORD xstormy16_cgen_opval_h_branchcond = static CGEN_KEYWORD_ENTRY xstormy16_cgen_opval_h_wordsize_entries[] = { - { ".b", 0, {0, {0}}, 0, 0 }, - { ".w", 1, {0, {0}}, 0, 0 }, - { "", 1, {0, {0}}, 0, 0 } + { ".b", 0, {0, {{{0, 0}}}}, 0, 0 }, + { ".w", 1, {0, {{{0, 0}}}}, 0, 0 }, + { "", 1, {0, {{{0, 0}}}}, 0, 0 } }; CGEN_KEYWORD xstormy16_cgen_opval_h_wordsize = @@ -226,26 +226,26 @@ CGEN_KEYWORD xstormy16_cgen_opval_h_wordsize = const CGEN_HW_ENTRY xstormy16_cgen_hw_table[] = { - { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { (1<isas; + CGEN_BITSET *isas = cd->isas; unsigned int machs = cd->machs; cd->int_insn_p = CGEN_INT_INSN_P; @@ -1287,7 +1287,7 @@ xstormy16_cgen_rebuild_tables (CGEN_CPU_TABLE *cd) cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */ cd->max_insn_bitsize = 0; for (i = 0; i < MAX_ISAS; ++i) - if (((1 << i) & isas) != 0) + if (cgen_bitset_contains (isas, i)) { const CGEN_ISA *isa = & xstormy16_cgen_isa_table[i]; @@ -1372,7 +1372,7 @@ xstormy16_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) { CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE)); static int init_p; - unsigned int isas = 0; /* 0 = "unspecified" */ + CGEN_BITSET *isas = 0; /* 0 = "unspecified" */ unsigned int machs = 0; /* 0 = "unspecified" */ enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN; va_list ap; @@ -1391,7 +1391,7 @@ xstormy16_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) switch (arg_type) { case CGEN_CPU_OPEN_ISAS : - isas = va_arg (ap, unsigned int); + isas = va_arg (ap, CGEN_BITSET *); break; case CGEN_CPU_OPEN_MACHS : machs = va_arg (ap, unsigned int); @@ -1422,9 +1422,6 @@ xstormy16_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) machs = (1 << MAX_MACHS) - 1; /* Base mach is always selected. */ machs |= 1; - /* ISA unspecified means "all". */ - if (isas == 0) - isas = (1 << MAX_ISAS) - 1; if (endian == CGEN_ENDIAN_UNKNOWN) { /* ??? If target has only one, could have a default. */ @@ -1432,7 +1429,7 @@ xstormy16_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) abort (); } - cd->isas = isas; + cd->isas = cgen_bitset_copy (isas); cd->machs = machs; cd->endian = endian; /* FIXME: for the sparc case we can determine insn-endianness statically. diff --git a/opcodes/xstormy16-desc.h b/opcodes/xstormy16-desc.h index 823a03ba3c1..4614fa5eb52 100644 --- a/opcodes/xstormy16-desc.h +++ b/opcodes/xstormy16-desc.h @@ -25,6 +25,8 @@ with this program; if not, write to the Free Software Foundation, Inc., #ifndef XSTORMY16_CPU_H #define XSTORMY16_CPU_H +#include "opcode/cgen-bitset.h" + #define CGEN_ARCH xstormy16 /* Given symbol S, return xstormy16_cgen_. */ @@ -184,6 +186,15 @@ typedef enum cgen_ifld_attr { /* Number of non-boolean elements in cgen_ifld_attr. */ #define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1) +/* cgen_ifld attribute accessor macros. */ +#define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_PCREL_ADDR)) != 0) +#define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_ABS_ADDR)) != 0) +#define CGEN_ATTR_CGEN_IFLD_RESERVED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_RESERVED)) != 0) +#define CGEN_ATTR_CGEN_IFLD_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGN_OPT)) != 0) +#define CGEN_ATTR_CGEN_IFLD_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGNED)) != 0) + /* Enum declaration for xstormy16 ifield types. */ typedef enum ifield_type { XSTORMY16_F_NIL, XSTORMY16_F_ANYOF, XSTORMY16_F_RD, XSTORMY16_F_RDM @@ -211,6 +222,13 @@ typedef enum cgen_hw_attr { /* Number of non-boolean elements in cgen_hw_attr. */ #define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1) +/* cgen_hw attribute accessor macros. */ +#define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_CACHE_ADDR)) != 0) +#define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PC)) != 0) +#define CGEN_ATTR_CGEN_HW_PROFILE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PROFILE)) != 0) + /* Enum declaration for xstormy16 hardware types. */ typedef enum cgen_hw_type { HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR @@ -234,6 +252,17 @@ typedef enum cgen_operand_attr { /* Number of non-boolean elements in cgen_operand_attr. */ #define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1) +/* cgen_operand attribute accessor macros. */ +#define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_ABS_ADDR)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGN_OPT)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGNED)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_NEGATIVE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_NEGATIVE)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_RELAX)) != 0) +#define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SEM_ONLY)) != 0) + /* Enum declaration for xstormy16 operand types. */ typedef enum cgen_operand_type { XSTORMY16_OPERAND_PC, XSTORMY16_OPERAND_PSW_Z8, XSTORMY16_OPERAND_PSW_Z16, XSTORMY16_OPERAND_PSW_CY @@ -267,6 +296,19 @@ typedef enum cgen_insn_attr { /* Number of non-boolean elements in cgen_insn_attr. */ #define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1) +/* cgen_insn attribute accessor macros. */ +#define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset) +#define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_ALIAS)) != 0) +#define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_VIRTUAL)) != 0) +#define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_UNCOND_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_COND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_COND_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_SKIP_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SKIP_CTI)) != 0) +#define CGEN_ATTR_CGEN_INSN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_DELAY_SLOT)) != 0) +#define CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXABLE)) != 0) +#define CGEN_ATTR_CGEN_INSN_RELAXED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXED)) != 0) +#define CGEN_ATTR_CGEN_INSN_NO_DIS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NO_DIS)) != 0) +#define CGEN_ATTR_CGEN_INSN_PBB_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PBB)) != 0) + /* cgen.h uses things we just defined. */ #include "opcode/cgen.h" diff --git a/opcodes/xstormy16-dis.c b/opcodes/xstormy16-dis.c index 91cde6be6a9..aaff53f863d 100644 --- a/opcodes/xstormy16-dis.c +++ b/opcodes/xstormy16-dis.c @@ -4,7 +4,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. - the resultant file is machine generated, cgen-dis.in isn't - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005 + Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005 Free Software Foundation, Inc. This file is part of the GNU Binutils and GDB, the GNU debugger. @@ -476,7 +476,7 @@ default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) typedef struct cpu_desc_list { struct cpu_desc_list *next; - int isa; + CGEN_BITSET *isa; int mach; int endian; CGEN_CPU_DESC cd; @@ -488,11 +488,12 @@ print_insn_xstormy16 (bfd_vma pc, disassemble_info *info) static cpu_desc_list *cd_list = 0; cpu_desc_list *cl = 0; static CGEN_CPU_DESC cd = 0; - static int prev_isa; + static CGEN_BITSET *prev_isa; static int prev_mach; static int prev_endian; int length; - int isa,mach; + CGEN_BITSET *isa; + int mach; int endian = (info->endian == BFD_ENDIAN_BIG ? CGEN_ENDIAN_BIG : CGEN_ENDIAN_LITTLE); @@ -515,25 +516,34 @@ print_insn_xstormy16 (bfd_vma pc, disassemble_info *info) #endif #ifdef CGEN_COMPUTE_ISA - isa = CGEN_COMPUTE_ISA (info); + { + static CGEN_BITSET *permanent_isa; + + if (!permanent_isa) + permanent_isa = cgen_bitset_create (MAX_ISAS); + isa = permanent_isa; + cgen_bitset_clear (isa); + cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); + } #else isa = info->insn_sets; #endif /* If we've switched cpu's, try to find a handle we've used before */ if (cd - && (isa != prev_isa + && (cgen_bitset_compare (isa, prev_isa) != 0 || mach != prev_mach || endian != prev_endian)) { cd = 0; for (cl = cd_list; cl; cl = cl->next) { - if (cl->isa == isa && + if (cgen_bitset_compare (cl->isa, isa) == 0 && cl->mach == mach && cl->endian == endian) { cd = cl->cd; + prev_isa = cd->isas; break; } } @@ -549,7 +559,7 @@ print_insn_xstormy16 (bfd_vma pc, disassemble_info *info) abort (); mach_name = arch_type->printable_name; - prev_isa = isa; + prev_isa = cgen_bitset_copy (isa); prev_mach = mach; prev_endian = endian; cd = xstormy16_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, @@ -562,7 +572,7 @@ print_insn_xstormy16 (bfd_vma pc, disassemble_info *info) /* Save this away for future reference. */ cl = xmalloc (sizeof (struct cpu_desc_list)); cl->cd = cd; - cl->isa = isa; + cl->isa = prev_isa; cl->mach = mach; cl->endian = endian; cl->next = cd_list; diff --git a/opcodes/xstormy16-opc.c b/opcodes/xstormy16-opc.c index 8237472f3aa..14823ee7ca1 100644 --- a/opcodes/xstormy16-opc.c +++ b/opcodes/xstormy16-opc.c @@ -1010,27 +1010,27 @@ static const CGEN_IBASE xstormy16_cgen_macro_insn_table[] = /* mov Rx,#$imm8 */ { -1, "movimm8", "mov", 16, - { 0|A(ALIAS), { (1< + + This file is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "sysdep.h" +#include "dis-asm.h" +#include + +struct buffer +{ + bfd_vma base; + int n_fetch; + int n_used; + char data[4]; +} ; + +typedef int (*func)(struct buffer *, disassemble_info *, char *); + +struct tab_elt +{ + unsigned char val; + unsigned char mask; + func fp; + char * text; +} ; + +#define TXTSIZ 16 +/* Names of 16-bit registers. */ +static char * rr_str[] = { "bc", "de", "hl", "sp" }; +/* Names of 8-bit registers. */ +static char * r_str[] = { "b", "c", "d", "e", "h", "l", "(hl)", "a" }; +/* Texts for condition codes. */ +static char * cc_str[] = { "nz", "z", "nc", "c", "po", "pe", "p", "m" }; +/* Instruction names for 8-bit arithmetic, operand "a" is often implicit */ +static char * arit_str[] = +{ + "add a,", "adc a,", "sub ", "sbc a,", "and ", "xor ", "or ", "cp " +} ; + +static int +fetch_data (struct buffer *buf, disassemble_info * info, int n) +{ + int r; + + if (buf->n_fetch + n > 4) + abort (); + + r = info->read_memory_func (buf->base + buf->n_fetch, + buf->data + buf->n_fetch, + n, info); + if (r == 0) + buf->n_fetch += n; + return !r; +} + +static int +prt (struct buffer *buf, disassemble_info * info, char *txt) +{ + info->fprintf_func (info->stream, "%s", txt); + buf->n_used = buf->n_fetch; + return 1; +} + +static int +prt_e (struct buffer *buf, disassemble_info * info, char *txt) +{ + char e; + int target_addr; + + if (fetch_data (buf, info, 1)) + { + e = buf->data[1]; + target_addr = (buf->base + 2 + e) & 0xffff; + buf->n_used = buf->n_fetch; + info->fprintf_func (info->stream, "%s0x%04x", txt, target_addr); + } + else + buf->n_used = -1; + + return buf->n_used; +} + +static int +jr_cc (struct buffer *buf, disassemble_info * info, char *txt) +{ + char mytxt[TXTSIZ]; + + snprintf (mytxt, TXTSIZ, txt, cc_str[(buf->data[0] >> 3) & 3]); + return prt_e (buf, info, mytxt); +} + +static int +prt_nn (struct buffer *buf, disassemble_info * info, char *txt) +{ + int nn; + unsigned char *p; + + p = (unsigned char*) buf->data + buf->n_fetch; + if (fetch_data (buf, info, 2)) + { + nn = p[0] + (p[1] << 8); + info->fprintf_func (info->stream, txt, nn); + buf->n_used = buf->n_fetch; + } + else + buf->n_used = -1; + return buf->n_used; +} + +static int +prt_rr_nn (struct buffer *buf, disassemble_info * info, char *txt) +{ + char mytxt[TXTSIZ]; + + snprintf (mytxt, TXTSIZ, txt, rr_str[(buf->data[0] >> 4) & 3]); + return prt_nn (buf, info, mytxt); +} + +static int +prt_rr (struct buffer *buf, disassemble_info * info, char *txt) +{ + info->fprintf_func (info->stream, "%s%s", txt, + rr_str[(buf->data[buf->n_fetch - 1] >> 4) & 3]); + buf->n_used = buf->n_fetch; + return buf->n_used; +} + +static int +prt_n (struct buffer *buf, disassemble_info * info, char *txt) +{ + int n; + unsigned char *p; + + p = (unsigned char*) buf->data + buf->n_fetch; + + if (fetch_data (buf, info, 1)) + { + n = p[0]; + info->fprintf_func (info->stream, txt, n); + buf->n_used = buf->n_fetch; + } + else + buf->n_used = -1; + + return buf->n_used; +} + +static int +ld_r_n (struct buffer *buf, disassemble_info * info, char *txt) +{ + char mytxt[TXTSIZ]; + + snprintf (mytxt, TXTSIZ, txt, r_str[(buf->data[0] >> 3) & 7]); + return prt_n (buf, info, mytxt); +} + +static int +prt_r (struct buffer *buf, disassemble_info * info, char *txt) +{ + info->fprintf_func (info->stream, txt, + r_str[(buf->data[buf->n_fetch - 1] >> 3) & 7]); + buf->n_used = buf->n_fetch; + return buf->n_used; +} + +static int +ld_r_r (struct buffer *buf, disassemble_info * info, char *txt) +{ + info->fprintf_func (info->stream, txt, + r_str[(buf->data[buf->n_fetch - 1] >> 3) & 7], + r_str[buf->data[buf->n_fetch - 1] & 7]); + buf->n_used = buf->n_fetch; + return buf->n_used; +} + +static int +arit_r (struct buffer *buf, disassemble_info * info, char *txt) +{ + info->fprintf_func (info->stream, txt, + arit_str[(buf->data[buf->n_fetch - 1] >> 3) & 7], + r_str[buf->data[buf->n_fetch - 1] & 7]); + buf->n_used = buf->n_fetch; + return buf->n_used; +} + +static int +prt_cc (struct buffer *buf, disassemble_info * info, char *txt) +{ + info->fprintf_func (info->stream, "%s%s", txt, + cc_str[(buf->data[0] >> 3) & 7]); + buf->n_used = buf->n_fetch; + return buf->n_used; +} + +static int +pop_rr (struct buffer *buf, disassemble_info * info, char *txt) +{ + static char *rr_stack[] = { "bc","de","hl","af"}; + + info->fprintf_func (info->stream, "%s %s", txt, + rr_stack[(buf->data[0] >> 4) & 3]); + buf->n_used = buf->n_fetch; + return buf->n_used; +} + + +static int +jp_cc_nn (struct buffer *buf, disassemble_info * info, char *txt) +{ + char mytxt[TXTSIZ]; + + snprintf (mytxt,TXTSIZ, + "%s%s,0x%%04x", txt, cc_str[(buf->data[0] >> 3) & 7]); + return prt_nn (buf, info, mytxt); +} + +static int +arit_n (struct buffer *buf, disassemble_info * info, char *txt) +{ + char mytxt[TXTSIZ]; + + snprintf (mytxt,TXTSIZ, txt, arit_str[(buf->data[0] >> 3) & 7]); + return prt_n (buf, info, mytxt); +} + +static int +rst (struct buffer *buf, disassemble_info * info, char *txt) +{ + info->fprintf_func (info->stream, txt, buf->data[0] & 0x38); + buf->n_used = buf->n_fetch; + return buf->n_used; +} + + +static int +cis (struct buffer *buf, disassemble_info * info, char *txt ATTRIBUTE_UNUSED) +{ + static char * opar[] = { "ld", "cp", "in", "out" }; + char * op; + char c; + + c = buf->data[1]; + op = ((0x13 & c) == 0x13) ? "ot" : (opar[c & 3]); + info->fprintf_func (info->stream, + "%s%c%s", op, + (c & 0x08) ? 'd' : 'i', + (c & 0x10) ? "r" : ""); + buf->n_used = 2; + return buf->n_used; +} + +static int +dump (struct buffer *buf, disassemble_info * info, char *txt) +{ + int i; + + info->fprintf_func (info->stream, "defb "); + for (i = 0; txt[i]; ++i) + info->fprintf_func (info->stream, i ? ", 0x%02x" : "0x%02x", + (unsigned char) buf->data[i]); + buf->n_used = i; + return buf->n_used; +} + +/* Table to disassemble machine codes with prefix 0xED. */ +struct tab_elt opc_ed[] = +{ + { 0x70, 0xFF, prt, "in f,(c)" }, + { 0x70, 0xFF, dump, "xx" }, + { 0x40, 0xC7, prt_r, "in %s,(c)" }, + { 0x71, 0xFF, prt, "out (c),0" }, + { 0x70, 0xFF, dump, "xx" }, + { 0x41, 0xC7, prt_r, "out (c),%s" }, + { 0x42, 0xCF, prt_rr, "sbc hl," }, + { 0x43, 0xCF, prt_rr_nn, "ld (0x%%04x),%s" }, + { 0x44, 0xFF, prt, "neg" }, + { 0x45, 0xFF, prt, "retn" }, + { 0x46, 0xFF, prt, "im 0" }, + { 0x47, 0xFF, prt, "ld i,a" }, + { 0x4A, 0xCF, prt_rr, "adc hl," }, + { 0x4B, 0xCF, prt_rr_nn, "ld %s,(0x%%04x)" }, + { 0x4D, 0xFF, prt, "reti" }, + { 0x56, 0xFF, prt, "im 1" }, + { 0x57, 0xFF, prt, "ld a,i" }, + { 0x5E, 0xFF, prt, "im 2" }, + { 0x67, 0xFF, prt, "rrd" }, + { 0x6F, 0xFF, prt, "rld" }, + { 0xA0, 0xE4, cis, "" }, + { 0xC3, 0xFF, prt, "muluw hl,bc" }, + { 0xC5, 0xE7, prt_r, "mulub a,%s" }, + { 0xF3, 0xFF, prt, "muluw hl,sp" }, + { 0x00, 0x00, dump, "xx" } +}; + +static int +pref_ed (struct buffer * buf, disassemble_info * info, + char* txt ATTRIBUTE_UNUSED) +{ + struct tab_elt *p; + + if (fetch_data(buf, info, 1)) + { + for (p = opc_ed; p->val != (buf->data[1] & p->mask); ++p) + ; + p->fp (buf, info, p->text); + } + else + buf->n_used = -1; + + return buf->n_used; +} + +/* Instruction names for the instructions addressing single bits. */ +static char *cb1_str[] = { "", "bit", "res", "set"}; +/* Instruction names for shifts and rotates. */ +static char *cb2_str[] = +{ + "rlc", "rrc", "rl", "rr", "sla", "sra", "sli", "srl" +}; + +static int +pref_cb (struct buffer * buf, disassemble_info * info, + char* txt ATTRIBUTE_UNUSED) +{ + if (fetch_data (buf, info, 1)) + { + buf->n_used = 2; + if ((buf->data[1] & 0xc0) == 0) + info->fprintf_func (info->stream, "%s %s", + cb2_str[(buf->data[1] >> 3) & 7], + r_str[buf->data[1] & 7]); + else + info->fprintf_func (info->stream, "%s %d,%s", + cb1_str[(buf->data[1] >> 6) & 3], + (buf->data[1] >> 3) & 7, + r_str[buf->data[1] & 7]); + } + else + buf->n_used = -1; + + return buf->n_used; +} + +static int +addvv (struct buffer * buf, disassemble_info * info, char* txt) +{ + info->fprintf_func (info->stream, "add %s,%s", txt, txt); + + return buf->n_used = buf->n_fetch; +} + +static int +ld_v_v (struct buffer * buf, disassemble_info * info, char* txt) +{ + char mytxt[TXTSIZ]; + + snprintf (mytxt, TXTSIZ, "ld %s%%s,%s%%s", txt, txt); + return ld_r_r (buf, info, mytxt); +} + +static int +prt_d (struct buffer *buf, disassemble_info * info, char *txt) +{ + int d; + signed char *p; + + p = (unsigned char*) buf->data + buf->n_fetch; + + if (fetch_data (buf, info, 1)) + { + d = p[0]; + info->fprintf_func (info->stream, txt, d); + buf->n_used = buf->n_fetch; + } + else + buf->n_used = -1; + + return buf->n_used; +} + +static int +prt_d_n (struct buffer *buf, disassemble_info * info, char *txt) +{ + char mytxt[TXTSIZ]; + int d; + signed char *p; + + p = (unsigned char*) buf->data + buf->n_fetch; + + if (fetch_data (buf, info, 1)) + { + d = p[0]; + snprintf (mytxt, TXTSIZ, txt, d); + return prt_n (buf, info, mytxt); + } + else + buf->n_used = -1; + + return buf->n_used; +} + +static int +arit_d (struct buffer *buf, disassemble_info * info, char *txt) +{ + char mytxt[TXTSIZ]; + unsigned char c; + + c = buf->data[buf->n_fetch - 1]; + snprintf (mytxt, TXTSIZ, txt, arit_str[(c >> 3) & 7]); + return prt_d (buf, info, mytxt); +} + +static int +ld_r_d (struct buffer *buf, disassemble_info * info, char *txt) +{ + char mytxt[TXTSIZ]; + unsigned char c; + + c = buf->data[buf->n_fetch - 1]; + snprintf (mytxt, TXTSIZ, txt, r_str[(c >> 3) & 7]); + return prt_d (buf, info, mytxt); +} + +static int +ld_d_r(struct buffer *buf, disassemble_info * info, char *txt) +{ + char mytxt[TXTSIZ]; + unsigned char c; + + c = buf->data[buf->n_fetch - 1]; + snprintf (mytxt, TXTSIZ, txt, r_str[c & 7]); + return prt_d (buf, info, mytxt); +} + +static int +pref_xd_cb (struct buffer * buf, disassemble_info * info, char* txt) +{ + if (fetch_data (buf, info, 2)) + { + int d; + char arg[TXTSIZ]; + signed char *p; + + buf->n_used = 4; + p = buf->data; + d = p[2]; + + if (((p[3] & 0xC0) == 0x40) || ((p[3] & 7) == 0x06)) + snprintf (arg, TXTSIZ, "(%s+%d)", txt, d); + else + snprintf (arg, TXTSIZ, "(%s+%d),%s", txt, d, r_str[p[3] & 7]); + + if ((p[3] & 0xc0) == 0) + info->fprintf_func (info->stream, "%s %s", + cb2_str[(buf->data[3] >> 3) & 7], + arg); + else + info->fprintf_func (info->stream, "%s %d,%s", + cb1_str[(buf->data[3] >> 6) & 3], + (buf->data[3] >> 3) & 7, + arg); + } + else + buf->n_used = -1; + + return buf->n_used; +} + +/* Table to disassemble machine codes with prefix 0xDD or 0xFD. */ +static struct tab_elt opc_ind[] = +{ + { 0x24, 0xF7, prt_r, "inc %s%%s" }, + { 0x25, 0xF7, prt_r, "dec %s%%s" }, + { 0x26, 0xF7, ld_r_n, "ld %s%%s,0x%%%%02x" }, + { 0x21, 0xFF, prt_nn, "ld %s,0x%%04x" }, + { 0x22, 0xFF, prt_nn, "ld (0x%%04x),%s" }, + { 0x2A, 0xFF, prt_nn, "ld %s,(0x%%04x)" }, + { 0x23, 0xFF, prt, "inc %s" }, + { 0x2B, 0xFF, prt, "dec %s" }, + { 0x29, 0xFF, addvv, "%s" }, + { 0x09, 0xCF, prt_rr, "add %s," }, + { 0x34, 0xFF, prt_d, "inc (%s+%%d)" }, + { 0x35, 0xFF, prt_d, "dec (%s+%%d)" }, + { 0x36, 0xFF, prt_d_n, "ld (%s+%%d),0x%%02x" }, + + { 0x76, 0xFF, dump, "h" }, + { 0x46, 0xC7, ld_r_d, "ld %%s,(%s+%%%%d)" }, + { 0x70, 0xF8, ld_d_r, "ld (%s+%%%%d),%%s" }, + { 0x64, 0xF6, ld_v_v, "%s" }, + { 0x60, 0xF0, ld_r_r, "ld %s%%s,%%s" }, + { 0x44, 0xC6, ld_r_r, "ld %%s,%s%%s" }, + + { 0x86, 0xC7, arit_d, "%%s(%s+%%%%d)" }, + { 0x84, 0xC6, arit_r, "%%s%s%%s" }, + + { 0xE1, 0xFF, prt, "pop %s" }, + { 0xE5, 0xFF, prt, "push %s" }, + { 0xCB, 0xFF, pref_xd_cb, "%s" }, + { 0xE3, 0xFF, prt, "ex (sp),%s" }, + { 0xE9, 0xFF, prt, "jp (%s)" }, + { 0xF9, 0xFF, prt, "ld sp,%s" }, + { 0x00, 0x00, dump, "?" }, +} ; + +static int +pref_ind (struct buffer * buf, disassemble_info * info, char* txt) +{ + if (fetch_data (buf, info, 1)) + { + char mytxt[TXTSIZ]; + struct tab_elt *p; + + for (p = opc_ind; p->val != (buf->data[1] & p->mask); ++p) + ; + snprintf (mytxt, TXTSIZ, p->text, txt); + p->fp (buf, info, mytxt); + } + else + buf->n_used = -1; + + return buf->n_used; +} + +/* Table to disassemble machine codes without prefix. */ +static struct tab_elt opc_main[] = +{ + { 0x00, 0xFF, prt, "nop" }, + { 0x01, 0xCF, prt_rr_nn, "ld %s,0x%%04x" }, + { 0x02, 0xFF, prt, "ld (bc),a" }, + { 0x03, 0xCF, prt_rr, "inc " }, + { 0x04, 0xC7, prt_r, "inc %s" }, + { 0x05, 0xC7, prt_r, "dec %s" }, + { 0x06, 0xC7, ld_r_n, "ld %s,0x%%02x" }, + { 0x07, 0xFF, prt, "rlca" }, + { 0x08, 0xFF, prt, "ex af,af'" }, + { 0x09, 0xCF, prt_rr, "add hl," }, + { 0x0A, 0xFF, prt, "ld a,(bc)" }, + { 0x0B, 0xCF, prt_rr, "dec " }, + { 0x0F, 0xFF, prt, "rrca" }, + { 0x10, 0xFF, prt_e, "djnz " }, + { 0x12, 0xFF, prt, "ld (de),a" }, + { 0x17, 0xFF, prt, "rla" }, + { 0x18, 0xFF, prt_e, "jr "}, + { 0x1A, 0xFF, prt, "ld a,(de)" }, + { 0x1F, 0xFF, prt, "rra" }, + { 0x20, 0xE7, jr_cc, "jr %s,"}, + { 0x22, 0xFF, prt_nn, "ld (0x%04x),hl" }, + { 0x27, 0xFF, prt, "daa"}, + { 0x2A, 0xFF, prt_nn, "ld hl,(0x%04x)" }, + { 0x2F, 0xFF, prt, "cpl" }, + { 0x32, 0xFF, prt_nn, "ld (0x%04x),a" }, + { 0x37, 0xFF, prt, "scf" }, + { 0x3A, 0xFF, prt_nn, "ld a,(0x%04x)" }, + { 0x3F, 0xFF, prt, "ccf" }, + + { 0x76, 0xFF, prt, "halt" }, + { 0x40, 0xC0, ld_r_r, "ld %s,%s"}, + + { 0x80, 0xC0, arit_r, "%s%s" }, + + { 0xC0, 0xC7, prt_cc, "ret " }, + { 0xC1, 0xCF, pop_rr, "pop" }, + { 0xC2, 0xC7, jp_cc_nn, "jp " }, + { 0xC3, 0xFF, prt_nn, "jp 0x%04x" }, + { 0xC4, 0xC7, jp_cc_nn, "call " }, + { 0xC5, 0xCF, pop_rr, "push" }, + { 0xC6, 0xC7, arit_n, "%s0x%%02x" }, + { 0xC7, 0xC7, rst, "rst 0x%02x" }, + { 0xC9, 0xFF, prt, "ret" }, + { 0xCB, 0xFF, pref_cb, "" }, + { 0xCD, 0xFF, prt_nn, "call 0x%04x" }, + { 0xD3, 0xFF, prt_n, "out (0x%02x),a" }, + { 0xD9, 0xFF, prt, "exx" }, + { 0xDB, 0xFF, prt_n, "in a,(0x%02x)" }, + { 0xDD, 0xFF, pref_ind, "ix" }, + { 0xE3, 0xFF, prt, "ex (sp),hl" }, + { 0xE9, 0xFF, prt, "jp (hl)" }, + { 0xEB, 0xFF, prt, "ex de,hl" }, + { 0xED, 0xFF, pref_ed, ""}, + { 0xF3, 0xFF, prt, "di" }, + { 0xF9, 0xFF, prt, "ld sp,hl" }, + { 0xFB, 0xFF, prt, "ei" }, + { 0xFD, 0xFF, pref_ind, "iy" }, + { 0x00, 0x00, prt, "????" }, +} ; + +int +print_insn_z80 (bfd_vma addr, disassemble_info * info) +{ + struct buffer buf; + struct tab_elt *p; + + buf.base = addr; + buf.n_fetch = 0; + buf.n_used = 0; + + if (! fetch_data (& buf, info, 1)) + return -1; + + for (p = opc_main; p->val != (buf.data[0] & p->mask); ++p) + ; + p->fp (& buf, info, p->text); + + return buf.n_used; +} diff --git a/sim/frv/ChangeLog b/sim/frv/ChangeLog index bcf909d77b4..c9e74e903a2 100644 --- a/sim/frv/ChangeLog +++ b/sim/frv/ChangeLog @@ -1,3 +1,16 @@ +2005-10-28 Dave Brolley + + * cpu.c,cpu.h,decode.c,decode.h,model.c,sem.c: Regenerate. + + Contribute the following changes: + 2003-09-29 Dave Brolley + + * frv-sim.h: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of + CGEN_ATTR_VALUE_TYPE. + * mloop.in: Ditto. + * pipeline.c: Ditto. + * traps.c: Ditto. + 2005-03-23 Mark Kettenis * configure: Regenerate. diff --git a/sim/frv/arch.c b/sim/frv/arch.c index a8fc4e9b4db..e8c73146a58 100644 --- a/sim/frv/arch.c +++ b/sim/frv/arch.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2004 Free Software Foundation, Inc. +Copyright 1996-2005 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -18,7 +18,7 @@ GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/frv/arch.h b/sim/frv/arch.h index 685496ba37e..afb484ab225 100644 --- a/sim/frv/arch.h +++ b/sim/frv/arch.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2004 Free Software Foundation, Inc. +Copyright 1996-2005 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -18,7 +18,7 @@ GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/frv/cpu.c b/sim/frv/cpu.c index 111ec333b60..b0de504af65 100644 --- a/sim/frv/cpu.c +++ b/sim/frv/cpu.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2004 Free Software Foundation, Inc. +Copyright 1996-2005 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -18,7 +18,7 @@ GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -28,6 +28,22 @@ with this program; if not, write to the Free Software Foundation, Inc., #include "sim-main.h" #include "cgen-ops.h" +/* Get the value of h-reloc-ann. */ + +BI +frvbf_h_reloc_ann_get (SIM_CPU *current_cpu) +{ + return CPU (h_reloc_ann); +} + +/* Set a value for h-reloc-ann. */ + +void +frvbf_h_reloc_ann_set (SIM_CPU *current_cpu, BI newval) +{ + CPU (h_reloc_ann) = newval; +} + /* Get the value of h-pc. */ USI diff --git a/sim/frv/cpu.h b/sim/frv/cpu.h index 006bb135789..310726685a8 100644 --- a/sim/frv/cpu.h +++ b/sim/frv/cpu.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2004 Free Software Foundation, Inc. +Copyright 1996-2005 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -18,7 +18,7 @@ GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -36,6 +36,10 @@ with this program; if not, write to the Free Software Foundation, Inc., typedef struct { /* Hardware elements. */ struct { + /* relocation annotation */ + BI h_reloc_ann; +#define GET_H_RELOC_ANN() CPU (h_reloc_ann) +#define SET_H_RELOC_ANN(x) (CPU (h_reloc_ann) = (x)) /* program counter */ USI h_pc; #define GET_H_PC() CPU (h_pc) @@ -267,6 +271,8 @@ SET_H_SPR (((UINT) 281), TRUNCDISI ((x)));\ ;} while (0) /* Cover fns for register access. */ +BI frvbf_h_reloc_ann_get (SIM_CPU *); +void frvbf_h_reloc_ann_set (SIM_CPU *, BI); USI frvbf_h_pc_get (SIM_CPU *); void frvbf_h_pc_set (SIM_CPU *, USI); UQI frvbf_h_psr_imple_get (SIM_CPU *); diff --git a/sim/frv/cpuall.h b/sim/frv/cpuall.h index 7923b4a2e05..c49965271fa 100644 --- a/sim/frv/cpuall.h +++ b/sim/frv/cpuall.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2004 Free Software Foundation, Inc. +Copyright 1996-2005 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -18,7 +18,7 @@ GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/frv/decode.c b/sim/frv/decode.c index 60c27eb836e..7dcf928bf7d 100644 --- a/sim/frv/decode.c +++ b/sim/frv/decode.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2004 Free Software Foundation, Inc. +Copyright 1996-2005 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -18,7 +18,7 @@ GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -873,22 +873,70 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_ADD; goto extract_sfmt_add; - case 1 : itype = FRVBF_INSN_ADDCC; goto extract_sfmt_addcc; - case 2 : itype = FRVBF_INSN_ADDX; goto extract_sfmt_addx; - case 3 : itype = FRVBF_INSN_ADDXCC; goto extract_sfmt_addcc; - case 4 : itype = FRVBF_INSN_SUB; goto extract_sfmt_add; - case 5 : itype = FRVBF_INSN_SUBCC; goto extract_sfmt_addcc; - case 6 : itype = FRVBF_INSN_SUBX; goto extract_sfmt_addx; - case 7 : itype = FRVBF_INSN_SUBXCC; goto extract_sfmt_addcc; - case 8 : itype = FRVBF_INSN_SMUL; goto extract_sfmt_smul; - case 9 : itype = FRVBF_INSN_SMULCC; goto extract_sfmt_smulcc; - case 10 : itype = FRVBF_INSN_UMUL; goto extract_sfmt_smul; - case 11 : itype = FRVBF_INSN_UMULCC; goto extract_sfmt_smulcc; - case 12 : itype = FRVBF_INSN_CMPB; goto extract_sfmt_cmpb; - case 13 : itype = FRVBF_INSN_CMPBA; goto extract_sfmt_cmpb; - case 14 : itype = FRVBF_INSN_SDIV; goto extract_sfmt_sdiv; - case 15 : itype = FRVBF_INSN_UDIV; goto extract_sfmt_sdiv; + case 0 : + if ((entire_insn & 0x1fc0fc0) == 0x0) + { itype = FRVBF_INSN_ADD; goto extract_sfmt_add; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc03c0) == 0x40) + { itype = FRVBF_INSN_ADDCC; goto extract_sfmt_addcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc03c0) == 0x80) + { itype = FRVBF_INSN_ADDX; goto extract_sfmt_addx; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc03c0) == 0xc0) + { itype = FRVBF_INSN_ADDXCC; goto extract_sfmt_addcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 4 : + if ((entire_insn & 0x1fc0fc0) == 0x100) + { itype = FRVBF_INSN_SUB; goto extract_sfmt_add; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 5 : + if ((entire_insn & 0x1fc03c0) == 0x140) + { itype = FRVBF_INSN_SUBCC; goto extract_sfmt_addcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 6 : + if ((entire_insn & 0x1fc03c0) == 0x180) + { itype = FRVBF_INSN_SUBX; goto extract_sfmt_addx; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 7 : + if ((entire_insn & 0x1fc03c0) == 0x1c0) + { itype = FRVBF_INSN_SUBXCC; goto extract_sfmt_addcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 8 : + if ((entire_insn & 0x1fc0fc0) == 0x200) + { itype = FRVBF_INSN_SMUL; goto extract_sfmt_smul; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 9 : + if ((entire_insn & 0x1fc03c0) == 0x240) + { itype = FRVBF_INSN_SMULCC; goto extract_sfmt_smulcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 10 : + if ((entire_insn & 0x1fc0fc0) == 0x280) + { itype = FRVBF_INSN_UMUL; goto extract_sfmt_smul; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 11 : + if ((entire_insn & 0x1fc03c0) == 0x2c0) + { itype = FRVBF_INSN_UMULCC; goto extract_sfmt_smulcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 12 : + if ((entire_insn & 0x7ffc03c0) == 0x300) + { itype = FRVBF_INSN_CMPB; goto extract_sfmt_cmpb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 13 : + if ((entire_insn & 0x7ffc03c0) == 0x340) + { itype = FRVBF_INSN_CMPBA; goto extract_sfmt_cmpb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : + if ((entire_insn & 0x1fc0fc0) == 0x380) + { itype = FRVBF_INSN_SDIV; goto extract_sfmt_sdiv; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 15 : + if ((entire_insn & 0x1fc0fc0) == 0x3c0) + { itype = FRVBF_INSN_UDIV; goto extract_sfmt_sdiv; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -897,21 +945,66 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_AND; goto extract_sfmt_add; - case 1 : itype = FRVBF_INSN_ANDCC; goto extract_sfmt_andcc; - case 2 : itype = FRVBF_INSN_OR; goto extract_sfmt_add; - case 3 : itype = FRVBF_INSN_ORCC; goto extract_sfmt_andcc; - case 4 : itype = FRVBF_INSN_XOR; goto extract_sfmt_add; - case 5 : itype = FRVBF_INSN_XORCC; goto extract_sfmt_andcc; - case 6 : itype = FRVBF_INSN_NOT; goto extract_sfmt_not; - case 8 : itype = FRVBF_INSN_SLL; goto extract_sfmt_add; - case 9 : itype = FRVBF_INSN_SLLCC; goto extract_sfmt_addcc; - case 10 : itype = FRVBF_INSN_SRL; goto extract_sfmt_add; - case 11 : itype = FRVBF_INSN_SRLCC; goto extract_sfmt_addcc; - case 12 : itype = FRVBF_INSN_SRA; goto extract_sfmt_add; - case 13 : itype = FRVBF_INSN_SRACC; goto extract_sfmt_addcc; - case 14 : itype = FRVBF_INSN_NSDIV; goto extract_sfmt_sdiv; - case 15 : itype = FRVBF_INSN_NUDIV; goto extract_sfmt_sdiv; + case 0 : + if ((entire_insn & 0x1fc0fc0) == 0x40000) + { itype = FRVBF_INSN_AND; goto extract_sfmt_add; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc03c0) == 0x40040) + { itype = FRVBF_INSN_ANDCC; goto extract_sfmt_andcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc0fc0) == 0x40080) + { itype = FRVBF_INSN_OR; goto extract_sfmt_add; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc03c0) == 0x400c0) + { itype = FRVBF_INSN_ORCC; goto extract_sfmt_andcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 4 : + if ((entire_insn & 0x1fc0fc0) == 0x40100) + { itype = FRVBF_INSN_XOR; goto extract_sfmt_add; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 5 : + if ((entire_insn & 0x1fc03c0) == 0x40140) + { itype = FRVBF_INSN_XORCC; goto extract_sfmt_andcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 6 : + if ((entire_insn & 0x1ffffc0) == 0x40180) + { itype = FRVBF_INSN_NOT; goto extract_sfmt_not; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 8 : + if ((entire_insn & 0x1fc0fc0) == 0x40200) + { itype = FRVBF_INSN_SLL; goto extract_sfmt_add; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 9 : + if ((entire_insn & 0x1fc03c0) == 0x40240) + { itype = FRVBF_INSN_SLLCC; goto extract_sfmt_addcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 10 : + if ((entire_insn & 0x1fc0fc0) == 0x40280) + { itype = FRVBF_INSN_SRL; goto extract_sfmt_add; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 11 : + if ((entire_insn & 0x1fc03c0) == 0x402c0) + { itype = FRVBF_INSN_SRLCC; goto extract_sfmt_addcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 12 : + if ((entire_insn & 0x1fc0fc0) == 0x40300) + { itype = FRVBF_INSN_SRA; goto extract_sfmt_add; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 13 : + if ((entire_insn & 0x1fc03c0) == 0x40340) + { itype = FRVBF_INSN_SRACC; goto extract_sfmt_addcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : + if ((entire_insn & 0x1fc0fc0) == 0x40380) + { itype = FRVBF_INSN_NSDIV; goto extract_sfmt_sdiv; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 15 : + if ((entire_insn & 0x1fc0fc0) == 0x403c0) + { itype = FRVBF_INSN_NUDIV; goto extract_sfmt_sdiv; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -920,60 +1013,222 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (63 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_LDSB; goto extract_sfmt_ldsb; - case 1 : itype = FRVBF_INSN_LDUB; goto extract_sfmt_ldsb; - case 2 : itype = FRVBF_INSN_LDSH; goto extract_sfmt_ldsb; - case 3 : itype = FRVBF_INSN_LDUH; goto extract_sfmt_ldsb; - case 4 : itype = FRVBF_INSN_LD; goto extract_sfmt_ldsb; - case 5 : itype = FRVBF_INSN_LDD; goto extract_sfmt_ldd; - case 6 : itype = FRVBF_INSN_LDQ; goto extract_sfmt_ldq; - case 8 : itype = FRVBF_INSN_LDBF; goto extract_sfmt_ldbf; - case 9 : itype = FRVBF_INSN_LDHF; goto extract_sfmt_ldbf; - case 10 : itype = FRVBF_INSN_LDF; goto extract_sfmt_ldbf; - case 11 : itype = FRVBF_INSN_LDDF; goto extract_sfmt_lddf; - case 12 : itype = FRVBF_INSN_LDQF; goto extract_sfmt_ldqf; - case 13 : itype = FRVBF_INSN_LDC; goto extract_sfmt_ldc; - case 14 : itype = FRVBF_INSN_LDDC; goto extract_sfmt_lddc; - case 15 : itype = FRVBF_INSN_LDQC; goto extract_sfmt_ldqc; - case 16 : itype = FRVBF_INSN_LDSBU; goto extract_sfmt_ldsbu; - case 17 : itype = FRVBF_INSN_LDUBU; goto extract_sfmt_ldsbu; - case 18 : itype = FRVBF_INSN_LDSHU; goto extract_sfmt_ldsbu; - case 19 : itype = FRVBF_INSN_LDUHU; goto extract_sfmt_ldsbu; - case 20 : itype = FRVBF_INSN_LDU; goto extract_sfmt_ldsbu; - case 21 : itype = FRVBF_INSN_LDDU; goto extract_sfmt_lddu; - case 22 : itype = FRVBF_INSN_LDQU; goto extract_sfmt_ldqu; - case 24 : itype = FRVBF_INSN_LDBFU; goto extract_sfmt_ldbfu; - case 25 : itype = FRVBF_INSN_LDHFU; goto extract_sfmt_ldbfu; - case 26 : itype = FRVBF_INSN_LDFU; goto extract_sfmt_ldbfu; - case 27 : itype = FRVBF_INSN_LDDFU; goto extract_sfmt_lddfu; - case 28 : itype = FRVBF_INSN_LDQFU; goto extract_sfmt_ldqfu; - case 29 : itype = FRVBF_INSN_LDCU; goto extract_sfmt_ldcu; - case 30 : itype = FRVBF_INSN_LDDCU; goto extract_sfmt_lddcu; - case 31 : itype = FRVBF_INSN_LDQCU; goto extract_sfmt_ldqcu; - case 32 : itype = FRVBF_INSN_NLDSB; goto extract_sfmt_nldsb; - case 33 : itype = FRVBF_INSN_NLDUB; goto extract_sfmt_nldsb; - case 34 : itype = FRVBF_INSN_NLDSH; goto extract_sfmt_nldsb; - case 35 : itype = FRVBF_INSN_NLDUH; goto extract_sfmt_nldsb; - case 36 : itype = FRVBF_INSN_NLD; goto extract_sfmt_nldsb; - case 37 : itype = FRVBF_INSN_NLDD; goto extract_sfmt_nldd; - case 38 : itype = FRVBF_INSN_NLDQ; goto extract_sfmt_nldq; - case 40 : itype = FRVBF_INSN_NLDBF; goto extract_sfmt_nldbf; - case 41 : itype = FRVBF_INSN_NLDHF; goto extract_sfmt_nldbf; - case 42 : itype = FRVBF_INSN_NLDF; goto extract_sfmt_nldbf; - case 43 : itype = FRVBF_INSN_NLDDF; goto extract_sfmt_nlddf; - case 44 : itype = FRVBF_INSN_NLDQF; goto extract_sfmt_nldqf; - case 48 : itype = FRVBF_INSN_NLDSBU; goto extract_sfmt_nldsbu; - case 49 : itype = FRVBF_INSN_NLDUBU; goto extract_sfmt_nldsbu; - case 50 : itype = FRVBF_INSN_NLDSHU; goto extract_sfmt_nldsbu; - case 51 : itype = FRVBF_INSN_NLDUHU; goto extract_sfmt_nldsbu; - case 52 : itype = FRVBF_INSN_NLDU; goto extract_sfmt_nldsbu; - case 53 : itype = FRVBF_INSN_NLDDU; goto extract_sfmt_nlddu; - case 54 : itype = FRVBF_INSN_NLDQU; goto extract_sfmt_nldqu; - case 56 : itype = FRVBF_INSN_NLDBFU; goto extract_sfmt_nldbfu; - case 57 : itype = FRVBF_INSN_NLDHFU; goto extract_sfmt_nldbfu; - case 58 : itype = FRVBF_INSN_NLDFU; goto extract_sfmt_nldbfu; - case 59 : itype = FRVBF_INSN_NLDDFU; goto extract_sfmt_nlddfu; - case 60 : itype = FRVBF_INSN_NLDQFU; goto extract_sfmt_nldqfu; + case 0 : + if ((entire_insn & 0x1fc0fc0) == 0x80000) + { itype = FRVBF_INSN_LDSB; goto extract_sfmt_ldsb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc0fc0) == 0x80040) + { itype = FRVBF_INSN_LDUB; goto extract_sfmt_ldsb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc0fc0) == 0x80080) + { itype = FRVBF_INSN_LDSH; goto extract_sfmt_ldsb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc0fc0) == 0x800c0) + { itype = FRVBF_INSN_LDUH; goto extract_sfmt_ldsb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 4 : + if ((entire_insn & 0x1fc0fc0) == 0x80100) + { itype = FRVBF_INSN_LD; goto extract_sfmt_ldsb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 5 : + if ((entire_insn & 0x1fc0fc0) == 0x80140) + { itype = FRVBF_INSN_LDD; goto extract_sfmt_ldd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 6 : + if ((entire_insn & 0x1fc0fc0) == 0x80180) + { itype = FRVBF_INSN_LDQ; goto extract_sfmt_ldq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 8 : + if ((entire_insn & 0x1fc0fc0) == 0x80200) + { itype = FRVBF_INSN_LDBF; goto extract_sfmt_ldbf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 9 : + if ((entire_insn & 0x1fc0fc0) == 0x80240) + { itype = FRVBF_INSN_LDHF; goto extract_sfmt_ldbf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 10 : + if ((entire_insn & 0x1fc0fc0) == 0x80280) + { itype = FRVBF_INSN_LDF; goto extract_sfmt_ldbf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 11 : + if ((entire_insn & 0x1fc0fc0) == 0x802c0) + { itype = FRVBF_INSN_LDDF; goto extract_sfmt_lddf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 12 : + if ((entire_insn & 0x1fc0fc0) == 0x80300) + { itype = FRVBF_INSN_LDQF; goto extract_sfmt_ldqf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 13 : + if ((entire_insn & 0x1fc0fc0) == 0x80340) + { itype = FRVBF_INSN_LDC; goto extract_sfmt_ldc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : + if ((entire_insn & 0x1fc0fc0) == 0x80380) + { itype = FRVBF_INSN_LDDC; goto extract_sfmt_lddc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 15 : + if ((entire_insn & 0x1fc0fc0) == 0x803c0) + { itype = FRVBF_INSN_LDQC; goto extract_sfmt_ldqc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 16 : + if ((entire_insn & 0x1fc0fc0) == 0x80400) + { itype = FRVBF_INSN_LDSBU; goto extract_sfmt_ldsbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 17 : + if ((entire_insn & 0x1fc0fc0) == 0x80440) + { itype = FRVBF_INSN_LDUBU; goto extract_sfmt_ldsbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 18 : + if ((entire_insn & 0x1fc0fc0) == 0x80480) + { itype = FRVBF_INSN_LDSHU; goto extract_sfmt_ldsbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 19 : + if ((entire_insn & 0x1fc0fc0) == 0x804c0) + { itype = FRVBF_INSN_LDUHU; goto extract_sfmt_ldsbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 20 : + if ((entire_insn & 0x1fc0fc0) == 0x80500) + { itype = FRVBF_INSN_LDU; goto extract_sfmt_ldsbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 21 : + if ((entire_insn & 0x1fc0fc0) == 0x80540) + { itype = FRVBF_INSN_LDDU; goto extract_sfmt_lddu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 22 : + if ((entire_insn & 0x1fc0fc0) == 0x80580) + { itype = FRVBF_INSN_LDQU; goto extract_sfmt_ldqu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 24 : + if ((entire_insn & 0x1fc0fc0) == 0x80600) + { itype = FRVBF_INSN_LDBFU; goto extract_sfmt_ldbfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 25 : + if ((entire_insn & 0x1fc0fc0) == 0x80640) + { itype = FRVBF_INSN_LDHFU; goto extract_sfmt_ldbfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 26 : + if ((entire_insn & 0x1fc0fc0) == 0x80680) + { itype = FRVBF_INSN_LDFU; goto extract_sfmt_ldbfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 27 : + if ((entire_insn & 0x1fc0fc0) == 0x806c0) + { itype = FRVBF_INSN_LDDFU; goto extract_sfmt_lddfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 28 : + if ((entire_insn & 0x1fc0fc0) == 0x80700) + { itype = FRVBF_INSN_LDQFU; goto extract_sfmt_ldqfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 29 : + if ((entire_insn & 0x1fc0fc0) == 0x80740) + { itype = FRVBF_INSN_LDCU; goto extract_sfmt_ldcu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 30 : + if ((entire_insn & 0x1fc0fc0) == 0x80780) + { itype = FRVBF_INSN_LDDCU; goto extract_sfmt_lddcu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 31 : + if ((entire_insn & 0x1fc0fc0) == 0x807c0) + { itype = FRVBF_INSN_LDQCU; goto extract_sfmt_ldqcu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 32 : + if ((entire_insn & 0x1fc0fc0) == 0x80800) + { itype = FRVBF_INSN_NLDSB; goto extract_sfmt_nldsb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 33 : + if ((entire_insn & 0x1fc0fc0) == 0x80840) + { itype = FRVBF_INSN_NLDUB; goto extract_sfmt_nldsb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 34 : + if ((entire_insn & 0x1fc0fc0) == 0x80880) + { itype = FRVBF_INSN_NLDSH; goto extract_sfmt_nldsb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 35 : + if ((entire_insn & 0x1fc0fc0) == 0x808c0) + { itype = FRVBF_INSN_NLDUH; goto extract_sfmt_nldsb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 36 : + if ((entire_insn & 0x1fc0fc0) == 0x80900) + { itype = FRVBF_INSN_NLD; goto extract_sfmt_nldsb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 37 : + if ((entire_insn & 0x1fc0fc0) == 0x80940) + { itype = FRVBF_INSN_NLDD; goto extract_sfmt_nldd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 38 : + if ((entire_insn & 0x1fc0fc0) == 0x80980) + { itype = FRVBF_INSN_NLDQ; goto extract_sfmt_nldq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 40 : + if ((entire_insn & 0x1fc0fc0) == 0x80a00) + { itype = FRVBF_INSN_NLDBF; goto extract_sfmt_nldbf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 41 : + if ((entire_insn & 0x1fc0fc0) == 0x80a40) + { itype = FRVBF_INSN_NLDHF; goto extract_sfmt_nldbf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 42 : + if ((entire_insn & 0x1fc0fc0) == 0x80a80) + { itype = FRVBF_INSN_NLDF; goto extract_sfmt_nldbf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 43 : + if ((entire_insn & 0x1fc0fc0) == 0x80ac0) + { itype = FRVBF_INSN_NLDDF; goto extract_sfmt_nlddf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 44 : + if ((entire_insn & 0x1fc0fc0) == 0x80b00) + { itype = FRVBF_INSN_NLDQF; goto extract_sfmt_nldqf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 48 : + if ((entire_insn & 0x1fc0fc0) == 0x80c00) + { itype = FRVBF_INSN_NLDSBU; goto extract_sfmt_nldsbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 49 : + if ((entire_insn & 0x1fc0fc0) == 0x80c40) + { itype = FRVBF_INSN_NLDUBU; goto extract_sfmt_nldsbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 50 : + if ((entire_insn & 0x1fc0fc0) == 0x80c80) + { itype = FRVBF_INSN_NLDSHU; goto extract_sfmt_nldsbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 51 : + if ((entire_insn & 0x1fc0fc0) == 0x80cc0) + { itype = FRVBF_INSN_NLDUHU; goto extract_sfmt_nldsbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 52 : + if ((entire_insn & 0x1fc0fc0) == 0x80d00) + { itype = FRVBF_INSN_NLDU; goto extract_sfmt_nldsbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 53 : + if ((entire_insn & 0x1fc0fc0) == 0x80d40) + { itype = FRVBF_INSN_NLDDU; goto extract_sfmt_nlddu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 54 : + if ((entire_insn & 0x1fc0fc0) == 0x80d80) + { itype = FRVBF_INSN_NLDQU; goto extract_sfmt_nldqu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 56 : + if ((entire_insn & 0x1fc0fc0) == 0x80e00) + { itype = FRVBF_INSN_NLDBFU; goto extract_sfmt_nldbfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 57 : + if ((entire_insn & 0x1fc0fc0) == 0x80e40) + { itype = FRVBF_INSN_NLDHFU; goto extract_sfmt_nldbfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 58 : + if ((entire_insn & 0x1fc0fc0) == 0x80e80) + { itype = FRVBF_INSN_NLDFU; goto extract_sfmt_nldbfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 59 : + if ((entire_insn & 0x1fc0fc0) == 0x80ec0) + { itype = FRVBF_INSN_NLDDFU; goto extract_sfmt_nlddfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 60 : + if ((entire_insn & 0x1fc0fc0) == 0x80f00) + { itype = FRVBF_INSN_NLDQFU; goto extract_sfmt_nldqfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -982,60 +1237,222 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (63 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_STB; goto extract_sfmt_stb; - case 1 : itype = FRVBF_INSN_STH; goto extract_sfmt_stb; - case 2 : itype = FRVBF_INSN_ST; goto extract_sfmt_stb; - case 3 : itype = FRVBF_INSN_STD; goto extract_sfmt_std; - case 4 : itype = FRVBF_INSN_STQ; goto extract_sfmt_ldq; - case 5 : itype = FRVBF_INSN_SWAP; goto extract_sfmt_swap; - case 6 : itype = FRVBF_INSN_MOVGS; goto extract_sfmt_movgs; - case 7 : itype = FRVBF_INSN_MOVSG; goto extract_sfmt_movsg; - case 8 : itype = FRVBF_INSN_STBF; goto extract_sfmt_stbf; - case 9 : itype = FRVBF_INSN_STHF; goto extract_sfmt_stbf; - case 10 : itype = FRVBF_INSN_STF; goto extract_sfmt_stbf; - case 11 : itype = FRVBF_INSN_STDF; goto extract_sfmt_stdf; - case 12 : itype = FRVBF_INSN_STQF; goto extract_sfmt_ldqf; - case 13 : itype = FRVBF_INSN_MOVFG; goto extract_sfmt_movfg; - case 14 : itype = FRVBF_INSN_MOVFGD; goto extract_sfmt_movfgd; - case 15 : itype = FRVBF_INSN_MOVFGQ; goto extract_sfmt_movfgq; - case 16 : itype = FRVBF_INSN_STBU; goto extract_sfmt_stbu; - case 17 : itype = FRVBF_INSN_STHU; goto extract_sfmt_stbu; - case 18 : itype = FRVBF_INSN_STU; goto extract_sfmt_stbu; - case 19 : itype = FRVBF_INSN_STDU; goto extract_sfmt_stdu; - case 20 : itype = FRVBF_INSN_STQU; goto extract_sfmt_stqu; - case 21 : itype = FRVBF_INSN_MOVGF; goto extract_sfmt_movgf; - case 22 : itype = FRVBF_INSN_MOVGFD; goto extract_sfmt_movgfd; - case 23 : itype = FRVBF_INSN_MOVGFQ; goto extract_sfmt_movgfq; - case 24 : itype = FRVBF_INSN_STBFU; goto extract_sfmt_stbfu; - case 25 : itype = FRVBF_INSN_STHFU; goto extract_sfmt_stbfu; - case 26 : itype = FRVBF_INSN_STFU; goto extract_sfmt_stbfu; - case 27 : itype = FRVBF_INSN_STDFU; goto extract_sfmt_stdfu; - case 28 : itype = FRVBF_INSN_STQFU; goto extract_sfmt_ldqfu; - case 32 : itype = FRVBF_INSN_LRAI; goto extract_sfmt_rei; - case 33 : itype = FRVBF_INSN_LRAD; goto extract_sfmt_rei; - case 36 : itype = FRVBF_INSN_TLBPR; goto extract_sfmt_rei; - case 37 : itype = FRVBF_INSN_STC; goto extract_sfmt_stc; - case 38 : itype = FRVBF_INSN_STDC; goto extract_sfmt_stdc; - case 39 : itype = FRVBF_INSN_STQC; goto extract_sfmt_ldqc; - case 45 : itype = FRVBF_INSN_STCU; goto extract_sfmt_stcu; - case 46 : itype = FRVBF_INSN_STDCU; goto extract_sfmt_stdcu; - case 47 : itype = FRVBF_INSN_STQCU; goto extract_sfmt_ldqcu; - case 48 : itype = FRVBF_INSN_ICPL; goto extract_sfmt_icpl; - case 49 : itype = FRVBF_INSN_ICUL; goto extract_sfmt_icul; - case 50 : itype = FRVBF_INSN_WITLB; goto extract_sfmt_rei; - case 51 : itype = FRVBF_INSN_ITLBI; goto extract_sfmt_rei; - case 52 : itype = FRVBF_INSN_DCPL; goto extract_sfmt_icpl; - case 53 : itype = FRVBF_INSN_DCUL; goto extract_sfmt_icul; - case 54 : itype = FRVBF_INSN_WDTLB; goto extract_sfmt_rei; - case 55 : itype = FRVBF_INSN_DTLBI; goto extract_sfmt_rei; - case 56 : itype = FRVBF_INSN_ICI; goto extract_sfmt_ici; - case 57 : itype = FRVBF_INSN_ICEI; goto extract_sfmt_icei; - case 58 : itype = FRVBF_INSN_DCEI; goto extract_sfmt_icei; - case 59 : itype = FRVBF_INSN_DCEF; goto extract_sfmt_icei; - case 60 : itype = FRVBF_INSN_DCI; goto extract_sfmt_ici; - case 61 : itype = FRVBF_INSN_DCF; goto extract_sfmt_ici; - case 62 : itype = FRVBF_INSN_BAR; goto extract_sfmt_rei; - case 63 : itype = FRVBF_INSN_MEMBAR; goto extract_sfmt_rei; + case 0 : + if ((entire_insn & 0x1fc0fc0) == 0xc0000) + { itype = FRVBF_INSN_STB; goto extract_sfmt_stb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc0fc0) == 0xc0040) + { itype = FRVBF_INSN_STH; goto extract_sfmt_stb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc0fc0) == 0xc0080) + { itype = FRVBF_INSN_ST; goto extract_sfmt_stb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc0fc0) == 0xc00c0) + { itype = FRVBF_INSN_STD; goto extract_sfmt_std; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 4 : + if ((entire_insn & 0x1fc0fc0) == 0xc0100) + { itype = FRVBF_INSN_STQ; goto extract_sfmt_ldq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 5 : + if ((entire_insn & 0x1fc0fc0) == 0xc0140) + { itype = FRVBF_INSN_SWAP; goto extract_sfmt_swap; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 6 : + if ((entire_insn & 0x1fc0fc0) == 0xc0180) + { itype = FRVBF_INSN_MOVGS; goto extract_sfmt_movgs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 7 : + if ((entire_insn & 0x1fc0fc0) == 0xc01c0) + { itype = FRVBF_INSN_MOVSG; goto extract_sfmt_movsg; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 8 : + if ((entire_insn & 0x1fc0fc0) == 0xc0200) + { itype = FRVBF_INSN_STBF; goto extract_sfmt_stbf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 9 : + if ((entire_insn & 0x1fc0fc0) == 0xc0240) + { itype = FRVBF_INSN_STHF; goto extract_sfmt_stbf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 10 : + if ((entire_insn & 0x1fc0fc0) == 0xc0280) + { itype = FRVBF_INSN_STF; goto extract_sfmt_stbf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 11 : + if ((entire_insn & 0x1fc0fc0) == 0xc02c0) + { itype = FRVBF_INSN_STDF; goto extract_sfmt_stdf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 12 : + if ((entire_insn & 0x1fc0fc0) == 0xc0300) + { itype = FRVBF_INSN_STQF; goto extract_sfmt_ldqf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 13 : + if ((entire_insn & 0x1ffffc0) == 0xc0340) + { itype = FRVBF_INSN_MOVFG; goto extract_sfmt_movfg; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : + if ((entire_insn & 0x1ffffc0) == 0xc0380) + { itype = FRVBF_INSN_MOVFGD; goto extract_sfmt_movfgd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 15 : + if ((entire_insn & 0x1ffffc0) == 0xc03c0) + { itype = FRVBF_INSN_MOVFGQ; goto extract_sfmt_movfgq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 16 : + if ((entire_insn & 0x1fc0fc0) == 0xc0400) + { itype = FRVBF_INSN_STBU; goto extract_sfmt_stbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 17 : + if ((entire_insn & 0x1fc0fc0) == 0xc0440) + { itype = FRVBF_INSN_STHU; goto extract_sfmt_stbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 18 : + if ((entire_insn & 0x1fc0fc0) == 0xc0480) + { itype = FRVBF_INSN_STU; goto extract_sfmt_stbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 19 : + if ((entire_insn & 0x1fc0fc0) == 0xc04c0) + { itype = FRVBF_INSN_STDU; goto extract_sfmt_stdu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 20 : + if ((entire_insn & 0x1fc0fc0) == 0xc0500) + { itype = FRVBF_INSN_STQU; goto extract_sfmt_stqu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 21 : + if ((entire_insn & 0x1ffffc0) == 0xc0540) + { itype = FRVBF_INSN_MOVGF; goto extract_sfmt_movgf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 22 : + if ((entire_insn & 0x1ffffc0) == 0xc0580) + { itype = FRVBF_INSN_MOVGFD; goto extract_sfmt_movgfd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 23 : + if ((entire_insn & 0x1ffffc0) == 0xc05c0) + { itype = FRVBF_INSN_MOVGFQ; goto extract_sfmt_movgfq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 24 : + if ((entire_insn & 0x1fc0fc0) == 0xc0600) + { itype = FRVBF_INSN_STBFU; goto extract_sfmt_stbfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 25 : + if ((entire_insn & 0x1fc0fc0) == 0xc0640) + { itype = FRVBF_INSN_STHFU; goto extract_sfmt_stbfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 26 : + if ((entire_insn & 0x1fc0fc0) == 0xc0680) + { itype = FRVBF_INSN_STFU; goto extract_sfmt_stbfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 27 : + if ((entire_insn & 0x1fc0fc0) == 0xc06c0) + { itype = FRVBF_INSN_STDFU; goto extract_sfmt_stdfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 28 : + if ((entire_insn & 0x1fc0fc0) == 0xc0700) + { itype = FRVBF_INSN_STQFU; goto extract_sfmt_ldqfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 32 : + if ((entire_insn & 0x1fc0fc7) == 0xc0800) + { itype = FRVBF_INSN_LRAI; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 33 : + if ((entire_insn & 0x1fc0fc7) == 0xc0840) + { itype = FRVBF_INSN_LRAD; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 36 : + if ((entire_insn & 0x61fc0fc0) == 0xc0900) + { itype = FRVBF_INSN_TLBPR; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 37 : + if ((entire_insn & 0x1fc0fc0) == 0xc0940) + { itype = FRVBF_INSN_STC; goto extract_sfmt_stc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 38 : + if ((entire_insn & 0x1fc0fc0) == 0xc0980) + { itype = FRVBF_INSN_STDC; goto extract_sfmt_stdc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 39 : + if ((entire_insn & 0x1fc0fc0) == 0xc09c0) + { itype = FRVBF_INSN_STQC; goto extract_sfmt_ldqc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 45 : + if ((entire_insn & 0x1fc0fc0) == 0xc0b40) + { itype = FRVBF_INSN_STCU; goto extract_sfmt_stcu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 46 : + if ((entire_insn & 0x1fc0fc0) == 0xc0b80) + { itype = FRVBF_INSN_STDCU; goto extract_sfmt_stdcu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 47 : + if ((entire_insn & 0x1fc0fc0) == 0xc0bc0) + { itype = FRVBF_INSN_STQCU; goto extract_sfmt_ldqcu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 48 : + if ((entire_insn & 0x7dfc0fc0) == 0xc0c00) + { itype = FRVBF_INSN_ICPL; goto extract_sfmt_icpl; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 49 : + if ((entire_insn & 0x7ffc0fff) == 0xc0c40) + { itype = FRVBF_INSN_ICUL; goto extract_sfmt_icul; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 50 : + if ((entire_insn & 0x1fc0fc0) == 0xc0c80) + { itype = FRVBF_INSN_WITLB; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 51 : + if ((entire_insn & 0x7ffc0fc0) == 0xc0cc0) + { itype = FRVBF_INSN_ITLBI; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 52 : + if ((entire_insn & 0x7dfc0fc0) == 0xc0d00) + { itype = FRVBF_INSN_DCPL; goto extract_sfmt_icpl; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 53 : + if ((entire_insn & 0x7ffc0fff) == 0xc0d40) + { itype = FRVBF_INSN_DCUL; goto extract_sfmt_icul; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 54 : + if ((entire_insn & 0x1fc0fc0) == 0xc0d80) + { itype = FRVBF_INSN_WDTLB; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 55 : + if ((entire_insn & 0x7ffc0fc0) == 0xc0dc0) + { itype = FRVBF_INSN_DTLBI; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 56 : + if ((entire_insn & 0x7ffc0fc0) == 0xc0e00) + { itype = FRVBF_INSN_ICI; goto extract_sfmt_ici; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 57 : + if ((entire_insn & 0x7dfc0fc0) == 0xc0e40) + { itype = FRVBF_INSN_ICEI; goto extract_sfmt_icei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 58 : + if ((entire_insn & 0x7dfc0fc0) == 0xc0e80) + { itype = FRVBF_INSN_DCEI; goto extract_sfmt_icei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 59 : + if ((entire_insn & 0x7dfc0fc0) == 0xc0ec0) + { itype = FRVBF_INSN_DCEF; goto extract_sfmt_icei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 60 : + if ((entire_insn & 0x7ffc0fc0) == 0xc0f00) + { itype = FRVBF_INSN_DCI; goto extract_sfmt_ici; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 61 : + if ((entire_insn & 0x7ffc0fc0) == 0xc0f40) + { itype = FRVBF_INSN_DCF; goto extract_sfmt_ici; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 62 : + if ((entire_insn & 0x7fffffff) == 0xc0f80) + { itype = FRVBF_INSN_BAR; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 63 : + if ((entire_insn & 0x7fffffff) == 0xc0fc0) + { itype = FRVBF_INSN_MEMBAR; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1044,65 +1461,218 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 25) & (15 << 2)) | ((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_TNO; goto extract_sfmt_rei; - case 1 : itype = FRVBF_INSN_FTNO; goto extract_sfmt_rei; - case 2 : itype = FRVBF_INSN_MTRAP; goto extract_sfmt_rei; - case 3 : itype = FRVBF_INSN_BREAK; goto extract_sfmt_break; - case 4 : itype = FRVBF_INSN_TC; goto extract_sfmt_teq; - case 5 : itype = FRVBF_INSN_FTU; goto extract_sfmt_ftne; - case 8 : itype = FRVBF_INSN_TV; goto extract_sfmt_teq; - case 9 : itype = FRVBF_INSN_FTGT; goto extract_sfmt_ftne; - case 12 : itype = FRVBF_INSN_TLT; goto extract_sfmt_teq; - case 13 : itype = FRVBF_INSN_FTUG; goto extract_sfmt_ftne; - case 16 : itype = FRVBF_INSN_TEQ; goto extract_sfmt_teq; - case 17 : itype = FRVBF_INSN_FTLT; goto extract_sfmt_ftne; - case 20 : itype = FRVBF_INSN_TLS; goto extract_sfmt_teq; - case 21 : itype = FRVBF_INSN_FTUL; goto extract_sfmt_ftne; - case 24 : itype = FRVBF_INSN_TN; goto extract_sfmt_teq; - case 25 : itype = FRVBF_INSN_FTLG; goto extract_sfmt_ftne; - case 28 : itype = FRVBF_INSN_TLE; goto extract_sfmt_teq; - case 29 : itype = FRVBF_INSN_FTNE; goto extract_sfmt_ftne; - case 32 : itype = FRVBF_INSN_TRA; goto extract_sfmt_tra; - case 33 : itype = FRVBF_INSN_FTEQ; goto extract_sfmt_ftne; - case 36 : itype = FRVBF_INSN_TNC; goto extract_sfmt_teq; - case 37 : itype = FRVBF_INSN_FTUE; goto extract_sfmt_ftne; - case 40 : itype = FRVBF_INSN_TNV; goto extract_sfmt_teq; - case 41 : itype = FRVBF_INSN_FTGE; goto extract_sfmt_ftne; - case 44 : itype = FRVBF_INSN_TGE; goto extract_sfmt_teq; - case 45 : itype = FRVBF_INSN_FTUGE; goto extract_sfmt_ftne; - case 48 : itype = FRVBF_INSN_TNE; goto extract_sfmt_teq; - case 49 : itype = FRVBF_INSN_FTLE; goto extract_sfmt_ftne; - case 52 : itype = FRVBF_INSN_THI; goto extract_sfmt_teq; - case 53 : itype = FRVBF_INSN_FTULE; goto extract_sfmt_ftne; - case 56 : itype = FRVBF_INSN_TP; goto extract_sfmt_teq; - case 57 : itype = FRVBF_INSN_FTO; goto extract_sfmt_ftne; - case 60 : itype = FRVBF_INSN_TGT; goto extract_sfmt_teq; - case 61 : itype = FRVBF_INSN_FTRA; goto extract_sfmt_tra; + case 0 : + if ((entire_insn & 0x7fffffff) == 0x100000) + { itype = FRVBF_INSN_TNO; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x7fffffff) == 0x100040) + { itype = FRVBF_INSN_FTNO; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x7fffffff) == 0x100080) + { itype = FRVBF_INSN_MTRAP; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x7fffffff) == 0x1000c0) + { itype = FRVBF_INSN_BREAK; goto extract_sfmt_break; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 4 : + if ((entire_insn & 0x79fc0fc0) == 0x8100000) + { itype = FRVBF_INSN_TC; goto extract_sfmt_teq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 5 : + if ((entire_insn & 0x79fc0fc0) == 0x8100040) + { itype = FRVBF_INSN_FTU; goto extract_sfmt_ftne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 8 : + if ((entire_insn & 0x79fc0fc0) == 0x10100000) + { itype = FRVBF_INSN_TV; goto extract_sfmt_teq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 9 : + if ((entire_insn & 0x79fc0fc0) == 0x10100040) + { itype = FRVBF_INSN_FTGT; goto extract_sfmt_ftne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 12 : + if ((entire_insn & 0x79fc0fc0) == 0x18100000) + { itype = FRVBF_INSN_TLT; goto extract_sfmt_teq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 13 : + if ((entire_insn & 0x79fc0fc0) == 0x18100040) + { itype = FRVBF_INSN_FTUG; goto extract_sfmt_ftne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 16 : + if ((entire_insn & 0x79fc0fc0) == 0x20100000) + { itype = FRVBF_INSN_TEQ; goto extract_sfmt_teq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 17 : + if ((entire_insn & 0x79fc0fc0) == 0x20100040) + { itype = FRVBF_INSN_FTLT; goto extract_sfmt_ftne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 20 : + if ((entire_insn & 0x79fc0fc0) == 0x28100000) + { itype = FRVBF_INSN_TLS; goto extract_sfmt_teq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 21 : + if ((entire_insn & 0x79fc0fc0) == 0x28100040) + { itype = FRVBF_INSN_FTUL; goto extract_sfmt_ftne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 24 : + if ((entire_insn & 0x79fc0fc0) == 0x30100000) + { itype = FRVBF_INSN_TN; goto extract_sfmt_teq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 25 : + if ((entire_insn & 0x79fc0fc0) == 0x30100040) + { itype = FRVBF_INSN_FTLG; goto extract_sfmt_ftne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 28 : + if ((entire_insn & 0x79fc0fc0) == 0x38100000) + { itype = FRVBF_INSN_TLE; goto extract_sfmt_teq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 29 : + if ((entire_insn & 0x79fc0fc0) == 0x38100040) + { itype = FRVBF_INSN_FTNE; goto extract_sfmt_ftne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 32 : + if ((entire_insn & 0x7ffc0fc0) == 0x40100000) + { itype = FRVBF_INSN_TRA; goto extract_sfmt_tra; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 33 : + if ((entire_insn & 0x79fc0fc0) == 0x40100040) + { itype = FRVBF_INSN_FTEQ; goto extract_sfmt_ftne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 36 : + if ((entire_insn & 0x79fc0fc0) == 0x48100000) + { itype = FRVBF_INSN_TNC; goto extract_sfmt_teq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 37 : + if ((entire_insn & 0x79fc0fc0) == 0x48100040) + { itype = FRVBF_INSN_FTUE; goto extract_sfmt_ftne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 40 : + if ((entire_insn & 0x79fc0fc0) == 0x50100000) + { itype = FRVBF_INSN_TNV; goto extract_sfmt_teq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 41 : + if ((entire_insn & 0x79fc0fc0) == 0x50100040) + { itype = FRVBF_INSN_FTGE; goto extract_sfmt_ftne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 44 : + if ((entire_insn & 0x79fc0fc0) == 0x58100000) + { itype = FRVBF_INSN_TGE; goto extract_sfmt_teq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 45 : + if ((entire_insn & 0x79fc0fc0) == 0x58100040) + { itype = FRVBF_INSN_FTUGE; goto extract_sfmt_ftne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 48 : + if ((entire_insn & 0x79fc0fc0) == 0x60100000) + { itype = FRVBF_INSN_TNE; goto extract_sfmt_teq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 49 : + if ((entire_insn & 0x79fc0fc0) == 0x60100040) + { itype = FRVBF_INSN_FTLE; goto extract_sfmt_ftne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 52 : + if ((entire_insn & 0x79fc0fc0) == 0x68100000) + { itype = FRVBF_INSN_THI; goto extract_sfmt_teq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 53 : + if ((entire_insn & 0x79fc0fc0) == 0x68100040) + { itype = FRVBF_INSN_FTULE; goto extract_sfmt_ftne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 56 : + if ((entire_insn & 0x79fc0fc0) == 0x70100000) + { itype = FRVBF_INSN_TP; goto extract_sfmt_teq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 57 : + if ((entire_insn & 0x79fc0fc0) == 0x70100040) + { itype = FRVBF_INSN_FTO; goto extract_sfmt_ftne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 60 : + if ((entire_insn & 0x79fc0fc0) == 0x78100000) + { itype = FRVBF_INSN_TGT; goto extract_sfmt_teq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 61 : + if ((entire_insn & 0x7ffc0fc0) == 0x78100040) + { itype = FRVBF_INSN_FTRA; goto extract_sfmt_tra; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 5 : itype = FRVBF_INSN_RETT; goto extract_sfmt_rett; + case 5 : + if ((entire_insn & 0x7dffffff) == 0x140000) + { itype = FRVBF_INSN_RETT; goto extract_sfmt_rett; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; case 6 : { unsigned int val = (((insn >> 27) & (15 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_BNO; goto extract_sfmt_bno; - case 1 : itype = FRVBF_INSN_BC; goto extract_sfmt_beq; - case 2 : itype = FRVBF_INSN_BV; goto extract_sfmt_beq; - case 3 : itype = FRVBF_INSN_BLT; goto extract_sfmt_beq; - case 4 : itype = FRVBF_INSN_BEQ; goto extract_sfmt_beq; - case 5 : itype = FRVBF_INSN_BLS; goto extract_sfmt_beq; - case 6 : itype = FRVBF_INSN_BN; goto extract_sfmt_beq; - case 7 : itype = FRVBF_INSN_BLE; goto extract_sfmt_beq; - case 8 : itype = FRVBF_INSN_BRA; goto extract_sfmt_bra; - case 9 : itype = FRVBF_INSN_BNC; goto extract_sfmt_beq; - case 10 : itype = FRVBF_INSN_BNV; goto extract_sfmt_beq; - case 11 : itype = FRVBF_INSN_BGE; goto extract_sfmt_beq; - case 12 : itype = FRVBF_INSN_BNE; goto extract_sfmt_beq; - case 13 : itype = FRVBF_INSN_BHI; goto extract_sfmt_beq; - case 14 : itype = FRVBF_INSN_BP; goto extract_sfmt_beq; - case 15 : itype = FRVBF_INSN_BGT; goto extract_sfmt_beq; + case 0 : + if ((entire_insn & 0x7ffcffff) == 0x180000) + { itype = FRVBF_INSN_BNO; goto extract_sfmt_bno; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x79fc0000) == 0x8180000) + { itype = FRVBF_INSN_BC; goto extract_sfmt_beq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x79fc0000) == 0x10180000) + { itype = FRVBF_INSN_BV; goto extract_sfmt_beq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x79fc0000) == 0x18180000) + { itype = FRVBF_INSN_BLT; goto extract_sfmt_beq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 4 : + if ((entire_insn & 0x79fc0000) == 0x20180000) + { itype = FRVBF_INSN_BEQ; goto extract_sfmt_beq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 5 : + if ((entire_insn & 0x79fc0000) == 0x28180000) + { itype = FRVBF_INSN_BLS; goto extract_sfmt_beq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 6 : + if ((entire_insn & 0x79fc0000) == 0x30180000) + { itype = FRVBF_INSN_BN; goto extract_sfmt_beq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 7 : + if ((entire_insn & 0x79fc0000) == 0x38180000) + { itype = FRVBF_INSN_BLE; goto extract_sfmt_beq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 8 : + if ((entire_insn & 0x7ffc0000) == 0x40180000) + { itype = FRVBF_INSN_BRA; goto extract_sfmt_bra; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 9 : + if ((entire_insn & 0x79fc0000) == 0x48180000) + { itype = FRVBF_INSN_BNC; goto extract_sfmt_beq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 10 : + if ((entire_insn & 0x79fc0000) == 0x50180000) + { itype = FRVBF_INSN_BNV; goto extract_sfmt_beq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 11 : + if ((entire_insn & 0x79fc0000) == 0x58180000) + { itype = FRVBF_INSN_BGE; goto extract_sfmt_beq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 12 : + if ((entire_insn & 0x79fc0000) == 0x60180000) + { itype = FRVBF_INSN_BNE; goto extract_sfmt_beq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 13 : + if ((entire_insn & 0x79fc0000) == 0x68180000) + { itype = FRVBF_INSN_BHI; goto extract_sfmt_beq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : + if ((entire_insn & 0x79fc0000) == 0x70180000) + { itype = FRVBF_INSN_BP; goto extract_sfmt_beq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 15 : + if ((entire_insn & 0x79fc0000) == 0x78180000) + { itype = FRVBF_INSN_BGT; goto extract_sfmt_beq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1111,22 +1681,70 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 27) & (15 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_FBNO; goto extract_sfmt_bno; - case 1 : itype = FRVBF_INSN_FBU; goto extract_sfmt_fbne; - case 2 : itype = FRVBF_INSN_FBGT; goto extract_sfmt_fbne; - case 3 : itype = FRVBF_INSN_FBUG; goto extract_sfmt_fbne; - case 4 : itype = FRVBF_INSN_FBLT; goto extract_sfmt_fbne; - case 5 : itype = FRVBF_INSN_FBUL; goto extract_sfmt_fbne; - case 6 : itype = FRVBF_INSN_FBLG; goto extract_sfmt_fbne; - case 7 : itype = FRVBF_INSN_FBNE; goto extract_sfmt_fbne; - case 8 : itype = FRVBF_INSN_FBEQ; goto extract_sfmt_fbne; - case 9 : itype = FRVBF_INSN_FBUE; goto extract_sfmt_fbne; - case 10 : itype = FRVBF_INSN_FBGE; goto extract_sfmt_fbne; - case 11 : itype = FRVBF_INSN_FBUGE; goto extract_sfmt_fbne; - case 12 : itype = FRVBF_INSN_FBLE; goto extract_sfmt_fbne; - case 13 : itype = FRVBF_INSN_FBULE; goto extract_sfmt_fbne; - case 14 : itype = FRVBF_INSN_FBO; goto extract_sfmt_fbne; - case 15 : itype = FRVBF_INSN_FBRA; goto extract_sfmt_bra; + case 0 : + if ((entire_insn & 0x7ffcffff) == 0x1c0000) + { itype = FRVBF_INSN_FBNO; goto extract_sfmt_bno; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x79fc0000) == 0x81c0000) + { itype = FRVBF_INSN_FBU; goto extract_sfmt_fbne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x79fc0000) == 0x101c0000) + { itype = FRVBF_INSN_FBGT; goto extract_sfmt_fbne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x79fc0000) == 0x181c0000) + { itype = FRVBF_INSN_FBUG; goto extract_sfmt_fbne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 4 : + if ((entire_insn & 0x79fc0000) == 0x201c0000) + { itype = FRVBF_INSN_FBLT; goto extract_sfmt_fbne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 5 : + if ((entire_insn & 0x79fc0000) == 0x281c0000) + { itype = FRVBF_INSN_FBUL; goto extract_sfmt_fbne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 6 : + if ((entire_insn & 0x79fc0000) == 0x301c0000) + { itype = FRVBF_INSN_FBLG; goto extract_sfmt_fbne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 7 : + if ((entire_insn & 0x79fc0000) == 0x381c0000) + { itype = FRVBF_INSN_FBNE; goto extract_sfmt_fbne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 8 : + if ((entire_insn & 0x79fc0000) == 0x401c0000) + { itype = FRVBF_INSN_FBEQ; goto extract_sfmt_fbne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 9 : + if ((entire_insn & 0x79fc0000) == 0x481c0000) + { itype = FRVBF_INSN_FBUE; goto extract_sfmt_fbne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 10 : + if ((entire_insn & 0x79fc0000) == 0x501c0000) + { itype = FRVBF_INSN_FBGE; goto extract_sfmt_fbne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 11 : + if ((entire_insn & 0x79fc0000) == 0x581c0000) + { itype = FRVBF_INSN_FBUGE; goto extract_sfmt_fbne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 12 : + if ((entire_insn & 0x79fc0000) == 0x601c0000) + { itype = FRVBF_INSN_FBLE; goto extract_sfmt_fbne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 13 : + if ((entire_insn & 0x79fc0000) == 0x681c0000) + { itype = FRVBF_INSN_FBULE; goto extract_sfmt_fbne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : + if ((entire_insn & 0x79fc0000) == 0x701c0000) + { itype = FRVBF_INSN_FBO; goto extract_sfmt_fbne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 15 : + if ((entire_insn & 0x7ffc0000) == 0x781c0000) + { itype = FRVBF_INSN_FBRA; goto extract_sfmt_bra; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1135,22 +1753,70 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 27) & (15 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CKNO; goto extract_sfmt_ckra; - case 1 : itype = FRVBF_INSN_CKC; goto extract_sfmt_ckeq; - case 2 : itype = FRVBF_INSN_CKV; goto extract_sfmt_ckeq; - case 3 : itype = FRVBF_INSN_CKLT; goto extract_sfmt_ckeq; - case 4 : itype = FRVBF_INSN_CKEQ; goto extract_sfmt_ckeq; - case 5 : itype = FRVBF_INSN_CKLS; goto extract_sfmt_ckeq; - case 6 : itype = FRVBF_INSN_CKN; goto extract_sfmt_ckeq; - case 7 : itype = FRVBF_INSN_CKLE; goto extract_sfmt_ckeq; - case 8 : itype = FRVBF_INSN_CKRA; goto extract_sfmt_ckra; - case 9 : itype = FRVBF_INSN_CKNC; goto extract_sfmt_ckeq; - case 10 : itype = FRVBF_INSN_CKNV; goto extract_sfmt_ckeq; - case 11 : itype = FRVBF_INSN_CKGE; goto extract_sfmt_ckeq; - case 12 : itype = FRVBF_INSN_CKNE; goto extract_sfmt_ckeq; - case 13 : itype = FRVBF_INSN_CKHI; goto extract_sfmt_ckeq; - case 14 : itype = FRVBF_INSN_CKP; goto extract_sfmt_ckeq; - case 15 : itype = FRVBF_INSN_CKGT; goto extract_sfmt_ckeq; + case 0 : + if ((entire_insn & 0x79ffffff) == 0x200000) + { itype = FRVBF_INSN_CKNO; goto extract_sfmt_ckra; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x79fffffc) == 0x8200000) + { itype = FRVBF_INSN_CKC; goto extract_sfmt_ckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x79fffffc) == 0x10200000) + { itype = FRVBF_INSN_CKV; goto extract_sfmt_ckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x79fffffc) == 0x18200000) + { itype = FRVBF_INSN_CKLT; goto extract_sfmt_ckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 4 : + if ((entire_insn & 0x79fffffc) == 0x20200000) + { itype = FRVBF_INSN_CKEQ; goto extract_sfmt_ckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 5 : + if ((entire_insn & 0x79fffffc) == 0x28200000) + { itype = FRVBF_INSN_CKLS; goto extract_sfmt_ckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 6 : + if ((entire_insn & 0x79fffffc) == 0x30200000) + { itype = FRVBF_INSN_CKN; goto extract_sfmt_ckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 7 : + if ((entire_insn & 0x79fffffc) == 0x38200000) + { itype = FRVBF_INSN_CKLE; goto extract_sfmt_ckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 8 : + if ((entire_insn & 0x79ffffff) == 0x40200000) + { itype = FRVBF_INSN_CKRA; goto extract_sfmt_ckra; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 9 : + if ((entire_insn & 0x79fffffc) == 0x48200000) + { itype = FRVBF_INSN_CKNC; goto extract_sfmt_ckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 10 : + if ((entire_insn & 0x79fffffc) == 0x50200000) + { itype = FRVBF_INSN_CKNV; goto extract_sfmt_ckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 11 : + if ((entire_insn & 0x79fffffc) == 0x58200000) + { itype = FRVBF_INSN_CKGE; goto extract_sfmt_ckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 12 : + if ((entire_insn & 0x79fffffc) == 0x60200000) + { itype = FRVBF_INSN_CKNE; goto extract_sfmt_ckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 13 : + if ((entire_insn & 0x79fffffc) == 0x68200000) + { itype = FRVBF_INSN_CKHI; goto extract_sfmt_ckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : + if ((entire_insn & 0x79fffffc) == 0x70200000) + { itype = FRVBF_INSN_CKP; goto extract_sfmt_ckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 15 : + if ((entire_insn & 0x79fffffc) == 0x78200000) + { itype = FRVBF_INSN_CKGT; goto extract_sfmt_ckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1159,22 +1825,70 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 27) & (15 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_FCKNO; goto extract_sfmt_fckra; - case 1 : itype = FRVBF_INSN_FCKU; goto extract_sfmt_fckne; - case 2 : itype = FRVBF_INSN_FCKGT; goto extract_sfmt_fckne; - case 3 : itype = FRVBF_INSN_FCKUG; goto extract_sfmt_fckne; - case 4 : itype = FRVBF_INSN_FCKLT; goto extract_sfmt_fckne; - case 5 : itype = FRVBF_INSN_FCKUL; goto extract_sfmt_fckne; - case 6 : itype = FRVBF_INSN_FCKLG; goto extract_sfmt_fckne; - case 7 : itype = FRVBF_INSN_FCKNE; goto extract_sfmt_fckne; - case 8 : itype = FRVBF_INSN_FCKEQ; goto extract_sfmt_fckne; - case 9 : itype = FRVBF_INSN_FCKUE; goto extract_sfmt_fckne; - case 10 : itype = FRVBF_INSN_FCKGE; goto extract_sfmt_fckne; - case 11 : itype = FRVBF_INSN_FCKUGE; goto extract_sfmt_fckne; - case 12 : itype = FRVBF_INSN_FCKLE; goto extract_sfmt_fckne; - case 13 : itype = FRVBF_INSN_FCKULE; goto extract_sfmt_fckne; - case 14 : itype = FRVBF_INSN_FCKO; goto extract_sfmt_fckne; - case 15 : itype = FRVBF_INSN_FCKRA; goto extract_sfmt_fckra; + case 0 : + if ((entire_insn & 0x79fffffc) == 0x240000) + { itype = FRVBF_INSN_FCKNO; goto extract_sfmt_fckra; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x79fffffc) == 0x8240000) + { itype = FRVBF_INSN_FCKU; goto extract_sfmt_fckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x79fffffc) == 0x10240000) + { itype = FRVBF_INSN_FCKGT; goto extract_sfmt_fckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x79fffffc) == 0x18240000) + { itype = FRVBF_INSN_FCKUG; goto extract_sfmt_fckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 4 : + if ((entire_insn & 0x79fffffc) == 0x20240000) + { itype = FRVBF_INSN_FCKLT; goto extract_sfmt_fckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 5 : + if ((entire_insn & 0x79fffffc) == 0x28240000) + { itype = FRVBF_INSN_FCKUL; goto extract_sfmt_fckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 6 : + if ((entire_insn & 0x79fffffc) == 0x30240000) + { itype = FRVBF_INSN_FCKLG; goto extract_sfmt_fckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 7 : + if ((entire_insn & 0x79fffffc) == 0x38240000) + { itype = FRVBF_INSN_FCKNE; goto extract_sfmt_fckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 8 : + if ((entire_insn & 0x79fffffc) == 0x40240000) + { itype = FRVBF_INSN_FCKEQ; goto extract_sfmt_fckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 9 : + if ((entire_insn & 0x79fffffc) == 0x48240000) + { itype = FRVBF_INSN_FCKUE; goto extract_sfmt_fckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 10 : + if ((entire_insn & 0x79fffffc) == 0x50240000) + { itype = FRVBF_INSN_FCKGE; goto extract_sfmt_fckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 11 : + if ((entire_insn & 0x79fffffc) == 0x58240000) + { itype = FRVBF_INSN_FCKUGE; goto extract_sfmt_fckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 12 : + if ((entire_insn & 0x79fffffc) == 0x60240000) + { itype = FRVBF_INSN_FCKLE; goto extract_sfmt_fckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 13 : + if ((entire_insn & 0x79fffffc) == 0x68240000) + { itype = FRVBF_INSN_FCKULE; goto extract_sfmt_fckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : + if ((entire_insn & 0x79fffffc) == 0x70240000) + { itype = FRVBF_INSN_FCKO; goto extract_sfmt_fckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 15 : + if ((entire_insn & 0x79fffffc) == 0x78240000) + { itype = FRVBF_INSN_FCKRA; goto extract_sfmt_fckra; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1183,35 +1897,98 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (31 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CLRGR; goto extract_sfmt_clrgr; - case 1 : itype = FRVBF_INSN_CLRGA; goto extract_sfmt_rei; - case 2 : itype = FRVBF_INSN_CLRFR; goto extract_sfmt_clrfr; - case 3 : itype = FRVBF_INSN_CLRFA; goto extract_sfmt_rei; - case 4 : itype = FRVBF_INSN_COMMITGR; goto extract_sfmt_commitgr; - case 5 : itype = FRVBF_INSN_COMMITGA; goto extract_sfmt_rei; - case 6 : itype = FRVBF_INSN_COMMITFR; goto extract_sfmt_commitfr; - case 7 : itype = FRVBF_INSN_COMMITFA; goto extract_sfmt_rei; - case 8 : itype = FRVBF_INSN_ANDCR; goto extract_sfmt_andcr; - case 9 : itype = FRVBF_INSN_ORCR; goto extract_sfmt_andcr; - case 10 : itype = FRVBF_INSN_XORCR; goto extract_sfmt_andcr; - case 11 : itype = FRVBF_INSN_NOTCR; goto extract_sfmt_notcr; - case 12 : itype = FRVBF_INSN_NANDCR; goto extract_sfmt_andcr; - case 13 : itype = FRVBF_INSN_NORCR; goto extract_sfmt_andcr; - case 16 : itype = FRVBF_INSN_ANDNCR; goto extract_sfmt_andcr; - case 17 : itype = FRVBF_INSN_ORNCR; goto extract_sfmt_andcr; - case 20 : itype = FRVBF_INSN_NANDNCR; goto extract_sfmt_andcr; - case 21 : itype = FRVBF_INSN_NORNCR; goto extract_sfmt_andcr; + case 0 : + if ((entire_insn & 0x1ffffff) == 0x280000) + { itype = FRVBF_INSN_CLRGR; goto extract_sfmt_clrgr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x7fffffff) == 0x280040) + { itype = FRVBF_INSN_CLRGA; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1ffffff) == 0x280080) + { itype = FRVBF_INSN_CLRFR; goto extract_sfmt_clrfr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x7fffffff) == 0x2800c0) + { itype = FRVBF_INSN_CLRFA; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 4 : + if ((entire_insn & 0x1ffffff) == 0x280100) + { itype = FRVBF_INSN_COMMITGR; goto extract_sfmt_commitgr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 5 : + if ((entire_insn & 0x7fffffff) == 0x280140) + { itype = FRVBF_INSN_COMMITGA; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 6 : + if ((entire_insn & 0x1ffffff) == 0x280180) + { itype = FRVBF_INSN_COMMITFR; goto extract_sfmt_commitfr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 7 : + if ((entire_insn & 0x7fffffff) == 0x2801c0) + { itype = FRVBF_INSN_COMMITFA; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 8 : + if ((entire_insn & 0x71ff8ff8) == 0x280200) + { itype = FRVBF_INSN_ANDCR; goto extract_sfmt_andcr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 9 : + if ((entire_insn & 0x71ff8ff8) == 0x280240) + { itype = FRVBF_INSN_ORCR; goto extract_sfmt_andcr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 10 : + if ((entire_insn & 0x71ff8ff8) == 0x280280) + { itype = FRVBF_INSN_XORCR; goto extract_sfmt_andcr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 11 : + if ((entire_insn & 0x71fffff8) == 0x2802c0) + { itype = FRVBF_INSN_NOTCR; goto extract_sfmt_notcr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 12 : + if ((entire_insn & 0x71ff8ff8) == 0x280300) + { itype = FRVBF_INSN_NANDCR; goto extract_sfmt_andcr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 13 : + if ((entire_insn & 0x71ff8ff8) == 0x280340) + { itype = FRVBF_INSN_NORCR; goto extract_sfmt_andcr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 16 : + if ((entire_insn & 0x71ff8ff8) == 0x280400) + { itype = FRVBF_INSN_ANDNCR; goto extract_sfmt_andcr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 17 : + if ((entire_insn & 0x71ff8ff8) == 0x280440) + { itype = FRVBF_INSN_ORNCR; goto extract_sfmt_andcr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 20 : + if ((entire_insn & 0x71ff8ff8) == 0x280500) + { itype = FRVBF_INSN_NANDNCR; goto extract_sfmt_andcr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 21 : + if ((entire_insn & 0x71ff8ff8) == 0x280540) + { itype = FRVBF_INSN_NORNCR; goto extract_sfmt_andcr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 11 : itype = FRVBF_INSN_SCAN; goto extract_sfmt_add; + case 11 : + if ((entire_insn & 0x1fc0fc0) == 0x2c0000) + { itype = FRVBF_INSN_SCAN; goto extract_sfmt_add; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; case 12 : { unsigned int val = (((insn >> 25) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_JMPL; goto extract_sfmt_jmpl; - case 1 : itype = FRVBF_INSN_CALLL; goto extract_sfmt_jmpl; + case 0 : + if ((entire_insn & 0x7ffc0fc0) == 0x300000) + { itype = FRVBF_INSN_JMPL; goto extract_sfmt_jmpl; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x7ffc0fc0) == 0x2300000) + { itype = FRVBF_INSN_CALLL; goto extract_sfmt_jmpl; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1220,8 +1997,14 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 25) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_JMPIL; goto extract_sfmt_jmpil; - case 1 : itype = FRVBF_INSN_CALLIL; goto extract_sfmt_jmpil; + case 0 : + if ((entire_insn & 0x7ffc0000) == 0x340000) + { itype = FRVBF_INSN_JMPIL; goto extract_sfmt_jmpil; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x7ffc0000) == 0x2340000) + { itype = FRVBF_INSN_CALLIL; goto extract_sfmt_jmpil; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1230,116 +2013,398 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 25) & (15 << 2)) | ((insn >> 14) & (1 << 1)) | ((insn >> 13) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_BNOLR; goto extract_sfmt_bnolr; + case 0 : + if ((entire_insn & 0x7ffcffff) == 0x384000) + { itype = FRVBF_INSN_BNOLR; goto extract_sfmt_bnolr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; case 1 : { unsigned int val = (((insn >> 14) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_BCTRLR; goto extract_sfmt_bctrlr; - case 1 : itype = FRVBF_INSN_BCNOLR; goto extract_sfmt_bcnolr; + case 0 : + if ((entire_insn & 0x7ffcefff) == 0x382000) + { itype = FRVBF_INSN_BCTRLR; goto extract_sfmt_bctrlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x7ffcffff) == 0x386000) + { itype = FRVBF_INSN_BCNOLR; goto extract_sfmt_bcnolr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 2 : itype = FRVBF_INSN_FBNOLR; goto extract_sfmt_bnolr; - case 3 : itype = FRVBF_INSN_FCBNOLR; goto extract_sfmt_bcnolr; - case 4 : itype = FRVBF_INSN_BCLR; goto extract_sfmt_beqlr; - case 5 : itype = FRVBF_INSN_BCCLR; goto extract_sfmt_bceqlr; - case 6 : itype = FRVBF_INSN_FBULR; goto extract_sfmt_fbeqlr; - case 7 : itype = FRVBF_INSN_FCBULR; goto extract_sfmt_fcbeqlr; - case 8 : itype = FRVBF_INSN_BVLR; goto extract_sfmt_beqlr; - case 9 : itype = FRVBF_INSN_BCVLR; goto extract_sfmt_bceqlr; - case 10 : itype = FRVBF_INSN_FBGTLR; goto extract_sfmt_fbeqlr; - case 11 : itype = FRVBF_INSN_FCBGTLR; goto extract_sfmt_fcbeqlr; - case 12 : itype = FRVBF_INSN_BLTLR; goto extract_sfmt_beqlr; - case 13 : itype = FRVBF_INSN_BCLTLR; goto extract_sfmt_bceqlr; - case 14 : itype = FRVBF_INSN_FBUGLR; goto extract_sfmt_fbeqlr; - case 15 : itype = FRVBF_INSN_FCBUGLR; goto extract_sfmt_fcbeqlr; - case 16 : itype = FRVBF_INSN_BEQLR; goto extract_sfmt_beqlr; - case 17 : itype = FRVBF_INSN_BCEQLR; goto extract_sfmt_bceqlr; - case 18 : itype = FRVBF_INSN_FBLTLR; goto extract_sfmt_fbeqlr; - case 19 : itype = FRVBF_INSN_FCBLTLR; goto extract_sfmt_fcbeqlr; - case 20 : itype = FRVBF_INSN_BLSLR; goto extract_sfmt_beqlr; - case 21 : itype = FRVBF_INSN_BCLSLR; goto extract_sfmt_bceqlr; - case 22 : itype = FRVBF_INSN_FBULLR; goto extract_sfmt_fbeqlr; - case 23 : itype = FRVBF_INSN_FCBULLR; goto extract_sfmt_fcbeqlr; - case 24 : itype = FRVBF_INSN_BNLR; goto extract_sfmt_beqlr; - case 25 : itype = FRVBF_INSN_BCNLR; goto extract_sfmt_bceqlr; - case 26 : itype = FRVBF_INSN_FBLGLR; goto extract_sfmt_fbeqlr; - case 27 : itype = FRVBF_INSN_FCBLGLR; goto extract_sfmt_fcbeqlr; - case 28 : itype = FRVBF_INSN_BLELR; goto extract_sfmt_beqlr; - case 29 : itype = FRVBF_INSN_BCLELR; goto extract_sfmt_bceqlr; - case 30 : itype = FRVBF_INSN_FBNELR; goto extract_sfmt_fbeqlr; - case 31 : itype = FRVBF_INSN_FCBNELR; goto extract_sfmt_fcbeqlr; - case 32 : itype = FRVBF_INSN_BRALR; goto extract_sfmt_bralr; - case 33 : itype = FRVBF_INSN_BCRALR; goto extract_sfmt_bcralr; - case 34 : itype = FRVBF_INSN_FBEQLR; goto extract_sfmt_fbeqlr; - case 35 : itype = FRVBF_INSN_FCBEQLR; goto extract_sfmt_fcbeqlr; - case 36 : itype = FRVBF_INSN_BNCLR; goto extract_sfmt_beqlr; - case 37 : itype = FRVBF_INSN_BCNCLR; goto extract_sfmt_bceqlr; - case 38 : itype = FRVBF_INSN_FBUELR; goto extract_sfmt_fbeqlr; - case 39 : itype = FRVBF_INSN_FCBUELR; goto extract_sfmt_fcbeqlr; - case 40 : itype = FRVBF_INSN_BNVLR; goto extract_sfmt_beqlr; - case 41 : itype = FRVBF_INSN_BCNVLR; goto extract_sfmt_bceqlr; - case 42 : itype = FRVBF_INSN_FBGELR; goto extract_sfmt_fbeqlr; - case 43 : itype = FRVBF_INSN_FCBGELR; goto extract_sfmt_fcbeqlr; - case 44 : itype = FRVBF_INSN_BGELR; goto extract_sfmt_beqlr; - case 45 : itype = FRVBF_INSN_BCGELR; goto extract_sfmt_bceqlr; - case 46 : itype = FRVBF_INSN_FBUGELR; goto extract_sfmt_fbeqlr; - case 47 : itype = FRVBF_INSN_FCBUGELR; goto extract_sfmt_fcbeqlr; - case 48 : itype = FRVBF_INSN_BNELR; goto extract_sfmt_beqlr; - case 49 : itype = FRVBF_INSN_BCNELR; goto extract_sfmt_bceqlr; - case 50 : itype = FRVBF_INSN_FBLELR; goto extract_sfmt_fbeqlr; - case 51 : itype = FRVBF_INSN_FCBLELR; goto extract_sfmt_fcbeqlr; - case 52 : itype = FRVBF_INSN_BHILR; goto extract_sfmt_beqlr; - case 53 : itype = FRVBF_INSN_BCHILR; goto extract_sfmt_bceqlr; - case 54 : itype = FRVBF_INSN_FBULELR; goto extract_sfmt_fbeqlr; - case 55 : itype = FRVBF_INSN_FCBULELR; goto extract_sfmt_fcbeqlr; - case 56 : itype = FRVBF_INSN_BPLR; goto extract_sfmt_beqlr; - case 57 : itype = FRVBF_INSN_BCPLR; goto extract_sfmt_bceqlr; - case 58 : itype = FRVBF_INSN_FBOLR; goto extract_sfmt_fbeqlr; - case 59 : itype = FRVBF_INSN_FCBOLR; goto extract_sfmt_fcbeqlr; - case 60 : itype = FRVBF_INSN_BGTLR; goto extract_sfmt_beqlr; - case 61 : itype = FRVBF_INSN_BCGTLR; goto extract_sfmt_bceqlr; - case 62 : itype = FRVBF_INSN_FBRALR; goto extract_sfmt_bralr; - case 63 : itype = FRVBF_INSN_FCBRALR; goto extract_sfmt_bcralr; + case 2 : + if ((entire_insn & 0x7ffcffff) == 0x38c000) + { itype = FRVBF_INSN_FBNOLR; goto extract_sfmt_bnolr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x7ffcffff) == 0x38e000) + { itype = FRVBF_INSN_FCBNOLR; goto extract_sfmt_bcnolr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 4 : + if ((entire_insn & 0x79fcffff) == 0x8384000) + { itype = FRVBF_INSN_BCLR; goto extract_sfmt_beqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 5 : + if ((entire_insn & 0x79fcefff) == 0x8386000) + { itype = FRVBF_INSN_BCCLR; goto extract_sfmt_bceqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 6 : + if ((entire_insn & 0x79fcffff) == 0x838c000) + { itype = FRVBF_INSN_FBULR; goto extract_sfmt_fbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 7 : + if ((entire_insn & 0x79fcefff) == 0x838e000) + { itype = FRVBF_INSN_FCBULR; goto extract_sfmt_fcbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 8 : + if ((entire_insn & 0x79fcffff) == 0x10384000) + { itype = FRVBF_INSN_BVLR; goto extract_sfmt_beqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 9 : + if ((entire_insn & 0x79fcefff) == 0x10386000) + { itype = FRVBF_INSN_BCVLR; goto extract_sfmt_bceqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 10 : + if ((entire_insn & 0x79fcffff) == 0x1038c000) + { itype = FRVBF_INSN_FBGTLR; goto extract_sfmt_fbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 11 : + if ((entire_insn & 0x79fcefff) == 0x1038e000) + { itype = FRVBF_INSN_FCBGTLR; goto extract_sfmt_fcbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 12 : + if ((entire_insn & 0x79fcffff) == 0x18384000) + { itype = FRVBF_INSN_BLTLR; goto extract_sfmt_beqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 13 : + if ((entire_insn & 0x79fcefff) == 0x18386000) + { itype = FRVBF_INSN_BCLTLR; goto extract_sfmt_bceqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : + if ((entire_insn & 0x79fcffff) == 0x1838c000) + { itype = FRVBF_INSN_FBUGLR; goto extract_sfmt_fbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 15 : + if ((entire_insn & 0x79fcefff) == 0x1838e000) + { itype = FRVBF_INSN_FCBUGLR; goto extract_sfmt_fcbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 16 : + if ((entire_insn & 0x79fcffff) == 0x20384000) + { itype = FRVBF_INSN_BEQLR; goto extract_sfmt_beqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 17 : + if ((entire_insn & 0x79fcefff) == 0x20386000) + { itype = FRVBF_INSN_BCEQLR; goto extract_sfmt_bceqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 18 : + if ((entire_insn & 0x79fcffff) == 0x2038c000) + { itype = FRVBF_INSN_FBLTLR; goto extract_sfmt_fbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 19 : + if ((entire_insn & 0x79fcefff) == 0x2038e000) + { itype = FRVBF_INSN_FCBLTLR; goto extract_sfmt_fcbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 20 : + if ((entire_insn & 0x79fcffff) == 0x28384000) + { itype = FRVBF_INSN_BLSLR; goto extract_sfmt_beqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 21 : + if ((entire_insn & 0x79fcefff) == 0x28386000) + { itype = FRVBF_INSN_BCLSLR; goto extract_sfmt_bceqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 22 : + if ((entire_insn & 0x79fcffff) == 0x2838c000) + { itype = FRVBF_INSN_FBULLR; goto extract_sfmt_fbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 23 : + if ((entire_insn & 0x79fcefff) == 0x2838e000) + { itype = FRVBF_INSN_FCBULLR; goto extract_sfmt_fcbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 24 : + if ((entire_insn & 0x79fcffff) == 0x30384000) + { itype = FRVBF_INSN_BNLR; goto extract_sfmt_beqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 25 : + if ((entire_insn & 0x79fcefff) == 0x30386000) + { itype = FRVBF_INSN_BCNLR; goto extract_sfmt_bceqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 26 : + if ((entire_insn & 0x79fcffff) == 0x3038c000) + { itype = FRVBF_INSN_FBLGLR; goto extract_sfmt_fbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 27 : + if ((entire_insn & 0x79fcefff) == 0x3038e000) + { itype = FRVBF_INSN_FCBLGLR; goto extract_sfmt_fcbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 28 : + if ((entire_insn & 0x79fcffff) == 0x38384000) + { itype = FRVBF_INSN_BLELR; goto extract_sfmt_beqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 29 : + if ((entire_insn & 0x79fcefff) == 0x38386000) + { itype = FRVBF_INSN_BCLELR; goto extract_sfmt_bceqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 30 : + if ((entire_insn & 0x79fcffff) == 0x3838c000) + { itype = FRVBF_INSN_FBNELR; goto extract_sfmt_fbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 31 : + if ((entire_insn & 0x79fcefff) == 0x3838e000) + { itype = FRVBF_INSN_FCBNELR; goto extract_sfmt_fcbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 32 : + if ((entire_insn & 0x7ffcffff) == 0x40384000) + { itype = FRVBF_INSN_BRALR; goto extract_sfmt_bralr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 33 : + if ((entire_insn & 0x7ffcefff) == 0x40386000) + { itype = FRVBF_INSN_BCRALR; goto extract_sfmt_bcralr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 34 : + if ((entire_insn & 0x79fcffff) == 0x4038c000) + { itype = FRVBF_INSN_FBEQLR; goto extract_sfmt_fbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 35 : + if ((entire_insn & 0x79fcefff) == 0x4038e000) + { itype = FRVBF_INSN_FCBEQLR; goto extract_sfmt_fcbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 36 : + if ((entire_insn & 0x79fcffff) == 0x48384000) + { itype = FRVBF_INSN_BNCLR; goto extract_sfmt_beqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 37 : + if ((entire_insn & 0x79fcefff) == 0x48386000) + { itype = FRVBF_INSN_BCNCLR; goto extract_sfmt_bceqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 38 : + if ((entire_insn & 0x79fcffff) == 0x4838c000) + { itype = FRVBF_INSN_FBUELR; goto extract_sfmt_fbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 39 : + if ((entire_insn & 0x79fcefff) == 0x4838e000) + { itype = FRVBF_INSN_FCBUELR; goto extract_sfmt_fcbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 40 : + if ((entire_insn & 0x79fcffff) == 0x50384000) + { itype = FRVBF_INSN_BNVLR; goto extract_sfmt_beqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 41 : + if ((entire_insn & 0x79fcefff) == 0x50386000) + { itype = FRVBF_INSN_BCNVLR; goto extract_sfmt_bceqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 42 : + if ((entire_insn & 0x79fcffff) == 0x5038c000) + { itype = FRVBF_INSN_FBGELR; goto extract_sfmt_fbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 43 : + if ((entire_insn & 0x79fcefff) == 0x5038e000) + { itype = FRVBF_INSN_FCBGELR; goto extract_sfmt_fcbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 44 : + if ((entire_insn & 0x79fcffff) == 0x58384000) + { itype = FRVBF_INSN_BGELR; goto extract_sfmt_beqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 45 : + if ((entire_insn & 0x79fcefff) == 0x58386000) + { itype = FRVBF_INSN_BCGELR; goto extract_sfmt_bceqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 46 : + if ((entire_insn & 0x79fcffff) == 0x5838c000) + { itype = FRVBF_INSN_FBUGELR; goto extract_sfmt_fbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 47 : + if ((entire_insn & 0x79fcefff) == 0x5838e000) + { itype = FRVBF_INSN_FCBUGELR; goto extract_sfmt_fcbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 48 : + if ((entire_insn & 0x79fcffff) == 0x60384000) + { itype = FRVBF_INSN_BNELR; goto extract_sfmt_beqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 49 : + if ((entire_insn & 0x79fcefff) == 0x60386000) + { itype = FRVBF_INSN_BCNELR; goto extract_sfmt_bceqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 50 : + if ((entire_insn & 0x79fcffff) == 0x6038c000) + { itype = FRVBF_INSN_FBLELR; goto extract_sfmt_fbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 51 : + if ((entire_insn & 0x79fcefff) == 0x6038e000) + { itype = FRVBF_INSN_FCBLELR; goto extract_sfmt_fcbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 52 : + if ((entire_insn & 0x79fcffff) == 0x68384000) + { itype = FRVBF_INSN_BHILR; goto extract_sfmt_beqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 53 : + if ((entire_insn & 0x79fcefff) == 0x68386000) + { itype = FRVBF_INSN_BCHILR; goto extract_sfmt_bceqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 54 : + if ((entire_insn & 0x79fcffff) == 0x6838c000) + { itype = FRVBF_INSN_FBULELR; goto extract_sfmt_fbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 55 : + if ((entire_insn & 0x79fcefff) == 0x6838e000) + { itype = FRVBF_INSN_FCBULELR; goto extract_sfmt_fcbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 56 : + if ((entire_insn & 0x79fcffff) == 0x70384000) + { itype = FRVBF_INSN_BPLR; goto extract_sfmt_beqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 57 : + if ((entire_insn & 0x79fcefff) == 0x70386000) + { itype = FRVBF_INSN_BCPLR; goto extract_sfmt_bceqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 58 : + if ((entire_insn & 0x79fcffff) == 0x7038c000) + { itype = FRVBF_INSN_FBOLR; goto extract_sfmt_fbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 59 : + if ((entire_insn & 0x79fcefff) == 0x7038e000) + { itype = FRVBF_INSN_FCBOLR; goto extract_sfmt_fcbeqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 60 : + if ((entire_insn & 0x79fcffff) == 0x78384000) + { itype = FRVBF_INSN_BGTLR; goto extract_sfmt_beqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 61 : + if ((entire_insn & 0x79fcefff) == 0x78386000) + { itype = FRVBF_INSN_BCGTLR; goto extract_sfmt_bceqlr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 62 : + if ((entire_insn & 0x7ffcffff) == 0x7838c000) + { itype = FRVBF_INSN_FBRALR; goto extract_sfmt_bralr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 63 : + if ((entire_insn & 0x7ffcefff) == 0x7838e000) + { itype = FRVBF_INSN_FCBRALR; goto extract_sfmt_bcralr; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 15 : itype = FRVBF_INSN_CALL; goto extract_sfmt_call; - case 16 : itype = FRVBF_INSN_ADDI; goto extract_sfmt_addi; - case 17 : itype = FRVBF_INSN_ADDICC; goto extract_sfmt_addicc; - case 18 : itype = FRVBF_INSN_ADDXI; goto extract_sfmt_addxi; - case 19 : itype = FRVBF_INSN_ADDXICC; goto extract_sfmt_addicc; - case 20 : itype = FRVBF_INSN_SUBI; goto extract_sfmt_addi; - case 21 : itype = FRVBF_INSN_SUBICC; goto extract_sfmt_addicc; - case 22 : itype = FRVBF_INSN_SUBXI; goto extract_sfmt_addxi; - case 23 : itype = FRVBF_INSN_SUBXICC; goto extract_sfmt_addicc; - case 24 : itype = FRVBF_INSN_SMULI; goto extract_sfmt_smuli; - case 25 : itype = FRVBF_INSN_SMULICC; goto extract_sfmt_smulicc; - case 26 : itype = FRVBF_INSN_UMULI; goto extract_sfmt_smuli; - case 27 : itype = FRVBF_INSN_UMULICC; goto extract_sfmt_smulicc; + case 15 : + if ((entire_insn & 0x1fc0000) == 0x3c0000) + { itype = FRVBF_INSN_CALL; goto extract_sfmt_call; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 16 : + if ((entire_insn & 0x1fc0000) == 0x400000) + { itype = FRVBF_INSN_ADDI; goto extract_sfmt_addi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 17 : + if ((entire_insn & 0x1fc0000) == 0x440000) + { itype = FRVBF_INSN_ADDICC; goto extract_sfmt_addicc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 18 : + if ((entire_insn & 0x1fc0000) == 0x480000) + { itype = FRVBF_INSN_ADDXI; goto extract_sfmt_addxi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 19 : + if ((entire_insn & 0x1fc0000) == 0x4c0000) + { itype = FRVBF_INSN_ADDXICC; goto extract_sfmt_addicc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 20 : + if ((entire_insn & 0x1fc0000) == 0x500000) + { itype = FRVBF_INSN_SUBI; goto extract_sfmt_addi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 21 : + if ((entire_insn & 0x1fc0000) == 0x540000) + { itype = FRVBF_INSN_SUBICC; goto extract_sfmt_addicc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 22 : + if ((entire_insn & 0x1fc0000) == 0x580000) + { itype = FRVBF_INSN_SUBXI; goto extract_sfmt_addxi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 23 : + if ((entire_insn & 0x1fc0000) == 0x5c0000) + { itype = FRVBF_INSN_SUBXICC; goto extract_sfmt_addicc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 24 : + if ((entire_insn & 0x1fc0000) == 0x600000) + { itype = FRVBF_INSN_SMULI; goto extract_sfmt_smuli; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 25 : + if ((entire_insn & 0x1fc0000) == 0x640000) + { itype = FRVBF_INSN_SMULICC; goto extract_sfmt_smulicc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 26 : + if ((entire_insn & 0x1fc0000) == 0x680000) + { itype = FRVBF_INSN_UMULI; goto extract_sfmt_smuli; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 27 : + if ((entire_insn & 0x1fc0000) == 0x6c0000) + { itype = FRVBF_INSN_UMULICC; goto extract_sfmt_smulicc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; case 28 : { unsigned int val = (((insn >> 27) & (15 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_TINO; goto extract_sfmt_rei; - case 1 : itype = FRVBF_INSN_TIC; goto extract_sfmt_tieq; - case 2 : itype = FRVBF_INSN_TIV; goto extract_sfmt_tieq; - case 3 : itype = FRVBF_INSN_TILT; goto extract_sfmt_tieq; - case 4 : itype = FRVBF_INSN_TIEQ; goto extract_sfmt_tieq; - case 5 : itype = FRVBF_INSN_TILS; goto extract_sfmt_tieq; - case 6 : itype = FRVBF_INSN_TIN; goto extract_sfmt_tieq; - case 7 : itype = FRVBF_INSN_TILE; goto extract_sfmt_tieq; - case 8 : itype = FRVBF_INSN_TIRA; goto extract_sfmt_tira; - case 9 : itype = FRVBF_INSN_TINC; goto extract_sfmt_tieq; - case 10 : itype = FRVBF_INSN_TINV; goto extract_sfmt_tieq; - case 11 : itype = FRVBF_INSN_TIGE; goto extract_sfmt_tieq; - case 12 : itype = FRVBF_INSN_TINE; goto extract_sfmt_tieq; - case 13 : itype = FRVBF_INSN_TIHI; goto extract_sfmt_tieq; - case 14 : itype = FRVBF_INSN_TIP; goto extract_sfmt_tieq; - case 15 : itype = FRVBF_INSN_TIGT; goto extract_sfmt_tieq; + case 0 : + if ((entire_insn & 0x7fffffff) == 0x700000) + { itype = FRVBF_INSN_TINO; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x79fc0000) == 0x8700000) + { itype = FRVBF_INSN_TIC; goto extract_sfmt_tieq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x79fc0000) == 0x10700000) + { itype = FRVBF_INSN_TIV; goto extract_sfmt_tieq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x79fc0000) == 0x18700000) + { itype = FRVBF_INSN_TILT; goto extract_sfmt_tieq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 4 : + if ((entire_insn & 0x79fc0000) == 0x20700000) + { itype = FRVBF_INSN_TIEQ; goto extract_sfmt_tieq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 5 : + if ((entire_insn & 0x79fc0000) == 0x28700000) + { itype = FRVBF_INSN_TILS; goto extract_sfmt_tieq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 6 : + if ((entire_insn & 0x79fc0000) == 0x30700000) + { itype = FRVBF_INSN_TIN; goto extract_sfmt_tieq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 7 : + if ((entire_insn & 0x79fc0000) == 0x38700000) + { itype = FRVBF_INSN_TILE; goto extract_sfmt_tieq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 8 : + if ((entire_insn & 0x7ffc0000) == 0x40700000) + { itype = FRVBF_INSN_TIRA; goto extract_sfmt_tira; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 9 : + if ((entire_insn & 0x79fc0000) == 0x48700000) + { itype = FRVBF_INSN_TINC; goto extract_sfmt_tieq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 10 : + if ((entire_insn & 0x79fc0000) == 0x50700000) + { itype = FRVBF_INSN_TINV; goto extract_sfmt_tieq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 11 : + if ((entire_insn & 0x79fc0000) == 0x58700000) + { itype = FRVBF_INSN_TIGE; goto extract_sfmt_tieq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 12 : + if ((entire_insn & 0x79fc0000) == 0x60700000) + { itype = FRVBF_INSN_TINE; goto extract_sfmt_tieq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 13 : + if ((entire_insn & 0x79fc0000) == 0x68700000) + { itype = FRVBF_INSN_TIHI; goto extract_sfmt_tieq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : + if ((entire_insn & 0x79fc0000) == 0x70700000) + { itype = FRVBF_INSN_TIP; goto extract_sfmt_tieq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 15 : + if ((entire_insn & 0x79fc0000) == 0x78700000) + { itype = FRVBF_INSN_TIGT; goto extract_sfmt_tieq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1348,104 +2413,350 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 27) & (15 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_FTINO; goto extract_sfmt_rei; - case 1 : itype = FRVBF_INSN_FTIU; goto extract_sfmt_ftine; - case 2 : itype = FRVBF_INSN_FTIGT; goto extract_sfmt_ftine; - case 3 : itype = FRVBF_INSN_FTIUG; goto extract_sfmt_ftine; - case 4 : itype = FRVBF_INSN_FTILT; goto extract_sfmt_ftine; - case 5 : itype = FRVBF_INSN_FTIUL; goto extract_sfmt_ftine; - case 6 : itype = FRVBF_INSN_FTILG; goto extract_sfmt_ftine; - case 7 : itype = FRVBF_INSN_FTINE; goto extract_sfmt_ftine; - case 8 : itype = FRVBF_INSN_FTIEQ; goto extract_sfmt_ftine; - case 9 : itype = FRVBF_INSN_FTIUE; goto extract_sfmt_ftine; - case 10 : itype = FRVBF_INSN_FTIGE; goto extract_sfmt_ftine; - case 11 : itype = FRVBF_INSN_FTIUGE; goto extract_sfmt_ftine; - case 12 : itype = FRVBF_INSN_FTILE; goto extract_sfmt_ftine; - case 13 : itype = FRVBF_INSN_FTIULE; goto extract_sfmt_ftine; - case 14 : itype = FRVBF_INSN_FTIO; goto extract_sfmt_ftine; - case 15 : itype = FRVBF_INSN_FTIRA; goto extract_sfmt_tira; + case 0 : + if ((entire_insn & 0x7fffffff) == 0x740000) + { itype = FRVBF_INSN_FTINO; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x79fc0000) == 0x8740000) + { itype = FRVBF_INSN_FTIU; goto extract_sfmt_ftine; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x79fc0000) == 0x10740000) + { itype = FRVBF_INSN_FTIGT; goto extract_sfmt_ftine; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x79fc0000) == 0x18740000) + { itype = FRVBF_INSN_FTIUG; goto extract_sfmt_ftine; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 4 : + if ((entire_insn & 0x79fc0000) == 0x20740000) + { itype = FRVBF_INSN_FTILT; goto extract_sfmt_ftine; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 5 : + if ((entire_insn & 0x79fc0000) == 0x28740000) + { itype = FRVBF_INSN_FTIUL; goto extract_sfmt_ftine; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 6 : + if ((entire_insn & 0x79fc0000) == 0x30740000) + { itype = FRVBF_INSN_FTILG; goto extract_sfmt_ftine; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 7 : + if ((entire_insn & 0x79fc0000) == 0x38740000) + { itype = FRVBF_INSN_FTINE; goto extract_sfmt_ftine; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 8 : + if ((entire_insn & 0x79fc0000) == 0x40740000) + { itype = FRVBF_INSN_FTIEQ; goto extract_sfmt_ftine; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 9 : + if ((entire_insn & 0x79fc0000) == 0x48740000) + { itype = FRVBF_INSN_FTIUE; goto extract_sfmt_ftine; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 10 : + if ((entire_insn & 0x79fc0000) == 0x50740000) + { itype = FRVBF_INSN_FTIGE; goto extract_sfmt_ftine; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 11 : + if ((entire_insn & 0x79fc0000) == 0x58740000) + { itype = FRVBF_INSN_FTIUGE; goto extract_sfmt_ftine; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 12 : + if ((entire_insn & 0x79fc0000) == 0x60740000) + { itype = FRVBF_INSN_FTILE; goto extract_sfmt_ftine; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 13 : + if ((entire_insn & 0x79fc0000) == 0x68740000) + { itype = FRVBF_INSN_FTIULE; goto extract_sfmt_ftine; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : + if ((entire_insn & 0x79fc0000) == 0x70740000) + { itype = FRVBF_INSN_FTIO; goto extract_sfmt_ftine; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 15 : + if ((entire_insn & 0x7ffc0000) == 0x78740000) + { itype = FRVBF_INSN_FTIRA; goto extract_sfmt_tira; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 30 : itype = FRVBF_INSN_SDIVI; goto extract_sfmt_sdivi; - case 31 : itype = FRVBF_INSN_UDIVI; goto extract_sfmt_sdivi; - case 32 : itype = FRVBF_INSN_ANDI; goto extract_sfmt_addi; - case 33 : itype = FRVBF_INSN_ANDICC; goto extract_sfmt_andicc; - case 34 : itype = FRVBF_INSN_ORI; goto extract_sfmt_addi; - case 35 : itype = FRVBF_INSN_ORICC; goto extract_sfmt_andicc; - case 36 : itype = FRVBF_INSN_XORI; goto extract_sfmt_addi; - case 37 : itype = FRVBF_INSN_XORICC; goto extract_sfmt_andicc; - case 40 : itype = FRVBF_INSN_SLLI; goto extract_sfmt_addi; - case 41 : itype = FRVBF_INSN_SLLICC; goto extract_sfmt_addicc; - case 42 : itype = FRVBF_INSN_SRLI; goto extract_sfmt_addi; - case 43 : itype = FRVBF_INSN_SRLICC; goto extract_sfmt_addicc; - case 44 : itype = FRVBF_INSN_SRAI; goto extract_sfmt_addi; - case 45 : itype = FRVBF_INSN_SRAICC; goto extract_sfmt_addicc; - case 46 : itype = FRVBF_INSN_NSDIVI; goto extract_sfmt_sdivi; - case 47 : itype = FRVBF_INSN_NUDIVI; goto extract_sfmt_sdivi; - case 48 : itype = FRVBF_INSN_LDSBI; goto extract_sfmt_ldsbi; - case 49 : itype = FRVBF_INSN_LDSHI; goto extract_sfmt_ldsbi; - case 50 : itype = FRVBF_INSN_LDI; goto extract_sfmt_ldsbi; - case 51 : itype = FRVBF_INSN_LDDI; goto extract_sfmt_lddi; - case 52 : itype = FRVBF_INSN_LDQI; goto extract_sfmt_ldqi; - case 53 : itype = FRVBF_INSN_LDUBI; goto extract_sfmt_ldsbi; - case 54 : itype = FRVBF_INSN_LDUHI; goto extract_sfmt_ldsbi; - case 55 : itype = FRVBF_INSN_REI; goto extract_sfmt_rei; - case 56 : itype = FRVBF_INSN_LDBFI; goto extract_sfmt_ldbfi; - case 57 : itype = FRVBF_INSN_LDHFI; goto extract_sfmt_ldbfi; - case 58 : itype = FRVBF_INSN_LDFI; goto extract_sfmt_ldbfi; - case 59 : itype = FRVBF_INSN_LDDFI; goto extract_sfmt_lddfi; - case 60 : itype = FRVBF_INSN_LDQFI; goto extract_sfmt_ldqfi; - case 61 : itype = FRVBF_INSN_SETLO; goto extract_sfmt_setlo; - case 62 : itype = FRVBF_INSN_SETHI; goto extract_sfmt_sethi; - case 63 : itype = FRVBF_INSN_SETLOS; goto extract_sfmt_setlos; - case 64 : itype = FRVBF_INSN_NLDSBI; goto extract_sfmt_nldsbi; - case 65 : itype = FRVBF_INSN_NLDUBI; goto extract_sfmt_nldsbi; - case 66 : itype = FRVBF_INSN_NLDSHI; goto extract_sfmt_nldsbi; - case 67 : itype = FRVBF_INSN_NLDUHI; goto extract_sfmt_nldsbi; - case 68 : itype = FRVBF_INSN_NLDI; goto extract_sfmt_nldsbi; - case 69 : itype = FRVBF_INSN_NLDDI; goto extract_sfmt_nlddi; + case 30 : + if ((entire_insn & 0x1fc0000) == 0x780000) + { itype = FRVBF_INSN_SDIVI; goto extract_sfmt_sdivi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 31 : + if ((entire_insn & 0x1fc0000) == 0x7c0000) + { itype = FRVBF_INSN_UDIVI; goto extract_sfmt_sdivi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 32 : + if ((entire_insn & 0x1fc0000) == 0x800000) + { itype = FRVBF_INSN_ANDI; goto extract_sfmt_addi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 33 : + if ((entire_insn & 0x1fc0000) == 0x840000) + { itype = FRVBF_INSN_ANDICC; goto extract_sfmt_andicc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 34 : + if ((entire_insn & 0x1fc0000) == 0x880000) + { itype = FRVBF_INSN_ORI; goto extract_sfmt_addi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 35 : + if ((entire_insn & 0x1fc0000) == 0x8c0000) + { itype = FRVBF_INSN_ORICC; goto extract_sfmt_andicc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 36 : + if ((entire_insn & 0x1fc0000) == 0x900000) + { itype = FRVBF_INSN_XORI; goto extract_sfmt_addi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 37 : + if ((entire_insn & 0x1fc0000) == 0x940000) + { itype = FRVBF_INSN_XORICC; goto extract_sfmt_andicc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 40 : + if ((entire_insn & 0x1fc0000) == 0xa00000) + { itype = FRVBF_INSN_SLLI; goto extract_sfmt_addi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 41 : + if ((entire_insn & 0x1fc0000) == 0xa40000) + { itype = FRVBF_INSN_SLLICC; goto extract_sfmt_addicc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 42 : + if ((entire_insn & 0x1fc0000) == 0xa80000) + { itype = FRVBF_INSN_SRLI; goto extract_sfmt_addi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 43 : + if ((entire_insn & 0x1fc0000) == 0xac0000) + { itype = FRVBF_INSN_SRLICC; goto extract_sfmt_addicc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 44 : + if ((entire_insn & 0x1fc0000) == 0xb00000) + { itype = FRVBF_INSN_SRAI; goto extract_sfmt_addi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 45 : + if ((entire_insn & 0x1fc0000) == 0xb40000) + { itype = FRVBF_INSN_SRAICC; goto extract_sfmt_addicc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 46 : + if ((entire_insn & 0x1fc0000) == 0xb80000) + { itype = FRVBF_INSN_NSDIVI; goto extract_sfmt_sdivi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 47 : + if ((entire_insn & 0x1fc0000) == 0xbc0000) + { itype = FRVBF_INSN_NUDIVI; goto extract_sfmt_sdivi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 48 : + if ((entire_insn & 0x1fc0000) == 0xc00000) + { itype = FRVBF_INSN_LDSBI; goto extract_sfmt_ldsbi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 49 : + if ((entire_insn & 0x1fc0000) == 0xc40000) + { itype = FRVBF_INSN_LDSHI; goto extract_sfmt_ldsbi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 50 : + if ((entire_insn & 0x1fc0000) == 0xc80000) + { itype = FRVBF_INSN_LDI; goto extract_sfmt_ldsbi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 51 : + if ((entire_insn & 0x1fc0000) == 0xcc0000) + { itype = FRVBF_INSN_LDDI; goto extract_sfmt_lddi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 52 : + if ((entire_insn & 0x1fc0000) == 0xd00000) + { itype = FRVBF_INSN_LDQI; goto extract_sfmt_ldqi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 53 : + if ((entire_insn & 0x1fc0000) == 0xd40000) + { itype = FRVBF_INSN_LDUBI; goto extract_sfmt_ldsbi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 54 : + if ((entire_insn & 0x1fc0000) == 0xd80000) + { itype = FRVBF_INSN_LDUHI; goto extract_sfmt_ldsbi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 55 : + if ((entire_insn & 0x7ffc0fff) == 0xdc0000) + { itype = FRVBF_INSN_REI; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 56 : + if ((entire_insn & 0x1fc0000) == 0xe00000) + { itype = FRVBF_INSN_LDBFI; goto extract_sfmt_ldbfi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 57 : + if ((entire_insn & 0x1fc0000) == 0xe40000) + { itype = FRVBF_INSN_LDHFI; goto extract_sfmt_ldbfi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 58 : + if ((entire_insn & 0x1fc0000) == 0xe80000) + { itype = FRVBF_INSN_LDFI; goto extract_sfmt_ldbfi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 59 : + if ((entire_insn & 0x1fc0000) == 0xec0000) + { itype = FRVBF_INSN_LDDFI; goto extract_sfmt_lddfi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 60 : + if ((entire_insn & 0x1fc0000) == 0xf00000) + { itype = FRVBF_INSN_LDQFI; goto extract_sfmt_ldqfi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 61 : + if ((entire_insn & 0x1ff0000) == 0xf40000) + { itype = FRVBF_INSN_SETLO; goto extract_sfmt_setlo; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 62 : + if ((entire_insn & 0x1ff0000) == 0xf80000) + { itype = FRVBF_INSN_SETHI; goto extract_sfmt_sethi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 63 : + if ((entire_insn & 0x1ff0000) == 0xfc0000) + { itype = FRVBF_INSN_SETLOS; goto extract_sfmt_setlos; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 64 : + if ((entire_insn & 0x1fc0000) == 0x1000000) + { itype = FRVBF_INSN_NLDSBI; goto extract_sfmt_nldsbi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 65 : + if ((entire_insn & 0x1fc0000) == 0x1040000) + { itype = FRVBF_INSN_NLDUBI; goto extract_sfmt_nldsbi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 66 : + if ((entire_insn & 0x1fc0000) == 0x1080000) + { itype = FRVBF_INSN_NLDSHI; goto extract_sfmt_nldsbi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 67 : + if ((entire_insn & 0x1fc0000) == 0x10c0000) + { itype = FRVBF_INSN_NLDUHI; goto extract_sfmt_nldsbi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 68 : + if ((entire_insn & 0x1fc0000) == 0x1100000) + { itype = FRVBF_INSN_NLDI; goto extract_sfmt_nldsbi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 69 : + if ((entire_insn & 0x1fc0000) == 0x1140000) + { itype = FRVBF_INSN_NLDDI; goto extract_sfmt_nlddi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; case 70 : { unsigned int val = (((insn >> 6) & (7 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_ADDSS; goto extract_sfmt_add; - case 1 : itype = FRVBF_INSN_SUBSS; goto extract_sfmt_add; - case 2 : itype = FRVBF_INSN_SLASS; goto extract_sfmt_add; - case 4 : itype = FRVBF_INSN_SCUTSS; goto extract_sfmt_scutss; - case 5 : itype = FRVBF_INSN_SMU; goto extract_sfmt_smu; - case 6 : itype = FRVBF_INSN_SMASS; goto extract_sfmt_smass; - case 7 : itype = FRVBF_INSN_SMSSS; goto extract_sfmt_smass; + case 0 : + if ((entire_insn & 0x1fc0fc0) == 0x1180000) + { itype = FRVBF_INSN_ADDSS; goto extract_sfmt_add; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc0fc0) == 0x1180040) + { itype = FRVBF_INSN_SUBSS; goto extract_sfmt_add; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc0fc0) == 0x1180080) + { itype = FRVBF_INSN_SLASS; goto extract_sfmt_add; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 4 : + if ((entire_insn & 0x1ffffc0) == 0x1180100) + { itype = FRVBF_INSN_SCUTSS; goto extract_sfmt_scutss; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 5 : + if ((entire_insn & 0x7ffc0fc0) == 0x1180140) + { itype = FRVBF_INSN_SMU; goto extract_sfmt_smu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 6 : + if ((entire_insn & 0x7ffc0fc0) == 0x1180180) + { itype = FRVBF_INSN_SMASS; goto extract_sfmt_smass; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 7 : + if ((entire_insn & 0x7ffc0fc0) == 0x11801c0) + { itype = FRVBF_INSN_SMSSS; goto extract_sfmt_smass; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 71 : itype = FRVBF_INSN_SCANI; goto extract_sfmt_addi; - case 72 : itype = FRVBF_INSN_NLDBFI; goto extract_sfmt_nldbfi; - case 73 : itype = FRVBF_INSN_NLDHFI; goto extract_sfmt_nldbfi; - case 74 : itype = FRVBF_INSN_NLDFI; goto extract_sfmt_nldbfi; - case 75 : itype = FRVBF_INSN_NLDDFI; goto extract_sfmt_nlddfi; - case 76 : itype = FRVBF_INSN_NLDQFI; goto extract_sfmt_nldqfi; - case 77 : itype = FRVBF_INSN_SWAPI; goto extract_sfmt_swapi; - case 78 : itype = FRVBF_INSN_STBFI; goto extract_sfmt_stbfi; - case 79 : itype = FRVBF_INSN_STHFI; goto extract_sfmt_stbfi; - case 80 : itype = FRVBF_INSN_STBI; goto extract_sfmt_stbi; - case 81 : itype = FRVBF_INSN_STHI; goto extract_sfmt_stbi; - case 82 : itype = FRVBF_INSN_STI; goto extract_sfmt_stbi; - case 83 : itype = FRVBF_INSN_STDI; goto extract_sfmt_stdi; - case 84 : itype = FRVBF_INSN_STQI; goto extract_sfmt_ldqi; - case 85 : itype = FRVBF_INSN_STFI; goto extract_sfmt_stbfi; - case 86 : itype = FRVBF_INSN_STDFI; goto extract_sfmt_stdfi; - case 87 : itype = FRVBF_INSN_STQFI; goto extract_sfmt_ldqfi; + case 71 : + if ((entire_insn & 0x1fc0000) == 0x11c0000) + { itype = FRVBF_INSN_SCANI; goto extract_sfmt_addi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 72 : + if ((entire_insn & 0x1fc0000) == 0x1200000) + { itype = FRVBF_INSN_NLDBFI; goto extract_sfmt_nldbfi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 73 : + if ((entire_insn & 0x1fc0000) == 0x1240000) + { itype = FRVBF_INSN_NLDHFI; goto extract_sfmt_nldbfi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 74 : + if ((entire_insn & 0x1fc0000) == 0x1280000) + { itype = FRVBF_INSN_NLDFI; goto extract_sfmt_nldbfi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 75 : + if ((entire_insn & 0x1fc0000) == 0x12c0000) + { itype = FRVBF_INSN_NLDDFI; goto extract_sfmt_nlddfi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 76 : + if ((entire_insn & 0x1fc0000) == 0x1300000) + { itype = FRVBF_INSN_NLDQFI; goto extract_sfmt_nldqfi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 77 : + if ((entire_insn & 0x1fc0000) == 0x1340000) + { itype = FRVBF_INSN_SWAPI; goto extract_sfmt_swapi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 78 : + if ((entire_insn & 0x1fc0000) == 0x1380000) + { itype = FRVBF_INSN_STBFI; goto extract_sfmt_stbfi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 79 : + if ((entire_insn & 0x1fc0000) == 0x13c0000) + { itype = FRVBF_INSN_STHFI; goto extract_sfmt_stbfi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 80 : + if ((entire_insn & 0x1fc0000) == 0x1400000) + { itype = FRVBF_INSN_STBI; goto extract_sfmt_stbi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 81 : + if ((entire_insn & 0x1fc0000) == 0x1440000) + { itype = FRVBF_INSN_STHI; goto extract_sfmt_stbi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 82 : + if ((entire_insn & 0x1fc0000) == 0x1480000) + { itype = FRVBF_INSN_STI; goto extract_sfmt_stbi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 83 : + if ((entire_insn & 0x1fc0000) == 0x14c0000) + { itype = FRVBF_INSN_STDI; goto extract_sfmt_stdi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 84 : + if ((entire_insn & 0x1fc0000) == 0x1500000) + { itype = FRVBF_INSN_STQI; goto extract_sfmt_ldqi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 85 : + if ((entire_insn & 0x1fc0000) == 0x1540000) + { itype = FRVBF_INSN_STFI; goto extract_sfmt_stbfi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 86 : + if ((entire_insn & 0x1fc0000) == 0x1580000) + { itype = FRVBF_INSN_STDFI; goto extract_sfmt_stdfi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 87 : + if ((entire_insn & 0x1fc0000) == 0x15c0000) + { itype = FRVBF_INSN_STQFI; goto extract_sfmt_ldqfi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; case 88 : { unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CADD; goto extract_sfmt_cadd; - case 1 : itype = FRVBF_INSN_CSUB; goto extract_sfmt_cadd; - case 2 : itype = FRVBF_INSN_CSMUL; goto extract_sfmt_csmul; - case 3 : itype = FRVBF_INSN_CSDIV; goto extract_sfmt_csdiv; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1600000) + { itype = FRVBF_INSN_CADD; goto extract_sfmt_cadd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1600040) + { itype = FRVBF_INSN_CSUB; goto extract_sfmt_cadd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x1600080) + { itype = FRVBF_INSN_CSMUL; goto extract_sfmt_csmul; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc00c0) == 0x16000c0) + { itype = FRVBF_INSN_CSDIV; goto extract_sfmt_csdiv; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1454,10 +2765,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CADDCC; goto extract_sfmt_caddcc; - case 1 : itype = FRVBF_INSN_CSUBCC; goto extract_sfmt_caddcc; - case 2 : itype = FRVBF_INSN_CSMULCC; goto extract_sfmt_csmulcc; - case 3 : itype = FRVBF_INSN_CUDIV; goto extract_sfmt_csdiv; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1640000) + { itype = FRVBF_INSN_CADDCC; goto extract_sfmt_caddcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1640040) + { itype = FRVBF_INSN_CSUBCC; goto extract_sfmt_caddcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x1640080) + { itype = FRVBF_INSN_CSMULCC; goto extract_sfmt_csmulcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc00c0) == 0x16400c0) + { itype = FRVBF_INSN_CUDIV; goto extract_sfmt_csdiv; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1466,10 +2789,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CAND; goto extract_sfmt_cadd; - case 1 : itype = FRVBF_INSN_COR; goto extract_sfmt_cadd; - case 2 : itype = FRVBF_INSN_CXOR; goto extract_sfmt_cadd; - case 3 : itype = FRVBF_INSN_CNOT; goto extract_sfmt_cnot; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1680000) + { itype = FRVBF_INSN_CAND; goto extract_sfmt_cadd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1680040) + { itype = FRVBF_INSN_COR; goto extract_sfmt_cadd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x1680080) + { itype = FRVBF_INSN_CXOR; goto extract_sfmt_cadd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fff0c0) == 0x16800c0) + { itype = FRVBF_INSN_CNOT; goto extract_sfmt_cnot; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1478,9 +2813,18 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CANDCC; goto extract_sfmt_caddcc; - case 1 : itype = FRVBF_INSN_CORCC; goto extract_sfmt_caddcc; - case 2 : itype = FRVBF_INSN_CXORCC; goto extract_sfmt_caddcc; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x16c0000) + { itype = FRVBF_INSN_CANDCC; goto extract_sfmt_caddcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x16c0040) + { itype = FRVBF_INSN_CORCC; goto extract_sfmt_caddcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x16c0080) + { itype = FRVBF_INSN_CXORCC; goto extract_sfmt_caddcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1489,9 +2833,18 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CSLL; goto extract_sfmt_cadd; - case 1 : itype = FRVBF_INSN_CSRL; goto extract_sfmt_cadd; - case 2 : itype = FRVBF_INSN_CSRA; goto extract_sfmt_cadd; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1700000) + { itype = FRVBF_INSN_CSLL; goto extract_sfmt_cadd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1700040) + { itype = FRVBF_INSN_CSRL; goto extract_sfmt_cadd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x1700080) + { itype = FRVBF_INSN_CSRA; goto extract_sfmt_cadd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1500,9 +2853,18 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CSLLCC; goto extract_sfmt_caddcc; - case 1 : itype = FRVBF_INSN_CSRLCC; goto extract_sfmt_caddcc; - case 2 : itype = FRVBF_INSN_CSRACC; goto extract_sfmt_caddcc; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1740000) + { itype = FRVBF_INSN_CSLLCC; goto extract_sfmt_caddcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1740040) + { itype = FRVBF_INSN_CSRLCC; goto extract_sfmt_caddcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x1740080) + { itype = FRVBF_INSN_CSRACC; goto extract_sfmt_caddcc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1511,10 +2873,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CLDSB; goto extract_sfmt_cldsb; - case 1 : itype = FRVBF_INSN_CLDUB; goto extract_sfmt_cldsb; - case 2 : itype = FRVBF_INSN_CLDSH; goto extract_sfmt_cldsb; - case 3 : itype = FRVBF_INSN_CLDUH; goto extract_sfmt_cldsb; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1780000) + { itype = FRVBF_INSN_CLDSB; goto extract_sfmt_cldsb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1780040) + { itype = FRVBF_INSN_CLDUB; goto extract_sfmt_cldsb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x1780080) + { itype = FRVBF_INSN_CLDSH; goto extract_sfmt_cldsb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc00c0) == 0x17800c0) + { itype = FRVBF_INSN_CLDUH; goto extract_sfmt_cldsb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1523,9 +2897,18 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CLD; goto extract_sfmt_cldsb; - case 1 : itype = FRVBF_INSN_CLDD; goto extract_sfmt_cldd; - case 2 : itype = FRVBF_INSN_CLDQ; goto extract_sfmt_cldq; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x17c0000) + { itype = FRVBF_INSN_CLD; goto extract_sfmt_cldsb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x17c0040) + { itype = FRVBF_INSN_CLDD; goto extract_sfmt_cldd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x17c0080) + { itype = FRVBF_INSN_CLDQ; goto extract_sfmt_cldq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1534,10 +2917,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CLDBF; goto extract_sfmt_cldbf; - case 1 : itype = FRVBF_INSN_CLDHF; goto extract_sfmt_cldbf; - case 2 : itype = FRVBF_INSN_CLDF; goto extract_sfmt_cldbf; - case 3 : itype = FRVBF_INSN_CLDDF; goto extract_sfmt_clddf; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1800000) + { itype = FRVBF_INSN_CLDBF; goto extract_sfmt_cldbf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1800040) + { itype = FRVBF_INSN_CLDHF; goto extract_sfmt_cldbf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x1800080) + { itype = FRVBF_INSN_CLDF; goto extract_sfmt_cldbf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc00c0) == 0x18000c0) + { itype = FRVBF_INSN_CLDDF; goto extract_sfmt_clddf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1546,10 +2941,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CLDSBU; goto extract_sfmt_cldsbu; - case 1 : itype = FRVBF_INSN_CLDUBU; goto extract_sfmt_cldsbu; - case 2 : itype = FRVBF_INSN_CLDSHU; goto extract_sfmt_cldsbu; - case 3 : itype = FRVBF_INSN_CLDUHU; goto extract_sfmt_cldsbu; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1840000) + { itype = FRVBF_INSN_CLDSBU; goto extract_sfmt_cldsbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1840040) + { itype = FRVBF_INSN_CLDUBU; goto extract_sfmt_cldsbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x1840080) + { itype = FRVBF_INSN_CLDSHU; goto extract_sfmt_cldsbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc00c0) == 0x18400c0) + { itype = FRVBF_INSN_CLDUHU; goto extract_sfmt_cldsbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1558,9 +2965,18 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CLDU; goto extract_sfmt_cldsbu; - case 1 : itype = FRVBF_INSN_CLDDU; goto extract_sfmt_clddu; - case 2 : itype = FRVBF_INSN_CLDQU; goto extract_sfmt_cldqu; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1880000) + { itype = FRVBF_INSN_CLDU; goto extract_sfmt_cldsbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1880040) + { itype = FRVBF_INSN_CLDDU; goto extract_sfmt_clddu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x1880080) + { itype = FRVBF_INSN_CLDQU; goto extract_sfmt_cldqu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1569,10 +2985,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CLDBFU; goto extract_sfmt_cldbfu; - case 1 : itype = FRVBF_INSN_CLDHFU; goto extract_sfmt_cldbfu; - case 2 : itype = FRVBF_INSN_CLDFU; goto extract_sfmt_cldbfu; - case 3 : itype = FRVBF_INSN_CLDDFU; goto extract_sfmt_clddfu; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x18c0000) + { itype = FRVBF_INSN_CLDBFU; goto extract_sfmt_cldbfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x18c0040) + { itype = FRVBF_INSN_CLDHFU; goto extract_sfmt_cldbfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x18c0080) + { itype = FRVBF_INSN_CLDFU; goto extract_sfmt_cldbfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc00c0) == 0x18c00c0) + { itype = FRVBF_INSN_CLDDFU; goto extract_sfmt_clddfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1581,10 +3009,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CSTB; goto extract_sfmt_cstb; - case 1 : itype = FRVBF_INSN_CSTH; goto extract_sfmt_cstb; - case 2 : itype = FRVBF_INSN_CST; goto extract_sfmt_cstb; - case 3 : itype = FRVBF_INSN_CSTD; goto extract_sfmt_cstd; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1900000) + { itype = FRVBF_INSN_CSTB; goto extract_sfmt_cstb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1900040) + { itype = FRVBF_INSN_CSTH; goto extract_sfmt_cstb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x1900080) + { itype = FRVBF_INSN_CST; goto extract_sfmt_cstb; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc00c0) == 0x19000c0) + { itype = FRVBF_INSN_CSTD; goto extract_sfmt_cstd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1593,9 +3033,18 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CSTQ; goto extract_sfmt_cldq; - case 2 : itype = FRVBF_INSN_CSWAP; goto extract_sfmt_cswap; - case 3 : itype = FRVBF_INSN_CSCAN; goto extract_sfmt_cadd; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1940000) + { itype = FRVBF_INSN_CSTQ; goto extract_sfmt_cldq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x1940080) + { itype = FRVBF_INSN_CSWAP; goto extract_sfmt_cswap; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc00c0) == 0x19400c0) + { itype = FRVBF_INSN_CSCAN; goto extract_sfmt_cadd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1604,10 +3053,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CSTBF; goto extract_sfmt_cstbf; - case 1 : itype = FRVBF_INSN_CSTHF; goto extract_sfmt_cstbf; - case 2 : itype = FRVBF_INSN_CSTF; goto extract_sfmt_cstbf; - case 3 : itype = FRVBF_INSN_CSTDF; goto extract_sfmt_cstdf; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1980000) + { itype = FRVBF_INSN_CSTBF; goto extract_sfmt_cstbf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1980040) + { itype = FRVBF_INSN_CSTHF; goto extract_sfmt_cstbf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x1980080) + { itype = FRVBF_INSN_CSTF; goto extract_sfmt_cstbf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc00c0) == 0x19800c0) + { itype = FRVBF_INSN_CSTDF; goto extract_sfmt_cstdf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1616,10 +3077,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CSTBU; goto extract_sfmt_cstbu; - case 1 : itype = FRVBF_INSN_CSTHU; goto extract_sfmt_cstbu; - case 2 : itype = FRVBF_INSN_CSTU; goto extract_sfmt_cstbu; - case 3 : itype = FRVBF_INSN_CSTDU; goto extract_sfmt_cstdu; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x19c0000) + { itype = FRVBF_INSN_CSTBU; goto extract_sfmt_cstbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x19c0040) + { itype = FRVBF_INSN_CSTHU; goto extract_sfmt_cstbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x19c0080) + { itype = FRVBF_INSN_CSTU; goto extract_sfmt_cstbu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc00c0) == 0x19c00c0) + { itype = FRVBF_INSN_CSTDU; goto extract_sfmt_cstdu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1628,10 +3101,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CSTBFU; goto extract_sfmt_cstbfu; - case 1 : itype = FRVBF_INSN_CSTHFU; goto extract_sfmt_cstbfu; - case 2 : itype = FRVBF_INSN_CSTFU; goto extract_sfmt_cstbfu; - case 3 : itype = FRVBF_INSN_CSTDFU; goto extract_sfmt_cstdfu; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1a00000) + { itype = FRVBF_INSN_CSTBFU; goto extract_sfmt_cstbfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1a00040) + { itype = FRVBF_INSN_CSTHFU; goto extract_sfmt_cstbfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x1a00080) + { itype = FRVBF_INSN_CSTFU; goto extract_sfmt_cstbfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc00c0) == 0x1a000c0) + { itype = FRVBF_INSN_CSTDFU; goto extract_sfmt_cstdfu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1640,10 +3125,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CMOVGF; goto extract_sfmt_cmovgf; - case 1 : itype = FRVBF_INSN_CMOVGFD; goto extract_sfmt_cmovgfd; - case 2 : itype = FRVBF_INSN_CMOVFG; goto extract_sfmt_cmovfg; - case 3 : itype = FRVBF_INSN_CMOVFGD; goto extract_sfmt_cmovfgd; + case 0 : + if ((entire_insn & 0x1fff0c0) == 0x1a40000) + { itype = FRVBF_INSN_CMOVGF; goto extract_sfmt_cmovgf; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fff0c0) == 0x1a40040) + { itype = FRVBF_INSN_CMOVGFD; goto extract_sfmt_cmovgfd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fff0c0) == 0x1a40080) + { itype = FRVBF_INSN_CMOVFG; goto extract_sfmt_cmovfg; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fff0c0) == 0x1a400c0) + { itype = FRVBF_INSN_CMOVFGD; goto extract_sfmt_cmovfgd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1658,43 +3155,145 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, switch (val) { case 0 : /* fall through */ - case 2 : itype = FRVBF_INSN_CCKNO; goto extract_sfmt_cckra; - case 1 : itype = FRVBF_INSN_CJMPL; goto extract_sfmt_cjmpl; - case 3 : itype = FRVBF_INSN_CCALLL; goto extract_sfmt_cjmpl; + case 2 : + if ((entire_insn & 0x79fff0ff) == 0x1a80000) + { itype = FRVBF_INSN_CCKNO; goto extract_sfmt_cckra; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x7ffc00c0) == 0x1a80080) + { itype = FRVBF_INSN_CJMPL; goto extract_sfmt_cjmpl; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x7ffc00c0) == 0x3a80080) + { itype = FRVBF_INSN_CCALLL; goto extract_sfmt_cjmpl; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 1 : itype = FRVBF_INSN_CFCKNO; goto extract_sfmt_cfckra; - case 2 : itype = FRVBF_INSN_CCKC; goto extract_sfmt_cckeq; - case 3 : itype = FRVBF_INSN_CFCKU; goto extract_sfmt_cfckne; - case 4 : itype = FRVBF_INSN_CCKV; goto extract_sfmt_cckeq; - case 5 : itype = FRVBF_INSN_CFCKGT; goto extract_sfmt_cfckne; - case 6 : itype = FRVBF_INSN_CCKLT; goto extract_sfmt_cckeq; - case 7 : itype = FRVBF_INSN_CFCKUG; goto extract_sfmt_cfckne; - case 8 : itype = FRVBF_INSN_CCKEQ; goto extract_sfmt_cckeq; - case 9 : itype = FRVBF_INSN_CFCKLT; goto extract_sfmt_cfckne; - case 10 : itype = FRVBF_INSN_CCKLS; goto extract_sfmt_cckeq; - case 11 : itype = FRVBF_INSN_CFCKUL; goto extract_sfmt_cfckne; - case 12 : itype = FRVBF_INSN_CCKN; goto extract_sfmt_cckeq; - case 13 : itype = FRVBF_INSN_CFCKLG; goto extract_sfmt_cfckne; - case 14 : itype = FRVBF_INSN_CCKLE; goto extract_sfmt_cckeq; - case 15 : itype = FRVBF_INSN_CFCKNE; goto extract_sfmt_cfckne; - case 16 : itype = FRVBF_INSN_CCKRA; goto extract_sfmt_cckra; - case 17 : itype = FRVBF_INSN_CFCKEQ; goto extract_sfmt_cfckne; - case 18 : itype = FRVBF_INSN_CCKNC; goto extract_sfmt_cckeq; - case 19 : itype = FRVBF_INSN_CFCKUE; goto extract_sfmt_cfckne; - case 20 : itype = FRVBF_INSN_CCKNV; goto extract_sfmt_cckeq; - case 21 : itype = FRVBF_INSN_CFCKGE; goto extract_sfmt_cfckne; - case 22 : itype = FRVBF_INSN_CCKGE; goto extract_sfmt_cckeq; - case 23 : itype = FRVBF_INSN_CFCKUGE; goto extract_sfmt_cfckne; - case 24 : itype = FRVBF_INSN_CCKNE; goto extract_sfmt_cckeq; - case 25 : itype = FRVBF_INSN_CFCKLE; goto extract_sfmt_cfckne; - case 26 : itype = FRVBF_INSN_CCKHI; goto extract_sfmt_cckeq; - case 27 : itype = FRVBF_INSN_CFCKULE; goto extract_sfmt_cfckne; - case 28 : itype = FRVBF_INSN_CCKP; goto extract_sfmt_cckeq; - case 29 : itype = FRVBF_INSN_CFCKO; goto extract_sfmt_cfckne; - case 30 : itype = FRVBF_INSN_CCKGT; goto extract_sfmt_cckeq; - case 31 : itype = FRVBF_INSN_CFCKRA; goto extract_sfmt_cfckra; + case 1 : + if ((entire_insn & 0x79fff0ff) == 0x1a80040) + { itype = FRVBF_INSN_CFCKNO; goto extract_sfmt_cfckra; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x79fff0fc) == 0x9a80000) + { itype = FRVBF_INSN_CCKC; goto extract_sfmt_cckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x79fff0fc) == 0x9a80040) + { itype = FRVBF_INSN_CFCKU; goto extract_sfmt_cfckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 4 : + if ((entire_insn & 0x79fff0fc) == 0x11a80000) + { itype = FRVBF_INSN_CCKV; goto extract_sfmt_cckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 5 : + if ((entire_insn & 0x79fff0fc) == 0x11a80040) + { itype = FRVBF_INSN_CFCKGT; goto extract_sfmt_cfckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 6 : + if ((entire_insn & 0x79fff0fc) == 0x19a80000) + { itype = FRVBF_INSN_CCKLT; goto extract_sfmt_cckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 7 : + if ((entire_insn & 0x79fff0fc) == 0x19a80040) + { itype = FRVBF_INSN_CFCKUG; goto extract_sfmt_cfckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 8 : + if ((entire_insn & 0x79fff0fc) == 0x21a80000) + { itype = FRVBF_INSN_CCKEQ; goto extract_sfmt_cckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 9 : + if ((entire_insn & 0x79fff0fc) == 0x21a80040) + { itype = FRVBF_INSN_CFCKLT; goto extract_sfmt_cfckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 10 : + if ((entire_insn & 0x79fff0fc) == 0x29a80000) + { itype = FRVBF_INSN_CCKLS; goto extract_sfmt_cckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 11 : + if ((entire_insn & 0x79fff0fc) == 0x29a80040) + { itype = FRVBF_INSN_CFCKUL; goto extract_sfmt_cfckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 12 : + if ((entire_insn & 0x79fff0fc) == 0x31a80000) + { itype = FRVBF_INSN_CCKN; goto extract_sfmt_cckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 13 : + if ((entire_insn & 0x79fff0fc) == 0x31a80040) + { itype = FRVBF_INSN_CFCKLG; goto extract_sfmt_cfckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : + if ((entire_insn & 0x79fff0fc) == 0x39a80000) + { itype = FRVBF_INSN_CCKLE; goto extract_sfmt_cckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 15 : + if ((entire_insn & 0x79fff0fc) == 0x39a80040) + { itype = FRVBF_INSN_CFCKNE; goto extract_sfmt_cfckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 16 : + if ((entire_insn & 0x79fff0ff) == 0x41a80000) + { itype = FRVBF_INSN_CCKRA; goto extract_sfmt_cckra; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 17 : + if ((entire_insn & 0x79fff0fc) == 0x41a80040) + { itype = FRVBF_INSN_CFCKEQ; goto extract_sfmt_cfckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 18 : + if ((entire_insn & 0x79fff0fc) == 0x49a80000) + { itype = FRVBF_INSN_CCKNC; goto extract_sfmt_cckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 19 : + if ((entire_insn & 0x79fff0fc) == 0x49a80040) + { itype = FRVBF_INSN_CFCKUE; goto extract_sfmt_cfckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 20 : + if ((entire_insn & 0x79fff0fc) == 0x51a80000) + { itype = FRVBF_INSN_CCKNV; goto extract_sfmt_cckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 21 : + if ((entire_insn & 0x79fff0fc) == 0x51a80040) + { itype = FRVBF_INSN_CFCKGE; goto extract_sfmt_cfckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 22 : + if ((entire_insn & 0x79fff0fc) == 0x59a80000) + { itype = FRVBF_INSN_CCKGE; goto extract_sfmt_cckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 23 : + if ((entire_insn & 0x79fff0fc) == 0x59a80040) + { itype = FRVBF_INSN_CFCKUGE; goto extract_sfmt_cfckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 24 : + if ((entire_insn & 0x79fff0fc) == 0x61a80000) + { itype = FRVBF_INSN_CCKNE; goto extract_sfmt_cckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 25 : + if ((entire_insn & 0x79fff0fc) == 0x61a80040) + { itype = FRVBF_INSN_CFCKLE; goto extract_sfmt_cfckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 26 : + if ((entire_insn & 0x79fff0fc) == 0x69a80000) + { itype = FRVBF_INSN_CCKHI; goto extract_sfmt_cckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 27 : + if ((entire_insn & 0x79fff0fc) == 0x69a80040) + { itype = FRVBF_INSN_CFCKULE; goto extract_sfmt_cfckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 28 : + if ((entire_insn & 0x79fff0fc) == 0x71a80000) + { itype = FRVBF_INSN_CCKP; goto extract_sfmt_cckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 29 : + if ((entire_insn & 0x79fff0fc) == 0x71a80040) + { itype = FRVBF_INSN_CFCKO; goto extract_sfmt_cfckne; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 30 : + if ((entire_insn & 0x79fff0fc) == 0x79a80000) + { itype = FRVBF_INSN_CCKGT; goto extract_sfmt_cckeq; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 31 : + if ((entire_insn & 0x79fff0ff) == 0x79a80040) + { itype = FRVBF_INSN_CFCKRA; goto extract_sfmt_cfckra; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1703,8 +3302,14 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CFITOS; goto extract_sfmt_cfitos; - case 1 : itype = FRVBF_INSN_CFSTOI; goto extract_sfmt_cfstoi; + case 0 : + if ((entire_insn & 0x1fff0c0) == 0x1ac0000) + { itype = FRVBF_INSN_CFITOS; goto extract_sfmt_cfitos; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fff0c0) == 0x1ac0040) + { itype = FRVBF_INSN_CFSTOI; goto extract_sfmt_cfstoi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1713,9 +3318,18 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CFMOVS; goto extract_sfmt_cfmovs; - case 1 : itype = FRVBF_INSN_CFNEGS; goto extract_sfmt_cfmovs; - case 2 : itype = FRVBF_INSN_CFABSS; goto extract_sfmt_cfmovs; + case 0 : + if ((entire_insn & 0x1fff0c0) == 0x1b00000) + { itype = FRVBF_INSN_CFMOVS; goto extract_sfmt_cfmovs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fff0c0) == 0x1b00040) + { itype = FRVBF_INSN_CFNEGS; goto extract_sfmt_cfmovs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fff0c0) == 0x1b00080) + { itype = FRVBF_INSN_CFABSS; goto extract_sfmt_cfmovs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1724,9 +3338,18 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CFADDS; goto extract_sfmt_cfadds; - case 1 : itype = FRVBF_INSN_CFSUBS; goto extract_sfmt_cfadds; - case 2 : itype = FRVBF_INSN_CFCMPS; goto extract_sfmt_cfcmps; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1b40000) + { itype = FRVBF_INSN_CFADDS; goto extract_sfmt_cfadds; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1b40040) + { itype = FRVBF_INSN_CFSUBS; goto extract_sfmt_cfadds; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x79fc00c0) == 0x1b40080) + { itype = FRVBF_INSN_CFCMPS; goto extract_sfmt_cfcmps; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1735,9 +3358,18 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CFMULS; goto extract_sfmt_cfadds; - case 1 : itype = FRVBF_INSN_CFDIVS; goto extract_sfmt_cfadds; - case 2 : itype = FRVBF_INSN_CFSQRTS; goto extract_sfmt_cfmovs; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1b80000) + { itype = FRVBF_INSN_CFMULS; goto extract_sfmt_cfadds; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1b80040) + { itype = FRVBF_INSN_CFDIVS; goto extract_sfmt_cfadds; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fff0c0) == 0x1b80080) + { itype = FRVBF_INSN_CFSQRTS; goto extract_sfmt_cfmovs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1746,10 +3378,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CFMADDS; goto extract_sfmt_cfmadds; - case 1 : itype = FRVBF_INSN_CFMSUBS; goto extract_sfmt_cfmadds; - case 2 : itype = FRVBF_INSN_CFMAS; goto extract_sfmt_cfmas; - case 3 : itype = FRVBF_INSN_CFMSS; goto extract_sfmt_cfmas; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1bc0000) + { itype = FRVBF_INSN_CFMADDS; goto extract_sfmt_cfmadds; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1bc0040) + { itype = FRVBF_INSN_CFMSUBS; goto extract_sfmt_cfmadds; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x1bc0080) + { itype = FRVBF_INSN_CFMAS; goto extract_sfmt_cfmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc00c0) == 0x1bc00c0) + { itype = FRVBF_INSN_CFMSS; goto extract_sfmt_cfmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1758,10 +3402,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CMAND; goto extract_sfmt_cmand; - case 1 : itype = FRVBF_INSN_CMOR; goto extract_sfmt_cmand; - case 2 : itype = FRVBF_INSN_CMXOR; goto extract_sfmt_cmand; - case 3 : itype = FRVBF_INSN_CMNOT; goto extract_sfmt_cmnot; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1c00000) + { itype = FRVBF_INSN_CMAND; goto extract_sfmt_cmand; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1c00040) + { itype = FRVBF_INSN_CMOR; goto extract_sfmt_cmand; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x1c00080) + { itype = FRVBF_INSN_CMXOR; goto extract_sfmt_cmand; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fff0c0) == 0x1c000c0) + { itype = FRVBF_INSN_CMNOT; goto extract_sfmt_cmnot; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1770,10 +3426,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CMADDHSS; goto extract_sfmt_cmaddhss; - case 1 : itype = FRVBF_INSN_CMADDHUS; goto extract_sfmt_cmaddhss; - case 2 : itype = FRVBF_INSN_CMSUBHSS; goto extract_sfmt_cmaddhss; - case 3 : itype = FRVBF_INSN_CMSUBHUS; goto extract_sfmt_cmaddhss; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1c40000) + { itype = FRVBF_INSN_CMADDHSS; goto extract_sfmt_cmaddhss; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1c40040) + { itype = FRVBF_INSN_CMADDHUS; goto extract_sfmt_cmaddhss; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x1c40080) + { itype = FRVBF_INSN_CMSUBHSS; goto extract_sfmt_cmaddhss; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc00c0) == 0x1c400c0) + { itype = FRVBF_INSN_CMSUBHUS; goto extract_sfmt_cmaddhss; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1782,10 +3450,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CMMULHS; goto extract_sfmt_cmmulhs; - case 1 : itype = FRVBF_INSN_CMMULHU; goto extract_sfmt_cmmulhs; - case 2 : itype = FRVBF_INSN_CMMACHS; goto extract_sfmt_cmmachs; - case 3 : itype = FRVBF_INSN_CMMACHU; goto extract_sfmt_cmmachu; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1c80000) + { itype = FRVBF_INSN_CMMULHS; goto extract_sfmt_cmmulhs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1c80040) + { itype = FRVBF_INSN_CMMULHU; goto extract_sfmt_cmmulhs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x1c80080) + { itype = FRVBF_INSN_CMMACHS; goto extract_sfmt_cmmachs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc00c0) == 0x1c800c0) + { itype = FRVBF_INSN_CMMACHU; goto extract_sfmt_cmmachu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1794,10 +3474,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CMQADDHSS; goto extract_sfmt_cmqaddhss; - case 1 : itype = FRVBF_INSN_CMQADDHUS; goto extract_sfmt_cmqaddhss; - case 2 : itype = FRVBF_INSN_CMQSUBHSS; goto extract_sfmt_cmqaddhss; - case 3 : itype = FRVBF_INSN_CMQSUBHUS; goto extract_sfmt_cmqaddhss; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1cc0000) + { itype = FRVBF_INSN_CMQADDHSS; goto extract_sfmt_cmqaddhss; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1cc0040) + { itype = FRVBF_INSN_CMQADDHUS; goto extract_sfmt_cmqaddhss; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x1cc0080) + { itype = FRVBF_INSN_CMQSUBHSS; goto extract_sfmt_cmqaddhss; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc00c0) == 0x1cc00c0) + { itype = FRVBF_INSN_CMQSUBHUS; goto extract_sfmt_cmqaddhss; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1806,10 +3498,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CMQMULHS; goto extract_sfmt_cmqmulhs; - case 1 : itype = FRVBF_INSN_CMQMULHU; goto extract_sfmt_cmqmulhs; - case 2 : itype = FRVBF_INSN_CMQMACHS; goto extract_sfmt_cmqmachs; - case 3 : itype = FRVBF_INSN_CMQMACHU; goto extract_sfmt_cmqmachu; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1d00000) + { itype = FRVBF_INSN_CMQMULHS; goto extract_sfmt_cmqmulhs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1d00040) + { itype = FRVBF_INSN_CMQMULHU; goto extract_sfmt_cmqmulhs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x1d00080) + { itype = FRVBF_INSN_CMQMACHS; goto extract_sfmt_cmqmachs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc00c0) == 0x1d000c0) + { itype = FRVBF_INSN_CMQMACHU; goto extract_sfmt_cmqmachu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1818,10 +3522,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CMCPXRS; goto extract_sfmt_cmcpxrs; - case 1 : itype = FRVBF_INSN_CMCPXRU; goto extract_sfmt_cmcpxrs; - case 2 : itype = FRVBF_INSN_CMCPXIS; goto extract_sfmt_cmcpxrs; - case 3 : itype = FRVBF_INSN_CMCPXIU; goto extract_sfmt_cmcpxrs; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1d40000) + { itype = FRVBF_INSN_CMCPXRS; goto extract_sfmt_cmcpxrs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1d40040) + { itype = FRVBF_INSN_CMCPXRU; goto extract_sfmt_cmcpxrs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc00c0) == 0x1d40080) + { itype = FRVBF_INSN_CMCPXIS; goto extract_sfmt_cmcpxrs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc00c0) == 0x1d400c0) + { itype = FRVBF_INSN_CMCPXIU; goto extract_sfmt_cmcpxrs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1830,8 +3546,14 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CMEXPDHW; goto extract_sfmt_cmexpdhw; - case 1 : itype = FRVBF_INSN_CMEXPDHD; goto extract_sfmt_cmexpdhd; + case 0 : + if ((entire_insn & 0x1fc00c0) == 0x1d80080) + { itype = FRVBF_INSN_CMEXPDHW; goto extract_sfmt_cmexpdhw; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc00c0) == 0x1d800c0) + { itype = FRVBF_INSN_CMEXPDHD; goto extract_sfmt_cmexpdhd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1840,9 +3562,18 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (3 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_CMBTOH; goto extract_sfmt_cmbtoh; - case 1 : itype = FRVBF_INSN_CMHTOB; goto extract_sfmt_cmhtob; - case 2 : itype = FRVBF_INSN_CMBTOHE; goto extract_sfmt_cmbtohe; + case 0 : + if ((entire_insn & 0x1fff0c0) == 0x1dc0000) + { itype = FRVBF_INSN_CMBTOH; goto extract_sfmt_cmbtoh; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fff0c0) == 0x1dc0040) + { itype = FRVBF_INSN_CMHTOB; goto extract_sfmt_cmhtob; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fff0c0) == 0x1dc0080) + { itype = FRVBF_INSN_CMBTOHE; goto extract_sfmt_cmbtohe; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1851,31 +3582,106 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (63 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_MQXMACHS; goto extract_sfmt_mqmachs; - case 1 : itype = FRVBF_INSN_MQXMACXHS; goto extract_sfmt_mqmachs; - case 2 : itype = FRVBF_INSN_MQMACXHS; goto extract_sfmt_mqmachs; - case 4 : itype = FRVBF_INSN_MADDACCS; goto extract_sfmt_maddaccs; - case 5 : itype = FRVBF_INSN_MSUBACCS; goto extract_sfmt_maddaccs; - case 6 : itype = FRVBF_INSN_MDADDACCS; goto extract_sfmt_mdaddaccs; - case 7 : itype = FRVBF_INSN_MDSUBACCS; goto extract_sfmt_mdaddaccs; - case 8 : itype = FRVBF_INSN_MASACCS; goto extract_sfmt_masaccs; - case 9 : itype = FRVBF_INSN_MDASACCS; goto extract_sfmt_mdasaccs; - case 10 : itype = FRVBF_INSN_MABSHS; goto extract_sfmt_mabshs; - case 11 : itype = FRVBF_INSN_MDROTLI; goto extract_sfmt_mdrotli; - case 12 : itype = FRVBF_INSN_MCPLHI; goto extract_sfmt_mcplhi; - case 13 : itype = FRVBF_INSN_MCPLI; goto extract_sfmt_mcpli; - case 14 : itype = FRVBF_INSN_MDCUTSSI; goto extract_sfmt_mdcutssi; - case 15 : itype = FRVBF_INSN_MQSATHS; goto extract_sfmt_mqsaths; - case 16 : itype = FRVBF_INSN_MQLCLRHS; goto extract_sfmt_mqsaths; - case 17 : itype = FRVBF_INSN_MQSLLHI; goto extract_sfmt_mqsllhi; - case 19 : itype = FRVBF_INSN_MQSRAHI; goto extract_sfmt_mqsllhi; - case 20 : itype = FRVBF_INSN_MQLMTHS; goto extract_sfmt_mqsaths; - case 32 : itype = FRVBF_INSN_MHSETLOS; goto extract_sfmt_mhsetlos; - case 33 : itype = FRVBF_INSN_MHSETLOH; goto extract_sfmt_mhsetloh; - case 34 : itype = FRVBF_INSN_MHSETHIS; goto extract_sfmt_mhsethis; - case 35 : itype = FRVBF_INSN_MHSETHIH; goto extract_sfmt_mhsethih; - case 36 : itype = FRVBF_INSN_MHDSETS; goto extract_sfmt_mhdsets; - case 37 : itype = FRVBF_INSN_MHDSETH; goto extract_sfmt_mhdseth; + case 0 : + if ((entire_insn & 0x1fc0fc0) == 0x1e00000) + { itype = FRVBF_INSN_MQXMACHS; goto extract_sfmt_mqmachs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc0fc0) == 0x1e00040) + { itype = FRVBF_INSN_MQXMACXHS; goto extract_sfmt_mqmachs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc0fc0) == 0x1e00080) + { itype = FRVBF_INSN_MQMACXHS; goto extract_sfmt_mqmachs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 4 : + if ((entire_insn & 0x1fc0fff) == 0x1e00100) + { itype = FRVBF_INSN_MADDACCS; goto extract_sfmt_maddaccs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 5 : + if ((entire_insn & 0x1fc0fff) == 0x1e00140) + { itype = FRVBF_INSN_MSUBACCS; goto extract_sfmt_maddaccs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 6 : + if ((entire_insn & 0x1fc0fff) == 0x1e00180) + { itype = FRVBF_INSN_MDADDACCS; goto extract_sfmt_mdaddaccs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 7 : + if ((entire_insn & 0x1fc0fff) == 0x1e001c0) + { itype = FRVBF_INSN_MDSUBACCS; goto extract_sfmt_mdaddaccs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 8 : + if ((entire_insn & 0x1fc0fff) == 0x1e00200) + { itype = FRVBF_INSN_MASACCS; goto extract_sfmt_masaccs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 9 : + if ((entire_insn & 0x1fc0fff) == 0x1e00240) + { itype = FRVBF_INSN_MDASACCS; goto extract_sfmt_mdasaccs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 10 : + if ((entire_insn & 0x1ffffc0) == 0x1e00280) + { itype = FRVBF_INSN_MABSHS; goto extract_sfmt_mabshs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 11 : + if ((entire_insn & 0x1fc0fc0) == 0x1e002c0) + { itype = FRVBF_INSN_MDROTLI; goto extract_sfmt_mdrotli; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 12 : + if ((entire_insn & 0x1fc0fc0) == 0x1e00300) + { itype = FRVBF_INSN_MCPLHI; goto extract_sfmt_mcplhi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 13 : + if ((entire_insn & 0x1fc0fc0) == 0x1e00340) + { itype = FRVBF_INSN_MCPLI; goto extract_sfmt_mcpli; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : + if ((entire_insn & 0x1fc0fc0) == 0x1e00380) + { itype = FRVBF_INSN_MDCUTSSI; goto extract_sfmt_mdcutssi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 15 : + if ((entire_insn & 0x1fc0fc0) == 0x1e003c0) + { itype = FRVBF_INSN_MQSATHS; goto extract_sfmt_mqsaths; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 16 : + if ((entire_insn & 0x1fc0fc0) == 0x1e00400) + { itype = FRVBF_INSN_MQLCLRHS; goto extract_sfmt_mqsaths; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 17 : + if ((entire_insn & 0x1fc0fc0) == 0x1e00440) + { itype = FRVBF_INSN_MQSLLHI; goto extract_sfmt_mqsllhi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 19 : + if ((entire_insn & 0x1fc0fc0) == 0x1e004c0) + { itype = FRVBF_INSN_MQSRAHI; goto extract_sfmt_mqsllhi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 20 : + if ((entire_insn & 0x1fc0fc0) == 0x1e00500) + { itype = FRVBF_INSN_MQLMTHS; goto extract_sfmt_mqsaths; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 32 : + if ((entire_insn & 0x1fc0fc0) == 0x1e00800) + { itype = FRVBF_INSN_MHSETLOS; goto extract_sfmt_mhsetlos; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 33 : + if ((entire_insn & 0x1ffffe0) == 0x1e00840) + { itype = FRVBF_INSN_MHSETLOH; goto extract_sfmt_mhsetloh; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 34 : + if ((entire_insn & 0x1fc0fc0) == 0x1e00880) + { itype = FRVBF_INSN_MHSETHIS; goto extract_sfmt_mhsethis; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 35 : + if ((entire_insn & 0x1ffffe0) == 0x1e008c0) + { itype = FRVBF_INSN_MHSETHIH; goto extract_sfmt_mhsethih; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 36 : + if ((entire_insn & 0x1fc0fc0) == 0x1e00900) + { itype = FRVBF_INSN_MHDSETS; goto extract_sfmt_mhdsets; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 37 : + if ((entire_insn & 0x1ffffe0) == 0x1e00940) + { itype = FRVBF_INSN_MHDSETH; goto extract_sfmt_mhdseth; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1889,10 +3695,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (1 << 1)) | ((insn >> 9) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_FITOS; goto extract_sfmt_fitos; - case 1 : itype = FRVBF_INSN_FMULS; goto extract_sfmt_fadds; - case 2 : itype = FRVBF_INSN_NFITOS; goto extract_sfmt_nfitos; - case 3 : itype = FRVBF_INSN_NFMULS; goto extract_sfmt_nfadds; + case 0 : + if ((entire_insn & 0x1ffffc0) == 0x1e40000) + { itype = FRVBF_INSN_FITOS; goto extract_sfmt_fitos; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40200) + { itype = FRVBF_INSN_FMULS; goto extract_sfmt_fadds; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1ffffc0) == 0x1e40800) + { itype = FRVBF_INSN_NFITOS; goto extract_sfmt_nfitos; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40a00) + { itype = FRVBF_INSN_NFMULS; goto extract_sfmt_nfadds; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1901,10 +3719,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (1 << 1)) | ((insn >> 9) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_FSTOI; goto extract_sfmt_fstoi; - case 1 : itype = FRVBF_INSN_FDIVS; goto extract_sfmt_fadds; - case 2 : itype = FRVBF_INSN_NFSTOI; goto extract_sfmt_nfstoi; - case 3 : itype = FRVBF_INSN_NFDIVS; goto extract_sfmt_nfadds; + case 0 : + if ((entire_insn & 0x1ffffc0) == 0x1e40040) + { itype = FRVBF_INSN_FSTOI; goto extract_sfmt_fstoi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40240) + { itype = FRVBF_INSN_FDIVS; goto extract_sfmt_fadds; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1ffffc0) == 0x1e40840) + { itype = FRVBF_INSN_NFSTOI; goto extract_sfmt_nfstoi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40a40) + { itype = FRVBF_INSN_NFDIVS; goto extract_sfmt_nfadds; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1913,8 +3743,14 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 9) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_FMOVS; goto extract_sfmt_fmovs; - case 1 : itype = FRVBF_INSN_FCMPS; goto extract_sfmt_fcmps; + case 0 : + if ((entire_insn & 0x1ffffc0) == 0x1e40080) + { itype = FRVBF_INSN_FMOVS; goto extract_sfmt_fmovs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x79fc0fc0) == 0x1e40280) + { itype = FRVBF_INSN_FCMPS; goto extract_sfmt_fcmps; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1923,9 +3759,18 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (1 << 1)) | ((insn >> 9) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_FNEGS; goto extract_sfmt_fmovs; - case 1 : itype = FRVBF_INSN_FMADDS; goto extract_sfmt_fmadds; - case 3 : itype = FRVBF_INSN_NFMADDS; goto extract_sfmt_nfmadds; + case 0 : + if ((entire_insn & 0x1ffffc0) == 0x1e400c0) + { itype = FRVBF_INSN_FNEGS; goto extract_sfmt_fmovs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc0fc0) == 0x1e402c0) + { itype = FRVBF_INSN_FMADDS; goto extract_sfmt_fmadds; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40ac0) + { itype = FRVBF_INSN_NFMADDS; goto extract_sfmt_nfmadds; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1934,9 +3779,18 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (1 << 1)) | ((insn >> 9) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_FABSS; goto extract_sfmt_fmovs; - case 1 : itype = FRVBF_INSN_FMSUBS; goto extract_sfmt_fmadds; - case 3 : itype = FRVBF_INSN_NFMSUBS; goto extract_sfmt_nfmadds; + case 0 : + if ((entire_insn & 0x1ffffc0) == 0x1e40100) + { itype = FRVBF_INSN_FABSS; goto extract_sfmt_fmovs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40300) + { itype = FRVBF_INSN_FMSUBS; goto extract_sfmt_fmadds; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40b00) + { itype = FRVBF_INSN_NFMSUBS; goto extract_sfmt_nfmadds; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1945,9 +3799,18 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (1 << 1)) | ((insn >> 9) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_FSQRTS; goto extract_sfmt_fmovs; - case 1 : itype = FRVBF_INSN_FNOP; goto extract_sfmt_rei; - case 2 : itype = FRVBF_INSN_NFSQRTS; goto extract_sfmt_nfsqrts; + case 0 : + if ((entire_insn & 0x1ffffc0) == 0x1e40140) + { itype = FRVBF_INSN_FSQRTS; goto extract_sfmt_fmovs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x7fffffff) == 0x1e40340) + { itype = FRVBF_INSN_FNOP; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1ffffc0) == 0x1e40940) + { itype = FRVBF_INSN_NFSQRTS; goto extract_sfmt_nfsqrts; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1956,10 +3819,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (1 << 1)) | ((insn >> 9) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_FADDS; goto extract_sfmt_fadds; - case 1 : itype = FRVBF_INSN_FMAS; goto extract_sfmt_fmas; - case 2 : itype = FRVBF_INSN_NFADDS; goto extract_sfmt_nfadds; - case 3 : itype = FRVBF_INSN_NFMAS; goto extract_sfmt_fmas; + case 0 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40180) + { itype = FRVBF_INSN_FADDS; goto extract_sfmt_fadds; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40380) + { itype = FRVBF_INSN_FMAS; goto extract_sfmt_fmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40980) + { itype = FRVBF_INSN_NFADDS; goto extract_sfmt_nfadds; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40b80) + { itype = FRVBF_INSN_NFMAS; goto extract_sfmt_fmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1968,10 +3843,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (1 << 1)) | ((insn >> 9) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_FSUBS; goto extract_sfmt_fadds; - case 1 : itype = FRVBF_INSN_FMSS; goto extract_sfmt_fmas; - case 2 : itype = FRVBF_INSN_NFSUBS; goto extract_sfmt_nfadds; - case 3 : itype = FRVBF_INSN_NFMSS; goto extract_sfmt_fmas; + case 0 : + if ((entire_insn & 0x1fc0fc0) == 0x1e401c0) + { itype = FRVBF_INSN_FSUBS; goto extract_sfmt_fadds; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc0fc0) == 0x1e403c0) + { itype = FRVBF_INSN_FMSS; goto extract_sfmt_fmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc0fc0) == 0x1e409c0) + { itype = FRVBF_INSN_NFSUBS; goto extract_sfmt_nfadds; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40bc0) + { itype = FRVBF_INSN_NFMSS; goto extract_sfmt_fmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1980,10 +3867,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (1 << 1)) | ((insn >> 9) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_FDITOS; goto extract_sfmt_fditos; - case 1 : itype = FRVBF_INSN_FDMULS; goto extract_sfmt_fmas; - case 2 : itype = FRVBF_INSN_NFDITOS; goto extract_sfmt_fditos; - case 3 : itype = FRVBF_INSN_NFDMULS; goto extract_sfmt_fmas; + case 0 : + if ((entire_insn & 0x1ffffc0) == 0x1e40400) + { itype = FRVBF_INSN_FDITOS; goto extract_sfmt_fditos; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40600) + { itype = FRVBF_INSN_FDMULS; goto extract_sfmt_fmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1ffffc0) == 0x1e40c00) + { itype = FRVBF_INSN_NFDITOS; goto extract_sfmt_fditos; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40e00) + { itype = FRVBF_INSN_NFDMULS; goto extract_sfmt_fmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -1992,10 +3891,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (1 << 1)) | ((insn >> 9) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_FDSTOI; goto extract_sfmt_fdstoi; - case 1 : itype = FRVBF_INSN_FDDIVS; goto extract_sfmt_fmas; - case 2 : itype = FRVBF_INSN_NFDSTOI; goto extract_sfmt_fdstoi; - case 3 : itype = FRVBF_INSN_NFDDIVS; goto extract_sfmt_fmas; + case 0 : + if ((entire_insn & 0x1ffffc0) == 0x1e40440) + { itype = FRVBF_INSN_FDSTOI; goto extract_sfmt_fdstoi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40640) + { itype = FRVBF_INSN_FDDIVS; goto extract_sfmt_fmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1ffffc0) == 0x1e40c40) + { itype = FRVBF_INSN_NFDSTOI; goto extract_sfmt_fdstoi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40e40) + { itype = FRVBF_INSN_NFDDIVS; goto extract_sfmt_fmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2004,9 +3915,18 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (1 << 1)) | ((insn >> 9) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_FDMOVS; goto extract_sfmt_fdmovs; - case 1 : itype = FRVBF_INSN_FDCMPS; goto extract_sfmt_fdcmps; - case 3 : itype = FRVBF_INSN_NFDCMPS; goto extract_sfmt_nfdcmps; + case 0 : + if ((entire_insn & 0x1ffffc0) == 0x1e40480) + { itype = FRVBF_INSN_FDMOVS; goto extract_sfmt_fdmovs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x79fc0fc0) == 0x1e40680) + { itype = FRVBF_INSN_FDCMPS; goto extract_sfmt_fdcmps; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x79fc0fc0) == 0x1e40e80) + { itype = FRVBF_INSN_NFDCMPS; goto extract_sfmt_nfdcmps; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2015,9 +3935,18 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (1 << 1)) | ((insn >> 9) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_FDNEGS; goto extract_sfmt_fdmovs; - case 1 : itype = FRVBF_INSN_FDMADDS; goto extract_sfmt_fdmadds; - case 3 : itype = FRVBF_INSN_NFDMADDS; goto extract_sfmt_fdmadds; + case 0 : + if ((entire_insn & 0x1ffffc0) == 0x1e404c0) + { itype = FRVBF_INSN_FDNEGS; goto extract_sfmt_fdmovs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc0fc0) == 0x1e406c0) + { itype = FRVBF_INSN_FDMADDS; goto extract_sfmt_fdmadds; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40ec0) + { itype = FRVBF_INSN_NFDMADDS; goto extract_sfmt_fdmadds; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2026,9 +3955,18 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (1 << 1)) | ((insn >> 9) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_FDABSS; goto extract_sfmt_fdmovs; - case 1 : itype = FRVBF_INSN_FDMAS; goto extract_sfmt_fdmas; - case 3 : itype = FRVBF_INSN_NFDMAS; goto extract_sfmt_fdmas; + case 0 : + if ((entire_insn & 0x1ffffc0) == 0x1e40500) + { itype = FRVBF_INSN_FDABSS; goto extract_sfmt_fdmovs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40700) + { itype = FRVBF_INSN_FDMAS; goto extract_sfmt_fdmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40f00) + { itype = FRVBF_INSN_NFDMAS; goto extract_sfmt_fdmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2037,10 +3975,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (1 << 1)) | ((insn >> 9) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_FDSQRTS; goto extract_sfmt_fdmovs; - case 1 : itype = FRVBF_INSN_FDMSS; goto extract_sfmt_fdmas; - case 2 : itype = FRVBF_INSN_NFDSQRTS; goto extract_sfmt_fdmovs; - case 3 : itype = FRVBF_INSN_NFDMSS; goto extract_sfmt_fdmas; + case 0 : + if ((entire_insn & 0x1ffffc0) == 0x1e40540) + { itype = FRVBF_INSN_FDSQRTS; goto extract_sfmt_fdmovs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40740) + { itype = FRVBF_INSN_FDMSS; goto extract_sfmt_fdmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1ffffc0) == 0x1e40d40) + { itype = FRVBF_INSN_NFDSQRTS; goto extract_sfmt_fdmovs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40f40) + { itype = FRVBF_INSN_NFDMSS; goto extract_sfmt_fdmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2049,10 +3999,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (1 << 1)) | ((insn >> 9) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_FDADDS; goto extract_sfmt_fmas; - case 1 : itype = FRVBF_INSN_FDSADS; goto extract_sfmt_fmas; - case 2 : itype = FRVBF_INSN_NFDADDS; goto extract_sfmt_fmas; - case 3 : itype = FRVBF_INSN_NFDSADS; goto extract_sfmt_fmas; + case 0 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40580) + { itype = FRVBF_INSN_FDADDS; goto extract_sfmt_fmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40780) + { itype = FRVBF_INSN_FDSADS; goto extract_sfmt_fmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40d80) + { itype = FRVBF_INSN_NFDADDS; goto extract_sfmt_fmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40f80) + { itype = FRVBF_INSN_NFDSADS; goto extract_sfmt_fmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2061,10 +4023,22 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 10) & (1 << 1)) | ((insn >> 9) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_FDSUBS; goto extract_sfmt_fmas; - case 1 : itype = FRVBF_INSN_FDMULCS; goto extract_sfmt_fmas; - case 2 : itype = FRVBF_INSN_NFDSUBS; goto extract_sfmt_fmas; - case 3 : itype = FRVBF_INSN_NFDMULCS; goto extract_sfmt_fmas; + case 0 : + if ((entire_insn & 0x1fc0fc0) == 0x1e405c0) + { itype = FRVBF_INSN_FDSUBS; goto extract_sfmt_fmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc0fc0) == 0x1e407c0) + { itype = FRVBF_INSN_FDMULCS; goto extract_sfmt_fmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40dc0) + { itype = FRVBF_INSN_NFDSUBS; goto extract_sfmt_fmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1fc0fc0) == 0x1e40fc0) + { itype = FRVBF_INSN_NFDMULCS; goto extract_sfmt_fmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2076,21 +4050,66 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (15 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_FITOD; goto extract_sfmt_fitod; - case 1 : itype = FRVBF_INSN_FDTOI; goto extract_sfmt_fdtoi; - case 2 : itype = FRVBF_INSN_FMOVD; goto extract_sfmt_fmovd; - case 3 : itype = FRVBF_INSN_FNEGD; goto extract_sfmt_fmovd; - case 4 : itype = FRVBF_INSN_FABSD; goto extract_sfmt_fmovd; - case 5 : itype = FRVBF_INSN_FSQRTD; goto extract_sfmt_fmovd; - case 6 : itype = FRVBF_INSN_FADDD; goto extract_sfmt_faddd; - case 7 : itype = FRVBF_INSN_FSUBD; goto extract_sfmt_faddd; - case 8 : itype = FRVBF_INSN_FMULD; goto extract_sfmt_faddd; - case 9 : itype = FRVBF_INSN_FDIVD; goto extract_sfmt_faddd; - case 10 : itype = FRVBF_INSN_FCMPD; goto extract_sfmt_fcmpd; - case 11 : itype = FRVBF_INSN_FMADDD; goto extract_sfmt_fmaddd; - case 12 : itype = FRVBF_INSN_FMSUBD; goto extract_sfmt_fmaddd; - case 14 : itype = FRVBF_INSN_FMAD; goto extract_sfmt_fmas; - case 15 : itype = FRVBF_INSN_FMSD; goto extract_sfmt_fmas; + case 0 : + if ((entire_insn & 0x1ffffc0) == 0x1e80000) + { itype = FRVBF_INSN_FITOD; goto extract_sfmt_fitod; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1ffffc0) == 0x1e80040) + { itype = FRVBF_INSN_FDTOI; goto extract_sfmt_fdtoi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1ffffc0) == 0x1e80080) + { itype = FRVBF_INSN_FMOVD; goto extract_sfmt_fmovd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1ffffc0) == 0x1e800c0) + { itype = FRVBF_INSN_FNEGD; goto extract_sfmt_fmovd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 4 : + if ((entire_insn & 0x1ffffc0) == 0x1e80100) + { itype = FRVBF_INSN_FABSD; goto extract_sfmt_fmovd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 5 : + if ((entire_insn & 0x1ffffc0) == 0x1e80140) + { itype = FRVBF_INSN_FSQRTD; goto extract_sfmt_fmovd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 6 : + if ((entire_insn & 0x1fc0fc0) == 0x1e80180) + { itype = FRVBF_INSN_FADDD; goto extract_sfmt_faddd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 7 : + if ((entire_insn & 0x1fc0fc0) == 0x1e801c0) + { itype = FRVBF_INSN_FSUBD; goto extract_sfmt_faddd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 8 : + if ((entire_insn & 0x1fc0fc0) == 0x1e80200) + { itype = FRVBF_INSN_FMULD; goto extract_sfmt_faddd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 9 : + if ((entire_insn & 0x1fc0fc0) == 0x1e80240) + { itype = FRVBF_INSN_FDIVD; goto extract_sfmt_faddd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 10 : + if ((entire_insn & 0x79fc0fc0) == 0x1e80280) + { itype = FRVBF_INSN_FCMPD; goto extract_sfmt_fcmpd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 11 : + if ((entire_insn & 0x1fc0fc0) == 0x1e802c0) + { itype = FRVBF_INSN_FMADDD; goto extract_sfmt_fmaddd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 12 : + if ((entire_insn & 0x1fc0fc0) == 0x1e80300) + { itype = FRVBF_INSN_FMSUBD; goto extract_sfmt_fmaddd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : + if ((entire_insn & 0x1fc0fc0) == 0x1e80380) + { itype = FRVBF_INSN_FMAD; goto extract_sfmt_fmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 15 : + if ((entire_insn & 0x1fc0fc0) == 0x1e803c0) + { itype = FRVBF_INSN_FMSD; goto extract_sfmt_fmas; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } @@ -2099,71 +4118,251 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, unsigned int val = (((insn >> 6) & (63 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_MAND; goto extract_sfmt_mand; - case 1 : itype = FRVBF_INSN_MOR; goto extract_sfmt_mand; - case 2 : itype = FRVBF_INSN_MXOR; goto extract_sfmt_mand; - case 3 : itype = FRVBF_INSN_MNOT; goto extract_sfmt_mnot; - case 4 : itype = FRVBF_INSN_MROTLI; goto extract_sfmt_mrotli; - case 5 : itype = FRVBF_INSN_MROTRI; goto extract_sfmt_mrotli; - case 6 : itype = FRVBF_INSN_MWCUT; goto extract_sfmt_mwcut; - case 7 : itype = FRVBF_INSN_MWCUTI; goto extract_sfmt_mwcuti; - case 8 : itype = FRVBF_INSN_MAVEH; goto extract_sfmt_mand; - case 9 : itype = FRVBF_INSN_MSLLHI; goto extract_sfmt_msllhi; - case 10 : itype = FRVBF_INSN_MSRLHI; goto extract_sfmt_msllhi; - case 11 : itype = FRVBF_INSN_MSRAHI; goto extract_sfmt_msllhi; - case 12 : itype = FRVBF_INSN_MSATHS; goto extract_sfmt_msaths; - case 13 : itype = FRVBF_INSN_MSATHU; goto extract_sfmt_msaths; - case 14 : itype = FRVBF_INSN_MCMPSH; goto extract_sfmt_mcmpsh; - case 15 : itype = FRVBF_INSN_MCMPUH; goto extract_sfmt_mcmpsh; - case 16 : itype = FRVBF_INSN_MADDHSS; goto extract_sfmt_msaths; - case 17 : itype = FRVBF_INSN_MADDHUS; goto extract_sfmt_msaths; - case 18 : itype = FRVBF_INSN_MSUBHSS; goto extract_sfmt_msaths; - case 19 : itype = FRVBF_INSN_MSUBHUS; goto extract_sfmt_msaths; - case 20 : itype = FRVBF_INSN_MMULHS; goto extract_sfmt_mmulhs; - case 21 : itype = FRVBF_INSN_MMULHU; goto extract_sfmt_mmulhs; - case 22 : itype = FRVBF_INSN_MMACHS; goto extract_sfmt_mmachs; - case 23 : itype = FRVBF_INSN_MMACHU; goto extract_sfmt_mmachu; - case 24 : itype = FRVBF_INSN_MQADDHSS; goto extract_sfmt_mqsaths; - case 25 : itype = FRVBF_INSN_MQADDHUS; goto extract_sfmt_mqsaths; - case 26 : itype = FRVBF_INSN_MQSUBHSS; goto extract_sfmt_mqsaths; - case 27 : itype = FRVBF_INSN_MQSUBHUS; goto extract_sfmt_mqsaths; - case 28 : itype = FRVBF_INSN_MQMULHS; goto extract_sfmt_mqmulhs; - case 29 : itype = FRVBF_INSN_MQMULHU; goto extract_sfmt_mqmulhs; - case 30 : itype = FRVBF_INSN_MQMACHS; goto extract_sfmt_mqmachs; - case 31 : itype = FRVBF_INSN_MQMACHU; goto extract_sfmt_mqmachu; - case 32 : itype = FRVBF_INSN_MCPXRS; goto extract_sfmt_mcpxrs; - case 33 : itype = FRVBF_INSN_MCPXRU; goto extract_sfmt_mcpxrs; - case 34 : itype = FRVBF_INSN_MCPXIS; goto extract_sfmt_mcpxrs; - case 35 : itype = FRVBF_INSN_MCPXIU; goto extract_sfmt_mcpxrs; - case 36 : itype = FRVBF_INSN_MQCPXRS; goto extract_sfmt_mqcpxrs; - case 37 : itype = FRVBF_INSN_MQCPXRU; goto extract_sfmt_mqcpxrs; - case 38 : itype = FRVBF_INSN_MQCPXIS; goto extract_sfmt_mqcpxrs; - case 39 : itype = FRVBF_INSN_MQCPXIU; goto extract_sfmt_mqcpxrs; - case 40 : itype = FRVBF_INSN_MMULXHS; goto extract_sfmt_mmulhs; - case 41 : itype = FRVBF_INSN_MMULXHU; goto extract_sfmt_mmulhs; - case 42 : itype = FRVBF_INSN_MQMULXHS; goto extract_sfmt_mqmulhs; - case 43 : itype = FRVBF_INSN_MQMULXHU; goto extract_sfmt_mqmulhs; - case 44 : itype = FRVBF_INSN_MCUT; goto extract_sfmt_mcut; - case 45 : itype = FRVBF_INSN_MCUTSS; goto extract_sfmt_mcut; - case 46 : itype = FRVBF_INSN_MCUTI; goto extract_sfmt_mcuti; - case 47 : itype = FRVBF_INSN_MCUTSSI; goto extract_sfmt_mcuti; - case 48 : itype = FRVBF_INSN_MMRDHS; goto extract_sfmt_mmachs; - case 49 : itype = FRVBF_INSN_MMRDHU; goto extract_sfmt_mmachu; - case 50 : itype = FRVBF_INSN_MEXPDHW; goto extract_sfmt_mexpdhw; - case 51 : itype = FRVBF_INSN_MEXPDHD; goto extract_sfmt_mexpdhd; - case 52 : itype = FRVBF_INSN_MPACKH; goto extract_sfmt_mpackh; - case 53 : itype = FRVBF_INSN_MUNPACKH; goto extract_sfmt_munpackh; - case 54 : itype = FRVBF_INSN_MDPACKH; goto extract_sfmt_mdpackh; - case 55 : itype = FRVBF_INSN_MDUNPACKH; goto extract_sfmt_mdunpackh; - case 56 : itype = FRVBF_INSN_MBTOH; goto extract_sfmt_mbtoh; - case 57 : itype = FRVBF_INSN_MHTOB; goto extract_sfmt_mhtob; - case 58 : itype = FRVBF_INSN_MBTOHE; goto extract_sfmt_mbtohe; + case 0 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0000) + { itype = FRVBF_INSN_MAND; goto extract_sfmt_mand; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 1 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0040) + { itype = FRVBF_INSN_MOR; goto extract_sfmt_mand; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 2 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0080) + { itype = FRVBF_INSN_MXOR; goto extract_sfmt_mand; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 3 : + if ((entire_insn & 0x1ffffc0) == 0x1ec00c0) + { itype = FRVBF_INSN_MNOT; goto extract_sfmt_mnot; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 4 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0100) + { itype = FRVBF_INSN_MROTLI; goto extract_sfmt_mrotli; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 5 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0140) + { itype = FRVBF_INSN_MROTRI; goto extract_sfmt_mrotli; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 6 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0180) + { itype = FRVBF_INSN_MWCUT; goto extract_sfmt_mwcut; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 7 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec01c0) + { itype = FRVBF_INSN_MWCUTI; goto extract_sfmt_mwcuti; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 8 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0200) + { itype = FRVBF_INSN_MAVEH; goto extract_sfmt_mand; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 9 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0240) + { itype = FRVBF_INSN_MSLLHI; goto extract_sfmt_msllhi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 10 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0280) + { itype = FRVBF_INSN_MSRLHI; goto extract_sfmt_msllhi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 11 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec02c0) + { itype = FRVBF_INSN_MSRAHI; goto extract_sfmt_msllhi; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 12 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0300) + { itype = FRVBF_INSN_MSATHS; goto extract_sfmt_msaths; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 13 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0340) + { itype = FRVBF_INSN_MSATHU; goto extract_sfmt_msaths; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 14 : + if ((entire_insn & 0x79fc0fc0) == 0x1ec0380) + { itype = FRVBF_INSN_MCMPSH; goto extract_sfmt_mcmpsh; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 15 : + if ((entire_insn & 0x79fc0fc0) == 0x1ec03c0) + { itype = FRVBF_INSN_MCMPUH; goto extract_sfmt_mcmpsh; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 16 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0400) + { itype = FRVBF_INSN_MADDHSS; goto extract_sfmt_msaths; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 17 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0440) + { itype = FRVBF_INSN_MADDHUS; goto extract_sfmt_msaths; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 18 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0480) + { itype = FRVBF_INSN_MSUBHSS; goto extract_sfmt_msaths; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 19 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec04c0) + { itype = FRVBF_INSN_MSUBHUS; goto extract_sfmt_msaths; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 20 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0500) + { itype = FRVBF_INSN_MMULHS; goto extract_sfmt_mmulhs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 21 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0540) + { itype = FRVBF_INSN_MMULHU; goto extract_sfmt_mmulhs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 22 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0580) + { itype = FRVBF_INSN_MMACHS; goto extract_sfmt_mmachs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 23 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec05c0) + { itype = FRVBF_INSN_MMACHU; goto extract_sfmt_mmachu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 24 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0600) + { itype = FRVBF_INSN_MQADDHSS; goto extract_sfmt_mqsaths; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 25 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0640) + { itype = FRVBF_INSN_MQADDHUS; goto extract_sfmt_mqsaths; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 26 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0680) + { itype = FRVBF_INSN_MQSUBHSS; goto extract_sfmt_mqsaths; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 27 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec06c0) + { itype = FRVBF_INSN_MQSUBHUS; goto extract_sfmt_mqsaths; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 28 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0700) + { itype = FRVBF_INSN_MQMULHS; goto extract_sfmt_mqmulhs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 29 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0740) + { itype = FRVBF_INSN_MQMULHU; goto extract_sfmt_mqmulhs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 30 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0780) + { itype = FRVBF_INSN_MQMACHS; goto extract_sfmt_mqmachs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 31 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec07c0) + { itype = FRVBF_INSN_MQMACHU; goto extract_sfmt_mqmachu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 32 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0800) + { itype = FRVBF_INSN_MCPXRS; goto extract_sfmt_mcpxrs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 33 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0840) + { itype = FRVBF_INSN_MCPXRU; goto extract_sfmt_mcpxrs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 34 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0880) + { itype = FRVBF_INSN_MCPXIS; goto extract_sfmt_mcpxrs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 35 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec08c0) + { itype = FRVBF_INSN_MCPXIU; goto extract_sfmt_mcpxrs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 36 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0900) + { itype = FRVBF_INSN_MQCPXRS; goto extract_sfmt_mqcpxrs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 37 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0940) + { itype = FRVBF_INSN_MQCPXRU; goto extract_sfmt_mqcpxrs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 38 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0980) + { itype = FRVBF_INSN_MQCPXIS; goto extract_sfmt_mqcpxrs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 39 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec09c0) + { itype = FRVBF_INSN_MQCPXIU; goto extract_sfmt_mqcpxrs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 40 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0a00) + { itype = FRVBF_INSN_MMULXHS; goto extract_sfmt_mmulhs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 41 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0a40) + { itype = FRVBF_INSN_MMULXHU; goto extract_sfmt_mmulhs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 42 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0a80) + { itype = FRVBF_INSN_MQMULXHS; goto extract_sfmt_mqmulhs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 43 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0ac0) + { itype = FRVBF_INSN_MQMULXHU; goto extract_sfmt_mqmulhs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 44 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0b00) + { itype = FRVBF_INSN_MCUT; goto extract_sfmt_mcut; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 45 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0b40) + { itype = FRVBF_INSN_MCUTSS; goto extract_sfmt_mcut; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 46 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0b80) + { itype = FRVBF_INSN_MCUTI; goto extract_sfmt_mcuti; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 47 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0bc0) + { itype = FRVBF_INSN_MCUTSSI; goto extract_sfmt_mcuti; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 48 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0c00) + { itype = FRVBF_INSN_MMRDHS; goto extract_sfmt_mmachs; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 49 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0c40) + { itype = FRVBF_INSN_MMRDHU; goto extract_sfmt_mmachu; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 50 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0c80) + { itype = FRVBF_INSN_MEXPDHW; goto extract_sfmt_mexpdhw; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 51 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0cc0) + { itype = FRVBF_INSN_MEXPDHD; goto extract_sfmt_mexpdhd; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 52 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0d00) + { itype = FRVBF_INSN_MPACKH; goto extract_sfmt_mpackh; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 53 : + if ((entire_insn & 0x1fc0fff) == 0x1ec0d40) + { itype = FRVBF_INSN_MUNPACKH; goto extract_sfmt_munpackh; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 54 : + if ((entire_insn & 0x1fc0fc0) == 0x1ec0d80) + { itype = FRVBF_INSN_MDPACKH; goto extract_sfmt_mdpackh; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 55 : + if ((entire_insn & 0x1fc0fff) == 0x1ec0dc0) + { itype = FRVBF_INSN_MDUNPACKH; goto extract_sfmt_mdunpackh; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 56 : + if ((entire_insn & 0x1ffffc0) == 0x1ec0e00) + { itype = FRVBF_INSN_MBTOH; goto extract_sfmt_mbtoh; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 57 : + if ((entire_insn & 0x1ffffc0) == 0x1ec0e40) + { itype = FRVBF_INSN_MHTOB; goto extract_sfmt_mhtob; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 58 : + if ((entire_insn & 0x1ffffc0) == 0x1ec0e80) + { itype = FRVBF_INSN_MBTOHE; goto extract_sfmt_mbtohe; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; case 59 : { unsigned int val = (((insn >> 17) & (1 << 0))); switch (val) { - case 0 : itype = FRVBF_INSN_MCLRACC_0; goto extract_sfmt_mclracc_0; + case 0 : + if ((entire_insn & 0x1ffffff) == 0x1ec0ec0) + { itype = FRVBF_INSN_MCLRACC_0; goto extract_sfmt_mclracc_0; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; case 1 : { unsigned int val = (((insn >> 25) & (63 << 0))); @@ -2231,25 +4430,55 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, case 59 : /* fall through */ case 60 : /* fall through */ case 61 : /* fall through */ - case 62 : itype = FRVBF_INSN_MCLRACC_1; goto extract_sfmt_mclracc_0; - case 63 : itype = FRVBF_INSN_MNOP; goto extract_sfmt_rei; + case 62 : + if ((entire_insn & 0x1ffffff) == 0x1ee0ec0) + { itype = FRVBF_INSN_MCLRACC_1; goto extract_sfmt_mclracc_0; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 63 : + if ((entire_insn & 0x7fffffff) == 0x7fee0ec0) + { itype = FRVBF_INSN_MNOP; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 60 : itype = FRVBF_INSN_MRDACC; goto extract_sfmt_mrdacc; - case 61 : itype = FRVBF_INSN_MWTACC; goto extract_sfmt_mwtacc; - case 62 : itype = FRVBF_INSN_MRDACCG; goto extract_sfmt_mrdaccg; - case 63 : itype = FRVBF_INSN_MWTACCG; goto extract_sfmt_mwtaccg; + case 60 : + if ((entire_insn & 0x1fc0fff) == 0x1ec0f00) + { itype = FRVBF_INSN_MRDACC; goto extract_sfmt_mrdacc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 61 : + if ((entire_insn & 0x1fc0fff) == 0x1ec0f40) + { itype = FRVBF_INSN_MWTACC; goto extract_sfmt_mwtacc; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 62 : + if ((entire_insn & 0x1fc0fff) == 0x1ec0f80) + { itype = FRVBF_INSN_MRDACCG; goto extract_sfmt_mrdaccg; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 63 : + if ((entire_insn & 0x1fc0fff) == 0x1ec0fc0) + { itype = FRVBF_INSN_MWTACCG; goto extract_sfmt_mwtaccg; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } - case 124 : itype = FRVBF_INSN_MCOP1; goto extract_sfmt_rei; - case 125 : itype = FRVBF_INSN_MCOP2; goto extract_sfmt_rei; - case 126 : itype = FRVBF_INSN_COP1; goto extract_sfmt_rei; - case 127 : itype = FRVBF_INSN_COP2; goto extract_sfmt_rei; + case 124 : + if ((entire_insn & 0x1fc0fc0) == 0x1f00000) + { itype = FRVBF_INSN_MCOP1; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 125 : + if ((entire_insn & 0x1fc0fc0) == 0x1f40000) + { itype = FRVBF_INSN_MCOP2; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 126 : + if ((entire_insn & 0x1fc0000) == 0x1f80000) + { itype = FRVBF_INSN_COP1; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; + case 127 : + if ((entire_insn & 0x1fc0000) == 0x1fc0000) + { itype = FRVBF_INSN_COP2; goto extract_sfmt_rei; } + itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; default : itype = FRVBF_INSN_X_INVALID; goto extract_sfmt_empty; } } diff --git a/sim/frv/decode.h b/sim/frv/decode.h index cb1e80d639b..4e04787e010 100644 --- a/sim/frv/decode.h +++ b/sim/frv/decode.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2004 Free Software Foundation, Inc. +Copyright 1996-2005 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -18,7 +18,7 @@ GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/frv/frv-sim.h b/sim/frv/frv-sim.h index ce5d492766d..8184485dc62 100644 --- a/sim/frv/frv-sim.h +++ b/sim/frv/frv-sim.h @@ -143,7 +143,7 @@ struct _device { int foo; }; /* maintain the address of the start of the previous VLIW insn sequence. */ extern IADDR previous_vliw_pc; -extern CGEN_ATTR_VALUE_TYPE frv_current_fm_slot; +extern CGEN_ATTR_VALUE_ENUM_TYPE frv_current_fm_slot; /* Hardware status. */ #define GET_HSR0() GET_H_SPR (H_SPR_HSR0) diff --git a/sim/frv/mloop.in b/sim/frv/mloop.in index 24c34c9c651..88fed04eb09 100644 --- a/sim/frv/mloop.in +++ b/sim/frv/mloop.in @@ -456,7 +456,7 @@ cat <ops->floatsisf) (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -16664,7 +16664,7 @@ SEM_FN_NAME (frvbf,fstoi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - SI opval = (* CGEN_CPU_FPU (current_cpu)->ops->fixsfsi) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); + SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval); } @@ -16685,7 +16685,7 @@ SEM_FN_NAME (frvbf,fitod) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - DF opval = (* CGEN_CPU_FPU (current_cpu)->ops->floatsidf) (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj))); + DF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsidf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj))); sim_queue_fn_df_write (current_cpu, frvbf_h_fr_double_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr_double", 'f', opval); } @@ -16706,7 +16706,7 @@ SEM_FN_NAME (frvbf,fdtoi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - SI opval = (* CGEN_CPU_FPU (current_cpu)->ops->fixdfsi) (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRj))); + SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixdfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRj))); sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval); } @@ -16728,12 +16728,12 @@ SEM_FN_NAME (frvbf,fditos) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->floatsisf) (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->floatsisf) (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -16756,12 +16756,12 @@ SEM_FN_NAME (frvbf,fdstoi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { { - SI opval = (* CGEN_CPU_FPU (current_cpu)->ops->fixsfsi) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); + SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval); } { - USI opval = (* CGEN_CPU_FPU (current_cpu)->ops->fixsfsi) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRj)) + (1)))); + USI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval); } @@ -16785,13 +16785,13 @@ SEM_FN_NAME (frvbf,nfditos) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->floatsisf) (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 1)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->floatsisf) (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -16815,13 +16815,13 @@ SEM_FN_NAME (frvbf,nfdstoi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SI opval = (* CGEN_CPU_FPU (current_cpu)->ops->fixsfsi) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); + SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval); } frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 1)); { - USI opval = (* CGEN_CPU_FPU (current_cpu)->ops->fixsfsi) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRj)) + (1)))); + USI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval); } @@ -16844,7 +16844,7 @@ SEM_FN_NAME (frvbf,cfitos) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->floatsisf) (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); @@ -16869,7 +16869,7 @@ SEM_FN_NAME (frvbf,cfstoi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { { - SI opval = (* CGEN_CPU_FPU (current_cpu)->ops->fixsfsi) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); + SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, FLD (f_FRk), opval); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval); @@ -16895,7 +16895,7 @@ SEM_FN_NAME (frvbf,nfitos) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->floatsisf) (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -16919,7 +16919,7 @@ SEM_FN_NAME (frvbf,nfstoi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SI opval = (* CGEN_CPU_FPU (current_cpu)->ops->fixsfsi) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); + SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval); } @@ -17036,7 +17036,7 @@ SEM_FN_NAME (frvbf,fnegs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->negsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->negsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -17057,7 +17057,7 @@ SEM_FN_NAME (frvbf,fnegd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - DF opval = (* CGEN_CPU_FPU (current_cpu)->ops->negdf) (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRj))); + DF opval = CGEN_CPU_FPU (current_cpu)->ops->negdf (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRj))); sim_queue_fn_df_write (current_cpu, frvbf_h_fr_double_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr_double", 'f', opval); } @@ -17079,12 +17079,12 @@ SEM_FN_NAME (frvbf,fdnegs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->negsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->negsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->negsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->negsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -17107,7 +17107,7 @@ SEM_FN_NAME (frvbf,cfnegs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->negsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->negsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); @@ -17131,7 +17131,7 @@ SEM_FN_NAME (frvbf,fabss) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->abssf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->abssf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -17152,7 +17152,7 @@ SEM_FN_NAME (frvbf,fabsd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - DF opval = (* CGEN_CPU_FPU (current_cpu)->ops->absdf) (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRj))); + DF opval = CGEN_CPU_FPU (current_cpu)->ops->absdf (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRj))); sim_queue_fn_df_write (current_cpu, frvbf_h_fr_double_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr_double", 'f', opval); } @@ -17174,12 +17174,12 @@ SEM_FN_NAME (frvbf,fdabss) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->abssf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->abssf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->abssf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->abssf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -17202,7 +17202,7 @@ SEM_FN_NAME (frvbf,cfabss) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->abssf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->abssf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); @@ -17226,7 +17226,7 @@ SEM_FN_NAME (frvbf,fsqrts) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->sqrtsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->sqrtsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -17248,12 +17248,12 @@ SEM_FN_NAME (frvbf,fdsqrts) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->sqrtsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->sqrtsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->sqrtsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->sqrtsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -17277,13 +17277,13 @@ SEM_FN_NAME (frvbf,nfdsqrts) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->sqrtsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->sqrtsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 1)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->sqrtsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->sqrtsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -17305,7 +17305,7 @@ SEM_FN_NAME (frvbf,fsqrtd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - DF opval = (* CGEN_CPU_FPU (current_cpu)->ops->sqrtdf) (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRj))); + DF opval = CGEN_CPU_FPU (current_cpu)->ops->sqrtdf (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRj))); sim_queue_fn_df_write (current_cpu, frvbf_h_fr_double_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr_double", 'f', opval); } @@ -17327,7 +17327,7 @@ SEM_FN_NAME (frvbf,cfsqrts) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->sqrtsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->sqrtsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); written |= (1 << 3); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); @@ -17353,7 +17353,7 @@ SEM_FN_NAME (frvbf,nfsqrts) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->sqrtsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->sqrtsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -17375,7 +17375,7 @@ SEM_FN_NAME (frvbf,fadds) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -17396,7 +17396,7 @@ SEM_FN_NAME (frvbf,fsubs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -17417,7 +17417,7 @@ SEM_FN_NAME (frvbf,fmuls) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -17438,7 +17438,7 @@ SEM_FN_NAME (frvbf,fdivs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->divsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->divsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -17459,7 +17459,7 @@ SEM_FN_NAME (frvbf,faddd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - DF opval = (* CGEN_CPU_FPU (current_cpu)->ops->adddf) (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRi)), GET_H_FR_DOUBLE (FLD (f_FRj))); + DF opval = CGEN_CPU_FPU (current_cpu)->ops->adddf (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRi)), GET_H_FR_DOUBLE (FLD (f_FRj))); sim_queue_fn_df_write (current_cpu, frvbf_h_fr_double_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr_double", 'f', opval); } @@ -17480,7 +17480,7 @@ SEM_FN_NAME (frvbf,fsubd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - DF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subdf) (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRi)), GET_H_FR_DOUBLE (FLD (f_FRj))); + DF opval = CGEN_CPU_FPU (current_cpu)->ops->subdf (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRi)), GET_H_FR_DOUBLE (FLD (f_FRj))); sim_queue_fn_df_write (current_cpu, frvbf_h_fr_double_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr_double", 'f', opval); } @@ -17501,7 +17501,7 @@ SEM_FN_NAME (frvbf,fmuld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - DF opval = (* CGEN_CPU_FPU (current_cpu)->ops->muldf) (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRi)), GET_H_FR_DOUBLE (FLD (f_FRj))); + DF opval = CGEN_CPU_FPU (current_cpu)->ops->muldf (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRi)), GET_H_FR_DOUBLE (FLD (f_FRj))); sim_queue_fn_df_write (current_cpu, frvbf_h_fr_double_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr_double", 'f', opval); } @@ -17522,7 +17522,7 @@ SEM_FN_NAME (frvbf,fdivd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - DF opval = (* CGEN_CPU_FPU (current_cpu)->ops->divdf) (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRi)), GET_H_FR_DOUBLE (FLD (f_FRj))); + DF opval = CGEN_CPU_FPU (current_cpu)->ops->divdf (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRi)), GET_H_FR_DOUBLE (FLD (f_FRj))); sim_queue_fn_df_write (current_cpu, frvbf_h_fr_double_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr_double", 'f', opval); } @@ -17544,7 +17544,7 @@ SEM_FN_NAME (frvbf,cfadds) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); written |= (1 << 4); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); @@ -17569,7 +17569,7 @@ SEM_FN_NAME (frvbf,cfsubs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); written |= (1 << 4); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); @@ -17594,7 +17594,7 @@ SEM_FN_NAME (frvbf,cfmuls) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); written |= (1 << 4); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); @@ -17619,7 +17619,7 @@ SEM_FN_NAME (frvbf,cfdivs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->divsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->divsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); written |= (1 << 4); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); @@ -17645,7 +17645,7 @@ SEM_FN_NAME (frvbf,nfadds) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -17669,7 +17669,7 @@ SEM_FN_NAME (frvbf,nfsubs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -17693,7 +17693,7 @@ SEM_FN_NAME (frvbf,nfmuls) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -17717,7 +17717,7 @@ SEM_FN_NAME (frvbf,nfdivs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->divsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->divsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -17738,7 +17738,7 @@ SEM_FN_NAME (frvbf,fcmps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) IADDR UNUSED pc = abuf->addr; SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); -if ((* CGEN_CPU_FPU (current_cpu)->ops->gtsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { +if (CGEN_CPU_FPU (current_cpu)->ops->gtsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { { UQI opval = 2; sim_queue_qi_write (current_cpu, & CPU (h_fccr[FLD (f_FCCi_2)]), opval); @@ -17746,7 +17746,7 @@ if ((* CGEN_CPU_FPU (current_cpu)->ops->gtsf) (CGEN_CPU_FPU (current_cpu), GET_H TRACE_RESULT (current_cpu, abuf, "fccr", 'x', opval); } } else { -if ((* CGEN_CPU_FPU (current_cpu)->ops->eqsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { +if (CGEN_CPU_FPU (current_cpu)->ops->eqsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { { UQI opval = 8; sim_queue_qi_write (current_cpu, & CPU (h_fccr[FLD (f_FCCi_2)]), opval); @@ -17754,7 +17754,7 @@ if ((* CGEN_CPU_FPU (current_cpu)->ops->eqsf) (CGEN_CPU_FPU (current_cpu), GET_H TRACE_RESULT (current_cpu, abuf, "fccr", 'x', opval); } } else { -if ((* CGEN_CPU_FPU (current_cpu)->ops->ltsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { +if (CGEN_CPU_FPU (current_cpu)->ops->ltsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { { UQI opval = 4; sim_queue_qi_write (current_cpu, & CPU (h_fccr[FLD (f_FCCi_2)]), opval); @@ -17788,7 +17788,7 @@ SEM_FN_NAME (frvbf,fcmpd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) IADDR UNUSED pc = abuf->addr; SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); -if ((* CGEN_CPU_FPU (current_cpu)->ops->gtdf) (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRi)), GET_H_FR_DOUBLE (FLD (f_FRj)))) { +if (CGEN_CPU_FPU (current_cpu)->ops->gtdf (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRi)), GET_H_FR_DOUBLE (FLD (f_FRj)))) { { UQI opval = 2; sim_queue_qi_write (current_cpu, & CPU (h_fccr[FLD (f_FCCi_2)]), opval); @@ -17796,7 +17796,7 @@ if ((* CGEN_CPU_FPU (current_cpu)->ops->gtdf) (CGEN_CPU_FPU (current_cpu), GET_H TRACE_RESULT (current_cpu, abuf, "fccr", 'x', opval); } } else { -if ((* CGEN_CPU_FPU (current_cpu)->ops->eqdf) (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRi)), GET_H_FR_DOUBLE (FLD (f_FRj)))) { +if (CGEN_CPU_FPU (current_cpu)->ops->eqdf (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRi)), GET_H_FR_DOUBLE (FLD (f_FRj)))) { { UQI opval = 8; sim_queue_qi_write (current_cpu, & CPU (h_fccr[FLD (f_FCCi_2)]), opval); @@ -17804,7 +17804,7 @@ if ((* CGEN_CPU_FPU (current_cpu)->ops->eqdf) (CGEN_CPU_FPU (current_cpu), GET_H TRACE_RESULT (current_cpu, abuf, "fccr", 'x', opval); } } else { -if ((* CGEN_CPU_FPU (current_cpu)->ops->ltdf) (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRi)), GET_H_FR_DOUBLE (FLD (f_FRj)))) { +if (CGEN_CPU_FPU (current_cpu)->ops->ltdf (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRi)), GET_H_FR_DOUBLE (FLD (f_FRj)))) { { UQI opval = 4; sim_queue_qi_write (current_cpu, & CPU (h_fccr[FLD (f_FCCi_2)]), opval); @@ -17839,7 +17839,7 @@ SEM_FN_NAME (frvbf,cfcmps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { -if ((* CGEN_CPU_FPU (current_cpu)->ops->gtsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { +if (CGEN_CPU_FPU (current_cpu)->ops->gtsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { { UQI opval = 2; sim_queue_qi_write (current_cpu, & CPU (h_fccr[FLD (f_FCCi_2)]), opval); @@ -17847,7 +17847,7 @@ if ((* CGEN_CPU_FPU (current_cpu)->ops->gtsf) (CGEN_CPU_FPU (current_cpu), GET_H TRACE_RESULT (current_cpu, abuf, "fccr", 'x', opval); } } else { -if ((* CGEN_CPU_FPU (current_cpu)->ops->eqsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { +if (CGEN_CPU_FPU (current_cpu)->ops->eqsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { { UQI opval = 8; sim_queue_qi_write (current_cpu, & CPU (h_fccr[FLD (f_FCCi_2)]), opval); @@ -17855,7 +17855,7 @@ if ((* CGEN_CPU_FPU (current_cpu)->ops->eqsf) (CGEN_CPU_FPU (current_cpu), GET_H TRACE_RESULT (current_cpu, abuf, "fccr", 'x', opval); } } else { -if ((* CGEN_CPU_FPU (current_cpu)->ops->ltsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { +if (CGEN_CPU_FPU (current_cpu)->ops->ltsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { { UQI opval = 4; sim_queue_qi_write (current_cpu, & CPU (h_fccr[FLD (f_FCCi_2)]), opval); @@ -17891,7 +17891,7 @@ SEM_FN_NAME (frvbf,fdcmps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { -if ((* CGEN_CPU_FPU (current_cpu)->ops->gtsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { +if (CGEN_CPU_FPU (current_cpu)->ops->gtsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { { UQI opval = 2; sim_queue_qi_write (current_cpu, & CPU (h_fccr[FLD (f_FCCi_2)]), opval); @@ -17899,7 +17899,7 @@ if ((* CGEN_CPU_FPU (current_cpu)->ops->gtsf) (CGEN_CPU_FPU (current_cpu), GET_H TRACE_RESULT (current_cpu, abuf, "fccr", 'x', opval); } } else { -if ((* CGEN_CPU_FPU (current_cpu)->ops->eqsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { +if (CGEN_CPU_FPU (current_cpu)->ops->eqsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { { UQI opval = 8; sim_queue_qi_write (current_cpu, & CPU (h_fccr[FLD (f_FCCi_2)]), opval); @@ -17907,7 +17907,7 @@ if ((* CGEN_CPU_FPU (current_cpu)->ops->eqsf) (CGEN_CPU_FPU (current_cpu), GET_H TRACE_RESULT (current_cpu, abuf, "fccr", 'x', opval); } } else { -if ((* CGEN_CPU_FPU (current_cpu)->ops->ltsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { +if (CGEN_CPU_FPU (current_cpu)->ops->ltsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { { UQI opval = 4; sim_queue_qi_write (current_cpu, & CPU (h_fccr[FLD (f_FCCi_2)]), opval); @@ -17924,7 +17924,7 @@ if ((* CGEN_CPU_FPU (current_cpu)->ops->ltsf) (CGEN_CPU_FPU (current_cpu), GET_H } } } -if ((* CGEN_CPU_FPU (current_cpu)->ops->gtsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1))))) { +if (CGEN_CPU_FPU (current_cpu)->ops->gtsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1))))) { { UQI opval = 2; sim_queue_qi_write (current_cpu, & CPU (h_fccr[((FLD (f_FCCi_2)) + (1))]), opval); @@ -17932,7 +17932,7 @@ if ((* CGEN_CPU_FPU (current_cpu)->ops->gtsf) (CGEN_CPU_FPU (current_cpu), GET_H TRACE_RESULT (current_cpu, abuf, "fccr", 'x', opval); } } else { -if ((* CGEN_CPU_FPU (current_cpu)->ops->eqsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1))))) { +if (CGEN_CPU_FPU (current_cpu)->ops->eqsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1))))) { { UQI opval = 8; sim_queue_qi_write (current_cpu, & CPU (h_fccr[((FLD (f_FCCi_2)) + (1))]), opval); @@ -17940,7 +17940,7 @@ if ((* CGEN_CPU_FPU (current_cpu)->ops->eqsf) (CGEN_CPU_FPU (current_cpu), GET_H TRACE_RESULT (current_cpu, abuf, "fccr", 'x', opval); } } else { -if ((* CGEN_CPU_FPU (current_cpu)->ops->ltsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1))))) { +if (CGEN_CPU_FPU (current_cpu)->ops->ltsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1))))) { { UQI opval = 4; sim_queue_qi_write (current_cpu, & CPU (h_fccr[((FLD (f_FCCi_2)) + (1))]), opval); @@ -17976,7 +17976,7 @@ SEM_FN_NAME (frvbf,fmadds) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))), GET_H_FR (FLD (f_FRk))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))), GET_H_FR (FLD (f_FRk))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -17997,7 +17997,7 @@ SEM_FN_NAME (frvbf,fmsubs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subsf) (CGEN_CPU_FPU (current_cpu), (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))), GET_H_FR (FLD (f_FRk))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))), GET_H_FR (FLD (f_FRk))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18018,7 +18018,7 @@ SEM_FN_NAME (frvbf,fmaddd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - DF opval = (* CGEN_CPU_FPU (current_cpu)->ops->adddf) (CGEN_CPU_FPU (current_cpu), (* CGEN_CPU_FPU (current_cpu)->ops->muldf) (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRi)), GET_H_FR_DOUBLE (FLD (f_FRj))), GET_H_FR_DOUBLE (FLD (f_FRk))); + DF opval = CGEN_CPU_FPU (current_cpu)->ops->adddf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->muldf (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRi)), GET_H_FR_DOUBLE (FLD (f_FRj))), GET_H_FR_DOUBLE (FLD (f_FRk))); sim_queue_fn_df_write (current_cpu, frvbf_h_fr_double_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr_double", 'f', opval); } @@ -18039,7 +18039,7 @@ SEM_FN_NAME (frvbf,fmsubd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { - DF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subdf) (CGEN_CPU_FPU (current_cpu), (* CGEN_CPU_FPU (current_cpu)->ops->muldf) (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRi)), GET_H_FR_DOUBLE (FLD (f_FRj))), GET_H_FR_DOUBLE (FLD (f_FRk))); + DF opval = CGEN_CPU_FPU (current_cpu)->ops->subdf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->muldf (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRi)), GET_H_FR_DOUBLE (FLD (f_FRj))), GET_H_FR_DOUBLE (FLD (f_FRk))); sim_queue_fn_df_write (current_cpu, frvbf_h_fr_double_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr_double", 'f', opval); } @@ -18061,12 +18061,12 @@ SEM_FN_NAME (frvbf,fdmadds) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))), GET_H_FR (FLD (f_FRk))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))), GET_H_FR (FLD (f_FRk))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))), GET_H_FR (((FLD (f_FRk)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))), GET_H_FR (((FLD (f_FRk)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18090,13 +18090,13 @@ SEM_FN_NAME (frvbf,nfdmadds) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))), GET_H_FR (FLD (f_FRk))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))), GET_H_FR (FLD (f_FRk))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 1)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))), GET_H_FR (((FLD (f_FRk)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))), GET_H_FR (((FLD (f_FRk)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18119,7 +18119,7 @@ SEM_FN_NAME (frvbf,cfmadds) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))), GET_H_FR (FLD (f_FRk))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))), GET_H_FR (FLD (f_FRk))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); written |= (1 << 5); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); @@ -18144,7 +18144,7 @@ SEM_FN_NAME (frvbf,cfmsubs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subsf) (CGEN_CPU_FPU (current_cpu), (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))), GET_H_FR (FLD (f_FRk))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))), GET_H_FR (FLD (f_FRk))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); written |= (1 << 5); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); @@ -18170,7 +18170,7 @@ SEM_FN_NAME (frvbf,nfmadds) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))), GET_H_FR (FLD (f_FRk))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))), GET_H_FR (FLD (f_FRk))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18194,7 +18194,7 @@ SEM_FN_NAME (frvbf,nfmsubs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subsf) (CGEN_CPU_FPU (current_cpu), (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))), GET_H_FR (FLD (f_FRk))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))), GET_H_FR (FLD (f_FRk))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18217,12 +18217,12 @@ SEM_FN_NAME (frvbf,fmas) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18245,12 +18245,12 @@ SEM_FN_NAME (frvbf,fmss) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18273,22 +18273,22 @@ SEM_FN_NAME (frvbf,fdmas) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (2))), GET_H_FR (((FLD (f_FRj)) + (2)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (2))), GET_H_FR (((FLD (f_FRj)) + (2)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (2)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (3))), GET_H_FR (((FLD (f_FRj)) + (3)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (3))), GET_H_FR (((FLD (f_FRj)) + (3)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (3)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18311,22 +18311,22 @@ SEM_FN_NAME (frvbf,fdmss) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (2))), GET_H_FR (((FLD (f_FRj)) + (2)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (2))), GET_H_FR (((FLD (f_FRj)) + (2)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (2)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (3))), GET_H_FR (((FLD (f_FRj)) + (3)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (3))), GET_H_FR (((FLD (f_FRj)) + (3)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (3)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18353,22 +18353,22 @@ frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 1)); frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 2)); frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 3)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (2))), GET_H_FR (((FLD (f_FRj)) + (2)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (2))), GET_H_FR (((FLD (f_FRj)) + (2)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (2)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (3))), GET_H_FR (((FLD (f_FRj)) + (3)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (3))), GET_H_FR (((FLD (f_FRj)) + (3)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (3)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18395,22 +18395,22 @@ frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 1)); frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 2)); frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 3)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (2))), GET_H_FR (((FLD (f_FRj)) + (2)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (2))), GET_H_FR (((FLD (f_FRj)) + (2)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (2)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (3))), GET_H_FR (((FLD (f_FRj)) + (3)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (3))), GET_H_FR (((FLD (f_FRj)) + (3)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (3)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18434,13 +18434,13 @@ SEM_FN_NAME (frvbf,cfmas) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); written |= (1 << 9); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); written |= (1 << 10); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); @@ -18467,13 +18467,13 @@ SEM_FN_NAME (frvbf,cfmss) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); written |= (1 << 9); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); written |= (1 << 10); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); @@ -18499,12 +18499,12 @@ SEM_FN_NAME (frvbf,fmad) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf) (CGEN_CPU_FPU (current_cpu), (* CGEN_CPU_FPU (current_cpu)->ops->muldf) (CGEN_CPU_FPU (current_cpu), (* CGEN_CPU_FPU (current_cpu)->ops->fextsfdf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi))), (* CGEN_CPU_FPU (current_cpu)->ops->fextsfdf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->muldf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi))), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf) (CGEN_CPU_FPU (current_cpu), (* CGEN_CPU_FPU (current_cpu)->ops->adddf) (CGEN_CPU_FPU (current_cpu), (* CGEN_CPU_FPU (current_cpu)->ops->fextsfdf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1)))), (* CGEN_CPU_FPU (current_cpu)->ops->fextsfdf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRj)) + (1)))))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->adddf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1)))), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRj)) + (1)))))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18527,12 +18527,12 @@ SEM_FN_NAME (frvbf,fmsd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf) (CGEN_CPU_FPU (current_cpu), (* CGEN_CPU_FPU (current_cpu)->ops->muldf) (CGEN_CPU_FPU (current_cpu), (* CGEN_CPU_FPU (current_cpu)->ops->fextsfdf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi))), (* CGEN_CPU_FPU (current_cpu)->ops->fextsfdf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->muldf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi))), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj))))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf) (CGEN_CPU_FPU (current_cpu), (* CGEN_CPU_FPU (current_cpu)->ops->subdf) (CGEN_CPU_FPU (current_cpu), (* CGEN_CPU_FPU (current_cpu)->ops->fextsfdf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1)))), (* CGEN_CPU_FPU (current_cpu)->ops->fextsfdf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRj)) + (1)))))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->subdf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1)))), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRj)) + (1)))))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18556,13 +18556,13 @@ SEM_FN_NAME (frvbf,nfmas) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 1)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18586,13 +18586,13 @@ SEM_FN_NAME (frvbf,nfmss) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 1)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18615,12 +18615,12 @@ SEM_FN_NAME (frvbf,fdadds) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18643,12 +18643,12 @@ SEM_FN_NAME (frvbf,fdsubs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18671,12 +18671,12 @@ SEM_FN_NAME (frvbf,fdmuls) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18699,12 +18699,12 @@ SEM_FN_NAME (frvbf,fddivs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->divsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->divsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->divsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->divsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18727,12 +18727,12 @@ SEM_FN_NAME (frvbf,fdsads) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18755,12 +18755,12 @@ SEM_FN_NAME (frvbf,fdmulcs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18784,13 +18784,13 @@ SEM_FN_NAME (frvbf,nfdmulcs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 1)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18814,13 +18814,13 @@ SEM_FN_NAME (frvbf,nfdadds) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 1)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18844,13 +18844,13 @@ SEM_FN_NAME (frvbf,nfdsubs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 1)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18874,13 +18874,13 @@ SEM_FN_NAME (frvbf,nfdmuls) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 1)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->mulsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18904,13 +18904,13 @@ SEM_FN_NAME (frvbf,nfddivs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->divsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->divsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 1)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->divsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->divsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18934,13 +18934,13 @@ SEM_FN_NAME (frvbf,nfdsads) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->addsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 1)); { - SF opval = (* CGEN_CPU_FPU (current_cpu)->ops->subsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); + SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1)))); sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ((FLD (f_FRk)) + (1)), opval); TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); } @@ -18963,7 +18963,7 @@ SEM_FN_NAME (frvbf,nfdcmps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { frvbf_set_ne_index (current_cpu, FLD (f_FRk)); -if ((* CGEN_CPU_FPU (current_cpu)->ops->gtsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { +if (CGEN_CPU_FPU (current_cpu)->ops->gtsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { { UQI opval = 2; sim_queue_qi_write (current_cpu, & CPU (h_fccr[FLD (f_FCCi_2)]), opval); @@ -18971,7 +18971,7 @@ if ((* CGEN_CPU_FPU (current_cpu)->ops->gtsf) (CGEN_CPU_FPU (current_cpu), GET_H TRACE_RESULT (current_cpu, abuf, "fccr", 'x', opval); } } else { -if ((* CGEN_CPU_FPU (current_cpu)->ops->eqsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { +if (CGEN_CPU_FPU (current_cpu)->ops->eqsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { { UQI opval = 8; sim_queue_qi_write (current_cpu, & CPU (h_fccr[FLD (f_FCCi_2)]), opval); @@ -18979,7 +18979,7 @@ if ((* CGEN_CPU_FPU (current_cpu)->ops->eqsf) (CGEN_CPU_FPU (current_cpu), GET_H TRACE_RESULT (current_cpu, abuf, "fccr", 'x', opval); } } else { -if ((* CGEN_CPU_FPU (current_cpu)->ops->ltsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { +if (CGEN_CPU_FPU (current_cpu)->ops->ltsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi)), GET_H_FR (FLD (f_FRj)))) { { UQI opval = 4; sim_queue_qi_write (current_cpu, & CPU (h_fccr[FLD (f_FCCi_2)]), opval); @@ -18997,7 +18997,7 @@ if ((* CGEN_CPU_FPU (current_cpu)->ops->ltsf) (CGEN_CPU_FPU (current_cpu), GET_H } } frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 1)); -if ((* CGEN_CPU_FPU (current_cpu)->ops->gtsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1))))) { +if (CGEN_CPU_FPU (current_cpu)->ops->gtsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1))))) { { UQI opval = 2; sim_queue_qi_write (current_cpu, & CPU (h_fccr[((FLD (f_FCCi_2)) + (1))]), opval); @@ -19005,7 +19005,7 @@ if ((* CGEN_CPU_FPU (current_cpu)->ops->gtsf) (CGEN_CPU_FPU (current_cpu), GET_H TRACE_RESULT (current_cpu, abuf, "fccr", 'x', opval); } } else { -if ((* CGEN_CPU_FPU (current_cpu)->ops->eqsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1))))) { +if (CGEN_CPU_FPU (current_cpu)->ops->eqsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1))))) { { UQI opval = 8; sim_queue_qi_write (current_cpu, & CPU (h_fccr[((FLD (f_FCCi_2)) + (1))]), opval); @@ -19013,7 +19013,7 @@ if ((* CGEN_CPU_FPU (current_cpu)->ops->eqsf) (CGEN_CPU_FPU (current_cpu), GET_H TRACE_RESULT (current_cpu, abuf, "fccr", 'x', opval); } } else { -if ((* CGEN_CPU_FPU (current_cpu)->ops->ltsf) (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1))))) { +if (CGEN_CPU_FPU (current_cpu)->ops->ltsf (CGEN_CPU_FPU (current_cpu), GET_H_FR (((FLD (f_FRi)) + (1))), GET_H_FR (((FLD (f_FRj)) + (1))))) { { UQI opval = 4; sim_queue_qi_write (current_cpu, & CPU (h_fccr[((FLD (f_FCCi_2)) + (1))]), opval); diff --git a/sim/frv/traps.c b/sim/frv/traps.c index 3e9344696fe..63d4c9b9389 100644 --- a/sim/frv/traps.c +++ b/sim/frv/traps.c @@ -30,7 +30,7 @@ with this program; if not, write to the Free Software Foundation, Inc., #include "bfd.h" #include "libiberty.h" -CGEN_ATTR_VALUE_TYPE frv_current_fm_slot; +CGEN_ATTR_VALUE_ENUM_TYPE frv_current_fm_slot; /* The semantic code invokes this for invalid (unrecognized) instructions. */ diff --git a/sim/sh64/ChangeLog b/sim/sh64/ChangeLog deleted file mode 100644 index 1f705ca9e70..00000000000 --- a/sim/sh64/ChangeLog +++ /dev/null @@ -1,392 +0,0 @@ -2005-05-02 Corinna Vinschen - - * sh-desc.h: Move extern declaration of sh_cgen_ifld_table after - inclusion of cgen.h. - -2005-04-15 Corinna Vinschen - - * configure.ac: New file. - * configure.in: Remove. - * configure: Regenerate. - * defs-media.h (sem_fields): Add missing sfmt_ldhil member. - * sim-if.c (sim_open): Use struct bfd instead of struct _bfd. - (sim_create_inferior): Ditto. - -2004-12-08 Hans-Peter Nilsson - - * configure: Regenerate for ../common/aclocal.m4 update. - -Fri Feb 21 19:49:45 2003 J"orn Rennecke - - * sem-media-switch.c, sem-media.c: Regenerate. - -2002-06-24 Richard Sandiford - - * sh64.c: Update path of "callback.h". - -2002-06-20 Elena Zannoni - - * sh64.c: Include correct file for register numbers. - -Fri May 17 14:27:41 2002 J"orn Rennecke - - * sim-if.c (sh64_disassemble_insn): Use print_insn_sh instead of - print_insn_shl. - -2001-07-05 Ben Elliston - - * Makefile.in (stamp-arch): Use $(CGEN_CPU_DIR). - (stamp-desc): Likewise. - (stamp-cpu): Likewise. - (stamp-defs-compact): Likewise. - (stamp-defs-media): Likewise. - (stamp-decode-compact): Likewise. - (stamp-decode-media): Likewise. - -2001-03-30 Ben Elliston - - * sim-if.c (sim_open): Set sh64_idesc_{media,compact} to NULL. - * sh64-sim.h (sh64_idesc_{compact,media}): Declare extern. - * sh64.c (sh64_idesc_{compact,media}): Make non-static. - -2001-01-30 Ben Elliston - - * sh64.c (SYS_argc, SYS_argn, SYS_argnlen): Define. - (trap_handler): Implement these syscalls. - (count_argc): New function. - -2001-01-24 Alexandre Oliva - - * sh64.c (trap_handler): Implement time. - - * sh64.c (fetch_str): New function. - (trap_handler): Re-implement write, and implement lseek, read, - open and close. - -2001-01-18 Elena Zannoni - - * sh64.c (sh64_fetch_register): When fetching the PC, return the - PC value and set the LSB according to the current ISA. - -2001-01-18 Ben Elliston - - * sh64.c (trap_handler): Use sim_engine_halt to indicate a program - has terminated, not exit! - -2001-01-12 Ben Elliston - - * sh64.c (sh64_fcnvds): Re-implement. - - * sh64.c: Include "bfd.h". - (trap_handler): New function. Consolidate function bodies of - sh64_trapa and sh64_compact_trapa. - (sh64_trapa): Use it. - (sh64_compact_trapa): Likewise. - -2001-01-11 Ben Elliston - - * sem-media.c, sem-media-switch.c: Regenerate. - * sem-compact.c, sem-compact-switch.c: Likewise. - - * sh64.c (sh64_trapa): Adhere to SH64 sys call conventions. - - * cpu.h, sh-desc.c, sh-desc.h, sh-opc.h: Regenerate. - * decode-media.c, decode-media.h, defs-media.h: Likewise. - * sem-compact.c, sem-compact-switch.c: Likewise. - * sem-media.c, sem-media-switch.c: Likewise. - -2001-01-10 Ben Elliston - - * sim-main.h (CIA_SET): Encode the current instruction set mode - when setting the cia. - -2001-01-08 Ben Elliston - - * sh64.c (sh64_store_register): Do not set insn set mode--allow - sh64_h_pc_set() to do it. - (shmedia_init_cpu): Do not initialise the insn set mode--let the - loader set it based on bit 0 of the executable's starting address. - (shcompact_init_cpu): Likewise. - * mloop-compact.c (sh64_compact_pbb_begin): Emit a warning message - about malformed programs which have illegal insns in delay slots. - (sh64_compact_pbb_cti_chain): Examine the least significant bit of - the new pc, not the current instruction set mode to determine if - the next pbb in the chain will consist of SHmedia instructions. - * mloop-media.c (sh64_media_pbb_cti_chain): Likewise for SHcompact - switches. Set bit 0 when setting the pc for the next SHmedia pbb. - - * cpu.c, cpu.h: Regenerate. - * sem-compact.c, sem-compact-switch.c: Likewise. - * sem-media.c, sem-media-switch.c: Likewise. - - * sh64.c (sh64_compact_trapa): Use sim_io_write_{stdout,error}(), - not stdio functions to emit output when executing write traps. - -2001-01-07 Alexandre Oliva - - * sh64.c (sh64_compact_trapa): Support writing to stderr. Flush - output stream after each (compound) write. - -2001-01-06 Ben Elliston - - * sem-media.c, sem-media-switch.c: Regenerate. - -2001-01-04 Ben Elliston - - * sem-compact.c, sem-compact-switch.c: Regenerate. - * cpu.h: Regenerate. - -2001-01-03 Ben Elliston - - * cpu.c, cpu.h: Regenerate. - * sem-media.c, sem-media-switch.c: Likewise. - -2001-01-02 Ben Elliston - - * sim-if.c (sh64_disassemble_insn): Set arch and mach fields using - BFD primitives. - - * sem-compact.c, sem-compact-switch.c: Regenerate. - -2000-12-30 Alexandre Oliva - - * sh64.c (sh64_nsb): Re-implement correctly. - -2000-12-26 Alexandre Oliva - - * sh64.c (sh64_nsb): Re-implement. - -2000-12-27 Ben Elliston - - * cpu.c, cpu.h: Regenerate. - * sem-compact.c, sem-compact-switch.c: Likewise. - * sem-media.c, sem-media-switch.c: Likewise. - * sh-desc.c: Likewise. - -2000-12-26 Ben Elliston - - * mloop-compact.in, mloop-media.in: Remove. - * mloop-compact.c, mloop-media.c: New files. - * eng-compact.c, eng-media.c: Likewise. - * Makefile.in (mloop-compact.c): Remove target. - (stamp-mloop-compact): Likewise. - (mloop-media.c): Likewise. - (stamp-mloop-media): Likewise. - (sh64-clean): Update. - (stamp-mloop): Remove. - -2000-12-23 Ben Elliston - - * sh64.c (sh64_prepare_run): Rename from shmedia_prepare_run. - (shcompact_prepare_run): Remove. - (sh2_mach, sh3_mach, sh3e_mach, sh4_mach, sh5_mach): Update. - -2000-12-22 Ben Elliston - - * sh64.c (sh64_idesc_media, sh64_idesc_compact): New variables. - (sh64_dump): Remove. - (sh64_engine_run_full): Only compute idesc tables once. - (sh64_engine_run_fast): Likewise. - (shmedia_prepare_run): Do nothing. - (shcompact_prepare_run): Likewise. - - * sem-compact.c, sem-compact-switch.c: Regenerate. - * sem-media.c, sem-media-switch.c: Likewise. - -2000-12-19 Ben Elliston - - * sem-media.c, sem-media-switch.c: Regenerate. - -2000-12-15 Ben Elliston - - * sh64.c (sh64_store_register): When storing a new PC, set ISA - mode based on the value of bit 0. - - * sh64.c: Include "sim-sh64.h" for GDB interfacing. - (sh64_fetch_register): Implement. - (sh64_store_register): Likewise. - - * sh64-sim.h (sh64_fmacs): Declare. - (sh64_ftrcdl, sh64_ftrcdq, sh64_ftrcsl): Likewise. - - * sem-media.c, sem-media-switch.c: Regenerate. - -2000-12-13 Ben Elliston - - * sh64-sim.h (sh64_compact_trapa): Renamed from sh64_trapa. - (sh64_trapa): Renamed from sh64_trap. - * sh64.c (sh64_trapa): Call sh64_compact_trapa for handling. - Apply renaming described above. - - * decode-media.c, decode-media.h, defs-media.h: Regenerate. - * sem-media.c sem-media-switch.c: Likewise. - * sh-desc.c, sh-desc.h, sh-opc.h: Likewise. - -2000-12-12 Ben Elliston - - * cpu.c, cpu.h, sh-desc.c: Regenerate. - * sem-media.c, sem-media-switch.c: Likewise. - * sem-compact.c, sem-compact-switch.c: Likewise. - * sh64-sim.h (sh64_ftrvs): Declare. - * sh64.c (sh64_ftrvs): Bug fixes. - - * sh64.c (sh64_fcmpgtd): Fix order of arguments to sim_fpu_is_gt. - (sh64_fcmpgts): Likewise. - -2000-12-11 Ben Elliston - - * decode-media.c, decode-media.h: Regenerate. - * defs-media.h: Likewise. - * sem-media.c, sem-media-switch.c: Likewise. - * sh-desc.c: Likewise. - -2000-12-08 Ben Elliston - - * decode-media.c, decode-media.h: Regenerate. - * defs-media.h: Likewise. - * sem-media.c, sem-media-switch.c: Likewise. - -2000-12-07 Ben Elliston - - * decode-media.c, decode-media.h: Regenerate. - * sem-media.c, sem-media-switch.c: Likewise. - - * defs-media.h: Regenete. - * decode-compact.c, decode-media.c: Likewise. - -2000-12-06 Ben Elliston - - * sh64.c (sh64_fcmpund): Return a BI. - (sh64_fcmpuns): Likewise. - (sh64_nsb): Treat source value as unsigned. - (sh64_compact_model_insn_before): New function. - (sh64_media_model_insn_before): Likewise. - (sh64_compact_model_insn_after): Likewise. - (sh64_media_model_insn_after): Likewise. - (sh_models): Use sh5_mach for "sh5". - * sh64-sim.h: Add missing function prototypes. - - * cpu.c, cpu.h, defs-media.h, sh-desc.c: Regenerate. - * decode-media.c, decode-media.h: Likewise. - * sem-media.c, sem-media-switch.c: Likewise. - -2000-12-05 Ben Elliston - - * mloop-compact.in, mloop-media.in: Use @prefix@. - * Makefile.in (stamp-mloop-compact): Pass -outfile-suffix option - to make generated files safe in the presence of parallel makes. - (stamp-mloop-media): Likewise. - - * decode-media.c, defs-media.h: Regenerate. - -2000-12-04 Ben Elliston - - * sh64-sim.h: Add function prototypes from sh64.c. - - * Makefile.in (SH64_OBJS): Add ISA variant objects. - (SIM_EXTRA_DEPS): Do not depend on opcodes headers. - (SH64_INCLUDE_DEPS): Update for ISA variants. - (stamp-mloop-compact, stamp-mloop-media): New targets. - (decode-compact.o, sem-compact.o): New rules. - (decode-media.o, sem-media.o): Likewise. - (sh64-clean): Update. - (stamp-all, stamp-mloop, stamp-decode, stamp-defs): New targets. - (stamp-desc, stamp-cpu): Likewise. - (stamp-defs-compact, stamp-defs-media): Likewise. - (stamp-decode-compact, stamp-decode-media): Likewise. - - * defs-compact.h, defs-media.h: Regenerate. - -2000-12-03 Ben Elliston - - * sh64-sim.h (sh64_fcmpeqd, sh64_fcmpeqs): Declare. - (sh64_fcmpged, sh64_fcmpges): Likewise. - (sh64_fcmpgtd, sh64_fcmpgts): Likewise. - - * sh64.c (sh64_endian): New function. - (sh64_fcmpeqd, sh64_fcmpeqs): Return a BI. - (sh64_fcmpged, sh64_fcmpges): Likewise. - (sh64_fcmpgtd, sh64_fcmpgts): Likewise. - (sh64_trap): Implement a basic syscall facility. - (sh64_trapa): Exit with return code in R5, not 0. - (sh64_model_sh5_u_exec): Remove. - (sh64_engine_run_full): New function. - (sh64_engine_run_fast): Likewise. - (shmedia_prepare_run): Likewise. - (shcompact_prepare_run): Likewise. - (sh64_get_idata): Likewise. - (sh64_init_cpu): Likewise. - (shmedia_init_cpu): Likewise. - (shcompact_init_cpu): Likewise. - (sh64_model_init): Likewise. - (sh_models): Define. - (sh5_imp_properties): Likewise. - (sh2_mach, sh3_mach, sh4_mach, sh5_mach): Define. - - * sem-compact.c, sem-compact-switch.c: Regenerate. - -2000-12-01 Ben Elliston - - * sh64-sim.h (sh64_endian): Declare. - * sim-main.h (sim_cia): Use UDI, not USI. - (WITH_PROFILE_MODEL_P): Remove. - * sim-if.c (sim_sh64_disassemble_insn): Remove. - (sh64_disassemble_insn): New function. - (sim_open): Use as this CPU's disassembler. - * eng.h: New file. - * decode.h (WITH_PROFILE_MODEL_P): Undefine. - - * decode-compact.c, decode-media.c: Regenerate. - * defs-compact.h, defs-media.h: Likewise. - * sem-compact.c, sem-compact-switch.c: Likewise. - * sh-desc.c, sh-desc.h: Likewise. - * cpu.c, cpu.h, cpuall.h: Likewise. - -2000-11-30 Ben Elliston - - * arch.c, sh-desc.c, sh-desc.h: Regenerate. - - * tconfig.in (SIM_HAVE_BIENDIAN): Define. - * configure.in (SIM_AC_OPTION_BIGENDIAN): Do not hard-wire a - target byte order, but default to big endian. - * configure: Regenerate. - -2000-11-27 Ben Elliston - - * sim-main.h (WITH_PROFILE_MODEL_P): Define. - * sh64-sim.h (ISM_COMPACT, ISM_MEDIA): New enums. - - * sh-desc.c, sh-desc.h: Regenerate. - * arch.c, cpu.h, cpuall.h: Regenerate. - * decode.h (WITH_PROFILE_MODEL_P): Remove. - - * mloop-compact.in, mloop-media.in: New files. - * decode.h: Likewise. - -2000-11-26 Ben Elliston - - * sem-compact.c, sem-compact-switch.c: Generate. - * sem-media.c, sem-media-switch.c: Likewise. - -2000-11-25 Ben Elliston - - * sh-desc.c, sh-desc.h, sh-opc.h: Generate. - - * arch.c, arch.h, cpuall.h, cpu.c, cpu.h: Generate. - * decode-compact.c, decode-compact.h: Likewise. - * decode-media.c, decode-media.h: Likewise. - * sh64-sim.h: New file. - * sim-main.h: Likewise. - -2000-11-22 Ben Elliston - - * sim-if.c: New file. - * sh64.c: Likewise. - -2000-11-16 Ben Elliston - - * config.in: New file. - * tconfig.in: Likewise. - * configure.in: Likewise. - * configure: Generate. - * Makefile.in: New file. diff --git a/sim/sh64/Makefile.in b/sim/sh64/Makefile.in deleted file mode 100644 index b8cfb82c585..00000000000 --- a/sim/sh64/Makefile.in +++ /dev/null @@ -1,153 +0,0 @@ -# Makefile template for Configure for the SH64 simulator -# Copyright (C) 2000 Free Software Foundation, Inc. -# Contributed by Red Hat, Inc. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License along -# with this program; if not, write to the Free Software Foundation, Inc., -# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -## COMMON_PRE_CONFIG_FRAG - -SH64_OBJS = sh64.o cpu.o sh-desc.o \ - decode-compact.o sem-compact.o mloop-compact.o \ - decode-media.o sem-media.o mloop-media.o - -CONFIG_DEVICES = dv-sockser.o -CONFIG_DEVICES = - -SIM_OBJS = \ - $(SIM_NEW_COMMON_OBJS) \ - sim-cpu.o \ - sim-hload.o \ - sim-hrw.o \ - sim-model.o \ - sim-reg.o \ - cgen-utils.o cgen-trace.o cgen-scache.o \ - cgen-run.o sim-reason.o sim-engine.o sim-stop.o \ - sim-if.o arch.o \ - $(SH64_OBJS) \ - $(CONFIG_DEVICES) - -# Extra headers included by sim-main.h. -SIM_EXTRA_DEPS = \ - $(CGEN_INCLUDE_DEPS) \ - arch.h cpuall.h sh64-sim.h - -SIM_EXTRA_CFLAGS = - -SIM_RUN_OBJS = nrun.o -SIM_EXTRA_CLEAN = sh64-clean - -## COMMON_POST_CONFIG_FRAG - -arch = sh - -sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h - -arch.o: arch.c $(SIM_MAIN_DEPS) - -devices.o: devices.c $(SIM_MAIN_DEPS) - -# SH64 objs - -SH64_INCLUDE_DEPS = \ - $(CGEN_MAIN_CPU_DEPS) \ - cpu.h decode.h \ - decode-compact.h eng-compact.h defs-compact.h \ - decode-media.h eng-media.h defs-media.h - -sh64.o: sh64.c $(SH64_INCLUDE_DEPS) - -mloop-compact.o: mloop-compact.c sem-compact-switch.c $(SH64_INCLUDE_DEPS) - $(CC) -c $(srcdir)/mloop-compact.c $(ALL_CFLAGS) -DWANT_ISA_COMPACT - -mloop-media.o: mloop-media.c sem-media-switch.c $(SH64_INCLUDE_DEPS) - $(CC) -c $(srcdir)/mloop-media.c $(ALL_CFLAGS) -DWANT_ISA_MEDIA - -cpu.o: cpu.c $(SH64_INCLUDE_DEPS) - -decode-compact.o: decode-compact.c $(SH64_INCLUDE_DEPS) - $(CC) -c $(srcdir)/decode-compact.c $(ALL_CFLAGS) -DWANT_ISA_COMPACT - -sem-compact.o: sem-compact.c $(SH64_INCLUDE_DEPS) - $(CC) -c $(srcdir)/sem-compact.c $(ALL_CFLAGS) -DWANT_ISA_COMPACT - -decode-media.o: decode-media.c $(SH64_INCLUDE_DEPS) - $(CC) -c $(srcdir)/decode-media.c $(ALL_CFLAGS) -DWANT_ISA_MEDIA - -sem-media.o: sem-media.c $(SH64_INCLUDE_DEPS) - $(CC) -c $(srcdir)/sem-media.c $(ALL_CFLAGS) -DWANT_ISA_MEDIA - -sh64-clean: - rm -f tmp-* - rm -f stamp-defs-{compact,media} - rm -f stamp-arch stamp-desc stamp-cpu stamp-decode-{compact,media} - -# cgen support, enable with --enable-cgen-maint -CGEN_MAINT = ; @true -# The following line is commented in or out depending upon --enable-cgen-maint. -@CGEN_MAINT@CGEN_MAINT = - -.PHONY: stamp-all stamp-decode stamp-defs - -stamp-all: stamp-arch stamp-desc stamp-cpu stamp-decode stamp-defs -stamp-decode: stamp-decode-compact stamp-decode-media -stamp-defs: stamp-defs-compact stamp-defs-media - -stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/sh.cpu $(CGEN_CPU_DIR)/sh.opc $(CGEN_CPU_DIR)/sh64-media.cpu $(CGEN_CPU_DIR)/sh64-compact.cpu Makefile - $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all isa=compact,media \ - FLAGS="with-scache" - touch $@ -arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch - @true - -stamp-desc: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_CPU_DIR)/sh.cpu $(CGEN_CPU_DIR)/sh.opc $(CGEN_CPU_DIR)/sh64-compact.cpu $(CGEN_CPU_DIR)/sh64-media.cpu Makefile - $(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) cpu=sh64 mach=all isa=compact,media - touch $@ -desc.h: $(CGEN_MAINT) stamp-desc - @true - -stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_CPU_DIR)/sh.cpu $(CGEN_CPU_DIR)/sh.opc $(CGEN_CPU_DIR)/sh64-compact.cpu $(CGEN_CPU_DIR)/sh64-media.cpu Makefile - $(MAKE) cgen-cpu $(CGEN_FLAGS_TO_PASS) \ - cpu=sh64 mach=sh4,sh5 isa=compact,media FLAGS="with-multiple-isa with-scache" - rm -f $(srcdir)/model.c - touch $@ -cpu.h: $(CGEN_MAINT) stamp-cpu - @true - -stamp-defs-compact: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_CPU_DIR)/sh.cpu $(CGEN_CPU_DIR)/sh.opc $(CGEN_CPU_DIR)/sh64-compact.cpu Makefile - $(MAKE) cgen-defs $(CGEN_FLAGS_TO_PASS) \ - cpu=sh64 mach=sh5 isa=compact FLAGS="with-scache" SUFFIX="-compact" - touch $@ -defs-compact.h: $(CGEN_MAINT) stamp-defs-compact - @true - -stamp-defs-media: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_CPU_DIR)/sh.cpu $(CGEN_CPU_DIR)/sh.opc $(CGEN_CPU_DIR)/sh64-media.cpu Makefile - $(MAKE) cgen-defs $(CGEN_FLAGS_TO_PASS) \ - cpu=sh64 mach=sh5 isa=media FLAGS="with-scache" SUFFIX="-media" - touch $@ -defs-media.h: $(CGEN_MAINT) stamp-defs-media - -stamp-decode-compact: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/sh.cpu $(CGEN_CPU_DIR)/sh.opc $(CGEN_CPU_DIR)/sh64-compact.cpu Makefile - $(MAKE) cgen-decode $(CGEN_FLAGS_TO_PASS) \ - cpu=sh64 mach=sh5 isa=compact FLAGS="with-scache" SUFFIX="-compact" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" - touch $@ -sem-compact.c sem-compact-switch.c decode-compact.c decode-compact.h: $(CGEN_MAINT) stamp-compact - @true - -stamp-decode-media: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/sh.cpu $(CGEN_CPU_DIR)/sh.opc $(CGEN_CPU_DIR)/sh64-media.cpu Makefile - $(MAKE) cgen-decode $(CGEN_FLAGS_TO_PASS) \ - cpu=sh64 mach=sh5 isa=media FLAGS="with-scache" SUFFIX="-media" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" - touch $@ -sem-media.c sem-media-switch.c decode-media.c decode-media.h: $(CGEN_MAINT) stamp-media - @true diff --git a/sim/sh64/arch.c b/sim/sh64/arch.c deleted file mode 100644 index c1e8c772583..00000000000 --- a/sim/sh64/arch.c +++ /dev/null @@ -1,47 +0,0 @@ -/* Simulator support for sh. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#include "sim-main.h" -#include "bfd.h" - -const MACH *sim_machs[] = -{ -#ifdef HAVE_CPU_SH64 - & sh2_mach, -#endif -#ifdef HAVE_CPU_SH64 - & sh3_mach, -#endif -#ifdef HAVE_CPU_SH64 - & sh3e_mach, -#endif -#ifdef HAVE_CPU_SH64 - & sh4_mach, -#endif -#ifdef HAVE_CPU_SH64 - & sh5_mach, -#endif - 0 -}; - diff --git a/sim/sh64/arch.h b/sim/sh64/arch.h deleted file mode 100644 index 30820a061a9..00000000000 --- a/sim/sh64/arch.h +++ /dev/null @@ -1,44 +0,0 @@ -/* Simulator header for sh. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef SH_ARCH_H -#define SH_ARCH_H - -#define TARGET_BIG_ENDIAN 1 - -/* Enum declaration for model types. */ -typedef enum model_type { - MODEL_SH5, MODEL_MAX -} MODEL_TYPE; - -#define MAX_MODELS ((int) MODEL_MAX) - -/* Enum declaration for unit types. */ -typedef enum unit_type { - UNIT_NONE, UNIT_SH5_U_EXEC, UNIT_MAX -} UNIT_TYPE; - -#define MAX_UNITS (1) - -#endif /* SH_ARCH_H */ diff --git a/sim/sh64/config.in b/sim/sh64/config.in deleted file mode 100644 index 6ce594d7c90..00000000000 --- a/sim/sh64/config.in +++ /dev/null @@ -1,177 +0,0 @@ -/* config.in. Generated automatically from configure.in by autoheader. */ - -/* Define if using alloca.c. */ -#undef C_ALLOCA - -/* Define to empty if the keyword does not work. */ -#undef const - -/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems. - This function is required for alloca.c support on those systems. */ -#undef CRAY_STACKSEG_END - -/* Define if you have alloca, as a function or macro. */ -#undef HAVE_ALLOCA - -/* Define if you have and it should be used (not on Ultrix). */ -#undef HAVE_ALLOCA_H - -/* Define if you have a working `mmap' system call. */ -#undef HAVE_MMAP - -/* Define as __inline if that's what the C compiler calls it. */ -#undef inline - -/* Define to `long' if doesn't define. */ -#undef off_t - -/* Define if you need to in order for stat and other things to work. */ -#undef _POSIX_SOURCE - -/* Define as the return type of signal handlers (int or void). */ -#undef RETSIGTYPE - -/* Define to `unsigned' if doesn't define. */ -#undef size_t - -/* If using the C implementation of alloca, define if you know the - direction of stack growth for your system; otherwise it will be - automatically deduced at run-time. - STACK_DIRECTION > 0 => grows toward higher addresses - STACK_DIRECTION < 0 => grows toward lower addresses - STACK_DIRECTION = 0 => direction of growth unknown - */ -#undef STACK_DIRECTION - -/* Define if you have the ANSI C header files. */ -#undef STDC_HEADERS - -/* Define if your processor stores words with the most significant - byte first (like Motorola and SPARC, unlike Intel and VAX). */ -#undef WORDS_BIGENDIAN - -/* Define to 1 if NLS is requested. */ -#undef ENABLE_NLS - -/* Define as 1 if you have gettext and don't want to use GNU gettext. */ -#undef HAVE_GETTEXT - -/* Define as 1 if you have the stpcpy function. */ -#undef HAVE_STPCPY - -/* Define if your locale.h file contains LC_MESSAGES. */ -#undef HAVE_LC_MESSAGES - -/* Define if you have the __argz_count function. */ -#undef HAVE___ARGZ_COUNT - -/* Define if you have the __argz_next function. */ -#undef HAVE___ARGZ_NEXT - -/* Define if you have the __argz_stringify function. */ -#undef HAVE___ARGZ_STRINGIFY - -/* Define if you have the __setfpucw function. */ -#undef HAVE___SETFPUCW - -/* Define if you have the dcgettext function. */ -#undef HAVE_DCGETTEXT - -/* Define if you have the getcwd function. */ -#undef HAVE_GETCWD - -/* Define if you have the getpagesize function. */ -#undef HAVE_GETPAGESIZE - -/* Define if you have the getrusage function. */ -#undef HAVE_GETRUSAGE - -/* Define if you have the munmap function. */ -#undef HAVE_MUNMAP - -/* Define if you have the putenv function. */ -#undef HAVE_PUTENV - -/* Define if you have the setenv function. */ -#undef HAVE_SETENV - -/* Define if you have the setlocale function. */ -#undef HAVE_SETLOCALE - -/* Define if you have the sigaction function. */ -#undef HAVE_SIGACTION - -/* Define if you have the stpcpy function. */ -#undef HAVE_STPCPY - -/* Define if you have the strcasecmp function. */ -#undef HAVE_STRCASECMP - -/* Define if you have the strchr function. */ -#undef HAVE_STRCHR - -/* Define if you have the time function. */ -#undef HAVE_TIME - -/* Define if you have the header file. */ -#undef HAVE_ARGZ_H - -/* Define if you have the header file. */ -#undef HAVE_DLFCN_H - -/* Define if you have the header file. */ -#undef HAVE_ERRNO_H - -/* Define if you have the header file. */ -#undef HAVE_FCNTL_H - -/* Define if you have the header file. */ -#undef HAVE_FPU_CONTROL_H - -/* Define if you have the header file. */ -#undef HAVE_LIMITS_H - -/* Define if you have the header file. */ -#undef HAVE_LOCALE_H - -/* Define if you have the header file. */ -#undef HAVE_MALLOC_H - -/* Define if you have the header file. */ -#undef HAVE_NL_TYPES_H - -/* Define if you have the header file. */ -#undef HAVE_STDLIB_H - -/* Define if you have the header file. */ -#undef HAVE_STRING_H - -/* Define if you have the header file. */ -#undef HAVE_STRINGS_H - -/* Define if you have the header file. */ -#undef HAVE_SYS_PARAM_H - -/* Define if you have the header file. */ -#undef HAVE_SYS_RESOURCE_H - -/* Define if you have the header file. */ -#undef HAVE_SYS_STAT_H - -/* Define if you have the header file. */ -#undef HAVE_SYS_TIME_H - -/* Define if you have the header file. */ -#undef HAVE_TIME_H - -/* Define if you have the header file. */ -#undef HAVE_UNISTD_H - -/* Define if you have the header file. */ -#undef HAVE_VALUES_H - -/* Define if you have the nsl library (-lnsl). */ -#undef HAVE_LIBNSL - -/* Define if you have the socket library (-lsocket). */ -#undef HAVE_LIBSOCKET diff --git a/sim/sh64/configure b/sim/sh64/configure deleted file mode 100755 index 2a6ab864694..00000000000 --- a/sim/sh64/configure +++ /dev/null @@ -1,9007 +0,0 @@ -#! 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then - enableval="$enable_maintainer_mode" - case "${enableval}" in - yes) MAINT="" USE_MAINTAINER_MODE=yes ;; - no) MAINT="#" ;; - *) { { echo "$as_me:$LINENO: error: \"--enable-maintainer-mode does not take a value\"" >&5 -echo "$as_me: error: \"--enable-maintainer-mode does not take a value\"" >&2;} - { (exit 1); exit 1; }; }; MAINT="#" ;; -esac -if test x"$silent" != x"yes" && test x"$MAINT" = x""; then - echo "Setting maintainer mode" 6>&1 -fi -else - MAINT="#" -fi; - - -# Check whether --enable-sim-bswap or --disable-sim-bswap was given. -if test "${enable_sim_bswap+set}" = set; then - enableval="$enable_sim_bswap" - case "${enableval}" in - yes) sim_bswap="-DWITH_BSWAP=1 -DUSE_BSWAP=1";; - no) sim_bswap="-DWITH_BSWAP=0";; - *) { { echo "$as_me:$LINENO: error: \"--enable-sim-bswap does not take a value\"" >&5 -echo "$as_me: error: \"--enable-sim-bswap does not take a value\"" >&2;} - { (exit 1); exit 1; }; }; sim_bswap="";; -esac -if test x"$silent" != x"yes" && test x"$sim_bswap" != x""; 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}; }; then - # It does; now see whether it defined to BIG_ENDIAN or not. -cat >conftest.$ac_ext <<_ACEOF -/* confdefs.h. */ -_ACEOF -cat confdefs.h >>conftest.$ac_ext -cat >>conftest.$ac_ext <<_ACEOF -/* end confdefs.h. */ -#include -#include - -int -main () -{ -#if BYTE_ORDER != BIG_ENDIAN - not big endian -#endif - - ; - return 0; -} -_ACEOF -rm -f conftest.$ac_objext -if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 - (eval $ac_compile) 2>conftest.er1 - ac_status=$? - grep -v '^ *+' conftest.er1 >conftest.err - rm -f conftest.er1 - cat conftest.err >&5 - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" - || test ! -s conftest.err' - { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 - (eval $ac_try) 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 - (eval $ac_try) 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); 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See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU sh64 -#define WANT_CPU_SH64 - -#include "sim-main.h" -#include "cgen-ops.h" - -/* Get the value of h-pc. */ - -UDI -sh64_h_pc_get (SIM_CPU *current_cpu) -{ - return GET_H_PC (); -} - -/* Set a value for h-pc. */ - -void -sh64_h_pc_set (SIM_CPU *current_cpu, UDI newval) -{ - SET_H_PC (newval); -} - -/* Get the value of h-gr. */ - -DI -sh64_h_gr_get (SIM_CPU *current_cpu, UINT regno) -{ - return GET_H_GR (regno); -} - -/* Set a value for h-gr. */ - -void -sh64_h_gr_set (SIM_CPU *current_cpu, UINT regno, DI newval) -{ - SET_H_GR (regno, newval); -} - -/* Get the value of h-grc. */ - -SI -sh64_h_grc_get (SIM_CPU *current_cpu, UINT regno) -{ - return GET_H_GRC (regno); -} - -/* Set a value for h-grc. */ - -void -sh64_h_grc_set (SIM_CPU *current_cpu, UINT regno, SI newval) -{ - SET_H_GRC (regno, newval); -} - -/* Get the value of h-cr. */ - -DI -sh64_h_cr_get (SIM_CPU *current_cpu, UINT regno) -{ - return GET_H_CR (regno); -} - -/* Set a value for h-cr. */ - -void -sh64_h_cr_set (SIM_CPU *current_cpu, UINT regno, DI newval) -{ - SET_H_CR (regno, newval); -} - -/* Get the value of h-sr. */ - -SI -sh64_h_sr_get (SIM_CPU *current_cpu) -{ - return CPU (h_sr); -} - -/* Set a value for h-sr. */ - -void -sh64_h_sr_set (SIM_CPU *current_cpu, SI newval) -{ - CPU (h_sr) = newval; -} - -/* Get the value of h-fpscr. */ - -SI -sh64_h_fpscr_get (SIM_CPU *current_cpu) -{ - return CPU (h_fpscr); -} - -/* Set a value for h-fpscr. */ - -void -sh64_h_fpscr_set (SIM_CPU *current_cpu, SI newval) -{ - CPU (h_fpscr) = newval; -} - -/* Get the value of h-frbit. */ - -BI -sh64_h_frbit_get (SIM_CPU *current_cpu) -{ - return GET_H_FRBIT (); -} - -/* Set a value for h-frbit. */ - -void -sh64_h_frbit_set (SIM_CPU *current_cpu, BI newval) -{ - SET_H_FRBIT (newval); -} - -/* Get the value of h-szbit. */ - -BI -sh64_h_szbit_get (SIM_CPU *current_cpu) -{ - return GET_H_SZBIT (); -} - -/* Set a value for h-szbit. */ - -void -sh64_h_szbit_set (SIM_CPU *current_cpu, BI newval) -{ - SET_H_SZBIT (newval); -} - -/* Get the value of h-prbit. */ - -BI -sh64_h_prbit_get (SIM_CPU *current_cpu) -{ - return GET_H_PRBIT (); -} - -/* Set a value for h-prbit. */ - -void -sh64_h_prbit_set (SIM_CPU *current_cpu, BI newval) -{ - SET_H_PRBIT (newval); -} - -/* Get the value of h-sbit. */ - -BI -sh64_h_sbit_get (SIM_CPU *current_cpu) -{ - return GET_H_SBIT (); -} - -/* Set a value for h-sbit. */ - -void -sh64_h_sbit_set (SIM_CPU *current_cpu, BI newval) -{ - SET_H_SBIT (newval); -} - -/* Get the value of h-mbit. */ - -BI -sh64_h_mbit_get (SIM_CPU *current_cpu) -{ - return GET_H_MBIT (); -} - -/* Set a value for h-mbit. */ - -void -sh64_h_mbit_set (SIM_CPU *current_cpu, BI newval) -{ - SET_H_MBIT (newval); -} - -/* Get the value of h-qbit. */ - -BI -sh64_h_qbit_get (SIM_CPU *current_cpu) -{ - return GET_H_QBIT (); -} - -/* Set a value for h-qbit. */ - -void -sh64_h_qbit_set (SIM_CPU *current_cpu, BI newval) -{ - SET_H_QBIT (newval); -} - -/* Get the value of h-fr. */ - -SF -sh64_h_fr_get (SIM_CPU *current_cpu, UINT regno) -{ - return CPU (h_fr[regno]); -} - -/* Set a value for h-fr. */ - -void -sh64_h_fr_set (SIM_CPU *current_cpu, UINT regno, SF newval) -{ - CPU (h_fr[regno]) = newval; -} - -/* Get the value of h-fp. */ - -DF -sh64_h_fp_get (SIM_CPU *current_cpu, UINT regno) -{ - return CPU (h_fp[regno]); -} - -/* Set a value for h-fp. */ - -void -sh64_h_fp_set (SIM_CPU *current_cpu, UINT regno, DF newval) -{ - CPU (h_fp[regno]) = newval; -} - -/* Get the value of h-fv. */ - -SF -sh64_h_fv_get (SIM_CPU *current_cpu, UINT regno) -{ - return GET_H_FV (regno); -} - -/* Set a value for h-fv. */ - -void -sh64_h_fv_set (SIM_CPU *current_cpu, UINT regno, SF newval) -{ - SET_H_FV (regno, newval); -} - -/* Get the value of h-fmtx. */ - -SF -sh64_h_fmtx_get (SIM_CPU *current_cpu, UINT regno) -{ - return GET_H_FMTX (regno); -} - -/* Set a value for h-fmtx. */ - -void -sh64_h_fmtx_set (SIM_CPU *current_cpu, UINT regno, SF newval) -{ - SET_H_FMTX (regno, newval); -} - -/* Get the value of h-dr. */ - -DF -sh64_h_dr_get (SIM_CPU *current_cpu, UINT regno) -{ - return GET_H_DR (regno); -} - -/* Set a value for h-dr. */ - -void -sh64_h_dr_set (SIM_CPU *current_cpu, UINT regno, DF newval) -{ - SET_H_DR (regno, newval); -} - -/* Get the value of h-tr. */ - -DI -sh64_h_tr_get (SIM_CPU *current_cpu, UINT regno) -{ - return CPU (h_tr[regno]); -} - -/* Set a value for h-tr. */ - -void -sh64_h_tr_set (SIM_CPU *current_cpu, UINT regno, DI newval) -{ - CPU (h_tr[regno]) = newval; -} - -/* Get the value of h-endian. */ - -BI -sh64_h_endian_get (SIM_CPU *current_cpu) -{ - return GET_H_ENDIAN (); -} - -/* Set a value for h-endian. */ - -void -sh64_h_endian_set (SIM_CPU *current_cpu, BI newval) -{ - SET_H_ENDIAN (newval); -} - -/* Get the value of h-ism. */ - -BI -sh64_h_ism_get (SIM_CPU *current_cpu) -{ - return GET_H_ISM (); -} - -/* Set a value for h-ism. */ - -void -sh64_h_ism_set (SIM_CPU *current_cpu, BI newval) -{ - SET_H_ISM (newval); -} - -/* Get the value of h-frc. */ - -SF -sh64_h_frc_get (SIM_CPU *current_cpu, UINT regno) -{ - return GET_H_FRC (regno); -} - -/* Set a value for h-frc. */ - -void -sh64_h_frc_set (SIM_CPU *current_cpu, UINT regno, SF newval) -{ - SET_H_FRC (regno, newval); -} - -/* Get the value of h-drc. */ - -DF -sh64_h_drc_get (SIM_CPU *current_cpu, UINT regno) -{ - return GET_H_DRC (regno); -} - -/* Set a value for h-drc. */ - -void -sh64_h_drc_set (SIM_CPU *current_cpu, UINT regno, DF newval) -{ - SET_H_DRC (regno, newval); -} - -/* Get the value of h-xf. */ - -SF -sh64_h_xf_get (SIM_CPU *current_cpu, UINT regno) -{ - return GET_H_XF (regno); -} - -/* Set a value for h-xf. */ - -void -sh64_h_xf_set (SIM_CPU *current_cpu, UINT regno, SF newval) -{ - SET_H_XF (regno, newval); -} - -/* Get the value of h-xd. */ - -DF -sh64_h_xd_get (SIM_CPU *current_cpu, UINT regno) -{ - return GET_H_XD (regno); -} - -/* Set a value for h-xd. */ - -void -sh64_h_xd_set (SIM_CPU *current_cpu, UINT regno, DF newval) -{ - SET_H_XD (regno, newval); -} - -/* Get the value of h-fvc. */ - -SF -sh64_h_fvc_get (SIM_CPU *current_cpu, UINT regno) -{ - return GET_H_FVC (regno); -} - -/* Set a value for h-fvc. */ - -void -sh64_h_fvc_set (SIM_CPU *current_cpu, UINT regno, SF newval) -{ - SET_H_FVC (regno, newval); -} - -/* Get the value of h-fpccr. */ - -SI -sh64_h_fpccr_get (SIM_CPU *current_cpu) -{ - return GET_H_FPCCR (); -} - -/* Set a value for h-fpccr. */ - -void -sh64_h_fpccr_set (SIM_CPU *current_cpu, SI newval) -{ - SET_H_FPCCR (newval); -} - -/* Get the value of h-gbr. */ - -SI -sh64_h_gbr_get (SIM_CPU *current_cpu) -{ - return GET_H_GBR (); -} - -/* Set a value for h-gbr. */ - -void -sh64_h_gbr_set (SIM_CPU *current_cpu, SI newval) -{ - SET_H_GBR (newval); -} - -/* Get the value of h-pr. */ - -SI -sh64_h_pr_get (SIM_CPU *current_cpu) -{ - return GET_H_PR (); -} - -/* Set a value for h-pr. */ - -void -sh64_h_pr_set (SIM_CPU *current_cpu, SI newval) -{ - SET_H_PR (newval); -} - -/* Get the value of h-macl. */ - -SI -sh64_h_macl_get (SIM_CPU *current_cpu) -{ - return GET_H_MACL (); -} - -/* Set a value for h-macl. */ - -void -sh64_h_macl_set (SIM_CPU *current_cpu, SI newval) -{ - SET_H_MACL (newval); -} - -/* Get the value of h-mach. */ - -SI -sh64_h_mach_get (SIM_CPU *current_cpu) -{ - return GET_H_MACH (); -} - -/* Set a value for h-mach. */ - -void -sh64_h_mach_set (SIM_CPU *current_cpu, SI newval) -{ - SET_H_MACH (newval); -} - -/* Get the value of h-tbit. */ - -BI -sh64_h_tbit_get (SIM_CPU *current_cpu) -{ - return GET_H_TBIT (); -} - -/* Set a value for h-tbit. */ - -void -sh64_h_tbit_set (SIM_CPU *current_cpu, BI newval) -{ - SET_H_TBIT (newval); -} - -/* Record trace results for INSN. */ - -void -sh64_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn, - int *indices, TRACE_RECORD *tr) -{ -} diff --git a/sim/sh64/cpu.h b/sim/sh64/cpu.h deleted file mode 100644 index 6e0d35880f9..00000000000 --- a/sim/sh64/cpu.h +++ /dev/null @@ -1,302 +0,0 @@ -/* CPU family header for sh64. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef CPU_SH64_H -#define CPU_SH64_H - -/* Maximum number of instructions that are fetched at a time. - This is for LIW type instructions sets (e.g. m32r). */ -#define MAX_LIW_INSNS 1 - -/* Maximum number of instructions that can be executed in parallel. */ -#define MAX_PARALLEL_INSNS 1 - -/* CPU state information. */ -typedef struct { - /* Hardware elements. */ - struct { - /* Program counter */ - UDI h_pc; -#define GET_H_PC() CPU (h_pc) -#define SET_H_PC(x) \ -do { \ -{\ -CPU (h_ism) = ANDDI ((x), 1);\ -CPU (h_pc) = ANDDI ((x), INVDI (1));\ -}\ -;} while (0) - /* General purpose integer registers */ - DI h_gr[64]; -#define GET_H_GR(index) ((((index) == (63))) ? (0) : (CPU (h_gr[index]))) -#define SET_H_GR(index, x) \ -do { \ -if ((((index)) != (63))) {\ -CPU (h_gr[(index)]) = (x);\ -} else {\ -((void) 0); /*nop*/\ -}\ -;} while (0) - /* Control registers */ - DI h_cr[64]; -#define GET_H_CR(index) ((((index) == (0))) ? (ZEXTSIDI (CPU (h_sr))) : (CPU (h_cr[index]))) -#define SET_H_CR(index, x) \ -do { \ -if ((((index)) == (0))) {\ -CPU (h_sr) = (x);\ -} else {\ -CPU (h_cr[(index)]) = (x);\ -}\ -;} while (0) - /* Status register */ - SI h_sr; -#define GET_H_SR() CPU (h_sr) -#define SET_H_SR(x) (CPU (h_sr) = (x)) - /* Floating point status and control register */ - SI h_fpscr; -#define GET_H_FPSCR() CPU (h_fpscr) -#define SET_H_FPSCR(x) (CPU (h_fpscr) = (x)) - /* Single precision floating point registers */ - SF h_fr[64]; -#define GET_H_FR(a1) CPU (h_fr)[a1] -#define SET_H_FR(a1, x) (CPU (h_fr)[a1] = (x)) - /* Single precision floating point register pairs */ - DF h_fp[32]; -#define GET_H_FP(a1) CPU (h_fp)[a1] -#define SET_H_FP(a1, x) (CPU (h_fp)[a1] = (x)) - /* Branch target registers */ - DI h_tr[8]; -#define GET_H_TR(a1) CPU (h_tr)[a1] -#define SET_H_TR(a1, x) (CPU (h_tr)[a1] = (x)) - /* Current instruction set mode */ - BI h_ism; -#define GET_H_ISM() CPU (h_ism) -#define SET_H_ISM(x) \ -do { \ -cgen_rtx_error (current_cpu, "cannot set ism directly");\ -;} while (0) - } hardware; -#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware) -} SH64_CPU_DATA; - -/* Virtual regs. */ - -#define GET_H_GRC(index) ANDDI (CPU (h_gr[index]), ZEXTSIDI (0xffffffff)) -#define SET_H_GRC(index, x) \ -do { \ -CPU (h_gr[(index)]) = EXTSIDI ((x));\ -;} while (0) -#define GET_H_FRBIT() ANDSI (SRLSI (CPU (h_sr), 14), 1) -#define SET_H_FRBIT(x) \ -do { \ -CPU (h_sr) = ORSI (ANDSI (CPU (h_sr), (~ (((1) << (14))))), SLLSI ((x), 14));\ -;} while (0) -#define GET_H_SZBIT() ANDSI (SRLSI (CPU (h_sr), 13), 1) -#define SET_H_SZBIT(x) \ -do { \ -CPU (h_sr) = ORSI (ANDSI (CPU (h_sr), (~ (((1) << (13))))), SLLSI ((x), 13));\ -;} while (0) -#define GET_H_PRBIT() ANDSI (SRLSI (CPU (h_sr), 12), 1) -#define SET_H_PRBIT(x) \ -do { \ -CPU (h_sr) = ORSI (ANDSI (CPU (h_sr), (~ (((1) << (12))))), SLLSI ((x), 12));\ -;} while (0) -#define GET_H_SBIT() ANDSI (SRLSI (CPU (h_sr), 1), 1) -#define SET_H_SBIT(x) \ -do { \ -CPU (h_sr) = ORSI (ANDSI (CPU (h_sr), (~ (2))), SLLSI ((x), 1));\ -;} while (0) -#define GET_H_MBIT() ANDSI (SRLSI (CPU (h_sr), 9), 1) -#define SET_H_MBIT(x) \ -do { \ -CPU (h_sr) = ORSI (ANDSI (CPU (h_sr), (~ (((1) << (9))))), SLLSI ((x), 9));\ -;} while (0) -#define GET_H_QBIT() ANDSI (SRLSI (CPU (h_sr), 8), 1) -#define SET_H_QBIT(x) \ -do { \ -CPU (h_sr) = ORSI (ANDSI (CPU (h_sr), (~ (((1) << (8))))), SLLSI ((x), 8));\ -;} while (0) -#define GET_H_FV(index) CPU (h_fr[MULQI (ANDQI (index, 15), 4)]) -#define SET_H_FV(index, x) \ -do { \ -CPU (h_fr[MULQI (ANDQI ((index), 15), 4)]) = (x);\ -;} while (0) -#define GET_H_FMTX(index) CPU (h_fr[MULQI (ANDQI (index, 3), 16)]) -#define SET_H_FMTX(index, x) \ -do { \ -CPU (h_fr[MULQI (ANDQI ((index), 3), 16)]) = (x);\ -;} while (0) -#define GET_H_DR(index) SUBWORDDIDF (ORDI (SLLDI (ZEXTSIDI (SUBWORDSFSI (CPU (h_fr[index]))), 32), ZEXTSIDI (SUBWORDSFSI (CPU (h_fr[((index) + (1))]))))) -#define SET_H_DR(index, x) \ -do { \ -{\ -CPU (h_fr[(index)]) = SUBWORDSISF (SUBWORDDFSI ((x), 0));\ -CPU (h_fr[(((index)) + (1))]) = SUBWORDSISF (SUBWORDDFSI ((x), 1));\ -}\ -;} while (0) -#define GET_H_ENDIAN() sh64_endian (current_cpu) -#define SET_H_ENDIAN(x) \ -do { \ -cgen_rtx_error (current_cpu, "cannot alter target byte order mid-program");\ -;} while (0) -#define GET_H_FRC(index) CPU (h_fr[((((16) * (GET_H_FRBIT ()))) + (index))]) -#define SET_H_FRC(index, x) \ -do { \ -CPU (h_fr[((((16) * (GET_H_FRBIT ()))) + ((index)))]) = (x);\ -;} while (0) -#define GET_H_DRC(index) GET_H_DR (((((16) * (GET_H_FRBIT ()))) + (index))) -#define SET_H_DRC(index, x) \ -do { \ -SET_H_DR (((((16) * (GET_H_FRBIT ()))) + ((index))), (x));\ -;} while (0) -#define GET_H_XF(index) CPU (h_fr[((((16) * (NOTBI (GET_H_FRBIT ())))) + (index))]) -#define SET_H_XF(index, x) \ -do { \ -CPU (h_fr[((((16) * (NOTBI (GET_H_FRBIT ())))) + ((index)))]) = (x);\ -;} while (0) -#define GET_H_XD(index) GET_H_DR (((((16) * (NOTBI (GET_H_FRBIT ())))) + (index))) -#define SET_H_XD(index, x) \ -do { \ -SET_H_DR (((((16) * (NOTBI (GET_H_FRBIT ())))) + ((index))), (x));\ -;} while (0) -#define GET_H_FVC(index) CPU (h_fr[((((16) * (GET_H_FRBIT ()))) + (index))]) -#define SET_H_FVC(index, x) \ -do { \ -CPU (h_fr[((((16) * (GET_H_FRBIT ()))) + ((index)))]) = (x);\ -;} while (0) -#define GET_H_FPCCR() ORSI (ORSI (ORSI (CPU (h_fpscr), SLLSI (GET_H_PRBIT (), 19)), SLLSI (GET_H_SZBIT (), 20)), SLLSI (GET_H_FRBIT (), 21)) -#define SET_H_FPCCR(x) \ -do { \ -{\ -CPU (h_fpscr) = (x);\ -SET_H_PRBIT (ANDSI (SRLSI ((x), 19), 1));\ -SET_H_SZBIT (ANDSI (SRLSI ((x), 20), 1));\ -SET_H_FRBIT (ANDSI (SRLSI ((x), 21), 1));\ -}\ -;} while (0) -#define GET_H_GBR() SUBWORDDISI (CPU (h_gr[((UINT) 16)]), 1) -#define SET_H_GBR(x) \ -do { \ -CPU (h_gr[((UINT) 16)]) = EXTSIDI ((x));\ -;} while (0) -#define GET_H_PR() SUBWORDDISI (CPU (h_gr[((UINT) 18)]), 1) -#define SET_H_PR(x) \ -do { \ -CPU (h_gr[((UINT) 18)]) = EXTSIDI ((x));\ -;} while (0) -#define GET_H_MACL() SUBWORDDISI (CPU (h_gr[((UINT) 17)]), 1) -#define SET_H_MACL(x) \ -do { \ -CPU (h_gr[((UINT) 17)]) = ORDI (SLLDI (ZEXTSIDI (SUBWORDDISI (CPU (h_gr[((UINT) 17)]), 0)), 32), ZEXTSIDI ((x)));\ -;} while (0) -#define GET_H_MACH() SUBWORDDISI (CPU (h_gr[((UINT) 17)]), 0) -#define SET_H_MACH(x) \ -do { \ -CPU (h_gr[((UINT) 17)]) = ORDI (SLLDI (ZEXTSIDI ((x)), 32), ZEXTSIDI (SUBWORDDISI (CPU (h_gr[((UINT) 17)]), 1)));\ -;} while (0) -#define GET_H_TBIT() ANDBI (CPU (h_gr[((UINT) 19)]), 1) -#define SET_H_TBIT(x) \ -do { \ -CPU (h_gr[((UINT) 19)]) = ORDI (ANDDI (CPU (h_gr[((UINT) 19)]), INVDI (1)), ZEXTBIDI ((x)));\ -;} while (0) - -/* Cover fns for register access. */ -UDI sh64_h_pc_get (SIM_CPU *); -void sh64_h_pc_set (SIM_CPU *, UDI); -DI sh64_h_gr_get (SIM_CPU *, UINT); -void sh64_h_gr_set (SIM_CPU *, UINT, DI); -SI sh64_h_grc_get (SIM_CPU *, UINT); -void sh64_h_grc_set (SIM_CPU *, UINT, SI); -DI sh64_h_cr_get (SIM_CPU *, UINT); -void sh64_h_cr_set (SIM_CPU *, UINT, DI); -SI sh64_h_sr_get (SIM_CPU *); -void sh64_h_sr_set (SIM_CPU *, SI); -SI sh64_h_fpscr_get (SIM_CPU *); -void sh64_h_fpscr_set (SIM_CPU *, SI); -BI sh64_h_frbit_get (SIM_CPU *); -void sh64_h_frbit_set (SIM_CPU *, BI); -BI sh64_h_szbit_get (SIM_CPU *); -void sh64_h_szbit_set (SIM_CPU *, BI); -BI sh64_h_prbit_get (SIM_CPU *); -void sh64_h_prbit_set (SIM_CPU *, BI); -BI sh64_h_sbit_get (SIM_CPU *); -void sh64_h_sbit_set (SIM_CPU *, BI); -BI sh64_h_mbit_get (SIM_CPU *); -void sh64_h_mbit_set (SIM_CPU *, BI); -BI sh64_h_qbit_get (SIM_CPU *); -void sh64_h_qbit_set (SIM_CPU *, BI); -SF sh64_h_fr_get (SIM_CPU *, UINT); -void sh64_h_fr_set (SIM_CPU *, UINT, SF); -DF sh64_h_fp_get (SIM_CPU *, UINT); -void sh64_h_fp_set (SIM_CPU *, UINT, DF); -SF sh64_h_fv_get (SIM_CPU *, UINT); -void sh64_h_fv_set (SIM_CPU *, UINT, SF); -SF sh64_h_fmtx_get (SIM_CPU *, UINT); -void sh64_h_fmtx_set (SIM_CPU *, UINT, SF); -DF sh64_h_dr_get (SIM_CPU *, UINT); -void sh64_h_dr_set (SIM_CPU *, UINT, DF); -DI sh64_h_tr_get (SIM_CPU *, UINT); -void sh64_h_tr_set (SIM_CPU *, UINT, DI); -BI sh64_h_endian_get (SIM_CPU *); -void sh64_h_endian_set (SIM_CPU *, BI); -BI sh64_h_ism_get (SIM_CPU *); -void sh64_h_ism_set (SIM_CPU *, BI); -SF sh64_h_frc_get (SIM_CPU *, UINT); -void sh64_h_frc_set (SIM_CPU *, UINT, SF); -DF sh64_h_drc_get (SIM_CPU *, UINT); -void sh64_h_drc_set (SIM_CPU *, UINT, DF); -SF sh64_h_xf_get (SIM_CPU *, UINT); -void sh64_h_xf_set (SIM_CPU *, UINT, SF); -DF sh64_h_xd_get (SIM_CPU *, UINT); -void sh64_h_xd_set (SIM_CPU *, UINT, DF); -SF sh64_h_fvc_get (SIM_CPU *, UINT); -void sh64_h_fvc_set (SIM_CPU *, UINT, SF); -SI sh64_h_fpccr_get (SIM_CPU *); -void sh64_h_fpccr_set (SIM_CPU *, SI); -SI sh64_h_gbr_get (SIM_CPU *); -void sh64_h_gbr_set (SIM_CPU *, SI); -SI sh64_h_pr_get (SIM_CPU *); -void sh64_h_pr_set (SIM_CPU *, SI); -SI sh64_h_macl_get (SIM_CPU *); -void sh64_h_macl_set (SIM_CPU *, SI); -SI sh64_h_mach_get (SIM_CPU *); -void sh64_h_mach_set (SIM_CPU *, SI); -BI sh64_h_tbit_get (SIM_CPU *); -void sh64_h_tbit_set (SIM_CPU *, BI); - -/* These must be hand-written. */ -extern CPUREG_FETCH_FN sh64_fetch_register; -extern CPUREG_STORE_FN sh64_store_register; - -typedef struct { - int empty; -} MODEL_SH5_DATA; - -/* Collection of various things for the trace handler to use. */ - -typedef struct trace_record { - IADDR pc; - /* FIXME:wip */ -} TRACE_RECORD; - -#endif /* CPU_SH64_H */ diff --git a/sim/sh64/cpuall.h b/sim/sh64/cpuall.h deleted file mode 100644 index ba6a1e5d714..00000000000 --- a/sim/sh64/cpuall.h +++ /dev/null @@ -1,70 +0,0 @@ -/* Simulator CPU header for sh. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef SH_CPUALL_H -#define SH_CPUALL_H - -/* Include files for each cpu family. */ - -#ifdef WANT_CPU_SH64 -#include "eng.h" -#include "cgen-engine.h" -#include "cpu.h" -#include "decode.h" -#endif - -extern const MACH sh2_mach; -extern const MACH sh3_mach; -extern const MACH sh3e_mach; -extern const MACH sh4_mach; -extern const MACH sh5_mach; - -#ifndef WANT_CPU -/* The ARGBUF struct. */ -struct argbuf { - /* These are the baseclass definitions. */ - IADDR addr; - const IDESC *idesc; - char trace_p; - char profile_p; - /* ??? Temporary hack for skip insns. */ - char skip_count; - char unused; - /* cpu specific data follows */ -}; -#endif - -#ifndef WANT_CPU -/* A cached insn. - - ??? SCACHE used to contain more than just argbuf. We could delete the - type entirely and always just use ARGBUF, but for future concerns and as - a level of abstraction it is left in. */ - -struct scache { - struct argbuf argbuf; -}; -#endif - -#endif /* SH_CPUALL_H */ diff --git a/sim/sh64/decode-compact.c b/sim/sh64/decode-compact.c deleted file mode 100644 index ce85438323c..00000000000 --- a/sim/sh64/decode-compact.c +++ /dev/null @@ -1,2640 +0,0 @@ -/* Simulator instruction decoder for sh64_compact. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU sh64 -#define WANT_CPU_SH64 - -#include "sim-main.h" -#include "sim-assert.h" - -/* The instruction descriptor array. - This is computed at runtime. Space for it is not malloc'd to save a - teensy bit of cpu in the decoder. Moving it to malloc space is trivial - but won't be done until necessary (we don't currently support the runtime - addition of instructions nor an SMP machine with different cpus). */ -static IDESC sh64_compact_insn_data[SH64_COMPACT_INSN_MAX]; - -/* Commas between elements are contained in the macros. - Some of these are conditionally compiled out. */ - -static const struct insn_sem sh64_compact_insn_sem[] = -{ - { VIRTUAL_INSN_X_INVALID, SH64_COMPACT_INSN_X_INVALID, SH64_COMPACT_SFMT_EMPTY }, - { VIRTUAL_INSN_X_AFTER, SH64_COMPACT_INSN_X_AFTER, SH64_COMPACT_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEFORE, SH64_COMPACT_INSN_X_BEFORE, SH64_COMPACT_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CTI_CHAIN, SH64_COMPACT_INSN_X_CTI_CHAIN, SH64_COMPACT_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CHAIN, SH64_COMPACT_INSN_X_CHAIN, SH64_COMPACT_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEGIN, SH64_COMPACT_INSN_X_BEGIN, SH64_COMPACT_SFMT_EMPTY }, - { SH_INSN_ADD_COMPACT, SH64_COMPACT_INSN_ADD_COMPACT, SH64_COMPACT_SFMT_ADD_COMPACT }, - { SH_INSN_ADDI_COMPACT, SH64_COMPACT_INSN_ADDI_COMPACT, SH64_COMPACT_SFMT_ADDI_COMPACT }, - { SH_INSN_ADDC_COMPACT, SH64_COMPACT_INSN_ADDC_COMPACT, SH64_COMPACT_SFMT_ADDC_COMPACT }, - { SH_INSN_ADDV_COMPACT, SH64_COMPACT_INSN_ADDV_COMPACT, SH64_COMPACT_SFMT_ADDV_COMPACT }, - { SH_INSN_AND_COMPACT, SH64_COMPACT_INSN_AND_COMPACT, SH64_COMPACT_SFMT_AND_COMPACT }, - { SH_INSN_ANDI_COMPACT, SH64_COMPACT_INSN_ANDI_COMPACT, SH64_COMPACT_SFMT_ANDI_COMPACT }, - { SH_INSN_ANDB_COMPACT, SH64_COMPACT_INSN_ANDB_COMPACT, SH64_COMPACT_SFMT_ANDB_COMPACT }, - { SH_INSN_BF_COMPACT, SH64_COMPACT_INSN_BF_COMPACT, SH64_COMPACT_SFMT_BF_COMPACT }, - { SH_INSN_BFS_COMPACT, SH64_COMPACT_INSN_BFS_COMPACT, SH64_COMPACT_SFMT_BF_COMPACT }, - { SH_INSN_BRA_COMPACT, SH64_COMPACT_INSN_BRA_COMPACT, SH64_COMPACT_SFMT_BRA_COMPACT }, - { SH_INSN_BRAF_COMPACT, SH64_COMPACT_INSN_BRAF_COMPACT, SH64_COMPACT_SFMT_BRAF_COMPACT }, - { SH_INSN_BRK_COMPACT, SH64_COMPACT_INSN_BRK_COMPACT, SH64_COMPACT_SFMT_BRK_COMPACT }, - { SH_INSN_BSR_COMPACT, SH64_COMPACT_INSN_BSR_COMPACT, SH64_COMPACT_SFMT_BSR_COMPACT }, - { SH_INSN_BSRF_COMPACT, SH64_COMPACT_INSN_BSRF_COMPACT, SH64_COMPACT_SFMT_BSRF_COMPACT }, - { SH_INSN_BT_COMPACT, SH64_COMPACT_INSN_BT_COMPACT, SH64_COMPACT_SFMT_BF_COMPACT }, - { SH_INSN_BTS_COMPACT, SH64_COMPACT_INSN_BTS_COMPACT, SH64_COMPACT_SFMT_BF_COMPACT }, - { SH_INSN_CLRMAC_COMPACT, SH64_COMPACT_INSN_CLRMAC_COMPACT, SH64_COMPACT_SFMT_CLRMAC_COMPACT }, - { SH_INSN_CLRS_COMPACT, SH64_COMPACT_INSN_CLRS_COMPACT, SH64_COMPACT_SFMT_CLRS_COMPACT }, - { SH_INSN_CLRT_COMPACT, SH64_COMPACT_INSN_CLRT_COMPACT, SH64_COMPACT_SFMT_CLRT_COMPACT }, - { SH_INSN_CMPEQ_COMPACT, SH64_COMPACT_INSN_CMPEQ_COMPACT, SH64_COMPACT_SFMT_CMPEQ_COMPACT }, - { SH_INSN_CMPEQI_COMPACT, SH64_COMPACT_INSN_CMPEQI_COMPACT, SH64_COMPACT_SFMT_CMPEQI_COMPACT }, - { SH_INSN_CMPGE_COMPACT, SH64_COMPACT_INSN_CMPGE_COMPACT, SH64_COMPACT_SFMT_CMPEQ_COMPACT }, - { SH_INSN_CMPGT_COMPACT, SH64_COMPACT_INSN_CMPGT_COMPACT, SH64_COMPACT_SFMT_CMPEQ_COMPACT }, - { SH_INSN_CMPHI_COMPACT, SH64_COMPACT_INSN_CMPHI_COMPACT, SH64_COMPACT_SFMT_CMPEQ_COMPACT }, - { SH_INSN_CMPHS_COMPACT, SH64_COMPACT_INSN_CMPHS_COMPACT, SH64_COMPACT_SFMT_CMPEQ_COMPACT }, - { SH_INSN_CMPPL_COMPACT, SH64_COMPACT_INSN_CMPPL_COMPACT, SH64_COMPACT_SFMT_CMPPL_COMPACT }, - { SH_INSN_CMPPZ_COMPACT, SH64_COMPACT_INSN_CMPPZ_COMPACT, SH64_COMPACT_SFMT_CMPPL_COMPACT }, - { SH_INSN_CMPSTR_COMPACT, SH64_COMPACT_INSN_CMPSTR_COMPACT, SH64_COMPACT_SFMT_CMPEQ_COMPACT }, - { SH_INSN_DIV0S_COMPACT, SH64_COMPACT_INSN_DIV0S_COMPACT, SH64_COMPACT_SFMT_DIV0S_COMPACT }, - { SH_INSN_DIV0U_COMPACT, SH64_COMPACT_INSN_DIV0U_COMPACT, SH64_COMPACT_SFMT_DIV0U_COMPACT }, - { SH_INSN_DIV1_COMPACT, SH64_COMPACT_INSN_DIV1_COMPACT, SH64_COMPACT_SFMT_DIV1_COMPACT }, - { SH_INSN_DMULSL_COMPACT, SH64_COMPACT_INSN_DMULSL_COMPACT, SH64_COMPACT_SFMT_DMULSL_COMPACT }, - { SH_INSN_DMULUL_COMPACT, SH64_COMPACT_INSN_DMULUL_COMPACT, SH64_COMPACT_SFMT_DMULSL_COMPACT }, - { SH_INSN_DT_COMPACT, SH64_COMPACT_INSN_DT_COMPACT, SH64_COMPACT_SFMT_DT_COMPACT }, - { SH_INSN_EXTSB_COMPACT, SH64_COMPACT_INSN_EXTSB_COMPACT, SH64_COMPACT_SFMT_EXTSB_COMPACT }, - { SH_INSN_EXTSW_COMPACT, SH64_COMPACT_INSN_EXTSW_COMPACT, SH64_COMPACT_SFMT_EXTSB_COMPACT }, - { SH_INSN_EXTUB_COMPACT, SH64_COMPACT_INSN_EXTUB_COMPACT, SH64_COMPACT_SFMT_EXTSB_COMPACT }, - { SH_INSN_EXTUW_COMPACT, SH64_COMPACT_INSN_EXTUW_COMPACT, SH64_COMPACT_SFMT_EXTSB_COMPACT }, - { SH_INSN_FABS_COMPACT, SH64_COMPACT_INSN_FABS_COMPACT, SH64_COMPACT_SFMT_FABS_COMPACT }, - { SH_INSN_FADD_COMPACT, SH64_COMPACT_INSN_FADD_COMPACT, SH64_COMPACT_SFMT_FADD_COMPACT }, - { SH_INSN_FCMPEQ_COMPACT, SH64_COMPACT_INSN_FCMPEQ_COMPACT, SH64_COMPACT_SFMT_FCMPEQ_COMPACT }, - { SH_INSN_FCMPGT_COMPACT, SH64_COMPACT_INSN_FCMPGT_COMPACT, SH64_COMPACT_SFMT_FCMPEQ_COMPACT }, - { SH_INSN_FCNVDS_COMPACT, SH64_COMPACT_INSN_FCNVDS_COMPACT, SH64_COMPACT_SFMT_FCNVDS_COMPACT }, - { SH_INSN_FCNVSD_COMPACT, SH64_COMPACT_INSN_FCNVSD_COMPACT, SH64_COMPACT_SFMT_FCNVSD_COMPACT }, - { SH_INSN_FDIV_COMPACT, SH64_COMPACT_INSN_FDIV_COMPACT, SH64_COMPACT_SFMT_FADD_COMPACT }, - { SH_INSN_FIPR_COMPACT, SH64_COMPACT_INSN_FIPR_COMPACT, SH64_COMPACT_SFMT_FIPR_COMPACT }, - { SH_INSN_FLDS_COMPACT, SH64_COMPACT_INSN_FLDS_COMPACT, SH64_COMPACT_SFMT_FLDS_COMPACT }, - { SH_INSN_FLDI0_COMPACT, SH64_COMPACT_INSN_FLDI0_COMPACT, SH64_COMPACT_SFMT_FLDI0_COMPACT }, - { SH_INSN_FLDI1_COMPACT, SH64_COMPACT_INSN_FLDI1_COMPACT, SH64_COMPACT_SFMT_FLDI0_COMPACT }, - { SH_INSN_FLOAT_COMPACT, SH64_COMPACT_INSN_FLOAT_COMPACT, SH64_COMPACT_SFMT_FLOAT_COMPACT }, - { SH_INSN_FMAC_COMPACT, SH64_COMPACT_INSN_FMAC_COMPACT, SH64_COMPACT_SFMT_FMAC_COMPACT }, - { SH_INSN_FMOV1_COMPACT, SH64_COMPACT_INSN_FMOV1_COMPACT, SH64_COMPACT_SFMT_FMOV1_COMPACT }, - { SH_INSN_FMOV2_COMPACT, SH64_COMPACT_INSN_FMOV2_COMPACT, SH64_COMPACT_SFMT_FMOV2_COMPACT }, - { SH_INSN_FMOV3_COMPACT, SH64_COMPACT_INSN_FMOV3_COMPACT, SH64_COMPACT_SFMT_FMOV3_COMPACT }, - { SH_INSN_FMOV4_COMPACT, SH64_COMPACT_INSN_FMOV4_COMPACT, SH64_COMPACT_SFMT_FMOV4_COMPACT }, - { SH_INSN_FMOV5_COMPACT, SH64_COMPACT_INSN_FMOV5_COMPACT, SH64_COMPACT_SFMT_FMOV5_COMPACT }, - { SH_INSN_FMOV6_COMPACT, SH64_COMPACT_INSN_FMOV6_COMPACT, SH64_COMPACT_SFMT_FMOV6_COMPACT }, - { SH_INSN_FMOV7_COMPACT, SH64_COMPACT_INSN_FMOV7_COMPACT, SH64_COMPACT_SFMT_FMOV7_COMPACT }, - { SH_INSN_FMUL_COMPACT, SH64_COMPACT_INSN_FMUL_COMPACT, SH64_COMPACT_SFMT_FADD_COMPACT }, - { SH_INSN_FNEG_COMPACT, SH64_COMPACT_INSN_FNEG_COMPACT, SH64_COMPACT_SFMT_FABS_COMPACT }, - { SH_INSN_FRCHG_COMPACT, SH64_COMPACT_INSN_FRCHG_COMPACT, SH64_COMPACT_SFMT_FRCHG_COMPACT }, - { SH_INSN_FSCHG_COMPACT, SH64_COMPACT_INSN_FSCHG_COMPACT, SH64_COMPACT_SFMT_FSCHG_COMPACT }, - { SH_INSN_FSQRT_COMPACT, SH64_COMPACT_INSN_FSQRT_COMPACT, SH64_COMPACT_SFMT_FABS_COMPACT }, - { SH_INSN_FSTS_COMPACT, SH64_COMPACT_INSN_FSTS_COMPACT, SH64_COMPACT_SFMT_FSTS_COMPACT }, - { SH_INSN_FSUB_COMPACT, SH64_COMPACT_INSN_FSUB_COMPACT, SH64_COMPACT_SFMT_FADD_COMPACT }, - { SH_INSN_FTRC_COMPACT, SH64_COMPACT_INSN_FTRC_COMPACT, SH64_COMPACT_SFMT_FTRC_COMPACT }, - { SH_INSN_FTRV_COMPACT, SH64_COMPACT_INSN_FTRV_COMPACT, SH64_COMPACT_SFMT_FTRV_COMPACT }, - { SH_INSN_JMP_COMPACT, SH64_COMPACT_INSN_JMP_COMPACT, SH64_COMPACT_SFMT_JMP_COMPACT }, - { SH_INSN_JSR_COMPACT, SH64_COMPACT_INSN_JSR_COMPACT, SH64_COMPACT_SFMT_BSRF_COMPACT }, - { SH_INSN_LDC_COMPACT, SH64_COMPACT_INSN_LDC_COMPACT, SH64_COMPACT_SFMT_LDC_COMPACT }, - { SH_INSN_LDCL_COMPACT, SH64_COMPACT_INSN_LDCL_COMPACT, SH64_COMPACT_SFMT_LDCL_COMPACT }, - { SH_INSN_LDS_FPSCR_COMPACT, SH64_COMPACT_INSN_LDS_FPSCR_COMPACT, SH64_COMPACT_SFMT_LDS_FPSCR_COMPACT }, - { SH_INSN_LDSL_FPSCR_COMPACT, SH64_COMPACT_INSN_LDSL_FPSCR_COMPACT, SH64_COMPACT_SFMT_LDSL_FPSCR_COMPACT }, - { SH_INSN_LDS_FPUL_COMPACT, SH64_COMPACT_INSN_LDS_FPUL_COMPACT, SH64_COMPACT_SFMT_LDS_FPUL_COMPACT }, - { SH_INSN_LDSL_FPUL_COMPACT, SH64_COMPACT_INSN_LDSL_FPUL_COMPACT, SH64_COMPACT_SFMT_LDSL_FPUL_COMPACT }, - { SH_INSN_LDS_MACH_COMPACT, SH64_COMPACT_INSN_LDS_MACH_COMPACT, SH64_COMPACT_SFMT_LDS_MACH_COMPACT }, - { SH_INSN_LDSL_MACH_COMPACT, SH64_COMPACT_INSN_LDSL_MACH_COMPACT, SH64_COMPACT_SFMT_LDSL_MACH_COMPACT }, - { SH_INSN_LDS_MACL_COMPACT, SH64_COMPACT_INSN_LDS_MACL_COMPACT, SH64_COMPACT_SFMT_LDS_MACL_COMPACT }, - { SH_INSN_LDSL_MACL_COMPACT, SH64_COMPACT_INSN_LDSL_MACL_COMPACT, SH64_COMPACT_SFMT_LDSL_MACL_COMPACT }, - { SH_INSN_LDS_PR_COMPACT, SH64_COMPACT_INSN_LDS_PR_COMPACT, SH64_COMPACT_SFMT_LDS_PR_COMPACT }, - { SH_INSN_LDSL_PR_COMPACT, SH64_COMPACT_INSN_LDSL_PR_COMPACT, SH64_COMPACT_SFMT_LDSL_PR_COMPACT }, - { SH_INSN_MACL_COMPACT, SH64_COMPACT_INSN_MACL_COMPACT, SH64_COMPACT_SFMT_MACL_COMPACT }, - { SH_INSN_MACW_COMPACT, SH64_COMPACT_INSN_MACW_COMPACT, SH64_COMPACT_SFMT_MACW_COMPACT }, - { SH_INSN_MOV_COMPACT, SH64_COMPACT_INSN_MOV_COMPACT, SH64_COMPACT_SFMT_MOV_COMPACT }, - { SH_INSN_MOVI_COMPACT, SH64_COMPACT_INSN_MOVI_COMPACT, SH64_COMPACT_SFMT_MOVI_COMPACT }, - { SH_INSN_MOVB1_COMPACT, SH64_COMPACT_INSN_MOVB1_COMPACT, SH64_COMPACT_SFMT_MOVB1_COMPACT }, - { SH_INSN_MOVB2_COMPACT, SH64_COMPACT_INSN_MOVB2_COMPACT, SH64_COMPACT_SFMT_MOVB2_COMPACT }, - { SH_INSN_MOVB3_COMPACT, SH64_COMPACT_INSN_MOVB3_COMPACT, SH64_COMPACT_SFMT_MOVB3_COMPACT }, - { SH_INSN_MOVB4_COMPACT, SH64_COMPACT_INSN_MOVB4_COMPACT, SH64_COMPACT_SFMT_MOVB4_COMPACT }, - { SH_INSN_MOVB5_COMPACT, SH64_COMPACT_INSN_MOVB5_COMPACT, SH64_COMPACT_SFMT_MOVB5_COMPACT }, - { SH_INSN_MOVB6_COMPACT, SH64_COMPACT_INSN_MOVB6_COMPACT, SH64_COMPACT_SFMT_MOVB6_COMPACT }, - { SH_INSN_MOVB7_COMPACT, SH64_COMPACT_INSN_MOVB7_COMPACT, SH64_COMPACT_SFMT_MOVB7_COMPACT }, - { SH_INSN_MOVB8_COMPACT, SH64_COMPACT_INSN_MOVB8_COMPACT, SH64_COMPACT_SFMT_MOVB8_COMPACT }, - { SH_INSN_MOVB9_COMPACT, SH64_COMPACT_INSN_MOVB9_COMPACT, SH64_COMPACT_SFMT_MOVB9_COMPACT }, - { SH_INSN_MOVB10_COMPACT, SH64_COMPACT_INSN_MOVB10_COMPACT, SH64_COMPACT_SFMT_MOVB10_COMPACT }, - { SH_INSN_MOVL1_COMPACT, SH64_COMPACT_INSN_MOVL1_COMPACT, SH64_COMPACT_SFMT_MOVB1_COMPACT }, - { SH_INSN_MOVL2_COMPACT, SH64_COMPACT_INSN_MOVL2_COMPACT, SH64_COMPACT_SFMT_MOVB2_COMPACT }, - { SH_INSN_MOVL3_COMPACT, SH64_COMPACT_INSN_MOVL3_COMPACT, SH64_COMPACT_SFMT_MOVB3_COMPACT }, - { SH_INSN_MOVL4_COMPACT, SH64_COMPACT_INSN_MOVL4_COMPACT, SH64_COMPACT_SFMT_MOVL4_COMPACT }, - { SH_INSN_MOVL5_COMPACT, SH64_COMPACT_INSN_MOVL5_COMPACT, SH64_COMPACT_SFMT_MOVL5_COMPACT }, - { SH_INSN_MOVL6_COMPACT, SH64_COMPACT_INSN_MOVL6_COMPACT, SH64_COMPACT_SFMT_MOVB6_COMPACT }, - { SH_INSN_MOVL7_COMPACT, SH64_COMPACT_INSN_MOVL7_COMPACT, SH64_COMPACT_SFMT_MOVL7_COMPACT }, - { SH_INSN_MOVL8_COMPACT, SH64_COMPACT_INSN_MOVL8_COMPACT, SH64_COMPACT_SFMT_MOVB8_COMPACT }, - { SH_INSN_MOVL9_COMPACT, SH64_COMPACT_INSN_MOVL9_COMPACT, SH64_COMPACT_SFMT_MOVL9_COMPACT }, - { SH_INSN_MOVL10_COMPACT, SH64_COMPACT_INSN_MOVL10_COMPACT, SH64_COMPACT_SFMT_MOVL10_COMPACT }, - { SH_INSN_MOVL11_COMPACT, SH64_COMPACT_INSN_MOVL11_COMPACT, SH64_COMPACT_SFMT_MOVL11_COMPACT }, - { SH_INSN_MOVW1_COMPACT, SH64_COMPACT_INSN_MOVW1_COMPACT, SH64_COMPACT_SFMT_MOVB1_COMPACT }, - { SH_INSN_MOVW2_COMPACT, SH64_COMPACT_INSN_MOVW2_COMPACT, SH64_COMPACT_SFMT_MOVB2_COMPACT }, - { SH_INSN_MOVW3_COMPACT, SH64_COMPACT_INSN_MOVW3_COMPACT, SH64_COMPACT_SFMT_MOVB3_COMPACT }, - { SH_INSN_MOVW4_COMPACT, SH64_COMPACT_INSN_MOVW4_COMPACT, SH64_COMPACT_SFMT_MOVW4_COMPACT }, - { SH_INSN_MOVW5_COMPACT, SH64_COMPACT_INSN_MOVW5_COMPACT, SH64_COMPACT_SFMT_MOVW5_COMPACT }, - { SH_INSN_MOVW6_COMPACT, SH64_COMPACT_INSN_MOVW6_COMPACT, SH64_COMPACT_SFMT_MOVB6_COMPACT }, - { SH_INSN_MOVW7_COMPACT, SH64_COMPACT_INSN_MOVW7_COMPACT, SH64_COMPACT_SFMT_MOVB7_COMPACT }, - { SH_INSN_MOVW8_COMPACT, SH64_COMPACT_INSN_MOVW8_COMPACT, SH64_COMPACT_SFMT_MOVB8_COMPACT }, - { SH_INSN_MOVW9_COMPACT, SH64_COMPACT_INSN_MOVW9_COMPACT, SH64_COMPACT_SFMT_MOVW9_COMPACT }, - { SH_INSN_MOVW10_COMPACT, SH64_COMPACT_INSN_MOVW10_COMPACT, SH64_COMPACT_SFMT_MOVW10_COMPACT }, - { SH_INSN_MOVW11_COMPACT, SH64_COMPACT_INSN_MOVW11_COMPACT, SH64_COMPACT_SFMT_MOVW11_COMPACT }, - { SH_INSN_MOVA_COMPACT, SH64_COMPACT_INSN_MOVA_COMPACT, SH64_COMPACT_SFMT_MOVA_COMPACT }, - { SH_INSN_MOVCAL_COMPACT, SH64_COMPACT_INSN_MOVCAL_COMPACT, SH64_COMPACT_SFMT_MOVCAL_COMPACT }, - { SH_INSN_MOVT_COMPACT, SH64_COMPACT_INSN_MOVT_COMPACT, SH64_COMPACT_SFMT_MOVT_COMPACT }, - { SH_INSN_MULL_COMPACT, SH64_COMPACT_INSN_MULL_COMPACT, SH64_COMPACT_SFMT_MULL_COMPACT }, - { SH_INSN_MULSW_COMPACT, SH64_COMPACT_INSN_MULSW_COMPACT, SH64_COMPACT_SFMT_MULL_COMPACT }, - { SH_INSN_MULUW_COMPACT, SH64_COMPACT_INSN_MULUW_COMPACT, SH64_COMPACT_SFMT_MULL_COMPACT }, - { SH_INSN_NEG_COMPACT, SH64_COMPACT_INSN_NEG_COMPACT, SH64_COMPACT_SFMT_EXTSB_COMPACT }, - { SH_INSN_NEGC_COMPACT, SH64_COMPACT_INSN_NEGC_COMPACT, SH64_COMPACT_SFMT_NEGC_COMPACT }, - { SH_INSN_NOP_COMPACT, SH64_COMPACT_INSN_NOP_COMPACT, SH64_COMPACT_SFMT_NOP_COMPACT }, - { SH_INSN_NOT_COMPACT, SH64_COMPACT_INSN_NOT_COMPACT, SH64_COMPACT_SFMT_MOV_COMPACT }, - { SH_INSN_OCBI_COMPACT, SH64_COMPACT_INSN_OCBI_COMPACT, SH64_COMPACT_SFMT_NOP_COMPACT }, - { SH_INSN_OCBP_COMPACT, SH64_COMPACT_INSN_OCBP_COMPACT, SH64_COMPACT_SFMT_NOP_COMPACT }, - { SH_INSN_OCBWB_COMPACT, SH64_COMPACT_INSN_OCBWB_COMPACT, SH64_COMPACT_SFMT_NOP_COMPACT }, - { SH_INSN_OR_COMPACT, SH64_COMPACT_INSN_OR_COMPACT, SH64_COMPACT_SFMT_AND_COMPACT }, - { SH_INSN_ORI_COMPACT, SH64_COMPACT_INSN_ORI_COMPACT, SH64_COMPACT_SFMT_ANDI_COMPACT }, - { SH_INSN_ORB_COMPACT, SH64_COMPACT_INSN_ORB_COMPACT, SH64_COMPACT_SFMT_ANDB_COMPACT }, - { SH_INSN_PREF_COMPACT, SH64_COMPACT_INSN_PREF_COMPACT, SH64_COMPACT_SFMT_NOP_COMPACT }, - { SH_INSN_ROTCL_COMPACT, SH64_COMPACT_INSN_ROTCL_COMPACT, SH64_COMPACT_SFMT_ROTCL_COMPACT }, - { SH_INSN_ROTCR_COMPACT, SH64_COMPACT_INSN_ROTCR_COMPACT, SH64_COMPACT_SFMT_ROTCL_COMPACT }, - { SH_INSN_ROTL_COMPACT, SH64_COMPACT_INSN_ROTL_COMPACT, SH64_COMPACT_SFMT_DT_COMPACT }, - { SH_INSN_ROTR_COMPACT, SH64_COMPACT_INSN_ROTR_COMPACT, SH64_COMPACT_SFMT_DT_COMPACT }, - { SH_INSN_RTS_COMPACT, SH64_COMPACT_INSN_RTS_COMPACT, SH64_COMPACT_SFMT_RTS_COMPACT }, - { SH_INSN_SETS_COMPACT, SH64_COMPACT_INSN_SETS_COMPACT, SH64_COMPACT_SFMT_CLRS_COMPACT }, - { SH_INSN_SETT_COMPACT, SH64_COMPACT_INSN_SETT_COMPACT, SH64_COMPACT_SFMT_CLRT_COMPACT }, - { SH_INSN_SHAD_COMPACT, SH64_COMPACT_INSN_SHAD_COMPACT, SH64_COMPACT_SFMT_SHAD_COMPACT }, - { SH_INSN_SHAL_COMPACT, SH64_COMPACT_INSN_SHAL_COMPACT, SH64_COMPACT_SFMT_DT_COMPACT }, - { SH_INSN_SHAR_COMPACT, SH64_COMPACT_INSN_SHAR_COMPACT, SH64_COMPACT_SFMT_DT_COMPACT }, - { SH_INSN_SHLD_COMPACT, SH64_COMPACT_INSN_SHLD_COMPACT, SH64_COMPACT_SFMT_SHAD_COMPACT }, - { SH_INSN_SHLL_COMPACT, SH64_COMPACT_INSN_SHLL_COMPACT, SH64_COMPACT_SFMT_DT_COMPACT }, - { SH_INSN_SHLL2_COMPACT, SH64_COMPACT_INSN_SHLL2_COMPACT, SH64_COMPACT_SFMT_SHLL2_COMPACT }, - { SH_INSN_SHLL8_COMPACT, SH64_COMPACT_INSN_SHLL8_COMPACT, SH64_COMPACT_SFMT_SHLL2_COMPACT }, - { SH_INSN_SHLL16_COMPACT, SH64_COMPACT_INSN_SHLL16_COMPACT, SH64_COMPACT_SFMT_SHLL2_COMPACT }, - { SH_INSN_SHLR_COMPACT, SH64_COMPACT_INSN_SHLR_COMPACT, SH64_COMPACT_SFMT_DT_COMPACT }, - { SH_INSN_SHLR2_COMPACT, SH64_COMPACT_INSN_SHLR2_COMPACT, SH64_COMPACT_SFMT_SHLL2_COMPACT }, - { SH_INSN_SHLR8_COMPACT, SH64_COMPACT_INSN_SHLR8_COMPACT, SH64_COMPACT_SFMT_SHLL2_COMPACT }, - { SH_INSN_SHLR16_COMPACT, SH64_COMPACT_INSN_SHLR16_COMPACT, SH64_COMPACT_SFMT_SHLL2_COMPACT }, - { SH_INSN_STC_GBR_COMPACT, SH64_COMPACT_INSN_STC_GBR_COMPACT, SH64_COMPACT_SFMT_STC_GBR_COMPACT }, - { SH_INSN_STCL_GBR_COMPACT, SH64_COMPACT_INSN_STCL_GBR_COMPACT, SH64_COMPACT_SFMT_STCL_GBR_COMPACT }, - { SH_INSN_STS_FPSCR_COMPACT, SH64_COMPACT_INSN_STS_FPSCR_COMPACT, SH64_COMPACT_SFMT_STS_FPSCR_COMPACT }, - { SH_INSN_STSL_FPSCR_COMPACT, SH64_COMPACT_INSN_STSL_FPSCR_COMPACT, SH64_COMPACT_SFMT_STSL_FPSCR_COMPACT }, - { SH_INSN_STS_FPUL_COMPACT, SH64_COMPACT_INSN_STS_FPUL_COMPACT, SH64_COMPACT_SFMT_STS_FPUL_COMPACT }, - { SH_INSN_STSL_FPUL_COMPACT, SH64_COMPACT_INSN_STSL_FPUL_COMPACT, SH64_COMPACT_SFMT_STSL_FPUL_COMPACT }, - { SH_INSN_STS_MACH_COMPACT, SH64_COMPACT_INSN_STS_MACH_COMPACT, SH64_COMPACT_SFMT_STS_MACH_COMPACT }, - { SH_INSN_STSL_MACH_COMPACT, SH64_COMPACT_INSN_STSL_MACH_COMPACT, SH64_COMPACT_SFMT_STSL_MACH_COMPACT }, - { SH_INSN_STS_MACL_COMPACT, SH64_COMPACT_INSN_STS_MACL_COMPACT, SH64_COMPACT_SFMT_STS_MACL_COMPACT }, - { SH_INSN_STSL_MACL_COMPACT, SH64_COMPACT_INSN_STSL_MACL_COMPACT, SH64_COMPACT_SFMT_STSL_MACL_COMPACT }, - { SH_INSN_STS_PR_COMPACT, SH64_COMPACT_INSN_STS_PR_COMPACT, SH64_COMPACT_SFMT_STS_PR_COMPACT }, - { SH_INSN_STSL_PR_COMPACT, SH64_COMPACT_INSN_STSL_PR_COMPACT, SH64_COMPACT_SFMT_STSL_PR_COMPACT }, - { SH_INSN_SUB_COMPACT, SH64_COMPACT_INSN_SUB_COMPACT, SH64_COMPACT_SFMT_ADD_COMPACT }, - { SH_INSN_SUBC_COMPACT, SH64_COMPACT_INSN_SUBC_COMPACT, SH64_COMPACT_SFMT_ADDC_COMPACT }, - { SH_INSN_SUBV_COMPACT, SH64_COMPACT_INSN_SUBV_COMPACT, SH64_COMPACT_SFMT_ADDV_COMPACT }, - { SH_INSN_SWAPB_COMPACT, SH64_COMPACT_INSN_SWAPB_COMPACT, SH64_COMPACT_SFMT_EXTSB_COMPACT }, - { SH_INSN_SWAPW_COMPACT, SH64_COMPACT_INSN_SWAPW_COMPACT, SH64_COMPACT_SFMT_EXTSB_COMPACT }, - { SH_INSN_TASB_COMPACT, SH64_COMPACT_INSN_TASB_COMPACT, SH64_COMPACT_SFMT_TASB_COMPACT }, - { SH_INSN_TRAPA_COMPACT, SH64_COMPACT_INSN_TRAPA_COMPACT, SH64_COMPACT_SFMT_TRAPA_COMPACT }, - { SH_INSN_TST_COMPACT, SH64_COMPACT_INSN_TST_COMPACT, SH64_COMPACT_SFMT_CMPEQ_COMPACT }, - { SH_INSN_TSTI_COMPACT, SH64_COMPACT_INSN_TSTI_COMPACT, SH64_COMPACT_SFMT_TSTI_COMPACT }, - { SH_INSN_TSTB_COMPACT, SH64_COMPACT_INSN_TSTB_COMPACT, SH64_COMPACT_SFMT_TSTB_COMPACT }, - { SH_INSN_XOR_COMPACT, SH64_COMPACT_INSN_XOR_COMPACT, SH64_COMPACT_SFMT_AND_COMPACT }, - { SH_INSN_XORI_COMPACT, SH64_COMPACT_INSN_XORI_COMPACT, SH64_COMPACT_SFMT_XORI_COMPACT }, - { SH_INSN_XORB_COMPACT, SH64_COMPACT_INSN_XORB_COMPACT, SH64_COMPACT_SFMT_ANDB_COMPACT }, - { SH_INSN_XTRCT_COMPACT, SH64_COMPACT_INSN_XTRCT_COMPACT, SH64_COMPACT_SFMT_ADD_COMPACT }, -}; - -static const struct insn_sem sh64_compact_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, SH64_COMPACT_INSN_X_INVALID, SH64_COMPACT_SFMT_EMPTY -}; - -/* Initialize an IDESC from the compile-time computable parts. */ - -static INLINE void -init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) -{ - const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries; - - id->num = t->index; - id->sfmt = t->sfmt; - if ((int) t->type <= 0) - id->idata = & cgen_virtual_insn_table[- (int) t->type]; - else - id->idata = & insn_table[t->type]; - id->attrs = CGEN_INSN_ATTRS (id->idata); - /* Oh my god, a magic number. */ - id->length = CGEN_INSN_BITSIZE (id->idata) / 8; - -#if WITH_PROFILE_MODEL_P - id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; - { - SIM_DESC sd = CPU_STATE (cpu); - SIM_ASSERT (t->index == id->timing->num); - } -#endif - - /* Semantic pointers are initialized elsewhere. */ -} - -/* Initialize the instruction descriptor table. */ - -void -sh64_compact_init_idesc_table (SIM_CPU *cpu) -{ - IDESC *id,*tabend; - const struct insn_sem *t,*tend; - int tabsize = SH64_COMPACT_INSN_MAX; - IDESC *table = sh64_compact_insn_data; - - memset (table, 0, tabsize * sizeof (IDESC)); - - /* First set all entries to the `invalid insn'. */ - t = & sh64_compact_insn_sem_invalid; - for (id = table, tabend = table + tabsize; id < tabend; ++id) - init_idesc (cpu, id, t); - - /* Now fill in the values for the chosen cpu. */ - for (t = sh64_compact_insn_sem, tend = t + sizeof (sh64_compact_insn_sem) / sizeof (*t); - t != tend; ++t) - { - init_idesc (cpu, & table[t->index], t); - } - - /* Link the IDESC table into the cpu. */ - CPU_IDESC (cpu) = table; -} - -/* Given an instruction, return a pointer to its IDESC entry. */ - -const IDESC * -sh64_compact_decode (SIM_CPU *current_cpu, IADDR pc, - CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn, - ARGBUF *abuf) -{ - /* Result of decoder. */ - SH64_COMPACT_INSN_TYPE itype; - - { - CGEN_INSN_INT insn = base_insn; - - { - unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 0) & (15 << 0))); - switch (val) - { - case 2 : itype = SH64_COMPACT_INSN_STC_GBR_COMPACT; goto extract_sfmt_stc_gbr_compact; case 3 : - { - unsigned int val = (((insn >> 4) & (15 << 0))); - switch (val) - { - case 0 : itype = SH64_COMPACT_INSN_BSRF_COMPACT; goto extract_sfmt_bsrf_compact; case 2 : itype = SH64_COMPACT_INSN_BRAF_COMPACT; goto extract_sfmt_braf_compact; case 8 : itype = SH64_COMPACT_INSN_PREF_COMPACT; goto extract_sfmt_nop_compact; case 9 : itype = SH64_COMPACT_INSN_OCBI_COMPACT; goto extract_sfmt_nop_compact; case 10 : itype = SH64_COMPACT_INSN_OCBP_COMPACT; goto extract_sfmt_nop_compact; case 11 : itype = SH64_COMPACT_INSN_OCBWB_COMPACT; goto extract_sfmt_nop_compact; case 12 : itype = SH64_COMPACT_INSN_MOVCAL_COMPACT; goto extract_sfmt_movcal_compact; default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 4 : itype = SH64_COMPACT_INSN_MOVB3_COMPACT; goto extract_sfmt_movb3_compact; case 5 : itype = SH64_COMPACT_INSN_MOVW3_COMPACT; goto extract_sfmt_movb3_compact; case 6 : itype = SH64_COMPACT_INSN_MOVL3_COMPACT; goto extract_sfmt_movb3_compact; case 7 : itype = SH64_COMPACT_INSN_MULL_COMPACT; goto extract_sfmt_mull_compact; case 8 : - { - unsigned int val = (((insn >> 4) & (7 << 0))); - switch (val) - { - case 0 : itype = SH64_COMPACT_INSN_CLRT_COMPACT; goto extract_sfmt_clrt_compact; case 1 : itype = SH64_COMPACT_INSN_SETT_COMPACT; goto extract_sfmt_clrt_compact; case 2 : itype = SH64_COMPACT_INSN_CLRMAC_COMPACT; goto extract_sfmt_clrmac_compact; case 4 : itype = SH64_COMPACT_INSN_CLRS_COMPACT; goto extract_sfmt_clrs_compact; case 5 : itype = SH64_COMPACT_INSN_SETS_COMPACT; goto extract_sfmt_clrs_compact; default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 9 : - { - unsigned int val = (((insn >> 4) & (3 << 0))); - switch (val) - { - case 0 : itype = SH64_COMPACT_INSN_NOP_COMPACT; goto extract_sfmt_nop_compact; case 1 : itype = SH64_COMPACT_INSN_DIV0U_COMPACT; goto extract_sfmt_div0u_compact; case 2 : itype = SH64_COMPACT_INSN_MOVT_COMPACT; goto extract_sfmt_movt_compact; default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 10 : - { - unsigned int val = (((insn >> 4) & (7 << 0))); - switch (val) - { - case 0 : itype = SH64_COMPACT_INSN_STS_MACH_COMPACT; goto extract_sfmt_sts_mach_compact; case 1 : itype = SH64_COMPACT_INSN_STS_MACL_COMPACT; goto extract_sfmt_sts_macl_compact; case 2 : itype = SH64_COMPACT_INSN_STS_PR_COMPACT; goto extract_sfmt_sts_pr_compact; case 5 : itype = SH64_COMPACT_INSN_STS_FPUL_COMPACT; goto extract_sfmt_sts_fpul_compact; case 6 : itype = SH64_COMPACT_INSN_STS_FPSCR_COMPACT; goto extract_sfmt_sts_fpscr_compact; default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 11 : - { - unsigned int val = (((insn >> 4) & (3 << 0))); - switch (val) - { - case 0 : itype = SH64_COMPACT_INSN_RTS_COMPACT; goto extract_sfmt_rts_compact; case 3 : itype = SH64_COMPACT_INSN_BRK_COMPACT; goto extract_sfmt_brk_compact; default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 12 : itype = SH64_COMPACT_INSN_MOVB8_COMPACT; goto extract_sfmt_movb8_compact; case 13 : itype = SH64_COMPACT_INSN_MOVW8_COMPACT; goto extract_sfmt_movb8_compact; case 14 : itype = SH64_COMPACT_INSN_MOVL8_COMPACT; goto extract_sfmt_movb8_compact; case 15 : itype = SH64_COMPACT_INSN_MACL_COMPACT; goto extract_sfmt_macl_compact; case 16 : /* fall through */ - case 17 : /* fall through */ - case 18 : /* fall through */ - case 19 : /* fall through */ - case 20 : /* fall through */ - case 21 : /* fall through */ - case 22 : /* fall through */ - case 23 : /* fall through */ - case 24 : /* fall through */ - case 25 : /* fall through */ - case 26 : /* fall through */ - case 27 : /* fall through */ - case 28 : /* fall through */ - case 29 : /* fall through */ - case 30 : /* fall through */ - case 31 : itype = SH64_COMPACT_INSN_MOVL5_COMPACT; goto extract_sfmt_movl5_compact; case 32 : itype = SH64_COMPACT_INSN_MOVB1_COMPACT; goto extract_sfmt_movb1_compact; case 33 : itype = SH64_COMPACT_INSN_MOVW1_COMPACT; goto extract_sfmt_movb1_compact; case 34 : itype = SH64_COMPACT_INSN_MOVL1_COMPACT; goto extract_sfmt_movb1_compact; case 36 : itype = SH64_COMPACT_INSN_MOVB2_COMPACT; goto extract_sfmt_movb2_compact; case 37 : itype = SH64_COMPACT_INSN_MOVW2_COMPACT; goto extract_sfmt_movb2_compact; case 38 : itype = SH64_COMPACT_INSN_MOVL2_COMPACT; goto extract_sfmt_movb2_compact; case 39 : itype = SH64_COMPACT_INSN_DIV0S_COMPACT; goto extract_sfmt_div0s_compact; case 40 : itype = SH64_COMPACT_INSN_TST_COMPACT; goto extract_sfmt_cmpeq_compact; case 41 : itype = SH64_COMPACT_INSN_AND_COMPACT; goto extract_sfmt_and_compact; case 42 : itype = SH64_COMPACT_INSN_XOR_COMPACT; goto extract_sfmt_and_compact; case 43 : itype = SH64_COMPACT_INSN_OR_COMPACT; goto extract_sfmt_and_compact; case 44 : itype = SH64_COMPACT_INSN_CMPSTR_COMPACT; goto extract_sfmt_cmpeq_compact; case 45 : itype = SH64_COMPACT_INSN_XTRCT_COMPACT; goto extract_sfmt_add_compact; case 46 : itype = SH64_COMPACT_INSN_MULUW_COMPACT; goto extract_sfmt_mull_compact; case 47 : itype = SH64_COMPACT_INSN_MULSW_COMPACT; goto extract_sfmt_mull_compact; case 48 : itype = SH64_COMPACT_INSN_CMPEQ_COMPACT; goto extract_sfmt_cmpeq_compact; case 50 : itype = SH64_COMPACT_INSN_CMPHS_COMPACT; goto extract_sfmt_cmpeq_compact; case 51 : itype = SH64_COMPACT_INSN_CMPGE_COMPACT; goto extract_sfmt_cmpeq_compact; case 52 : itype = SH64_COMPACT_INSN_DIV1_COMPACT; goto extract_sfmt_div1_compact; case 53 : itype = SH64_COMPACT_INSN_DMULUL_COMPACT; goto extract_sfmt_dmulsl_compact; case 54 : itype = SH64_COMPACT_INSN_CMPHI_COMPACT; goto extract_sfmt_cmpeq_compact; case 55 : itype = SH64_COMPACT_INSN_CMPGT_COMPACT; goto extract_sfmt_cmpeq_compact; case 56 : itype = SH64_COMPACT_INSN_SUB_COMPACT; goto extract_sfmt_add_compact; case 58 : itype = SH64_COMPACT_INSN_SUBC_COMPACT; goto extract_sfmt_addc_compact; case 59 : itype = SH64_COMPACT_INSN_SUBV_COMPACT; goto extract_sfmt_addv_compact; case 60 : itype = SH64_COMPACT_INSN_ADD_COMPACT; goto extract_sfmt_add_compact; case 61 : itype = SH64_COMPACT_INSN_DMULSL_COMPACT; goto extract_sfmt_dmulsl_compact; case 62 : itype = SH64_COMPACT_INSN_ADDC_COMPACT; goto extract_sfmt_addc_compact; case 63 : itype = SH64_COMPACT_INSN_ADDV_COMPACT; goto extract_sfmt_addv_compact; case 64 : - { - unsigned int val = (((insn >> 4) & (3 << 0))); - switch (val) - { - case 0 : itype = SH64_COMPACT_INSN_SHLL_COMPACT; goto extract_sfmt_dt_compact; case 1 : itype = SH64_COMPACT_INSN_DT_COMPACT; goto extract_sfmt_dt_compact; case 2 : itype = SH64_COMPACT_INSN_SHAL_COMPACT; goto extract_sfmt_dt_compact; default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 65 : - { - unsigned int val = (((insn >> 4) & (3 << 0))); - switch (val) - { - case 0 : itype = SH64_COMPACT_INSN_SHLR_COMPACT; goto extract_sfmt_dt_compact; case 1 : itype = SH64_COMPACT_INSN_CMPPZ_COMPACT; goto extract_sfmt_cmppl_compact; case 2 : itype = SH64_COMPACT_INSN_SHAR_COMPACT; goto extract_sfmt_dt_compact; default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 66 : - { - unsigned int val = (((insn >> 4) & (7 << 0))); - switch (val) - { - case 0 : itype = SH64_COMPACT_INSN_STSL_MACH_COMPACT; goto extract_sfmt_stsl_mach_compact; case 1 : itype = SH64_COMPACT_INSN_STSL_MACL_COMPACT; goto extract_sfmt_stsl_macl_compact; case 2 : itype = SH64_COMPACT_INSN_STSL_PR_COMPACT; goto extract_sfmt_stsl_pr_compact; case 5 : itype = SH64_COMPACT_INSN_STSL_FPUL_COMPACT; goto extract_sfmt_stsl_fpul_compact; case 6 : itype = SH64_COMPACT_INSN_STSL_FPSCR_COMPACT; goto extract_sfmt_stsl_fpscr_compact; default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 67 : itype = SH64_COMPACT_INSN_STCL_GBR_COMPACT; goto extract_sfmt_stcl_gbr_compact; case 68 : - { - unsigned int val = (((insn >> 5) & (1 << 0))); - switch (val) - { - case 0 : itype = SH64_COMPACT_INSN_ROTL_COMPACT; goto extract_sfmt_dt_compact; case 1 : itype = SH64_COMPACT_INSN_ROTCL_COMPACT; goto extract_sfmt_rotcl_compact; default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 69 : - { - unsigned int val = (((insn >> 4) & (3 << 0))); - switch (val) - { - case 0 : itype = SH64_COMPACT_INSN_ROTR_COMPACT; goto extract_sfmt_dt_compact; case 1 : itype = SH64_COMPACT_INSN_CMPPL_COMPACT; goto extract_sfmt_cmppl_compact; case 2 : itype = SH64_COMPACT_INSN_ROTCR_COMPACT; goto extract_sfmt_rotcl_compact; default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 70 : - { - unsigned int val = (((insn >> 4) & (7 << 0))); - switch (val) - { - case 0 : itype = SH64_COMPACT_INSN_LDSL_MACH_COMPACT; goto extract_sfmt_ldsl_mach_compact; case 1 : itype = SH64_COMPACT_INSN_LDSL_MACL_COMPACT; goto extract_sfmt_ldsl_macl_compact; case 2 : itype = SH64_COMPACT_INSN_LDSL_PR_COMPACT; goto extract_sfmt_ldsl_pr_compact; case 5 : itype = SH64_COMPACT_INSN_LDSL_FPUL_COMPACT; goto extract_sfmt_ldsl_fpul_compact; case 6 : itype = SH64_COMPACT_INSN_LDSL_FPSCR_COMPACT; goto extract_sfmt_ldsl_fpscr_compact; default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 71 : itype = SH64_COMPACT_INSN_LDCL_COMPACT; goto extract_sfmt_ldcl_compact; case 72 : - { - unsigned int val = (((insn >> 4) & (3 << 0))); - switch (val) - { - case 0 : itype = SH64_COMPACT_INSN_SHLL2_COMPACT; goto extract_sfmt_shll2_compact; case 1 : itype = SH64_COMPACT_INSN_SHLL8_COMPACT; goto extract_sfmt_shll2_compact; case 2 : itype = SH64_COMPACT_INSN_SHLL16_COMPACT; goto extract_sfmt_shll2_compact; default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 73 : - { - unsigned int val = (((insn >> 4) & (3 << 0))); - switch (val) - { - case 0 : itype = SH64_COMPACT_INSN_SHLR2_COMPACT; goto extract_sfmt_shll2_compact; case 1 : itype = SH64_COMPACT_INSN_SHLR8_COMPACT; goto extract_sfmt_shll2_compact; case 2 : itype = SH64_COMPACT_INSN_SHLR16_COMPACT; goto extract_sfmt_shll2_compact; default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 74 : - { - unsigned int val = (((insn >> 4) & (7 << 0))); - switch (val) - { - case 0 : itype = SH64_COMPACT_INSN_LDS_MACH_COMPACT; goto extract_sfmt_lds_mach_compact; case 1 : itype = SH64_COMPACT_INSN_LDS_MACL_COMPACT; goto extract_sfmt_lds_macl_compact; case 2 : itype = SH64_COMPACT_INSN_LDS_PR_COMPACT; goto extract_sfmt_lds_pr_compact; case 5 : itype = SH64_COMPACT_INSN_LDS_FPUL_COMPACT; goto extract_sfmt_lds_fpul_compact; case 6 : itype = SH64_COMPACT_INSN_LDS_FPSCR_COMPACT; goto extract_sfmt_lds_fpscr_compact; default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 75 : - { - unsigned int val = (((insn >> 4) & (3 << 0))); - switch (val) - { - case 0 : itype = SH64_COMPACT_INSN_JSR_COMPACT; goto extract_sfmt_bsrf_compact; case 1 : itype = SH64_COMPACT_INSN_TASB_COMPACT; goto extract_sfmt_tasb_compact; case 2 : itype = SH64_COMPACT_INSN_JMP_COMPACT; goto extract_sfmt_jmp_compact; default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 76 : itype = SH64_COMPACT_INSN_SHAD_COMPACT; goto extract_sfmt_shad_compact; case 77 : itype = SH64_COMPACT_INSN_SHLD_COMPACT; goto extract_sfmt_shad_compact; case 78 : itype = SH64_COMPACT_INSN_LDC_COMPACT; goto extract_sfmt_ldc_compact; case 79 : itype = SH64_COMPACT_INSN_MACW_COMPACT; goto extract_sfmt_macw_compact; case 80 : /* fall through */ - case 81 : /* fall through */ - case 82 : /* fall through */ - case 83 : /* fall through */ - case 84 : /* fall through */ - case 85 : /* fall through */ - case 86 : /* fall through */ - case 87 : /* fall through */ - case 88 : /* fall through */ - case 89 : /* fall through */ - case 90 : /* fall through */ - case 91 : /* fall through */ - case 92 : /* fall through */ - case 93 : /* fall through */ - case 94 : /* fall through */ - case 95 : itype = SH64_COMPACT_INSN_MOVL11_COMPACT; goto extract_sfmt_movl11_compact; case 96 : itype = SH64_COMPACT_INSN_MOVB6_COMPACT; goto extract_sfmt_movb6_compact; case 97 : itype = SH64_COMPACT_INSN_MOVW6_COMPACT; goto extract_sfmt_movb6_compact; case 98 : itype = SH64_COMPACT_INSN_MOVL6_COMPACT; goto extract_sfmt_movb6_compact; case 99 : itype = SH64_COMPACT_INSN_MOV_COMPACT; goto extract_sfmt_mov_compact; case 100 : itype = SH64_COMPACT_INSN_MOVB7_COMPACT; goto extract_sfmt_movb7_compact; case 101 : itype = SH64_COMPACT_INSN_MOVW7_COMPACT; goto extract_sfmt_movb7_compact; case 102 : itype = SH64_COMPACT_INSN_MOVL7_COMPACT; goto extract_sfmt_movl7_compact; case 103 : itype = SH64_COMPACT_INSN_NOT_COMPACT; goto extract_sfmt_mov_compact; case 104 : itype = SH64_COMPACT_INSN_SWAPB_COMPACT; goto extract_sfmt_extsb_compact; case 105 : itype = SH64_COMPACT_INSN_SWAPW_COMPACT; goto extract_sfmt_extsb_compact; case 106 : itype = SH64_COMPACT_INSN_NEGC_COMPACT; goto extract_sfmt_negc_compact; case 107 : itype = SH64_COMPACT_INSN_NEG_COMPACT; goto extract_sfmt_extsb_compact; case 108 : itype = SH64_COMPACT_INSN_EXTUB_COMPACT; goto extract_sfmt_extsb_compact; case 109 : itype = SH64_COMPACT_INSN_EXTUW_COMPACT; goto extract_sfmt_extsb_compact; case 110 : itype = SH64_COMPACT_INSN_EXTSB_COMPACT; goto extract_sfmt_extsb_compact; case 111 : itype = SH64_COMPACT_INSN_EXTSW_COMPACT; goto extract_sfmt_extsb_compact; case 112 : /* fall through */ - case 113 : /* fall through */ - case 114 : /* fall through */ - case 115 : /* fall through */ - case 116 : /* fall through */ - case 117 : /* fall through */ - case 118 : /* fall through */ - case 119 : /* fall through */ - case 120 : /* fall through */ - case 121 : /* fall through */ - case 122 : /* fall through */ - case 123 : /* fall through */ - case 124 : /* fall through */ - case 125 : /* fall through */ - case 126 : /* fall through */ - case 127 : itype = SH64_COMPACT_INSN_ADDI_COMPACT; goto extract_sfmt_addi_compact; case 128 : /* fall through */ - case 129 : /* fall through */ - case 130 : /* fall through */ - case 131 : /* fall through */ - case 132 : /* fall through */ - case 133 : /* fall through */ - case 134 : /* fall through */ - case 135 : /* fall through */ - case 136 : /* fall through */ - case 137 : /* fall through */ - case 138 : /* fall through */ - case 139 : /* fall through */ - case 140 : /* fall through */ - case 141 : /* fall through */ - case 142 : /* fall through */ - case 143 : - { - unsigned int val = (((insn >> 8) & (15 << 0))); - switch (val) - { - case 0 : itype = SH64_COMPACT_INSN_MOVB5_COMPACT; goto extract_sfmt_movb5_compact; case 1 : itype = SH64_COMPACT_INSN_MOVW5_COMPACT; goto extract_sfmt_movw5_compact; case 4 : itype = SH64_COMPACT_INSN_MOVB10_COMPACT; goto extract_sfmt_movb10_compact; case 5 : itype = SH64_COMPACT_INSN_MOVW11_COMPACT; goto extract_sfmt_movw11_compact; case 8 : itype = SH64_COMPACT_INSN_CMPEQI_COMPACT; goto extract_sfmt_cmpeqi_compact; case 9 : itype = SH64_COMPACT_INSN_BT_COMPACT; goto extract_sfmt_bf_compact; case 11 : itype = SH64_COMPACT_INSN_BF_COMPACT; goto extract_sfmt_bf_compact; case 13 : itype = SH64_COMPACT_INSN_BTS_COMPACT; goto extract_sfmt_bf_compact; case 15 : itype = SH64_COMPACT_INSN_BFS_COMPACT; goto extract_sfmt_bf_compact; default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 144 : /* fall through */ - case 145 : /* fall through */ - case 146 : /* fall through */ - case 147 : /* fall through */ - case 148 : /* fall through */ - case 149 : /* fall through */ - case 150 : /* fall through */ - case 151 : /* fall through */ - case 152 : /* fall through */ - case 153 : /* fall through */ - case 154 : /* fall through */ - case 155 : /* fall through */ - case 156 : /* fall through */ - case 157 : /* fall through */ - case 158 : /* fall through */ - case 159 : itype = SH64_COMPACT_INSN_MOVW10_COMPACT; goto extract_sfmt_movw10_compact; case 160 : /* fall through */ - case 161 : /* fall through */ - case 162 : /* fall through */ - case 163 : /* fall through */ - case 164 : /* fall through */ - case 165 : /* fall through */ - case 166 : /* fall through */ - case 167 : /* fall through */ - case 168 : /* fall through */ - case 169 : /* fall through */ - case 170 : /* fall through */ - case 171 : /* fall through */ - case 172 : /* fall through */ - case 173 : /* fall through */ - case 174 : /* fall through */ - case 175 : itype = SH64_COMPACT_INSN_BRA_COMPACT; goto extract_sfmt_bra_compact; case 176 : /* fall through */ - case 177 : /* fall through */ - case 178 : /* fall through */ - case 179 : /* fall through */ - case 180 : /* fall through */ - case 181 : /* fall through */ - case 182 : /* fall through */ - case 183 : /* fall through */ - case 184 : /* fall through */ - case 185 : /* fall through */ - case 186 : /* fall through */ - case 187 : /* fall through */ - case 188 : /* fall through */ - case 189 : /* fall through */ - case 190 : /* fall through */ - case 191 : itype = SH64_COMPACT_INSN_BSR_COMPACT; goto extract_sfmt_bsr_compact; case 192 : /* fall through */ - case 193 : /* fall through */ - case 194 : /* fall through */ - case 195 : /* fall through */ - case 196 : /* fall through */ - case 197 : /* fall through */ - case 198 : /* fall through */ - case 199 : /* fall through */ - case 200 : /* fall through */ - case 201 : /* fall through */ - case 202 : /* fall through */ - case 203 : /* fall through */ - case 204 : /* fall through */ - case 205 : /* fall through */ - case 206 : /* fall through */ - case 207 : - { - unsigned int val = (((insn >> 8) & (15 << 0))); - switch (val) - { - case 0 : itype = SH64_COMPACT_INSN_MOVB4_COMPACT; goto extract_sfmt_movb4_compact; case 1 : itype = SH64_COMPACT_INSN_MOVW4_COMPACT; goto extract_sfmt_movw4_compact; case 2 : itype = SH64_COMPACT_INSN_MOVL4_COMPACT; goto extract_sfmt_movl4_compact; case 3 : itype = SH64_COMPACT_INSN_TRAPA_COMPACT; goto extract_sfmt_trapa_compact; case 4 : itype = SH64_COMPACT_INSN_MOVB9_COMPACT; goto extract_sfmt_movb9_compact; case 5 : itype = SH64_COMPACT_INSN_MOVW9_COMPACT; goto extract_sfmt_movw9_compact; case 6 : itype = SH64_COMPACT_INSN_MOVL9_COMPACT; goto extract_sfmt_movl9_compact; case 7 : itype = SH64_COMPACT_INSN_MOVA_COMPACT; goto extract_sfmt_mova_compact; case 8 : itype = SH64_COMPACT_INSN_TSTI_COMPACT; goto extract_sfmt_tsti_compact; case 9 : itype = SH64_COMPACT_INSN_ANDI_COMPACT; goto extract_sfmt_andi_compact; case 10 : itype = SH64_COMPACT_INSN_XORI_COMPACT; goto extract_sfmt_xori_compact; case 11 : itype = SH64_COMPACT_INSN_ORI_COMPACT; goto extract_sfmt_andi_compact; case 12 : itype = SH64_COMPACT_INSN_TSTB_COMPACT; goto extract_sfmt_tstb_compact; case 13 : itype = SH64_COMPACT_INSN_ANDB_COMPACT; goto extract_sfmt_andb_compact; case 14 : itype = SH64_COMPACT_INSN_XORB_COMPACT; goto extract_sfmt_andb_compact; case 15 : itype = SH64_COMPACT_INSN_ORB_COMPACT; goto extract_sfmt_andb_compact; default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 208 : /* fall through */ - case 209 : /* fall through */ - case 210 : /* fall through */ - case 211 : /* fall through */ - case 212 : /* fall through */ - case 213 : /* fall through */ - case 214 : /* fall through */ - case 215 : /* fall through */ - case 216 : /* fall through */ - case 217 : /* fall through */ - case 218 : /* fall through */ - case 219 : /* fall through */ - case 220 : /* fall through */ - case 221 : /* fall through */ - case 222 : /* fall through */ - case 223 : itype = SH64_COMPACT_INSN_MOVL10_COMPACT; goto extract_sfmt_movl10_compact; case 224 : /* fall through */ - case 225 : /* fall through */ - case 226 : /* fall through */ - case 227 : /* fall through */ - case 228 : /* fall through */ - case 229 : /* fall through */ - case 230 : /* fall through */ - case 231 : /* fall through */ - case 232 : /* fall through */ - case 233 : /* fall through */ - case 234 : /* fall through */ - case 235 : /* fall through */ - case 236 : /* fall through */ - case 237 : /* fall through */ - case 238 : /* fall through */ - case 239 : itype = SH64_COMPACT_INSN_MOVI_COMPACT; goto extract_sfmt_movi_compact; case 240 : itype = SH64_COMPACT_INSN_FADD_COMPACT; goto extract_sfmt_fadd_compact; case 241 : itype = SH64_COMPACT_INSN_FSUB_COMPACT; goto extract_sfmt_fadd_compact; case 242 : itype = SH64_COMPACT_INSN_FMUL_COMPACT; goto extract_sfmt_fadd_compact; case 243 : itype = SH64_COMPACT_INSN_FDIV_COMPACT; goto extract_sfmt_fadd_compact; case 244 : itype = SH64_COMPACT_INSN_FCMPEQ_COMPACT; goto extract_sfmt_fcmpeq_compact; case 245 : itype = SH64_COMPACT_INSN_FCMPGT_COMPACT; goto extract_sfmt_fcmpeq_compact; case 246 : itype = SH64_COMPACT_INSN_FMOV4_COMPACT; goto extract_sfmt_fmov4_compact; case 247 : itype = SH64_COMPACT_INSN_FMOV7_COMPACT; goto extract_sfmt_fmov7_compact; case 248 : itype = SH64_COMPACT_INSN_FMOV2_COMPACT; goto extract_sfmt_fmov2_compact; case 249 : itype = SH64_COMPACT_INSN_FMOV3_COMPACT; goto extract_sfmt_fmov3_compact; case 250 : itype = SH64_COMPACT_INSN_FMOV5_COMPACT; goto extract_sfmt_fmov5_compact; case 251 : itype = SH64_COMPACT_INSN_FMOV6_COMPACT; goto extract_sfmt_fmov6_compact; case 252 : itype = SH64_COMPACT_INSN_FMOV1_COMPACT; goto extract_sfmt_fmov1_compact; case 253 : - { - unsigned int val = (((insn >> 4) & (15 << 0))); - switch (val) - { - case 0 : itype = SH64_COMPACT_INSN_FSTS_COMPACT; goto extract_sfmt_fsts_compact; case 1 : itype = SH64_COMPACT_INSN_FLDS_COMPACT; goto extract_sfmt_flds_compact; case 2 : itype = SH64_COMPACT_INSN_FLOAT_COMPACT; goto extract_sfmt_float_compact; case 3 : itype = SH64_COMPACT_INSN_FTRC_COMPACT; goto extract_sfmt_ftrc_compact; case 4 : itype = SH64_COMPACT_INSN_FNEG_COMPACT; goto extract_sfmt_fabs_compact; case 5 : itype = SH64_COMPACT_INSN_FABS_COMPACT; goto extract_sfmt_fabs_compact; case 6 : itype = SH64_COMPACT_INSN_FSQRT_COMPACT; goto extract_sfmt_fabs_compact; case 8 : itype = SH64_COMPACT_INSN_FLDI0_COMPACT; goto extract_sfmt_fldi0_compact; case 9 : itype = SH64_COMPACT_INSN_FLDI1_COMPACT; goto extract_sfmt_fldi0_compact; case 10 : itype = SH64_COMPACT_INSN_FCNVSD_COMPACT; goto extract_sfmt_fcnvsd_compact; case 11 : itype = SH64_COMPACT_INSN_FCNVDS_COMPACT; goto extract_sfmt_fcnvds_compact; case 14 : itype = SH64_COMPACT_INSN_FIPR_COMPACT; goto extract_sfmt_fipr_compact; case 15 : - { - unsigned int val = (((insn >> 9) & (1 << 0))); - switch (val) - { - case 0 : itype = SH64_COMPACT_INSN_FTRV_COMPACT; goto extract_sfmt_ftrv_compact; case 1 : - { - unsigned int val = (((insn >> 11) & (1 << 0))); - switch (val) - { - case 0 : itype = SH64_COMPACT_INSN_FSCHG_COMPACT; goto extract_sfmt_fschg_compact; case 1 : itype = SH64_COMPACT_INSN_FRCHG_COMPACT; goto extract_sfmt_frchg_compact; default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 254 : itype = SH64_COMPACT_INSN_FMAC_COMPACT; goto extract_sfmt_fmac_compact; default : itype = SH64_COMPACT_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - } - - /* The instruction has been decoded, now extract the fields. */ - - extract_sfmt_empty: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_add_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_addi_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_addi_compact.f - UINT f_rn; - UINT f_imm8; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_imm8 = EXTRACT_LSB0_UINT (insn, 16, 7, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_imm8) = f_imm8; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi_compact", "f_imm8 0x%x", 'x', f_imm8, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_addc_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addc_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_addv_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_and_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_andi_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_addi_compact.f - UINT f_imm8; - - f_imm8 = EXTRACT_LSB0_UINT (insn, 16, 7, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_imm8) = f_imm8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andi_compact", "f_imm8 0x%x", 'x', f_imm8, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_andb_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_addi_compact.f - UINT f_imm8; - - f_imm8 = EXTRACT_LSB0_UINT (insn, 16, 7, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_imm8) = f_imm8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andb_compact", "f_imm8 0x%x", 'x', f_imm8, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_bf_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_bf_compact.f - SI f_disp8; - - f_disp8 = ((((EXTRACT_LSB0_INT (insn, 16, 7, 8)) << (1))) + (((pc) + (4)))); - - /* Record the fields for the semantic handler. */ - FLD (i_disp8) = f_disp8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bf_compact", "disp8 0x%x", 'x', f_disp8, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_bra_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_bra_compact.f - SI f_disp12; - - f_disp12 = ((((EXTRACT_LSB0_INT (insn, 16, 11, 12)) << (1))) + (((pc) + (4)))); - - /* Record the fields for the semantic handler. */ - FLD (i_disp12) = f_disp12; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra_compact", "disp12 0x%x", 'x', f_disp12, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_braf_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_braf_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_brk_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_brk_compact", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_bsr_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_bra_compact.f - SI f_disp12; - - f_disp12 = ((((EXTRACT_LSB0_INT (insn, 16, 11, 12)) << (1))) + (((pc) + (4)))); - - /* Record the fields for the semantic handler. */ - FLD (i_disp12) = f_disp12; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bsr_compact", "disp12 0x%x", 'x', f_disp12, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_bsrf_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bsrf_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_clrmac_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_clrmac_compact", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_clrs_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_clrs_compact", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_clrt_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_clrt_compact", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_cmpeq_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpeq_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_cmpeqi_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_addi_compact.f - UINT f_imm8; - - f_imm8 = EXTRACT_LSB0_UINT (insn, 16, 7, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_imm8) = f_imm8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpeqi_compact", "f_imm8 0x%x", 'x', f_imm8, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_cmppl_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmppl_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_div0s_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div0s_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_div0u_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div0u_compact", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_div1_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div1_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_dmulsl_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmulsl_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_dt_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dt_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_extsb_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extsb_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fabs_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fabs_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fadd_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fadd_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fcmpeq_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fcmpeq_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fcnvds_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_fcnvds_compact.f - SI f_dn; - - f_dn = ((EXTRACT_LSB0_UINT (insn, 16, 11, 3)) << (1)); - - /* Record the fields for the semantic handler. */ - FLD (f_dn) = f_dn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fcnvds_compact", "f_dn 0x%x", 'x', f_dn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fcnvsd_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_fcnvds_compact.f - SI f_dn; - - f_dn = ((EXTRACT_LSB0_UINT (insn, 16, 11, 3)) << (1)); - - /* Record the fields for the semantic handler. */ - FLD (f_dn) = f_dn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fcnvsd_compact", "f_dn 0x%x", 'x', f_dn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fipr_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_fipr_compact.f - SI f_vn; - SI f_vm; - - f_vn = ((EXTRACT_LSB0_UINT (insn, 16, 11, 2)) << (2)); - f_vm = ((EXTRACT_LSB0_UINT (insn, 16, 9, 2)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_vm) = f_vm; - FLD (f_vn) = f_vn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fipr_compact", "f_vm 0x%x", 'x', f_vm, "f_vn 0x%x", 'x', f_vn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_flds_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_flds_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fldi0_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fldi0_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_float_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_float_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fmac_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fmac_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fmov1_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fmov1_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fmov2_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - FLD (f_rm) = f_rm; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fmov2_compact", "f_rn 0x%x", 'x', f_rn, "f_rm 0x%x", 'x', f_rm, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fmov3_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - FLD (f_rm) = f_rm; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fmov3_compact", "f_rn 0x%x", 'x', f_rn, "f_rm 0x%x", 'x', f_rm, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fmov4_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - FLD (f_rm) = f_rm; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fmov4_compact", "f_rn 0x%x", 'x', f_rn, "f_rm 0x%x", 'x', f_rm, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fmov5_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fmov5_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fmov6_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fmov6_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fmov7_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fmov7_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_frchg_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_frchg_compact", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fschg_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fschg_compact", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fsts_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fsts_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_ftrc_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ftrc_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_ftrv_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_fipr_compact.f - SI f_vn; - - f_vn = ((EXTRACT_LSB0_UINT (insn, 16, 11, 2)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_vn) = f_vn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ftrv_compact", "f_vn 0x%x", 'x', f_vn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_jmp_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_ldc_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldc_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_ldcl_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldcl_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_lds_fpscr_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lds_fpscr_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_ldsl_fpscr_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldsl_fpscr_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_lds_fpul_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lds_fpul_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_ldsl_fpul_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldsl_fpul_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_lds_mach_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lds_mach_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_ldsl_mach_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldsl_mach_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_lds_macl_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lds_macl_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_ldsl_macl_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldsl_macl_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_lds_pr_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lds_pr_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_ldsl_pr_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldsl_pr_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_macl_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_macl_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_macw_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_macw_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_mov_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mov_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movi_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_addi_compact.f - UINT f_rn; - UINT f_imm8; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_imm8 = EXTRACT_LSB0_UINT (insn, 16, 7, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_imm8) = f_imm8; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movi_compact", "f_imm8 0x%x", 'x', f_imm8, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movb1_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movb1_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movb2_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movb2_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movb3_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movb3_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movb4_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_addi_compact.f - UINT f_imm8; - - f_imm8 = EXTRACT_LSB0_UINT (insn, 16, 7, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_imm8) = f_imm8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movb4_compact", "f_imm8 0x%x", 'x', f_imm8, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movb5_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movb5_compact.f - UINT f_rm; - UINT f_imm4; - - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - f_imm4 = EXTRACT_LSB0_UINT (insn, 16, 3, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_imm4) = f_imm4; - FLD (f_rm) = f_rm; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movb5_compact", "f_imm4 0x%x", 'x', f_imm4, "f_rm 0x%x", 'x', f_rm, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movb6_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movb6_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movb7_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movb7_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movb8_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movb8_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movb9_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_addi_compact.f - UINT f_imm8; - - f_imm8 = EXTRACT_LSB0_UINT (insn, 16, 7, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_imm8) = f_imm8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movb9_compact", "f_imm8 0x%x", 'x', f_imm8, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movb10_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movb5_compact.f - UINT f_rm; - UINT f_imm4; - - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - f_imm4 = EXTRACT_LSB0_UINT (insn, 16, 3, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_imm4) = f_imm4; - FLD (f_rm) = f_rm; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movb10_compact", "f_imm4 0x%x", 'x', f_imm4, "f_rm 0x%x", 'x', f_rm, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movl4_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl10_compact.f - SI f_imm8x4; - - f_imm8x4 = ((EXTRACT_LSB0_UINT (insn, 16, 7, 8)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_imm8x4) = f_imm8x4; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movl4_compact", "f_imm8x4 0x%x", 'x', f_imm8x4, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movl5_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - SI f_imm4x4; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - f_imm4x4 = ((EXTRACT_LSB0_UINT (insn, 16, 3, 4)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_imm4x4) = f_imm4x4; - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movl5_compact", "f_imm4x4 0x%x", 'x', f_imm4x4, "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movl7_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movl7_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movl9_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl10_compact.f - SI f_imm8x4; - - f_imm8x4 = ((EXTRACT_LSB0_UINT (insn, 16, 7, 8)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_imm8x4) = f_imm8x4; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movl9_compact", "f_imm8x4 0x%x", 'x', f_imm8x4, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movl10_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl10_compact.f - UINT f_rn; - SI f_imm8x4; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_imm8x4 = ((EXTRACT_LSB0_UINT (insn, 16, 7, 8)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_imm8x4) = f_imm8x4; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movl10_compact", "f_imm8x4 0x%x", 'x', f_imm8x4, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movl11_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - SI f_imm4x4; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - f_imm4x4 = ((EXTRACT_LSB0_UINT (insn, 16, 3, 4)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_imm4x4) = f_imm4x4; - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movl11_compact", "f_imm4x4 0x%x", 'x', f_imm4x4, "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movw4_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - SI f_imm8x2; - - f_imm8x2 = ((EXTRACT_LSB0_UINT (insn, 16, 7, 8)) << (1)); - - /* Record the fields for the semantic handler. */ - FLD (f_imm8x2) = f_imm8x2; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movw4_compact", "f_imm8x2 0x%x", 'x', f_imm8x2, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movw5_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw5_compact.f - UINT f_rn; - SI f_imm4x2; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_imm4x2 = ((EXTRACT_LSB0_UINT (insn, 16, 3, 4)) << (1)); - - /* Record the fields for the semantic handler. */ - FLD (f_imm4x2) = f_imm4x2; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movw5_compact", "f_imm4x2 0x%x", 'x', f_imm4x2, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movw9_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - SI f_imm8x2; - - f_imm8x2 = ((EXTRACT_LSB0_UINT (insn, 16, 7, 8)) << (1)); - - /* Record the fields for the semantic handler. */ - FLD (f_imm8x2) = f_imm8x2; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movw9_compact", "f_imm8x2 0x%x", 'x', f_imm8x2, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movw10_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - SI f_imm8x2; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_imm8x2 = ((EXTRACT_LSB0_UINT (insn, 16, 7, 8)) << (1)); - - /* Record the fields for the semantic handler. */ - FLD (f_imm8x2) = f_imm8x2; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movw10_compact", "f_imm8x2 0x%x", 'x', f_imm8x2, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movw11_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw11_compact.f - UINT f_rm; - SI f_imm4x2; - - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - f_imm4x2 = ((EXTRACT_LSB0_UINT (insn, 16, 3, 4)) << (1)); - - /* Record the fields for the semantic handler. */ - FLD (f_imm4x2) = f_imm4x2; - FLD (f_rm) = f_rm; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movw11_compact", "f_imm4x2 0x%x", 'x', f_imm4x2, "f_rm 0x%x", 'x', f_rm, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_mova_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl10_compact.f - SI f_imm8x4; - - f_imm8x4 = ((EXTRACT_LSB0_UINT (insn, 16, 7, 8)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_imm8x4) = f_imm8x4; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mova_compact", "f_imm8x4 0x%x", 'x', f_imm8x4, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movcal_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movcal_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movt_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movt_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_mull_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mull_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_negc_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_negc_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_nop_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_nop_compact", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_rotcl_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rotcl_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_rts_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rts_compact", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_shad_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - UINT f_rn; - UINT f_rm; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rm) = f_rm; - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shad_compact", "f_rm 0x%x", 'x', f_rm, "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_shll2_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shll2_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_stc_gbr_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stc_gbr_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_stcl_gbr_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stcl_gbr_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_sts_fpscr_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sts_fpscr_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_stsl_fpscr_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stsl_fpscr_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_sts_fpul_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sts_fpul_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_stsl_fpul_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stsl_fpul_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_sts_mach_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sts_mach_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_stsl_mach_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stsl_mach_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_sts_macl_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sts_macl_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_stsl_macl_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stsl_macl_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_sts_pr_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sts_pr_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_stsl_pr_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stsl_pr_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_tasb_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - UINT f_rn; - - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_rn) = f_rn; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_tasb_compact", "f_rn 0x%x", 'x', f_rn, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_trapa_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_addi_compact.f - UINT f_imm8; - - f_imm8 = EXTRACT_LSB0_UINT (insn, 16, 7, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_imm8) = f_imm8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_trapa_compact", "f_imm8 0x%x", 'x', f_imm8, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_tsti_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_addi_compact.f - UINT f_imm8; - - f_imm8 = EXTRACT_LSB0_UINT (insn, 16, 7, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_imm8) = f_imm8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_tsti_compact", "f_imm8 0x%x", 'x', f_imm8, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_tstb_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_addi_compact.f - UINT f_imm8; - - f_imm8 = EXTRACT_LSB0_UINT (insn, 16, 7, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_imm8) = f_imm8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_tstb_compact", "f_imm8 0x%x", 'x', f_imm8, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_xori_compact: - { - const IDESC *idesc = &sh64_compact_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_addi_compact.f - UINT f_imm8; - - f_imm8 = EXTRACT_LSB0_UINT (insn, 16, 7, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_imm8) = f_imm8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_xori_compact", "f_imm8 0x%x", 'x', f_imm8, (char *) 0)); - -#undef FLD - return idesc; - } - -} diff --git a/sim/sh64/decode-compact.h b/sim/sh64/decode-compact.h deleted file mode 100644 index 8ca92a9d05d..00000000000 --- a/sim/sh64/decode-compact.h +++ /dev/null @@ -1,128 +0,0 @@ -/* Decode header for sh64_compact. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef SH64_COMPACT_DECODE_H -#define SH64_COMPACT_DECODE_H - -extern const IDESC *sh64_compact_decode (SIM_CPU *, IADDR, - CGEN_INSN_INT, CGEN_INSN_INT, - ARGBUF *); -extern void sh64_compact_init_idesc_table (SIM_CPU *); -extern void sh64_compact_sem_init_idesc_table (SIM_CPU *); -extern void sh64_compact_semf_init_idesc_table (SIM_CPU *); - -/* Enum declaration for instructions in cpu family sh64. */ -typedef enum sh64_compact_insn_type { - SH64_COMPACT_INSN_X_INVALID, SH64_COMPACT_INSN_X_AFTER, SH64_COMPACT_INSN_X_BEFORE, SH64_COMPACT_INSN_X_CTI_CHAIN - , SH64_COMPACT_INSN_X_CHAIN, SH64_COMPACT_INSN_X_BEGIN, SH64_COMPACT_INSN_ADD_COMPACT, SH64_COMPACT_INSN_ADDI_COMPACT - , SH64_COMPACT_INSN_ADDC_COMPACT, SH64_COMPACT_INSN_ADDV_COMPACT, SH64_COMPACT_INSN_AND_COMPACT, SH64_COMPACT_INSN_ANDI_COMPACT - , SH64_COMPACT_INSN_ANDB_COMPACT, SH64_COMPACT_INSN_BF_COMPACT, SH64_COMPACT_INSN_BFS_COMPACT, SH64_COMPACT_INSN_BRA_COMPACT - , SH64_COMPACT_INSN_BRAF_COMPACT, SH64_COMPACT_INSN_BRK_COMPACT, SH64_COMPACT_INSN_BSR_COMPACT, SH64_COMPACT_INSN_BSRF_COMPACT - , SH64_COMPACT_INSN_BT_COMPACT, SH64_COMPACT_INSN_BTS_COMPACT, SH64_COMPACT_INSN_CLRMAC_COMPACT, SH64_COMPACT_INSN_CLRS_COMPACT - , SH64_COMPACT_INSN_CLRT_COMPACT, SH64_COMPACT_INSN_CMPEQ_COMPACT, SH64_COMPACT_INSN_CMPEQI_COMPACT, SH64_COMPACT_INSN_CMPGE_COMPACT - , SH64_COMPACT_INSN_CMPGT_COMPACT, SH64_COMPACT_INSN_CMPHI_COMPACT, SH64_COMPACT_INSN_CMPHS_COMPACT, SH64_COMPACT_INSN_CMPPL_COMPACT - , SH64_COMPACT_INSN_CMPPZ_COMPACT, SH64_COMPACT_INSN_CMPSTR_COMPACT, SH64_COMPACT_INSN_DIV0S_COMPACT, SH64_COMPACT_INSN_DIV0U_COMPACT - , SH64_COMPACT_INSN_DIV1_COMPACT, SH64_COMPACT_INSN_DMULSL_COMPACT, SH64_COMPACT_INSN_DMULUL_COMPACT, SH64_COMPACT_INSN_DT_COMPACT - , SH64_COMPACT_INSN_EXTSB_COMPACT, SH64_COMPACT_INSN_EXTSW_COMPACT, SH64_COMPACT_INSN_EXTUB_COMPACT, SH64_COMPACT_INSN_EXTUW_COMPACT - , SH64_COMPACT_INSN_FABS_COMPACT, SH64_COMPACT_INSN_FADD_COMPACT, SH64_COMPACT_INSN_FCMPEQ_COMPACT, SH64_COMPACT_INSN_FCMPGT_COMPACT - , SH64_COMPACT_INSN_FCNVDS_COMPACT, SH64_COMPACT_INSN_FCNVSD_COMPACT, SH64_COMPACT_INSN_FDIV_COMPACT, SH64_COMPACT_INSN_FIPR_COMPACT - , SH64_COMPACT_INSN_FLDS_COMPACT, SH64_COMPACT_INSN_FLDI0_COMPACT, SH64_COMPACT_INSN_FLDI1_COMPACT, SH64_COMPACT_INSN_FLOAT_COMPACT - , SH64_COMPACT_INSN_FMAC_COMPACT, SH64_COMPACT_INSN_FMOV1_COMPACT, SH64_COMPACT_INSN_FMOV2_COMPACT, SH64_COMPACT_INSN_FMOV3_COMPACT - , SH64_COMPACT_INSN_FMOV4_COMPACT, SH64_COMPACT_INSN_FMOV5_COMPACT, SH64_COMPACT_INSN_FMOV6_COMPACT, SH64_COMPACT_INSN_FMOV7_COMPACT - , SH64_COMPACT_INSN_FMUL_COMPACT, SH64_COMPACT_INSN_FNEG_COMPACT, SH64_COMPACT_INSN_FRCHG_COMPACT, SH64_COMPACT_INSN_FSCHG_COMPACT - , SH64_COMPACT_INSN_FSQRT_COMPACT, SH64_COMPACT_INSN_FSTS_COMPACT, SH64_COMPACT_INSN_FSUB_COMPACT, SH64_COMPACT_INSN_FTRC_COMPACT - , SH64_COMPACT_INSN_FTRV_COMPACT, SH64_COMPACT_INSN_JMP_COMPACT, SH64_COMPACT_INSN_JSR_COMPACT, SH64_COMPACT_INSN_LDC_COMPACT - , SH64_COMPACT_INSN_LDCL_COMPACT, SH64_COMPACT_INSN_LDS_FPSCR_COMPACT, SH64_COMPACT_INSN_LDSL_FPSCR_COMPACT, SH64_COMPACT_INSN_LDS_FPUL_COMPACT - , SH64_COMPACT_INSN_LDSL_FPUL_COMPACT, SH64_COMPACT_INSN_LDS_MACH_COMPACT, SH64_COMPACT_INSN_LDSL_MACH_COMPACT, SH64_COMPACT_INSN_LDS_MACL_COMPACT - , SH64_COMPACT_INSN_LDSL_MACL_COMPACT, SH64_COMPACT_INSN_LDS_PR_COMPACT, SH64_COMPACT_INSN_LDSL_PR_COMPACT, SH64_COMPACT_INSN_MACL_COMPACT - , SH64_COMPACT_INSN_MACW_COMPACT, SH64_COMPACT_INSN_MOV_COMPACT, SH64_COMPACT_INSN_MOVI_COMPACT, SH64_COMPACT_INSN_MOVB1_COMPACT - , SH64_COMPACT_INSN_MOVB2_COMPACT, SH64_COMPACT_INSN_MOVB3_COMPACT, SH64_COMPACT_INSN_MOVB4_COMPACT, SH64_COMPACT_INSN_MOVB5_COMPACT - , SH64_COMPACT_INSN_MOVB6_COMPACT, SH64_COMPACT_INSN_MOVB7_COMPACT, SH64_COMPACT_INSN_MOVB8_COMPACT, SH64_COMPACT_INSN_MOVB9_COMPACT - , SH64_COMPACT_INSN_MOVB10_COMPACT, SH64_COMPACT_INSN_MOVL1_COMPACT, SH64_COMPACT_INSN_MOVL2_COMPACT, SH64_COMPACT_INSN_MOVL3_COMPACT - , SH64_COMPACT_INSN_MOVL4_COMPACT, SH64_COMPACT_INSN_MOVL5_COMPACT, SH64_COMPACT_INSN_MOVL6_COMPACT, SH64_COMPACT_INSN_MOVL7_COMPACT - , SH64_COMPACT_INSN_MOVL8_COMPACT, SH64_COMPACT_INSN_MOVL9_COMPACT, SH64_COMPACT_INSN_MOVL10_COMPACT, SH64_COMPACT_INSN_MOVL11_COMPACT - , SH64_COMPACT_INSN_MOVW1_COMPACT, SH64_COMPACT_INSN_MOVW2_COMPACT, SH64_COMPACT_INSN_MOVW3_COMPACT, SH64_COMPACT_INSN_MOVW4_COMPACT - , SH64_COMPACT_INSN_MOVW5_COMPACT, SH64_COMPACT_INSN_MOVW6_COMPACT, SH64_COMPACT_INSN_MOVW7_COMPACT, SH64_COMPACT_INSN_MOVW8_COMPACT - , SH64_COMPACT_INSN_MOVW9_COMPACT, SH64_COMPACT_INSN_MOVW10_COMPACT, SH64_COMPACT_INSN_MOVW11_COMPACT, SH64_COMPACT_INSN_MOVA_COMPACT - , SH64_COMPACT_INSN_MOVCAL_COMPACT, SH64_COMPACT_INSN_MOVT_COMPACT, SH64_COMPACT_INSN_MULL_COMPACT, SH64_COMPACT_INSN_MULSW_COMPACT - , SH64_COMPACT_INSN_MULUW_COMPACT, SH64_COMPACT_INSN_NEG_COMPACT, SH64_COMPACT_INSN_NEGC_COMPACT, SH64_COMPACT_INSN_NOP_COMPACT - , SH64_COMPACT_INSN_NOT_COMPACT, SH64_COMPACT_INSN_OCBI_COMPACT, SH64_COMPACT_INSN_OCBP_COMPACT, SH64_COMPACT_INSN_OCBWB_COMPACT - , SH64_COMPACT_INSN_OR_COMPACT, SH64_COMPACT_INSN_ORI_COMPACT, SH64_COMPACT_INSN_ORB_COMPACT, SH64_COMPACT_INSN_PREF_COMPACT - , SH64_COMPACT_INSN_ROTCL_COMPACT, SH64_COMPACT_INSN_ROTCR_COMPACT, SH64_COMPACT_INSN_ROTL_COMPACT, SH64_COMPACT_INSN_ROTR_COMPACT - , SH64_COMPACT_INSN_RTS_COMPACT, SH64_COMPACT_INSN_SETS_COMPACT, SH64_COMPACT_INSN_SETT_COMPACT, SH64_COMPACT_INSN_SHAD_COMPACT - , SH64_COMPACT_INSN_SHAL_COMPACT, SH64_COMPACT_INSN_SHAR_COMPACT, SH64_COMPACT_INSN_SHLD_COMPACT, SH64_COMPACT_INSN_SHLL_COMPACT - , SH64_COMPACT_INSN_SHLL2_COMPACT, SH64_COMPACT_INSN_SHLL8_COMPACT, SH64_COMPACT_INSN_SHLL16_COMPACT, SH64_COMPACT_INSN_SHLR_COMPACT - , SH64_COMPACT_INSN_SHLR2_COMPACT, SH64_COMPACT_INSN_SHLR8_COMPACT, SH64_COMPACT_INSN_SHLR16_COMPACT, SH64_COMPACT_INSN_STC_GBR_COMPACT - , SH64_COMPACT_INSN_STCL_GBR_COMPACT, SH64_COMPACT_INSN_STS_FPSCR_COMPACT, SH64_COMPACT_INSN_STSL_FPSCR_COMPACT, SH64_COMPACT_INSN_STS_FPUL_COMPACT - , SH64_COMPACT_INSN_STSL_FPUL_COMPACT, SH64_COMPACT_INSN_STS_MACH_COMPACT, SH64_COMPACT_INSN_STSL_MACH_COMPACT, SH64_COMPACT_INSN_STS_MACL_COMPACT - , SH64_COMPACT_INSN_STSL_MACL_COMPACT, SH64_COMPACT_INSN_STS_PR_COMPACT, SH64_COMPACT_INSN_STSL_PR_COMPACT, SH64_COMPACT_INSN_SUB_COMPACT - , SH64_COMPACT_INSN_SUBC_COMPACT, SH64_COMPACT_INSN_SUBV_COMPACT, SH64_COMPACT_INSN_SWAPB_COMPACT, SH64_COMPACT_INSN_SWAPW_COMPACT - , SH64_COMPACT_INSN_TASB_COMPACT, SH64_COMPACT_INSN_TRAPA_COMPACT, SH64_COMPACT_INSN_TST_COMPACT, SH64_COMPACT_INSN_TSTI_COMPACT - , SH64_COMPACT_INSN_TSTB_COMPACT, SH64_COMPACT_INSN_XOR_COMPACT, SH64_COMPACT_INSN_XORI_COMPACT, SH64_COMPACT_INSN_XORB_COMPACT - , SH64_COMPACT_INSN_XTRCT_COMPACT, SH64_COMPACT_INSN_MAX -} SH64_COMPACT_INSN_TYPE; - -/* Enum declaration for semantic formats in cpu family sh64. */ -typedef enum sh64_compact_sfmt_type { - SH64_COMPACT_SFMT_EMPTY, SH64_COMPACT_SFMT_ADD_COMPACT, SH64_COMPACT_SFMT_ADDI_COMPACT, SH64_COMPACT_SFMT_ADDC_COMPACT - , SH64_COMPACT_SFMT_ADDV_COMPACT, SH64_COMPACT_SFMT_AND_COMPACT, SH64_COMPACT_SFMT_ANDI_COMPACT, SH64_COMPACT_SFMT_ANDB_COMPACT - , SH64_COMPACT_SFMT_BF_COMPACT, SH64_COMPACT_SFMT_BRA_COMPACT, SH64_COMPACT_SFMT_BRAF_COMPACT, SH64_COMPACT_SFMT_BRK_COMPACT - , SH64_COMPACT_SFMT_BSR_COMPACT, SH64_COMPACT_SFMT_BSRF_COMPACT, SH64_COMPACT_SFMT_CLRMAC_COMPACT, SH64_COMPACT_SFMT_CLRS_COMPACT - , SH64_COMPACT_SFMT_CLRT_COMPACT, SH64_COMPACT_SFMT_CMPEQ_COMPACT, SH64_COMPACT_SFMT_CMPEQI_COMPACT, SH64_COMPACT_SFMT_CMPPL_COMPACT - , SH64_COMPACT_SFMT_DIV0S_COMPACT, SH64_COMPACT_SFMT_DIV0U_COMPACT, SH64_COMPACT_SFMT_DIV1_COMPACT, SH64_COMPACT_SFMT_DMULSL_COMPACT - , SH64_COMPACT_SFMT_DT_COMPACT, SH64_COMPACT_SFMT_EXTSB_COMPACT, SH64_COMPACT_SFMT_FABS_COMPACT, SH64_COMPACT_SFMT_FADD_COMPACT - , SH64_COMPACT_SFMT_FCMPEQ_COMPACT, SH64_COMPACT_SFMT_FCNVDS_COMPACT, SH64_COMPACT_SFMT_FCNVSD_COMPACT, SH64_COMPACT_SFMT_FIPR_COMPACT - , SH64_COMPACT_SFMT_FLDS_COMPACT, SH64_COMPACT_SFMT_FLDI0_COMPACT, SH64_COMPACT_SFMT_FLOAT_COMPACT, SH64_COMPACT_SFMT_FMAC_COMPACT - , SH64_COMPACT_SFMT_FMOV1_COMPACT, SH64_COMPACT_SFMT_FMOV2_COMPACT, SH64_COMPACT_SFMT_FMOV3_COMPACT, SH64_COMPACT_SFMT_FMOV4_COMPACT - , SH64_COMPACT_SFMT_FMOV5_COMPACT, SH64_COMPACT_SFMT_FMOV6_COMPACT, SH64_COMPACT_SFMT_FMOV7_COMPACT, SH64_COMPACT_SFMT_FRCHG_COMPACT - , SH64_COMPACT_SFMT_FSCHG_COMPACT, SH64_COMPACT_SFMT_FSTS_COMPACT, SH64_COMPACT_SFMT_FTRC_COMPACT, SH64_COMPACT_SFMT_FTRV_COMPACT - , SH64_COMPACT_SFMT_JMP_COMPACT, SH64_COMPACT_SFMT_LDC_COMPACT, SH64_COMPACT_SFMT_LDCL_COMPACT, SH64_COMPACT_SFMT_LDS_FPSCR_COMPACT - , SH64_COMPACT_SFMT_LDSL_FPSCR_COMPACT, SH64_COMPACT_SFMT_LDS_FPUL_COMPACT, SH64_COMPACT_SFMT_LDSL_FPUL_COMPACT, SH64_COMPACT_SFMT_LDS_MACH_COMPACT - , SH64_COMPACT_SFMT_LDSL_MACH_COMPACT, SH64_COMPACT_SFMT_LDS_MACL_COMPACT, SH64_COMPACT_SFMT_LDSL_MACL_COMPACT, SH64_COMPACT_SFMT_LDS_PR_COMPACT - , SH64_COMPACT_SFMT_LDSL_PR_COMPACT, SH64_COMPACT_SFMT_MACL_COMPACT, SH64_COMPACT_SFMT_MACW_COMPACT, SH64_COMPACT_SFMT_MOV_COMPACT - , SH64_COMPACT_SFMT_MOVI_COMPACT, SH64_COMPACT_SFMT_MOVB1_COMPACT, SH64_COMPACT_SFMT_MOVB2_COMPACT, SH64_COMPACT_SFMT_MOVB3_COMPACT - , SH64_COMPACT_SFMT_MOVB4_COMPACT, SH64_COMPACT_SFMT_MOVB5_COMPACT, SH64_COMPACT_SFMT_MOVB6_COMPACT, SH64_COMPACT_SFMT_MOVB7_COMPACT - , SH64_COMPACT_SFMT_MOVB8_COMPACT, SH64_COMPACT_SFMT_MOVB9_COMPACT, SH64_COMPACT_SFMT_MOVB10_COMPACT, SH64_COMPACT_SFMT_MOVL4_COMPACT - , SH64_COMPACT_SFMT_MOVL5_COMPACT, SH64_COMPACT_SFMT_MOVL7_COMPACT, SH64_COMPACT_SFMT_MOVL9_COMPACT, SH64_COMPACT_SFMT_MOVL10_COMPACT - , SH64_COMPACT_SFMT_MOVL11_COMPACT, SH64_COMPACT_SFMT_MOVW4_COMPACT, SH64_COMPACT_SFMT_MOVW5_COMPACT, SH64_COMPACT_SFMT_MOVW9_COMPACT - , SH64_COMPACT_SFMT_MOVW10_COMPACT, SH64_COMPACT_SFMT_MOVW11_COMPACT, SH64_COMPACT_SFMT_MOVA_COMPACT, SH64_COMPACT_SFMT_MOVCAL_COMPACT - , SH64_COMPACT_SFMT_MOVT_COMPACT, SH64_COMPACT_SFMT_MULL_COMPACT, SH64_COMPACT_SFMT_NEGC_COMPACT, SH64_COMPACT_SFMT_NOP_COMPACT - , SH64_COMPACT_SFMT_ROTCL_COMPACT, SH64_COMPACT_SFMT_RTS_COMPACT, SH64_COMPACT_SFMT_SHAD_COMPACT, SH64_COMPACT_SFMT_SHLL2_COMPACT - , SH64_COMPACT_SFMT_STC_GBR_COMPACT, SH64_COMPACT_SFMT_STCL_GBR_COMPACT, SH64_COMPACT_SFMT_STS_FPSCR_COMPACT, SH64_COMPACT_SFMT_STSL_FPSCR_COMPACT - , SH64_COMPACT_SFMT_STS_FPUL_COMPACT, SH64_COMPACT_SFMT_STSL_FPUL_COMPACT, SH64_COMPACT_SFMT_STS_MACH_COMPACT, SH64_COMPACT_SFMT_STSL_MACH_COMPACT - , SH64_COMPACT_SFMT_STS_MACL_COMPACT, SH64_COMPACT_SFMT_STSL_MACL_COMPACT, SH64_COMPACT_SFMT_STS_PR_COMPACT, SH64_COMPACT_SFMT_STSL_PR_COMPACT - , SH64_COMPACT_SFMT_TASB_COMPACT, SH64_COMPACT_SFMT_TRAPA_COMPACT, SH64_COMPACT_SFMT_TSTI_COMPACT, SH64_COMPACT_SFMT_TSTB_COMPACT - , SH64_COMPACT_SFMT_XORI_COMPACT -} SH64_COMPACT_SFMT_TYPE; - -/* Function unit handlers (user written). */ - -extern int sh64_model_sh5_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/); - -/* Profiling before/after handlers (user written) */ - -extern void sh64_model_insn_before (SIM_CPU *, int /*first_p*/); -extern void sh64_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/); - -#endif /* SH64_COMPACT_DECODE_H */ diff --git a/sim/sh64/decode-media.c b/sim/sh64/decode-media.c deleted file mode 100644 index f1471f332bb..00000000000 --- a/sim/sh64/decode-media.c +++ /dev/null @@ -1,2109 +0,0 @@ -/* Simulator instruction decoder for sh64_media. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU sh64 -#define WANT_CPU_SH64 - -#include "sim-main.h" -#include "sim-assert.h" - -/* The instruction descriptor array. - This is computed at runtime. Space for it is not malloc'd to save a - teensy bit of cpu in the decoder. Moving it to malloc space is trivial - but won't be done until necessary (we don't currently support the runtime - addition of instructions nor an SMP machine with different cpus). */ -static IDESC sh64_media_insn_data[SH64_MEDIA_INSN_MAX]; - -/* Commas between elements are contained in the macros. - Some of these are conditionally compiled out. */ - -static const struct insn_sem sh64_media_insn_sem[] = -{ - { VIRTUAL_INSN_X_INVALID, SH64_MEDIA_INSN_X_INVALID, SH64_MEDIA_SFMT_EMPTY }, - { VIRTUAL_INSN_X_AFTER, SH64_MEDIA_INSN_X_AFTER, SH64_MEDIA_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEFORE, SH64_MEDIA_INSN_X_BEFORE, SH64_MEDIA_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CTI_CHAIN, SH64_MEDIA_INSN_X_CTI_CHAIN, SH64_MEDIA_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CHAIN, SH64_MEDIA_INSN_X_CHAIN, SH64_MEDIA_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEGIN, SH64_MEDIA_INSN_X_BEGIN, SH64_MEDIA_SFMT_EMPTY }, - { SH_INSN_ADD, SH64_MEDIA_INSN_ADD, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_ADDL, SH64_MEDIA_INSN_ADDL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_ADDI, SH64_MEDIA_INSN_ADDI, SH64_MEDIA_SFMT_ADDI }, - { SH_INSN_ADDIL, SH64_MEDIA_INSN_ADDIL, SH64_MEDIA_SFMT_ADDI }, - { SH_INSN_ADDZL, SH64_MEDIA_INSN_ADDZL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_ALLOCO, SH64_MEDIA_INSN_ALLOCO, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_AND, SH64_MEDIA_INSN_AND, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_ANDC, SH64_MEDIA_INSN_ANDC, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_ANDI, SH64_MEDIA_INSN_ANDI, SH64_MEDIA_SFMT_ADDI }, - { SH_INSN_BEQ, SH64_MEDIA_INSN_BEQ, SH64_MEDIA_SFMT_BEQ }, - { SH_INSN_BEQI, SH64_MEDIA_INSN_BEQI, SH64_MEDIA_SFMT_BEQI }, - { SH_INSN_BGE, SH64_MEDIA_INSN_BGE, SH64_MEDIA_SFMT_BEQ }, - { SH_INSN_BGEU, SH64_MEDIA_INSN_BGEU, SH64_MEDIA_SFMT_BEQ }, - { SH_INSN_BGT, SH64_MEDIA_INSN_BGT, SH64_MEDIA_SFMT_BEQ }, - { SH_INSN_BGTU, SH64_MEDIA_INSN_BGTU, SH64_MEDIA_SFMT_BEQ }, - { SH_INSN_BLINK, SH64_MEDIA_INSN_BLINK, SH64_MEDIA_SFMT_BLINK }, - { SH_INSN_BNE, SH64_MEDIA_INSN_BNE, SH64_MEDIA_SFMT_BEQ }, - { SH_INSN_BNEI, SH64_MEDIA_INSN_BNEI, SH64_MEDIA_SFMT_BEQI }, - { SH_INSN_BRK, SH64_MEDIA_INSN_BRK, SH64_MEDIA_SFMT_BRK }, - { SH_INSN_BYTEREV, SH64_MEDIA_INSN_BYTEREV, SH64_MEDIA_SFMT_BYTEREV }, - { SH_INSN_CMPEQ, SH64_MEDIA_INSN_CMPEQ, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_CMPGT, SH64_MEDIA_INSN_CMPGT, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_CMPGTU, SH64_MEDIA_INSN_CMPGTU, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_CMVEQ, SH64_MEDIA_INSN_CMVEQ, SH64_MEDIA_SFMT_CMVEQ }, - { SH_INSN_CMVNE, SH64_MEDIA_INSN_CMVNE, SH64_MEDIA_SFMT_CMVEQ }, - { SH_INSN_FABSD, SH64_MEDIA_INSN_FABSD, SH64_MEDIA_SFMT_FABSD }, - { SH_INSN_FABSS, SH64_MEDIA_INSN_FABSS, SH64_MEDIA_SFMT_FABSS }, - { SH_INSN_FADDD, SH64_MEDIA_INSN_FADDD, SH64_MEDIA_SFMT_FADDD }, - { SH_INSN_FADDS, SH64_MEDIA_INSN_FADDS, SH64_MEDIA_SFMT_FADDS }, - { SH_INSN_FCMPEQD, SH64_MEDIA_INSN_FCMPEQD, SH64_MEDIA_SFMT_FCMPEQD }, - { SH_INSN_FCMPEQS, SH64_MEDIA_INSN_FCMPEQS, SH64_MEDIA_SFMT_FCMPEQS }, - { SH_INSN_FCMPGED, SH64_MEDIA_INSN_FCMPGED, SH64_MEDIA_SFMT_FCMPEQD }, - { SH_INSN_FCMPGES, SH64_MEDIA_INSN_FCMPGES, SH64_MEDIA_SFMT_FCMPEQS }, - { SH_INSN_FCMPGTD, SH64_MEDIA_INSN_FCMPGTD, SH64_MEDIA_SFMT_FCMPEQD }, - { SH_INSN_FCMPGTS, SH64_MEDIA_INSN_FCMPGTS, SH64_MEDIA_SFMT_FCMPEQS }, - { SH_INSN_FCMPUND, SH64_MEDIA_INSN_FCMPUND, SH64_MEDIA_SFMT_FCMPEQD }, - { SH_INSN_FCMPUNS, SH64_MEDIA_INSN_FCMPUNS, SH64_MEDIA_SFMT_FCMPEQS }, - { SH_INSN_FCNVDS, SH64_MEDIA_INSN_FCNVDS, SH64_MEDIA_SFMT_FCNVDS }, - { SH_INSN_FCNVSD, SH64_MEDIA_INSN_FCNVSD, SH64_MEDIA_SFMT_FCNVSD }, - { SH_INSN_FDIVD, SH64_MEDIA_INSN_FDIVD, SH64_MEDIA_SFMT_FADDD }, - { SH_INSN_FDIVS, SH64_MEDIA_INSN_FDIVS, SH64_MEDIA_SFMT_FADDS }, - { SH_INSN_FGETSCR, SH64_MEDIA_INSN_FGETSCR, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_FIPRS, SH64_MEDIA_INSN_FIPRS, SH64_MEDIA_SFMT_FIPRS }, - { SH_INSN_FLDD, SH64_MEDIA_INSN_FLDD, SH64_MEDIA_SFMT_FLDD }, - { SH_INSN_FLDP, SH64_MEDIA_INSN_FLDP, SH64_MEDIA_SFMT_FLDP }, - { SH_INSN_FLDS, SH64_MEDIA_INSN_FLDS, SH64_MEDIA_SFMT_FLDS }, - { SH_INSN_FLDXD, SH64_MEDIA_INSN_FLDXD, SH64_MEDIA_SFMT_FLDXD }, - { SH_INSN_FLDXP, SH64_MEDIA_INSN_FLDXP, SH64_MEDIA_SFMT_FLDXP }, - { SH_INSN_FLDXS, SH64_MEDIA_INSN_FLDXS, SH64_MEDIA_SFMT_FLDXS }, - { SH_INSN_FLOATLD, SH64_MEDIA_INSN_FLOATLD, SH64_MEDIA_SFMT_FCNVSD }, - { SH_INSN_FLOATLS, SH64_MEDIA_INSN_FLOATLS, SH64_MEDIA_SFMT_FABSS }, - { SH_INSN_FLOATQD, SH64_MEDIA_INSN_FLOATQD, SH64_MEDIA_SFMT_FABSD }, - { SH_INSN_FLOATQS, SH64_MEDIA_INSN_FLOATQS, SH64_MEDIA_SFMT_FCNVDS }, - { SH_INSN_FMACS, SH64_MEDIA_INSN_FMACS, SH64_MEDIA_SFMT_FMACS }, - { SH_INSN_FMOVD, SH64_MEDIA_INSN_FMOVD, SH64_MEDIA_SFMT_FABSD }, - { SH_INSN_FMOVDQ, SH64_MEDIA_INSN_FMOVDQ, SH64_MEDIA_SFMT_FMOVDQ }, - { SH_INSN_FMOVLS, SH64_MEDIA_INSN_FMOVLS, SH64_MEDIA_SFMT_FMOVLS }, - { SH_INSN_FMOVQD, SH64_MEDIA_INSN_FMOVQD, SH64_MEDIA_SFMT_FMOVQD }, - { SH_INSN_FMOVS, SH64_MEDIA_INSN_FMOVS, SH64_MEDIA_SFMT_FABSS }, - { SH_INSN_FMOVSL, SH64_MEDIA_INSN_FMOVSL, SH64_MEDIA_SFMT_FMOVSL }, - { SH_INSN_FMULD, SH64_MEDIA_INSN_FMULD, SH64_MEDIA_SFMT_FADDD }, - { SH_INSN_FMULS, SH64_MEDIA_INSN_FMULS, SH64_MEDIA_SFMT_FADDS }, - { SH_INSN_FNEGD, SH64_MEDIA_INSN_FNEGD, SH64_MEDIA_SFMT_FABSD }, - { SH_INSN_FNEGS, SH64_MEDIA_INSN_FNEGS, SH64_MEDIA_SFMT_FABSS }, - { SH_INSN_FPUTSCR, SH64_MEDIA_INSN_FPUTSCR, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_FSQRTD, SH64_MEDIA_INSN_FSQRTD, SH64_MEDIA_SFMT_FABSD }, - { SH_INSN_FSQRTS, SH64_MEDIA_INSN_FSQRTS, SH64_MEDIA_SFMT_FABSS }, - { SH_INSN_FSTD, SH64_MEDIA_INSN_FSTD, SH64_MEDIA_SFMT_FSTD }, - { SH_INSN_FSTP, SH64_MEDIA_INSN_FSTP, SH64_MEDIA_SFMT_FSTP }, - { SH_INSN_FSTS, SH64_MEDIA_INSN_FSTS, SH64_MEDIA_SFMT_FSTS }, - { SH_INSN_FSTXD, SH64_MEDIA_INSN_FSTXD, SH64_MEDIA_SFMT_FSTXD }, - { SH_INSN_FSTXP, SH64_MEDIA_INSN_FSTXP, SH64_MEDIA_SFMT_FSTXP }, - { SH_INSN_FSTXS, SH64_MEDIA_INSN_FSTXS, SH64_MEDIA_SFMT_FSTXS }, - { SH_INSN_FSUBD, SH64_MEDIA_INSN_FSUBD, SH64_MEDIA_SFMT_FADDD }, - { SH_INSN_FSUBS, SH64_MEDIA_INSN_FSUBS, SH64_MEDIA_SFMT_FADDS }, - { SH_INSN_FTRCDL, SH64_MEDIA_INSN_FTRCDL, SH64_MEDIA_SFMT_FCNVDS }, - { SH_INSN_FTRCSL, SH64_MEDIA_INSN_FTRCSL, SH64_MEDIA_SFMT_FABSS }, - { SH_INSN_FTRCDQ, SH64_MEDIA_INSN_FTRCDQ, SH64_MEDIA_SFMT_FABSD }, - { SH_INSN_FTRCSQ, SH64_MEDIA_INSN_FTRCSQ, SH64_MEDIA_SFMT_FCNVSD }, - { SH_INSN_FTRVS, SH64_MEDIA_INSN_FTRVS, SH64_MEDIA_SFMT_FTRVS }, - { SH_INSN_GETCFG, SH64_MEDIA_INSN_GETCFG, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_GETCON, SH64_MEDIA_INSN_GETCON, SH64_MEDIA_SFMT_GETCON }, - { SH_INSN_GETTR, SH64_MEDIA_INSN_GETTR, SH64_MEDIA_SFMT_GETTR }, - { SH_INSN_ICBI, SH64_MEDIA_INSN_ICBI, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_LDB, SH64_MEDIA_INSN_LDB, SH64_MEDIA_SFMT_LDB }, - { SH_INSN_LDL, SH64_MEDIA_INSN_LDL, SH64_MEDIA_SFMT_LDL }, - { SH_INSN_LDQ, SH64_MEDIA_INSN_LDQ, SH64_MEDIA_SFMT_LDQ }, - { SH_INSN_LDUB, SH64_MEDIA_INSN_LDUB, SH64_MEDIA_SFMT_LDB }, - { SH_INSN_LDUW, SH64_MEDIA_INSN_LDUW, SH64_MEDIA_SFMT_LDUW }, - { SH_INSN_LDW, SH64_MEDIA_INSN_LDW, SH64_MEDIA_SFMT_LDUW }, - { SH_INSN_LDHIL, SH64_MEDIA_INSN_LDHIL, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_LDHIQ, SH64_MEDIA_INSN_LDHIQ, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_LDLOL, SH64_MEDIA_INSN_LDLOL, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_LDLOQ, SH64_MEDIA_INSN_LDLOQ, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_LDXB, SH64_MEDIA_INSN_LDXB, SH64_MEDIA_SFMT_LDXB }, - { SH_INSN_LDXL, SH64_MEDIA_INSN_LDXL, SH64_MEDIA_SFMT_LDXB }, - { SH_INSN_LDXQ, SH64_MEDIA_INSN_LDXQ, SH64_MEDIA_SFMT_LDXB }, - { SH_INSN_LDXUB, SH64_MEDIA_INSN_LDXUB, SH64_MEDIA_SFMT_LDXB }, - { SH_INSN_LDXUW, SH64_MEDIA_INSN_LDXUW, SH64_MEDIA_SFMT_LDXB }, - { SH_INSN_LDXW, SH64_MEDIA_INSN_LDXW, SH64_MEDIA_SFMT_LDXB }, - { SH_INSN_MABSL, SH64_MEDIA_INSN_MABSL, SH64_MEDIA_SFMT_BYTEREV }, - { SH_INSN_MABSW, SH64_MEDIA_INSN_MABSW, SH64_MEDIA_SFMT_BYTEREV }, - { SH_INSN_MADDL, SH64_MEDIA_INSN_MADDL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MADDW, SH64_MEDIA_INSN_MADDW, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MADDSL, SH64_MEDIA_INSN_MADDSL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MADDSUB, SH64_MEDIA_INSN_MADDSUB, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MADDSW, SH64_MEDIA_INSN_MADDSW, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MCMPEQB, SH64_MEDIA_INSN_MCMPEQB, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MCMPEQL, SH64_MEDIA_INSN_MCMPEQL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MCMPEQW, SH64_MEDIA_INSN_MCMPEQW, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MCMPGTL, SH64_MEDIA_INSN_MCMPGTL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MCMPGTUB, SH64_MEDIA_INSN_MCMPGTUB, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MCMPGTW, SH64_MEDIA_INSN_MCMPGTW, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MCMV, SH64_MEDIA_INSN_MCMV, SH64_MEDIA_SFMT_MCMV }, - { SH_INSN_MCNVSLW, SH64_MEDIA_INSN_MCNVSLW, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MCNVSWB, SH64_MEDIA_INSN_MCNVSWB, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MCNVSWUB, SH64_MEDIA_INSN_MCNVSWUB, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MEXTR1, SH64_MEDIA_INSN_MEXTR1, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MEXTR2, SH64_MEDIA_INSN_MEXTR2, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MEXTR3, SH64_MEDIA_INSN_MEXTR3, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MEXTR4, SH64_MEDIA_INSN_MEXTR4, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MEXTR5, SH64_MEDIA_INSN_MEXTR5, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MEXTR6, SH64_MEDIA_INSN_MEXTR6, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MEXTR7, SH64_MEDIA_INSN_MEXTR7, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MMACFXWL, SH64_MEDIA_INSN_MMACFXWL, SH64_MEDIA_SFMT_MCMV }, - { SH_INSN_MMACNFX_WL, SH64_MEDIA_INSN_MMACNFX_WL, SH64_MEDIA_SFMT_MCMV }, - { SH_INSN_MMULL, SH64_MEDIA_INSN_MMULL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MMULW, SH64_MEDIA_INSN_MMULW, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MMULFXL, SH64_MEDIA_INSN_MMULFXL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MMULFXW, SH64_MEDIA_INSN_MMULFXW, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MMULFXRPW, SH64_MEDIA_INSN_MMULFXRPW, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MMULHIWL, SH64_MEDIA_INSN_MMULHIWL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MMULLOWL, SH64_MEDIA_INSN_MMULLOWL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MMULSUMWQ, SH64_MEDIA_INSN_MMULSUMWQ, SH64_MEDIA_SFMT_MCMV }, - { SH_INSN_MOVI, SH64_MEDIA_INSN_MOVI, SH64_MEDIA_SFMT_MOVI }, - { SH_INSN_MPERMW, SH64_MEDIA_INSN_MPERMW, SH64_MEDIA_SFMT_MPERMW }, - { SH_INSN_MSADUBQ, SH64_MEDIA_INSN_MSADUBQ, SH64_MEDIA_SFMT_MCMV }, - { SH_INSN_MSHALDSL, SH64_MEDIA_INSN_MSHALDSL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MSHALDSW, SH64_MEDIA_INSN_MSHALDSW, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MSHARDL, SH64_MEDIA_INSN_MSHARDL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MSHARDW, SH64_MEDIA_INSN_MSHARDW, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MSHARDSQ, SH64_MEDIA_INSN_MSHARDSQ, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MSHFHIB, SH64_MEDIA_INSN_MSHFHIB, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MSHFHIL, SH64_MEDIA_INSN_MSHFHIL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MSHFHIW, SH64_MEDIA_INSN_MSHFHIW, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MSHFLOB, SH64_MEDIA_INSN_MSHFLOB, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MSHFLOL, SH64_MEDIA_INSN_MSHFLOL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MSHFLOW, SH64_MEDIA_INSN_MSHFLOW, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MSHLLDL, SH64_MEDIA_INSN_MSHLLDL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MSHLLDW, SH64_MEDIA_INSN_MSHLLDW, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MSHLRDL, SH64_MEDIA_INSN_MSHLRDL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MSHLRDW, SH64_MEDIA_INSN_MSHLRDW, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MSUBL, SH64_MEDIA_INSN_MSUBL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MSUBW, SH64_MEDIA_INSN_MSUBW, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MSUBSL, SH64_MEDIA_INSN_MSUBSL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MSUBSUB, SH64_MEDIA_INSN_MSUBSUB, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MSUBSW, SH64_MEDIA_INSN_MSUBSW, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MULSL, SH64_MEDIA_INSN_MULSL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_MULUL, SH64_MEDIA_INSN_MULUL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_NOP, SH64_MEDIA_INSN_NOP, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_NSB, SH64_MEDIA_INSN_NSB, SH64_MEDIA_SFMT_BYTEREV }, - { SH_INSN_OCBI, SH64_MEDIA_INSN_OCBI, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_OCBP, SH64_MEDIA_INSN_OCBP, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_OCBWB, SH64_MEDIA_INSN_OCBWB, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_OR, SH64_MEDIA_INSN_OR, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_ORI, SH64_MEDIA_INSN_ORI, SH64_MEDIA_SFMT_ORI }, - { SH_INSN_PREFI, SH64_MEDIA_INSN_PREFI, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_PTA, SH64_MEDIA_INSN_PTA, SH64_MEDIA_SFMT_PTA }, - { SH_INSN_PTABS, SH64_MEDIA_INSN_PTABS, SH64_MEDIA_SFMT_PTABS }, - { SH_INSN_PTB, SH64_MEDIA_INSN_PTB, SH64_MEDIA_SFMT_PTA }, - { SH_INSN_PTREL, SH64_MEDIA_INSN_PTREL, SH64_MEDIA_SFMT_PTREL }, - { SH_INSN_PUTCFG, SH64_MEDIA_INSN_PUTCFG, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_PUTCON, SH64_MEDIA_INSN_PUTCON, SH64_MEDIA_SFMT_PUTCON }, - { SH_INSN_RTE, SH64_MEDIA_INSN_RTE, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_SHARD, SH64_MEDIA_INSN_SHARD, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_SHARDL, SH64_MEDIA_INSN_SHARDL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_SHARI, SH64_MEDIA_INSN_SHARI, SH64_MEDIA_SFMT_SHARI }, - { SH_INSN_SHARIL, SH64_MEDIA_INSN_SHARIL, SH64_MEDIA_SFMT_SHARIL }, - { SH_INSN_SHLLD, SH64_MEDIA_INSN_SHLLD, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_SHLLDL, SH64_MEDIA_INSN_SHLLDL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_SHLLI, SH64_MEDIA_INSN_SHLLI, SH64_MEDIA_SFMT_SHARI }, - { SH_INSN_SHLLIL, SH64_MEDIA_INSN_SHLLIL, SH64_MEDIA_SFMT_SHARIL }, - { SH_INSN_SHLRD, SH64_MEDIA_INSN_SHLRD, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_SHLRDL, SH64_MEDIA_INSN_SHLRDL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_SHLRI, SH64_MEDIA_INSN_SHLRI, SH64_MEDIA_SFMT_SHARI }, - { SH_INSN_SHLRIL, SH64_MEDIA_INSN_SHLRIL, SH64_MEDIA_SFMT_SHARIL }, - { SH_INSN_SHORI, SH64_MEDIA_INSN_SHORI, SH64_MEDIA_SFMT_SHORI }, - { SH_INSN_SLEEP, SH64_MEDIA_INSN_SLEEP, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_STB, SH64_MEDIA_INSN_STB, SH64_MEDIA_SFMT_STB }, - { SH_INSN_STL, SH64_MEDIA_INSN_STL, SH64_MEDIA_SFMT_STL }, - { SH_INSN_STQ, SH64_MEDIA_INSN_STQ, SH64_MEDIA_SFMT_STQ }, - { SH_INSN_STW, SH64_MEDIA_INSN_STW, SH64_MEDIA_SFMT_STW }, - { SH_INSN_STHIL, SH64_MEDIA_INSN_STHIL, SH64_MEDIA_SFMT_STHIL }, - { SH_INSN_STHIQ, SH64_MEDIA_INSN_STHIQ, SH64_MEDIA_SFMT_STHIL }, - { SH_INSN_STLOL, SH64_MEDIA_INSN_STLOL, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_STLOQ, SH64_MEDIA_INSN_STLOQ, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_STXB, SH64_MEDIA_INSN_STXB, SH64_MEDIA_SFMT_STXB }, - { SH_INSN_STXL, SH64_MEDIA_INSN_STXL, SH64_MEDIA_SFMT_STXB }, - { SH_INSN_STXQ, SH64_MEDIA_INSN_STXQ, SH64_MEDIA_SFMT_STXB }, - { SH_INSN_STXW, SH64_MEDIA_INSN_STXW, SH64_MEDIA_SFMT_STXB }, - { SH_INSN_SUB, SH64_MEDIA_INSN_SUB, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_SUBL, SH64_MEDIA_INSN_SUBL, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_SWAPQ, SH64_MEDIA_INSN_SWAPQ, SH64_MEDIA_SFMT_SWAPQ }, - { SH_INSN_SYNCI, SH64_MEDIA_INSN_SYNCI, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_SYNCO, SH64_MEDIA_INSN_SYNCO, SH64_MEDIA_SFMT_ALLOCO }, - { SH_INSN_TRAPA, SH64_MEDIA_INSN_TRAPA, SH64_MEDIA_SFMT_TRAPA }, - { SH_INSN_XOR, SH64_MEDIA_INSN_XOR, SH64_MEDIA_SFMT_ADD }, - { SH_INSN_XORI, SH64_MEDIA_INSN_XORI, SH64_MEDIA_SFMT_XORI }, -}; - -static const struct insn_sem sh64_media_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, SH64_MEDIA_INSN_X_INVALID, SH64_MEDIA_SFMT_EMPTY -}; - -/* Initialize an IDESC from the compile-time computable parts. */ - -static INLINE void -init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) -{ - const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries; - - id->num = t->index; - id->sfmt = t->sfmt; - if ((int) t->type <= 0) - id->idata = & cgen_virtual_insn_table[- (int) t->type]; - else - id->idata = & insn_table[t->type]; - id->attrs = CGEN_INSN_ATTRS (id->idata); - /* Oh my god, a magic number. */ - id->length = CGEN_INSN_BITSIZE (id->idata) / 8; - -#if WITH_PROFILE_MODEL_P - id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; - { - SIM_DESC sd = CPU_STATE (cpu); - SIM_ASSERT (t->index == id->timing->num); - } -#endif - - /* Semantic pointers are initialized elsewhere. */ -} - -/* Initialize the instruction descriptor table. */ - -void -sh64_media_init_idesc_table (SIM_CPU *cpu) -{ - IDESC *id,*tabend; - const struct insn_sem *t,*tend; - int tabsize = SH64_MEDIA_INSN_MAX; - IDESC *table = sh64_media_insn_data; - - memset (table, 0, tabsize * sizeof (IDESC)); - - /* First set all entries to the `invalid insn'. */ - t = & sh64_media_insn_sem_invalid; - for (id = table, tabend = table + tabsize; id < tabend; ++id) - init_idesc (cpu, id, t); - - /* Now fill in the values for the chosen cpu. */ - for (t = sh64_media_insn_sem, tend = t + sizeof (sh64_media_insn_sem) / sizeof (*t); - t != tend; ++t) - { - init_idesc (cpu, & table[t->index], t); - } - - /* Link the IDESC table into the cpu. */ - CPU_IDESC (cpu) = table; -} - -/* Given an instruction, return a pointer to its IDESC entry. */ - -const IDESC * -sh64_media_decode (SIM_CPU *current_cpu, IADDR pc, - CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn, - ARGBUF *abuf) -{ - /* Result of decoder. */ - SH64_MEDIA_INSN_TYPE itype; - - { - CGEN_INSN_INT insn = base_insn; - - { - unsigned int val = (((insn >> 22) & (63 << 4)) | ((insn >> 16) & (15 << 0))); - switch (val) - { - case 1 : itype = SH64_MEDIA_INSN_CMPEQ; goto extract_sfmt_add; case 3 : itype = SH64_MEDIA_INSN_CMPGT; goto extract_sfmt_add; case 7 : itype = SH64_MEDIA_INSN_CMPGTU; goto extract_sfmt_add; case 8 : itype = SH64_MEDIA_INSN_ADDL; goto extract_sfmt_add; case 9 : itype = SH64_MEDIA_INSN_ADD; goto extract_sfmt_add; case 10 : itype = SH64_MEDIA_INSN_SUBL; goto extract_sfmt_add; case 11 : itype = SH64_MEDIA_INSN_SUB; goto extract_sfmt_add; case 12 : itype = SH64_MEDIA_INSN_ADDZL; goto extract_sfmt_add; case 13 : itype = SH64_MEDIA_INSN_NSB; goto extract_sfmt_byterev; case 14 : itype = SH64_MEDIA_INSN_MULUL; goto extract_sfmt_add; case 15 : itype = SH64_MEDIA_INSN_BYTEREV; goto extract_sfmt_byterev; case 16 : itype = SH64_MEDIA_INSN_SHLLDL; goto extract_sfmt_add; case 17 : itype = SH64_MEDIA_INSN_SHLLD; goto extract_sfmt_add; case 18 : itype = SH64_MEDIA_INSN_SHLRDL; goto extract_sfmt_add; case 19 : itype = SH64_MEDIA_INSN_SHLRD; goto extract_sfmt_add; case 22 : itype = SH64_MEDIA_INSN_SHARDL; goto extract_sfmt_add; case 23 : itype = SH64_MEDIA_INSN_SHARD; goto extract_sfmt_add; case 25 : itype = SH64_MEDIA_INSN_OR; goto extract_sfmt_add; case 27 : itype = SH64_MEDIA_INSN_AND; goto extract_sfmt_add; case 29 : itype = SH64_MEDIA_INSN_XOR; goto extract_sfmt_add; case 30 : itype = SH64_MEDIA_INSN_MULSL; goto extract_sfmt_add; case 31 : itype = SH64_MEDIA_INSN_ANDC; goto extract_sfmt_add; case 33 : itype = SH64_MEDIA_INSN_MADDW; goto extract_sfmt_add; case 34 : itype = SH64_MEDIA_INSN_MADDL; goto extract_sfmt_add; case 36 : itype = SH64_MEDIA_INSN_MADDSUB; goto extract_sfmt_add; case 37 : itype = SH64_MEDIA_INSN_MADDSW; goto extract_sfmt_add; case 38 : itype = SH64_MEDIA_INSN_MADDSL; goto extract_sfmt_add; case 41 : itype = SH64_MEDIA_INSN_MSUBW; goto extract_sfmt_add; case 42 : itype = SH64_MEDIA_INSN_MSUBL; goto extract_sfmt_add; case 44 : itype = SH64_MEDIA_INSN_MSUBSUB; goto extract_sfmt_add; case 45 : itype = SH64_MEDIA_INSN_MSUBSW; goto extract_sfmt_add; case 46 : itype = SH64_MEDIA_INSN_MSUBSL; goto extract_sfmt_add; case 49 : itype = SH64_MEDIA_INSN_MSHLLDW; goto extract_sfmt_add; case 50 : itype = SH64_MEDIA_INSN_MSHLLDL; goto extract_sfmt_add; case 53 : itype = SH64_MEDIA_INSN_MSHALDSW; goto extract_sfmt_add; case 54 : itype = SH64_MEDIA_INSN_MSHALDSL; goto extract_sfmt_add; case 57 : itype = SH64_MEDIA_INSN_MSHARDW; goto extract_sfmt_add; case 58 : itype = SH64_MEDIA_INSN_MSHARDL; goto extract_sfmt_add; case 59 : itype = SH64_MEDIA_INSN_MSHARDSQ; goto extract_sfmt_add; case 61 : itype = SH64_MEDIA_INSN_MSHLRDW; goto extract_sfmt_add; case 62 : itype = SH64_MEDIA_INSN_MSHLRDL; goto extract_sfmt_add; case 86 : itype = SH64_MEDIA_INSN_FIPRS; goto extract_sfmt_fiprs; case 94 : itype = SH64_MEDIA_INSN_FTRVS; goto extract_sfmt_ftrvs; case 96 : itype = SH64_MEDIA_INSN_FABSS; goto extract_sfmt_fabss; case 97 : itype = SH64_MEDIA_INSN_FABSD; goto extract_sfmt_fabsd; case 98 : itype = SH64_MEDIA_INSN_FNEGS; goto extract_sfmt_fabss; case 99 : itype = SH64_MEDIA_INSN_FNEGD; goto extract_sfmt_fabsd; case 112 : itype = SH64_MEDIA_INSN_FMOVLS; goto extract_sfmt_fmovls; case 113 : itype = SH64_MEDIA_INSN_FMOVQD; goto extract_sfmt_fmovqd; case 114 : itype = SH64_MEDIA_INSN_FGETSCR; goto extract_sfmt_alloco; case 120 : itype = SH64_MEDIA_INSN_FLDXS; goto extract_sfmt_fldxs; case 121 : itype = SH64_MEDIA_INSN_FLDXD; goto extract_sfmt_fldxd; case 125 : itype = SH64_MEDIA_INSN_FLDXP; goto extract_sfmt_fldxp; case 129 : itype = SH64_MEDIA_INSN_CMVEQ; goto extract_sfmt_cmveq; case 131 : itype = SH64_MEDIA_INSN_SWAPQ; goto extract_sfmt_swapq; case 133 : itype = SH64_MEDIA_INSN_CMVNE; goto extract_sfmt_cmveq; case 159 : itype = SH64_MEDIA_INSN_GETCON; goto extract_sfmt_getcon; case 160 : itype = SH64_MEDIA_INSN_MCMPEQB; goto extract_sfmt_add; case 161 : itype = SH64_MEDIA_INSN_MCMPEQW; goto extract_sfmt_add; case 162 : itype = SH64_MEDIA_INSN_MCMPEQL; goto extract_sfmt_add; case 164 : itype = SH64_MEDIA_INSN_MCMPGTUB; goto extract_sfmt_add; case 165 : itype = SH64_MEDIA_INSN_MCMPGTW; goto extract_sfmt_add; case 166 : itype = SH64_MEDIA_INSN_MCMPGTL; goto extract_sfmt_add; case 167 : itype = SH64_MEDIA_INSN_MEXTR1; goto extract_sfmt_add; case 169 : itype = SH64_MEDIA_INSN_MABSW; goto extract_sfmt_byterev; case 170 : itype = SH64_MEDIA_INSN_MABSL; goto extract_sfmt_byterev; case 171 : itype = SH64_MEDIA_INSN_MEXTR2; goto extract_sfmt_add; case 173 : itype = SH64_MEDIA_INSN_MPERMW; goto extract_sfmt_mpermw; case 175 : itype = SH64_MEDIA_INSN_MEXTR3; goto extract_sfmt_add; case 176 : itype = SH64_MEDIA_INSN_MSHFLOB; goto extract_sfmt_add; case 177 : itype = SH64_MEDIA_INSN_MSHFLOW; goto extract_sfmt_add; case 178 : itype = SH64_MEDIA_INSN_MSHFLOL; goto extract_sfmt_add; case 179 : itype = SH64_MEDIA_INSN_MEXTR4; goto extract_sfmt_add; case 180 : itype = SH64_MEDIA_INSN_MSHFHIB; goto extract_sfmt_add; case 181 : itype = SH64_MEDIA_INSN_MSHFHIW; goto extract_sfmt_add; case 182 : itype = SH64_MEDIA_INSN_MSHFHIL; goto extract_sfmt_add; case 183 : itype = SH64_MEDIA_INSN_MEXTR5; goto extract_sfmt_add; case 187 : itype = SH64_MEDIA_INSN_MEXTR6; goto extract_sfmt_add; case 191 : itype = SH64_MEDIA_INSN_MEXTR7; goto extract_sfmt_add; case 192 : itype = SH64_MEDIA_INSN_FMOVSL; goto extract_sfmt_fmovsl; case 193 : itype = SH64_MEDIA_INSN_FMOVDQ; goto extract_sfmt_fmovdq; case 194 : itype = SH64_MEDIA_INSN_FPUTSCR; goto extract_sfmt_alloco; case 200 : itype = SH64_MEDIA_INSN_FCMPEQS; goto extract_sfmt_fcmpeqs; case 201 : itype = SH64_MEDIA_INSN_FCMPEQD; goto extract_sfmt_fcmpeqd; case 202 : itype = SH64_MEDIA_INSN_FCMPUNS; goto extract_sfmt_fcmpeqs; case 203 : itype = SH64_MEDIA_INSN_FCMPUND; goto extract_sfmt_fcmpeqd; case 204 : itype = SH64_MEDIA_INSN_FCMPGTS; goto extract_sfmt_fcmpeqs; case 205 : itype = SH64_MEDIA_INSN_FCMPGTD; goto extract_sfmt_fcmpeqd; case 206 : itype = SH64_MEDIA_INSN_FCMPGES; goto extract_sfmt_fcmpeqs; case 207 : itype = SH64_MEDIA_INSN_FCMPGED; goto extract_sfmt_fcmpeqd; case 208 : itype = SH64_MEDIA_INSN_FADDS; goto extract_sfmt_fadds; case 209 : itype = SH64_MEDIA_INSN_FADDD; goto extract_sfmt_faddd; case 210 : itype = SH64_MEDIA_INSN_FSUBS; goto extract_sfmt_fadds; case 211 : itype = SH64_MEDIA_INSN_FSUBD; goto extract_sfmt_faddd; case 212 : itype = SH64_MEDIA_INSN_FDIVS; goto extract_sfmt_fadds; case 213 : itype = SH64_MEDIA_INSN_FDIVD; goto extract_sfmt_faddd; case 214 : itype = SH64_MEDIA_INSN_FMULS; goto extract_sfmt_fadds; case 215 : itype = SH64_MEDIA_INSN_FMULD; goto extract_sfmt_faddd; case 222 : itype = SH64_MEDIA_INSN_FMACS; goto extract_sfmt_fmacs; case 224 : itype = SH64_MEDIA_INSN_FMOVS; goto extract_sfmt_fabss; case 225 : itype = SH64_MEDIA_INSN_FMOVD; goto extract_sfmt_fabsd; case 228 : itype = SH64_MEDIA_INSN_FSQRTS; goto extract_sfmt_fabss; case 229 : itype = SH64_MEDIA_INSN_FSQRTD; goto extract_sfmt_fabsd; case 230 : itype = SH64_MEDIA_INSN_FCNVSD; goto extract_sfmt_fcnvsd; case 231 : itype = SH64_MEDIA_INSN_FCNVDS; goto extract_sfmt_fcnvds; case 232 : itype = SH64_MEDIA_INSN_FTRCSL; goto extract_sfmt_fabss; case 233 : itype = SH64_MEDIA_INSN_FTRCDQ; goto extract_sfmt_fabsd; case 234 : itype = SH64_MEDIA_INSN_FTRCSQ; goto extract_sfmt_fcnvsd; case 235 : itype = SH64_MEDIA_INSN_FTRCDL; goto extract_sfmt_fcnvds; case 236 : itype = SH64_MEDIA_INSN_FLOATLS; goto extract_sfmt_fabss; case 237 : itype = SH64_MEDIA_INSN_FLOATQD; goto extract_sfmt_fabsd; case 238 : itype = SH64_MEDIA_INSN_FLOATLD; goto extract_sfmt_fcnvsd; case 239 : itype = SH64_MEDIA_INSN_FLOATQS; goto extract_sfmt_fcnvds; case 248 : itype = SH64_MEDIA_INSN_FSTXS; goto extract_sfmt_fstxs; case 249 : itype = SH64_MEDIA_INSN_FSTXD; goto extract_sfmt_fstxd; case 253 : itype = SH64_MEDIA_INSN_FSTXP; goto extract_sfmt_fstxp; case 256 : itype = SH64_MEDIA_INSN_LDXB; goto extract_sfmt_ldxb; case 257 : itype = SH64_MEDIA_INSN_LDXW; goto extract_sfmt_ldxb; case 258 : itype = SH64_MEDIA_INSN_LDXL; goto extract_sfmt_ldxb; case 259 : itype = SH64_MEDIA_INSN_LDXQ; goto extract_sfmt_ldxb; case 260 : itype = SH64_MEDIA_INSN_LDXUB; goto extract_sfmt_ldxb; case 261 : itype = SH64_MEDIA_INSN_LDXUW; goto extract_sfmt_ldxb; case 273 : itype = SH64_MEDIA_INSN_BLINK; goto extract_sfmt_blink; case 277 : itype = SH64_MEDIA_INSN_GETTR; goto extract_sfmt_gettr; case 288 : itype = SH64_MEDIA_INSN_MSADUBQ; goto extract_sfmt_mcmv; case 289 : itype = SH64_MEDIA_INSN_MMACFXWL; goto extract_sfmt_mcmv; case 291 : itype = SH64_MEDIA_INSN_MCMV; goto extract_sfmt_mcmv; case 293 : itype = SH64_MEDIA_INSN_MMACNFX_WL; goto extract_sfmt_mcmv; case 297 : itype = SH64_MEDIA_INSN_MMULSUMWQ; goto extract_sfmt_mcmv; case 305 : itype = SH64_MEDIA_INSN_MMULW; goto extract_sfmt_add; case 306 : itype = SH64_MEDIA_INSN_MMULL; goto extract_sfmt_add; case 309 : itype = SH64_MEDIA_INSN_MMULFXW; goto extract_sfmt_add; case 310 : itype = SH64_MEDIA_INSN_MMULFXL; goto extract_sfmt_add; case 312 : itype = SH64_MEDIA_INSN_MCNVSWB; goto extract_sfmt_add; case 313 : itype = SH64_MEDIA_INSN_MMULFXRPW; goto extract_sfmt_add; case 314 : itype = SH64_MEDIA_INSN_MMULLOWL; goto extract_sfmt_add; case 316 : itype = SH64_MEDIA_INSN_MCNVSWUB; goto extract_sfmt_add; case 317 : itype = SH64_MEDIA_INSN_MCNVSLW; goto extract_sfmt_add; case 318 : itype = SH64_MEDIA_INSN_MMULHIWL; goto extract_sfmt_add; case 384 : itype = SH64_MEDIA_INSN_STXB; goto extract_sfmt_stxb; case 385 : itype = SH64_MEDIA_INSN_STXW; goto extract_sfmt_stxb; case 386 : itype = SH64_MEDIA_INSN_STXL; goto extract_sfmt_stxb; case 387 : itype = SH64_MEDIA_INSN_STXQ; goto extract_sfmt_stxb; case 401 : itype = SH64_MEDIA_INSN_BEQ; goto extract_sfmt_beq; case 403 : itype = SH64_MEDIA_INSN_BGE; goto extract_sfmt_beq; case 405 : itype = SH64_MEDIA_INSN_BNE; goto extract_sfmt_beq; case 407 : itype = SH64_MEDIA_INSN_BGT; goto extract_sfmt_beq; case 411 : itype = SH64_MEDIA_INSN_BGEU; goto extract_sfmt_beq; case 415 : itype = SH64_MEDIA_INSN_BGTU; goto extract_sfmt_beq; case 417 : itype = SH64_MEDIA_INSN_PTABS; goto extract_sfmt_ptabs; case 421 : itype = SH64_MEDIA_INSN_PTREL; goto extract_sfmt_ptrel; case 432 : itype = SH64_MEDIA_INSN_NOP; goto extract_sfmt_alloco; case 433 : itype = SH64_MEDIA_INSN_TRAPA; goto extract_sfmt_trapa; case 434 : itype = SH64_MEDIA_INSN_SYNCI; goto extract_sfmt_alloco; case 435 : itype = SH64_MEDIA_INSN_RTE; goto extract_sfmt_alloco; case 437 : itype = SH64_MEDIA_INSN_BRK; goto extract_sfmt_brk; case 438 : itype = SH64_MEDIA_INSN_SYNCO; goto extract_sfmt_alloco; case 439 : itype = SH64_MEDIA_INSN_SLEEP; goto extract_sfmt_alloco; case 447 : itype = SH64_MEDIA_INSN_PUTCON; goto extract_sfmt_putcon; case 512 : /* fall through */ - case 513 : /* fall through */ - case 514 : /* fall through */ - case 515 : /* fall through */ - case 516 : /* fall through */ - case 517 : /* fall through */ - case 518 : /* fall through */ - case 519 : /* fall through */ - case 520 : /* fall through */ - case 521 : /* fall through */ - case 522 : /* fall through */ - case 523 : /* fall through */ - case 524 : /* fall through */ - case 525 : /* fall through */ - case 526 : /* fall through */ - case 527 : itype = SH64_MEDIA_INSN_LDB; goto extract_sfmt_ldb; case 528 : /* fall through */ - case 529 : /* fall through */ - case 530 : /* fall through */ - case 531 : /* fall through */ - case 532 : /* fall through */ - case 533 : /* fall through */ - case 534 : /* fall through */ - case 535 : /* fall through */ - case 536 : /* fall through */ - case 537 : /* fall through */ - case 538 : /* fall through */ - case 539 : /* fall through */ - case 540 : /* fall through */ - case 541 : /* fall through */ - case 542 : /* fall through */ - case 543 : itype = SH64_MEDIA_INSN_LDW; goto extract_sfmt_lduw; case 544 : /* fall through */ - case 545 : /* fall through */ - case 546 : /* fall through */ - case 547 : /* fall through */ - case 548 : /* fall through */ - case 549 : /* fall through */ - case 550 : /* fall through */ - case 551 : /* fall through */ - case 552 : /* fall through */ - case 553 : /* fall through */ - case 554 : /* fall through */ - case 555 : /* fall through */ - case 556 : /* fall through */ - case 557 : /* fall through */ - case 558 : /* fall through */ - case 559 : itype = SH64_MEDIA_INSN_LDL; goto extract_sfmt_ldl; case 560 : /* fall through */ - case 561 : /* fall through */ - case 562 : /* fall through */ - case 563 : /* fall through */ - case 564 : /* fall through */ - case 565 : /* fall through */ - case 566 : /* fall through */ - case 567 : /* fall through */ - case 568 : /* fall through */ - case 569 : /* fall through */ - case 570 : /* fall through */ - case 571 : /* fall through */ - case 572 : /* fall through */ - case 573 : /* fall through */ - case 574 : /* fall through */ - case 575 : itype = SH64_MEDIA_INSN_LDQ; goto extract_sfmt_ldq; case 576 : /* fall through */ - case 577 : /* fall through */ - case 578 : /* fall through */ - case 579 : /* fall through */ - case 580 : /* fall through */ - case 581 : /* fall through */ - case 582 : /* fall through */ - case 583 : /* fall through */ - case 584 : /* fall through */ - case 585 : /* fall through */ - case 586 : /* fall through */ - case 587 : /* fall through */ - case 588 : /* fall through */ - case 589 : /* fall through */ - case 590 : /* fall through */ - case 591 : itype = SH64_MEDIA_INSN_LDUB; goto extract_sfmt_ldb; case 592 : /* fall through */ - case 593 : /* fall through */ - case 594 : /* fall through */ - case 595 : /* fall through */ - case 596 : /* fall through */ - case 597 : /* fall through */ - case 598 : /* fall through */ - case 599 : /* fall through */ - case 600 : /* fall through */ - case 601 : /* fall through */ - case 602 : /* fall through */ - case 603 : /* fall through */ - case 604 : /* fall through */ - case 605 : /* fall through */ - case 606 : /* fall through */ - case 607 : itype = SH64_MEDIA_INSN_FLDS; goto extract_sfmt_flds; case 608 : /* fall through */ - case 609 : /* fall through */ - case 610 : /* fall through */ - case 611 : /* fall through */ - case 612 : /* fall through */ - case 613 : /* fall through */ - case 614 : /* fall through */ - case 615 : /* fall through */ - case 616 : /* fall through */ - case 617 : /* fall through */ - case 618 : /* fall through */ - case 619 : /* fall through */ - case 620 : /* fall through */ - case 621 : /* fall through */ - case 622 : /* fall through */ - case 623 : itype = SH64_MEDIA_INSN_FLDP; goto extract_sfmt_fldp; case 624 : /* fall through */ - case 625 : /* fall through */ - case 626 : /* fall through */ - case 627 : /* fall through */ - case 628 : /* fall through */ - case 629 : /* fall through */ - case 630 : /* fall through */ - case 631 : /* fall through */ - case 632 : /* fall through */ - case 633 : /* fall through */ - case 634 : /* fall through */ - case 635 : /* fall through */ - case 636 : /* fall through */ - case 637 : /* fall through */ - case 638 : /* fall through */ - case 639 : itype = SH64_MEDIA_INSN_FLDD; goto extract_sfmt_fldd; case 640 : /* fall through */ - case 641 : /* fall through */ - case 642 : /* fall through */ - case 643 : /* fall through */ - case 644 : /* fall through */ - case 645 : /* fall through */ - case 646 : /* fall through */ - case 647 : /* fall through */ - case 648 : /* fall through */ - case 649 : /* fall through */ - case 650 : /* fall through */ - case 651 : /* fall through */ - case 652 : /* fall through */ - case 653 : /* fall through */ - case 654 : /* fall through */ - case 655 : itype = SH64_MEDIA_INSN_STB; goto extract_sfmt_stb; case 656 : /* fall through */ - case 657 : /* fall through */ - case 658 : /* fall through */ - case 659 : /* fall through */ - case 660 : /* fall through */ - case 661 : /* fall through */ - case 662 : /* fall through */ - case 663 : /* fall through */ - case 664 : /* fall through */ - case 665 : /* fall through */ - case 666 : /* fall through */ - case 667 : /* fall through */ - case 668 : /* fall through */ - case 669 : /* fall through */ - case 670 : /* fall through */ - case 671 : itype = SH64_MEDIA_INSN_STW; goto extract_sfmt_stw; case 672 : /* fall through */ - case 673 : /* fall through */ - case 674 : /* fall through */ - case 675 : /* fall through */ - case 676 : /* fall through */ - case 677 : /* fall through */ - case 678 : /* fall through */ - case 679 : /* fall through */ - case 680 : /* fall through */ - case 681 : /* fall through */ - case 682 : /* fall through */ - case 683 : /* fall through */ - case 684 : /* fall through */ - case 685 : /* fall through */ - case 686 : /* fall through */ - case 687 : itype = SH64_MEDIA_INSN_STL; goto extract_sfmt_stl; case 688 : /* fall through */ - case 689 : /* fall through */ - case 690 : /* fall through */ - case 691 : /* fall through */ - case 692 : /* fall through */ - case 693 : /* fall through */ - case 694 : /* fall through */ - case 695 : /* fall through */ - case 696 : /* fall through */ - case 697 : /* fall through */ - case 698 : /* fall through */ - case 699 : /* fall through */ - case 700 : /* fall through */ - case 701 : /* fall through */ - case 702 : /* fall through */ - case 703 : itype = SH64_MEDIA_INSN_STQ; goto extract_sfmt_stq; case 704 : /* fall through */ - case 705 : /* fall through */ - case 706 : /* fall through */ - case 707 : /* fall through */ - case 708 : /* fall through */ - case 709 : /* fall through */ - case 710 : /* fall through */ - case 711 : /* fall through */ - case 712 : /* fall through */ - case 713 : /* fall through */ - case 714 : /* fall through */ - case 715 : /* fall through */ - case 716 : /* fall through */ - case 717 : /* fall through */ - case 718 : /* fall through */ - case 719 : itype = SH64_MEDIA_INSN_LDUW; goto extract_sfmt_lduw; case 720 : /* fall through */ - case 721 : /* fall through */ - case 722 : /* fall through */ - case 723 : /* fall through */ - case 724 : /* fall through */ - case 725 : /* fall through */ - case 726 : /* fall through */ - case 727 : /* fall through */ - case 728 : /* fall through */ - case 729 : /* fall through */ - case 730 : /* fall through */ - case 731 : /* fall through */ - case 732 : /* fall through */ - case 733 : /* fall through */ - case 734 : /* fall through */ - case 735 : itype = SH64_MEDIA_INSN_FSTS; goto extract_sfmt_fsts; case 736 : /* fall through */ - case 737 : /* fall through */ - case 738 : /* fall through */ - case 739 : /* fall through */ - case 740 : /* fall through */ - case 741 : /* fall through */ - case 742 : /* fall through */ - case 743 : /* fall through */ - case 744 : /* fall through */ - case 745 : /* fall through */ - case 746 : /* fall through */ - case 747 : /* fall through */ - case 748 : /* fall through */ - case 749 : /* fall through */ - case 750 : /* fall through */ - case 751 : itype = SH64_MEDIA_INSN_FSTP; goto extract_sfmt_fstp; case 752 : /* fall through */ - case 753 : /* fall through */ - case 754 : /* fall through */ - case 755 : /* fall through */ - case 756 : /* fall through */ - case 757 : /* fall through */ - case 758 : /* fall through */ - case 759 : /* fall through */ - case 760 : /* fall through */ - case 761 : /* fall through */ - case 762 : /* fall through */ - case 763 : /* fall through */ - case 764 : /* fall through */ - case 765 : /* fall through */ - case 766 : /* fall through */ - case 767 : itype = SH64_MEDIA_INSN_FSTD; goto extract_sfmt_fstd; case 770 : itype = SH64_MEDIA_INSN_LDLOL; goto extract_sfmt_alloco; case 771 : itype = SH64_MEDIA_INSN_LDLOQ; goto extract_sfmt_alloco; case 774 : itype = SH64_MEDIA_INSN_LDHIL; goto extract_sfmt_alloco; case 775 : itype = SH64_MEDIA_INSN_LDHIQ; goto extract_sfmt_alloco; case 783 : itype = SH64_MEDIA_INSN_GETCFG; goto extract_sfmt_alloco; case 784 : itype = SH64_MEDIA_INSN_SHLLIL; goto extract_sfmt_sharil; case 785 : itype = SH64_MEDIA_INSN_SHLLI; goto extract_sfmt_shari; case 786 : itype = SH64_MEDIA_INSN_SHLRIL; goto extract_sfmt_sharil; case 787 : itype = SH64_MEDIA_INSN_SHLRI; goto extract_sfmt_shari; case 790 : itype = SH64_MEDIA_INSN_SHARIL; goto extract_sfmt_sharil; case 791 : itype = SH64_MEDIA_INSN_SHARI; goto extract_sfmt_shari; case 797 : itype = SH64_MEDIA_INSN_XORI; goto extract_sfmt_xori; case 800 : /* fall through */ - case 801 : /* fall through */ - case 802 : /* fall through */ - case 803 : /* fall through */ - case 804 : /* fall through */ - case 805 : /* fall through */ - case 806 : /* fall through */ - case 807 : /* fall through */ - case 808 : /* fall through */ - case 809 : /* fall through */ - case 810 : /* fall through */ - case 811 : /* fall through */ - case 812 : /* fall through */ - case 813 : /* fall through */ - case 814 : /* fall through */ - case 815 : itype = SH64_MEDIA_INSN_SHORI; goto extract_sfmt_shori; case 816 : /* fall through */ - case 817 : /* fall through */ - case 818 : /* fall through */ - case 819 : /* fall through */ - case 820 : /* fall through */ - case 821 : /* fall through */ - case 822 : /* fall through */ - case 823 : /* fall through */ - case 824 : /* fall through */ - case 825 : /* fall through */ - case 826 : /* fall through */ - case 827 : /* fall through */ - case 828 : /* fall through */ - case 829 : /* fall through */ - case 830 : /* fall through */ - case 831 : itype = SH64_MEDIA_INSN_MOVI; goto extract_sfmt_movi; case 832 : /* fall through */ - case 833 : /* fall through */ - case 834 : /* fall through */ - case 835 : /* fall through */ - case 836 : /* fall through */ - case 837 : /* fall through */ - case 838 : /* fall through */ - case 839 : /* fall through */ - case 840 : /* fall through */ - case 841 : /* fall through */ - case 842 : /* fall through */ - case 843 : /* fall through */ - case 844 : /* fall through */ - case 845 : /* fall through */ - case 846 : /* fall through */ - case 847 : itype = SH64_MEDIA_INSN_ADDI; goto extract_sfmt_addi; case 848 : /* fall through */ - case 849 : /* fall through */ - case 850 : /* fall through */ - case 851 : /* fall through */ - case 852 : /* fall through */ - case 853 : /* fall through */ - case 854 : /* fall through */ - case 855 : /* fall through */ - case 856 : /* fall through */ - case 857 : /* fall through */ - case 858 : /* fall through */ - case 859 : /* fall through */ - case 860 : /* fall through */ - case 861 : /* fall through */ - case 862 : /* fall through */ - case 863 : itype = SH64_MEDIA_INSN_ADDIL; goto extract_sfmt_addi; case 864 : /* fall through */ - case 865 : /* fall through */ - case 866 : /* fall through */ - case 867 : /* fall through */ - case 868 : /* fall through */ - case 869 : /* fall through */ - case 870 : /* fall through */ - case 871 : /* fall through */ - case 872 : /* fall through */ - case 873 : /* fall through */ - case 874 : /* fall through */ - case 875 : /* fall through */ - case 876 : /* fall through */ - case 877 : /* fall through */ - case 878 : /* fall through */ - case 879 : itype = SH64_MEDIA_INSN_ANDI; goto extract_sfmt_addi; case 880 : /* fall through */ - case 881 : /* fall through */ - case 882 : /* fall through */ - case 883 : /* fall through */ - case 884 : /* fall through */ - case 885 : /* fall through */ - case 886 : /* fall through */ - case 887 : /* fall through */ - case 888 : /* fall through */ - case 889 : /* fall through */ - case 890 : /* fall through */ - case 891 : /* fall through */ - case 892 : /* fall through */ - case 893 : /* fall through */ - case 894 : /* fall through */ - case 895 : itype = SH64_MEDIA_INSN_ORI; goto extract_sfmt_ori; case 897 : itype = SH64_MEDIA_INSN_PREFI; goto extract_sfmt_alloco; case 898 : itype = SH64_MEDIA_INSN_STLOL; goto extract_sfmt_alloco; case 899 : itype = SH64_MEDIA_INSN_STLOQ; goto extract_sfmt_alloco; case 900 : itype = SH64_MEDIA_INSN_ALLOCO; goto extract_sfmt_alloco; case 901 : itype = SH64_MEDIA_INSN_ICBI; goto extract_sfmt_alloco; case 902 : itype = SH64_MEDIA_INSN_STHIL; goto extract_sfmt_sthil; case 903 : itype = SH64_MEDIA_INSN_STHIQ; goto extract_sfmt_sthil; case 904 : itype = SH64_MEDIA_INSN_OCBP; goto extract_sfmt_alloco; case 905 : itype = SH64_MEDIA_INSN_OCBI; goto extract_sfmt_alloco; case 908 : itype = SH64_MEDIA_INSN_OCBWB; goto extract_sfmt_alloco; case 911 : itype = SH64_MEDIA_INSN_PUTCFG; goto extract_sfmt_alloco; case 913 : itype = SH64_MEDIA_INSN_BEQI; goto extract_sfmt_beqi; case 917 : itype = SH64_MEDIA_INSN_BNEI; goto extract_sfmt_beqi; case 928 : /* fall through */ - case 929 : /* fall through */ - case 930 : /* fall through */ - case 931 : /* fall through */ - case 932 : /* fall through */ - case 933 : /* fall through */ - case 934 : /* fall through */ - case 935 : /* fall through */ - case 936 : /* fall through */ - case 937 : /* fall through */ - case 938 : /* fall through */ - case 939 : /* fall through */ - case 940 : /* fall through */ - case 941 : /* fall through */ - case 942 : /* fall through */ - case 943 : itype = SH64_MEDIA_INSN_PTA; goto extract_sfmt_pta; case 944 : /* fall through */ - case 945 : /* fall through */ - case 946 : /* fall through */ - case 947 : /* fall through */ - case 948 : /* fall through */ - case 949 : /* fall through */ - case 950 : /* fall through */ - case 951 : /* fall through */ - case 952 : /* fall through */ - case 953 : /* fall through */ - case 954 : /* fall through */ - case 955 : /* fall through */ - case 956 : /* fall through */ - case 957 : /* fall through */ - case 958 : /* fall through */ - case 959 : itype = SH64_MEDIA_INSN_PTB; goto extract_sfmt_pta; default : itype = SH64_MEDIA_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - } - - /* The instruction has been decoded, now extract the fields. */ - - extract_sfmt_empty: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_add: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_left; - UINT f_right; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_left) = f_left; - FLD (f_right) = f_right; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_addi: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_addi.f - UINT f_left; - INT f_disp10; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_disp10 = EXTRACT_LSB0_INT (insn, 32, 19, 10); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_disp10) = f_disp10; - FLD (f_left) = f_left; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_disp10 0x%x", 'x', f_disp10, "f_left 0x%x", 'x', f_left, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_alloco: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_alloco", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_beq: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_beq.f - UINT f_left; - UINT f_right; - UINT f_tra; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_tra = EXTRACT_LSB0_UINT (insn, 32, 6, 3); - - /* Record the fields for the semantic handler. */ - FLD (f_left) = f_left; - FLD (f_right) = f_right; - FLD (f_tra) = f_tra; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beq", "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, "f_tra 0x%x", 'x', f_tra, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_beqi: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_beqi.f - UINT f_left; - INT f_imm6; - UINT f_tra; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_imm6 = EXTRACT_LSB0_INT (insn, 32, 15, 6); - f_tra = EXTRACT_LSB0_UINT (insn, 32, 6, 3); - - /* Record the fields for the semantic handler. */ - FLD (f_imm6) = f_imm6; - FLD (f_left) = f_left; - FLD (f_tra) = f_tra; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqi", "f_imm6 0x%x", 'x', f_imm6, "f_left 0x%x", 'x', f_left, "f_tra 0x%x", 'x', f_tra, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_blink: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_blink.f - UINT f_trb; - UINT f_dest; - - f_trb = EXTRACT_LSB0_UINT (insn, 32, 22, 3); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_trb) = f_trb; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_blink", "f_trb 0x%x", 'x', f_trb, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_brk: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_brk", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_byterev: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_xori.f - UINT f_left; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_left) = f_left; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_byterev", "f_left 0x%x", 'x', f_left, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_cmveq: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_left; - UINT f_right; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_left) = f_left; - FLD (f_right) = f_right; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmveq", "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fabsd: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_fabsd.f - UINT f_left; - UINT f_right; - UINT f_dest; - UINT f_left_right; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - f_left_right = f_left; - - /* Record the fields for the semantic handler. */ - FLD (f_left_right) = f_left_right; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fabsd", "f_left_right 0x%x", 'x', f_left_right, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fabss: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_fabsd.f - UINT f_left; - UINT f_right; - UINT f_dest; - UINT f_left_right; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - f_left_right = f_left; - - /* Record the fields for the semantic handler. */ - FLD (f_left_right) = f_left_right; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fabss", "f_left_right 0x%x", 'x', f_left_right, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_faddd: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_left; - UINT f_right; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_left) = f_left; - FLD (f_right) = f_right; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_faddd", "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fadds: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_left; - UINT f_right; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_left) = f_left; - FLD (f_right) = f_right; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fadds", "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fcmpeqd: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_left; - UINT f_right; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_left) = f_left; - FLD (f_right) = f_right; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fcmpeqd", "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fcmpeqs: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_left; - UINT f_right; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_left) = f_left; - FLD (f_right) = f_right; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fcmpeqs", "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fcnvds: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_fabsd.f - UINT f_left; - UINT f_right; - UINT f_dest; - UINT f_left_right; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - f_left_right = f_left; - - /* Record the fields for the semantic handler. */ - FLD (f_left_right) = f_left_right; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fcnvds", "f_left_right 0x%x", 'x', f_left_right, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fcnvsd: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_fabsd.f - UINT f_left; - UINT f_right; - UINT f_dest; - UINT f_left_right; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - f_left_right = f_left; - - /* Record the fields for the semantic handler. */ - FLD (f_left_right) = f_left_right; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fcnvsd", "f_left_right 0x%x", 'x', f_left_right, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fiprs: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_left; - UINT f_right; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_left) = f_left; - FLD (f_right) = f_right; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fiprs", "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fldd: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_fldd.f - UINT f_left; - SI f_disp10x8; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_disp10x8 = ((EXTRACT_LSB0_INT (insn, 32, 19, 10)) << (3)); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_disp10x8) = f_disp10x8; - FLD (f_left) = f_left; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fldd", "f_disp10x8 0x%x", 'x', f_disp10x8, "f_left 0x%x", 'x', f_left, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fldp: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_fldd.f - UINT f_left; - SI f_disp10x8; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_disp10x8 = ((EXTRACT_LSB0_INT (insn, 32, 19, 10)) << (3)); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_disp10x8) = f_disp10x8; - FLD (f_dest) = f_dest; - FLD (f_left) = f_left; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fldp", "f_disp10x8 0x%x", 'x', f_disp10x8, "f_dest 0x%x", 'x', f_dest, "f_left 0x%x", 'x', f_left, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_flds: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_flds.f - UINT f_left; - SI f_disp10x4; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_disp10x4 = ((EXTRACT_LSB0_INT (insn, 32, 19, 10)) << (2)); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_disp10x4) = f_disp10x4; - FLD (f_left) = f_left; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_flds", "f_disp10x4 0x%x", 'x', f_disp10x4, "f_left 0x%x", 'x', f_left, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fldxd: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_left; - UINT f_right; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_left) = f_left; - FLD (f_right) = f_right; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fldxd", "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fldxp: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_left; - UINT f_right; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_dest) = f_dest; - FLD (f_left) = f_left; - FLD (f_right) = f_right; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fldxp", "f_dest 0x%x", 'x', f_dest, "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fldxs: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_left; - UINT f_right; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_left) = f_left; - FLD (f_right) = f_right; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fldxs", "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fmacs: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_left; - UINT f_right; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_dest) = f_dest; - FLD (f_left) = f_left; - FLD (f_right) = f_right; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fmacs", "f_dest 0x%x", 'x', f_dest, "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fmovdq: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_fabsd.f - UINT f_left; - UINT f_right; - UINT f_dest; - UINT f_left_right; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - f_left_right = f_left; - - /* Record the fields for the semantic handler. */ - FLD (f_left_right) = f_left_right; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fmovdq", "f_left_right 0x%x", 'x', f_left_right, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fmovls: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_xori.f - UINT f_left; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_left) = f_left; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fmovls", "f_left 0x%x", 'x', f_left, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fmovqd: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_xori.f - UINT f_left; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_left) = f_left; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fmovqd", "f_left 0x%x", 'x', f_left, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fmovsl: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_fabsd.f - UINT f_left; - UINT f_right; - UINT f_dest; - UINT f_left_right; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - f_left_right = f_left; - - /* Record the fields for the semantic handler. */ - FLD (f_left_right) = f_left_right; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fmovsl", "f_left_right 0x%x", 'x', f_left_right, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fstd: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_fldd.f - UINT f_left; - SI f_disp10x8; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_disp10x8 = ((EXTRACT_LSB0_INT (insn, 32, 19, 10)) << (3)); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_disp10x8) = f_disp10x8; - FLD (f_dest) = f_dest; - FLD (f_left) = f_left; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fstd", "f_disp10x8 0x%x", 'x', f_disp10x8, "f_dest 0x%x", 'x', f_dest, "f_left 0x%x", 'x', f_left, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fstp: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_fldd.f - UINT f_left; - SI f_disp10x8; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_disp10x8 = ((EXTRACT_LSB0_INT (insn, 32, 19, 10)) << (3)); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_disp10x8) = f_disp10x8; - FLD (f_dest) = f_dest; - FLD (f_left) = f_left; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fstp", "f_disp10x8 0x%x", 'x', f_disp10x8, "f_dest 0x%x", 'x', f_dest, "f_left 0x%x", 'x', f_left, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fsts: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_flds.f - UINT f_left; - SI f_disp10x4; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_disp10x4 = ((EXTRACT_LSB0_INT (insn, 32, 19, 10)) << (2)); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_disp10x4) = f_disp10x4; - FLD (f_dest) = f_dest; - FLD (f_left) = f_left; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fsts", "f_disp10x4 0x%x", 'x', f_disp10x4, "f_dest 0x%x", 'x', f_dest, "f_left 0x%x", 'x', f_left, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fstxd: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_left; - UINT f_right; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_dest) = f_dest; - FLD (f_left) = f_left; - FLD (f_right) = f_right; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fstxd", "f_dest 0x%x", 'x', f_dest, "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fstxp: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_left; - UINT f_right; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_dest) = f_dest; - FLD (f_left) = f_left; - FLD (f_right) = f_right; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fstxp", "f_dest 0x%x", 'x', f_dest, "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_fstxs: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_left; - UINT f_right; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_dest) = f_dest; - FLD (f_left) = f_left; - FLD (f_right) = f_right; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fstxs", "f_dest 0x%x", 'x', f_dest, "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_ftrvs: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_left; - UINT f_right; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_dest) = f_dest; - FLD (f_left) = f_left; - FLD (f_right) = f_right; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ftrvs", "f_dest 0x%x", 'x', f_dest, "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_getcon: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_xori.f - UINT f_left; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_left) = f_left; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_getcon", "f_left 0x%x", 'x', f_left, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_gettr: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_blink.f - UINT f_trb; - UINT f_dest; - - f_trb = EXTRACT_LSB0_UINT (insn, 32, 22, 3); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_trb) = f_trb; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_gettr", "f_trb 0x%x", 'x', f_trb, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_ldb: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_addi.f - UINT f_left; - INT f_disp10; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_disp10 = EXTRACT_LSB0_INT (insn, 32, 19, 10); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_disp10) = f_disp10; - FLD (f_left) = f_left; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb", "f_disp10 0x%x", 'x', f_disp10, "f_left 0x%x", 'x', f_left, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_ldl: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_flds.f - UINT f_left; - SI f_disp10x4; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_disp10x4 = ((EXTRACT_LSB0_INT (insn, 32, 19, 10)) << (2)); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_disp10x4) = f_disp10x4; - FLD (f_left) = f_left; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl", "f_disp10x4 0x%x", 'x', f_disp10x4, "f_left 0x%x", 'x', f_left, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_ldq: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_fldd.f - UINT f_left; - SI f_disp10x8; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_disp10x8 = ((EXTRACT_LSB0_INT (insn, 32, 19, 10)) << (3)); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_disp10x8) = f_disp10x8; - FLD (f_left) = f_left; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq", "f_disp10x8 0x%x", 'x', f_disp10x8, "f_left 0x%x", 'x', f_left, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_lduw: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_lduw.f - UINT f_left; - SI f_disp10x2; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_disp10x2 = ((EXTRACT_LSB0_INT (insn, 32, 19, 10)) << (1)); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_disp10x2) = f_disp10x2; - FLD (f_left) = f_left; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lduw", "f_disp10x2 0x%x", 'x', f_disp10x2, "f_left 0x%x", 'x', f_left, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_ldxb: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_left; - UINT f_right; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_left) = f_left; - FLD (f_right) = f_right; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldxb", "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_mcmv: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_left; - UINT f_right; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_dest) = f_dest; - FLD (f_left) = f_left; - FLD (f_right) = f_right; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mcmv", "f_dest 0x%x", 'x', f_dest, "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_movi: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_movi.f - INT f_imm16; - UINT f_dest; - - f_imm16 = EXTRACT_LSB0_INT (insn, 32, 25, 16); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_imm16) = f_imm16; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movi", "f_imm16 0x%x", 'x', f_imm16, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_mpermw: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_left; - UINT f_right; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_left) = f_left; - FLD (f_right) = f_right; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mpermw", "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_ori: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ori.f - UINT f_left; - INT f_imm10; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_imm10 = EXTRACT_LSB0_INT (insn, 32, 19, 10); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_imm10) = f_imm10; - FLD (f_left) = f_left; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ori", "f_imm10 0x%x", 'x', f_imm10, "f_left 0x%x", 'x', f_left, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_pta: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_pta.f - DI f_disp16; - UINT f_tra; - - f_disp16 = ((((EXTRACT_LSB0_INT (insn, 32, 25, 16)) << (2))) + (pc)); - f_tra = EXTRACT_LSB0_UINT (insn, 32, 6, 3); - - /* Record the fields for the semantic handler. */ - FLD (f_disp16) = f_disp16; - FLD (f_tra) = f_tra; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_pta", "f_disp16 0x%x", 'x', f_disp16, "f_tra 0x%x", 'x', f_tra, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_ptabs: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_beq.f - UINT f_right; - UINT f_tra; - - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_tra = EXTRACT_LSB0_UINT (insn, 32, 6, 3); - - /* Record the fields for the semantic handler. */ - FLD (f_right) = f_right; - FLD (f_tra) = f_tra; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ptabs", "f_right 0x%x", 'x', f_right, "f_tra 0x%x", 'x', f_tra, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_ptrel: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_beq.f - UINT f_right; - UINT f_tra; - - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_tra = EXTRACT_LSB0_UINT (insn, 32, 6, 3); - - /* Record the fields for the semantic handler. */ - FLD (f_right) = f_right; - FLD (f_tra) = f_tra; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ptrel", "f_right 0x%x", 'x', f_right, "f_tra 0x%x", 'x', f_tra, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_putcon: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_xori.f - UINT f_left; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_left) = f_left; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_putcon", "f_left 0x%x", 'x', f_left, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_shari: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_shari.f - UINT f_left; - UINT f_uimm6; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_uimm6 = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_left) = f_left; - FLD (f_uimm6) = f_uimm6; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shari", "f_left 0x%x", 'x', f_left, "f_uimm6 0x%x", 'x', f_uimm6, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_sharil: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_shari.f - UINT f_left; - UINT f_uimm6; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_uimm6 = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_left) = f_left; - FLD (f_uimm6) = f_uimm6; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sharil", "f_left 0x%x", 'x', f_left, "f_uimm6 0x%x", 'x', f_uimm6, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_shori: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_shori.f - UINT f_uimm16; - UINT f_dest; - - f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 25, 16); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_dest) = f_dest; - FLD (f_uimm16) = f_uimm16; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shori", "f_dest 0x%x", 'x', f_dest, "f_uimm16 0x%x", 'x', f_uimm16, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_stb: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_addi.f - UINT f_left; - INT f_disp10; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_disp10 = EXTRACT_LSB0_INT (insn, 32, 19, 10); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_disp10) = f_disp10; - FLD (f_dest) = f_dest; - FLD (f_left) = f_left; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "f_disp10 0x%x", 'x', f_disp10, "f_dest 0x%x", 'x', f_dest, "f_left 0x%x", 'x', f_left, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_stl: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_flds.f - UINT f_left; - SI f_disp10x4; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_disp10x4 = ((EXTRACT_LSB0_INT (insn, 32, 19, 10)) << (2)); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_disp10x4) = f_disp10x4; - FLD (f_dest) = f_dest; - FLD (f_left) = f_left; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl", "f_disp10x4 0x%x", 'x', f_disp10x4, "f_dest 0x%x", 'x', f_dest, "f_left 0x%x", 'x', f_left, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_stq: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_fldd.f - UINT f_left; - SI f_disp10x8; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_disp10x8 = ((EXTRACT_LSB0_INT (insn, 32, 19, 10)) << (3)); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_disp10x8) = f_disp10x8; - FLD (f_dest) = f_dest; - FLD (f_left) = f_left; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq", "f_disp10x8 0x%x", 'x', f_disp10x8, "f_dest 0x%x", 'x', f_dest, "f_left 0x%x", 'x', f_left, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_stw: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_lduw.f - UINT f_left; - SI f_disp10x2; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_disp10x2 = ((EXTRACT_LSB0_INT (insn, 32, 19, 10)) << (1)); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_disp10x2) = f_disp10x2; - FLD (f_dest) = f_dest; - FLD (f_left) = f_left; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stw", "f_disp10x2 0x%x", 'x', f_disp10x2, "f_dest 0x%x", 'x', f_dest, "f_left 0x%x", 'x', f_left, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_sthil: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_sthil.f - UINT f_left; - INT f_disp6; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_disp6 = EXTRACT_LSB0_INT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_disp6) = f_disp6; - FLD (f_dest) = f_dest; - FLD (f_left) = f_left; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sthil", "f_disp6 0x%x", 'x', f_disp6, "f_dest 0x%x", 'x', f_dest, "f_left 0x%x", 'x', f_left, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_stxb: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_left; - UINT f_right; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_dest) = f_dest; - FLD (f_left) = f_left; - FLD (f_right) = f_right; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stxb", "f_dest 0x%x", 'x', f_dest, "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_swapq: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_left; - UINT f_right; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_dest) = f_dest; - FLD (f_left) = f_left; - FLD (f_right) = f_right; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_swapq", "f_dest 0x%x", 'x', f_dest, "f_left 0x%x", 'x', f_left, "f_right 0x%x", 'x', f_right, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_trapa: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_xori.f - UINT f_left; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_left) = f_left; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_trapa", "f_left 0x%x", 'x', f_left, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_xori: - { - const IDESC *idesc = &sh64_media_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_xori.f - UINT f_left; - INT f_imm6; - UINT f_dest; - - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); - f_imm6 = EXTRACT_LSB0_INT (insn, 32, 15, 6); - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); - - /* Record the fields for the semantic handler. */ - FLD (f_imm6) = f_imm6; - FLD (f_left) = f_left; - FLD (f_dest) = f_dest; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_xori", "f_imm6 0x%x", 'x', f_imm6, "f_left 0x%x", 'x', f_left, "f_dest 0x%x", 'x', f_dest, (char *) 0)); - -#undef FLD - return idesc; - } - -} diff --git a/sim/sh64/decode-media.h b/sim/sh64/decode-media.h deleted file mode 100644 index 8a84d4e6fe1..00000000000 --- a/sim/sh64/decode-media.h +++ /dev/null @@ -1,122 +0,0 @@ -/* Decode header for sh64_media. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef SH64_MEDIA_DECODE_H -#define SH64_MEDIA_DECODE_H - -extern const IDESC *sh64_media_decode (SIM_CPU *, IADDR, - CGEN_INSN_INT, CGEN_INSN_INT, - ARGBUF *); -extern void sh64_media_init_idesc_table (SIM_CPU *); -extern void sh64_media_sem_init_idesc_table (SIM_CPU *); -extern void sh64_media_semf_init_idesc_table (SIM_CPU *); - -/* Enum declaration for instructions in cpu family sh64. */ -typedef enum sh64_media_insn_type { - SH64_MEDIA_INSN_X_INVALID, SH64_MEDIA_INSN_X_AFTER, SH64_MEDIA_INSN_X_BEFORE, SH64_MEDIA_INSN_X_CTI_CHAIN - , SH64_MEDIA_INSN_X_CHAIN, SH64_MEDIA_INSN_X_BEGIN, SH64_MEDIA_INSN_ADD, SH64_MEDIA_INSN_ADDL - , SH64_MEDIA_INSN_ADDI, SH64_MEDIA_INSN_ADDIL, SH64_MEDIA_INSN_ADDZL, SH64_MEDIA_INSN_ALLOCO - , SH64_MEDIA_INSN_AND, SH64_MEDIA_INSN_ANDC, SH64_MEDIA_INSN_ANDI, SH64_MEDIA_INSN_BEQ - , SH64_MEDIA_INSN_BEQI, SH64_MEDIA_INSN_BGE, SH64_MEDIA_INSN_BGEU, SH64_MEDIA_INSN_BGT - , SH64_MEDIA_INSN_BGTU, SH64_MEDIA_INSN_BLINK, SH64_MEDIA_INSN_BNE, SH64_MEDIA_INSN_BNEI - , SH64_MEDIA_INSN_BRK, SH64_MEDIA_INSN_BYTEREV, SH64_MEDIA_INSN_CMPEQ, SH64_MEDIA_INSN_CMPGT - , SH64_MEDIA_INSN_CMPGTU, SH64_MEDIA_INSN_CMVEQ, SH64_MEDIA_INSN_CMVNE, SH64_MEDIA_INSN_FABSD - , SH64_MEDIA_INSN_FABSS, SH64_MEDIA_INSN_FADDD, SH64_MEDIA_INSN_FADDS, SH64_MEDIA_INSN_FCMPEQD - , SH64_MEDIA_INSN_FCMPEQS, SH64_MEDIA_INSN_FCMPGED, SH64_MEDIA_INSN_FCMPGES, SH64_MEDIA_INSN_FCMPGTD - , SH64_MEDIA_INSN_FCMPGTS, SH64_MEDIA_INSN_FCMPUND, SH64_MEDIA_INSN_FCMPUNS, SH64_MEDIA_INSN_FCNVDS - , SH64_MEDIA_INSN_FCNVSD, SH64_MEDIA_INSN_FDIVD, SH64_MEDIA_INSN_FDIVS, SH64_MEDIA_INSN_FGETSCR - , SH64_MEDIA_INSN_FIPRS, SH64_MEDIA_INSN_FLDD, SH64_MEDIA_INSN_FLDP, SH64_MEDIA_INSN_FLDS - , SH64_MEDIA_INSN_FLDXD, SH64_MEDIA_INSN_FLDXP, SH64_MEDIA_INSN_FLDXS, SH64_MEDIA_INSN_FLOATLD - , SH64_MEDIA_INSN_FLOATLS, SH64_MEDIA_INSN_FLOATQD, SH64_MEDIA_INSN_FLOATQS, SH64_MEDIA_INSN_FMACS - , SH64_MEDIA_INSN_FMOVD, SH64_MEDIA_INSN_FMOVDQ, SH64_MEDIA_INSN_FMOVLS, SH64_MEDIA_INSN_FMOVQD - , SH64_MEDIA_INSN_FMOVS, SH64_MEDIA_INSN_FMOVSL, SH64_MEDIA_INSN_FMULD, SH64_MEDIA_INSN_FMULS - , SH64_MEDIA_INSN_FNEGD, SH64_MEDIA_INSN_FNEGS, SH64_MEDIA_INSN_FPUTSCR, SH64_MEDIA_INSN_FSQRTD - , SH64_MEDIA_INSN_FSQRTS, SH64_MEDIA_INSN_FSTD, SH64_MEDIA_INSN_FSTP, SH64_MEDIA_INSN_FSTS - , SH64_MEDIA_INSN_FSTXD, SH64_MEDIA_INSN_FSTXP, SH64_MEDIA_INSN_FSTXS, SH64_MEDIA_INSN_FSUBD - , SH64_MEDIA_INSN_FSUBS, SH64_MEDIA_INSN_FTRCDL, SH64_MEDIA_INSN_FTRCSL, SH64_MEDIA_INSN_FTRCDQ - , SH64_MEDIA_INSN_FTRCSQ, SH64_MEDIA_INSN_FTRVS, SH64_MEDIA_INSN_GETCFG, SH64_MEDIA_INSN_GETCON - , SH64_MEDIA_INSN_GETTR, SH64_MEDIA_INSN_ICBI, SH64_MEDIA_INSN_LDB, SH64_MEDIA_INSN_LDL - , SH64_MEDIA_INSN_LDQ, SH64_MEDIA_INSN_LDUB, SH64_MEDIA_INSN_LDUW, SH64_MEDIA_INSN_LDW - , SH64_MEDIA_INSN_LDHIL, SH64_MEDIA_INSN_LDHIQ, SH64_MEDIA_INSN_LDLOL, SH64_MEDIA_INSN_LDLOQ - , SH64_MEDIA_INSN_LDXB, SH64_MEDIA_INSN_LDXL, SH64_MEDIA_INSN_LDXQ, SH64_MEDIA_INSN_LDXUB - , SH64_MEDIA_INSN_LDXUW, SH64_MEDIA_INSN_LDXW, SH64_MEDIA_INSN_MABSL, SH64_MEDIA_INSN_MABSW - , SH64_MEDIA_INSN_MADDL, SH64_MEDIA_INSN_MADDW, SH64_MEDIA_INSN_MADDSL, SH64_MEDIA_INSN_MADDSUB - , SH64_MEDIA_INSN_MADDSW, SH64_MEDIA_INSN_MCMPEQB, SH64_MEDIA_INSN_MCMPEQL, SH64_MEDIA_INSN_MCMPEQW - , SH64_MEDIA_INSN_MCMPGTL, SH64_MEDIA_INSN_MCMPGTUB, SH64_MEDIA_INSN_MCMPGTW, SH64_MEDIA_INSN_MCMV - , SH64_MEDIA_INSN_MCNVSLW, SH64_MEDIA_INSN_MCNVSWB, SH64_MEDIA_INSN_MCNVSWUB, SH64_MEDIA_INSN_MEXTR1 - , SH64_MEDIA_INSN_MEXTR2, SH64_MEDIA_INSN_MEXTR3, SH64_MEDIA_INSN_MEXTR4, SH64_MEDIA_INSN_MEXTR5 - , SH64_MEDIA_INSN_MEXTR6, SH64_MEDIA_INSN_MEXTR7, SH64_MEDIA_INSN_MMACFXWL, SH64_MEDIA_INSN_MMACNFX_WL - , SH64_MEDIA_INSN_MMULL, SH64_MEDIA_INSN_MMULW, SH64_MEDIA_INSN_MMULFXL, SH64_MEDIA_INSN_MMULFXW - , SH64_MEDIA_INSN_MMULFXRPW, SH64_MEDIA_INSN_MMULHIWL, SH64_MEDIA_INSN_MMULLOWL, SH64_MEDIA_INSN_MMULSUMWQ - , SH64_MEDIA_INSN_MOVI, SH64_MEDIA_INSN_MPERMW, SH64_MEDIA_INSN_MSADUBQ, SH64_MEDIA_INSN_MSHALDSL - , SH64_MEDIA_INSN_MSHALDSW, SH64_MEDIA_INSN_MSHARDL, SH64_MEDIA_INSN_MSHARDW, SH64_MEDIA_INSN_MSHARDSQ - , SH64_MEDIA_INSN_MSHFHIB, SH64_MEDIA_INSN_MSHFHIL, SH64_MEDIA_INSN_MSHFHIW, SH64_MEDIA_INSN_MSHFLOB - , SH64_MEDIA_INSN_MSHFLOL, SH64_MEDIA_INSN_MSHFLOW, SH64_MEDIA_INSN_MSHLLDL, SH64_MEDIA_INSN_MSHLLDW - , SH64_MEDIA_INSN_MSHLRDL, SH64_MEDIA_INSN_MSHLRDW, SH64_MEDIA_INSN_MSUBL, SH64_MEDIA_INSN_MSUBW - , SH64_MEDIA_INSN_MSUBSL, SH64_MEDIA_INSN_MSUBSUB, SH64_MEDIA_INSN_MSUBSW, SH64_MEDIA_INSN_MULSL - , SH64_MEDIA_INSN_MULUL, SH64_MEDIA_INSN_NOP, SH64_MEDIA_INSN_NSB, SH64_MEDIA_INSN_OCBI - , SH64_MEDIA_INSN_OCBP, SH64_MEDIA_INSN_OCBWB, SH64_MEDIA_INSN_OR, SH64_MEDIA_INSN_ORI - , SH64_MEDIA_INSN_PREFI, SH64_MEDIA_INSN_PTA, SH64_MEDIA_INSN_PTABS, SH64_MEDIA_INSN_PTB - , SH64_MEDIA_INSN_PTREL, SH64_MEDIA_INSN_PUTCFG, SH64_MEDIA_INSN_PUTCON, SH64_MEDIA_INSN_RTE - , SH64_MEDIA_INSN_SHARD, SH64_MEDIA_INSN_SHARDL, SH64_MEDIA_INSN_SHARI, SH64_MEDIA_INSN_SHARIL - , SH64_MEDIA_INSN_SHLLD, SH64_MEDIA_INSN_SHLLDL, SH64_MEDIA_INSN_SHLLI, SH64_MEDIA_INSN_SHLLIL - , SH64_MEDIA_INSN_SHLRD, SH64_MEDIA_INSN_SHLRDL, SH64_MEDIA_INSN_SHLRI, SH64_MEDIA_INSN_SHLRIL - , SH64_MEDIA_INSN_SHORI, SH64_MEDIA_INSN_SLEEP, SH64_MEDIA_INSN_STB, SH64_MEDIA_INSN_STL - , SH64_MEDIA_INSN_STQ, SH64_MEDIA_INSN_STW, SH64_MEDIA_INSN_STHIL, SH64_MEDIA_INSN_STHIQ - , SH64_MEDIA_INSN_STLOL, SH64_MEDIA_INSN_STLOQ, SH64_MEDIA_INSN_STXB, SH64_MEDIA_INSN_STXL - , SH64_MEDIA_INSN_STXQ, SH64_MEDIA_INSN_STXW, SH64_MEDIA_INSN_SUB, SH64_MEDIA_INSN_SUBL - , SH64_MEDIA_INSN_SWAPQ, SH64_MEDIA_INSN_SYNCI, SH64_MEDIA_INSN_SYNCO, SH64_MEDIA_INSN_TRAPA - , SH64_MEDIA_INSN_XOR, SH64_MEDIA_INSN_XORI, SH64_MEDIA_INSN_MAX -} SH64_MEDIA_INSN_TYPE; - -/* Enum declaration for semantic formats in cpu family sh64. */ -typedef enum sh64_media_sfmt_type { - SH64_MEDIA_SFMT_EMPTY, SH64_MEDIA_SFMT_ADD, SH64_MEDIA_SFMT_ADDI, SH64_MEDIA_SFMT_ALLOCO - , SH64_MEDIA_SFMT_BEQ, SH64_MEDIA_SFMT_BEQI, SH64_MEDIA_SFMT_BLINK, SH64_MEDIA_SFMT_BRK - , SH64_MEDIA_SFMT_BYTEREV, SH64_MEDIA_SFMT_CMVEQ, SH64_MEDIA_SFMT_FABSD, SH64_MEDIA_SFMT_FABSS - , SH64_MEDIA_SFMT_FADDD, SH64_MEDIA_SFMT_FADDS, SH64_MEDIA_SFMT_FCMPEQD, SH64_MEDIA_SFMT_FCMPEQS - , SH64_MEDIA_SFMT_FCNVDS, SH64_MEDIA_SFMT_FCNVSD, SH64_MEDIA_SFMT_FIPRS, SH64_MEDIA_SFMT_FLDD - , SH64_MEDIA_SFMT_FLDP, SH64_MEDIA_SFMT_FLDS, SH64_MEDIA_SFMT_FLDXD, SH64_MEDIA_SFMT_FLDXP - , SH64_MEDIA_SFMT_FLDXS, SH64_MEDIA_SFMT_FMACS, SH64_MEDIA_SFMT_FMOVDQ, SH64_MEDIA_SFMT_FMOVLS - , SH64_MEDIA_SFMT_FMOVQD, SH64_MEDIA_SFMT_FMOVSL, SH64_MEDIA_SFMT_FSTD, SH64_MEDIA_SFMT_FSTP - , SH64_MEDIA_SFMT_FSTS, SH64_MEDIA_SFMT_FSTXD, SH64_MEDIA_SFMT_FSTXP, SH64_MEDIA_SFMT_FSTXS - , SH64_MEDIA_SFMT_FTRVS, SH64_MEDIA_SFMT_GETCON, SH64_MEDIA_SFMT_GETTR, SH64_MEDIA_SFMT_LDB - , SH64_MEDIA_SFMT_LDL, SH64_MEDIA_SFMT_LDQ, SH64_MEDIA_SFMT_LDUW, SH64_MEDIA_SFMT_LDXB - , SH64_MEDIA_SFMT_MCMV, SH64_MEDIA_SFMT_MOVI, SH64_MEDIA_SFMT_MPERMW, SH64_MEDIA_SFMT_ORI - , SH64_MEDIA_SFMT_PTA, SH64_MEDIA_SFMT_PTABS, SH64_MEDIA_SFMT_PTREL, SH64_MEDIA_SFMT_PUTCON - , SH64_MEDIA_SFMT_SHARI, SH64_MEDIA_SFMT_SHARIL, SH64_MEDIA_SFMT_SHORI, SH64_MEDIA_SFMT_STB - , SH64_MEDIA_SFMT_STL, SH64_MEDIA_SFMT_STQ, SH64_MEDIA_SFMT_STW, SH64_MEDIA_SFMT_STHIL - , SH64_MEDIA_SFMT_STXB, SH64_MEDIA_SFMT_SWAPQ, SH64_MEDIA_SFMT_TRAPA, SH64_MEDIA_SFMT_XORI -} SH64_MEDIA_SFMT_TYPE; - -/* Function unit handlers (user written). */ - -extern int sh64_model_sh5_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/); - -/* Profiling before/after handlers (user written) */ - -extern void sh64_model_insn_before (SIM_CPU *, int /*first_p*/); -extern void sh64_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/); - -#endif /* SH64_MEDIA_DECODE_H */ diff --git a/sim/sh64/decode.h b/sim/sh64/decode.h deleted file mode 100644 index 2582807d8d1..00000000000 --- a/sim/sh64/decode.h +++ /dev/null @@ -1,16 +0,0 @@ -#ifndef DECODE_H -#define DECODE_H - -#undef WITH_PROFILE_MODEL_P - -#ifdef WANT_ISA_COMPACT -#include "decode-compact.h" -#include "defs-compact.h" -#endif /* WANT_ISA_COMPACT */ - -#ifdef WANT_ISA_MEDIA -#include "decode-media.h" -#include "defs-media.h" -#endif /* WANT_ISA_MEDIA */ - -#endif /* DECODE_H */ diff --git a/sim/sh64/defs-compact.h b/sim/sh64/defs-compact.h deleted file mode 100644 index fb0b7e41640..00000000000 --- a/sim/sh64/defs-compact.h +++ /dev/null @@ -1,424 +0,0 @@ -/* ISA definitions header for compact. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef DEFS_SH64_COMPACT_H -#define DEFS_SH64_COMPACT_H - -/* Instruction argument buffer. */ - -union sem_fields { - struct { /* no operands */ - int empty; - } fmt_empty; - struct { /* */ - SI f_dn; - } sfmt_fcnvds_compact; - struct { /* */ - IADDR i_disp12; - } sfmt_bra_compact; - struct { /* */ - IADDR i_disp8; - } sfmt_bf_compact; - struct { /* */ - SI f_imm4x2; - UINT f_rm; - } sfmt_movw11_compact; - struct { /* */ - SI f_imm8x2; - UINT f_rn; - } sfmt_movw10_compact; - struct { /* */ - SI f_imm4x2; - UINT f_rn; - } sfmt_movw5_compact; - struct { /* */ - SI f_imm8x4; - UINT f_rn; - } sfmt_movl10_compact; - struct { /* */ - UINT f_imm4; - UINT f_rm; - } sfmt_movb5_compact; - struct { /* */ - SI f_vm; - SI f_vn; - } sfmt_fipr_compact; - struct { /* */ - UINT f_imm8; - UINT f_rn; - } sfmt_addi_compact; - struct { /* */ - SI f_imm4x4; - UINT f_rm; - UINT f_rn; - } sfmt_movl5_compact; -#if WITH_SCACHE_PBB - /* Writeback handler. */ - struct { - /* Pointer to argbuf entry for insn whose results need writing back. */ - const struct argbuf *abuf; - } write; - /* x-before handler */ - struct { - /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/ - int first_p; - } before; - /* x-after handler */ - struct { - int empty; - } after; - /* This entry is used to terminate each pbb. */ - struct { - /* Number of insns in pbb. */ - int insn_count; - /* Next pbb to execute. */ - SCACHE *next; - SCACHE *branch_target; - } chain; -#endif -}; - -/* The ARGBUF struct. */ -struct argbuf { - /* These are the baseclass definitions. */ - IADDR addr; - const IDESC *idesc; - char trace_p; - char profile_p; - /* ??? Temporary hack for skip insns. */ - char skip_count; - char unused; - /* cpu specific data follows */ - union sem semantic; - int written; - union sem_fields fields; -}; - -/* A cached insn. - - ??? SCACHE used to contain more than just argbuf. We could delete the - type entirely and always just use ARGBUF, but for future concerns and as - a level of abstraction it is left in. */ - -struct scache { - struct argbuf argbuf; -}; - -/* Macros to simplify extraction, reading and semantic code. - These define and assign the local vars that contain the insn's fields. */ - -#define EXTRACT_IFMT_EMPTY_VARS \ - unsigned int length; -#define EXTRACT_IFMT_EMPTY_CODE \ - length = 0; \ - -#define EXTRACT_IFMT_ADD_COMPACT_VARS \ - UINT f_op4; \ - UINT f_rn; \ - UINT f_rm; \ - UINT f_sub4; \ - unsigned int length; -#define EXTRACT_IFMT_ADD_COMPACT_CODE \ - length = 2; \ - f_op4 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \ - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); \ - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); \ - f_sub4 = EXTRACT_LSB0_UINT (insn, 16, 3, 4); \ - -#define EXTRACT_IFMT_ADDI_COMPACT_VARS \ - UINT f_op4; \ - UINT f_rn; \ - UINT f_imm8; \ - unsigned int length; -#define EXTRACT_IFMT_ADDI_COMPACT_CODE \ - length = 2; \ - f_op4 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \ - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); \ - f_imm8 = EXTRACT_LSB0_UINT (insn, 16, 7, 8); \ - -#define EXTRACT_IFMT_AND_COMPACT_VARS \ - UINT f_op4; \ - UINT f_rn; \ - UINT f_rm; \ - UINT f_sub4; \ - unsigned int length; -#define EXTRACT_IFMT_AND_COMPACT_CODE \ - length = 2; \ - f_op4 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \ - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); \ - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); \ - f_sub4 = EXTRACT_LSB0_UINT (insn, 16, 3, 4); \ - -#define EXTRACT_IFMT_ANDI_COMPACT_VARS \ - UINT f_op8; \ - UINT f_imm8; \ - unsigned int length; -#define EXTRACT_IFMT_ANDI_COMPACT_CODE \ - length = 2; \ - f_op8 = EXTRACT_LSB0_UINT (insn, 16, 15, 8); \ - f_imm8 = EXTRACT_LSB0_UINT (insn, 16, 7, 8); \ - -#define EXTRACT_IFMT_ANDB_COMPACT_VARS \ - UINT f_op8; \ - UINT f_imm8; \ - unsigned int length; -#define EXTRACT_IFMT_ANDB_COMPACT_CODE \ - length = 2; \ - f_op8 = EXTRACT_LSB0_UINT (insn, 16, 15, 8); \ - f_imm8 = EXTRACT_LSB0_UINT (insn, 16, 7, 8); \ - -#define EXTRACT_IFMT_BF_COMPACT_VARS \ - UINT f_op8; \ - SI f_disp8; \ - unsigned int length; -#define EXTRACT_IFMT_BF_COMPACT_CODE \ - length = 2; \ - f_op8 = EXTRACT_LSB0_UINT (insn, 16, 15, 8); \ - f_disp8 = ((((EXTRACT_LSB0_INT (insn, 16, 7, 8)) << (1))) + (((pc) + (4)))); \ - -#define EXTRACT_IFMT_BRA_COMPACT_VARS \ - UINT f_op4; \ - SI f_disp12; \ - unsigned int length; -#define EXTRACT_IFMT_BRA_COMPACT_CODE \ - length = 2; \ - f_op4 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \ - f_disp12 = ((((EXTRACT_LSB0_INT (insn, 16, 11, 12)) << (1))) + (((pc) + (4)))); \ - -#define EXTRACT_IFMT_BRAF_COMPACT_VARS \ - UINT f_op4; \ - UINT f_rn; \ - UINT f_sub8; \ - unsigned int length; -#define EXTRACT_IFMT_BRAF_COMPACT_CODE \ - length = 2; \ - f_op4 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \ - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); \ - f_sub8 = EXTRACT_LSB0_UINT (insn, 16, 7, 8); \ - -#define EXTRACT_IFMT_BRK_COMPACT_VARS \ - UINT f_op16; \ - unsigned int length; -#define EXTRACT_IFMT_BRK_COMPACT_CODE \ - length = 2; \ - f_op16 = EXTRACT_LSB0_UINT (insn, 16, 15, 16); \ - -#define EXTRACT_IFMT_FABS_COMPACT_VARS \ - UINT f_op4; \ - UINT f_rn; \ - UINT f_sub8; \ - unsigned int length; -#define EXTRACT_IFMT_FABS_COMPACT_CODE \ - length = 2; \ - f_op4 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \ - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); \ - f_sub8 = EXTRACT_LSB0_UINT (insn, 16, 7, 8); \ - -#define EXTRACT_IFMT_FADD_COMPACT_VARS \ - UINT f_op4; \ - UINT f_rn; \ - UINT f_rm; \ - UINT f_sub4; \ - unsigned int length; -#define EXTRACT_IFMT_FADD_COMPACT_CODE \ - length = 2; \ - f_op4 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \ - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); \ - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); \ - f_sub4 = EXTRACT_LSB0_UINT (insn, 16, 3, 4); \ - -#define EXTRACT_IFMT_FCNVDS_COMPACT_VARS \ - UINT f_op4; \ - SI f_dn; \ - UINT f_8_1; \ - UINT f_sub8; \ - unsigned int length; -#define EXTRACT_IFMT_FCNVDS_COMPACT_CODE \ - length = 2; \ - f_op4 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \ - f_dn = ((EXTRACT_LSB0_UINT (insn, 16, 11, 3)) << (1)); \ - f_8_1 = EXTRACT_LSB0_UINT (insn, 16, 8, 1); \ - f_sub8 = EXTRACT_LSB0_UINT (insn, 16, 7, 8); \ - -#define EXTRACT_IFMT_FIPR_COMPACT_VARS \ - UINT f_op4; \ - SI f_vn; \ - SI f_vm; \ - UINT f_sub8; \ - unsigned int length; -#define EXTRACT_IFMT_FIPR_COMPACT_CODE \ - length = 2; \ - f_op4 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \ - f_vn = ((EXTRACT_LSB0_UINT (insn, 16, 11, 2)) << (2)); \ - f_vm = ((EXTRACT_LSB0_UINT (insn, 16, 9, 2)) << (2)); \ - f_sub8 = EXTRACT_LSB0_UINT (insn, 16, 7, 8); \ - -#define EXTRACT_IFMT_FLDS_COMPACT_VARS \ - UINT f_op4; \ - UINT f_rn; \ - UINT f_sub8; \ - unsigned int length; -#define EXTRACT_IFMT_FLDS_COMPACT_CODE \ - length = 2; \ - f_op4 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \ - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); \ - f_sub8 = EXTRACT_LSB0_UINT (insn, 16, 7, 8); \ - -#define EXTRACT_IFMT_FMAC_COMPACT_VARS \ - UINT f_op4; \ - UINT f_rn; \ - UINT f_rm; \ - UINT f_sub4; \ - unsigned int length; -#define EXTRACT_IFMT_FMAC_COMPACT_CODE \ - length = 2; \ - f_op4 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \ - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); \ - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); \ - f_sub4 = EXTRACT_LSB0_UINT (insn, 16, 3, 4); \ - -#define EXTRACT_IFMT_FMOV2_COMPACT_VARS \ - UINT f_op4; \ - UINT f_rn; \ - UINT f_rm; \ - UINT f_sub4; \ - unsigned int length; -#define EXTRACT_IFMT_FMOV2_COMPACT_CODE \ - length = 2; \ - f_op4 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \ - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); \ - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); \ - f_sub4 = EXTRACT_LSB0_UINT (insn, 16, 3, 4); \ - -#define EXTRACT_IFMT_FMOV5_COMPACT_VARS \ - UINT f_op4; \ - UINT f_rn; \ - UINT f_rm; \ - UINT f_sub4; \ - unsigned int length; -#define EXTRACT_IFMT_FMOV5_COMPACT_CODE \ - length = 2; \ - f_op4 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \ - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); \ - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); \ - f_sub4 = EXTRACT_LSB0_UINT (insn, 16, 3, 4); \ - -#define EXTRACT_IFMT_FTRV_COMPACT_VARS \ - UINT f_op4; \ - SI f_vn; \ - UINT f_sub10; \ - unsigned int length; -#define EXTRACT_IFMT_FTRV_COMPACT_CODE \ - length = 2; \ - f_op4 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \ - f_vn = ((EXTRACT_LSB0_UINT (insn, 16, 11, 2)) << (2)); \ - f_sub10 = EXTRACT_LSB0_UINT (insn, 16, 9, 10); \ - -#define EXTRACT_IFMT_MOVB5_COMPACT_VARS \ - UINT f_op8; \ - UINT f_rm; \ - UINT f_imm4; \ - unsigned int length; -#define EXTRACT_IFMT_MOVB5_COMPACT_CODE \ - length = 2; \ - f_op8 = EXTRACT_LSB0_UINT (insn, 16, 15, 8); \ - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); \ - f_imm4 = EXTRACT_LSB0_UINT (insn, 16, 3, 4); \ - -#define EXTRACT_IFMT_MOVL4_COMPACT_VARS \ - UINT f_op8; \ - SI f_imm8x4; \ - unsigned int length; -#define EXTRACT_IFMT_MOVL4_COMPACT_CODE \ - length = 2; \ - f_op8 = EXTRACT_LSB0_UINT (insn, 16, 15, 8); \ - f_imm8x4 = ((EXTRACT_LSB0_UINT (insn, 16, 7, 8)) << (2)); \ - -#define EXTRACT_IFMT_MOVL5_COMPACT_VARS \ - UINT f_op4; \ - UINT f_rn; \ - UINT f_rm; \ - SI f_imm4x4; \ - unsigned int length; -#define EXTRACT_IFMT_MOVL5_COMPACT_CODE \ - length = 2; \ - f_op4 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \ - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); \ - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); \ - f_imm4x4 = ((EXTRACT_LSB0_UINT (insn, 16, 3, 4)) << (2)); \ - -#define EXTRACT_IFMT_MOVL10_COMPACT_VARS \ - UINT f_op4; \ - UINT f_rn; \ - SI f_imm8x4; \ - unsigned int length; -#define EXTRACT_IFMT_MOVL10_COMPACT_CODE \ - length = 2; \ - f_op4 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \ - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); \ - f_imm8x4 = ((EXTRACT_LSB0_UINT (insn, 16, 7, 8)) << (2)); \ - -#define EXTRACT_IFMT_MOVW4_COMPACT_VARS \ - UINT f_op8; \ - SI f_imm8x2; \ - unsigned int length; -#define EXTRACT_IFMT_MOVW4_COMPACT_CODE \ - length = 2; \ - f_op8 = EXTRACT_LSB0_UINT (insn, 16, 15, 8); \ - f_imm8x2 = ((EXTRACT_LSB0_UINT (insn, 16, 7, 8)) << (1)); \ - -#define EXTRACT_IFMT_MOVW5_COMPACT_VARS \ - UINT f_op8; \ - UINT f_rn; \ - SI f_imm4x2; \ - unsigned int length; -#define EXTRACT_IFMT_MOVW5_COMPACT_CODE \ - length = 2; \ - f_op8 = EXTRACT_LSB0_UINT (insn, 16, 15, 8); \ - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); \ - f_imm4x2 = ((EXTRACT_LSB0_UINT (insn, 16, 3, 4)) << (1)); \ - -#define EXTRACT_IFMT_MOVW10_COMPACT_VARS \ - UINT f_op4; \ - UINT f_rn; \ - SI f_imm8x2; \ - unsigned int length; -#define EXTRACT_IFMT_MOVW10_COMPACT_CODE \ - length = 2; \ - f_op4 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \ - f_rn = EXTRACT_LSB0_UINT (insn, 16, 11, 4); \ - f_imm8x2 = ((EXTRACT_LSB0_UINT (insn, 16, 7, 8)) << (1)); \ - -#define EXTRACT_IFMT_MOVW11_COMPACT_VARS \ - UINT f_op8; \ - UINT f_rm; \ - SI f_imm4x2; \ - unsigned int length; -#define EXTRACT_IFMT_MOVW11_COMPACT_CODE \ - length = 2; \ - f_op8 = EXTRACT_LSB0_UINT (insn, 16, 15, 8); \ - f_rm = EXTRACT_LSB0_UINT (insn, 16, 7, 4); \ - f_imm4x2 = ((EXTRACT_LSB0_UINT (insn, 16, 3, 4)) << (1)); \ - -#endif /* DEFS_SH64_COMPACT_H */ diff --git a/sim/sh64/defs-media.h b/sim/sh64/defs-media.h deleted file mode 100644 index 7e749f9d5b5..00000000000 --- a/sim/sh64/defs-media.h +++ /dev/null @@ -1,926 +0,0 @@ -/* ISA definitions header for media. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef DEFS_SH64_MEDIA_H -#define DEFS_SH64_MEDIA_H - -/* Instruction argument buffer. */ - -union sem_fields { - struct { /* no operands */ - int empty; - } fmt_empty; - struct { /* */ - UINT f_dest; - UINT f_uimm16; - } sfmt_shori; - struct { /* */ - DI f_disp16; - UINT f_tra; - } sfmt_pta; - struct { /* */ - INT f_imm16; - UINT f_dest; - } sfmt_movi; - struct { /* */ - UINT f_dest; - UINT f_left_right; - } sfmt_fabsd; - struct { /* */ - UINT f_dest; - UINT f_trb; - } sfmt_blink; - struct { /* */ - INT f_imm6; - UINT f_dest; - UINT f_left; - } sfmt_xori; - struct { /* */ - INT f_disp6; - UINT f_dest; - UINT f_left; - } sfmt_sthil; - struct { /* */ - UINT f_dest; - UINT f_left; - UINT f_uimm6; - } sfmt_shari; - struct { /* */ - INT f_imm10; - UINT f_dest; - UINT f_left; - } sfmt_ori; - struct { /* */ - SI f_disp10x2; - UINT f_dest; - UINT f_left; - } sfmt_lduw; - struct { /* */ - SI f_disp10x4; - UINT f_dest; - UINT f_left; - } sfmt_flds; - struct { /* */ - SI f_disp10x8; - UINT f_dest; - UINT f_left; - } sfmt_fldd; - struct { /* */ - INT f_imm6; - UINT f_left; - UINT f_tra; - } sfmt_beqi; - struct { /* */ - UINT f_left; - UINT f_right; - UINT f_tra; - } sfmt_beq; - struct { /* */ - INT f_disp10; - UINT f_dest; - UINT f_left; - } sfmt_addi; - struct { /* */ - UINT f_dest; - UINT f_left; - UINT f_right; - } sfmt_add; - struct { - INT f_disp6; - UINT f_dest; - UINT f_left; - } sfmt_ldhil; -#if WITH_SCACHE_PBB - /* Writeback handler. */ - struct { - /* Pointer to argbuf entry for insn whose results need writing back. */ - const struct argbuf *abuf; - } write; - /* x-before handler */ - struct { - /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/ - int first_p; - } before; - /* x-after handler */ - struct { - int empty; - } after; - /* This entry is used to terminate each pbb. */ - struct { - /* Number of insns in pbb. */ - int insn_count; - /* Next pbb to execute. */ - SCACHE *next; - SCACHE *branch_target; - } chain; -#endif -}; - -/* The ARGBUF struct. */ -struct argbuf { - /* These are the baseclass definitions. */ - IADDR addr; - const IDESC *idesc; - char trace_p; - char profile_p; - /* ??? Temporary hack for skip insns. */ - char skip_count; - char unused; - /* cpu specific data follows */ - union sem semantic; - int written; - union sem_fields fields; -}; - -/* A cached insn. - - ??? SCACHE used to contain more than just argbuf. We could delete the - type entirely and always just use ARGBUF, but for future concerns and as - a level of abstraction it is left in. */ - -struct scache { - struct argbuf argbuf; -}; - -/* Macros to simplify extraction, reading and semantic code. - These define and assign the local vars that contain the insn's fields. */ - -#define EXTRACT_IFMT_EMPTY_VARS \ - unsigned int length; -#define EXTRACT_IFMT_EMPTY_CODE \ - length = 0; \ - -#define EXTRACT_IFMT_ADD_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_ADD_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_ADDI_VARS \ - UINT f_op; \ - UINT f_left; \ - INT f_disp10; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_ADDI_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_disp10 = EXTRACT_LSB0_INT (insn, 32, 19, 10); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_ALLOCO_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - SI f_disp6x32; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_ALLOCO_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_disp6x32 = ((EXTRACT_LSB0_INT (insn, 32, 15, 6)) << (5)); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_BEQ_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_likely; \ - UINT f_8_2; \ - UINT f_tra; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_BEQ_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_likely = EXTRACT_LSB0_UINT (insn, 32, 9, 1); \ - f_8_2 = EXTRACT_LSB0_UINT (insn, 32, 8, 2); \ - f_tra = EXTRACT_LSB0_UINT (insn, 32, 6, 3); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_BEQI_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - INT f_imm6; \ - UINT f_likely; \ - UINT f_8_2; \ - UINT f_tra; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_BEQI_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_imm6 = EXTRACT_LSB0_INT (insn, 32, 15, 6); \ - f_likely = EXTRACT_LSB0_UINT (insn, 32, 9, 1); \ - f_8_2 = EXTRACT_LSB0_UINT (insn, 32, 8, 2); \ - f_tra = EXTRACT_LSB0_UINT (insn, 32, 6, 3); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_BLINK_VARS \ - UINT f_op; \ - UINT f_25; \ - UINT f_trb; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_BLINK_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_25 = EXTRACT_LSB0_UINT (insn, 32, 25, 3); \ - f_trb = EXTRACT_LSB0_UINT (insn, 32, 22, 3); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_BRK_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_BRK_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_BYTEREV_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_BYTEREV_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FABSD_VARS \ - UINT f_op; \ - UINT f_ext; \ - UINT f_left; \ - UINT f_right; \ - UINT f_left_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FABSD_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_left_right = f_left;\ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FABSS_VARS \ - UINT f_op; \ - UINT f_ext; \ - UINT f_left; \ - UINT f_right; \ - UINT f_left_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FABSS_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_left_right = f_left;\ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FADDD_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FADDD_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FADDS_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FADDS_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FCMPEQD_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FCMPEQD_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FCMPEQS_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FCMPEQS_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FCNVDS_VARS \ - UINT f_op; \ - UINT f_ext; \ - UINT f_left; \ - UINT f_right; \ - UINT f_left_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FCNVDS_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_left_right = f_left;\ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FCNVSD_VARS \ - UINT f_op; \ - UINT f_ext; \ - UINT f_left; \ - UINT f_right; \ - UINT f_left_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FCNVSD_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_left_right = f_left;\ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FGETSCR_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FGETSCR_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FIPRS_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FIPRS_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FLDD_VARS \ - UINT f_op; \ - UINT f_left; \ - SI f_disp10x8; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FLDD_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_disp10x8 = ((EXTRACT_LSB0_INT (insn, 32, 19, 10)) << (3)); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FLDP_VARS \ - UINT f_op; \ - UINT f_left; \ - SI f_disp10x8; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FLDP_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_disp10x8 = ((EXTRACT_LSB0_INT (insn, 32, 19, 10)) << (3)); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FLDS_VARS \ - UINT f_op; \ - UINT f_left; \ - SI f_disp10x4; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FLDS_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_disp10x4 = ((EXTRACT_LSB0_INT (insn, 32, 19, 10)) << (2)); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FLDXD_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FLDXD_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FLDXP_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FLDXP_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FMOVDQ_VARS \ - UINT f_op; \ - UINT f_ext; \ - UINT f_left; \ - UINT f_right; \ - UINT f_left_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FMOVDQ_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_left_right = f_left;\ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FMOVLS_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FMOVLS_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FMOVSL_VARS \ - UINT f_op; \ - UINT f_ext; \ - UINT f_left; \ - UINT f_right; \ - UINT f_left_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FMOVSL_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_left_right = f_left;\ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FPUTSCR_VARS \ - UINT f_op; \ - UINT f_ext; \ - UINT f_left; \ - UINT f_right; \ - UINT f_left_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FPUTSCR_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_left_right = f_left;\ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FSTXD_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FSTXD_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_FTRVS_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_FTRVS_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_GETCFG_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - INT f_disp6; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_GETCFG_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_disp6 = EXTRACT_LSB0_INT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_GETCON_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_GETCON_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_LDL_VARS \ - UINT f_op; \ - UINT f_left; \ - SI f_disp10x4; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_LDL_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_disp10x4 = ((EXTRACT_LSB0_INT (insn, 32, 19, 10)) << (2)); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_LDQ_VARS \ - UINT f_op; \ - UINT f_left; \ - SI f_disp10x8; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_LDQ_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_disp10x8 = ((EXTRACT_LSB0_INT (insn, 32, 19, 10)) << (3)); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_MMACNFX_WL_VARS \ - UINT f_op; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_MMACNFX_WL_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_MOVI_VARS \ - UINT f_op; \ - INT f_imm16; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_MOVI_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_imm16 = EXTRACT_LSB0_INT (insn, 32, 25, 16); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_ORI_VARS \ - UINT f_op; \ - UINT f_left; \ - INT f_imm10; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_ORI_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_imm10 = EXTRACT_LSB0_INT (insn, 32, 19, 10); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_PREFI_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - SI f_disp6x32; \ - UINT f_right; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_PREFI_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_disp6x32 = ((EXTRACT_LSB0_INT (insn, 32, 15, 6)) << (5)); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_PTA_VARS \ - UINT f_op; \ - DI f_disp16; \ - UINT f_likely; \ - UINT f_8_2; \ - UINT f_tra; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_PTA_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_disp16 = ((((EXTRACT_LSB0_INT (insn, 32, 25, 16)) << (2))) + (pc)); \ - f_likely = EXTRACT_LSB0_UINT (insn, 32, 9, 1); \ - f_8_2 = EXTRACT_LSB0_UINT (insn, 32, 8, 2); \ - f_tra = EXTRACT_LSB0_UINT (insn, 32, 6, 3); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_PTABS_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_likely; \ - UINT f_8_2; \ - UINT f_tra; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_PTABS_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_likely = EXTRACT_LSB0_UINT (insn, 32, 9, 1); \ - f_8_2 = EXTRACT_LSB0_UINT (insn, 32, 8, 2); \ - f_tra = EXTRACT_LSB0_UINT (insn, 32, 6, 3); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_PUTCON_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_PUTCON_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_SHARI_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - UINT f_uimm6; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_SHARI_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_uimm6 = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_SHORI_VARS \ - UINT f_op; \ - UINT f_uimm16; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_SHORI_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 25, 16); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_STW_VARS \ - UINT f_op; \ - UINT f_left; \ - SI f_disp10x2; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_STW_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_disp10x2 = ((EXTRACT_LSB0_INT (insn, 32, 19, 10)) << (1)); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#define EXTRACT_IFMT_TRAPA_VARS \ - UINT f_op; \ - UINT f_left; \ - UINT f_ext; \ - UINT f_right; \ - UINT f_dest; \ - UINT f_rsvd; \ - unsigned int length; -#define EXTRACT_IFMT_TRAPA_CODE \ - length = 4; \ - f_op = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \ - f_left = EXTRACT_LSB0_UINT (insn, 32, 25, 6); \ - f_ext = EXTRACT_LSB0_UINT (insn, 32, 19, 4); \ - f_right = EXTRACT_LSB0_UINT (insn, 32, 15, 6); \ - f_dest = EXTRACT_LSB0_UINT (insn, 32, 9, 6); \ - f_rsvd = EXTRACT_LSB0_UINT (insn, 32, 3, 4); \ - -#endif /* DEFS_SH64_MEDIA_H */ diff --git a/sim/sh64/eng-compact.h b/sim/sh64/eng-compact.h deleted file mode 100644 index 521b2f8a977..00000000000 --- a/sim/sh64/eng-compact.h +++ /dev/null @@ -1,34 +0,0 @@ -/* engine configuration for sh64 */ - -/* WITH_FAST: non-zero if a fast version of the engine is available - in addition to the full-featured version. */ -#define WITH_FAST 1 - -/* WITH_SCACHE_PBB_SH64_COMPACT: non-zero if the pbb engine was selected. */ -#define WITH_SCACHE_PBB_SH64_COMPACT 1 - -/* HAVE_PARALLEL_INSNS: non-zero if cpu can parallelly execute > 1 insn. */ -#define HAVE_PARALLEL_INSNS 0 -#define WITH_PARALLEL_READ 0 -#define WITH_PARALLEL_WRITE 0 -#define WITH_PARALLEL_GENWRITE 0 - -/* WITH_SEM_SWITCH_FULL: non-zero if full-featured engine is - implemented as a switch(). */ -#define WITH_SEM_SWITCH_FULL 0 - -/* WITH_SEM_SWITCH_FAST: non-zero if fast engine is - implemented as a switch(). */ -#define WITH_SEM_SWITCH_FAST 1 - -/* Functions defined in the generated mainloop.c file - (which doesn't necessarily have that file name). */ - -extern ENGINE_FN sh64_compact_engine_run_full; -extern ENGINE_FN sh64_compact_engine_run_fast; - -extern SEM_PC sh64_compact_pbb_begin (SIM_CPU *, int); -extern SEM_PC sh64_compact_pbb_chain (SIM_CPU *, SEM_ARG); -extern SEM_PC sh64_compact_pbb_cti_chain (SIM_CPU *, SEM_ARG, SEM_BRANCH_TYPE, PCADDR); -extern void sh64_compact_pbb_before (SIM_CPU *, SCACHE *); -extern void sh64_compact_pbb_after (SIM_CPU *, SCACHE *); diff --git a/sim/sh64/eng-media.h b/sim/sh64/eng-media.h deleted file mode 100644 index db1c21da640..00000000000 --- a/sim/sh64/eng-media.h +++ /dev/null @@ -1,34 +0,0 @@ -/* engine configuration for sh64 */ - -/* WITH_FAST: non-zero if a fast version of the engine is available - in addition to the full-featured version. */ -#define WITH_FAST 1 - -/* WITH_SCACHE_PBB_SH64_MEDIA: non-zero if the pbb engine was selected. */ -#define WITH_SCACHE_PBB_SH64_MEDIA 1 - -/* HAVE_PARALLEL_INSNS: non-zero if cpu can parallelly execute > 1 insn. */ -#define HAVE_PARALLEL_INSNS 0 -#define WITH_PARALLEL_READ 0 -#define WITH_PARALLEL_WRITE 0 -#define WITH_PARALLEL_GENWRITE 0 - -/* WITH_SEM_SWITCH_FULL: non-zero if full-featured engine is - implemented as a switch(). */ -#define WITH_SEM_SWITCH_FULL 0 - -/* WITH_SEM_SWITCH_FAST: non-zero if fast engine is - implemented as a switch(). */ -#define WITH_SEM_SWITCH_FAST 1 - -/* Functions defined in the generated mainloop.c file - (which doesn't necessarily have that file name). */ - -extern ENGINE_FN sh64_media_engine_run_full; -extern ENGINE_FN sh64_media_engine_run_fast; - -extern SEM_PC sh64_media_pbb_begin (SIM_CPU *, int); -extern SEM_PC sh64_media_pbb_chain (SIM_CPU *, SEM_ARG); -extern SEM_PC sh64_media_pbb_cti_chain (SIM_CPU *, SEM_ARG, SEM_BRANCH_TYPE, PCADDR); -extern void sh64_media_pbb_before (SIM_CPU *, SCACHE *); -extern void sh64_media_pbb_after (SIM_CPU *, SCACHE *); diff --git a/sim/sh64/eng.h b/sim/sh64/eng.h deleted file mode 100644 index fb9d8c566b1..00000000000 --- a/sim/sh64/eng.h +++ /dev/null @@ -1,24 +0,0 @@ -/* Engine declarations. - Copyright (C) 2000 Free Software Foundation, Inc. - Contributed by Red Hat, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -/* Include declarations for SHmedia and SHcompact ISAs. */ - -#include "eng-compact.h" -#include "eng-media.h" diff --git a/sim/sh64/mloop-compact.c b/sim/sh64/mloop-compact.c deleted file mode 100644 index fb6b55202cf..00000000000 --- a/sim/sh64/mloop-compact.c +++ /dev/null @@ -1,635 +0,0 @@ -/* This file is generated by the genmloop script. DO NOT EDIT! */ - -/* Enable switch() support in cgen headers. */ -#define SEM_IN_SWITCH - -#define WANT_CPU sh64 -#define WANT_CPU_SH64 - -#include "sim-main.h" -#include "bfd.h" -#include "cgen-mem.h" -#include "cgen-ops.h" -#include "sim-assert.h" - -/* Fill in the administrative ARGBUF fields required by all insns, - virtual and real. */ - -static INLINE void -sh64_compact_fill_argbuf (const SIM_CPU *cpu, ARGBUF *abuf, const IDESC *idesc, - PCADDR pc, int fast_p) -{ -#if WITH_SCACHE - SEM_SET_CODE (abuf, idesc, fast_p); - ARGBUF_ADDR (abuf) = pc; -#endif - ARGBUF_IDESC (abuf) = idesc; -} - -/* Fill in tracing/profiling fields of an ARGBUF. */ - -static INLINE void -sh64_compact_fill_argbuf_tp (const SIM_CPU *cpu, ARGBUF *abuf, - int trace_p, int profile_p) -{ - ARGBUF_TRACE_P (abuf) = trace_p; - ARGBUF_PROFILE_P (abuf) = profile_p; -} - -#if WITH_SCACHE_PBB - -/* Emit the "x-before" handler. - x-before is emitted before each insn (serial or parallel). - This is as opposed to x-after which is only emitted at the end of a group - of parallel insns. */ - -static INLINE void -sh64_compact_emit_before (SIM_CPU *current_cpu, SCACHE *sc, PCADDR pc, int first_p) -{ - ARGBUF *abuf = &sc[0].argbuf; - const IDESC *id = & CPU_IDESC (current_cpu) [SH64_COMPACT_INSN_X_BEFORE]; - - abuf->fields.before.first_p = first_p; - sh64_compact_fill_argbuf (current_cpu, abuf, id, pc, 0); - /* no need to set trace_p,profile_p */ -} - -/* Emit the "x-after" handler. - x-after is emitted after a serial insn or at the end of a group of - parallel insns. */ - -static INLINE void -sh64_compact_emit_after (SIM_CPU *current_cpu, SCACHE *sc, PCADDR pc) -{ - ARGBUF *abuf = &sc[0].argbuf; - const IDESC *id = & CPU_IDESC (current_cpu) [SH64_COMPACT_INSN_X_AFTER]; - - sh64_compact_fill_argbuf (current_cpu, abuf, id, pc, 0); - /* no need to set trace_p,profile_p */ -} - -#endif /* WITH_SCACHE_PBB */ - - -static INLINE const IDESC * -extract (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, ARGBUF *abuf, - int fast_p) -{ - const IDESC *id = sh64_compact_decode (current_cpu, pc, insn, insn, abuf); - - sh64_compact_fill_argbuf (current_cpu, abuf, id, pc, fast_p); - if (! fast_p) - { - int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc); - int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc); - sh64_compact_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p); - } - return id; -} - -static INLINE SEM_PC -execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p) -{ - SEM_PC vpc; - - if (fast_p) - { -#if ! WITH_SEM_SWITCH_FAST -#if WITH_SCACHE - vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc); -#else - vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf); -#endif -#else - abort (); -#endif /* WITH_SEM_SWITCH_FAST */ - } - else - { -#if ! WITH_SEM_SWITCH_FULL - ARGBUF *abuf = &sc->argbuf; - const IDESC *idesc = abuf->idesc; -#if WITH_SCACHE_PBB - int virtual_p = CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_VIRTUAL); -#else - int virtual_p = 0; -#endif - - if (! virtual_p) - { - /* FIXME: call x-before */ - if (ARGBUF_PROFILE_P (abuf)) - PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num); - /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */ - if (PROFILE_MODEL_P (current_cpu) - && ARGBUF_PROFILE_P (abuf)) - sh64_compact_model_insn_before (current_cpu, 1 /*first_p*/); - TRACE_INSN_INIT (current_cpu, abuf, 1); - TRACE_INSN (current_cpu, idesc->idata, - (const struct argbuf *) abuf, abuf->addr); - } -#if WITH_SCACHE - vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc); -#else - vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf); -#endif - if (! virtual_p) - { - /* FIXME: call x-after */ - if (PROFILE_MODEL_P (current_cpu) - && ARGBUF_PROFILE_P (abuf)) - { - int cycles; - - cycles = (*idesc->timing->model_fn) (current_cpu, sc); - sh64_compact_model_insn_after (current_cpu, 1 /*last_p*/, cycles); - } - TRACE_INSN_FINI (current_cpu, abuf, 1); - } -#else - abort (); -#endif /* WITH_SEM_SWITCH_FULL */ - } - - return vpc; -} - - -/* Record address of cti terminating a pbb. */ -#define SET_CTI_VPC(sc) do { _cti_sc = (sc); } while (0) -/* Record number of [real] insns in pbb. */ -#define SET_INSN_COUNT(n) do { _insn_count = (n); } while (0) - -/* Fetch and extract a pseudo-basic-block. - FAST_P is non-zero if no tracing/profiling/etc. is wanted. */ - -INLINE SEM_PC -sh64_compact_pbb_begin (SIM_CPU *current_cpu, int FAST_P) -{ - SEM_PC new_vpc; - PCADDR pc; - SCACHE *sc; - int max_insns = CPU_SCACHE_MAX_CHAIN_LENGTH (current_cpu); - - pc = GET_H_PC (); - - new_vpc = scache_lookup_or_alloc (current_cpu, pc, max_insns, &sc); - if (! new_vpc) - { - /* Leading '_' to avoid collision with mainloop.in. */ - int _insn_count = 0; - SCACHE *orig_sc = sc; - SCACHE *_cti_sc = NULL; - int slice_insns = CPU_MAX_SLICE_INSNS (current_cpu); - - /* First figure out how many instructions to compile. - MAX_INSNS is the size of the allocated buffer, which includes space - for before/after handlers if they're being used. - SLICE_INSNS is the maxinum number of real insns that can be - executed. Zero means "as many as we want". */ - /* ??? max_insns is serving two incompatible roles. - 1) Number of slots available in scache buffer. - 2) Number of real insns to execute. - They're incompatible because there are virtual insns emitted too - (chain,cti-chain,before,after handlers). */ - - if (slice_insns == 1) - { - /* No need to worry about extra slots required for virtual insns - and parallel exec support because MAX_CHAIN_LENGTH is - guaranteed to be big enough to execute at least 1 insn! */ - max_insns = 1; - } - else - { - /* Allow enough slop so that while compiling insns, if max_insns > 0 - then there's guaranteed to be enough space to emit one real insn. - MAX_CHAIN_LENGTH is typically much longer than - the normal number of insns between cti's anyway. */ - max_insns -= (1 /* one for the trailing chain insn */ - + (FAST_P - ? 0 - : (1 + MAX_PARALLEL_INSNS) /* before+after */) - + (MAX_PARALLEL_INSNS > 1 - ? (MAX_PARALLEL_INSNS * 2) - : 0)); - - /* Account for before/after handlers. */ - if (! FAST_P) - slice_insns *= 3; - - if (slice_insns > 0 - && slice_insns < max_insns) - max_insns = slice_insns; - } - - new_vpc = sc; - - /* SC,PC must be updated to point passed the last entry used. - SET_CTI_VPC must be called if pbb is terminated by a cti. - SET_INSN_COUNT must be called to record number of real insns in - pbb [could be computed by us of course, extra cpu but perhaps - negligible enough]. */ - -/* begin extract-pbb */ -{ - const IDESC *idesc; - int icount = 0; - - while (max_insns > 0) - { - UHI insn = GETIMEMUHI (current_cpu, pc); - - idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P); - SEM_SKIP_COMPILE (current_cpu, sc, 1); - ++sc; - --max_insns; - ++icount; - pc += idesc->length; - - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (sc - 1); - - if (CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_DELAY_SLOT)) - { - USI insn = GETIMEMUHI (current_cpu, pc); - idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P); - - if (IDESC_CTI_P (idesc) || - CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_ILLSLOT)) - { - SIM_DESC sd = CPU_STATE (current_cpu); - sim_io_eprintf (CPU_STATE (current_cpu), - "malformed program, `%s' insn in delay slot\n", - CGEN_INSN_NAME (idesc->idata)); - sim_engine_halt (sd, current_cpu, NULL, pc, - sim_stopped, SIM_SIGILL); - } - else - { - ++sc; - --max_insns; - ++icount; - pc += idesc->length; - } - } - break; - } - } - - Finish: - SET_INSN_COUNT (icount); -} -/* end extract-pbb */ - - /* The last one is a pseudo-insn to link to the next chain. - It is also used to record the insn count for this chain. */ - { - const IDESC *id; - - /* Was pbb terminated by a cti? */ - if (_cti_sc) - { - id = & CPU_IDESC (current_cpu) [SH64_COMPACT_INSN_X_CTI_CHAIN]; - } - else - { - id = & CPU_IDESC (current_cpu) [SH64_COMPACT_INSN_X_CHAIN]; - } - SEM_SET_CODE (&sc->argbuf, id, FAST_P); - sc->argbuf.idesc = id; - sc->argbuf.addr = pc; - sc->argbuf.fields.chain.insn_count = _insn_count; - sc->argbuf.fields.chain.next = 0; - sc->argbuf.fields.chain.branch_target = 0; - ++sc; - } - - /* Update the pointer to the next free entry, may not have used as - many entries as was asked for. */ - CPU_SCACHE_NEXT_FREE (current_cpu) = sc; - /* Record length of chain if profiling. - This includes virtual insns since they count against - max_insns too. */ - if (! FAST_P) - PROFILE_COUNT_SCACHE_CHAIN_LENGTH (current_cpu, sc - orig_sc); - } - - return new_vpc; -} - -/* Chain to the next block from a non-cti terminated previous block. */ - -INLINE SEM_PC -sh64_compact_pbb_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - - PBB_UPDATE_INSN_COUNT (current_cpu, sem_arg); - - SET_H_PC (abuf->addr); - - - /* If not running forever, exit back to main loop. */ - if (CPU_MAX_SLICE_INSNS (current_cpu) != 0 - /* Also exit back to main loop if there's an event. - Note that if CPU_MAX_SLICE_INSNS != 1, events won't get processed - at the "right" time, but then that was what was asked for. - There is no silver bullet for simulator engines. - ??? Clearly this needs a cleaner interface. - At present it's just so Ctrl-C works. */ - || STATE_EVENTS (CPU_STATE (current_cpu))->work_pending) - CPU_RUNNING_P (current_cpu) = 0; - - /* If chained to next block, go straight to it. */ - if (abuf->fields.chain.next) - return abuf->fields.chain.next; - /* See if next block has already been compiled. */ - abuf->fields.chain.next = scache_lookup (current_cpu, abuf->addr); - if (abuf->fields.chain.next) - return abuf->fields.chain.next; - /* Nope, so next insn is a virtual insn to invoke the compiler - (begin a pbb). */ - return CPU_SCACHE_PBB_BEGIN (current_cpu); -} - -/* Chain to the next block from a cti terminated previous block. - BR_TYPE indicates whether the branch was taken and whether we can cache - the vpc of the branch target. - NEW_PC is the target's branch address, and is only valid if - BR_TYPE != SEM_BRANCH_UNTAKEN. */ - -INLINE SEM_PC -sh64_compact_pbb_cti_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg, - SEM_BRANCH_TYPE br_type, PCADDR new_pc) -{ - SEM_PC *new_vpc_ptr; - - PBB_UPDATE_INSN_COUNT (current_cpu, sem_arg); - - /* If we have switched ISAs, exit back to main loop. - Set idesc to 0 to cause the engine to point to the right insn table. */ - if (new_pc & 1) - { - /* Switch to SHmedia. */ - CPU_IDESC_SEM_INIT_P (current_cpu) = 0; - CPU_RUNNING_P (current_cpu) = 0; - } - - /* If not running forever, exit back to main loop. */ - if (CPU_MAX_SLICE_INSNS (current_cpu) != 0 - /* Also exit back to main loop if there's an event. - Note that if CPU_MAX_SLICE_INSNS != 1, events won't get processed - at the "right" time, but then that was what was asked for. - There is no silver bullet for simulator engines. - ??? Clearly this needs a cleaner interface. - At present it's just so Ctrl-C works. */ - || STATE_EVENTS (CPU_STATE (current_cpu))->work_pending) - CPU_RUNNING_P (current_cpu) = 0; - - /* Restart compiler if we branched to an uncacheable address - (e.g. "j reg"). */ - if (br_type == SEM_BRANCH_UNCACHEABLE) - { - SET_H_PC (new_pc); - return CPU_SCACHE_PBB_BEGIN (current_cpu); - } - - /* If branch wasn't taken, update the pc and set BR_ADDR_PTR to our - next chain ptr. */ - if (br_type == SEM_BRANCH_UNTAKEN) - { - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - new_pc = abuf->addr; - SET_H_PC (new_pc); - new_vpc_ptr = &abuf->fields.chain.next; - } - else - { - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - SET_H_PC (new_pc); - new_vpc_ptr = &abuf->fields.chain.branch_target; - } - - /* If chained to next block, go straight to it. */ - if (*new_vpc_ptr) - return *new_vpc_ptr; - /* See if next block has already been compiled. */ - *new_vpc_ptr = scache_lookup (current_cpu, new_pc); - if (*new_vpc_ptr) - return *new_vpc_ptr; - /* Nope, so next insn is a virtual insn to invoke the compiler - (begin a pbb). */ - return CPU_SCACHE_PBB_BEGIN (current_cpu); -} - -/* x-before handler. - This is called before each insn. */ - -void -sh64_compact_pbb_before (SIM_CPU *current_cpu, SCACHE *sc) -{ - SEM_ARG sem_arg = sc; - const ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int first_p = abuf->fields.before.first_p; - const ARGBUF *cur_abuf = SEM_ARGBUF (sc + 1); - const IDESC *cur_idesc = cur_abuf->idesc; - PCADDR pc = cur_abuf->addr; - - if (ARGBUF_PROFILE_P (cur_abuf)) - PROFILE_COUNT_INSN (current_cpu, pc, cur_idesc->num); - - /* If this isn't the first insn, finish up the previous one. */ - - if (! first_p) - { - if (PROFILE_MODEL_P (current_cpu)) - { - const SEM_ARG prev_sem_arg = sc - 1; - const ARGBUF *prev_abuf = SEM_ARGBUF (prev_sem_arg); - const IDESC *prev_idesc = prev_abuf->idesc; - int cycles; - - /* ??? May want to measure all insns if doing insn tracing. */ - if (ARGBUF_PROFILE_P (prev_abuf)) - { - cycles = (*prev_idesc->timing->model_fn) (current_cpu, prev_sem_arg); - sh64_compact_model_insn_after (current_cpu, 0 /*last_p*/, cycles); - } - } - - TRACE_INSN_FINI (current_cpu, cur_abuf, 0 /*last_p*/); - } - - /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */ - if (PROFILE_MODEL_P (current_cpu) - && ARGBUF_PROFILE_P (cur_abuf)) - sh64_compact_model_insn_before (current_cpu, first_p); - - TRACE_INSN_INIT (current_cpu, cur_abuf, first_p); - TRACE_INSN (current_cpu, cur_idesc->idata, cur_abuf, pc); -} - -/* x-after handler. - This is called after a serial insn or at the end of a group of parallel - insns. */ - -void -sh64_compact_pbb_after (SIM_CPU *current_cpu, SCACHE *sc) -{ - SEM_ARG sem_arg = sc; - const ARGBUF *abuf = SEM_ARGBUF (sem_arg); - const SEM_ARG prev_sem_arg = sc - 1; - const ARGBUF *prev_abuf = SEM_ARGBUF (prev_sem_arg); - - /* ??? May want to measure all insns if doing insn tracing. */ - if (PROFILE_MODEL_P (current_cpu) - && ARGBUF_PROFILE_P (prev_abuf)) - { - const IDESC *prev_idesc = prev_abuf->idesc; - int cycles; - - cycles = (*prev_idesc->timing->model_fn) (current_cpu, prev_sem_arg); - sh64_compact_model_insn_after (current_cpu, 1 /*last_p*/, cycles); - } - TRACE_INSN_FINI (current_cpu, prev_abuf, 1 /*last_p*/); -} - -#define FAST_P 0 - -void -sh64_compact_engine_run_full (SIM_CPU *current_cpu) -{ - SIM_DESC current_state = CPU_STATE (current_cpu); - SCACHE *scache = CPU_SCACHE_CACHE (current_cpu); - /* virtual program counter */ - SEM_PC vpc; -#if WITH_SEM_SWITCH_FULL - /* For communication between cti's and cti-chain. */ - SEM_BRANCH_TYPE pbb_br_type; - PCADDR pbb_br_npc; -#endif - - - if (! CPU_IDESC_SEM_INIT_P (current_cpu)) - { - /* ??? 'twould be nice to move this up a level and only call it once. - On the other hand, in the "let's go fast" case the test is only done - once per pbb (since we only return to the main loop at the end of - a pbb). And in the "let's run until we're done" case we don't return - until the program exits. */ - -#if WITH_SEM_SWITCH_FULL -#if defined (__GNUC__) -/* ??? Later maybe paste sem-switch.c in when building mainloop.c. */ -#define DEFINE_LABELS -#include "sem-compact-switch.c" -#endif -#else - sh64_compact_sem_init_idesc_table (current_cpu); -#endif - - /* Initialize the "begin (compile) a pbb" virtual insn. */ - vpc = CPU_SCACHE_PBB_BEGIN (current_cpu); - SEM_SET_FULL_CODE (SEM_ARGBUF (vpc), - & CPU_IDESC (current_cpu) [SH64_COMPACT_INSN_X_BEGIN]); - vpc->argbuf.idesc = & CPU_IDESC (current_cpu) [SH64_COMPACT_INSN_X_BEGIN]; - - CPU_IDESC_SEM_INIT_P (current_cpu) = 1; - } - - CPU_RUNNING_P (current_cpu) = 1; - /* ??? In the case where we're returning to the main loop after every - pbb we don't want to call pbb_begin each time (which hashes on the pc - and does a table lookup). A way to speed this up is to save vpc - between calls. */ - vpc = sh64_compact_pbb_begin (current_cpu, FAST_P); - - do - { -/* begin full-exec-pbb */ -{ -#if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST) -#define DEFINE_SWITCH -#include "sem-compact-switch.c" -#else - vpc = execute (current_cpu, vpc, FAST_P); -#endif -} -/* end full-exec-pbb */ - } - while (CPU_RUNNING_P (current_cpu)); -} - -#undef FAST_P - - -#define FAST_P 1 - -void -sh64_compact_engine_run_fast (SIM_CPU *current_cpu) -{ - SIM_DESC current_state = CPU_STATE (current_cpu); - SCACHE *scache = CPU_SCACHE_CACHE (current_cpu); - /* virtual program counter */ - SEM_PC vpc; -#if WITH_SEM_SWITCH_FAST - /* For communication between cti's and cti-chain. */ - SEM_BRANCH_TYPE pbb_br_type; - PCADDR pbb_br_npc; -#endif - - - if (! CPU_IDESC_SEM_INIT_P (current_cpu)) - { - /* ??? 'twould be nice to move this up a level and only call it once. - On the other hand, in the "let's go fast" case the test is only done - once per pbb (since we only return to the main loop at the end of - a pbb). And in the "let's run until we're done" case we don't return - until the program exits. */ - -#if WITH_SEM_SWITCH_FAST -#if defined (__GNUC__) -/* ??? Later maybe paste sem-switch.c in when building mainloop.c. */ -#define DEFINE_LABELS -#include "sem-compact-switch.c" -#endif -#else - sh64_compact_semf_init_idesc_table (current_cpu); -#endif - - /* Initialize the "begin (compile) a pbb" virtual insn. */ - vpc = CPU_SCACHE_PBB_BEGIN (current_cpu); - SEM_SET_FAST_CODE (SEM_ARGBUF (vpc), - & CPU_IDESC (current_cpu) [SH64_COMPACT_INSN_X_BEGIN]); - vpc->argbuf.idesc = & CPU_IDESC (current_cpu) [SH64_COMPACT_INSN_X_BEGIN]; - - CPU_IDESC_SEM_INIT_P (current_cpu) = 1; - } - - CPU_RUNNING_P (current_cpu) = 1; - /* ??? In the case where we're returning to the main loop after every - pbb we don't want to call pbb_begin each time (which hashes on the pc - and does a table lookup). A way to speed this up is to save vpc - between calls. */ - vpc = sh64_compact_pbb_begin (current_cpu, FAST_P); - - do - { -/* begin fast-exec-pbb */ -{ -#if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST) -#define DEFINE_SWITCH -#include "sem-compact-switch.c" -#else - vpc = execute (current_cpu, vpc, FAST_P); -#endif -} -/* end fast-exec-pbb */ - } - while (CPU_RUNNING_P (current_cpu)); -} - -#undef FAST_P - diff --git a/sim/sh64/mloop-media.c b/sim/sh64/mloop-media.c deleted file mode 100644 index 03c5df534c5..00000000000 --- a/sim/sh64/mloop-media.c +++ /dev/null @@ -1,624 +0,0 @@ -/* This file is generated by the genmloop script. DO NOT EDIT! */ - -/* Enable switch() support in cgen headers. */ -#define SEM_IN_SWITCH - -#define WANT_CPU sh64 -#define WANT_CPU_SH64 - -#include "sim-main.h" -#include "bfd.h" -#include "cgen-mem.h" -#include "cgen-ops.h" -#include "sim-assert.h" - -/* Fill in the administrative ARGBUF fields required by all insns, - virtual and real. */ - -static INLINE void -sh64_media_fill_argbuf (const SIM_CPU *cpu, ARGBUF *abuf, const IDESC *idesc, - PCADDR pc, int fast_p) -{ -#if WITH_SCACHE - SEM_SET_CODE (abuf, idesc, fast_p); - ARGBUF_ADDR (abuf) = pc; -#endif - ARGBUF_IDESC (abuf) = idesc; -} - -/* Fill in tracing/profiling fields of an ARGBUF. */ - -static INLINE void -sh64_media_fill_argbuf_tp (const SIM_CPU *cpu, ARGBUF *abuf, - int trace_p, int profile_p) -{ - ARGBUF_TRACE_P (abuf) = trace_p; - ARGBUF_PROFILE_P (abuf) = profile_p; -} - -#if WITH_SCACHE_PBB - -/* Emit the "x-before" handler. - x-before is emitted before each insn (serial or parallel). - This is as opposed to x-after which is only emitted at the end of a group - of parallel insns. */ - -static INLINE void -sh64_media_emit_before (SIM_CPU *current_cpu, SCACHE *sc, PCADDR pc, int first_p) -{ - ARGBUF *abuf = &sc[0].argbuf; - const IDESC *id = & CPU_IDESC (current_cpu) [SH64_MEDIA_INSN_X_BEFORE]; - - abuf->fields.before.first_p = first_p; - sh64_media_fill_argbuf (current_cpu, abuf, id, pc, 0); - /* no need to set trace_p,profile_p */ -} - -/* Emit the "x-after" handler. - x-after is emitted after a serial insn or at the end of a group of - parallel insns. */ - -static INLINE void -sh64_media_emit_after (SIM_CPU *current_cpu, SCACHE *sc, PCADDR pc) -{ - ARGBUF *abuf = &sc[0].argbuf; - const IDESC *id = & CPU_IDESC (current_cpu) [SH64_MEDIA_INSN_X_AFTER]; - - sh64_media_fill_argbuf (current_cpu, abuf, id, pc, 0); - /* no need to set trace_p,profile_p */ -} - -#endif /* WITH_SCACHE_PBB */ - - -static INLINE const IDESC * -extract (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, ARGBUF *abuf, - int fast_p) -{ - const IDESC *id = sh64_media_decode (current_cpu, pc, insn, insn, abuf); - - sh64_media_fill_argbuf (current_cpu, abuf, id, pc, fast_p); - if (! fast_p) - { - int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc); - int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc); - sh64_media_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p); - } - return id; -} - -static INLINE SEM_PC -execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p) -{ - SEM_PC vpc; - - if (fast_p) - { -#if ! WITH_SEM_SWITCH_FAST -#if WITH_SCACHE - vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc); -#else - vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf); -#endif -#else - abort (); -#endif /* WITH_SEM_SWITCH_FAST */ - } - else - { -#if ! WITH_SEM_SWITCH_FULL - ARGBUF *abuf = &sc->argbuf; - const IDESC *idesc = abuf->idesc; -#if WITH_SCACHE_PBB - int virtual_p = CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_VIRTUAL); -#else - int virtual_p = 0; -#endif - - if (! virtual_p) - { - /* FIXME: call x-before */ - if (ARGBUF_PROFILE_P (abuf)) - PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num); - /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */ - if (PROFILE_MODEL_P (current_cpu) - && ARGBUF_PROFILE_P (abuf)) - sh64_media_model_insn_before (current_cpu, 1 /*first_p*/); - TRACE_INSN_INIT (current_cpu, abuf, 1); - TRACE_INSN (current_cpu, idesc->idata, - (const struct argbuf *) abuf, abuf->addr); - } -#if WITH_SCACHE - vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc); -#else - vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf); -#endif - if (! virtual_p) - { - /* FIXME: call x-after */ - if (PROFILE_MODEL_P (current_cpu) - && ARGBUF_PROFILE_P (abuf)) - { - int cycles; - - cycles = (*idesc->timing->model_fn) (current_cpu, sc); - sh64_media_model_insn_after (current_cpu, 1 /*last_p*/, cycles); - } - TRACE_INSN_FINI (current_cpu, abuf, 1); - } -#else - abort (); -#endif /* WITH_SEM_SWITCH_FULL */ - } - - return vpc; -} - - -/* Record address of cti terminating a pbb. */ -#define SET_CTI_VPC(sc) do { _cti_sc = (sc); } while (0) -/* Record number of [real] insns in pbb. */ -#define SET_INSN_COUNT(n) do { _insn_count = (n); } while (0) - -/* Fetch and extract a pseudo-basic-block. - FAST_P is non-zero if no tracing/profiling/etc. is wanted. */ - -INLINE SEM_PC -sh64_media_pbb_begin (SIM_CPU *current_cpu, int FAST_P) -{ - SEM_PC new_vpc; - PCADDR pc; - SCACHE *sc; - int max_insns = CPU_SCACHE_MAX_CHAIN_LENGTH (current_cpu); - - pc = GET_H_PC (); - - new_vpc = scache_lookup_or_alloc (current_cpu, pc, max_insns, &sc); - if (! new_vpc) - { - /* Leading '_' to avoid collision with mainloop.in. */ - int _insn_count = 0; - SCACHE *orig_sc = sc; - SCACHE *_cti_sc = NULL; - int slice_insns = CPU_MAX_SLICE_INSNS (current_cpu); - - /* First figure out how many instructions to compile. - MAX_INSNS is the size of the allocated buffer, which includes space - for before/after handlers if they're being used. - SLICE_INSNS is the maxinum number of real insns that can be - executed. Zero means "as many as we want". */ - /* ??? max_insns is serving two incompatible roles. - 1) Number of slots available in scache buffer. - 2) Number of real insns to execute. - They're incompatible because there are virtual insns emitted too - (chain,cti-chain,before,after handlers). */ - - if (slice_insns == 1) - { - /* No need to worry about extra slots required for virtual insns - and parallel exec support because MAX_CHAIN_LENGTH is - guaranteed to be big enough to execute at least 1 insn! */ - max_insns = 1; - } - else - { - /* Allow enough slop so that while compiling insns, if max_insns > 0 - then there's guaranteed to be enough space to emit one real insn. - MAX_CHAIN_LENGTH is typically much longer than - the normal number of insns between cti's anyway. */ - max_insns -= (1 /* one for the trailing chain insn */ - + (FAST_P - ? 0 - : (1 + MAX_PARALLEL_INSNS) /* before+after */) - + (MAX_PARALLEL_INSNS > 1 - ? (MAX_PARALLEL_INSNS * 2) - : 0)); - - /* Account for before/after handlers. */ - if (! FAST_P) - slice_insns *= 3; - - if (slice_insns > 0 - && slice_insns < max_insns) - max_insns = slice_insns; - } - - new_vpc = sc; - - /* SC,PC must be updated to point passed the last entry used. - SET_CTI_VPC must be called if pbb is terminated by a cti. - SET_INSN_COUNT must be called to record number of real insns in - pbb [could be computed by us of course, extra cpu but perhaps - negligible enough]. */ - -/* begin extract-pbb */ -{ - const IDESC *idesc; - int icount = 0; - - while (max_insns > 0) - { - USI insn = GETIMEMUSI (current_cpu, pc); - - idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P); - SEM_SKIP_COMPILE (current_cpu, sc, 1); - ++sc; - --max_insns; - ++icount; - pc += idesc->length; - - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (sc - 1); - - if (CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_DELAY_SLOT)) - { - USI insn = GETIMEMUSI (current_cpu, pc); - idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P); - - ++sc; - --max_insns; - ++icount; - pc += idesc->length; - } - break; - } - } - - Finish: - SET_INSN_COUNT (icount); -} -/* end extract-pbb */ - - /* The last one is a pseudo-insn to link to the next chain. - It is also used to record the insn count for this chain. */ - { - const IDESC *id; - - /* Was pbb terminated by a cti? */ - if (_cti_sc) - { - id = & CPU_IDESC (current_cpu) [SH64_MEDIA_INSN_X_CTI_CHAIN]; - } - else - { - id = & CPU_IDESC (current_cpu) [SH64_MEDIA_INSN_X_CHAIN]; - } - SEM_SET_CODE (&sc->argbuf, id, FAST_P); - sc->argbuf.idesc = id; - sc->argbuf.addr = pc; - sc->argbuf.fields.chain.insn_count = _insn_count; - sc->argbuf.fields.chain.next = 0; - sc->argbuf.fields.chain.branch_target = 0; - ++sc; - } - - /* Update the pointer to the next free entry, may not have used as - many entries as was asked for. */ - CPU_SCACHE_NEXT_FREE (current_cpu) = sc; - /* Record length of chain if profiling. - This includes virtual insns since they count against - max_insns too. */ - if (! FAST_P) - PROFILE_COUNT_SCACHE_CHAIN_LENGTH (current_cpu, sc - orig_sc); - } - - return new_vpc; -} - -/* Chain to the next block from a non-cti terminated previous block. */ - -INLINE SEM_PC -sh64_media_pbb_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - - PBB_UPDATE_INSN_COUNT (current_cpu, sem_arg); - - SET_H_PC (abuf->addr | 1); - - /* If not running forever, exit back to main loop. */ - if (CPU_MAX_SLICE_INSNS (current_cpu) != 0 - /* Also exit back to main loop if there's an event. - Note that if CPU_MAX_SLICE_INSNS != 1, events won't get processed - at the "right" time, but then that was what was asked for. - There is no silver bullet for simulator engines. - ??? Clearly this needs a cleaner interface. - At present it's just so Ctrl-C works. */ - || STATE_EVENTS (CPU_STATE (current_cpu))->work_pending) - CPU_RUNNING_P (current_cpu) = 0; - - /* If chained to next block, go straight to it. */ - if (abuf->fields.chain.next) - return abuf->fields.chain.next; - /* See if next block has already been compiled. */ - abuf->fields.chain.next = scache_lookup (current_cpu, abuf->addr); - if (abuf->fields.chain.next) - return abuf->fields.chain.next; - /* Nope, so next insn is a virtual insn to invoke the compiler - (begin a pbb). */ - return CPU_SCACHE_PBB_BEGIN (current_cpu); -} - -/* Chain to the next block from a cti terminated previous block. - BR_TYPE indicates whether the branch was taken and whether we can cache - the vpc of the branch target. - NEW_PC is the target's branch address, and is only valid if - BR_TYPE != SEM_BRANCH_UNTAKEN. */ - -INLINE SEM_PC -sh64_media_pbb_cti_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg, - SEM_BRANCH_TYPE br_type, PCADDR new_pc) -{ - SEM_PC *new_vpc_ptr; - - PBB_UPDATE_INSN_COUNT (current_cpu, sem_arg); - - /* If we have switched ISAs, exit back to main loop. - Set idesc to 0 to cause the engine to point to the right insn table. */ - if ((new_pc & 1) == 0) - { - /* Switch to SHcompact. */ - CPU_IDESC_SEM_INIT_P (current_cpu) = 0; - CPU_RUNNING_P (current_cpu) = 0; - } - - /* If not running forever, exit back to main loop. */ - if (CPU_MAX_SLICE_INSNS (current_cpu) != 0 - /* Also exit back to main loop if there's an event. - Note that if CPU_MAX_SLICE_INSNS != 1, events won't get processed - at the "right" time, but then that was what was asked for. - There is no silver bullet for simulator engines. - ??? Clearly this needs a cleaner interface. - At present it's just so Ctrl-C works. */ - || STATE_EVENTS (CPU_STATE (current_cpu))->work_pending) - CPU_RUNNING_P (current_cpu) = 0; - - /* Restart compiler if we branched to an uncacheable address - (e.g. "j reg"). */ - if (br_type == SEM_BRANCH_UNCACHEABLE) - { - SET_H_PC (new_pc); - return CPU_SCACHE_PBB_BEGIN (current_cpu); - } - - /* If branch wasn't taken, update the pc and set BR_ADDR_PTR to our - next chain ptr. */ - if (br_type == SEM_BRANCH_UNTAKEN) - { - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - new_pc = abuf->addr; - /* Set bit 0 to stay in SHmedia mode. */ - SET_H_PC (new_pc | 1); - new_vpc_ptr = &abuf->fields.chain.next; - } - else - { - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - SET_H_PC (new_pc); - new_vpc_ptr = &abuf->fields.chain.branch_target; - } - - /* If chained to next block, go straight to it. */ - if (*new_vpc_ptr) - return *new_vpc_ptr; - /* See if next block has already been compiled. */ - *new_vpc_ptr = scache_lookup (current_cpu, new_pc); - if (*new_vpc_ptr) - return *new_vpc_ptr; - /* Nope, so next insn is a virtual insn to invoke the compiler - (begin a pbb). */ - return CPU_SCACHE_PBB_BEGIN (current_cpu); -} - -/* x-before handler. - This is called before each insn. */ - -void -sh64_media_pbb_before (SIM_CPU *current_cpu, SCACHE *sc) -{ - SEM_ARG sem_arg = sc; - const ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int first_p = abuf->fields.before.first_p; - const ARGBUF *cur_abuf = SEM_ARGBUF (sc + 1); - const IDESC *cur_idesc = cur_abuf->idesc; - PCADDR pc = cur_abuf->addr; - - if (ARGBUF_PROFILE_P (cur_abuf)) - PROFILE_COUNT_INSN (current_cpu, pc, cur_idesc->num); - - /* If this isn't the first insn, finish up the previous one. */ - - if (! first_p) - { - if (PROFILE_MODEL_P (current_cpu)) - { - const SEM_ARG prev_sem_arg = sc - 1; - const ARGBUF *prev_abuf = SEM_ARGBUF (prev_sem_arg); - const IDESC *prev_idesc = prev_abuf->idesc; - int cycles; - - /* ??? May want to measure all insns if doing insn tracing. */ - if (ARGBUF_PROFILE_P (prev_abuf)) - { - cycles = (*prev_idesc->timing->model_fn) (current_cpu, prev_sem_arg); - sh64_media_model_insn_after (current_cpu, 0 /*last_p*/, cycles); - } - } - - TRACE_INSN_FINI (current_cpu, cur_abuf, 0 /*last_p*/); - } - - /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */ - if (PROFILE_MODEL_P (current_cpu) - && ARGBUF_PROFILE_P (cur_abuf)) - sh64_media_model_insn_before (current_cpu, first_p); - - TRACE_INSN_INIT (current_cpu, cur_abuf, first_p); - TRACE_INSN (current_cpu, cur_idesc->idata, cur_abuf, pc); -} - -/* x-after handler. - This is called after a serial insn or at the end of a group of parallel - insns. */ - -void -sh64_media_pbb_after (SIM_CPU *current_cpu, SCACHE *sc) -{ - SEM_ARG sem_arg = sc; - const ARGBUF *abuf = SEM_ARGBUF (sem_arg); - const SEM_ARG prev_sem_arg = sc - 1; - const ARGBUF *prev_abuf = SEM_ARGBUF (prev_sem_arg); - - /* ??? May want to measure all insns if doing insn tracing. */ - if (PROFILE_MODEL_P (current_cpu) - && ARGBUF_PROFILE_P (prev_abuf)) - { - const IDESC *prev_idesc = prev_abuf->idesc; - int cycles; - - cycles = (*prev_idesc->timing->model_fn) (current_cpu, prev_sem_arg); - sh64_media_model_insn_after (current_cpu, 1 /*last_p*/, cycles); - } - TRACE_INSN_FINI (current_cpu, prev_abuf, 1 /*last_p*/); -} - -#define FAST_P 0 - -void -sh64_media_engine_run_full (SIM_CPU *current_cpu) -{ - SIM_DESC current_state = CPU_STATE (current_cpu); - SCACHE *scache = CPU_SCACHE_CACHE (current_cpu); - /* virtual program counter */ - SEM_PC vpc; -#if WITH_SEM_SWITCH_FULL - /* For communication between cti's and cti-chain. */ - SEM_BRANCH_TYPE pbb_br_type; - PCADDR pbb_br_npc; -#endif - - - if (! CPU_IDESC_SEM_INIT_P (current_cpu)) - { - /* ??? 'twould be nice to move this up a level and only call it once. - On the other hand, in the "let's go fast" case the test is only done - once per pbb (since we only return to the main loop at the end of - a pbb). And in the "let's run until we're done" case we don't return - until the program exits. */ - -#if WITH_SEM_SWITCH_FULL -#if defined (__GNUC__) -/* ??? Later maybe paste sem-switch.c in when building mainloop.c. */ -#define DEFINE_LABELS -#include "sem-media-switch.c" -#endif -#else - sh64_media_sem_init_idesc_table (current_cpu); -#endif - - /* Initialize the "begin (compile) a pbb" virtual insn. */ - vpc = CPU_SCACHE_PBB_BEGIN (current_cpu); - SEM_SET_FULL_CODE (SEM_ARGBUF (vpc), - & CPU_IDESC (current_cpu) [SH64_MEDIA_INSN_X_BEGIN]); - vpc->argbuf.idesc = & CPU_IDESC (current_cpu) [SH64_MEDIA_INSN_X_BEGIN]; - - CPU_IDESC_SEM_INIT_P (current_cpu) = 1; - } - - CPU_RUNNING_P (current_cpu) = 1; - /* ??? In the case where we're returning to the main loop after every - pbb we don't want to call pbb_begin each time (which hashes on the pc - and does a table lookup). A way to speed this up is to save vpc - between calls. */ - vpc = sh64_media_pbb_begin (current_cpu, FAST_P); - - do - { -/* begin full-exec-pbb */ -{ -#if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST) -#define DEFINE_SWITCH -#define WITH_ISA_COMPACT -#include "sem-media-switch.c" -#else - vpc = execute (current_cpu, vpc, FAST_P); -#endif -} -/* end full-exec-pbb */ - } - while (CPU_RUNNING_P (current_cpu)); -} - -#undef FAST_P - - -#define FAST_P 1 - -void -sh64_media_engine_run_fast (SIM_CPU *current_cpu) -{ - SIM_DESC current_state = CPU_STATE (current_cpu); - SCACHE *scache = CPU_SCACHE_CACHE (current_cpu); - /* virtual program counter */ - SEM_PC vpc; -#if WITH_SEM_SWITCH_FAST - /* For communication between cti's and cti-chain. */ - SEM_BRANCH_TYPE pbb_br_type; - PCADDR pbb_br_npc; -#endif - - - if (! CPU_IDESC_SEM_INIT_P (current_cpu)) - { - /* ??? 'twould be nice to move this up a level and only call it once. - On the other hand, in the "let's go fast" case the test is only done - once per pbb (since we only return to the main loop at the end of - a pbb). And in the "let's run until we're done" case we don't return - until the program exits. */ - -#if WITH_SEM_SWITCH_FAST -#if defined (__GNUC__) -/* ??? Later maybe paste sem-switch.c in when building mainloop.c. */ -#define DEFINE_LABELS -#include "sem-media-switch.c" -#endif -#else - sh64_media_semf_init_idesc_table (current_cpu); -#endif - - /* Initialize the "begin (compile) a pbb" virtual insn. */ - vpc = CPU_SCACHE_PBB_BEGIN (current_cpu); - SEM_SET_FAST_CODE (SEM_ARGBUF (vpc), - & CPU_IDESC (current_cpu) [SH64_MEDIA_INSN_X_BEGIN]); - vpc->argbuf.idesc = & CPU_IDESC (current_cpu) [SH64_MEDIA_INSN_X_BEGIN]; - - CPU_IDESC_SEM_INIT_P (current_cpu) = 1; - } - - CPU_RUNNING_P (current_cpu) = 1; - /* ??? In the case where we're returning to the main loop after every - pbb we don't want to call pbb_begin each time (which hashes on the pc - and does a table lookup). A way to speed this up is to save vpc - between calls. */ - vpc = sh64_media_pbb_begin (current_cpu, FAST_P); - - do - { -/* begin fast-exec-pbb */ -{ -#if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST) -#define DEFINE_SWITCH -#define WITH_ISA_COMPACT -#include "sem-media-switch.c" -#else - vpc = execute (current_cpu, vpc, FAST_P); -#endif -} -/* end fast-exec-pbb */ - } - while (CPU_RUNNING_P (current_cpu)); -} - -#undef FAST_P - diff --git a/sim/sh64/sem-compact-switch.c b/sim/sh64/sem-compact-switch.c deleted file mode 100644 index 59270e83905..00000000000 --- a/sim/sh64/sem-compact-switch.c +++ /dev/null @@ -1,4941 +0,0 @@ -/* Simulator instruction semantics for sh64. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifdef DEFINE_LABELS - - /* The labels have the case they have because the enum of insn types - is all uppercase and in the non-stdc case the insn symbol is built - into the enum name. */ - - static struct { - int index; - void *label; - } labels[] = { - { SH64_COMPACT_INSN_X_INVALID, && case_sem_INSN_X_INVALID }, - { SH64_COMPACT_INSN_X_AFTER, && case_sem_INSN_X_AFTER }, - { SH64_COMPACT_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE }, - { SH64_COMPACT_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN }, - { SH64_COMPACT_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN }, - { SH64_COMPACT_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN }, - { SH64_COMPACT_INSN_ADD_COMPACT, && case_sem_INSN_ADD_COMPACT }, - { SH64_COMPACT_INSN_ADDI_COMPACT, && case_sem_INSN_ADDI_COMPACT }, - { SH64_COMPACT_INSN_ADDC_COMPACT, && case_sem_INSN_ADDC_COMPACT }, - { SH64_COMPACT_INSN_ADDV_COMPACT, && case_sem_INSN_ADDV_COMPACT }, - { SH64_COMPACT_INSN_AND_COMPACT, && case_sem_INSN_AND_COMPACT }, - { SH64_COMPACT_INSN_ANDI_COMPACT, && case_sem_INSN_ANDI_COMPACT }, - { SH64_COMPACT_INSN_ANDB_COMPACT, && case_sem_INSN_ANDB_COMPACT }, - { SH64_COMPACT_INSN_BF_COMPACT, && case_sem_INSN_BF_COMPACT }, - { SH64_COMPACT_INSN_BFS_COMPACT, && case_sem_INSN_BFS_COMPACT }, - { SH64_COMPACT_INSN_BRA_COMPACT, && case_sem_INSN_BRA_COMPACT }, - { SH64_COMPACT_INSN_BRAF_COMPACT, && case_sem_INSN_BRAF_COMPACT }, - { SH64_COMPACT_INSN_BRK_COMPACT, && case_sem_INSN_BRK_COMPACT }, - { SH64_COMPACT_INSN_BSR_COMPACT, && case_sem_INSN_BSR_COMPACT }, - { SH64_COMPACT_INSN_BSRF_COMPACT, && case_sem_INSN_BSRF_COMPACT }, - { SH64_COMPACT_INSN_BT_COMPACT, && case_sem_INSN_BT_COMPACT }, - { SH64_COMPACT_INSN_BTS_COMPACT, && case_sem_INSN_BTS_COMPACT }, - { SH64_COMPACT_INSN_CLRMAC_COMPACT, && case_sem_INSN_CLRMAC_COMPACT }, - { SH64_COMPACT_INSN_CLRS_COMPACT, && case_sem_INSN_CLRS_COMPACT }, - { SH64_COMPACT_INSN_CLRT_COMPACT, && case_sem_INSN_CLRT_COMPACT }, - { SH64_COMPACT_INSN_CMPEQ_COMPACT, && case_sem_INSN_CMPEQ_COMPACT }, - { SH64_COMPACT_INSN_CMPEQI_COMPACT, && case_sem_INSN_CMPEQI_COMPACT }, - { SH64_COMPACT_INSN_CMPGE_COMPACT, && case_sem_INSN_CMPGE_COMPACT }, - { SH64_COMPACT_INSN_CMPGT_COMPACT, && case_sem_INSN_CMPGT_COMPACT }, - { SH64_COMPACT_INSN_CMPHI_COMPACT, && case_sem_INSN_CMPHI_COMPACT }, - { SH64_COMPACT_INSN_CMPHS_COMPACT, && case_sem_INSN_CMPHS_COMPACT }, - { SH64_COMPACT_INSN_CMPPL_COMPACT, && case_sem_INSN_CMPPL_COMPACT }, - { SH64_COMPACT_INSN_CMPPZ_COMPACT, && case_sem_INSN_CMPPZ_COMPACT }, - { SH64_COMPACT_INSN_CMPSTR_COMPACT, && case_sem_INSN_CMPSTR_COMPACT }, - { SH64_COMPACT_INSN_DIV0S_COMPACT, && case_sem_INSN_DIV0S_COMPACT }, - { SH64_COMPACT_INSN_DIV0U_COMPACT, && case_sem_INSN_DIV0U_COMPACT }, - { SH64_COMPACT_INSN_DIV1_COMPACT, && case_sem_INSN_DIV1_COMPACT }, - { SH64_COMPACT_INSN_DMULSL_COMPACT, && case_sem_INSN_DMULSL_COMPACT }, - { SH64_COMPACT_INSN_DMULUL_COMPACT, && case_sem_INSN_DMULUL_COMPACT }, - { SH64_COMPACT_INSN_DT_COMPACT, && case_sem_INSN_DT_COMPACT }, - { SH64_COMPACT_INSN_EXTSB_COMPACT, && case_sem_INSN_EXTSB_COMPACT }, - { SH64_COMPACT_INSN_EXTSW_COMPACT, && case_sem_INSN_EXTSW_COMPACT }, - { SH64_COMPACT_INSN_EXTUB_COMPACT, && case_sem_INSN_EXTUB_COMPACT }, - { SH64_COMPACT_INSN_EXTUW_COMPACT, && case_sem_INSN_EXTUW_COMPACT }, - { SH64_COMPACT_INSN_FABS_COMPACT, && case_sem_INSN_FABS_COMPACT }, - { SH64_COMPACT_INSN_FADD_COMPACT, && case_sem_INSN_FADD_COMPACT }, - { SH64_COMPACT_INSN_FCMPEQ_COMPACT, && case_sem_INSN_FCMPEQ_COMPACT }, - { SH64_COMPACT_INSN_FCMPGT_COMPACT, && case_sem_INSN_FCMPGT_COMPACT }, - { SH64_COMPACT_INSN_FCNVDS_COMPACT, && case_sem_INSN_FCNVDS_COMPACT }, - { SH64_COMPACT_INSN_FCNVSD_COMPACT, && case_sem_INSN_FCNVSD_COMPACT }, - { SH64_COMPACT_INSN_FDIV_COMPACT, && case_sem_INSN_FDIV_COMPACT }, - { SH64_COMPACT_INSN_FIPR_COMPACT, && case_sem_INSN_FIPR_COMPACT }, - { SH64_COMPACT_INSN_FLDS_COMPACT, && case_sem_INSN_FLDS_COMPACT }, - { SH64_COMPACT_INSN_FLDI0_COMPACT, && case_sem_INSN_FLDI0_COMPACT }, - { SH64_COMPACT_INSN_FLDI1_COMPACT, && case_sem_INSN_FLDI1_COMPACT }, - { SH64_COMPACT_INSN_FLOAT_COMPACT, && case_sem_INSN_FLOAT_COMPACT }, - { SH64_COMPACT_INSN_FMAC_COMPACT, && case_sem_INSN_FMAC_COMPACT }, - { SH64_COMPACT_INSN_FMOV1_COMPACT, && case_sem_INSN_FMOV1_COMPACT }, - { SH64_COMPACT_INSN_FMOV2_COMPACT, && case_sem_INSN_FMOV2_COMPACT }, - { SH64_COMPACT_INSN_FMOV3_COMPACT, && case_sem_INSN_FMOV3_COMPACT }, - { SH64_COMPACT_INSN_FMOV4_COMPACT, && case_sem_INSN_FMOV4_COMPACT }, - { SH64_COMPACT_INSN_FMOV5_COMPACT, && case_sem_INSN_FMOV5_COMPACT }, - { SH64_COMPACT_INSN_FMOV6_COMPACT, && case_sem_INSN_FMOV6_COMPACT }, - { SH64_COMPACT_INSN_FMOV7_COMPACT, && case_sem_INSN_FMOV7_COMPACT }, - { SH64_COMPACT_INSN_FMUL_COMPACT, && case_sem_INSN_FMUL_COMPACT }, - { SH64_COMPACT_INSN_FNEG_COMPACT, && case_sem_INSN_FNEG_COMPACT }, - { SH64_COMPACT_INSN_FRCHG_COMPACT, && case_sem_INSN_FRCHG_COMPACT }, - { SH64_COMPACT_INSN_FSCHG_COMPACT, && case_sem_INSN_FSCHG_COMPACT }, - { SH64_COMPACT_INSN_FSQRT_COMPACT, && case_sem_INSN_FSQRT_COMPACT }, - { SH64_COMPACT_INSN_FSTS_COMPACT, && case_sem_INSN_FSTS_COMPACT }, - { SH64_COMPACT_INSN_FSUB_COMPACT, && case_sem_INSN_FSUB_COMPACT }, - { SH64_COMPACT_INSN_FTRC_COMPACT, && case_sem_INSN_FTRC_COMPACT }, - { SH64_COMPACT_INSN_FTRV_COMPACT, && case_sem_INSN_FTRV_COMPACT }, - { SH64_COMPACT_INSN_JMP_COMPACT, && case_sem_INSN_JMP_COMPACT }, - { SH64_COMPACT_INSN_JSR_COMPACT, && case_sem_INSN_JSR_COMPACT }, - { SH64_COMPACT_INSN_LDC_COMPACT, && case_sem_INSN_LDC_COMPACT }, - { SH64_COMPACT_INSN_LDCL_COMPACT, && case_sem_INSN_LDCL_COMPACT }, - { SH64_COMPACT_INSN_LDS_FPSCR_COMPACT, && case_sem_INSN_LDS_FPSCR_COMPACT }, - { SH64_COMPACT_INSN_LDSL_FPSCR_COMPACT, && case_sem_INSN_LDSL_FPSCR_COMPACT }, - { SH64_COMPACT_INSN_LDS_FPUL_COMPACT, && case_sem_INSN_LDS_FPUL_COMPACT }, - { SH64_COMPACT_INSN_LDSL_FPUL_COMPACT, && case_sem_INSN_LDSL_FPUL_COMPACT }, - { SH64_COMPACT_INSN_LDS_MACH_COMPACT, && case_sem_INSN_LDS_MACH_COMPACT }, - { SH64_COMPACT_INSN_LDSL_MACH_COMPACT, && case_sem_INSN_LDSL_MACH_COMPACT }, - { SH64_COMPACT_INSN_LDS_MACL_COMPACT, && case_sem_INSN_LDS_MACL_COMPACT }, - { SH64_COMPACT_INSN_LDSL_MACL_COMPACT, && case_sem_INSN_LDSL_MACL_COMPACT }, - { SH64_COMPACT_INSN_LDS_PR_COMPACT, && case_sem_INSN_LDS_PR_COMPACT }, - { SH64_COMPACT_INSN_LDSL_PR_COMPACT, && case_sem_INSN_LDSL_PR_COMPACT }, - { SH64_COMPACT_INSN_MACL_COMPACT, && case_sem_INSN_MACL_COMPACT }, - { SH64_COMPACT_INSN_MACW_COMPACT, && case_sem_INSN_MACW_COMPACT }, - { SH64_COMPACT_INSN_MOV_COMPACT, && case_sem_INSN_MOV_COMPACT }, - { SH64_COMPACT_INSN_MOVI_COMPACT, && case_sem_INSN_MOVI_COMPACT }, - { SH64_COMPACT_INSN_MOVB1_COMPACT, && case_sem_INSN_MOVB1_COMPACT }, - { SH64_COMPACT_INSN_MOVB2_COMPACT, && case_sem_INSN_MOVB2_COMPACT }, - { SH64_COMPACT_INSN_MOVB3_COMPACT, && case_sem_INSN_MOVB3_COMPACT }, - { SH64_COMPACT_INSN_MOVB4_COMPACT, && case_sem_INSN_MOVB4_COMPACT }, - { SH64_COMPACT_INSN_MOVB5_COMPACT, && case_sem_INSN_MOVB5_COMPACT }, - { SH64_COMPACT_INSN_MOVB6_COMPACT, && case_sem_INSN_MOVB6_COMPACT }, - { SH64_COMPACT_INSN_MOVB7_COMPACT, && case_sem_INSN_MOVB7_COMPACT }, - { SH64_COMPACT_INSN_MOVB8_COMPACT, && case_sem_INSN_MOVB8_COMPACT }, - { SH64_COMPACT_INSN_MOVB9_COMPACT, && case_sem_INSN_MOVB9_COMPACT }, - { SH64_COMPACT_INSN_MOVB10_COMPACT, && case_sem_INSN_MOVB10_COMPACT }, - { SH64_COMPACT_INSN_MOVL1_COMPACT, && case_sem_INSN_MOVL1_COMPACT }, - { SH64_COMPACT_INSN_MOVL2_COMPACT, && case_sem_INSN_MOVL2_COMPACT }, - { SH64_COMPACT_INSN_MOVL3_COMPACT, && case_sem_INSN_MOVL3_COMPACT }, - { SH64_COMPACT_INSN_MOVL4_COMPACT, && case_sem_INSN_MOVL4_COMPACT }, - { SH64_COMPACT_INSN_MOVL5_COMPACT, && case_sem_INSN_MOVL5_COMPACT }, - { SH64_COMPACT_INSN_MOVL6_COMPACT, && case_sem_INSN_MOVL6_COMPACT }, - { SH64_COMPACT_INSN_MOVL7_COMPACT, && case_sem_INSN_MOVL7_COMPACT }, - { SH64_COMPACT_INSN_MOVL8_COMPACT, && case_sem_INSN_MOVL8_COMPACT }, - { SH64_COMPACT_INSN_MOVL9_COMPACT, && case_sem_INSN_MOVL9_COMPACT }, - { SH64_COMPACT_INSN_MOVL10_COMPACT, && case_sem_INSN_MOVL10_COMPACT }, - { SH64_COMPACT_INSN_MOVL11_COMPACT, && case_sem_INSN_MOVL11_COMPACT }, - { SH64_COMPACT_INSN_MOVW1_COMPACT, && case_sem_INSN_MOVW1_COMPACT }, - { SH64_COMPACT_INSN_MOVW2_COMPACT, && case_sem_INSN_MOVW2_COMPACT }, - { SH64_COMPACT_INSN_MOVW3_COMPACT, && case_sem_INSN_MOVW3_COMPACT }, - { SH64_COMPACT_INSN_MOVW4_COMPACT, && case_sem_INSN_MOVW4_COMPACT }, - { SH64_COMPACT_INSN_MOVW5_COMPACT, && case_sem_INSN_MOVW5_COMPACT }, - { SH64_COMPACT_INSN_MOVW6_COMPACT, && case_sem_INSN_MOVW6_COMPACT }, - { SH64_COMPACT_INSN_MOVW7_COMPACT, && case_sem_INSN_MOVW7_COMPACT }, - { SH64_COMPACT_INSN_MOVW8_COMPACT, && case_sem_INSN_MOVW8_COMPACT }, - { SH64_COMPACT_INSN_MOVW9_COMPACT, && case_sem_INSN_MOVW9_COMPACT }, - { SH64_COMPACT_INSN_MOVW10_COMPACT, && case_sem_INSN_MOVW10_COMPACT }, - { SH64_COMPACT_INSN_MOVW11_COMPACT, && case_sem_INSN_MOVW11_COMPACT }, - { SH64_COMPACT_INSN_MOVA_COMPACT, && case_sem_INSN_MOVA_COMPACT }, - { SH64_COMPACT_INSN_MOVCAL_COMPACT, && case_sem_INSN_MOVCAL_COMPACT }, - { SH64_COMPACT_INSN_MOVT_COMPACT, && case_sem_INSN_MOVT_COMPACT }, - { SH64_COMPACT_INSN_MULL_COMPACT, && case_sem_INSN_MULL_COMPACT }, - { SH64_COMPACT_INSN_MULSW_COMPACT, && case_sem_INSN_MULSW_COMPACT }, - { SH64_COMPACT_INSN_MULUW_COMPACT, && case_sem_INSN_MULUW_COMPACT }, - { SH64_COMPACT_INSN_NEG_COMPACT, && case_sem_INSN_NEG_COMPACT }, - { SH64_COMPACT_INSN_NEGC_COMPACT, && case_sem_INSN_NEGC_COMPACT }, - { SH64_COMPACT_INSN_NOP_COMPACT, && case_sem_INSN_NOP_COMPACT }, - { SH64_COMPACT_INSN_NOT_COMPACT, && case_sem_INSN_NOT_COMPACT }, - { SH64_COMPACT_INSN_OCBI_COMPACT, && case_sem_INSN_OCBI_COMPACT }, - { SH64_COMPACT_INSN_OCBP_COMPACT, && case_sem_INSN_OCBP_COMPACT }, - { SH64_COMPACT_INSN_OCBWB_COMPACT, && case_sem_INSN_OCBWB_COMPACT }, - { SH64_COMPACT_INSN_OR_COMPACT, && case_sem_INSN_OR_COMPACT }, - { SH64_COMPACT_INSN_ORI_COMPACT, && case_sem_INSN_ORI_COMPACT }, - { SH64_COMPACT_INSN_ORB_COMPACT, && case_sem_INSN_ORB_COMPACT }, - { SH64_COMPACT_INSN_PREF_COMPACT, && case_sem_INSN_PREF_COMPACT }, - { SH64_COMPACT_INSN_ROTCL_COMPACT, && case_sem_INSN_ROTCL_COMPACT }, - { SH64_COMPACT_INSN_ROTCR_COMPACT, && case_sem_INSN_ROTCR_COMPACT }, - { SH64_COMPACT_INSN_ROTL_COMPACT, && case_sem_INSN_ROTL_COMPACT }, - { SH64_COMPACT_INSN_ROTR_COMPACT, && case_sem_INSN_ROTR_COMPACT }, - { SH64_COMPACT_INSN_RTS_COMPACT, && case_sem_INSN_RTS_COMPACT }, - { SH64_COMPACT_INSN_SETS_COMPACT, && case_sem_INSN_SETS_COMPACT }, - { SH64_COMPACT_INSN_SETT_COMPACT, && case_sem_INSN_SETT_COMPACT }, - { SH64_COMPACT_INSN_SHAD_COMPACT, && case_sem_INSN_SHAD_COMPACT }, - { SH64_COMPACT_INSN_SHAL_COMPACT, && case_sem_INSN_SHAL_COMPACT }, - { SH64_COMPACT_INSN_SHAR_COMPACT, && case_sem_INSN_SHAR_COMPACT }, - { SH64_COMPACT_INSN_SHLD_COMPACT, && case_sem_INSN_SHLD_COMPACT }, - { SH64_COMPACT_INSN_SHLL_COMPACT, && case_sem_INSN_SHLL_COMPACT }, - { SH64_COMPACT_INSN_SHLL2_COMPACT, && case_sem_INSN_SHLL2_COMPACT }, - { SH64_COMPACT_INSN_SHLL8_COMPACT, && case_sem_INSN_SHLL8_COMPACT }, - { SH64_COMPACT_INSN_SHLL16_COMPACT, && case_sem_INSN_SHLL16_COMPACT }, - { SH64_COMPACT_INSN_SHLR_COMPACT, && case_sem_INSN_SHLR_COMPACT }, - { SH64_COMPACT_INSN_SHLR2_COMPACT, && case_sem_INSN_SHLR2_COMPACT }, - { SH64_COMPACT_INSN_SHLR8_COMPACT, && case_sem_INSN_SHLR8_COMPACT }, - { SH64_COMPACT_INSN_SHLR16_COMPACT, && case_sem_INSN_SHLR16_COMPACT }, - { SH64_COMPACT_INSN_STC_GBR_COMPACT, && case_sem_INSN_STC_GBR_COMPACT }, - { SH64_COMPACT_INSN_STCL_GBR_COMPACT, && case_sem_INSN_STCL_GBR_COMPACT }, - { SH64_COMPACT_INSN_STS_FPSCR_COMPACT, && case_sem_INSN_STS_FPSCR_COMPACT }, - { SH64_COMPACT_INSN_STSL_FPSCR_COMPACT, && case_sem_INSN_STSL_FPSCR_COMPACT }, - { SH64_COMPACT_INSN_STS_FPUL_COMPACT, && case_sem_INSN_STS_FPUL_COMPACT }, - { SH64_COMPACT_INSN_STSL_FPUL_COMPACT, && case_sem_INSN_STSL_FPUL_COMPACT }, - { SH64_COMPACT_INSN_STS_MACH_COMPACT, && case_sem_INSN_STS_MACH_COMPACT }, - { SH64_COMPACT_INSN_STSL_MACH_COMPACT, && case_sem_INSN_STSL_MACH_COMPACT }, - { SH64_COMPACT_INSN_STS_MACL_COMPACT, && case_sem_INSN_STS_MACL_COMPACT }, - { SH64_COMPACT_INSN_STSL_MACL_COMPACT, && case_sem_INSN_STSL_MACL_COMPACT }, - { SH64_COMPACT_INSN_STS_PR_COMPACT, && case_sem_INSN_STS_PR_COMPACT }, - { SH64_COMPACT_INSN_STSL_PR_COMPACT, && case_sem_INSN_STSL_PR_COMPACT }, - { SH64_COMPACT_INSN_SUB_COMPACT, && case_sem_INSN_SUB_COMPACT }, - { SH64_COMPACT_INSN_SUBC_COMPACT, && case_sem_INSN_SUBC_COMPACT }, - { SH64_COMPACT_INSN_SUBV_COMPACT, && case_sem_INSN_SUBV_COMPACT }, - { SH64_COMPACT_INSN_SWAPB_COMPACT, && case_sem_INSN_SWAPB_COMPACT }, - { SH64_COMPACT_INSN_SWAPW_COMPACT, && case_sem_INSN_SWAPW_COMPACT }, - { SH64_COMPACT_INSN_TASB_COMPACT, && case_sem_INSN_TASB_COMPACT }, - { SH64_COMPACT_INSN_TRAPA_COMPACT, && case_sem_INSN_TRAPA_COMPACT }, - { SH64_COMPACT_INSN_TST_COMPACT, && case_sem_INSN_TST_COMPACT }, - { SH64_COMPACT_INSN_TSTI_COMPACT, && case_sem_INSN_TSTI_COMPACT }, - { SH64_COMPACT_INSN_TSTB_COMPACT, && case_sem_INSN_TSTB_COMPACT }, - { SH64_COMPACT_INSN_XOR_COMPACT, && case_sem_INSN_XOR_COMPACT }, - { SH64_COMPACT_INSN_XORI_COMPACT, && case_sem_INSN_XORI_COMPACT }, - { SH64_COMPACT_INSN_XORB_COMPACT, && case_sem_INSN_XORB_COMPACT }, - { SH64_COMPACT_INSN_XTRCT_COMPACT, && case_sem_INSN_XTRCT_COMPACT }, - { 0, 0 } - }; - int i; - - for (i = 0; labels[i].label != 0; ++i) - { -#if FAST_P - CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; -#else - CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; -#endif - } - -#undef DEFINE_LABELS -#endif /* DEFINE_LABELS */ - -#ifdef DEFINE_SWITCH - -/* If hyper-fast [well not unnecessarily slow] execution is selected, turn - off frills like tracing and profiling. */ -/* FIXME: A better way would be to have TRACE_RESULT check for something - that can cause it to be optimized out. Another way would be to emit - special handlers into the instruction "stream". */ - -#if FAST_P -#undef TRACE_RESULT -#define TRACE_RESULT(cpu, abuf, name, type, val) -#endif - -#undef GET_ATTR -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) -#else -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr) -#endif - -{ - -#if WITH_SCACHE_PBB - -/* Branch to next handler without going around main loop. */ -#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case -SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) - -#else /* ! WITH_SCACHE_PBB */ - -#define NEXT(vpc) BREAK (sem) -#ifdef __GNUC__ -#if FAST_P - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab) -#else - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab) -#endif -#else - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num) -#endif - -#endif /* ! WITH_SCACHE_PBB */ - - { - - CASE (sem, INSN_X_INVALID) : /* --invalid-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { - /* Update the recorded pc in the cpu state struct. - Only necessary for WITH_SCACHE case, but to avoid the - conditional compilation .... */ - SET_H_PC (pc); - /* Virtual insns have zero size. Overwrite vpc with address of next insn - using the default-insn-bitsize spec. When executing insns in parallel - we may want to queue the fault and continue execution. */ - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_AFTER) : /* --after-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_SH64_COMPACT - sh64_compact_pbb_after (current_cpu, sem_arg); -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_BEFORE) : /* --before-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_SH64_COMPACT - sh64_compact_pbb_before (current_cpu, sem_arg); -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_SH64_COMPACT -#ifdef DEFINE_SWITCH - vpc = sh64_compact_pbb_cti_chain (current_cpu, sem_arg, - pbb_br_type, pbb_br_npc); - BREAK (sem); -#else - /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ - vpc = sh64_compact_pbb_cti_chain (current_cpu, sem_arg, - CPU_PBB_BR_TYPE (current_cpu), - CPU_PBB_BR_NPC (current_cpu)); -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_CHAIN) : /* --chain-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_SH64_COMPACT - vpc = sh64_compact_pbb_chain (current_cpu, sem_arg); -#ifdef DEFINE_SWITCH - BREAK (sem); -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_BEGIN) : /* --begin-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_SH64_COMPACT -#if defined DEFINE_SWITCH || defined FAST_P - /* In the switch case FAST_P is a constant, allowing several optimizations - in any called inline functions. */ - vpc = sh64_compact_pbb_begin (current_cpu, FAST_P); -#else -#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ - vpc = sh64_compact_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); -#else - vpc = sh64_compact_pbb_begin (current_cpu, 0); -#endif -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADD_COMPACT) : /* add $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDI_COMPACT) : /* add #$imm8, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), EXTQISI (ANDQI (FLD (f_imm8), 255))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDC_COMPACT) : /* addc $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_flag; - tmp_flag = ADDCFSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); - { - SI opval = ADDCSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = tmp_flag; - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDV_COMPACT) : /* addv $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_t; - tmp_t = ADDOFSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), 0); - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = tmp_t; - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_AND_COMPACT) : /* and $rm64, $rn64 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = ANDDI (GET_H_GR (FLD (f_rm)), GET_H_GR (FLD (f_rn))); - SET_H_GR (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn64", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ANDI_COMPACT) : /* and #$uimm8, r0 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ANDSI (GET_H_GRC (((UINT) 0)), ZEXTSIDI (FLD (f_imm8))); - SET_H_GRC (((UINT) 0), opval); - TRACE_RESULT (current_cpu, abuf, "r0", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ANDB_COMPACT) : /* and.b #$imm8, @(r0, gbr) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - UQI tmp_data; - tmp_addr = ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GBR ()); - tmp_data = ANDQI (GETMEMUQI (current_cpu, pc, tmp_addr), FLD (f_imm8)); - { - UQI opval = tmp_data; - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BF_COMPACT) : /* bf $disp8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bf_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (GET_H_TBIT ())) { - { - UDI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BFS_COMPACT) : /* bf/s $disp8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bf_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (GET_H_TBIT ())) { -{ - { - UDI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BRA_COMPACT) : /* bra $disp12 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bra_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - UDI opval = FLD (i_disp12); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BRAF_COMPACT) : /* braf $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - UDI opval = ADDDI (EXTSIDI (GET_H_GRC (FLD (f_rn))), ADDDI (pc, 4)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BRK_COMPACT) : /* brk */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -sh64_break (current_cpu, pc); - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BSR_COMPACT) : /* bsr $disp12 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bra_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -{ - { - SI opval = ADDDI (pc, 4); - SET_H_PR (opval); - TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); - } - { - UDI opval = FLD (i_disp12); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BSRF_COMPACT) : /* bsrf $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -{ - { - SI opval = ADDDI (pc, 4); - SET_H_PR (opval); - TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); - } - { - UDI opval = ADDDI (EXTSIDI (GET_H_GRC (FLD (f_rn))), ADDDI (pc, 4)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BT_COMPACT) : /* bt $disp8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bf_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_TBIT ()) { - { - UDI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BTS_COMPACT) : /* bt/s $disp8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bf_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_TBIT ()) { -{ - { - UDI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CLRMAC_COMPACT) : /* clrmac */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = 0; - SET_H_MACL (opval); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } - { - SI opval = 0; - SET_H_MACH (opval); - TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CLRS_COMPACT) : /* clrs */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = 0; - SET_H_SBIT (opval); - TRACE_RESULT (current_cpu, abuf, "sbit", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CLRT_COMPACT) : /* clrt */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = 0; - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPEQ_COMPACT) : /* cmp/eq $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = EQSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPEQI_COMPACT) : /* cmp/eq #$imm8, r0 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = EQSI (GET_H_GRC (((UINT) 0)), EXTQISI (ANDQI (FLD (f_imm8), 255))); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPGE_COMPACT) : /* cmp/ge $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = GESI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPGT_COMPACT) : /* cmp/gt $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = GTSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPHI_COMPACT) : /* cmp/hi $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = GTUSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPHS_COMPACT) : /* cmp/hs $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = GEUSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPPL_COMPACT) : /* cmp/pl $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = GTSI (GET_H_GRC (FLD (f_rn)), 0); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPPZ_COMPACT) : /* cmp/pz $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = GESI (GET_H_GRC (FLD (f_rn)), 0); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPSTR_COMPACT) : /* cmp/str $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_t; - SI tmp_temp; - tmp_temp = XORSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))); - tmp_t = EQSI (ANDSI (tmp_temp, 0xff000000), 0); - tmp_t = ORBI (EQSI (ANDSI (tmp_temp, 16711680), 0), tmp_t); - tmp_t = ORBI (EQSI (ANDSI (tmp_temp, 65280), 0), tmp_t); - tmp_t = ORBI (EQSI (ANDSI (tmp_temp, 255), 0), tmp_t); - { - BI opval = ((GTUBI (tmp_t, 0)) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIV0S_COMPACT) : /* div0s $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 31); - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } - { - BI opval = SRLSI (GET_H_GRC (FLD (f_rm)), 31); - SET_H_MBIT (opval); - TRACE_RESULT (current_cpu, abuf, "mbit", 'x', opval); - } - { - BI opval = ((EQSI (SRLSI (GET_H_GRC (FLD (f_rm)), 31), SRLSI (GET_H_GRC (FLD (f_rn)), 31))) ? (0) : (1)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIV0U_COMPACT) : /* div0u */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = 0; - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - { - BI opval = 0; - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } - { - BI opval = 0; - SET_H_MBIT (opval); - TRACE_RESULT (current_cpu, abuf, "mbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIV1_COMPACT) : /* div1 $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_oldq; - SI tmp_tmp0; - UQI tmp_tmp1; - tmp_oldq = GET_H_QBIT (); - { - BI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 31); - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } - { - SI opval = ORSI (SLLSI (GET_H_GRC (FLD (f_rn)), 1), ZEXTBISI (GET_H_TBIT ())); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -if (NOTBI (tmp_oldq)) { -if (NOTBI (GET_H_MBIT ())) { -{ - tmp_tmp0 = GET_H_GRC (FLD (f_rn)); - { - SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - tmp_tmp1 = GTUSI (GET_H_GRC (FLD (f_rn)), tmp_tmp0); -if (NOTBI (GET_H_QBIT ())) { - { - BI opval = ((tmp_tmp1) ? (1) : (0)); - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } -} else { - { - BI opval = ((EQQI (tmp_tmp1, 0)) ? (1) : (0)); - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } -} -} -} else { -{ - tmp_tmp0 = GET_H_GRC (FLD (f_rn)); - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - tmp_tmp1 = LTUSI (GET_H_GRC (FLD (f_rn)), tmp_tmp0); -if (NOTBI (GET_H_QBIT ())) { - { - BI opval = ((EQQI (tmp_tmp1, 0)) ? (1) : (0)); - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } -} else { - { - BI opval = ((tmp_tmp1) ? (1) : (0)); - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } -} -} -} -} else { -if (NOTBI (GET_H_MBIT ())) { -{ - tmp_tmp0 = GET_H_GRC (FLD (f_rn)); - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - tmp_tmp1 = LTUSI (GET_H_GRC (FLD (f_rn)), tmp_tmp0); -if (NOTBI (GET_H_QBIT ())) { - { - BI opval = ((tmp_tmp1) ? (1) : (0)); - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } -} else { - { - BI opval = ((EQQI (tmp_tmp1, 0)) ? (1) : (0)); - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } -} -} -} else { -{ - tmp_tmp0 = GET_H_GRC (FLD (f_rn)); - { - SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - tmp_tmp1 = GTUSI (GET_H_GRC (FLD (f_rn)), tmp_tmp0); -if (NOTBI (GET_H_QBIT ())) { - { - BI opval = ((EQQI (tmp_tmp1, 0)) ? (1) : (0)); - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } -} else { - { - BI opval = ((tmp_tmp1) ? (1) : (0)); - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } -} -} -} -} - { - BI opval = ((EQBI (GET_H_QBIT (), GET_H_MBIT ())) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMULSL_COMPACT) : /* dmuls.l $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_result; - tmp_result = MULDI (EXTSIDI (GET_H_GRC (FLD (f_rm))), EXTSIDI (GET_H_GRC (FLD (f_rn)))); - { - SI opval = SUBWORDDISI (tmp_result, 0); - SET_H_MACH (opval); - TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); - } - { - SI opval = SUBWORDDISI (tmp_result, 1); - SET_H_MACL (opval); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMULUL_COMPACT) : /* dmulu.l $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_result; - tmp_result = MULDI (ZEXTSIDI (GET_H_GRC (FLD (f_rm))), ZEXTSIDI (GET_H_GRC (FLD (f_rn)))); - { - SI opval = SUBWORDDISI (tmp_result, 0); - SET_H_MACH (opval); - TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); - } - { - SI opval = SUBWORDDISI (tmp_result, 1); - SET_H_MACL (opval); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DT_COMPACT) : /* dt $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), 1); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = EQSI (GET_H_GRC (FLD (f_rn)), 0); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EXTSB_COMPACT) : /* exts.b $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTQISI (SUBWORDSIQI (GET_H_GRC (FLD (f_rm)), 3)); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EXTSW_COMPACT) : /* exts.w $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1)); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EXTUB_COMPACT) : /* extu.b $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTQISI (SUBWORDSIQI (GET_H_GRC (FLD (f_rm)), 3)); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EXTUW_COMPACT) : /* extu.w $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1)); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FABS_COMPACT) : /* fabs $fsdn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_PRBIT ()) { - { - DF opval = sh64_fabsd (current_cpu, GET_H_DR (FLD (f_rn))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-fsdn", 'f', opval); - } -} else { - { - SF opval = sh64_fabss (current_cpu, GET_H_FRC (FLD (f_rn))); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "fsdn", 'f', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FADD_COMPACT) : /* fadd $fsdm, $fsdn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_PRBIT ()) { - { - DF opval = sh64_faddd (current_cpu, GET_H_DR (FLD (f_rm)), GET_H_DR (FLD (f_rn))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-fsdn", 'f', opval); - } -} else { - { - SF opval = sh64_fadds (current_cpu, GET_H_FRC (FLD (f_rm)), GET_H_FRC (FLD (f_rn))); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "fsdn", 'f', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FCMPEQ_COMPACT) : /* fcmp/eq $fsdm, $fsdn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_PRBIT ()) { - { - BI opval = sh64_fcmpeqd (current_cpu, GET_H_DR (FLD (f_rm)), GET_H_DR (FLD (f_rn))); - SET_H_TBIT (opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} else { - { - BI opval = sh64_fcmpeqs (current_cpu, GET_H_FRC (FLD (f_rm)), GET_H_FRC (FLD (f_rn))); - SET_H_TBIT (opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FCMPGT_COMPACT) : /* fcmp/gt $fsdm, $fsdn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_PRBIT ()) { - { - BI opval = sh64_fcmpgtd (current_cpu, GET_H_DR (FLD (f_rn)), GET_H_DR (FLD (f_rm))); - SET_H_TBIT (opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} else { - { - BI opval = sh64_fcmpgts (current_cpu, GET_H_FRC (FLD (f_rn)), GET_H_FRC (FLD (f_rm))); - SET_H_TBIT (opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FCNVDS_COMPACT) : /* fcnvds $drn, fpul */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fcnvds_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SF opval = sh64_fcnvds (current_cpu, GET_H_DRC (FLD (f_dn))); - CPU (h_fr[((UINT) 32)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fpul", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FCNVSD_COMPACT) : /* fcnvsd fpul, $drn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fcnvds_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DF opval = sh64_fcnvsd (current_cpu, CPU (h_fr[((UINT) 32)])); - SET_H_DRC (FLD (f_dn), opval); - TRACE_RESULT (current_cpu, abuf, "drn", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FDIV_COMPACT) : /* fdiv $fsdm, $fsdn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_PRBIT ()) { - { - DF opval = sh64_fdivd (current_cpu, GET_H_DR (FLD (f_rn)), GET_H_DR (FLD (f_rm))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-fsdn", 'f', opval); - } -} else { - { - SF opval = sh64_fdivs (current_cpu, GET_H_FRC (FLD (f_rn)), GET_H_FRC (FLD (f_rm))); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "fsdn", 'f', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FIPR_COMPACT) : /* fipr $fvm, $fvn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fipr_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_m; - QI tmp_n; - SF tmp_res; - tmp_m = FLD (f_vm); - tmp_n = FLD (f_vn); - tmp_res = sh64_fmuls (current_cpu, GET_H_FVC (FLD (f_vm)), GET_H_FVC (FLD (f_vn))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_FRC (ADDQI (tmp_m, 1)), GET_H_FRC (ADDQI (tmp_n, 1)))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_FRC (ADDQI (tmp_m, 2)), GET_H_FRC (ADDQI (tmp_n, 2)))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_FRC (ADDQI (tmp_m, 3)), GET_H_FRC (ADDQI (tmp_n, 3)))); - { - SF opval = tmp_res; - SET_H_FRC (ADDQI (tmp_n, 3), opval); - TRACE_RESULT (current_cpu, abuf, "frc-add--DFLT-n-3", 'f', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FLDS_COMPACT) : /* flds $frn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SF opval = GET_H_FRC (FLD (f_rn)); - CPU (h_fr[((UINT) 32)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fpul", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FLDI0_COMPACT) : /* fldi0 $frn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SF opval = sh64_fldi0 (current_cpu); - SET_H_FRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "frn", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FLDI1_COMPACT) : /* fldi1 $frn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SF opval = sh64_fldi1 (current_cpu); - SET_H_FRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "frn", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FLOAT_COMPACT) : /* float fpul, $fsdn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_PRBIT ()) { - { - DF opval = sh64_floatld (current_cpu, CPU (h_fr[((UINT) 32)])); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-fsdn", 'f', opval); - } -} else { - { - SF opval = sh64_floatls (current_cpu, CPU (h_fr[((UINT) 32)])); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "fsdn", 'f', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FMAC_COMPACT) : /* fmac fr0, $frm, $frn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SF opval = sh64_fmacs (current_cpu, GET_H_FRC (((UINT) 0)), GET_H_FRC (FLD (f_rm)), GET_H_FRC (FLD (f_rn))); - SET_H_FRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "frn", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FMOV1_COMPACT) : /* fmov $frm, $frn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (GET_H_SZBIT ())) { - { - SF opval = GET_H_FRC (FLD (f_rm)); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "frn", 'f', opval); - } -} else { -if (EQSI (ANDSI (FLD (f_rm), 1), 1)) { -if (EQSI (ANDSI (FLD (f_rn), 1), 1)) { - { - DF opval = GET_H_XD (((FLD (f_rm)) & (INVQI (1)))); - SET_H_XD (((FLD (f_rn)) & (INVQI (1))), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "xd-and--DFLT-index-of--DFLT-frn-inv--QI-1", 'f', opval); - } -} else { - { - DF opval = GET_H_XD (((FLD (f_rm)) & (INVQI (1)))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-frn", 'f', opval); - } -} -} else { -if (EQSI (ANDSI (FLD (f_rn), 1), 1)) { - { - DF opval = GET_H_DR (FLD (f_rm)); - SET_H_XD (((FLD (f_rn)) & (INVQI (1))), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "xd-and--DFLT-index-of--DFLT-frn-inv--QI-1", 'f', opval); - } -} else { - { - DF opval = GET_H_DR (FLD (f_rm)); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-frn", 'f', opval); - } -} -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FMOV2_COMPACT) : /* fmov @$rm, $frn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (GET_H_SZBIT ())) { - { - SF opval = GETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "frn", 'f', opval); - } -} else { -if (EQSI (ANDSI (FLD (f_rn), 1), 1)) { - { - DF opval = GETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); - SET_H_XD (((FLD (f_rn)) & (INVQI (1))), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "xd-and--DFLT-index-of--DFLT-frn-inv--QI-1", 'f', opval); - } -} else { - { - DF opval = GETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-frn", 'f', opval); - } -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FMOV3_COMPACT) : /* fmov @${rm}+, frn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (GET_H_SZBIT ())) { -{ - { - SF opval = GETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "frn", 'f', opval); - } - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 4); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } -} -} else { -{ -if (EQSI (ANDSI (FLD (f_rn), 1), 1)) { - { - DF opval = GETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); - SET_H_XD (((FLD (f_rn)) & (INVQI (1))), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "xd-and--DFLT-index-of--DFLT-frn-inv--QI-1", 'f', opval); - } -} else { - { - DF opval = GETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-frn", 'f', opval); - } -} - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 8); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FMOV4_COMPACT) : /* fmov @(r0, $rm), $frn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (GET_H_SZBIT ())) { - { - SF opval = GETMEMSF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm)))); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "frn", 'f', opval); - } -} else { -if (EQSI (ANDSI (FLD (f_rn), 1), 1)) { - { - DF opval = GETMEMDF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm)))); - SET_H_XD (((FLD (f_rn)) & (INVQI (1))), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "xd-and--DFLT-index-of--DFLT-frn-inv--QI-1", 'f', opval); - } -} else { - { - DF opval = GETMEMDF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm)))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-frn", 'f', opval); - } -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FMOV5_COMPACT) : /* fmov $frm, @$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (GET_H_SZBIT ())) { - { - SF opval = GET_H_FRC (FLD (f_rm)); - SETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} else { -if (EQSI (ANDSI (FLD (f_rm), 1), 1)) { - { - DF opval = GET_H_XD (((FLD (f_rm)) & (INVQI (1)))); - SETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} else { - { - DF opval = GET_H_DR (FLD (f_rm)); - SETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FMOV6_COMPACT) : /* fmov $frm, @-$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (GET_H_SZBIT ())) { -{ - { - SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), 4); - SET_H_GRC (FLD (f_rn), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - SF opval = GET_H_FRC (FLD (f_rm)); - SETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} -} else { -{ - { - SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), 8); - SET_H_GRC (FLD (f_rn), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -if (EQSI (ANDSI (FLD (f_rm), 1), 1)) { - { - DF opval = GET_H_XD (((FLD (f_rm)) & (INVQI (1)))); - SETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} else { - { - DF opval = GET_H_DR (FLD (f_rm)); - SETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FMOV7_COMPACT) : /* fmov $frm, @(r0, $rn) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (GET_H_SZBIT ())) { - { - SF opval = GET_H_FRC (FLD (f_rm)); - SETMEMSF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} else { -if (EQSI (ANDSI (FLD (f_rm), 1), 1)) { - { - DF opval = GET_H_XD (((FLD (f_rm)) & (INVQI (1)))); - SETMEMDF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} else { - { - DF opval = GET_H_DR (FLD (f_rm)); - SETMEMDF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FMUL_COMPACT) : /* fmul $fsdm, $fsdn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_PRBIT ()) { - { - DF opval = sh64_fmuld (current_cpu, GET_H_DR (FLD (f_rm)), GET_H_DR (FLD (f_rn))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-fsdn", 'f', opval); - } -} else { - { - SF opval = sh64_fmuls (current_cpu, GET_H_FRC (FLD (f_rm)), GET_H_FRC (FLD (f_rn))); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "fsdn", 'f', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FNEG_COMPACT) : /* fneg $fsdn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_PRBIT ()) { - { - DF opval = sh64_fnegd (current_cpu, GET_H_DR (FLD (f_rn))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-fsdn", 'f', opval); - } -} else { - { - SF opval = sh64_fnegs (current_cpu, GET_H_FRC (FLD (f_rn))); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "fsdn", 'f', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FRCHG_COMPACT) : /* frchg */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = NOTBI (GET_H_FRBIT ()); - SET_H_FRBIT (opval); - TRACE_RESULT (current_cpu, abuf, "frbit", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FSCHG_COMPACT) : /* fschg */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = NOTBI (GET_H_SZBIT ()); - SET_H_SZBIT (opval); - TRACE_RESULT (current_cpu, abuf, "szbit", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FSQRT_COMPACT) : /* fsqrt $fsdn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_PRBIT ()) { - { - DF opval = sh64_fsqrtd (current_cpu, GET_H_DR (FLD (f_rn))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-fsdn", 'f', opval); - } -} else { - { - SF opval = sh64_fsqrts (current_cpu, GET_H_FRC (FLD (f_rn))); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "fsdn", 'f', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FSTS_COMPACT) : /* fsts fpul, $frn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SF opval = CPU (h_fr[((UINT) 32)]); - SET_H_FRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "frn", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FSUB_COMPACT) : /* fsub $fsdm, $fsdn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_PRBIT ()) { - { - DF opval = sh64_fsubd (current_cpu, GET_H_DR (FLD (f_rn)), GET_H_DR (FLD (f_rm))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-fsdn", 'f', opval); - } -} else { - { - SF opval = sh64_fsubs (current_cpu, GET_H_FRC (FLD (f_rn)), GET_H_FRC (FLD (f_rm))); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "fsdn", 'f', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FTRC_COMPACT) : /* ftrc $fsdn, fpul */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SF opval = ((GET_H_PRBIT ()) ? (sh64_ftrcdl (current_cpu, GET_H_DR (FLD (f_rn)))) : (sh64_ftrcsl (current_cpu, GET_H_FRC (FLD (f_rn))))); - CPU (h_fr[((UINT) 32)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fpul", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FTRV_COMPACT) : /* ftrv xmtrx, $fvn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fipr_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_n; - SF tmp_res; - tmp_n = FLD (f_vn); - tmp_res = sh64_fmuls (current_cpu, GET_H_XF (((UINT) 0)), GET_H_FRC (tmp_n)); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 4)), GET_H_FRC (ADDQI (tmp_n, 1)))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 8)), GET_H_FRC (ADDQI (tmp_n, 2)))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 12)), GET_H_FRC (ADDQI (tmp_n, 3)))); - { - SF opval = tmp_res; - SET_H_FRC (tmp_n, opval); - TRACE_RESULT (current_cpu, abuf, "frc-n", 'f', opval); - } - tmp_res = sh64_fmuls (current_cpu, GET_H_XF (((UINT) 1)), GET_H_FRC (tmp_n)); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 5)), GET_H_FRC (ADDQI (tmp_n, 1)))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 9)), GET_H_FRC (ADDQI (tmp_n, 2)))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 13)), GET_H_FRC (ADDQI (tmp_n, 3)))); - { - SF opval = tmp_res; - SET_H_FRC (ADDQI (tmp_n, 1), opval); - TRACE_RESULT (current_cpu, abuf, "frc-add--DFLT-n-1", 'f', opval); - } - tmp_res = sh64_fmuls (current_cpu, GET_H_XF (((UINT) 2)), GET_H_FRC (tmp_n)); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 6)), GET_H_FRC (ADDQI (tmp_n, 1)))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 10)), GET_H_FRC (ADDQI (tmp_n, 2)))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 14)), GET_H_FRC (ADDQI (tmp_n, 3)))); - { - SF opval = tmp_res; - SET_H_FRC (ADDQI (tmp_n, 2), opval); - TRACE_RESULT (current_cpu, abuf, "frc-add--DFLT-n-2", 'f', opval); - } - tmp_res = sh64_fmuls (current_cpu, GET_H_XF (((UINT) 3)), GET_H_FRC (tmp_n)); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 7)), GET_H_FRC (ADDQI (tmp_n, 1)))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 11)), GET_H_FRC (ADDQI (tmp_n, 2)))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 15)), GET_H_FRC (ADDQI (tmp_n, 3)))); - { - SF opval = tmp_res; - SET_H_FRC (ADDQI (tmp_n, 3), opval); - TRACE_RESULT (current_cpu, abuf, "frc-add--DFLT-n-3", 'f', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_JMP_COMPACT) : /* jmp @$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - UDI opval = GET_H_GRC (FLD (f_rn)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_JSR_COMPACT) : /* jsr @$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -{ - { - SI opval = ADDDI (pc, 4); - SET_H_PR (opval); - TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); - } - { - UDI opval = GET_H_GRC (FLD (f_rn)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDC_COMPACT) : /* ldc $rn, gbr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GRC (FLD (f_rn)); - SET_H_GBR (opval); - TRACE_RESULT (current_cpu, abuf, "gbr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDCL_COMPACT) : /* ldc.l @${rn}+, gbr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); - SET_H_GBR (opval); - TRACE_RESULT (current_cpu, abuf, "gbr", 'x', opval); - } - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDS_FPSCR_COMPACT) : /* lds $rn, fpscr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GRC (FLD (f_rn)); - SET_H_FPCCR (opval); - TRACE_RESULT (current_cpu, abuf, "fpscr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDSL_FPSCR_COMPACT) : /* lds.l @${rn}+, fpscr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); - SET_H_FPCCR (opval); - TRACE_RESULT (current_cpu, abuf, "fpscr", 'x', opval); - } - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDS_FPUL_COMPACT) : /* lds $rn, fpul */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SF opval = SUBWORDSISF (GET_H_GRC (FLD (f_rn))); - CPU (h_fr[((UINT) 32)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fpul", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDSL_FPUL_COMPACT) : /* lds.l @${rn}+, fpul */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SF opval = GETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rn))); - CPU (h_fr[((UINT) 32)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fpul", 'f', opval); - } - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDS_MACH_COMPACT) : /* lds $rn, mach */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GRC (FLD (f_rn)); - SET_H_MACH (opval); - TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDSL_MACH_COMPACT) : /* lds.l @${rn}+, mach */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); - SET_H_MACH (opval); - TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); - } - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDS_MACL_COMPACT) : /* lds $rn, macl */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GRC (FLD (f_rn)); - SET_H_MACL (opval); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDSL_MACL_COMPACT) : /* lds.l @${rn}+, macl */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); - SET_H_MACL (opval); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDS_PR_COMPACT) : /* lds $rn, pr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GRC (FLD (f_rn)); - SET_H_PR (opval); - TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDSL_PR_COMPACT) : /* lds.l @${rn}+, pr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); - SET_H_PR (opval); - TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); - } - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MACL_COMPACT) : /* mac.l @${rm}+, @${rn}+ */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_tmpry; - DI tmp_mac; - DI tmp_result; - SI tmp_x; - SI tmp_y; - tmp_x = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -if (EQSI (FLD (f_rn), FLD (f_rm))) { -{ - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 4); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } -} -} - tmp_y = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 4); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } - tmp_tmpry = MULDI (ZEXTSIDI (tmp_x), ZEXTSIDI (tmp_y)); - tmp_mac = ORDI (SLLDI (ZEXTSIDI (GET_H_MACH ()), 32), ZEXTSIDI (GET_H_MACL ())); - tmp_result = ADDDI (tmp_mac, tmp_tmpry); -{ -if (GET_H_SBIT ()) { -{ - SI tmp_min; - SI tmp_max; - tmp_max = SRLDI (INVDI (0), 16); - tmp_min = SRLDI (INVDI (0), 15); -if (GTDI (tmp_result, tmp_max)) { - tmp_result = tmp_max; -} else { -if (LTDI (tmp_result, tmp_min)) { - tmp_result = tmp_min; -} -} -} -} - { - SI opval = SUBWORDDISI (tmp_result, 0); - SET_H_MACH (opval); - TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); - } - { - SI opval = SUBWORDDISI (tmp_result, 1); - SET_H_MACL (opval); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MACW_COMPACT) : /* mac.w @${rm}+, @${rn}+ */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmpry; - DI tmp_mac; - DI tmp_result; - HI tmp_x; - HI tmp_y; - tmp_x = GETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 2); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -if (EQSI (FLD (f_rn), FLD (f_rm))) { -{ - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 2); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 2); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } -} -} - tmp_y = GETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 2); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } - tmp_tmpry = MULSI (ZEXTHISI (tmp_x), ZEXTHISI (tmp_y)); -if (GET_H_SBIT ()) { -{ -if (ADDOFSI (tmp_tmpry, GET_H_MACL (), 0)) { - { - SI opval = 1; - SET_H_MACH (opval); - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); - } -} - { - SI opval = ADDSI (tmp_tmpry, GET_H_MACL ()); - SET_H_MACL (opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } -} -} else { -{ - tmp_mac = ORDI (SLLDI (ZEXTSIDI (GET_H_MACH ()), 32), ZEXTSIDI (GET_H_MACL ())); - tmp_result = ADDDI (tmp_mac, EXTSIDI (tmp_tmpry)); - { - SI opval = SUBWORDDISI (tmp_result, 0); - SET_H_MACH (opval); - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); - } - { - SI opval = SUBWORDDISI (tmp_result, 1); - SET_H_MACL (opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } -} -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOV_COMPACT) : /* mov $rm64, $rn64 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = GET_H_GR (FLD (f_rm)); - SET_H_GR (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn64", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVI_COMPACT) : /* mov #$imm8, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTQIDI (ANDQI (FLD (f_imm8), 255)); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVB1_COMPACT) : /* mov.b $rm, @$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - UQI opval = SUBWORDSIUQI (GET_H_GRC (FLD (f_rm)), 3); - SETMEMUQI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVB2_COMPACT) : /* mov.b $rm, @-$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 1); - { - UQI opval = SUBWORDSIUQI (GET_H_GRC (FLD (f_rm)), 3); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_addr; - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVB3_COMPACT) : /* mov.b $rm, @(r0,$rn) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - UQI opval = SUBWORDSIUQI (GET_H_GRC (FLD (f_rm)), 3); - SETMEMUQI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVB4_COMPACT) : /* mov.b r0, @($imm8, gbr) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = ADDSI (GET_H_GBR (), FLD (f_imm8)); - { - UQI opval = SUBWORDSIUQI (GET_H_GRC (((UINT) 0)), 3); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVB5_COMPACT) : /* mov.b r0, @($imm4, $rm) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movb5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4)); - { - UQI opval = SUBWORDSIUQI (GET_H_GRC (((UINT) 0)), 3); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVB6_COMPACT) : /* mov.b @$rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTQISI (GETMEMQI (current_cpu, pc, GET_H_GRC (FLD (f_rm)))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVB7_COMPACT) : /* mov.b @${rm}+, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_data; - tmp_data = GETMEMQI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); -if (EQSI (FLD (f_rm), FLD (f_rn))) { - { - SI opval = EXTQISI (tmp_data); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } -} else { - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 1); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } -} - { - SI opval = EXTQISI (tmp_data); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVB8_COMPACT) : /* mov.b @(r0, $rm), $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm))))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVB9_COMPACT) : /* mov.b @($imm8, gbr), r0 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8)))); - SET_H_GRC (((UINT) 0), opval); - TRACE_RESULT (current_cpu, abuf, "r0", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVB10_COMPACT) : /* mov.b @($imm4, $rm), r0 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movb5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4)))); - SET_H_GRC (((UINT) 0), opval); - TRACE_RESULT (current_cpu, abuf, "r0", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVL1_COMPACT) : /* mov.l $rm, @$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GRC (FLD (f_rm)); - SETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVL2_COMPACT) : /* mov.l $rm, @-$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_addr; - tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); - { - SI opval = GET_H_GRC (FLD (f_rm)); - SETMEMSI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_addr; - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVL3_COMPACT) : /* mov.l $rm, @(r0, $rn) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GRC (FLD (f_rm)); - SETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVL4_COMPACT) : /* mov.l r0, @($imm8x4, gbr) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GRC (((UINT) 0)); - SETMEMSI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8x4)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVL5_COMPACT) : /* mov.l $rm, @($imm4x4, $rn) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GRC (FLD (f_rm)); - SETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rn)), FLD (f_imm4x4)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVL6_COMPACT) : /* mov.l @$rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVL7_COMPACT) : /* mov.l @${rm}+, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -if (EQSI (FLD (f_rm), FLD (f_rn))) { - { - SI opval = GET_H_GRC (FLD (f_rn)); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } -} else { - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 4); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVL8_COMPACT) : /* mov.l @(r0, $rm), $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm)))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVL9_COMPACT) : /* mov.l @($imm8x4, gbr), r0 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8x4))); - SET_H_GRC (((UINT) 0), opval); - TRACE_RESULT (current_cpu, abuf, "r0", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVL10_COMPACT) : /* mov.l @($imm8x4, pc), $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_imm8x4), ANDDI (ADDDI (pc, 4), INVSI (3)))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVL11_COMPACT) : /* mov.l @($imm4x4, $rm), $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4x4))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVW1_COMPACT) : /* mov.w $rm, @$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1); - SETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVW2_COMPACT) : /* mov.w $rm, @-$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 2); - { - HI opval = SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1); - SETMEMHI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_addr; - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVW3_COMPACT) : /* mov.w $rm, @(r0, $rn) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1); - SETMEMHI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVW4_COMPACT) : /* mov.w r0, @($imm8x2, gbr) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = SUBWORDSIHI (GET_H_GRC (((UINT) 0)), 1); - SETMEMHI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8x2)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVW5_COMPACT) : /* mov.w r0, @($imm4x2, $rn) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = SUBWORDSIHI (GET_H_GRC (((UINT) 0)), 1); - SETMEMHI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rn)), FLD (f_imm4x2)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVW6_COMPACT) : /* mov.w @$rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTHISI (GETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rm)))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVW7_COMPACT) : /* mov.w @${rm}+, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - HI tmp_data; - tmp_data = GETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); -if (EQSI (FLD (f_rm), FLD (f_rn))) { - { - SI opval = EXTHISI (tmp_data); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } -} else { - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 2); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } -} - { - SI opval = EXTHISI (tmp_data); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVW8_COMPACT) : /* mov.w @(r0, $rm), $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm))))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVW9_COMPACT) : /* mov.w @($imm8x2, gbr), r0 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8x2)))); - SET_H_GRC (((UINT) 0), opval); - TRACE_RESULT (current_cpu, abuf, "r0", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVW10_COMPACT) : /* mov.w @($imm8x2, pc), $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDDI (ADDDI (pc, 4), FLD (f_imm8x2)))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVW11_COMPACT) : /* mov.w @($imm4x2, $rm), r0 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw11_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4x2)))); - SET_H_GRC (((UINT) 0), opval); - TRACE_RESULT (current_cpu, abuf, "r0", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVA_COMPACT) : /* mova @($imm8x4, pc), r0 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDDI (ANDDI (ADDDI (pc, 4), INVSI (3)), FLD (f_imm8x4)); - SET_H_GRC (((UINT) 0), opval); - TRACE_RESULT (current_cpu, abuf, "r0", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVCAL_COMPACT) : /* movca.l r0, @$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GRC (((UINT) 0)); - SETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVT_COMPACT) : /* movt $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTBISI (GET_H_TBIT ()); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULL_COMPACT) : /* mul.l $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = MULSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))); - SET_H_MACL (opval); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULSW_COMPACT) : /* muls.w $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = MULSI (EXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1)), EXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rn)), 1))); - SET_H_MACL (opval); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULUW_COMPACT) : /* mulu.w $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = MULSI (ZEXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1)), ZEXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rn)), 1))); - SET_H_MACL (opval); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NEG_COMPACT) : /* neg $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = NEGSI (GET_H_GRC (FLD (f_rm))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NEGC_COMPACT) : /* negc $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_flag; - tmp_flag = SUBCFSI (0, GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); - { - SI opval = SUBCSI (0, GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = tmp_flag; - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOP_COMPACT) : /* nop */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOT_COMPACT) : /* not $rm64, $rn64 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = INVDI (GET_H_GR (FLD (f_rm))); - SET_H_GR (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn64", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_OCBI_COMPACT) : /* ocbi @$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_OCBP_COMPACT) : /* ocbp @$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_OCBWB_COMPACT) : /* ocbwb @$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_OR_COMPACT) : /* or $rm64, $rn64 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = ORDI (GET_H_GR (FLD (f_rm)), GET_H_GR (FLD (f_rn))); - SET_H_GR (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn64", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ORI_COMPACT) : /* or #$uimm8, r0 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ORSI (GET_H_GRC (((UINT) 0)), ZEXTSIDI (FLD (f_imm8))); - SET_H_GRC (((UINT) 0), opval); - TRACE_RESULT (current_cpu, abuf, "r0", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ORB_COMPACT) : /* or.b #$imm8, @(r0, gbr) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - UQI tmp_data; - tmp_addr = ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GBR ()); - tmp_data = ORQI (GETMEMUQI (current_cpu, pc, tmp_addr), FLD (f_imm8)); - { - UQI opval = tmp_data; - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_PREF_COMPACT) : /* pref @$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ROTCL_COMPACT) : /* rotcl $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_temp; - tmp_temp = SRLSI (GET_H_GRC (FLD (f_rn)), 31); - { - SI opval = ORSI (SLLSI (GET_H_GRC (FLD (f_rn)), 1), GET_H_TBIT ()); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = ((tmp_temp) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ROTCR_COMPACT) : /* rotcr $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_lsbit; - SI tmp_temp; - tmp_lsbit = ((EQSI (ANDSI (GET_H_GRC (FLD (f_rn)), 1), 0)) ? (0) : (1)); - tmp_temp = GET_H_TBIT (); - { - SI opval = ORSI (SRLSI (GET_H_GRC (FLD (f_rn)), 1), SLLSI (tmp_temp, 31)); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = ((tmp_lsbit) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ROTL_COMPACT) : /* rotl $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_temp; - tmp_temp = SRLSI (GET_H_GRC (FLD (f_rn)), 31); - { - SI opval = ORSI (SLLSI (GET_H_GRC (FLD (f_rn)), 1), tmp_temp); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = ((tmp_temp) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ROTR_COMPACT) : /* rotr $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_lsbit; - SI tmp_temp; - tmp_lsbit = ((EQSI (ANDSI (GET_H_GRC (FLD (f_rn)), 1), 0)) ? (0) : (1)); - tmp_temp = tmp_lsbit; - { - SI opval = ORSI (SRLSI (GET_H_GRC (FLD (f_rn)), 1), SLLSI (tmp_temp, 31)); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = ((tmp_lsbit) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_RTS_COMPACT) : /* rts */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - UDI opval = GET_H_PR (); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SETS_COMPACT) : /* sets */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = 1; - SET_H_SBIT (opval); - TRACE_RESULT (current_cpu, abuf, "sbit", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SETT_COMPACT) : /* sett */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = 1; - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHAD_COMPACT) : /* shad $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_shamt; - tmp_shamt = ANDQI (GET_H_GRC (FLD (f_rm)), 31); -if (GESI (GET_H_GRC (FLD (f_rm)), 0)) { - { - SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), tmp_shamt); - SET_H_GRC (FLD (f_rn), opval); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} else { -if (NEQI (tmp_shamt, 0)) { - { - SI opval = SRASI (GET_H_GRC (FLD (f_rn)), SUBSI (32, tmp_shamt)); - SET_H_GRC (FLD (f_rn), opval); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} else { -if (LTSI (GET_H_GRC (FLD (f_rn)), 0)) { - { - SI opval = NEGSI (1); - SET_H_GRC (FLD (f_rn), opval); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} else { - { - SI opval = 0; - SET_H_GRC (FLD (f_rn), opval); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} -} -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHAL_COMPACT) : /* shal $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_t; - tmp_t = SRLSI (GET_H_GRC (FLD (f_rn)), 31); - { - SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 1); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = ((tmp_t) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHAR_COMPACT) : /* shar $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_t; - tmp_t = ANDSI (GET_H_GRC (FLD (f_rn)), 1); - { - SI opval = SRASI (GET_H_GRC (FLD (f_rn)), 1); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = ((tmp_t) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLD_COMPACT) : /* shld $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_shamt; - tmp_shamt = ANDQI (GET_H_GRC (FLD (f_rm)), 31); -if (GESI (GET_H_GRC (FLD (f_rm)), 0)) { - { - SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), tmp_shamt); - SET_H_GRC (FLD (f_rn), opval); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} else { -if (NEQI (tmp_shamt, 0)) { - { - SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), SUBSI (32, tmp_shamt)); - SET_H_GRC (FLD (f_rn), opval); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} else { - { - SI opval = 0; - SET_H_GRC (FLD (f_rn), opval); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLL_COMPACT) : /* shll $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_t; - tmp_t = SRLSI (GET_H_GRC (FLD (f_rn)), 31); - { - SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 1); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = ((tmp_t) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLL2_COMPACT) : /* shll2 $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 2); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLL8_COMPACT) : /* shll8 $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 8); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLL16_COMPACT) : /* shll16 $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 16); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLR_COMPACT) : /* shlr $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_t; - tmp_t = ANDSI (GET_H_GRC (FLD (f_rn)), 1); - { - SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 1); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = ((tmp_t) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLR2_COMPACT) : /* shlr2 $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 2); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLR8_COMPACT) : /* shlr8 $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 8); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLR16_COMPACT) : /* shlr16 $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 16); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STC_GBR_COMPACT) : /* stc gbr, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GBR (); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STCL_GBR_COMPACT) : /* stc.l gbr, @-$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); - { - SI opval = GET_H_GBR (); - SETMEMSI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_addr; - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STS_FPSCR_COMPACT) : /* sts fpscr, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_FPCCR (); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STSL_FPSCR_COMPACT) : /* sts.l fpscr, @-$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); - { - SI opval = GET_H_FPCCR (); - SETMEMSI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_addr; - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STS_FPUL_COMPACT) : /* sts fpul, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SUBWORDSFSI (CPU (h_fr[((UINT) 32)])); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STSL_FPUL_COMPACT) : /* sts.l fpul, @-$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); - { - SF opval = CPU (h_fr[((UINT) 32)]); - SETMEMSF (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } - { - SI opval = tmp_addr; - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STS_MACH_COMPACT) : /* sts mach, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_MACH (); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STSL_MACH_COMPACT) : /* sts.l mach, @-$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); - { - SI opval = GET_H_MACH (); - SETMEMSI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_addr; - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STS_MACL_COMPACT) : /* sts macl, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_MACL (); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STSL_MACL_COMPACT) : /* sts.l macl, @-$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); - { - SI opval = GET_H_MACL (); - SETMEMSI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_addr; - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STS_PR_COMPACT) : /* sts pr, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_PR (); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STSL_PR_COMPACT) : /* sts.l pr, @-$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); - { - SI opval = GET_H_PR (); - SETMEMSI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_addr; - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUB_COMPACT) : /* sub $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUBC_COMPACT) : /* subc $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_flag; - tmp_flag = SUBCFSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); - { - SI opval = SUBCSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = tmp_flag; - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUBV_COMPACT) : /* subv $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_t; - tmp_t = SUBOFSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), 0); - { - SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = ((tmp_t) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SWAPB_COMPACT) : /* swap.b $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - UHI tmp_top_half; - UQI tmp_byte1; - UQI tmp_byte0; - tmp_top_half = SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 0); - tmp_byte1 = SUBWORDSIQI (GET_H_GRC (FLD (f_rm)), 2); - tmp_byte0 = SUBWORDSIQI (GET_H_GRC (FLD (f_rm)), 3); - { - SI opval = ORSI (SLLSI (tmp_top_half, 16), ORSI (SLLSI (tmp_byte0, 8), tmp_byte1)); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SWAPW_COMPACT) : /* swap.w $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ORSI (SRLSI (GET_H_GRC (FLD (f_rm)), 16), SLLSI (GET_H_GRC (FLD (f_rm)), 16)); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_TASB_COMPACT) : /* tas.b @$rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - UQI tmp_byte; - tmp_byte = GETMEMUQI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); - { - BI opval = ((EQQI (tmp_byte, 0)) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - tmp_byte = ORQI (tmp_byte, 128); - { - UQI opval = tmp_byte; - SETMEMUQI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_TRAPA_COMPACT) : /* trapa #$uimm8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -sh64_compact_trapa (current_cpu, FLD (f_imm8), pc); - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_TST_COMPACT) : /* tst $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = ((EQSI (ANDSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))), 0)) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_TSTI_COMPACT) : /* tst #$uimm8, r0 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = ((EQSI (ANDSI (GET_H_GRC (((UINT) 0)), ZEXTSISI (FLD (f_imm8))), 0)) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_TSTB_COMPACT) : /* tst.b #$imm8, @(r0, gbr) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GBR ()); - { - BI opval = ((EQQI (ANDQI (GETMEMUQI (current_cpu, pc, tmp_addr), FLD (f_imm8)), 0)) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_XOR_COMPACT) : /* xor $rm64, $rn64 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = XORDI (GET_H_GR (FLD (f_rn)), GET_H_GR (FLD (f_rm))); - SET_H_GR (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn64", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_XORI_COMPACT) : /* xor #$uimm8, r0 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = XORDI (GET_H_GR (((UINT) 0)), ZEXTSIDI (FLD (f_imm8))); - SET_H_GR (((UINT) 0), opval); - TRACE_RESULT (current_cpu, abuf, "gr-0", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_XORB_COMPACT) : /* xor.b #$imm8, @(r0, gbr) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - UQI tmp_data; - tmp_addr = ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GBR ()); - tmp_data = XORQI (GETMEMUQI (current_cpu, pc, tmp_addr), FLD (f_imm8)); - { - UQI opval = tmp_data; - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_XTRCT_COMPACT) : /* xtrct $rm, $rn */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ORSI (SLLSI (GET_H_GRC (FLD (f_rm)), 16), SRLSI (GET_H_GRC (FLD (f_rn)), 16)); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - - } - ENDSWITCH (sem) /* End of semantic switch. */ - - /* At this point `vpc' contains the next insn to execute. */ -} - -#undef DEFINE_SWITCH -#endif /* DEFINE_SWITCH */ diff --git a/sim/sh64/sem-compact.c b/sim/sh64/sem-compact.c deleted file mode 100644 index fae6877772a..00000000000 --- a/sim/sh64/sem-compact.c +++ /dev/null @@ -1,5290 +0,0 @@ -/* Simulator instruction semantics for sh64. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU sh64 -#define WANT_CPU_SH64 - -#include "sim-main.h" -#include "cgen-mem.h" -#include "cgen-ops.h" - -#undef GET_ATTR -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) -#else -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr) -#endif - -/* This is used so that we can compile two copies of the semantic code, - one with full feature support and one without that runs fast(er). - FAST_P, when desired, is defined on the command line, -DFAST_P=1. */ -#if FAST_P -#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn) -#undef TRACE_RESULT -#define TRACE_RESULT(cpu, abuf, name, type, val) -#else -#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn) -#endif - -/* x-invalid: --invalid-- */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { - /* Update the recorded pc in the cpu state struct. - Only necessary for WITH_SCACHE case, but to avoid the - conditional compilation .... */ - SET_H_PC (pc); - /* Virtual insns have zero size. Overwrite vpc with address of next insn - using the default-insn-bitsize spec. When executing insns in parallel - we may want to queue the fault and continue execution. */ - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); - } - - return vpc; -#undef FLD -} - -/* x-after: --after-- */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_SH64_COMPACT - sh64_compact_pbb_after (current_cpu, sem_arg); -#endif - } - - return vpc; -#undef FLD -} - -/* x-before: --before-- */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_SH64_COMPACT - sh64_compact_pbb_before (current_cpu, sem_arg); -#endif - } - - return vpc; -#undef FLD -} - -/* x-cti-chain: --cti-chain-- */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_SH64_COMPACT -#ifdef DEFINE_SWITCH - vpc = sh64_compact_pbb_cti_chain (current_cpu, sem_arg, - pbb_br_type, pbb_br_npc); - BREAK (sem); -#else - /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ - vpc = sh64_compact_pbb_cti_chain (current_cpu, sem_arg, - CPU_PBB_BR_TYPE (current_cpu), - CPU_PBB_BR_NPC (current_cpu)); -#endif -#endif - } - - return vpc; -#undef FLD -} - -/* x-chain: --chain-- */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_SH64_COMPACT - vpc = sh64_compact_pbb_chain (current_cpu, sem_arg); -#ifdef DEFINE_SWITCH - BREAK (sem); -#endif -#endif - } - - return vpc; -#undef FLD -} - -/* x-begin: --begin-- */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_SH64_COMPACT -#if defined DEFINE_SWITCH || defined FAST_P - /* In the switch case FAST_P is a constant, allowing several optimizations - in any called inline functions. */ - vpc = sh64_compact_pbb_begin (current_cpu, FAST_P); -#else -#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ - vpc = sh64_compact_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); -#else - vpc = sh64_compact_pbb_begin (current_cpu, 0); -#endif -#endif -#endif - } - - return vpc; -#undef FLD -} - -/* add-compact: add $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,add_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* addi-compact: add #$imm8, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,addi_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), EXTQISI (ANDQI (FLD (f_imm8), 255))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* addc-compact: addc $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,addc_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_flag; - tmp_flag = ADDCFSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); - { - SI opval = ADDCSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = tmp_flag; - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* addv-compact: addv $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,addv_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_t; - tmp_t = ADDOFSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), 0); - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = tmp_t; - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* and-compact: and $rm64, $rn64 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,and_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = ANDDI (GET_H_GR (FLD (f_rm)), GET_H_GR (FLD (f_rn))); - SET_H_GR (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn64", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* andi-compact: and #$uimm8, r0 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,andi_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ANDSI (GET_H_GRC (((UINT) 0)), ZEXTSIDI (FLD (f_imm8))); - SET_H_GRC (((UINT) 0), opval); - TRACE_RESULT (current_cpu, abuf, "r0", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* andb-compact: and.b #$imm8, @(r0, gbr) */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,andb_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - UQI tmp_data; - tmp_addr = ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GBR ()); - tmp_data = ANDQI (GETMEMUQI (current_cpu, pc, tmp_addr), FLD (f_imm8)); - { - UQI opval = tmp_data; - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* bf-compact: bf $disp8 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,bf_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bf_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (GET_H_TBIT ())) { - { - UDI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bfs-compact: bf/s $disp8 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,bfs_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bf_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (GET_H_TBIT ())) { -{ - { - UDI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bra-compact: bra $disp12 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,bra_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bra_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - UDI opval = FLD (i_disp12); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* braf-compact: braf $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,braf_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - UDI opval = ADDDI (EXTSIDI (GET_H_GRC (FLD (f_rn))), ADDDI (pc, 4)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* brk-compact: brk */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,brk_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -sh64_break (current_cpu, pc); - - return vpc; -#undef FLD -} - -/* bsr-compact: bsr $disp12 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,bsr_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bra_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -{ - { - SI opval = ADDDI (pc, 4); - SET_H_PR (opval); - TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); - } - { - UDI opval = FLD (i_disp12); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bsrf-compact: bsrf $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,bsrf_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -{ - { - SI opval = ADDDI (pc, 4); - SET_H_PR (opval); - TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); - } - { - UDI opval = ADDDI (EXTSIDI (GET_H_GRC (FLD (f_rn))), ADDDI (pc, 4)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bt-compact: bt $disp8 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,bt_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bf_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_TBIT ()) { - { - UDI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bts-compact: bt/s $disp8 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,bts_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bf_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_TBIT ()) { -{ - { - UDI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* clrmac-compact: clrmac */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,clrmac_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = 0; - SET_H_MACL (opval); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } - { - SI opval = 0; - SET_H_MACH (opval); - TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* clrs-compact: clrs */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,clrs_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = 0; - SET_H_SBIT (opval); - TRACE_RESULT (current_cpu, abuf, "sbit", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* clrt-compact: clrt */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,clrt_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = 0; - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmpeq-compact: cmp/eq $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,cmpeq_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = EQSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmpeqi-compact: cmp/eq #$imm8, r0 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,cmpeqi_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = EQSI (GET_H_GRC (((UINT) 0)), EXTQISI (ANDQI (FLD (f_imm8), 255))); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmpge-compact: cmp/ge $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,cmpge_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = GESI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmpgt-compact: cmp/gt $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,cmpgt_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = GTSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmphi-compact: cmp/hi $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,cmphi_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = GTUSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmphs-compact: cmp/hs $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,cmphs_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = GEUSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmppl-compact: cmp/pl $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,cmppl_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = GTSI (GET_H_GRC (FLD (f_rn)), 0); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmppz-compact: cmp/pz $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,cmppz_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = GESI (GET_H_GRC (FLD (f_rn)), 0); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmpstr-compact: cmp/str $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,cmpstr_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_t; - SI tmp_temp; - tmp_temp = XORSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))); - tmp_t = EQSI (ANDSI (tmp_temp, 0xff000000), 0); - tmp_t = ORBI (EQSI (ANDSI (tmp_temp, 16711680), 0), tmp_t); - tmp_t = ORBI (EQSI (ANDSI (tmp_temp, 65280), 0), tmp_t); - tmp_t = ORBI (EQSI (ANDSI (tmp_temp, 255), 0), tmp_t); - { - BI opval = ((GTUBI (tmp_t, 0)) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* div0s-compact: div0s $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,div0s_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 31); - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } - { - BI opval = SRLSI (GET_H_GRC (FLD (f_rm)), 31); - SET_H_MBIT (opval); - TRACE_RESULT (current_cpu, abuf, "mbit", 'x', opval); - } - { - BI opval = ((EQSI (SRLSI (GET_H_GRC (FLD (f_rm)), 31), SRLSI (GET_H_GRC (FLD (f_rn)), 31))) ? (0) : (1)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* div0u-compact: div0u */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,div0u_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = 0; - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - { - BI opval = 0; - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } - { - BI opval = 0; - SET_H_MBIT (opval); - TRACE_RESULT (current_cpu, abuf, "mbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* div1-compact: div1 $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,div1_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_oldq; - SI tmp_tmp0; - UQI tmp_tmp1; - tmp_oldq = GET_H_QBIT (); - { - BI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 31); - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } - { - SI opval = ORSI (SLLSI (GET_H_GRC (FLD (f_rn)), 1), ZEXTBISI (GET_H_TBIT ())); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -if (NOTBI (tmp_oldq)) { -if (NOTBI (GET_H_MBIT ())) { -{ - tmp_tmp0 = GET_H_GRC (FLD (f_rn)); - { - SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - tmp_tmp1 = GTUSI (GET_H_GRC (FLD (f_rn)), tmp_tmp0); -if (NOTBI (GET_H_QBIT ())) { - { - BI opval = ((tmp_tmp1) ? (1) : (0)); - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } -} else { - { - BI opval = ((EQQI (tmp_tmp1, 0)) ? (1) : (0)); - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } -} -} -} else { -{ - tmp_tmp0 = GET_H_GRC (FLD (f_rn)); - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - tmp_tmp1 = LTUSI (GET_H_GRC (FLD (f_rn)), tmp_tmp0); -if (NOTBI (GET_H_QBIT ())) { - { - BI opval = ((EQQI (tmp_tmp1, 0)) ? (1) : (0)); - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } -} else { - { - BI opval = ((tmp_tmp1) ? (1) : (0)); - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } -} -} -} -} else { -if (NOTBI (GET_H_MBIT ())) { -{ - tmp_tmp0 = GET_H_GRC (FLD (f_rn)); - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - tmp_tmp1 = LTUSI (GET_H_GRC (FLD (f_rn)), tmp_tmp0); -if (NOTBI (GET_H_QBIT ())) { - { - BI opval = ((tmp_tmp1) ? (1) : (0)); - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } -} else { - { - BI opval = ((EQQI (tmp_tmp1, 0)) ? (1) : (0)); - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } -} -} -} else { -{ - tmp_tmp0 = GET_H_GRC (FLD (f_rn)); - { - SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - tmp_tmp1 = GTUSI (GET_H_GRC (FLD (f_rn)), tmp_tmp0); -if (NOTBI (GET_H_QBIT ())) { - { - BI opval = ((EQQI (tmp_tmp1, 0)) ? (1) : (0)); - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } -} else { - { - BI opval = ((tmp_tmp1) ? (1) : (0)); - SET_H_QBIT (opval); - TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); - } -} -} -} -} - { - BI opval = ((EQBI (GET_H_QBIT (), GET_H_MBIT ())) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* dmulsl-compact: dmuls.l $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,dmulsl_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_result; - tmp_result = MULDI (EXTSIDI (GET_H_GRC (FLD (f_rm))), EXTSIDI (GET_H_GRC (FLD (f_rn)))); - { - SI opval = SUBWORDDISI (tmp_result, 0); - SET_H_MACH (opval); - TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); - } - { - SI opval = SUBWORDDISI (tmp_result, 1); - SET_H_MACL (opval); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* dmulul-compact: dmulu.l $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,dmulul_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_result; - tmp_result = MULDI (ZEXTSIDI (GET_H_GRC (FLD (f_rm))), ZEXTSIDI (GET_H_GRC (FLD (f_rn)))); - { - SI opval = SUBWORDDISI (tmp_result, 0); - SET_H_MACH (opval); - TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); - } - { - SI opval = SUBWORDDISI (tmp_result, 1); - SET_H_MACL (opval); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* dt-compact: dt $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,dt_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), 1); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = EQSI (GET_H_GRC (FLD (f_rn)), 0); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* extsb-compact: exts.b $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,extsb_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTQISI (SUBWORDSIQI (GET_H_GRC (FLD (f_rm)), 3)); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* extsw-compact: exts.w $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,extsw_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1)); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* extub-compact: extu.b $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,extub_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTQISI (SUBWORDSIQI (GET_H_GRC (FLD (f_rm)), 3)); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* extuw-compact: extu.w $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,extuw_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1)); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* fabs-compact: fabs $fsdn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fabs_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_PRBIT ()) { - { - DF opval = sh64_fabsd (current_cpu, GET_H_DR (FLD (f_rn))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-fsdn", 'f', opval); - } -} else { - { - SF opval = sh64_fabss (current_cpu, GET_H_FRC (FLD (f_rn))); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "fsdn", 'f', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* fadd-compact: fadd $fsdm, $fsdn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fadd_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_PRBIT ()) { - { - DF opval = sh64_faddd (current_cpu, GET_H_DR (FLD (f_rm)), GET_H_DR (FLD (f_rn))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-fsdn", 'f', opval); - } -} else { - { - SF opval = sh64_fadds (current_cpu, GET_H_FRC (FLD (f_rm)), GET_H_FRC (FLD (f_rn))); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "fsdn", 'f', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* fcmpeq-compact: fcmp/eq $fsdm, $fsdn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fcmpeq_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_PRBIT ()) { - { - BI opval = sh64_fcmpeqd (current_cpu, GET_H_DR (FLD (f_rm)), GET_H_DR (FLD (f_rn))); - SET_H_TBIT (opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} else { - { - BI opval = sh64_fcmpeqs (current_cpu, GET_H_FRC (FLD (f_rm)), GET_H_FRC (FLD (f_rn))); - SET_H_TBIT (opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* fcmpgt-compact: fcmp/gt $fsdm, $fsdn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fcmpgt_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_PRBIT ()) { - { - BI opval = sh64_fcmpgtd (current_cpu, GET_H_DR (FLD (f_rn)), GET_H_DR (FLD (f_rm))); - SET_H_TBIT (opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} else { - { - BI opval = sh64_fcmpgts (current_cpu, GET_H_FRC (FLD (f_rn)), GET_H_FRC (FLD (f_rm))); - SET_H_TBIT (opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* fcnvds-compact: fcnvds $drn, fpul */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fcnvds_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fcnvds_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SF opval = sh64_fcnvds (current_cpu, GET_H_DRC (FLD (f_dn))); - CPU (h_fr[((UINT) 32)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fpul", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fcnvsd-compact: fcnvsd fpul, $drn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fcnvsd_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fcnvds_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DF opval = sh64_fcnvsd (current_cpu, CPU (h_fr[((UINT) 32)])); - SET_H_DRC (FLD (f_dn), opval); - TRACE_RESULT (current_cpu, abuf, "drn", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fdiv-compact: fdiv $fsdm, $fsdn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fdiv_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_PRBIT ()) { - { - DF opval = sh64_fdivd (current_cpu, GET_H_DR (FLD (f_rn)), GET_H_DR (FLD (f_rm))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-fsdn", 'f', opval); - } -} else { - { - SF opval = sh64_fdivs (current_cpu, GET_H_FRC (FLD (f_rn)), GET_H_FRC (FLD (f_rm))); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "fsdn", 'f', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* fipr-compact: fipr $fvm, $fvn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fipr_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fipr_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_m; - QI tmp_n; - SF tmp_res; - tmp_m = FLD (f_vm); - tmp_n = FLD (f_vn); - tmp_res = sh64_fmuls (current_cpu, GET_H_FVC (FLD (f_vm)), GET_H_FVC (FLD (f_vn))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_FRC (ADDQI (tmp_m, 1)), GET_H_FRC (ADDQI (tmp_n, 1)))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_FRC (ADDQI (tmp_m, 2)), GET_H_FRC (ADDQI (tmp_n, 2)))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_FRC (ADDQI (tmp_m, 3)), GET_H_FRC (ADDQI (tmp_n, 3)))); - { - SF opval = tmp_res; - SET_H_FRC (ADDQI (tmp_n, 3), opval); - TRACE_RESULT (current_cpu, abuf, "frc-add--DFLT-n-3", 'f', opval); - } -} - - return vpc; -#undef FLD -} - -/* flds-compact: flds $frn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,flds_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SF opval = GET_H_FRC (FLD (f_rn)); - CPU (h_fr[((UINT) 32)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fpul", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fldi0-compact: fldi0 $frn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fldi0_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SF opval = sh64_fldi0 (current_cpu); - SET_H_FRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "frn", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fldi1-compact: fldi1 $frn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fldi1_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SF opval = sh64_fldi1 (current_cpu); - SET_H_FRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "frn", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* float-compact: float fpul, $fsdn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,float_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_PRBIT ()) { - { - DF opval = sh64_floatld (current_cpu, CPU (h_fr[((UINT) 32)])); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-fsdn", 'f', opval); - } -} else { - { - SF opval = sh64_floatls (current_cpu, CPU (h_fr[((UINT) 32)])); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "fsdn", 'f', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* fmac-compact: fmac fr0, $frm, $frn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fmac_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SF opval = sh64_fmacs (current_cpu, GET_H_FRC (((UINT) 0)), GET_H_FRC (FLD (f_rm)), GET_H_FRC (FLD (f_rn))); - SET_H_FRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "frn", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fmov1-compact: fmov $frm, $frn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fmov1_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (GET_H_SZBIT ())) { - { - SF opval = GET_H_FRC (FLD (f_rm)); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "frn", 'f', opval); - } -} else { -if (EQSI (ANDSI (FLD (f_rm), 1), 1)) { -if (EQSI (ANDSI (FLD (f_rn), 1), 1)) { - { - DF opval = GET_H_XD (((FLD (f_rm)) & (INVQI (1)))); - SET_H_XD (((FLD (f_rn)) & (INVQI (1))), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "xd-and--DFLT-index-of--DFLT-frn-inv--QI-1", 'f', opval); - } -} else { - { - DF opval = GET_H_XD (((FLD (f_rm)) & (INVQI (1)))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-frn", 'f', opval); - } -} -} else { -if (EQSI (ANDSI (FLD (f_rn), 1), 1)) { - { - DF opval = GET_H_DR (FLD (f_rm)); - SET_H_XD (((FLD (f_rn)) & (INVQI (1))), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "xd-and--DFLT-index-of--DFLT-frn-inv--QI-1", 'f', opval); - } -} else { - { - DF opval = GET_H_DR (FLD (f_rm)); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-frn", 'f', opval); - } -} -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* fmov2-compact: fmov @$rm, $frn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fmov2_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (GET_H_SZBIT ())) { - { - SF opval = GETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "frn", 'f', opval); - } -} else { -if (EQSI (ANDSI (FLD (f_rn), 1), 1)) { - { - DF opval = GETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); - SET_H_XD (((FLD (f_rn)) & (INVQI (1))), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "xd-and--DFLT-index-of--DFLT-frn-inv--QI-1", 'f', opval); - } -} else { - { - DF opval = GETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-frn", 'f', opval); - } -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* fmov3-compact: fmov @${rm}+, frn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fmov3_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (GET_H_SZBIT ())) { -{ - { - SF opval = GETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "frn", 'f', opval); - } - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 4); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } -} -} else { -{ -if (EQSI (ANDSI (FLD (f_rn), 1), 1)) { - { - DF opval = GETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); - SET_H_XD (((FLD (f_rn)) & (INVQI (1))), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "xd-and--DFLT-index-of--DFLT-frn-inv--QI-1", 'f', opval); - } -} else { - { - DF opval = GETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-frn", 'f', opval); - } -} - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 8); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* fmov4-compact: fmov @(r0, $rm), $frn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fmov4_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (GET_H_SZBIT ())) { - { - SF opval = GETMEMSF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm)))); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "frn", 'f', opval); - } -} else { -if (EQSI (ANDSI (FLD (f_rn), 1), 1)) { - { - DF opval = GETMEMDF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm)))); - SET_H_XD (((FLD (f_rn)) & (INVQI (1))), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "xd-and--DFLT-index-of--DFLT-frn-inv--QI-1", 'f', opval); - } -} else { - { - DF opval = GETMEMDF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm)))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-frn", 'f', opval); - } -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* fmov5-compact: fmov $frm, @$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fmov5_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (GET_H_SZBIT ())) { - { - SF opval = GET_H_FRC (FLD (f_rm)); - SETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} else { -if (EQSI (ANDSI (FLD (f_rm), 1), 1)) { - { - DF opval = GET_H_XD (((FLD (f_rm)) & (INVQI (1)))); - SETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} else { - { - DF opval = GET_H_DR (FLD (f_rm)); - SETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* fmov6-compact: fmov $frm, @-$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fmov6_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (GET_H_SZBIT ())) { -{ - { - SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), 4); - SET_H_GRC (FLD (f_rn), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - SF opval = GET_H_FRC (FLD (f_rm)); - SETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} -} else { -{ - { - SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), 8); - SET_H_GRC (FLD (f_rn), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -if (EQSI (ANDSI (FLD (f_rm), 1), 1)) { - { - DF opval = GET_H_XD (((FLD (f_rm)) & (INVQI (1)))); - SETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} else { - { - DF opval = GET_H_DR (FLD (f_rm)); - SETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* fmov7-compact: fmov $frm, @(r0, $rn) */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fmov7_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (GET_H_SZBIT ())) { - { - SF opval = GET_H_FRC (FLD (f_rm)); - SETMEMSF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} else { -if (EQSI (ANDSI (FLD (f_rm), 1), 1)) { - { - DF opval = GET_H_XD (((FLD (f_rm)) & (INVQI (1)))); - SETMEMDF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} else { - { - DF opval = GET_H_DR (FLD (f_rm)); - SETMEMDF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* fmul-compact: fmul $fsdm, $fsdn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fmul_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_PRBIT ()) { - { - DF opval = sh64_fmuld (current_cpu, GET_H_DR (FLD (f_rm)), GET_H_DR (FLD (f_rn))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-fsdn", 'f', opval); - } -} else { - { - SF opval = sh64_fmuls (current_cpu, GET_H_FRC (FLD (f_rm)), GET_H_FRC (FLD (f_rn))); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "fsdn", 'f', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* fneg-compact: fneg $fsdn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fneg_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_PRBIT ()) { - { - DF opval = sh64_fnegd (current_cpu, GET_H_DR (FLD (f_rn))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-fsdn", 'f', opval); - } -} else { - { - SF opval = sh64_fnegs (current_cpu, GET_H_FRC (FLD (f_rn))); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "fsdn", 'f', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* frchg-compact: frchg */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,frchg_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = NOTBI (GET_H_FRBIT ()); - SET_H_FRBIT (opval); - TRACE_RESULT (current_cpu, abuf, "frbit", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* fschg-compact: fschg */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fschg_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = NOTBI (GET_H_SZBIT ()); - SET_H_SZBIT (opval); - TRACE_RESULT (current_cpu, abuf, "szbit", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* fsqrt-compact: fsqrt $fsdn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fsqrt_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_PRBIT ()) { - { - DF opval = sh64_fsqrtd (current_cpu, GET_H_DR (FLD (f_rn))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-fsdn", 'f', opval); - } -} else { - { - SF opval = sh64_fsqrts (current_cpu, GET_H_FRC (FLD (f_rn))); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "fsdn", 'f', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* fsts-compact: fsts fpul, $frn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fsts_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SF opval = CPU (h_fr[((UINT) 32)]); - SET_H_FRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "frn", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fsub-compact: fsub $fsdm, $fsdn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,fsub_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (GET_H_PRBIT ()) { - { - DF opval = sh64_fsubd (current_cpu, GET_H_DR (FLD (f_rn)), GET_H_DR (FLD (f_rm))); - SET_H_DR (FLD (f_rn), opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "dr-index-of--DFLT-fsdn", 'f', opval); - } -} else { - { - SF opval = sh64_fsubs (current_cpu, GET_H_FRC (FLD (f_rn)), GET_H_FRC (FLD (f_rm))); - SET_H_FRC (FLD (f_rn), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "fsdn", 'f', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* ftrc-compact: ftrc $fsdn, fpul */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,ftrc_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SF opval = ((GET_H_PRBIT ()) ? (sh64_ftrcdl (current_cpu, GET_H_DR (FLD (f_rn)))) : (sh64_ftrcsl (current_cpu, GET_H_FRC (FLD (f_rn))))); - CPU (h_fr[((UINT) 32)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fpul", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* ftrv-compact: ftrv xmtrx, $fvn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,ftrv_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fipr_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_n; - SF tmp_res; - tmp_n = FLD (f_vn); - tmp_res = sh64_fmuls (current_cpu, GET_H_XF (((UINT) 0)), GET_H_FRC (tmp_n)); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 4)), GET_H_FRC (ADDQI (tmp_n, 1)))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 8)), GET_H_FRC (ADDQI (tmp_n, 2)))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 12)), GET_H_FRC (ADDQI (tmp_n, 3)))); - { - SF opval = tmp_res; - SET_H_FRC (tmp_n, opval); - TRACE_RESULT (current_cpu, abuf, "frc-n", 'f', opval); - } - tmp_res = sh64_fmuls (current_cpu, GET_H_XF (((UINT) 1)), GET_H_FRC (tmp_n)); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 5)), GET_H_FRC (ADDQI (tmp_n, 1)))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 9)), GET_H_FRC (ADDQI (tmp_n, 2)))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 13)), GET_H_FRC (ADDQI (tmp_n, 3)))); - { - SF opval = tmp_res; - SET_H_FRC (ADDQI (tmp_n, 1), opval); - TRACE_RESULT (current_cpu, abuf, "frc-add--DFLT-n-1", 'f', opval); - } - tmp_res = sh64_fmuls (current_cpu, GET_H_XF (((UINT) 2)), GET_H_FRC (tmp_n)); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 6)), GET_H_FRC (ADDQI (tmp_n, 1)))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 10)), GET_H_FRC (ADDQI (tmp_n, 2)))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 14)), GET_H_FRC (ADDQI (tmp_n, 3)))); - { - SF opval = tmp_res; - SET_H_FRC (ADDQI (tmp_n, 2), opval); - TRACE_RESULT (current_cpu, abuf, "frc-add--DFLT-n-2", 'f', opval); - } - tmp_res = sh64_fmuls (current_cpu, GET_H_XF (((UINT) 3)), GET_H_FRC (tmp_n)); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 7)), GET_H_FRC (ADDQI (tmp_n, 1)))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 11)), GET_H_FRC (ADDQI (tmp_n, 2)))); - tmp_res = sh64_fadds (current_cpu, tmp_res, sh64_fmuls (current_cpu, GET_H_XF (((UINT) 15)), GET_H_FRC (ADDQI (tmp_n, 3)))); - { - SF opval = tmp_res; - SET_H_FRC (ADDQI (tmp_n, 3), opval); - TRACE_RESULT (current_cpu, abuf, "frc-add--DFLT-n-3", 'f', opval); - } -} - - return vpc; -#undef FLD -} - -/* jmp-compact: jmp @$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,jmp_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - UDI opval = GET_H_GRC (FLD (f_rn)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* jsr-compact: jsr @$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,jsr_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -{ - { - SI opval = ADDDI (pc, 4); - SET_H_PR (opval); - TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); - } - { - UDI opval = GET_H_GRC (FLD (f_rn)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* ldc-compact: ldc $rn, gbr */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,ldc_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GRC (FLD (f_rn)); - SET_H_GBR (opval); - TRACE_RESULT (current_cpu, abuf, "gbr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldcl-compact: ldc.l @${rn}+, gbr */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,ldcl_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); - SET_H_GBR (opval); - TRACE_RESULT (current_cpu, abuf, "gbr", 'x', opval); - } - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* lds-fpscr-compact: lds $rn, fpscr */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,lds_fpscr_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GRC (FLD (f_rn)); - SET_H_FPCCR (opval); - TRACE_RESULT (current_cpu, abuf, "fpscr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldsl-fpscr-compact: lds.l @${rn}+, fpscr */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,ldsl_fpscr_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); - SET_H_FPCCR (opval); - TRACE_RESULT (current_cpu, abuf, "fpscr", 'x', opval); - } - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* lds-fpul-compact: lds $rn, fpul */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,lds_fpul_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SF opval = SUBWORDSISF (GET_H_GRC (FLD (f_rn))); - CPU (h_fr[((UINT) 32)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fpul", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* ldsl-fpul-compact: lds.l @${rn}+, fpul */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,ldsl_fpul_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SF opval = GETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rn))); - CPU (h_fr[((UINT) 32)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fpul", 'f', opval); - } - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* lds-mach-compact: lds $rn, mach */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,lds_mach_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GRC (FLD (f_rn)); - SET_H_MACH (opval); - TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldsl-mach-compact: lds.l @${rn}+, mach */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,ldsl_mach_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); - SET_H_MACH (opval); - TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); - } - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* lds-macl-compact: lds $rn, macl */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,lds_macl_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GRC (FLD (f_rn)); - SET_H_MACL (opval); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldsl-macl-compact: lds.l @${rn}+, macl */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,ldsl_macl_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); - SET_H_MACL (opval); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* lds-pr-compact: lds $rn, pr */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,lds_pr_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GRC (FLD (f_rn)); - SET_H_PR (opval); - TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldsl-pr-compact: lds.l @${rn}+, pr */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,ldsl_pr_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); - SET_H_PR (opval); - TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); - } - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* macl-compact: mac.l @${rm}+, @${rn}+ */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,macl_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_tmpry; - DI tmp_mac; - DI tmp_result; - SI tmp_x; - SI tmp_y; - tmp_x = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -if (EQSI (FLD (f_rn), FLD (f_rm))) { -{ - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 4); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } -} -} - tmp_y = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 4); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } - tmp_tmpry = MULDI (ZEXTSIDI (tmp_x), ZEXTSIDI (tmp_y)); - tmp_mac = ORDI (SLLDI (ZEXTSIDI (GET_H_MACH ()), 32), ZEXTSIDI (GET_H_MACL ())); - tmp_result = ADDDI (tmp_mac, tmp_tmpry); -{ -if (GET_H_SBIT ()) { -{ - SI tmp_min; - SI tmp_max; - tmp_max = SRLDI (INVDI (0), 16); - tmp_min = SRLDI (INVDI (0), 15); -if (GTDI (tmp_result, tmp_max)) { - tmp_result = tmp_max; -} else { -if (LTDI (tmp_result, tmp_min)) { - tmp_result = tmp_min; -} -} -} -} - { - SI opval = SUBWORDDISI (tmp_result, 0); - SET_H_MACH (opval); - TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); - } - { - SI opval = SUBWORDDISI (tmp_result, 1); - SET_H_MACL (opval); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* macw-compact: mac.w @${rm}+, @${rn}+ */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,macw_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmpry; - DI tmp_mac; - DI tmp_result; - HI tmp_x; - HI tmp_y; - tmp_x = GETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 2); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -if (EQSI (FLD (f_rn), FLD (f_rm))) { -{ - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 2); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 2); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } -} -} - tmp_y = GETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 2); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } - tmp_tmpry = MULSI (ZEXTHISI (tmp_x), ZEXTHISI (tmp_y)); -if (GET_H_SBIT ()) { -{ -if (ADDOFSI (tmp_tmpry, GET_H_MACL (), 0)) { - { - SI opval = 1; - SET_H_MACH (opval); - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); - } -} - { - SI opval = ADDSI (tmp_tmpry, GET_H_MACL ()); - SET_H_MACL (opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } -} -} else { -{ - tmp_mac = ORDI (SLLDI (ZEXTSIDI (GET_H_MACH ()), 32), ZEXTSIDI (GET_H_MACL ())); - tmp_result = ADDDI (tmp_mac, EXTSIDI (tmp_tmpry)); - { - SI opval = SUBWORDDISI (tmp_result, 0); - SET_H_MACH (opval); - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); - } - { - SI opval = SUBWORDDISI (tmp_result, 1); - SET_H_MACL (opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } -} -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* mov-compact: mov $rm64, $rn64 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,mov_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = GET_H_GR (FLD (f_rm)); - SET_H_GR (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn64", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* movi-compact: mov #$imm8, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movi_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTQIDI (ANDQI (FLD (f_imm8), 255)); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movb1-compact: mov.b $rm, @$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movb1_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - UQI opval = SUBWORDSIUQI (GET_H_GRC (FLD (f_rm)), 3); - SETMEMUQI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movb2-compact: mov.b $rm, @-$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movb2_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 1); - { - UQI opval = SUBWORDSIUQI (GET_H_GRC (FLD (f_rm)), 3); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_addr; - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* movb3-compact: mov.b $rm, @(r0,$rn) */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movb3_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - UQI opval = SUBWORDSIUQI (GET_H_GRC (FLD (f_rm)), 3); - SETMEMUQI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movb4-compact: mov.b r0, @($imm8, gbr) */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movb4_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = ADDSI (GET_H_GBR (), FLD (f_imm8)); - { - UQI opval = SUBWORDSIUQI (GET_H_GRC (((UINT) 0)), 3); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* movb5-compact: mov.b r0, @($imm4, $rm) */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movb5_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movb5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4)); - { - UQI opval = SUBWORDSIUQI (GET_H_GRC (((UINT) 0)), 3); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* movb6-compact: mov.b @$rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movb6_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTQISI (GETMEMQI (current_cpu, pc, GET_H_GRC (FLD (f_rm)))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movb7-compact: mov.b @${rm}+, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movb7_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_data; - tmp_data = GETMEMQI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); -if (EQSI (FLD (f_rm), FLD (f_rn))) { - { - SI opval = EXTQISI (tmp_data); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } -} else { - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 1); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } -} - { - SI opval = EXTQISI (tmp_data); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* movb8-compact: mov.b @(r0, $rm), $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movb8_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm))))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movb9-compact: mov.b @($imm8, gbr), r0 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movb9_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8)))); - SET_H_GRC (((UINT) 0), opval); - TRACE_RESULT (current_cpu, abuf, "r0", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movb10-compact: mov.b @($imm4, $rm), r0 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movb10_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movb5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4)))); - SET_H_GRC (((UINT) 0), opval); - TRACE_RESULT (current_cpu, abuf, "r0", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movl1-compact: mov.l $rm, @$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movl1_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GRC (FLD (f_rm)); - SETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movl2-compact: mov.l $rm, @-$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movl2_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_addr; - tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); - { - SI opval = GET_H_GRC (FLD (f_rm)); - SETMEMSI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_addr; - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* movl3-compact: mov.l $rm, @(r0, $rn) */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movl3_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GRC (FLD (f_rm)); - SETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movl4-compact: mov.l r0, @($imm8x4, gbr) */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movl4_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GRC (((UINT) 0)); - SETMEMSI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8x4)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movl5-compact: mov.l $rm, @($imm4x4, $rn) */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movl5_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GRC (FLD (f_rm)); - SETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rn)), FLD (f_imm4x4)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movl6-compact: mov.l @$rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movl6_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movl7-compact: mov.l @${rm}+, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movl7_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -if (EQSI (FLD (f_rm), FLD (f_rn))) { - { - SI opval = GET_H_GRC (FLD (f_rn)); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } -} else { - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 4); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* movl8-compact: mov.l @(r0, $rm), $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movl8_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm)))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movl9-compact: mov.l @($imm8x4, gbr), r0 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movl9_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8x4))); - SET_H_GRC (((UINT) 0), opval); - TRACE_RESULT (current_cpu, abuf, "r0", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movl10-compact: mov.l @($imm8x4, pc), $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movl10_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_imm8x4), ANDDI (ADDDI (pc, 4), INVSI (3)))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movl11-compact: mov.l @($imm4x4, $rm), $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movl11_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4x4))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movw1-compact: mov.w $rm, @$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movw1_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1); - SETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movw2-compact: mov.w $rm, @-$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movw2_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 2); - { - HI opval = SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1); - SETMEMHI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_addr; - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* movw3-compact: mov.w $rm, @(r0, $rn) */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movw3_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1); - SETMEMHI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movw4-compact: mov.w r0, @($imm8x2, gbr) */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movw4_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = SUBWORDSIHI (GET_H_GRC (((UINT) 0)), 1); - SETMEMHI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8x2)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movw5-compact: mov.w r0, @($imm4x2, $rn) */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movw5_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = SUBWORDSIHI (GET_H_GRC (((UINT) 0)), 1); - SETMEMHI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rn)), FLD (f_imm4x2)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movw6-compact: mov.w @$rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movw6_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTHISI (GETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rm)))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movw7-compact: mov.w @${rm}+, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movw7_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - HI tmp_data; - tmp_data = GETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); -if (EQSI (FLD (f_rm), FLD (f_rn))) { - { - SI opval = EXTHISI (tmp_data); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } -} else { - { - SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 2); - SET_H_GRC (FLD (f_rm), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "rm", 'x', opval); - } -} - { - SI opval = EXTHISI (tmp_data); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* movw8-compact: mov.w @(r0, $rm), $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movw8_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm))))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movw9-compact: mov.w @($imm8x2, gbr), r0 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movw9_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8x2)))); - SET_H_GRC (((UINT) 0), opval); - TRACE_RESULT (current_cpu, abuf, "r0", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movw10-compact: mov.w @($imm8x2, pc), $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movw10_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDDI (ADDDI (pc, 4), FLD (f_imm8x2)))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movw11-compact: mov.w @($imm4x2, $rm), r0 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movw11_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw11_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4x2)))); - SET_H_GRC (((UINT) 0), opval); - TRACE_RESULT (current_cpu, abuf, "r0", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* mova-compact: mova @($imm8x4, pc), r0 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,mova_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDDI (ANDDI (ADDDI (pc, 4), INVSI (3)), FLD (f_imm8x4)); - SET_H_GRC (((UINT) 0), opval); - TRACE_RESULT (current_cpu, abuf, "r0", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movcal-compact: movca.l r0, @$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movcal_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GRC (((UINT) 0)); - SETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movt-compact: movt $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,movt_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTBISI (GET_H_TBIT ()); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* mull-compact: mul.l $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,mull_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = MULSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))); - SET_H_MACL (opval); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* mulsw-compact: muls.w $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,mulsw_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = MULSI (EXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1)), EXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rn)), 1))); - SET_H_MACL (opval); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* muluw-compact: mulu.w $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,muluw_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = MULSI (ZEXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1)), ZEXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rn)), 1))); - SET_H_MACL (opval); - TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* neg-compact: neg $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,neg_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = NEGSI (GET_H_GRC (FLD (f_rm))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* negc-compact: negc $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,negc_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_flag; - tmp_flag = SUBCFSI (0, GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); - { - SI opval = SUBCSI (0, GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = tmp_flag; - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* nop-compact: nop */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,nop_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* not-compact: not $rm64, $rn64 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,not_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = INVDI (GET_H_GR (FLD (f_rm))); - SET_H_GR (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn64", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* ocbi-compact: ocbi @$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,ocbi_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* ocbp-compact: ocbp @$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,ocbp_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* ocbwb-compact: ocbwb @$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,ocbwb_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* or-compact: or $rm64, $rn64 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,or_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = ORDI (GET_H_GR (FLD (f_rm)), GET_H_GR (FLD (f_rn))); - SET_H_GR (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn64", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* ori-compact: or #$uimm8, r0 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,ori_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ORSI (GET_H_GRC (((UINT) 0)), ZEXTSIDI (FLD (f_imm8))); - SET_H_GRC (((UINT) 0), opval); - TRACE_RESULT (current_cpu, abuf, "r0", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* orb-compact: or.b #$imm8, @(r0, gbr) */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,orb_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - UQI tmp_data; - tmp_addr = ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GBR ()); - tmp_data = ORQI (GETMEMUQI (current_cpu, pc, tmp_addr), FLD (f_imm8)); - { - UQI opval = tmp_data; - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* pref-compact: pref @$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,pref_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* rotcl-compact: rotcl $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,rotcl_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_temp; - tmp_temp = SRLSI (GET_H_GRC (FLD (f_rn)), 31); - { - SI opval = ORSI (SLLSI (GET_H_GRC (FLD (f_rn)), 1), GET_H_TBIT ()); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = ((tmp_temp) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* rotcr-compact: rotcr $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,rotcr_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_lsbit; - SI tmp_temp; - tmp_lsbit = ((EQSI (ANDSI (GET_H_GRC (FLD (f_rn)), 1), 0)) ? (0) : (1)); - tmp_temp = GET_H_TBIT (); - { - SI opval = ORSI (SRLSI (GET_H_GRC (FLD (f_rn)), 1), SLLSI (tmp_temp, 31)); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = ((tmp_lsbit) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* rotl-compact: rotl $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,rotl_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_temp; - tmp_temp = SRLSI (GET_H_GRC (FLD (f_rn)), 31); - { - SI opval = ORSI (SLLSI (GET_H_GRC (FLD (f_rn)), 1), tmp_temp); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = ((tmp_temp) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* rotr-compact: rotr $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,rotr_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_lsbit; - SI tmp_temp; - tmp_lsbit = ((EQSI (ANDSI (GET_H_GRC (FLD (f_rn)), 1), 0)) ? (0) : (1)); - tmp_temp = tmp_lsbit; - { - SI opval = ORSI (SRLSI (GET_H_GRC (FLD (f_rn)), 1), SLLSI (tmp_temp, 31)); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = ((tmp_lsbit) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* rts-compact: rts */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,rts_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - UDI opval = GET_H_PR (); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* sets-compact: sets */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,sets_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = 1; - SET_H_SBIT (opval); - TRACE_RESULT (current_cpu, abuf, "sbit", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* sett-compact: sett */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,sett_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = 1; - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shad-compact: shad $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,shad_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_shamt; - tmp_shamt = ANDQI (GET_H_GRC (FLD (f_rm)), 31); -if (GESI (GET_H_GRC (FLD (f_rm)), 0)) { - { - SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), tmp_shamt); - SET_H_GRC (FLD (f_rn), opval); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} else { -if (NEQI (tmp_shamt, 0)) { - { - SI opval = SRASI (GET_H_GRC (FLD (f_rn)), SUBSI (32, tmp_shamt)); - SET_H_GRC (FLD (f_rn), opval); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} else { -if (LTSI (GET_H_GRC (FLD (f_rn)), 0)) { - { - SI opval = NEGSI (1); - SET_H_GRC (FLD (f_rn), opval); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} else { - { - SI opval = 0; - SET_H_GRC (FLD (f_rn), opval); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} -} -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* shal-compact: shal $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,shal_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_t; - tmp_t = SRLSI (GET_H_GRC (FLD (f_rn)), 31); - { - SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 1); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = ((tmp_t) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* shar-compact: shar $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,shar_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_t; - tmp_t = ANDSI (GET_H_GRC (FLD (f_rn)), 1); - { - SI opval = SRASI (GET_H_GRC (FLD (f_rn)), 1); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = ((tmp_t) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* shld-compact: shld $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,shld_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_shamt; - tmp_shamt = ANDQI (GET_H_GRC (FLD (f_rm)), 31); -if (GESI (GET_H_GRC (FLD (f_rm)), 0)) { - { - SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), tmp_shamt); - SET_H_GRC (FLD (f_rn), opval); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} else { -if (NEQI (tmp_shamt, 0)) { - { - SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), SUBSI (32, tmp_shamt)); - SET_H_GRC (FLD (f_rn), opval); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} else { - { - SI opval = 0; - SET_H_GRC (FLD (f_rn), opval); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* shll-compact: shll $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,shll_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_t; - tmp_t = SRLSI (GET_H_GRC (FLD (f_rn)), 31); - { - SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 1); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = ((tmp_t) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* shll2-compact: shll2 $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,shll2_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 2); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shll8-compact: shll8 $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,shll8_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 8); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shll16-compact: shll16 $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,shll16_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 16); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shlr-compact: shlr $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,shlr_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_t; - tmp_t = ANDSI (GET_H_GRC (FLD (f_rn)), 1); - { - SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 1); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = ((tmp_t) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* shlr2-compact: shlr2 $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,shlr2_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 2); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shlr8-compact: shlr8 $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,shlr8_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 8); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shlr16-compact: shlr16 $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,shlr16_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 16); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stc-gbr-compact: stc gbr, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,stc_gbr_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_GBR (); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stcl-gbr-compact: stc.l gbr, @-$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,stcl_gbr_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); - { - SI opval = GET_H_GBR (); - SETMEMSI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_addr; - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* sts-fpscr-compact: sts fpscr, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,sts_fpscr_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_FPCCR (); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stsl-fpscr-compact: sts.l fpscr, @-$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,stsl_fpscr_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); - { - SI opval = GET_H_FPCCR (); - SETMEMSI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_addr; - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* sts-fpul-compact: sts fpul, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,sts_fpul_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SUBWORDSFSI (CPU (h_fr[((UINT) 32)])); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stsl-fpul-compact: sts.l fpul, @-$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,stsl_fpul_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); - { - SF opval = CPU (h_fr[((UINT) 32)]); - SETMEMSF (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } - { - SI opval = tmp_addr; - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* sts-mach-compact: sts mach, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,sts_mach_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_MACH (); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stsl-mach-compact: sts.l mach, @-$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,stsl_mach_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); - { - SI opval = GET_H_MACH (); - SETMEMSI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_addr; - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* sts-macl-compact: sts macl, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,sts_macl_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_MACL (); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stsl-macl-compact: sts.l macl, @-$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,stsl_macl_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); - { - SI opval = GET_H_MACL (); - SETMEMSI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_addr; - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* sts-pr-compact: sts pr, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,sts_pr_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_PR (); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stsl-pr-compact: sts.l pr, @-$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,stsl_pr_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); - { - SI opval = GET_H_PR (); - SETMEMSI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_addr; - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* sub-compact: sub $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,sub_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* subc-compact: subc $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,subc_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_flag; - tmp_flag = SUBCFSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); - { - SI opval = SUBCSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = tmp_flag; - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* subv-compact: subv $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,subv_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - BI tmp_t; - tmp_t = SUBOFSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), 0); - { - SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - { - BI opval = ((tmp_t) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* swapb-compact: swap.b $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,swapb_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - UHI tmp_top_half; - UQI tmp_byte1; - UQI tmp_byte0; - tmp_top_half = SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 0); - tmp_byte1 = SUBWORDSIQI (GET_H_GRC (FLD (f_rm)), 2); - tmp_byte0 = SUBWORDSIQI (GET_H_GRC (FLD (f_rm)), 3); - { - SI opval = ORSI (SLLSI (tmp_top_half, 16), ORSI (SLLSI (tmp_byte0, 8), tmp_byte1)); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* swapw-compact: swap.w $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,swapw_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ORSI (SRLSI (GET_H_GRC (FLD (f_rm)), 16), SLLSI (GET_H_GRC (FLD (f_rm)), 16)); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* tasb-compact: tas.b @$rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,tasb_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movw10_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - UQI tmp_byte; - tmp_byte = GETMEMUQI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); - { - BI opval = ((EQQI (tmp_byte, 0)) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - tmp_byte = ORQI (tmp_byte, 128); - { - UQI opval = tmp_byte; - SETMEMUQI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* trapa-compact: trapa #$uimm8 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,trapa_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -sh64_compact_trapa (current_cpu, FLD (f_imm8), pc); - - return vpc; -#undef FLD -} - -/* tst-compact: tst $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,tst_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = ((EQSI (ANDSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))), 0)) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* tsti-compact: tst #$uimm8, r0 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,tsti_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = ((EQSI (ANDSI (GET_H_GRC (((UINT) 0)), ZEXTSISI (FLD (f_imm8))), 0)) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* tstb-compact: tst.b #$imm8, @(r0, gbr) */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,tstb_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - tmp_addr = ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GBR ()); - { - BI opval = ((EQQI (ANDQI (GETMEMUQI (current_cpu, pc, tmp_addr), FLD (f_imm8)), 0)) ? (1) : (0)); - SET_H_TBIT (opval); - TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* xor-compact: xor $rm64, $rn64 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,xor_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = XORDI (GET_H_GR (FLD (f_rn)), GET_H_GR (FLD (f_rm))); - SET_H_GR (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn64", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* xori-compact: xor #$uimm8, r0 */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,xori_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = XORDI (GET_H_GR (((UINT) 0)), ZEXTSIDI (FLD (f_imm8))); - SET_H_GR (((UINT) 0), opval); - TRACE_RESULT (current_cpu, abuf, "gr-0", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* xorb-compact: xor.b #$imm8, @(r0, gbr) */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,xorb_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_addr; - UQI tmp_data; - tmp_addr = ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GBR ()); - tmp_data = XORQI (GETMEMUQI (current_cpu, pc, tmp_addr), FLD (f_imm8)); - { - UQI opval = tmp_data; - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* xtrct-compact: xtrct $rm, $rn */ - -static SEM_PC -SEM_FN_NAME (sh64_compact,xtrct_compact) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movl5_compact.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ORSI (SLLSI (GET_H_GRC (FLD (f_rm)), 16), SRLSI (GET_H_GRC (FLD (f_rn)), 16)); - SET_H_GRC (FLD (f_rn), opval); - TRACE_RESULT (current_cpu, abuf, "rn", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* Table of all semantic fns. */ - -static const struct sem_fn_desc sem_fns[] = { - { SH64_COMPACT_INSN_X_INVALID, SEM_FN_NAME (sh64_compact,x_invalid) }, - { SH64_COMPACT_INSN_X_AFTER, SEM_FN_NAME (sh64_compact,x_after) }, - { SH64_COMPACT_INSN_X_BEFORE, SEM_FN_NAME (sh64_compact,x_before) }, - { SH64_COMPACT_INSN_X_CTI_CHAIN, SEM_FN_NAME (sh64_compact,x_cti_chain) }, - { SH64_COMPACT_INSN_X_CHAIN, SEM_FN_NAME (sh64_compact,x_chain) }, - { SH64_COMPACT_INSN_X_BEGIN, SEM_FN_NAME (sh64_compact,x_begin) }, - { SH64_COMPACT_INSN_ADD_COMPACT, SEM_FN_NAME (sh64_compact,add_compact) }, - { SH64_COMPACT_INSN_ADDI_COMPACT, SEM_FN_NAME (sh64_compact,addi_compact) }, - { SH64_COMPACT_INSN_ADDC_COMPACT, SEM_FN_NAME (sh64_compact,addc_compact) }, - { SH64_COMPACT_INSN_ADDV_COMPACT, SEM_FN_NAME (sh64_compact,addv_compact) }, - { SH64_COMPACT_INSN_AND_COMPACT, SEM_FN_NAME (sh64_compact,and_compact) }, - { SH64_COMPACT_INSN_ANDI_COMPACT, SEM_FN_NAME (sh64_compact,andi_compact) }, - { SH64_COMPACT_INSN_ANDB_COMPACT, SEM_FN_NAME (sh64_compact,andb_compact) }, - { SH64_COMPACT_INSN_BF_COMPACT, SEM_FN_NAME (sh64_compact,bf_compact) }, - { SH64_COMPACT_INSN_BFS_COMPACT, SEM_FN_NAME (sh64_compact,bfs_compact) }, - { SH64_COMPACT_INSN_BRA_COMPACT, SEM_FN_NAME (sh64_compact,bra_compact) }, - { SH64_COMPACT_INSN_BRAF_COMPACT, SEM_FN_NAME (sh64_compact,braf_compact) }, - { SH64_COMPACT_INSN_BRK_COMPACT, SEM_FN_NAME (sh64_compact,brk_compact) }, - { SH64_COMPACT_INSN_BSR_COMPACT, SEM_FN_NAME (sh64_compact,bsr_compact) }, - { SH64_COMPACT_INSN_BSRF_COMPACT, SEM_FN_NAME (sh64_compact,bsrf_compact) }, - { SH64_COMPACT_INSN_BT_COMPACT, SEM_FN_NAME (sh64_compact,bt_compact) }, - { SH64_COMPACT_INSN_BTS_COMPACT, SEM_FN_NAME (sh64_compact,bts_compact) }, - { SH64_COMPACT_INSN_CLRMAC_COMPACT, SEM_FN_NAME (sh64_compact,clrmac_compact) }, - { SH64_COMPACT_INSN_CLRS_COMPACT, SEM_FN_NAME (sh64_compact,clrs_compact) }, - { SH64_COMPACT_INSN_CLRT_COMPACT, SEM_FN_NAME (sh64_compact,clrt_compact) }, - { SH64_COMPACT_INSN_CMPEQ_COMPACT, SEM_FN_NAME (sh64_compact,cmpeq_compact) }, - { SH64_COMPACT_INSN_CMPEQI_COMPACT, SEM_FN_NAME (sh64_compact,cmpeqi_compact) }, - { SH64_COMPACT_INSN_CMPGE_COMPACT, SEM_FN_NAME (sh64_compact,cmpge_compact) }, - { SH64_COMPACT_INSN_CMPGT_COMPACT, SEM_FN_NAME (sh64_compact,cmpgt_compact) }, - { SH64_COMPACT_INSN_CMPHI_COMPACT, SEM_FN_NAME (sh64_compact,cmphi_compact) }, - { SH64_COMPACT_INSN_CMPHS_COMPACT, SEM_FN_NAME (sh64_compact,cmphs_compact) }, - { SH64_COMPACT_INSN_CMPPL_COMPACT, SEM_FN_NAME (sh64_compact,cmppl_compact) }, - { SH64_COMPACT_INSN_CMPPZ_COMPACT, SEM_FN_NAME (sh64_compact,cmppz_compact) }, - { SH64_COMPACT_INSN_CMPSTR_COMPACT, SEM_FN_NAME (sh64_compact,cmpstr_compact) }, - { SH64_COMPACT_INSN_DIV0S_COMPACT, SEM_FN_NAME (sh64_compact,div0s_compact) }, - { SH64_COMPACT_INSN_DIV0U_COMPACT, SEM_FN_NAME (sh64_compact,div0u_compact) }, - { SH64_COMPACT_INSN_DIV1_COMPACT, SEM_FN_NAME (sh64_compact,div1_compact) }, - { SH64_COMPACT_INSN_DMULSL_COMPACT, SEM_FN_NAME (sh64_compact,dmulsl_compact) }, - { SH64_COMPACT_INSN_DMULUL_COMPACT, SEM_FN_NAME (sh64_compact,dmulul_compact) }, - { SH64_COMPACT_INSN_DT_COMPACT, SEM_FN_NAME (sh64_compact,dt_compact) }, - { SH64_COMPACT_INSN_EXTSB_COMPACT, SEM_FN_NAME (sh64_compact,extsb_compact) }, - { SH64_COMPACT_INSN_EXTSW_COMPACT, SEM_FN_NAME (sh64_compact,extsw_compact) }, - { SH64_COMPACT_INSN_EXTUB_COMPACT, SEM_FN_NAME (sh64_compact,extub_compact) }, - { SH64_COMPACT_INSN_EXTUW_COMPACT, SEM_FN_NAME (sh64_compact,extuw_compact) }, - { SH64_COMPACT_INSN_FABS_COMPACT, SEM_FN_NAME (sh64_compact,fabs_compact) }, - { SH64_COMPACT_INSN_FADD_COMPACT, SEM_FN_NAME (sh64_compact,fadd_compact) }, - { SH64_COMPACT_INSN_FCMPEQ_COMPACT, SEM_FN_NAME (sh64_compact,fcmpeq_compact) }, - { SH64_COMPACT_INSN_FCMPGT_COMPACT, SEM_FN_NAME (sh64_compact,fcmpgt_compact) }, - { SH64_COMPACT_INSN_FCNVDS_COMPACT, SEM_FN_NAME (sh64_compact,fcnvds_compact) }, - { SH64_COMPACT_INSN_FCNVSD_COMPACT, SEM_FN_NAME (sh64_compact,fcnvsd_compact) }, - { SH64_COMPACT_INSN_FDIV_COMPACT, SEM_FN_NAME (sh64_compact,fdiv_compact) }, - { SH64_COMPACT_INSN_FIPR_COMPACT, SEM_FN_NAME (sh64_compact,fipr_compact) }, - { SH64_COMPACT_INSN_FLDS_COMPACT, SEM_FN_NAME (sh64_compact,flds_compact) }, - { SH64_COMPACT_INSN_FLDI0_COMPACT, SEM_FN_NAME (sh64_compact,fldi0_compact) }, - { SH64_COMPACT_INSN_FLDI1_COMPACT, SEM_FN_NAME (sh64_compact,fldi1_compact) }, - { SH64_COMPACT_INSN_FLOAT_COMPACT, SEM_FN_NAME (sh64_compact,float_compact) }, - { SH64_COMPACT_INSN_FMAC_COMPACT, SEM_FN_NAME (sh64_compact,fmac_compact) }, - { SH64_COMPACT_INSN_FMOV1_COMPACT, SEM_FN_NAME (sh64_compact,fmov1_compact) }, - { SH64_COMPACT_INSN_FMOV2_COMPACT, SEM_FN_NAME (sh64_compact,fmov2_compact) }, - { SH64_COMPACT_INSN_FMOV3_COMPACT, SEM_FN_NAME (sh64_compact,fmov3_compact) }, - { SH64_COMPACT_INSN_FMOV4_COMPACT, SEM_FN_NAME (sh64_compact,fmov4_compact) }, - { SH64_COMPACT_INSN_FMOV5_COMPACT, SEM_FN_NAME (sh64_compact,fmov5_compact) }, - { SH64_COMPACT_INSN_FMOV6_COMPACT, SEM_FN_NAME (sh64_compact,fmov6_compact) }, - { SH64_COMPACT_INSN_FMOV7_COMPACT, SEM_FN_NAME (sh64_compact,fmov7_compact) }, - { SH64_COMPACT_INSN_FMUL_COMPACT, SEM_FN_NAME (sh64_compact,fmul_compact) }, - { SH64_COMPACT_INSN_FNEG_COMPACT, SEM_FN_NAME (sh64_compact,fneg_compact) }, - { SH64_COMPACT_INSN_FRCHG_COMPACT, SEM_FN_NAME (sh64_compact,frchg_compact) }, - { SH64_COMPACT_INSN_FSCHG_COMPACT, SEM_FN_NAME (sh64_compact,fschg_compact) }, - { SH64_COMPACT_INSN_FSQRT_COMPACT, SEM_FN_NAME (sh64_compact,fsqrt_compact) }, - { SH64_COMPACT_INSN_FSTS_COMPACT, SEM_FN_NAME (sh64_compact,fsts_compact) }, - { SH64_COMPACT_INSN_FSUB_COMPACT, SEM_FN_NAME (sh64_compact,fsub_compact) }, - { SH64_COMPACT_INSN_FTRC_COMPACT, SEM_FN_NAME (sh64_compact,ftrc_compact) }, - { SH64_COMPACT_INSN_FTRV_COMPACT, SEM_FN_NAME (sh64_compact,ftrv_compact) }, - { SH64_COMPACT_INSN_JMP_COMPACT, SEM_FN_NAME (sh64_compact,jmp_compact) }, - { SH64_COMPACT_INSN_JSR_COMPACT, SEM_FN_NAME (sh64_compact,jsr_compact) }, - { SH64_COMPACT_INSN_LDC_COMPACT, SEM_FN_NAME (sh64_compact,ldc_compact) }, - { SH64_COMPACT_INSN_LDCL_COMPACT, SEM_FN_NAME (sh64_compact,ldcl_compact) }, - { SH64_COMPACT_INSN_LDS_FPSCR_COMPACT, SEM_FN_NAME (sh64_compact,lds_fpscr_compact) }, - { SH64_COMPACT_INSN_LDSL_FPSCR_COMPACT, SEM_FN_NAME (sh64_compact,ldsl_fpscr_compact) }, - { SH64_COMPACT_INSN_LDS_FPUL_COMPACT, SEM_FN_NAME (sh64_compact,lds_fpul_compact) }, - { SH64_COMPACT_INSN_LDSL_FPUL_COMPACT, SEM_FN_NAME (sh64_compact,ldsl_fpul_compact) }, - { SH64_COMPACT_INSN_LDS_MACH_COMPACT, SEM_FN_NAME (sh64_compact,lds_mach_compact) }, - { SH64_COMPACT_INSN_LDSL_MACH_COMPACT, SEM_FN_NAME (sh64_compact,ldsl_mach_compact) }, - { SH64_COMPACT_INSN_LDS_MACL_COMPACT, SEM_FN_NAME (sh64_compact,lds_macl_compact) }, - { SH64_COMPACT_INSN_LDSL_MACL_COMPACT, SEM_FN_NAME (sh64_compact,ldsl_macl_compact) }, - { SH64_COMPACT_INSN_LDS_PR_COMPACT, SEM_FN_NAME (sh64_compact,lds_pr_compact) }, - { SH64_COMPACT_INSN_LDSL_PR_COMPACT, SEM_FN_NAME (sh64_compact,ldsl_pr_compact) }, - { SH64_COMPACT_INSN_MACL_COMPACT, SEM_FN_NAME (sh64_compact,macl_compact) }, - { SH64_COMPACT_INSN_MACW_COMPACT, SEM_FN_NAME (sh64_compact,macw_compact) }, - { SH64_COMPACT_INSN_MOV_COMPACT, SEM_FN_NAME (sh64_compact,mov_compact) }, - { SH64_COMPACT_INSN_MOVI_COMPACT, SEM_FN_NAME (sh64_compact,movi_compact) }, - { SH64_COMPACT_INSN_MOVB1_COMPACT, SEM_FN_NAME (sh64_compact,movb1_compact) }, - { SH64_COMPACT_INSN_MOVB2_COMPACT, SEM_FN_NAME (sh64_compact,movb2_compact) }, - { SH64_COMPACT_INSN_MOVB3_COMPACT, SEM_FN_NAME (sh64_compact,movb3_compact) }, - { SH64_COMPACT_INSN_MOVB4_COMPACT, SEM_FN_NAME (sh64_compact,movb4_compact) }, - { SH64_COMPACT_INSN_MOVB5_COMPACT, SEM_FN_NAME (sh64_compact,movb5_compact) }, - { SH64_COMPACT_INSN_MOVB6_COMPACT, SEM_FN_NAME (sh64_compact,movb6_compact) }, - { SH64_COMPACT_INSN_MOVB7_COMPACT, SEM_FN_NAME (sh64_compact,movb7_compact) }, - { SH64_COMPACT_INSN_MOVB8_COMPACT, SEM_FN_NAME (sh64_compact,movb8_compact) }, - { SH64_COMPACT_INSN_MOVB9_COMPACT, SEM_FN_NAME (sh64_compact,movb9_compact) }, - { SH64_COMPACT_INSN_MOVB10_COMPACT, SEM_FN_NAME (sh64_compact,movb10_compact) }, - { SH64_COMPACT_INSN_MOVL1_COMPACT, SEM_FN_NAME (sh64_compact,movl1_compact) }, - { SH64_COMPACT_INSN_MOVL2_COMPACT, SEM_FN_NAME (sh64_compact,movl2_compact) }, - { SH64_COMPACT_INSN_MOVL3_COMPACT, SEM_FN_NAME (sh64_compact,movl3_compact) }, - { SH64_COMPACT_INSN_MOVL4_COMPACT, SEM_FN_NAME (sh64_compact,movl4_compact) }, - { SH64_COMPACT_INSN_MOVL5_COMPACT, SEM_FN_NAME (sh64_compact,movl5_compact) }, - { SH64_COMPACT_INSN_MOVL6_COMPACT, SEM_FN_NAME (sh64_compact,movl6_compact) }, - { SH64_COMPACT_INSN_MOVL7_COMPACT, SEM_FN_NAME (sh64_compact,movl7_compact) }, - { SH64_COMPACT_INSN_MOVL8_COMPACT, SEM_FN_NAME (sh64_compact,movl8_compact) }, - { SH64_COMPACT_INSN_MOVL9_COMPACT, SEM_FN_NAME (sh64_compact,movl9_compact) }, - { SH64_COMPACT_INSN_MOVL10_COMPACT, SEM_FN_NAME (sh64_compact,movl10_compact) }, - { SH64_COMPACT_INSN_MOVL11_COMPACT, SEM_FN_NAME (sh64_compact,movl11_compact) }, - { SH64_COMPACT_INSN_MOVW1_COMPACT, SEM_FN_NAME (sh64_compact,movw1_compact) }, - { SH64_COMPACT_INSN_MOVW2_COMPACT, SEM_FN_NAME (sh64_compact,movw2_compact) }, - { SH64_COMPACT_INSN_MOVW3_COMPACT, SEM_FN_NAME (sh64_compact,movw3_compact) }, - { SH64_COMPACT_INSN_MOVW4_COMPACT, SEM_FN_NAME (sh64_compact,movw4_compact) }, - { SH64_COMPACT_INSN_MOVW5_COMPACT, SEM_FN_NAME (sh64_compact,movw5_compact) }, - { SH64_COMPACT_INSN_MOVW6_COMPACT, SEM_FN_NAME (sh64_compact,movw6_compact) }, - { SH64_COMPACT_INSN_MOVW7_COMPACT, SEM_FN_NAME (sh64_compact,movw7_compact) }, - { SH64_COMPACT_INSN_MOVW8_COMPACT, SEM_FN_NAME (sh64_compact,movw8_compact) }, - { SH64_COMPACT_INSN_MOVW9_COMPACT, SEM_FN_NAME (sh64_compact,movw9_compact) }, - { SH64_COMPACT_INSN_MOVW10_COMPACT, SEM_FN_NAME (sh64_compact,movw10_compact) }, - { SH64_COMPACT_INSN_MOVW11_COMPACT, SEM_FN_NAME (sh64_compact,movw11_compact) }, - { SH64_COMPACT_INSN_MOVA_COMPACT, SEM_FN_NAME (sh64_compact,mova_compact) }, - { SH64_COMPACT_INSN_MOVCAL_COMPACT, SEM_FN_NAME (sh64_compact,movcal_compact) }, - { SH64_COMPACT_INSN_MOVT_COMPACT, SEM_FN_NAME (sh64_compact,movt_compact) }, - { SH64_COMPACT_INSN_MULL_COMPACT, SEM_FN_NAME (sh64_compact,mull_compact) }, - { SH64_COMPACT_INSN_MULSW_COMPACT, SEM_FN_NAME (sh64_compact,mulsw_compact) }, - { SH64_COMPACT_INSN_MULUW_COMPACT, SEM_FN_NAME (sh64_compact,muluw_compact) }, - { SH64_COMPACT_INSN_NEG_COMPACT, SEM_FN_NAME (sh64_compact,neg_compact) }, - { SH64_COMPACT_INSN_NEGC_COMPACT, SEM_FN_NAME (sh64_compact,negc_compact) }, - { SH64_COMPACT_INSN_NOP_COMPACT, SEM_FN_NAME (sh64_compact,nop_compact) }, - { SH64_COMPACT_INSN_NOT_COMPACT, SEM_FN_NAME (sh64_compact,not_compact) }, - { SH64_COMPACT_INSN_OCBI_COMPACT, SEM_FN_NAME (sh64_compact,ocbi_compact) }, - { SH64_COMPACT_INSN_OCBP_COMPACT, SEM_FN_NAME (sh64_compact,ocbp_compact) }, - { SH64_COMPACT_INSN_OCBWB_COMPACT, SEM_FN_NAME (sh64_compact,ocbwb_compact) }, - { SH64_COMPACT_INSN_OR_COMPACT, SEM_FN_NAME (sh64_compact,or_compact) }, - { SH64_COMPACT_INSN_ORI_COMPACT, SEM_FN_NAME (sh64_compact,ori_compact) }, - { SH64_COMPACT_INSN_ORB_COMPACT, SEM_FN_NAME (sh64_compact,orb_compact) }, - { SH64_COMPACT_INSN_PREF_COMPACT, SEM_FN_NAME (sh64_compact,pref_compact) }, - { SH64_COMPACT_INSN_ROTCL_COMPACT, SEM_FN_NAME (sh64_compact,rotcl_compact) }, - { SH64_COMPACT_INSN_ROTCR_COMPACT, SEM_FN_NAME (sh64_compact,rotcr_compact) }, - { SH64_COMPACT_INSN_ROTL_COMPACT, SEM_FN_NAME (sh64_compact,rotl_compact) }, - { SH64_COMPACT_INSN_ROTR_COMPACT, SEM_FN_NAME (sh64_compact,rotr_compact) }, - { SH64_COMPACT_INSN_RTS_COMPACT, SEM_FN_NAME (sh64_compact,rts_compact) }, - { SH64_COMPACT_INSN_SETS_COMPACT, SEM_FN_NAME (sh64_compact,sets_compact) }, - { SH64_COMPACT_INSN_SETT_COMPACT, SEM_FN_NAME (sh64_compact,sett_compact) }, - { SH64_COMPACT_INSN_SHAD_COMPACT, SEM_FN_NAME (sh64_compact,shad_compact) }, - { SH64_COMPACT_INSN_SHAL_COMPACT, SEM_FN_NAME (sh64_compact,shal_compact) }, - { SH64_COMPACT_INSN_SHAR_COMPACT, SEM_FN_NAME (sh64_compact,shar_compact) }, - { SH64_COMPACT_INSN_SHLD_COMPACT, SEM_FN_NAME (sh64_compact,shld_compact) }, - { SH64_COMPACT_INSN_SHLL_COMPACT, SEM_FN_NAME (sh64_compact,shll_compact) }, - { SH64_COMPACT_INSN_SHLL2_COMPACT, SEM_FN_NAME (sh64_compact,shll2_compact) }, - { SH64_COMPACT_INSN_SHLL8_COMPACT, SEM_FN_NAME (sh64_compact,shll8_compact) }, - { SH64_COMPACT_INSN_SHLL16_COMPACT, SEM_FN_NAME (sh64_compact,shll16_compact) }, - { SH64_COMPACT_INSN_SHLR_COMPACT, SEM_FN_NAME (sh64_compact,shlr_compact) }, - { SH64_COMPACT_INSN_SHLR2_COMPACT, SEM_FN_NAME (sh64_compact,shlr2_compact) }, - { SH64_COMPACT_INSN_SHLR8_COMPACT, SEM_FN_NAME (sh64_compact,shlr8_compact) }, - { SH64_COMPACT_INSN_SHLR16_COMPACT, SEM_FN_NAME (sh64_compact,shlr16_compact) }, - { SH64_COMPACT_INSN_STC_GBR_COMPACT, SEM_FN_NAME (sh64_compact,stc_gbr_compact) }, - { SH64_COMPACT_INSN_STCL_GBR_COMPACT, SEM_FN_NAME (sh64_compact,stcl_gbr_compact) }, - { SH64_COMPACT_INSN_STS_FPSCR_COMPACT, SEM_FN_NAME (sh64_compact,sts_fpscr_compact) }, - { SH64_COMPACT_INSN_STSL_FPSCR_COMPACT, SEM_FN_NAME (sh64_compact,stsl_fpscr_compact) }, - { SH64_COMPACT_INSN_STS_FPUL_COMPACT, SEM_FN_NAME (sh64_compact,sts_fpul_compact) }, - { SH64_COMPACT_INSN_STSL_FPUL_COMPACT, SEM_FN_NAME (sh64_compact,stsl_fpul_compact) }, - { SH64_COMPACT_INSN_STS_MACH_COMPACT, SEM_FN_NAME (sh64_compact,sts_mach_compact) }, - { SH64_COMPACT_INSN_STSL_MACH_COMPACT, SEM_FN_NAME (sh64_compact,stsl_mach_compact) }, - { SH64_COMPACT_INSN_STS_MACL_COMPACT, SEM_FN_NAME (sh64_compact,sts_macl_compact) }, - { SH64_COMPACT_INSN_STSL_MACL_COMPACT, SEM_FN_NAME (sh64_compact,stsl_macl_compact) }, - { SH64_COMPACT_INSN_STS_PR_COMPACT, SEM_FN_NAME (sh64_compact,sts_pr_compact) }, - { SH64_COMPACT_INSN_STSL_PR_COMPACT, SEM_FN_NAME (sh64_compact,stsl_pr_compact) }, - { SH64_COMPACT_INSN_SUB_COMPACT, SEM_FN_NAME (sh64_compact,sub_compact) }, - { SH64_COMPACT_INSN_SUBC_COMPACT, SEM_FN_NAME (sh64_compact,subc_compact) }, - { SH64_COMPACT_INSN_SUBV_COMPACT, SEM_FN_NAME (sh64_compact,subv_compact) }, - { SH64_COMPACT_INSN_SWAPB_COMPACT, SEM_FN_NAME (sh64_compact,swapb_compact) }, - { SH64_COMPACT_INSN_SWAPW_COMPACT, SEM_FN_NAME (sh64_compact,swapw_compact) }, - { SH64_COMPACT_INSN_TASB_COMPACT, SEM_FN_NAME (sh64_compact,tasb_compact) }, - { SH64_COMPACT_INSN_TRAPA_COMPACT, SEM_FN_NAME (sh64_compact,trapa_compact) }, - { SH64_COMPACT_INSN_TST_COMPACT, SEM_FN_NAME (sh64_compact,tst_compact) }, - { SH64_COMPACT_INSN_TSTI_COMPACT, SEM_FN_NAME (sh64_compact,tsti_compact) }, - { SH64_COMPACT_INSN_TSTB_COMPACT, SEM_FN_NAME (sh64_compact,tstb_compact) }, - { SH64_COMPACT_INSN_XOR_COMPACT, SEM_FN_NAME (sh64_compact,xor_compact) }, - { SH64_COMPACT_INSN_XORI_COMPACT, SEM_FN_NAME (sh64_compact,xori_compact) }, - { SH64_COMPACT_INSN_XORB_COMPACT, SEM_FN_NAME (sh64_compact,xorb_compact) }, - { SH64_COMPACT_INSN_XTRCT_COMPACT, SEM_FN_NAME (sh64_compact,xtrct_compact) }, - { 0, 0 } -}; - -/* Add the semantic fns to IDESC_TABLE. */ - -void -SEM_FN_NAME (sh64_compact,init_idesc_table) (SIM_CPU *current_cpu) -{ - IDESC *idesc_table = CPU_IDESC (current_cpu); - const struct sem_fn_desc *sf; - int mach_num = MACH_NUM (CPU_MACH (current_cpu)); - - for (sf = &sem_fns[0]; sf->fn != 0; ++sf) - { - const CGEN_INSN *insn = idesc_table[sf->index].idata; - int valid_p = (CGEN_INSN_VIRTUAL_P (insn) - || CGEN_INSN_MACH_HAS_P (insn, mach_num)); -#if FAST_P - if (valid_p) - idesc_table[sf->index].sem_fast = sf->fn; - else - idesc_table[sf->index].sem_fast = SEM_FN_NAME (sh64_compact,x_invalid); -#else - if (valid_p) - idesc_table[sf->index].sem_full = sf->fn; - else - idesc_table[sf->index].sem_full = SEM_FN_NAME (sh64_compact,x_invalid); -#endif - } -} - diff --git a/sim/sh64/sem-media-switch.c b/sim/sh64/sem-media-switch.c deleted file mode 100644 index 075738ae0ef..00000000000 --- a/sim/sh64/sem-media-switch.c +++ /dev/null @@ -1,5558 +0,0 @@ -/* Simulator instruction semantics for sh64. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifdef DEFINE_LABELS - - /* The labels have the case they have because the enum of insn types - is all uppercase and in the non-stdc case the insn symbol is built - into the enum name. */ - - static struct { - int index; - void *label; - } labels[] = { - { SH64_MEDIA_INSN_X_INVALID, && case_sem_INSN_X_INVALID }, - { SH64_MEDIA_INSN_X_AFTER, && case_sem_INSN_X_AFTER }, - { SH64_MEDIA_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE }, - { SH64_MEDIA_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN }, - { SH64_MEDIA_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN }, - { SH64_MEDIA_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN }, - { SH64_MEDIA_INSN_ADD, && case_sem_INSN_ADD }, - { SH64_MEDIA_INSN_ADDL, && case_sem_INSN_ADDL }, - { SH64_MEDIA_INSN_ADDI, && case_sem_INSN_ADDI }, - { SH64_MEDIA_INSN_ADDIL, && case_sem_INSN_ADDIL }, - { SH64_MEDIA_INSN_ADDZL, && case_sem_INSN_ADDZL }, - { SH64_MEDIA_INSN_ALLOCO, && case_sem_INSN_ALLOCO }, - { SH64_MEDIA_INSN_AND, && case_sem_INSN_AND }, - { SH64_MEDIA_INSN_ANDC, && case_sem_INSN_ANDC }, - { SH64_MEDIA_INSN_ANDI, && case_sem_INSN_ANDI }, - { SH64_MEDIA_INSN_BEQ, && case_sem_INSN_BEQ }, - { SH64_MEDIA_INSN_BEQI, && case_sem_INSN_BEQI }, - { SH64_MEDIA_INSN_BGE, && case_sem_INSN_BGE }, - { SH64_MEDIA_INSN_BGEU, && case_sem_INSN_BGEU }, - { SH64_MEDIA_INSN_BGT, && case_sem_INSN_BGT }, - { SH64_MEDIA_INSN_BGTU, && case_sem_INSN_BGTU }, - { SH64_MEDIA_INSN_BLINK, && case_sem_INSN_BLINK }, - { SH64_MEDIA_INSN_BNE, && case_sem_INSN_BNE }, - { SH64_MEDIA_INSN_BNEI, && case_sem_INSN_BNEI }, - { SH64_MEDIA_INSN_BRK, && case_sem_INSN_BRK }, - { SH64_MEDIA_INSN_BYTEREV, && case_sem_INSN_BYTEREV }, - { SH64_MEDIA_INSN_CMPEQ, && case_sem_INSN_CMPEQ }, - { SH64_MEDIA_INSN_CMPGT, && case_sem_INSN_CMPGT }, - { SH64_MEDIA_INSN_CMPGTU, && case_sem_INSN_CMPGTU }, - { SH64_MEDIA_INSN_CMVEQ, && case_sem_INSN_CMVEQ }, - { SH64_MEDIA_INSN_CMVNE, && case_sem_INSN_CMVNE }, - { SH64_MEDIA_INSN_FABSD, && case_sem_INSN_FABSD }, - { SH64_MEDIA_INSN_FABSS, && case_sem_INSN_FABSS }, - { SH64_MEDIA_INSN_FADDD, && case_sem_INSN_FADDD }, - { SH64_MEDIA_INSN_FADDS, && case_sem_INSN_FADDS }, - { SH64_MEDIA_INSN_FCMPEQD, && case_sem_INSN_FCMPEQD }, - { SH64_MEDIA_INSN_FCMPEQS, && case_sem_INSN_FCMPEQS }, - { SH64_MEDIA_INSN_FCMPGED, && case_sem_INSN_FCMPGED }, - { SH64_MEDIA_INSN_FCMPGES, && case_sem_INSN_FCMPGES }, - { SH64_MEDIA_INSN_FCMPGTD, && case_sem_INSN_FCMPGTD }, - { SH64_MEDIA_INSN_FCMPGTS, && case_sem_INSN_FCMPGTS }, - { SH64_MEDIA_INSN_FCMPUND, && case_sem_INSN_FCMPUND }, - { SH64_MEDIA_INSN_FCMPUNS, && case_sem_INSN_FCMPUNS }, - { SH64_MEDIA_INSN_FCNVDS, && case_sem_INSN_FCNVDS }, - { SH64_MEDIA_INSN_FCNVSD, && case_sem_INSN_FCNVSD }, - { SH64_MEDIA_INSN_FDIVD, && case_sem_INSN_FDIVD }, - { SH64_MEDIA_INSN_FDIVS, && case_sem_INSN_FDIVS }, - { SH64_MEDIA_INSN_FGETSCR, && case_sem_INSN_FGETSCR }, - { SH64_MEDIA_INSN_FIPRS, && case_sem_INSN_FIPRS }, - { SH64_MEDIA_INSN_FLDD, && case_sem_INSN_FLDD }, - { SH64_MEDIA_INSN_FLDP, && case_sem_INSN_FLDP }, - { SH64_MEDIA_INSN_FLDS, && case_sem_INSN_FLDS }, - { SH64_MEDIA_INSN_FLDXD, && case_sem_INSN_FLDXD }, - { SH64_MEDIA_INSN_FLDXP, && case_sem_INSN_FLDXP }, - { SH64_MEDIA_INSN_FLDXS, && case_sem_INSN_FLDXS }, - { SH64_MEDIA_INSN_FLOATLD, && case_sem_INSN_FLOATLD }, - { SH64_MEDIA_INSN_FLOATLS, && case_sem_INSN_FLOATLS }, - { SH64_MEDIA_INSN_FLOATQD, && case_sem_INSN_FLOATQD }, - { SH64_MEDIA_INSN_FLOATQS, && case_sem_INSN_FLOATQS }, - { SH64_MEDIA_INSN_FMACS, && case_sem_INSN_FMACS }, - { SH64_MEDIA_INSN_FMOVD, && case_sem_INSN_FMOVD }, - { SH64_MEDIA_INSN_FMOVDQ, && case_sem_INSN_FMOVDQ }, - { SH64_MEDIA_INSN_FMOVLS, && case_sem_INSN_FMOVLS }, - { SH64_MEDIA_INSN_FMOVQD, && case_sem_INSN_FMOVQD }, - { SH64_MEDIA_INSN_FMOVS, && case_sem_INSN_FMOVS }, - { SH64_MEDIA_INSN_FMOVSL, && case_sem_INSN_FMOVSL }, - { SH64_MEDIA_INSN_FMULD, && case_sem_INSN_FMULD }, - { SH64_MEDIA_INSN_FMULS, && case_sem_INSN_FMULS }, - { SH64_MEDIA_INSN_FNEGD, && case_sem_INSN_FNEGD }, - { SH64_MEDIA_INSN_FNEGS, && case_sem_INSN_FNEGS }, - { SH64_MEDIA_INSN_FPUTSCR, && case_sem_INSN_FPUTSCR }, - { SH64_MEDIA_INSN_FSQRTD, && case_sem_INSN_FSQRTD }, - { SH64_MEDIA_INSN_FSQRTS, && case_sem_INSN_FSQRTS }, - { SH64_MEDIA_INSN_FSTD, && case_sem_INSN_FSTD }, - { SH64_MEDIA_INSN_FSTP, && case_sem_INSN_FSTP }, - { SH64_MEDIA_INSN_FSTS, && case_sem_INSN_FSTS }, - { SH64_MEDIA_INSN_FSTXD, && case_sem_INSN_FSTXD }, - { SH64_MEDIA_INSN_FSTXP, && case_sem_INSN_FSTXP }, - { SH64_MEDIA_INSN_FSTXS, && case_sem_INSN_FSTXS }, - { SH64_MEDIA_INSN_FSUBD, && case_sem_INSN_FSUBD }, - { SH64_MEDIA_INSN_FSUBS, && case_sem_INSN_FSUBS }, - { SH64_MEDIA_INSN_FTRCDL, && case_sem_INSN_FTRCDL }, - { SH64_MEDIA_INSN_FTRCSL, && case_sem_INSN_FTRCSL }, - { SH64_MEDIA_INSN_FTRCDQ, && case_sem_INSN_FTRCDQ }, - { SH64_MEDIA_INSN_FTRCSQ, && case_sem_INSN_FTRCSQ }, - { SH64_MEDIA_INSN_FTRVS, && case_sem_INSN_FTRVS }, - { SH64_MEDIA_INSN_GETCFG, && case_sem_INSN_GETCFG }, - { SH64_MEDIA_INSN_GETCON, && case_sem_INSN_GETCON }, - { SH64_MEDIA_INSN_GETTR, && case_sem_INSN_GETTR }, - { SH64_MEDIA_INSN_ICBI, && case_sem_INSN_ICBI }, - { SH64_MEDIA_INSN_LDB, && case_sem_INSN_LDB }, - { SH64_MEDIA_INSN_LDL, && case_sem_INSN_LDL }, - { SH64_MEDIA_INSN_LDQ, && case_sem_INSN_LDQ }, - { SH64_MEDIA_INSN_LDUB, && case_sem_INSN_LDUB }, - { SH64_MEDIA_INSN_LDUW, && case_sem_INSN_LDUW }, - { SH64_MEDIA_INSN_LDW, && case_sem_INSN_LDW }, - { SH64_MEDIA_INSN_LDHIL, && case_sem_INSN_LDHIL }, - { SH64_MEDIA_INSN_LDHIQ, && case_sem_INSN_LDHIQ }, - { SH64_MEDIA_INSN_LDLOL, && case_sem_INSN_LDLOL }, - { SH64_MEDIA_INSN_LDLOQ, && case_sem_INSN_LDLOQ }, - { SH64_MEDIA_INSN_LDXB, && case_sem_INSN_LDXB }, - { SH64_MEDIA_INSN_LDXL, && case_sem_INSN_LDXL }, - { SH64_MEDIA_INSN_LDXQ, && case_sem_INSN_LDXQ }, - { SH64_MEDIA_INSN_LDXUB, && case_sem_INSN_LDXUB }, - { SH64_MEDIA_INSN_LDXUW, && case_sem_INSN_LDXUW }, - { SH64_MEDIA_INSN_LDXW, && case_sem_INSN_LDXW }, - { SH64_MEDIA_INSN_MABSL, && case_sem_INSN_MABSL }, - { SH64_MEDIA_INSN_MABSW, && case_sem_INSN_MABSW }, - { SH64_MEDIA_INSN_MADDL, && case_sem_INSN_MADDL }, - { SH64_MEDIA_INSN_MADDW, && case_sem_INSN_MADDW }, - { SH64_MEDIA_INSN_MADDSL, && case_sem_INSN_MADDSL }, - { SH64_MEDIA_INSN_MADDSUB, && case_sem_INSN_MADDSUB }, - { SH64_MEDIA_INSN_MADDSW, && case_sem_INSN_MADDSW }, - { SH64_MEDIA_INSN_MCMPEQB, && case_sem_INSN_MCMPEQB }, - { SH64_MEDIA_INSN_MCMPEQL, && case_sem_INSN_MCMPEQL }, - { SH64_MEDIA_INSN_MCMPEQW, && case_sem_INSN_MCMPEQW }, - { SH64_MEDIA_INSN_MCMPGTL, && case_sem_INSN_MCMPGTL }, - { SH64_MEDIA_INSN_MCMPGTUB, && case_sem_INSN_MCMPGTUB }, - { SH64_MEDIA_INSN_MCMPGTW, && case_sem_INSN_MCMPGTW }, - { SH64_MEDIA_INSN_MCMV, && case_sem_INSN_MCMV }, - { SH64_MEDIA_INSN_MCNVSLW, && case_sem_INSN_MCNVSLW }, - { SH64_MEDIA_INSN_MCNVSWB, && case_sem_INSN_MCNVSWB }, - { SH64_MEDIA_INSN_MCNVSWUB, && case_sem_INSN_MCNVSWUB }, - { SH64_MEDIA_INSN_MEXTR1, && case_sem_INSN_MEXTR1 }, - { SH64_MEDIA_INSN_MEXTR2, && case_sem_INSN_MEXTR2 }, - { SH64_MEDIA_INSN_MEXTR3, && case_sem_INSN_MEXTR3 }, - { SH64_MEDIA_INSN_MEXTR4, && case_sem_INSN_MEXTR4 }, - { SH64_MEDIA_INSN_MEXTR5, && case_sem_INSN_MEXTR5 }, - { SH64_MEDIA_INSN_MEXTR6, && case_sem_INSN_MEXTR6 }, - { SH64_MEDIA_INSN_MEXTR7, && case_sem_INSN_MEXTR7 }, - { SH64_MEDIA_INSN_MMACFXWL, && case_sem_INSN_MMACFXWL }, - { SH64_MEDIA_INSN_MMACNFX_WL, && case_sem_INSN_MMACNFX_WL }, - { SH64_MEDIA_INSN_MMULL, && case_sem_INSN_MMULL }, - { SH64_MEDIA_INSN_MMULW, && case_sem_INSN_MMULW }, - { SH64_MEDIA_INSN_MMULFXL, && case_sem_INSN_MMULFXL }, - { SH64_MEDIA_INSN_MMULFXW, && case_sem_INSN_MMULFXW }, - { SH64_MEDIA_INSN_MMULFXRPW, && case_sem_INSN_MMULFXRPW }, - { SH64_MEDIA_INSN_MMULHIWL, && case_sem_INSN_MMULHIWL }, - { SH64_MEDIA_INSN_MMULLOWL, && case_sem_INSN_MMULLOWL }, - { SH64_MEDIA_INSN_MMULSUMWQ, && case_sem_INSN_MMULSUMWQ }, - { SH64_MEDIA_INSN_MOVI, && case_sem_INSN_MOVI }, - { SH64_MEDIA_INSN_MPERMW, && case_sem_INSN_MPERMW }, - { SH64_MEDIA_INSN_MSADUBQ, && case_sem_INSN_MSADUBQ }, - { SH64_MEDIA_INSN_MSHALDSL, && case_sem_INSN_MSHALDSL }, - { SH64_MEDIA_INSN_MSHALDSW, && case_sem_INSN_MSHALDSW }, - { SH64_MEDIA_INSN_MSHARDL, && case_sem_INSN_MSHARDL }, - { SH64_MEDIA_INSN_MSHARDW, && case_sem_INSN_MSHARDW }, - { SH64_MEDIA_INSN_MSHARDSQ, && case_sem_INSN_MSHARDSQ }, - { SH64_MEDIA_INSN_MSHFHIB, && case_sem_INSN_MSHFHIB }, - { SH64_MEDIA_INSN_MSHFHIL, && case_sem_INSN_MSHFHIL }, - { SH64_MEDIA_INSN_MSHFHIW, && case_sem_INSN_MSHFHIW }, - { SH64_MEDIA_INSN_MSHFLOB, && case_sem_INSN_MSHFLOB }, - { SH64_MEDIA_INSN_MSHFLOL, && case_sem_INSN_MSHFLOL }, - { SH64_MEDIA_INSN_MSHFLOW, && case_sem_INSN_MSHFLOW }, - { SH64_MEDIA_INSN_MSHLLDL, && case_sem_INSN_MSHLLDL }, - { SH64_MEDIA_INSN_MSHLLDW, && case_sem_INSN_MSHLLDW }, - { SH64_MEDIA_INSN_MSHLRDL, && case_sem_INSN_MSHLRDL }, - { SH64_MEDIA_INSN_MSHLRDW, && case_sem_INSN_MSHLRDW }, - { SH64_MEDIA_INSN_MSUBL, && case_sem_INSN_MSUBL }, - { SH64_MEDIA_INSN_MSUBW, && case_sem_INSN_MSUBW }, - { SH64_MEDIA_INSN_MSUBSL, && case_sem_INSN_MSUBSL }, - { SH64_MEDIA_INSN_MSUBSUB, && case_sem_INSN_MSUBSUB }, - { SH64_MEDIA_INSN_MSUBSW, && case_sem_INSN_MSUBSW }, - { SH64_MEDIA_INSN_MULSL, && case_sem_INSN_MULSL }, - { SH64_MEDIA_INSN_MULUL, && case_sem_INSN_MULUL }, - { SH64_MEDIA_INSN_NOP, && case_sem_INSN_NOP }, - { SH64_MEDIA_INSN_NSB, && case_sem_INSN_NSB }, - { SH64_MEDIA_INSN_OCBI, && case_sem_INSN_OCBI }, - { SH64_MEDIA_INSN_OCBP, && case_sem_INSN_OCBP }, - { SH64_MEDIA_INSN_OCBWB, && case_sem_INSN_OCBWB }, - { SH64_MEDIA_INSN_OR, && case_sem_INSN_OR }, - { SH64_MEDIA_INSN_ORI, && case_sem_INSN_ORI }, - { SH64_MEDIA_INSN_PREFI, && case_sem_INSN_PREFI }, - { SH64_MEDIA_INSN_PTA, && case_sem_INSN_PTA }, - { SH64_MEDIA_INSN_PTABS, && case_sem_INSN_PTABS }, - { SH64_MEDIA_INSN_PTB, && case_sem_INSN_PTB }, - { SH64_MEDIA_INSN_PTREL, && case_sem_INSN_PTREL }, - { SH64_MEDIA_INSN_PUTCFG, && case_sem_INSN_PUTCFG }, - { SH64_MEDIA_INSN_PUTCON, && case_sem_INSN_PUTCON }, - { SH64_MEDIA_INSN_RTE, && case_sem_INSN_RTE }, - { SH64_MEDIA_INSN_SHARD, && case_sem_INSN_SHARD }, - { SH64_MEDIA_INSN_SHARDL, && case_sem_INSN_SHARDL }, - { SH64_MEDIA_INSN_SHARI, && case_sem_INSN_SHARI }, - { SH64_MEDIA_INSN_SHARIL, && case_sem_INSN_SHARIL }, - { SH64_MEDIA_INSN_SHLLD, && case_sem_INSN_SHLLD }, - { SH64_MEDIA_INSN_SHLLDL, && case_sem_INSN_SHLLDL }, - { SH64_MEDIA_INSN_SHLLI, && case_sem_INSN_SHLLI }, - { SH64_MEDIA_INSN_SHLLIL, && case_sem_INSN_SHLLIL }, - { SH64_MEDIA_INSN_SHLRD, && case_sem_INSN_SHLRD }, - { SH64_MEDIA_INSN_SHLRDL, && case_sem_INSN_SHLRDL }, - { SH64_MEDIA_INSN_SHLRI, && case_sem_INSN_SHLRI }, - { SH64_MEDIA_INSN_SHLRIL, && case_sem_INSN_SHLRIL }, - { SH64_MEDIA_INSN_SHORI, && case_sem_INSN_SHORI }, - { SH64_MEDIA_INSN_SLEEP, && case_sem_INSN_SLEEP }, - { SH64_MEDIA_INSN_STB, && case_sem_INSN_STB }, - { SH64_MEDIA_INSN_STL, && case_sem_INSN_STL }, - { SH64_MEDIA_INSN_STQ, && case_sem_INSN_STQ }, - { SH64_MEDIA_INSN_STW, && case_sem_INSN_STW }, - { SH64_MEDIA_INSN_STHIL, && case_sem_INSN_STHIL }, - { SH64_MEDIA_INSN_STHIQ, && case_sem_INSN_STHIQ }, - { SH64_MEDIA_INSN_STLOL, && case_sem_INSN_STLOL }, - { SH64_MEDIA_INSN_STLOQ, && case_sem_INSN_STLOQ }, - { SH64_MEDIA_INSN_STXB, && case_sem_INSN_STXB }, - { SH64_MEDIA_INSN_STXL, && case_sem_INSN_STXL }, - { SH64_MEDIA_INSN_STXQ, && case_sem_INSN_STXQ }, - { SH64_MEDIA_INSN_STXW, && case_sem_INSN_STXW }, - { SH64_MEDIA_INSN_SUB, && case_sem_INSN_SUB }, - { SH64_MEDIA_INSN_SUBL, && case_sem_INSN_SUBL }, - { SH64_MEDIA_INSN_SWAPQ, && case_sem_INSN_SWAPQ }, - { SH64_MEDIA_INSN_SYNCI, && case_sem_INSN_SYNCI }, - { SH64_MEDIA_INSN_SYNCO, && case_sem_INSN_SYNCO }, - { SH64_MEDIA_INSN_TRAPA, && case_sem_INSN_TRAPA }, - { SH64_MEDIA_INSN_XOR, && case_sem_INSN_XOR }, - { SH64_MEDIA_INSN_XORI, && case_sem_INSN_XORI }, - { 0, 0 } - }; - int i; - - for (i = 0; labels[i].label != 0; ++i) - { -#if FAST_P - CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; -#else - CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; -#endif - } - -#undef DEFINE_LABELS -#endif /* DEFINE_LABELS */ - -#ifdef DEFINE_SWITCH - -/* If hyper-fast [well not unnecessarily slow] execution is selected, turn - off frills like tracing and profiling. */ -/* FIXME: A better way would be to have TRACE_RESULT check for something - that can cause it to be optimized out. Another way would be to emit - special handlers into the instruction "stream". */ - -#if FAST_P -#undef TRACE_RESULT -#define TRACE_RESULT(cpu, abuf, name, type, val) -#endif - -#undef GET_ATTR -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) -#else -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr) -#endif - -{ - -#if WITH_SCACHE_PBB - -/* Branch to next handler without going around main loop. */ -#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case -SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) - -#else /* ! WITH_SCACHE_PBB */ - -#define NEXT(vpc) BREAK (sem) -#ifdef __GNUC__ -#if FAST_P - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab) -#else - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab) -#endif -#else - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num) -#endif - -#endif /* ! WITH_SCACHE_PBB */ - - { - - CASE (sem, INSN_X_INVALID) : /* --invalid-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { - /* Update the recorded pc in the cpu state struct. - Only necessary for WITH_SCACHE case, but to avoid the - conditional compilation .... */ - SET_H_PC (pc); - /* Virtual insns have zero size. Overwrite vpc with address of next insn - using the default-insn-bitsize spec. When executing insns in parallel - we may want to queue the fault and continue execution. */ - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_AFTER) : /* --after-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_SH64_MEDIA - sh64_media_pbb_after (current_cpu, sem_arg); -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_BEFORE) : /* --before-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_SH64_MEDIA - sh64_media_pbb_before (current_cpu, sem_arg); -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_SH64_MEDIA -#ifdef DEFINE_SWITCH - vpc = sh64_media_pbb_cti_chain (current_cpu, sem_arg, - pbb_br_type, pbb_br_npc); - BREAK (sem); -#else - /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ - vpc = sh64_media_pbb_cti_chain (current_cpu, sem_arg, - CPU_PBB_BR_TYPE (current_cpu), - CPU_PBB_BR_NPC (current_cpu)); -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_CHAIN) : /* --chain-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_SH64_MEDIA - vpc = sh64_media_pbb_chain (current_cpu, sem_arg); -#ifdef DEFINE_SWITCH - BREAK (sem); -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_BEGIN) : /* --begin-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_SH64_MEDIA -#if defined DEFINE_SWITCH || defined FAST_P - /* In the switch case FAST_P is a constant, allowing several optimizations - in any called inline functions. */ - vpc = sh64_media_pbb_begin (current_cpu, FAST_P); -#else -#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ - vpc = sh64_media_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); -#else - vpc = sh64_media_pbb_begin (current_cpu, 0); -#endif -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADD) : /* add $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDL) : /* add.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ADDSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), SUBWORDDISI (GET_H_GR (FLD (f_right)), 1)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDI) : /* addi $rm, $disp10, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDIL) : /* addi.l $rm, $disp10, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (ADDSI (EXTSISI (FLD (f_disp10)), SUBWORDDISI (GET_H_GR (FLD (f_left)), 1))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDZL) : /* addz.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTSIDI (ADDSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ALLOCO) : /* alloco $rm, $disp6x32 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_AND) : /* and $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ANDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ANDC) : /* andc $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ANDDI (GET_H_GR (FLD (f_left)), INVDI (GET_H_GR (FLD (f_right)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ANDI) : /* andi $rm, $disp10, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ANDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BEQ) : /* beq$likely $rm, $rn, $tra */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))) { - { - UDI opval = CPU (h_tr[FLD (f_tra)]); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BEQI) : /* beqi$likely $rm, $imm6, $tra */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beqi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_imm6)))) { - { - UDI opval = CPU (h_tr[FLD (f_tra)]); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BGE) : /* bge$likely $rm, $rn, $tra */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GEDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))) { - { - UDI opval = CPU (h_tr[FLD (f_tra)]); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BGEU) : /* bgeu$likely $rm, $rn, $tra */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GEUDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))) { - { - UDI opval = CPU (h_tr[FLD (f_tra)]); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BGT) : /* bgt$likely $rm, $rn, $tra */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GTDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))) { - { - UDI opval = CPU (h_tr[FLD (f_tra)]); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BGTU) : /* bgtu$likely $rm, $rn, $tra */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GTUDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))) { - { - UDI opval = CPU (h_tr[FLD (f_tra)]); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BLINK) : /* blink $trb, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_blink.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - { - DI opval = ORDI (ADDDI (pc, 4), 1); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - { - UDI opval = CPU (h_tr[FLD (f_trb)]); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNE) : /* bne$likely $rm, $rn, $tra */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NEDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))) { - { - UDI opval = CPU (h_tr[FLD (f_tra)]); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNEI) : /* bnei$likely $rm, $imm6, $tra */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beqi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NEDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_imm6)))) { - { - UDI opval = CPU (h_tr[FLD (f_tra)]); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BRK) : /* brk */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -sh64_break (current_cpu, pc); - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BYTEREV) : /* byterev $rm, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_xori.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_source; - DI tmp_result; - tmp_source = GET_H_GR (FLD (f_left)); - tmp_result = 0; -{ - tmp_result = ORDI (SLLDI (tmp_result, 8), ANDDI (tmp_source, 255)); - tmp_source = SRLDI (tmp_source, 8); -} -{ - tmp_result = ORDI (SLLDI (tmp_result, 8), ANDDI (tmp_source, 255)); - tmp_source = SRLDI (tmp_source, 8); -} -{ - tmp_result = ORDI (SLLDI (tmp_result, 8), ANDDI (tmp_source, 255)); - tmp_source = SRLDI (tmp_source, 8); -} -{ - tmp_result = ORDI (SLLDI (tmp_result, 8), ANDDI (tmp_source, 255)); - tmp_source = SRLDI (tmp_source, 8); -} -{ - tmp_result = ORDI (SLLDI (tmp_result, 8), ANDDI (tmp_source, 255)); - tmp_source = SRLDI (tmp_source, 8); -} -{ - tmp_result = ORDI (SLLDI (tmp_result, 8), ANDDI (tmp_source, 255)); - tmp_source = SRLDI (tmp_source, 8); -} -{ - tmp_result = ORDI (SLLDI (tmp_result, 8), ANDDI (tmp_source, 255)); - tmp_source = SRLDI (tmp_source, 8); -} -{ - tmp_result = ORDI (SLLDI (tmp_result, 8), ANDDI (tmp_source, 255)); - tmp_source = SRLDI (tmp_source, 8); -} - { - DI opval = tmp_result; - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPEQ) : /* cmpeq $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ((EQDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))) ? (1) : (0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPGT) : /* cmpgt $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ((GTDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))) ? (1) : (0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPGTU) : /* cmpgtu $rm,$rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ((GTUDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))) ? (1) : (0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMVEQ) : /* cmveq $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQDI (GET_H_GR (FLD (f_left)), 0)) { - { - DI opval = GET_H_GR (FLD (f_right)); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMVNE) : /* cmvne $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NEDI (GET_H_GR (FLD (f_left)), 0)) { - { - DI opval = GET_H_GR (FLD (f_right)); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FABSD) : /* fabs.d $drgh, $drf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fabsd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_fabsd (current_cpu, GET_H_DR (FLD (f_left_right))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FABSS) : /* fabs.s $frgh, $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fabsd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_fabss (current_cpu, CPU (h_fr[FLD (f_left_right)])); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FADDD) : /* fadd.d $drg, $drh, $drf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_faddd (current_cpu, GET_H_DR (FLD (f_left)), GET_H_DR (FLD (f_right))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FADDS) : /* fadd.s $frg, $frh, $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_fadds (current_cpu, CPU (h_fr[FLD (f_left)]), CPU (h_fr[FLD (f_right)])); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FCMPEQD) : /* fcmpeq.d $drg, $drh, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTBIDI (sh64_fcmpeqd (current_cpu, GET_H_DR (FLD (f_left)), GET_H_DR (FLD (f_right)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FCMPEQS) : /* fcmpeq.s $frg, $frh, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTBIDI (sh64_fcmpeqs (current_cpu, CPU (h_fr[FLD (f_left)]), CPU (h_fr[FLD (f_right)]))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FCMPGED) : /* fcmpge.d $drg, $drh, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTBIDI (sh64_fcmpged (current_cpu, GET_H_DR (FLD (f_left)), GET_H_DR (FLD (f_right)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FCMPGES) : /* fcmpge.s $frg, $frh, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTBIDI (sh64_fcmpges (current_cpu, CPU (h_fr[FLD (f_left)]), CPU (h_fr[FLD (f_right)]))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FCMPGTD) : /* fcmpgt.d $drg, $drh, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTBIDI (sh64_fcmpgtd (current_cpu, GET_H_DR (FLD (f_left)), GET_H_DR (FLD (f_right)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FCMPGTS) : /* fcmpgt.s $frg, $frh, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTBIDI (sh64_fcmpgts (current_cpu, CPU (h_fr[FLD (f_left)]), CPU (h_fr[FLD (f_right)]))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FCMPUND) : /* fcmpun.d $drg, $drh, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTBIDI (sh64_fcmpund (current_cpu, GET_H_DR (FLD (f_left)), GET_H_DR (FLD (f_right)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FCMPUNS) : /* fcmpun.s $frg, $frh, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTBIDI (sh64_fcmpuns (current_cpu, CPU (h_fr[FLD (f_left)]), CPU (h_fr[FLD (f_right)]))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FCNVDS) : /* fcnv.ds $drgh, $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fabsd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_fcnvds (current_cpu, GET_H_DR (FLD (f_left_right))); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FCNVSD) : /* fcnv.sd $frgh, $drf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fabsd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_fcnvsd (current_cpu, CPU (h_fr[FLD (f_left_right)])); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FDIVD) : /* fdiv.d $drg, $drh, $drf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_fdivd (current_cpu, GET_H_DR (FLD (f_left)), GET_H_DR (FLD (f_right))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FDIVS) : /* fdiv.s $frg, $frh, $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_fdivs (current_cpu, CPU (h_fr[FLD (f_left)]), CPU (h_fr[FLD (f_right)])); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FGETSCR) : /* fgetscr $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FIPRS) : /* fipr.s $fvg, $fvh, $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - UQI tmp_g; - UQI tmp_h; - SF tmp_temp; - tmp_g = FLD (f_left); - tmp_h = FLD (f_right); - tmp_temp = sh64_fmuls (current_cpu, CPU (h_fr[tmp_g]), CPU (h_fr[tmp_h])); - tmp_temp = sh64_fadds (current_cpu, tmp_temp, sh64_fmuls (current_cpu, CPU (h_fr[ADDQI (tmp_g, 1)]), CPU (h_fr[ADDQI (tmp_h, 1)]))); - tmp_temp = sh64_fadds (current_cpu, tmp_temp, sh64_fmuls (current_cpu, CPU (h_fr[ADDQI (tmp_g, 2)]), CPU (h_fr[ADDQI (tmp_h, 2)]))); - tmp_temp = sh64_fadds (current_cpu, tmp_temp, sh64_fmuls (current_cpu, CPU (h_fr[ADDQI (tmp_g, 3)]), CPU (h_fr[ADDQI (tmp_h, 3)]))); - { - SF opval = tmp_temp; - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FLDD) : /* fld.d $rm, $disp10x8, $drf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fldd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = GETMEMDF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp10x8))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FLDP) : /* fld.p $rm, $disp10x8, $fpf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fldd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_f; - tmp_f = FLD (f_dest); - { - SF opval = GETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp10x8))); - CPU (h_fr[tmp_f]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - { - SF opval = GETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), ADDSI (FLD (f_disp10x8), 4))); - CPU (h_fr[ADDQI (tmp_f, 1)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FLDS) : /* fld.s $rm, $disp10x4, $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_flds.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = GETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp10x4))); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FLDXD) : /* fldx.d $rm, $rn, $drf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = GETMEMDF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FLDXP) : /* fldx.p $rm, $rn, $fpf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_f; - tmp_f = FLD (f_dest); - { - SF opval = GETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))); - CPU (h_fr[tmp_f]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - { - SF opval = GETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), ADDDI (GET_H_GR (FLD (f_right)), 4))); - CPU (h_fr[ADDQI (tmp_f, 1)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FLDXS) : /* fldx.s $rm, $rn, $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = GETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FLOATLD) : /* float.ld $frgh, $drf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fabsd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_floatld (current_cpu, CPU (h_fr[FLD (f_left_right)])); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FLOATLS) : /* float.ls $frgh, $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fabsd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_floatls (current_cpu, CPU (h_fr[FLD (f_left_right)])); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FLOATQD) : /* float.qd $drgh, $drf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fabsd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_floatqd (current_cpu, GET_H_DR (FLD (f_left_right))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FLOATQS) : /* float.qs $drgh, $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fabsd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_floatqs (current_cpu, GET_H_DR (FLD (f_left_right))); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FMACS) : /* fmac.s $frg, $frh, $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_fadds (current_cpu, CPU (h_fr[FLD (f_dest)]), sh64_fmuls (current_cpu, CPU (h_fr[FLD (f_left)]), CPU (h_fr[FLD (f_right)]))); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FMOVD) : /* fmov.d $drgh, $drf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fabsd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = GET_H_DR (FLD (f_left_right)); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FMOVDQ) : /* fmov.dq $drgh, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fabsd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = SUBWORDDFDI (GET_H_DR (FLD (f_left_right))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FMOVLS) : /* fmov.ls $rm, $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_xori.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = SUBWORDSISF (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FMOVQD) : /* fmov.qd $rm, $drf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_xori.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = SUBWORDDIDF (GET_H_GR (FLD (f_left))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FMOVS) : /* fmov.s $frgh, $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fabsd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = CPU (h_fr[FLD (f_left_right)]); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FMOVSL) : /* fmov.sl $frgh, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fabsd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (SUBWORDSFSI (CPU (h_fr[FLD (f_left_right)]))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FMULD) : /* fmul.d $drg, $drh, $drf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_fmuld (current_cpu, GET_H_DR (FLD (f_left)), GET_H_DR (FLD (f_right))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FMULS) : /* fmul.s $frg, $frh, $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_fmuls (current_cpu, CPU (h_fr[FLD (f_left)]), CPU (h_fr[FLD (f_right)])); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FNEGD) : /* fneg.d $drgh, $drf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fabsd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_fnegd (current_cpu, GET_H_DR (FLD (f_left_right))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FNEGS) : /* fneg.s $frgh, $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fabsd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_fnegs (current_cpu, CPU (h_fr[FLD (f_left_right)])); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FPUTSCR) : /* fputscr $frgh */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FSQRTD) : /* fsqrt.d $drgh, $drf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fabsd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_fsqrtd (current_cpu, GET_H_DR (FLD (f_left_right))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FSQRTS) : /* fsqrt.s $frgh, $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fabsd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_fsqrts (current_cpu, CPU (h_fr[FLD (f_left_right)])); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FSTD) : /* fst.d $rm, $disp10x8, $drf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fldd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = GET_H_DR (FLD (f_dest)); - SETMEMDF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp10x8)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FSTP) : /* fst.p $rm, $disp10x8, $fpf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fldd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_f; - tmp_f = FLD (f_dest); - { - SF opval = CPU (h_fr[tmp_f]); - SETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp10x8)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } - { - SF opval = CPU (h_fr[ADDQI (tmp_f, 1)]); - SETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), ADDSI (FLD (f_disp10x8), 4)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FSTS) : /* fst.s $rm, $disp10x4, $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_flds.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = CPU (h_fr[FLD (f_dest)]); - SETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp10x4)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FSTXD) : /* fstx.d $rm, $rn, $drf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = GET_H_DR (FLD (f_dest)); - SETMEMDF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FSTXP) : /* fstx.p $rm, $rn, $fpf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_f; - tmp_f = FLD (f_dest); - { - SF opval = CPU (h_fr[tmp_f]); - SETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } - { - SF opval = CPU (h_fr[ADDQI (tmp_f, 1)]); - SETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), ADDDI (GET_H_GR (FLD (f_right)), 4)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FSTXS) : /* fstx.s $rm, $rn, $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = CPU (h_fr[FLD (f_dest)]); - SETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FSUBD) : /* fsub.d $drg, $drh, $drf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_fsubd (current_cpu, GET_H_DR (FLD (f_left)), GET_H_DR (FLD (f_right))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FSUBS) : /* fsub.s $frg, $frh, $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_fsubs (current_cpu, CPU (h_fr[FLD (f_left)]), CPU (h_fr[FLD (f_right)])); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FTRCDL) : /* ftrc.dl $drgh, $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fabsd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_ftrcdl (current_cpu, GET_H_DR (FLD (f_left_right))); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FTRCSL) : /* ftrc.sl $frgh, $frf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fabsd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_ftrcsl (current_cpu, CPU (h_fr[FLD (f_left_right)])); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FTRCDQ) : /* ftrc.dq $drgh, $drf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fabsd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_ftrcdq (current_cpu, GET_H_DR (FLD (f_left_right))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FTRCSQ) : /* ftrc.sq $frgh, $drf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fabsd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_ftrcsq (current_cpu, CPU (h_fr[FLD (f_left_right)])); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FTRVS) : /* ftrv.s $mtrxg, $fvh, $fvf */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -sh64_ftrvs (current_cpu, FLD (f_left), FLD (f_right), FLD (f_dest)); - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_GETCFG) : /* getcfg $rm, $disp6, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_GETCON) : /* getcon $crk, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_xori.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = GET_H_CR (FLD (f_left)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_GETTR) : /* gettr $trb, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_blink.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = CPU (h_tr[FLD (f_trb)]); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ICBI) : /* icbi $rm, $disp6x32 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDB) : /* ld.b $rm, $disp10, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTQIDI (GETMEMQI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDL) : /* ld.l $rm, $disp10x4, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_flds.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (GETMEMSI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10x4))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDQ) : /* ld.q $rm, $disp10x8, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fldd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = GETMEMDI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10x8)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDUB) : /* ld.ub $rm, $disp10, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTQIDI (GETMEMQI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDUW) : /* ld.uw $rm, $disp10x2, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_lduw.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTHIDI (GETMEMHI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10x2))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDW) : /* ld.w $rm, $disp10x2, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_lduw.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTHIDI (GETMEMHI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10x2))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDHIL) : /* ldhi.l $rm, $disp6, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldhil.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_addr; - QI tmp_bytecount; - SI tmp_val; - tmp_addr = ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp6)); - tmp_bytecount = ADDDI (ANDDI (tmp_addr, 3), 1); - tmp_val = 0; -if (ANDQI (tmp_bytecount, 4)) { - { - DI opval = EXTSIDI (GETMEMSI (current_cpu, pc, ANDDI (tmp_addr, -4))); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} else { -if (GET_H_ENDIAN ()) { -{ -if (ANDQI (tmp_bytecount, 2)) { - tmp_val = ADDSI (SLLSI (tmp_val, 16), ZEXTHIDI (GETMEMHI (current_cpu, pc, ANDDI (tmp_addr, -4)))); -} -if (ANDQI (tmp_bytecount, 1)) { - tmp_val = ADDSI (SLLSI (tmp_val, 8), ZEXTQIDI (GETMEMQI (current_cpu, pc, tmp_addr))); -} - { - DI opval = EXTSIDI (tmp_val); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} -} else { -{ -if (ANDQI (tmp_bytecount, 1)) { - tmp_val = ADDSI (SLLSI (tmp_val, 8), ZEXTQIDI (GETMEMQI (current_cpu, pc, tmp_addr))); -} -if (ANDQI (tmp_bytecount, 2)) { - tmp_val = ADDSI (SLLSI (tmp_val, 16), ZEXTHIDI (GETMEMHI (current_cpu, pc, ANDDI (tmp_addr, -4)))); -} - { - DI opval = EXTSIDI (SLLSI (tmp_val, SUBSI (32, MULSI (8, tmp_bytecount)))); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} -} -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDHIQ) : /* ldhi.q $rm, $disp6, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldhil.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_addr; - QI tmp_bytecount; - DI tmp_val; - tmp_addr = ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp6)); - tmp_bytecount = ADDDI (ANDDI (tmp_addr, 7), 1); - tmp_val = 0; -if (ANDQI (tmp_bytecount, 8)) { - { - DI opval = GETMEMDI (current_cpu, pc, ANDDI (tmp_addr, -8)); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} else { -if (GET_H_ENDIAN ()) { -{ -if (ANDQI (tmp_bytecount, 4)) { - tmp_val = ADDDI (SLLDI (tmp_val, 32), ZEXTSIDI (GETMEMSI (current_cpu, pc, ANDDI (tmp_addr, -8)))); -} -if (ANDQI (tmp_bytecount, 2)) { - tmp_val = ADDDI (SLLDI (tmp_val, 16), ZEXTHIDI (GETMEMHI (current_cpu, pc, ANDDI (tmp_addr, -4)))); -} -if (ANDQI (tmp_bytecount, 1)) { - tmp_val = ADDDI (SLLDI (tmp_val, 8), ZEXTQIDI (GETMEMQI (current_cpu, pc, tmp_addr))); -} - { - DI opval = tmp_val; - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} -} else { -{ -if (ANDQI (tmp_bytecount, 1)) { - tmp_val = ADDDI (SLLDI (tmp_val, 8), ZEXTQIDI (GETMEMQI (current_cpu, pc, tmp_addr))); -} -if (ANDQI (tmp_bytecount, 2)) { - tmp_val = ADDDI (SLLDI (tmp_val, 16), ZEXTHIDI (GETMEMHI (current_cpu, pc, ANDDI (tmp_addr, -4)))); -} -if (ANDQI (tmp_bytecount, 4)) { - tmp_val = ADDDI (SLLDI (tmp_val, 32), ZEXTSIDI (GETMEMSI (current_cpu, pc, ANDDI (tmp_addr, -8)))); -} - { - DI opval = SLLDI (tmp_val, SUBSI (64, MULSI (8, tmp_bytecount))); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} -} -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDLOL) : /* ldlo.l $rm, $disp6, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldhil.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_addr; - QI tmp_bytecount; - SI tmp_val; - tmp_addr = ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp6)); - tmp_bytecount = SUBSI (4, ANDDI (tmp_addr, 3)); - tmp_val = 0; -if (ANDQI (tmp_bytecount, 4)) { - { - DI opval = EXTSIDI (GETMEMSI (current_cpu, pc, tmp_addr)); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} else { -if (GET_H_ENDIAN ()) { -{ -if (ANDQI (tmp_bytecount, 1)) { - tmp_val = ADDSI (SLLSI (tmp_val, 8), ZEXTQIDI (GETMEMQI (current_cpu, pc, tmp_addr))); -} -if (ANDQI (tmp_bytecount, 2)) { - tmp_val = ADDSI (SLLSI (tmp_val, 16), ZEXTHIDI (GETMEMHI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 1), -2)))); -} - { - DI opval = EXTSIDI (SLLSI (tmp_val, SUBSI (32, MULSI (8, tmp_bytecount)))); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} -} else { -{ -if (ANDQI (tmp_bytecount, 2)) { - tmp_val = ADDSI (SLLSI (tmp_val, 16), ZEXTHIDI (GETMEMHI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 1), -2)))); -} -if (ANDQI (tmp_bytecount, 1)) { - tmp_val = ADDSI (SLLSI (tmp_val, 8), ZEXTQIDI (GETMEMQI (current_cpu, pc, tmp_addr))); -} - { - DI opval = EXTSIDI (tmp_val); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} -} -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDLOQ) : /* ldlo.q $rm, $disp6, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldhil.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_addr; - QI tmp_bytecount; - DI tmp_val; - tmp_addr = ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp6)); - tmp_bytecount = SUBSI (8, ANDDI (tmp_addr, 7)); - tmp_val = 0; -if (ANDQI (tmp_bytecount, 8)) { - { - DI opval = GETMEMDI (current_cpu, pc, tmp_addr); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} else { -if (GET_H_ENDIAN ()) { -{ -if (ANDQI (tmp_bytecount, 1)) { - tmp_val = ADDDI (SLLDI (tmp_val, 8), ZEXTQIDI (GETMEMQI (current_cpu, pc, tmp_addr))); -} -if (ANDQI (tmp_bytecount, 2)) { - tmp_val = ADDDI (SLLDI (tmp_val, 16), ZEXTHIDI (GETMEMHI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 1), -2)))); -} -if (ANDQI (tmp_bytecount, 4)) { - tmp_val = ADDDI (SLLDI (tmp_val, 32), ZEXTSIDI (GETMEMSI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 3), -4)))); -} - { - DI opval = SLLDI (tmp_val, SUBSI (64, MULSI (8, tmp_bytecount))); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} -} else { -{ -if (ANDQI (tmp_bytecount, 4)) { - tmp_val = ADDDI (SLLDI (tmp_val, 32), ZEXTSIDI (GETMEMSI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 3), -4)))); -} -if (ANDQI (tmp_bytecount, 2)) { - tmp_val = ADDDI (SLLDI (tmp_val, 16), ZEXTHIDI (GETMEMHI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 1), -2)))); -} -if (ANDQI (tmp_bytecount, 1)) { - tmp_val = ADDDI (SLLDI (tmp_val, 8), ZEXTQIDI (GETMEMQI (current_cpu, pc, tmp_addr))); -} - { - DI opval = tmp_val; - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} -} -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDXB) : /* ldx.b $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTQIDI (GETMEMQI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDXL) : /* ldx.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (GETMEMSI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDXQ) : /* ldx.q $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = GETMEMDI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDXUB) : /* ldx.ub $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTQIDI (GETMEMUQI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDXUW) : /* ldx.uw $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTHIDI (GETMEMUHI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDXW) : /* ldx.w $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTHIDI (GETMEMHI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MABSL) : /* mabs.l $rm, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_xori.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = ABSSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)); - tmp_result1 = ABSSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0)); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MABSW) : /* mabs.w $rm, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_xori.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = ABSHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)); - tmp_result1 = ABSHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)); - tmp_result2 = ABSHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1)); - tmp_result3 = ABSHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0)); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MADDL) : /* madd.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = ADDSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), SUBWORDDISI (GET_H_GR (FLD (f_right)), 1)); - tmp_result1 = ADDSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), SUBWORDDISI (GET_H_GR (FLD (f_right)), 0)); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MADDW) : /* madd.w $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = ADDHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3)); - tmp_result1 = ADDHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2)); - tmp_result2 = ADDHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1)); - tmp_result3 = ADDHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0)); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MADDSL) : /* madds.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = ((LTDI (ADDDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (ADDDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))), SLLDI (1, SUBSI (32, 1)))) ? (ADDDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1)))) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - tmp_result1 = ((LTDI (ADDDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 0))), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (ADDDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 0))), SLLDI (1, SUBSI (32, 1)))) ? (ADDDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 0)))) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MADDSUB) : /* madds.ub $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_result7; - QI tmp_result6; - QI tmp_result5; - QI tmp_result4; - QI tmp_result3; - QI tmp_result2; - QI tmp_result1; - QI tmp_result0; - tmp_result0 = ((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7))), MAKEDI (0, 0))) ? (0) : (((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7))), SLLDI (1, 8))) ? (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result1 = ((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6))), MAKEDI (0, 0))) ? (0) : (((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6))), SLLDI (1, 8))) ? (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result2 = ((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5))), MAKEDI (0, 0))) ? (0) : (((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5))), SLLDI (1, 8))) ? (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result3 = ((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4))), MAKEDI (0, 0))) ? (0) : (((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4))), SLLDI (1, 8))) ? (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result4 = ((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3))), MAKEDI (0, 0))) ? (0) : (((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3))), SLLDI (1, 8))) ? (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result5 = ((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2))), MAKEDI (0, 0))) ? (0) : (((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2))), SLLDI (1, 8))) ? (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result6 = ((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1))), MAKEDI (0, 0))) ? (0) : (((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1))), SLLDI (1, 8))) ? (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result7 = ((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0))), MAKEDI (0, 0))) ? (0) : (((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0))), SLLDI (1, 8))) ? (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0)))) : (SUBQI (SLLQI (1, 8), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTQIDI (tmp_result7), 56), ORDI (SLLDI (ZEXTQIDI (tmp_result6), 48), ORDI (SLLDI (ZEXTQIDI (tmp_result5), 40), ORDI (SLLDI (ZEXTQIDI (tmp_result4), 32), ORDI (SLLDI (ZEXTQIDI (tmp_result3), 24), ORDI (SLLDI (ZEXTQIDI (tmp_result2), 16), ORDI (SLLDI (ZEXTQIDI (tmp_result1), 8), ZEXTQIDI (tmp_result0)))))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MADDSW) : /* madds.w $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = ((LTDI (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3))), SLLDI (1, SUBSI (16, 1)))) ? (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result1 = ((LTDI (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2))), SLLDI (1, SUBSI (16, 1)))) ? (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result2 = ((LTDI (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1))), SLLDI (1, SUBSI (16, 1)))) ? (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result3 = ((LTDI (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0))), SLLDI (1, SUBSI (16, 1)))) ? (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MCMPEQB) : /* mcmpeq.b $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_result7; - QI tmp_result6; - QI tmp_result5; - QI tmp_result4; - QI tmp_result3; - QI tmp_result2; - QI tmp_result1; - QI tmp_result0; - tmp_result0 = ((EQQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7))) ? (INVQI (0)) : (0)); - tmp_result1 = ((EQQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6))) ? (INVQI (0)) : (0)); - tmp_result2 = ((EQQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5))) ? (INVQI (0)) : (0)); - tmp_result3 = ((EQQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4))) ? (INVQI (0)) : (0)); - tmp_result4 = ((EQQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3))) ? (INVQI (0)) : (0)); - tmp_result5 = ((EQQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2))) ? (INVQI (0)) : (0)); - tmp_result6 = ((EQQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1))) ? (INVQI (0)) : (0)); - tmp_result7 = ((EQQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0))) ? (INVQI (0)) : (0)); - { - DI opval = ORDI (SLLDI (ZEXTQIDI (tmp_result7), 56), ORDI (SLLDI (ZEXTQIDI (tmp_result6), 48), ORDI (SLLDI (ZEXTQIDI (tmp_result5), 40), ORDI (SLLDI (ZEXTQIDI (tmp_result4), 32), ORDI (SLLDI (ZEXTQIDI (tmp_result3), 24), ORDI (SLLDI (ZEXTQIDI (tmp_result2), 16), ORDI (SLLDI (ZEXTQIDI (tmp_result1), 8), ZEXTQIDI (tmp_result0)))))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MCMPEQL) : /* mcmpeq.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = ((EQSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))) ? (INVSI (0)) : (0)); - tmp_result1 = ((EQSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), SUBWORDDISI (GET_H_GR (FLD (f_right)), 0))) ? (INVSI (0)) : (0)); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MCMPEQW) : /* mcmpeq.w $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = ((EQHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3))) ? (INVHI (0)) : (0)); - tmp_result1 = ((EQHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2))) ? (INVHI (0)) : (0)); - tmp_result2 = ((EQHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1))) ? (INVHI (0)) : (0)); - tmp_result3 = ((EQHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0))) ? (INVHI (0)) : (0)); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MCMPGTL) : /* mcmpgt.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = ((GTSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))) ? (INVSI (0)) : (0)); - tmp_result1 = ((GTSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), SUBWORDDISI (GET_H_GR (FLD (f_right)), 0))) ? (INVSI (0)) : (0)); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MCMPGTUB) : /* mcmpgt.ub $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_result7; - QI tmp_result6; - QI tmp_result5; - QI tmp_result4; - QI tmp_result3; - QI tmp_result2; - QI tmp_result1; - QI tmp_result0; - tmp_result0 = ((GTUQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7))) ? (INVQI (0)) : (0)); - tmp_result1 = ((GTUQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6))) ? (INVQI (0)) : (0)); - tmp_result2 = ((GTUQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5))) ? (INVQI (0)) : (0)); - tmp_result3 = ((GTUQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4))) ? (INVQI (0)) : (0)); - tmp_result4 = ((GTUQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3))) ? (INVQI (0)) : (0)); - tmp_result5 = ((GTUQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2))) ? (INVQI (0)) : (0)); - tmp_result6 = ((GTUQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1))) ? (INVQI (0)) : (0)); - tmp_result7 = ((GTUQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0))) ? (INVQI (0)) : (0)); - { - DI opval = ORDI (SLLDI (ZEXTQIDI (tmp_result7), 56), ORDI (SLLDI (ZEXTQIDI (tmp_result6), 48), ORDI (SLLDI (ZEXTQIDI (tmp_result5), 40), ORDI (SLLDI (ZEXTQIDI (tmp_result4), 32), ORDI (SLLDI (ZEXTQIDI (tmp_result3), 24), ORDI (SLLDI (ZEXTQIDI (tmp_result2), 16), ORDI (SLLDI (ZEXTQIDI (tmp_result1), 8), ZEXTQIDI (tmp_result0)))))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MCMPGTW) : /* mcmpgt.w $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = ((GTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3))) ? (INVHI (0)) : (0)); - tmp_result1 = ((GTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2))) ? (INVHI (0)) : (0)); - tmp_result2 = ((GTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1))) ? (INVHI (0)) : (0)); - tmp_result3 = ((GTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0))) ? (INVHI (0)) : (0)); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MCMV) : /* mcmv $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ORDI (ANDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))), ANDDI (GET_H_GR (FLD (f_dest)), INVDI (GET_H_GR (FLD (f_right))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MCNVSLW) : /* mcnvs.lw $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = ((LTSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), SLLDI (1, SUBSI (16, 1)))) ? (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result1 = ((LTSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), SLLDI (1, SUBSI (16, 1)))) ? (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result2 = ((LTSI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1), SLLDI (1, SUBSI (16, 1)))) ? (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result3 = ((LTSI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 0), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 0), SLLDI (1, SUBSI (16, 1)))) ? (SUBWORDDISI (GET_H_GR (FLD (f_right)), 0)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MCNVSWB) : /* mcnvs.wb $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_result7; - QI tmp_result6; - QI tmp_result5; - QI tmp_result4; - QI tmp_result3; - QI tmp_result2; - QI tmp_result1; - QI tmp_result0; - tmp_result0 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), NEGDI (SLLDI (1, SUBSI (8, 1))))) ? (NEGQI (SLLQI (1, SUBSI (8, 1)))) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), SLLDI (1, SUBSI (8, 1)))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)) : (SUBQI (SLLQI (1, SUBSI (8, 1)), 1))))); - tmp_result1 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), NEGDI (SLLDI (1, SUBSI (8, 1))))) ? (NEGQI (SLLQI (1, SUBSI (8, 1)))) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), SLLDI (1, SUBSI (8, 1)))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)) : (SUBQI (SLLQI (1, SUBSI (8, 1)), 1))))); - tmp_result2 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), NEGDI (SLLDI (1, SUBSI (8, 1))))) ? (NEGQI (SLLQI (1, SUBSI (8, 1)))) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), SLLDI (1, SUBSI (8, 1)))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1)) : (SUBQI (SLLQI (1, SUBSI (8, 1)), 1))))); - tmp_result3 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), NEGDI (SLLDI (1, SUBSI (8, 1))))) ? (NEGQI (SLLQI (1, SUBSI (8, 1)))) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), SLLDI (1, SUBSI (8, 1)))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0)) : (SUBQI (SLLQI (1, SUBSI (8, 1)), 1))))); - tmp_result4 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3), NEGDI (SLLDI (1, SUBSI (8, 1))))) ? (NEGQI (SLLQI (1, SUBSI (8, 1)))) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3), SLLDI (1, SUBSI (8, 1)))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3)) : (SUBQI (SLLQI (1, SUBSI (8, 1)), 1))))); - tmp_result5 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2), NEGDI (SLLDI (1, SUBSI (8, 1))))) ? (NEGQI (SLLQI (1, SUBSI (8, 1)))) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2), SLLDI (1, SUBSI (8, 1)))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2)) : (SUBQI (SLLQI (1, SUBSI (8, 1)), 1))))); - tmp_result6 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1), NEGDI (SLLDI (1, SUBSI (8, 1))))) ? (NEGQI (SLLQI (1, SUBSI (8, 1)))) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1), SLLDI (1, SUBSI (8, 1)))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1)) : (SUBQI (SLLQI (1, SUBSI (8, 1)), 1))))); - tmp_result7 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0), NEGDI (SLLDI (1, SUBSI (8, 1))))) ? (NEGQI (SLLQI (1, SUBSI (8, 1)))) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0), SLLDI (1, SUBSI (8, 1)))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0)) : (SUBQI (SLLQI (1, SUBSI (8, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTQIDI (tmp_result7), 56), ORDI (SLLDI (ZEXTQIDI (tmp_result6), 48), ORDI (SLLDI (ZEXTQIDI (tmp_result5), 40), ORDI (SLLDI (ZEXTQIDI (tmp_result4), 32), ORDI (SLLDI (ZEXTQIDI (tmp_result3), 24), ORDI (SLLDI (ZEXTQIDI (tmp_result2), 16), ORDI (SLLDI (ZEXTQIDI (tmp_result1), 8), ZEXTQIDI (tmp_result0)))))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MCNVSWUB) : /* mcnvs.wub $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_result7; - QI tmp_result6; - QI tmp_result5; - QI tmp_result4; - QI tmp_result3; - QI tmp_result2; - QI tmp_result1; - QI tmp_result0; - tmp_result0 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), MAKEDI (0, 0))) ? (0) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), SLLDI (1, 8))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result1 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), MAKEDI (0, 0))) ? (0) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), SLLDI (1, 8))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result2 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), MAKEDI (0, 0))) ? (0) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), SLLDI (1, 8))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1)) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result3 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), MAKEDI (0, 0))) ? (0) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), SLLDI (1, 8))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0)) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result4 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3), MAKEDI (0, 0))) ? (0) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3), SLLDI (1, 8))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3)) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result5 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2), MAKEDI (0, 0))) ? (0) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2), SLLDI (1, 8))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2)) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result6 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1), MAKEDI (0, 0))) ? (0) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1), SLLDI (1, 8))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1)) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result7 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0), MAKEDI (0, 0))) ? (0) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0), SLLDI (1, 8))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0)) : (SUBQI (SLLQI (1, 8), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTQIDI (tmp_result7), 56), ORDI (SLLDI (ZEXTQIDI (tmp_result6), 48), ORDI (SLLDI (ZEXTQIDI (tmp_result5), 40), ORDI (SLLDI (ZEXTQIDI (tmp_result4), 32), ORDI (SLLDI (ZEXTQIDI (tmp_result3), 24), ORDI (SLLDI (ZEXTQIDI (tmp_result2), 16), ORDI (SLLDI (ZEXTQIDI (tmp_result1), 8), ZEXTQIDI (tmp_result0)))))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MEXTR1) : /* mextr1 $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_count; - DI tmp_mask; - DI tmp_rhs; - tmp_count = MULQI (8, 1); - tmp_mask = SLLDI (INVSI (0), tmp_count); - tmp_rhs = SRLDI (ANDDI (GET_H_GR (FLD (f_left)), tmp_mask), tmp_count); - tmp_count = MULQI (8, SUBQI (8, 1)); - tmp_mask = SRLDI (INVSI (0), tmp_count); - { - DI opval = ORDI (tmp_rhs, SLLDI (ANDDI (GET_H_GR (FLD (f_right)), tmp_mask), tmp_count)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MEXTR2) : /* mextr2 $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_count; - DI tmp_mask; - DI tmp_rhs; - tmp_count = MULQI (8, 2); - tmp_mask = SLLDI (INVSI (0), tmp_count); - tmp_rhs = SRLDI (ANDDI (GET_H_GR (FLD (f_left)), tmp_mask), tmp_count); - tmp_count = MULQI (8, SUBQI (8, 2)); - tmp_mask = SRLDI (INVSI (0), tmp_count); - { - DI opval = ORDI (tmp_rhs, SLLDI (ANDDI (GET_H_GR (FLD (f_right)), tmp_mask), tmp_count)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MEXTR3) : /* mextr3 $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_count; - DI tmp_mask; - DI tmp_rhs; - tmp_count = MULQI (8, 3); - tmp_mask = SLLDI (INVSI (0), tmp_count); - tmp_rhs = SRLDI (ANDDI (GET_H_GR (FLD (f_left)), tmp_mask), tmp_count); - tmp_count = MULQI (8, SUBQI (8, 3)); - tmp_mask = SRLDI (INVSI (0), tmp_count); - { - DI opval = ORDI (tmp_rhs, SLLDI (ANDDI (GET_H_GR (FLD (f_right)), tmp_mask), tmp_count)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MEXTR4) : /* mextr4 $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_count; - DI tmp_mask; - DI tmp_rhs; - tmp_count = MULQI (8, 4); - tmp_mask = SLLDI (INVSI (0), tmp_count); - tmp_rhs = SRLDI (ANDDI (GET_H_GR (FLD (f_left)), tmp_mask), tmp_count); - tmp_count = MULQI (8, SUBQI (8, 4)); - tmp_mask = SRLDI (INVSI (0), tmp_count); - { - DI opval = ORDI (tmp_rhs, SLLDI (ANDDI (GET_H_GR (FLD (f_right)), tmp_mask), tmp_count)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MEXTR5) : /* mextr5 $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_count; - DI tmp_mask; - DI tmp_rhs; - tmp_count = MULQI (8, 5); - tmp_mask = SLLDI (INVSI (0), tmp_count); - tmp_rhs = SRLDI (ANDDI (GET_H_GR (FLD (f_left)), tmp_mask), tmp_count); - tmp_count = MULQI (8, SUBQI (8, 5)); - tmp_mask = SRLDI (INVSI (0), tmp_count); - { - DI opval = ORDI (tmp_rhs, SLLDI (ANDDI (GET_H_GR (FLD (f_right)), tmp_mask), tmp_count)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MEXTR6) : /* mextr6 $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_count; - DI tmp_mask; - DI tmp_rhs; - tmp_count = MULQI (8, 6); - tmp_mask = SLLDI (INVSI (0), tmp_count); - tmp_rhs = SRLDI (ANDDI (GET_H_GR (FLD (f_left)), tmp_mask), tmp_count); - tmp_count = MULQI (8, SUBQI (8, 6)); - tmp_mask = SRLDI (INVSI (0), tmp_count); - { - DI opval = ORDI (tmp_rhs, SLLDI (ANDDI (GET_H_GR (FLD (f_right)), tmp_mask), tmp_count)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MEXTR7) : /* mextr7 $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_count; - DI tmp_mask; - DI tmp_rhs; - tmp_count = MULQI (8, 7); - tmp_mask = SLLDI (INVSI (0), tmp_count); - tmp_rhs = SRLDI (ANDDI (GET_H_GR (FLD (f_left)), tmp_mask), tmp_count); - tmp_count = MULQI (8, SUBQI (8, 7)); - tmp_mask = SRLDI (INVSI (0), tmp_count); - { - DI opval = ORDI (tmp_rhs, SLLDI (ANDDI (GET_H_GR (FLD (f_right)), tmp_mask), tmp_count)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MMACFXWL) : /* mmacfx.wl $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_result1; - SI tmp_result0; - tmp_result0 = SUBWORDDISI (GET_H_GR (FLD (f_dest)), 1); - tmp_result1 = SUBWORDDISI (GET_H_GR (FLD (f_dest)), 0); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3))); - tmp_temp = ((LTDI (SLLDI (tmp_temp, 1), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SLLDI (tmp_temp, 1), SLLDI (1, SUBSI (32, 1)))) ? (SLLDI (tmp_temp, 1)) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - tmp_result0 = ((LTDI (ADDDI (EXTSIDI (tmp_result0), EXTSIDI (tmp_temp)), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (ADDDI (EXTSIDI (tmp_result0), EXTSIDI (tmp_temp)), SLLDI (1, SUBSI (32, 1)))) ? (ADDDI (EXTSIDI (tmp_result0), EXTSIDI (tmp_temp))) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2))); - tmp_temp = ((LTDI (SLLDI (tmp_temp, 1), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SLLDI (tmp_temp, 1), SLLDI (1, SUBSI (32, 1)))) ? (SLLDI (tmp_temp, 1)) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - tmp_result1 = ((LTDI (ADDDI (EXTSIDI (tmp_result1), EXTSIDI (tmp_temp)), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (ADDDI (EXTSIDI (tmp_result1), EXTSIDI (tmp_temp)), SLLDI (1, SUBSI (32, 1)))) ? (ADDDI (EXTSIDI (tmp_result1), EXTSIDI (tmp_temp))) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MMACNFX_WL) : /* mmacnfx.wl $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_result1; - SI tmp_result0; - tmp_result0 = SUBWORDDISI (GET_H_GR (FLD (f_dest)), 1); - tmp_result1 = SUBWORDDISI (GET_H_GR (FLD (f_dest)), 0); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3))); - tmp_temp = ((LTDI (SLLDI (tmp_temp, 1), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SLLDI (tmp_temp, 1), SLLDI (1, SUBSI (32, 1)))) ? (SLLDI (tmp_temp, 1)) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - tmp_result0 = ((LTDI (SUBDI (EXTSIDI (tmp_result0), EXTSIDI (tmp_temp)), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SUBDI (EXTSIDI (tmp_result0), EXTSIDI (tmp_temp)), SLLDI (1, SUBSI (32, 1)))) ? (SUBDI (EXTSIDI (tmp_result0), EXTSIDI (tmp_temp))) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2))); - tmp_temp = ((LTDI (SLLDI (tmp_temp, 1), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SLLDI (tmp_temp, 1), SLLDI (1, SUBSI (32, 1)))) ? (SLLDI (tmp_temp, 1)) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - tmp_result1 = ((LTDI (SUBDI (EXTSIDI (tmp_result1), EXTSIDI (tmp_temp)), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SUBDI (EXTSIDI (tmp_result1), EXTSIDI (tmp_temp)), SLLDI (1, SUBSI (32, 1)))) ? (SUBDI (EXTSIDI (tmp_result1), EXTSIDI (tmp_temp))) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MMULL) : /* mmul.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = MULSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), SUBWORDDISI (GET_H_GR (FLD (f_right)), 1)); - tmp_result1 = MULSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), SUBWORDDISI (GET_H_GR (FLD (f_right)), 0)); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MMULW) : /* mmul.w $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = MULHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3)); - tmp_result1 = MULHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2)); - tmp_result2 = MULHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1)); - tmp_result3 = MULHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0)); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MMULFXL) : /* mmulfx.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_temp; - SI tmp_result0; - SI tmp_result1; - tmp_temp = MULDI (ZEXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)), ZEXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))); - tmp_result0 = ((LTDI (SRADI (tmp_temp, 31), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SRADI (tmp_temp, 31), SLLDI (1, SUBSI (32, 1)))) ? (SRADI (tmp_temp, 31)) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - tmp_temp = MULDI (ZEXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0)), ZEXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 0))); - tmp_result1 = ((LTDI (SRADI (tmp_temp, 31), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SRADI (tmp_temp, 31), SLLDI (1, SUBSI (32, 1)))) ? (SRADI (tmp_temp, 31)) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MMULFXW) : /* mmulfx.w $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - HI tmp_result0; - HI tmp_result1; - HI tmp_result2; - HI tmp_result3; - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3))); - tmp_result0 = ((LTSI (SRASI (tmp_temp, 15), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SRASI (tmp_temp, 15), SLLDI (1, SUBSI (16, 1)))) ? (SRASI (tmp_temp, 15)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2))); - tmp_result1 = ((LTSI (SRASI (tmp_temp, 15), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SRASI (tmp_temp, 15), SLLDI (1, SUBSI (16, 1)))) ? (SRASI (tmp_temp, 15)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1))); - tmp_result2 = ((LTSI (SRASI (tmp_temp, 15), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SRASI (tmp_temp, 15), SLLDI (1, SUBSI (16, 1)))) ? (SRASI (tmp_temp, 15)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0))); - tmp_result3 = ((LTSI (SRASI (tmp_temp, 15), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SRASI (tmp_temp, 15), SLLDI (1, SUBSI (16, 1)))) ? (SRASI (tmp_temp, 15)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MMULFXRPW) : /* mmulfxrp.w $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - HI tmp_result0; - HI tmp_result1; - HI tmp_result2; - HI tmp_result3; - HI tmp_c; - tmp_c = SLLSI (1, 14); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3))); - tmp_result0 = ((LTSI (SRASI (ADDSI (tmp_temp, tmp_c), 15), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SRASI (ADDSI (tmp_temp, tmp_c), 15), SLLDI (1, SUBSI (16, 1)))) ? (SRASI (ADDSI (tmp_temp, tmp_c), 15)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2))); - tmp_result1 = ((LTSI (SRASI (ADDSI (tmp_temp, tmp_c), 15), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SRASI (ADDSI (tmp_temp, tmp_c), 15), SLLDI (1, SUBSI (16, 1)))) ? (SRASI (ADDSI (tmp_temp, tmp_c), 15)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1))); - tmp_result2 = ((LTSI (SRASI (ADDSI (tmp_temp, tmp_c), 15), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SRASI (ADDSI (tmp_temp, tmp_c), 15), SLLDI (1, SUBSI (16, 1)))) ? (SRASI (ADDSI (tmp_temp, tmp_c), 15)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0))); - tmp_result3 = ((LTSI (SRASI (ADDSI (tmp_temp, tmp_c), 15), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SRASI (ADDSI (tmp_temp, tmp_c), 15), SLLDI (1, SUBSI (16, 1)))) ? (SRASI (ADDSI (tmp_temp, tmp_c), 15)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MMULHIWL) : /* mmulhi.wl $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1))); - tmp_result1 = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0))); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MMULLOWL) : /* mmullo.wl $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3))); - tmp_result1 = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2))); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MMULSUMWQ) : /* mmulsum.wq $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_acc; - tmp_acc = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0))); - tmp_acc = ADDDI (tmp_acc, MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1)))); - tmp_acc = ADDDI (tmp_acc, MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2)))); - tmp_acc = ADDDI (tmp_acc, MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3)))); - { - DI opval = ADDDI (GET_H_GR (FLD (f_dest)), tmp_acc); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVI) : /* movi $imm16, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (FLD (f_imm16)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MPERMW) : /* mperm.w $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_control; - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_control = ANDQI (GET_H_GR (FLD (f_right)), 255); - tmp_result0 = SUBWORDDIHI (GET_H_GR (FLD (f_left)), SUBSI (3, ANDQI (tmp_control, 3))); - tmp_result1 = SUBWORDDIHI (GET_H_GR (FLD (f_left)), SUBSI (3, ANDQI (SRLQI (tmp_control, 2), 3))); - tmp_result2 = SUBWORDDIHI (GET_H_GR (FLD (f_left)), SUBSI (3, ANDQI (SRLQI (tmp_control, 4), 3))); - tmp_result3 = SUBWORDDIHI (GET_H_GR (FLD (f_left)), SUBSI (3, ANDQI (SRLQI (tmp_control, 6), 3))); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSADUBQ) : /* msad.ubq $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_acc; - tmp_acc = ABSDI (SUBQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0))); - tmp_acc = ADDDI (tmp_acc, ABSQI (SUBQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1)))); - tmp_acc = ADDDI (tmp_acc, ABSQI (SUBQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2)))); - tmp_acc = ADDDI (tmp_acc, ABSQI (SUBQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3)))); - tmp_acc = ADDDI (tmp_acc, ABSQI (SUBQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4)))); - tmp_acc = ADDDI (tmp_acc, ABSQI (SUBQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5)))); - tmp_acc = ADDDI (tmp_acc, ABSQI (SUBQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6)))); - tmp_acc = ADDDI (tmp_acc, ABSQI (SUBQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7)))); - { - DI opval = ADDDI (GET_H_GR (FLD (f_dest)), tmp_acc); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSHALDSL) : /* mshalds.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = ((LTDI (SLLDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 31)), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SLLDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 31)), SLLDI (1, SUBSI (32, 1)))) ? (SLLDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 31))) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - tmp_result1 = ((LTDI (SLLDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 31)), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SLLDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 31)), SLLDI (1, SUBSI (32, 1)))) ? (SLLDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 31))) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSHALDSW) : /* mshalds.w $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = ((LTDI (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), ANDDI (GET_H_GR (FLD (f_right)), 15)), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), ANDDI (GET_H_GR (FLD (f_right)), 15)), SLLDI (1, SUBSI (16, 1)))) ? (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), ANDDI (GET_H_GR (FLD (f_right)), 15))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result1 = ((LTDI (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), ANDDI (GET_H_GR (FLD (f_right)), 15)), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), ANDDI (GET_H_GR (FLD (f_right)), 15)), SLLDI (1, SUBSI (16, 1)))) ? (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), ANDDI (GET_H_GR (FLD (f_right)), 15))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result2 = ((LTDI (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 15)), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 15)), SLLDI (1, SUBSI (16, 1)))) ? (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 15))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result3 = ((LTDI (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 15)), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 15)), SLLDI (1, SUBSI (16, 1)))) ? (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 15))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSHARDL) : /* mshard.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = SRASI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 31)); - tmp_result1 = SRASI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 31)); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSHARDW) : /* mshard.w $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = SRAHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), ANDDI (GET_H_GR (FLD (f_right)), 15)); - tmp_result1 = SRAHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), ANDDI (GET_H_GR (FLD (f_right)), 15)); - tmp_result2 = SRAHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 15)); - tmp_result3 = SRAHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 15)); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSHARDSQ) : /* mshards.q $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ((LTDI (SRADI (GET_H_GR (FLD (f_left)), ANDDI (GET_H_GR (FLD (f_right)), 63)), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGDI (SLLDI (1, SUBSI (16, 1)))) : (((LTDI (SRADI (GET_H_GR (FLD (f_left)), ANDDI (GET_H_GR (FLD (f_right)), 63)), SLLDI (1, SUBSI (16, 1)))) ? (SRADI (GET_H_GR (FLD (f_left)), ANDDI (GET_H_GR (FLD (f_right)), 63))) : (SUBDI (SLLDI (1, SUBSI (16, 1)), 1))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSHFHIB) : /* mshfhi.b $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_result7; - QI tmp_result6; - QI tmp_result5; - QI tmp_result4; - QI tmp_result3; - QI tmp_result2; - QI tmp_result1; - QI tmp_result0; - tmp_result0 = SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3); - tmp_result1 = SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3); - tmp_result2 = SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2); - tmp_result3 = SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2); - tmp_result4 = SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1); - tmp_result5 = SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1); - tmp_result6 = SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0); - tmp_result7 = SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0); - { - DI opval = ORDI (SLLDI (ZEXTQIDI (tmp_result7), 56), ORDI (SLLDI (ZEXTQIDI (tmp_result6), 48), ORDI (SLLDI (ZEXTQIDI (tmp_result5), 40), ORDI (SLLDI (ZEXTQIDI (tmp_result4), 32), ORDI (SLLDI (ZEXTQIDI (tmp_result3), 24), ORDI (SLLDI (ZEXTQIDI (tmp_result2), 16), ORDI (SLLDI (ZEXTQIDI (tmp_result1), 8), ZEXTQIDI (tmp_result0)))))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSHFHIL) : /* mshfhi.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = SUBWORDDISI (GET_H_GR (FLD (f_left)), 0); - tmp_result1 = SUBWORDDISI (GET_H_GR (FLD (f_right)), 0); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSHFHIW) : /* mshfhi.w $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1); - tmp_result1 = SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1); - tmp_result2 = SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0); - tmp_result3 = SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSHFLOB) : /* mshflo.b $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_result7; - QI tmp_result6; - QI tmp_result5; - QI tmp_result4; - QI tmp_result3; - QI tmp_result2; - QI tmp_result1; - QI tmp_result0; - tmp_result0 = SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7); - tmp_result1 = SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7); - tmp_result2 = SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6); - tmp_result3 = SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6); - tmp_result4 = SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5); - tmp_result5 = SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5); - tmp_result6 = SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4); - tmp_result7 = SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4); - { - DI opval = ORDI (SLLDI (ZEXTQIDI (tmp_result7), 56), ORDI (SLLDI (ZEXTQIDI (tmp_result6), 48), ORDI (SLLDI (ZEXTQIDI (tmp_result5), 40), ORDI (SLLDI (ZEXTQIDI (tmp_result4), 32), ORDI (SLLDI (ZEXTQIDI (tmp_result3), 24), ORDI (SLLDI (ZEXTQIDI (tmp_result2), 16), ORDI (SLLDI (ZEXTQIDI (tmp_result1), 8), ZEXTQIDI (tmp_result0)))))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSHFLOL) : /* mshflo.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = SUBWORDDISI (GET_H_GR (FLD (f_left)), 1); - tmp_result1 = SUBWORDDISI (GET_H_GR (FLD (f_right)), 1); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSHFLOW) : /* mshflo.w $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3); - tmp_result1 = SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3); - tmp_result2 = SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2); - tmp_result3 = SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSHLLDL) : /* mshlld.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = SLLSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 31)); - tmp_result1 = SLLSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 31)); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSHLLDW) : /* mshlld.w $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = SLLHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), ANDDI (GET_H_GR (FLD (f_right)), 15)); - tmp_result1 = SLLHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), ANDDI (GET_H_GR (FLD (f_right)), 15)); - tmp_result2 = SLLHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 15)); - tmp_result3 = SLLHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 15)); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSHLRDL) : /* mshlrd.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = SRLSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 31)); - tmp_result1 = SRLSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 31)); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSHLRDW) : /* mshlrd.w $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = SRLHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), ANDDI (GET_H_GR (FLD (f_right)), 15)); - tmp_result1 = SRLHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), ANDDI (GET_H_GR (FLD (f_right)), 15)); - tmp_result2 = SRLHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 15)); - tmp_result3 = SRLHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 15)); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSUBL) : /* msub.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = SUBSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), SUBWORDDISI (GET_H_GR (FLD (f_right)), 1)); - tmp_result1 = SUBSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), SUBWORDDISI (GET_H_GR (FLD (f_right)), 0)); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSUBW) : /* msub.w $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = SUBHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3)); - tmp_result1 = SUBHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2)); - tmp_result2 = SUBHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1)); - tmp_result3 = SUBHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0)); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSUBSL) : /* msubs.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = ((LTDI (SUBDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SUBDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))), SLLDI (1, SUBSI (32, 1)))) ? (SUBDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1)))) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - tmp_result1 = ((LTDI (SUBDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 0))), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SUBDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 0))), SLLDI (1, SUBSI (32, 1)))) ? (SUBDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 0)))) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSUBSUB) : /* msubs.ub $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_result7; - QI tmp_result6; - QI tmp_result5; - QI tmp_result4; - QI tmp_result3; - QI tmp_result2; - QI tmp_result1; - QI tmp_result0; - tmp_result0 = ((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7))), MAKEDI (0, 0))) ? (0) : (((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7))), SLLDI (1, 8))) ? (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result1 = ((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6))), MAKEDI (0, 0))) ? (0) : (((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6))), SLLDI (1, 8))) ? (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result2 = ((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5))), MAKEDI (0, 0))) ? (0) : (((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5))), SLLDI (1, 8))) ? (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result3 = ((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4))), MAKEDI (0, 0))) ? (0) : (((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4))), SLLDI (1, 8))) ? (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result4 = ((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3))), MAKEDI (0, 0))) ? (0) : (((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3))), SLLDI (1, 8))) ? (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result5 = ((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2))), MAKEDI (0, 0))) ? (0) : (((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2))), SLLDI (1, 8))) ? (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result6 = ((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1))), MAKEDI (0, 0))) ? (0) : (((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1))), SLLDI (1, 8))) ? (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result7 = ((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0))), MAKEDI (0, 0))) ? (0) : (((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0))), SLLDI (1, 8))) ? (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0)))) : (SUBQI (SLLQI (1, 8), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTQIDI (tmp_result7), 56), ORDI (SLLDI (ZEXTQIDI (tmp_result6), 48), ORDI (SLLDI (ZEXTQIDI (tmp_result5), 40), ORDI (SLLDI (ZEXTQIDI (tmp_result4), 32), ORDI (SLLDI (ZEXTQIDI (tmp_result3), 24), ORDI (SLLDI (ZEXTQIDI (tmp_result2), 16), ORDI (SLLDI (ZEXTQIDI (tmp_result1), 8), ZEXTQIDI (tmp_result0)))))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSUBSW) : /* msubs.w $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_result7; - QI tmp_result6; - QI tmp_result5; - QI tmp_result4; - QI tmp_result3; - QI tmp_result2; - QI tmp_result1; - QI tmp_result0; - tmp_result0 = ((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7))), SLLDI (1, SUBSI (16, 1)))) ? (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result1 = ((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6))), SLLDI (1, SUBSI (16, 1)))) ? (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result2 = ((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5))), SLLDI (1, SUBSI (16, 1)))) ? (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result3 = ((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4))), SLLDI (1, SUBSI (16, 1)))) ? (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result4 = ((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3))), SLLDI (1, SUBSI (16, 1)))) ? (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result5 = ((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2))), SLLDI (1, SUBSI (16, 1)))) ? (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result6 = ((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1))), SLLDI (1, SUBSI (16, 1)))) ? (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result7 = ((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0))), SLLDI (1, SUBSI (16, 1)))) ? (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTQIDI (tmp_result7), 56), ORDI (SLLDI (ZEXTQIDI (tmp_result6), 48), ORDI (SLLDI (ZEXTQIDI (tmp_result5), 40), ORDI (SLLDI (ZEXTQIDI (tmp_result4), 32), ORDI (SLLDI (ZEXTQIDI (tmp_result3), 24), ORDI (SLLDI (ZEXTQIDI (tmp_result2), 16), ORDI (SLLDI (ZEXTQIDI (tmp_result1), 8), ZEXTQIDI (tmp_result0)))))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULSL) : /* muls.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = MULDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULUL) : /* mulu.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = MULDI (ZEXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)), ZEXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOP) : /* nop */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NSB) : /* nsb $rm, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_xori.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = sh64_nsb (current_cpu, GET_H_GR (FLD (f_left))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_OCBI) : /* ocbi $rm, $disp6x32 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_OCBP) : /* ocbp $rm, $disp6x32 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_OCBWB) : /* ocbwb $rm, $disp6x32 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_OR) : /* or $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ORDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ORI) : /* ori $rm, $imm10, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ori.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ORDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_imm10))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_PREFI) : /* prefi $rm, $disp6x32 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_PTA) : /* pta$likely $disp16, $tra */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_pta.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ADDSI (FLD (f_disp16), 1); - CPU (h_tr[FLD (f_tra)]) = opval; - TRACE_RESULT (current_cpu, abuf, "tr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_PTABS) : /* ptabs$likely $rn, $tra */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = GET_H_GR (FLD (f_right)); - CPU (h_tr[FLD (f_tra)]) = opval; - TRACE_RESULT (current_cpu, abuf, "tr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_PTB) : /* ptb$likely $disp16, $tra */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_pta.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = FLD (f_disp16); - CPU (h_tr[FLD (f_tra)]) = opval; - TRACE_RESULT (current_cpu, abuf, "tr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_PTREL) : /* ptrel$likely $rn, $tra */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ADDDI (pc, GET_H_GR (FLD (f_right))); - CPU (h_tr[FLD (f_tra)]) = opval; - TRACE_RESULT (current_cpu, abuf, "tr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_PUTCFG) : /* putcfg $rm, $disp6, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_PUTCON) : /* putcon $rm, $crj */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_xori.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = GET_H_GR (FLD (f_left)); - SET_H_CR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "cr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_RTE) : /* rte */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHARD) : /* shard $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = SRADI (GET_H_GR (FLD (f_left)), ANDDI (GET_H_GR (FLD (f_right)), 63)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHARDL) : /* shard.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (SRASI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 63))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHARI) : /* shari $rm, $uimm6, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_shari.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = SRADI (GET_H_GR (FLD (f_left)), FLD (f_uimm6)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHARIL) : /* shari.l $rm, $uimm6, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_shari.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (SRASI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDSI (FLD (f_uimm6), 63))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLLD) : /* shlld $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = SLLDI (GET_H_GR (FLD (f_left)), ANDDI (GET_H_GR (FLD (f_right)), 63)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLLDL) : /* shlld.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (SLLSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 63))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLLI) : /* shlli $rm, $uimm6, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_shari.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = SLLDI (GET_H_GR (FLD (f_left)), FLD (f_uimm6)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLLIL) : /* shlli.l $rm, $uimm6, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_shari.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (SLLSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDSI (FLD (f_uimm6), 63))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLRD) : /* shlrd $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = SRLDI (GET_H_GR (FLD (f_left)), ANDDI (GET_H_GR (FLD (f_right)), 63)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLRDL) : /* shlrd.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (SRLSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 63))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLRI) : /* shlri $rm, $uimm6, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_shari.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = SRLDI (GET_H_GR (FLD (f_left)), FLD (f_uimm6)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLRIL) : /* shlri.l $rm, $uimm6, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_shari.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (SRLSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDSI (FLD (f_uimm6), 63))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHORI) : /* shori $uimm16, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_shori.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ORDI (SLLDI (GET_H_GR (FLD (f_dest)), 16), ZEXTSIDI (FLD (f_uimm16))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SLEEP) : /* sleep */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STB) : /* st.b $rm, $disp10, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - UQI opval = ANDQI (GET_H_GR (FLD (f_dest)), 255); - SETMEMUQI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STL) : /* st.l $rm, $disp10x4, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_flds.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (GET_H_GR (FLD (f_dest)), 0xffffffff); - SETMEMSI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10x4))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STQ) : /* st.q $rm, $disp10x8, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_fldd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = GET_H_GR (FLD (f_dest)); - SETMEMDI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10x8))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STW) : /* st.w $rm, $disp10x2, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_lduw.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - HI opval = ANDHI (GET_H_GR (FLD (f_dest)), 65535); - SETMEMHI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10x2))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STHIL) : /* sthi.l $rm, $disp6, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldhil.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_addr; - QI tmp_bytecount; - DI tmp_val; - tmp_addr = ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp6)); - tmp_bytecount = ADDDI (ANDDI (tmp_addr, 3), 1); -if (ANDQI (tmp_bytecount, 4)) { - { - SI opval = GET_H_GR (FLD (f_dest)); - SETMEMSI (current_cpu, pc, ANDDI (tmp_addr, -4), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} else { -if (GET_H_ENDIAN ()) { -{ - tmp_val = GET_H_GR (FLD (f_dest)); -if (ANDQI (tmp_bytecount, 1)) { -{ - { - UQI opval = ANDQI (tmp_val, 255); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 8); -} -} -if (ANDQI (tmp_bytecount, 2)) { -{ - { - HI opval = ANDHI (tmp_val, 65535); - SETMEMHI (current_cpu, pc, ANDDI (tmp_addr, -4), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 16); -} -} -} -} else { -{ - tmp_val = SRLDI (GET_H_GR (FLD (f_dest)), SUBSI (32, MULSI (8, tmp_bytecount))); -if (ANDQI (tmp_bytecount, 2)) { -{ - { - HI opval = ANDHI (tmp_val, 65535); - SETMEMHI (current_cpu, pc, ANDDI (tmp_addr, -4), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 16); -} -} -if (ANDQI (tmp_bytecount, 1)) { -{ - { - UQI opval = ANDQI (tmp_val, 255); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 8); -} -} -} -} -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STHIQ) : /* sthi.q $rm, $disp6, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldhil.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_addr; - QI tmp_bytecount; - DI tmp_val; - tmp_addr = ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp6)); - tmp_bytecount = ADDDI (ANDDI (tmp_addr, 7), 1); -if (ANDQI (tmp_bytecount, 8)) { - { - DI opval = GET_H_GR (FLD (f_dest)); - SETMEMDI (current_cpu, pc, ANDDI (tmp_addr, -8), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "memory", 'D', opval); - } -} else { -if (GET_H_ENDIAN ()) { -{ - tmp_val = GET_H_GR (FLD (f_dest)); -if (ANDQI (tmp_bytecount, 1)) { -{ - { - UQI opval = ANDQI (tmp_val, 255); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 8); -} -} -if (ANDQI (tmp_bytecount, 2)) { -{ - { - HI opval = ANDHI (tmp_val, 65535); - SETMEMHI (current_cpu, pc, ANDDI (tmp_addr, -4), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 16); -} -} -if (ANDQI (tmp_bytecount, 4)) { -{ - { - SI opval = ANDSI (tmp_val, 0xffffffff); - SETMEMSI (current_cpu, pc, ANDDI (tmp_addr, -8), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 32); -} -} -} -} else { -{ - tmp_val = SRLDI (GET_H_GR (FLD (f_dest)), SUBSI (64, MULSI (8, tmp_bytecount))); -if (ANDQI (tmp_bytecount, 4)) { -{ - { - SI opval = ANDSI (tmp_val, 0xffffffff); - SETMEMSI (current_cpu, pc, ANDDI (tmp_addr, -8), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 32); -} -} -if (ANDQI (tmp_bytecount, 2)) { -{ - { - HI opval = ANDHI (tmp_val, 65535); - SETMEMHI (current_cpu, pc, ANDDI (tmp_addr, -4), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 16); -} -} -if (ANDQI (tmp_bytecount, 1)) { -{ - { - UQI opval = ANDQI (tmp_val, 255); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 8); -} -} -} -} -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STLOL) : /* stlo.l $rm, $disp6, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldhil.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_addr; - QI tmp_bytecount; - DI tmp_val; - tmp_addr = ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp6)); - tmp_bytecount = SUBSI (4, ANDDI (tmp_addr, 3)); -if (ANDQI (tmp_bytecount, 4)) { - { - USI opval = GET_H_GR (FLD (f_dest)); - SETMEMUSI (current_cpu, pc, tmp_addr, opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} else { -if (GET_H_ENDIAN ()) { -{ - tmp_val = SRLDI (GET_H_GR (FLD (f_dest)), SUBSI (32, MULSI (8, tmp_bytecount))); -if (ANDQI (tmp_bytecount, 2)) { -{ - { - UHI opval = ANDHI (tmp_val, 65535); - SETMEMUHI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 1), -2), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 16); -} -} -if (ANDQI (tmp_bytecount, 1)) { -{ - { - UQI opval = ANDQI (tmp_val, 255); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 8); -} -} -} -} else { -{ - tmp_val = GET_H_GR (FLD (f_dest)); -if (ANDQI (tmp_bytecount, 1)) { -{ - { - UQI opval = ANDQI (tmp_val, 255); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 8); -} -} -if (ANDQI (tmp_bytecount, 2)) { -{ - { - UHI opval = ANDHI (tmp_val, 65535); - SETMEMUHI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 1), -2), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 16); -} -} -} -} -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STLOQ) : /* stlo.q $rm, $disp6, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldhil.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_addr; - QI tmp_bytecount; - DI tmp_val; - tmp_addr = ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp6)); - tmp_bytecount = SUBSI (8, ANDDI (tmp_addr, 7)); -if (ANDQI (tmp_bytecount, 8)) { - { - UDI opval = GET_H_GR (FLD (f_dest)); - SETMEMUDI (current_cpu, pc, tmp_addr, opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "memory", 'D', opval); - } -} else { -if (GET_H_ENDIAN ()) { -{ - tmp_val = SRLDI (GET_H_GR (FLD (f_dest)), SUBSI (64, MULSI (8, tmp_bytecount))); -if (ANDQI (tmp_bytecount, 4)) { -{ - { - USI opval = ANDSI (tmp_val, 0xffffffff); - SETMEMUSI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 3), -4), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 32); -} -} -if (ANDQI (tmp_bytecount, 2)) { -{ - { - UHI opval = ANDHI (tmp_val, 65535); - SETMEMUHI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 1), -2), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 16); -} -} -if (ANDQI (tmp_bytecount, 1)) { -{ - { - UQI opval = ANDQI (tmp_val, 255); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 8); -} -} -} -} else { -{ - tmp_val = GET_H_GR (FLD (f_dest)); -if (ANDQI (tmp_bytecount, 1)) { -{ - { - UQI opval = ANDQI (tmp_val, 255); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 8); -} -} -if (ANDQI (tmp_bytecount, 2)) { -{ - { - UHI opval = ANDHI (tmp_val, 65535); - SETMEMUHI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 1), -2), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 16); -} -} -if (ANDQI (tmp_bytecount, 4)) { -{ - { - USI opval = ANDSI (tmp_val, 0xffffffff); - SETMEMUSI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 3), -4), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 32); -} -} -} -} -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STXB) : /* stx.b $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - UQI opval = SUBWORDDIQI (GET_H_GR (FLD (f_dest)), 7); - SETMEMUQI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STXL) : /* stx.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SUBWORDDISI (GET_H_GR (FLD (f_dest)), 1); - SETMEMSI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STXQ) : /* stx.q $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = GET_H_GR (FLD (f_dest)); - SETMEMDI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STXW) : /* stx.w $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - HI opval = SUBWORDDIHI (GET_H_GR (FLD (f_dest)), 3); - SETMEMHI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUB) : /* sub $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = SUBDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUBL) : /* sub.l $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (SUBSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SWAPQ) : /* swap.q $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_addr; - DI tmp_temp; - tmp_addr = ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))); - tmp_temp = GETMEMDI (current_cpu, pc, tmp_addr); - { - DI opval = GET_H_GR (FLD (f_dest)); - SETMEMDI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'D', opval); - } - { - DI opval = tmp_temp; - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SYNCI) : /* synci */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SYNCO) : /* synco */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_TRAPA) : /* trapa $rm */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_xori.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -sh64_trapa (current_cpu, GET_H_GR (FLD (f_left)), pc); - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_XOR) : /* xor $rm, $rn, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = XORDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_XORI) : /* xori $rm, $imm6, $rd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_xori.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = XORDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_imm6))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - - } - ENDSWITCH (sem) /* End of semantic switch. */ - - /* At this point `vpc' contains the next insn to execute. */ -} - -#undef DEFINE_SWITCH -#endif /* DEFINE_SWITCH */ diff --git a/sim/sh64/sem-media.c b/sim/sh64/sem-media.c deleted file mode 100644 index aee11ccf174..00000000000 --- a/sim/sh64/sem-media.c +++ /dev/null @@ -1,5965 +0,0 @@ -/* Simulator instruction semantics for sh64. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU sh64 -#define WANT_CPU_SH64 - -#include "sim-main.h" -#include "cgen-mem.h" -#include "cgen-ops.h" - -#undef GET_ATTR -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) -#else -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr) -#endif - -/* This is used so that we can compile two copies of the semantic code, - one with full feature support and one without that runs fast(er). - FAST_P, when desired, is defined on the command line, -DFAST_P=1. */ -#if FAST_P -#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn) -#undef TRACE_RESULT -#define TRACE_RESULT(cpu, abuf, name, type, val) -#else -#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn) -#endif - -/* x-invalid: --invalid-- */ - -static SEM_PC -SEM_FN_NAME (sh64_media,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { - /* Update the recorded pc in the cpu state struct. - Only necessary for WITH_SCACHE case, but to avoid the - conditional compilation .... */ - SET_H_PC (pc); - /* Virtual insns have zero size. Overwrite vpc with address of next insn - using the default-insn-bitsize spec. When executing insns in parallel - we may want to queue the fault and continue execution. */ - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); - } - - return vpc; -#undef FLD -} - -/* x-after: --after-- */ - -static SEM_PC -SEM_FN_NAME (sh64_media,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_SH64_MEDIA - sh64_media_pbb_after (current_cpu, sem_arg); -#endif - } - - return vpc; -#undef FLD -} - -/* x-before: --before-- */ - -static SEM_PC -SEM_FN_NAME (sh64_media,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_SH64_MEDIA - sh64_media_pbb_before (current_cpu, sem_arg); -#endif - } - - return vpc; -#undef FLD -} - -/* x-cti-chain: --cti-chain-- */ - -static SEM_PC -SEM_FN_NAME (sh64_media,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_SH64_MEDIA -#ifdef DEFINE_SWITCH - vpc = sh64_media_pbb_cti_chain (current_cpu, sem_arg, - pbb_br_type, pbb_br_npc); - BREAK (sem); -#else - /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ - vpc = sh64_media_pbb_cti_chain (current_cpu, sem_arg, - CPU_PBB_BR_TYPE (current_cpu), - CPU_PBB_BR_NPC (current_cpu)); -#endif -#endif - } - - return vpc; -#undef FLD -} - -/* x-chain: --chain-- */ - -static SEM_PC -SEM_FN_NAME (sh64_media,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_SH64_MEDIA - vpc = sh64_media_pbb_chain (current_cpu, sem_arg); -#ifdef DEFINE_SWITCH - BREAK (sem); -#endif -#endif - } - - return vpc; -#undef FLD -} - -/* x-begin: --begin-- */ - -static SEM_PC -SEM_FN_NAME (sh64_media,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_SH64_MEDIA -#if defined DEFINE_SWITCH || defined FAST_P - /* In the switch case FAST_P is a constant, allowing several optimizations - in any called inline functions. */ - vpc = sh64_media_pbb_begin (current_cpu, FAST_P); -#else -#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ - vpc = sh64_media_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); -#else - vpc = sh64_media_pbb_begin (current_cpu, 0); -#endif -#endif -#endif - } - - return vpc; -#undef FLD -} - -/* add: add $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* addl: add.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,addl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ADDSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), SUBWORDDISI (GET_H_GR (FLD (f_right)), 1)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* addi: addi $rm, $disp10, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* addil: addi.l $rm, $disp10, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,addil) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (ADDSI (EXTSISI (FLD (f_disp10)), SUBWORDDISI (GET_H_GR (FLD (f_left)), 1))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* addzl: addz.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,addzl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTSIDI (ADDSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* alloco: alloco $rm, $disp6x32 */ - -static SEM_PC -SEM_FN_NAME (sh64_media,alloco) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* and: and $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ANDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* andc: andc $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,andc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ANDDI (GET_H_GR (FLD (f_left)), INVDI (GET_H_GR (FLD (f_right)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* andi: andi $rm, $disp10, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,andi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ANDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* beq: beq$likely $rm, $rn, $tra */ - -static SEM_PC -SEM_FN_NAME (sh64_media,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))) { - { - UDI opval = CPU (h_tr[FLD (f_tra)]); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* beqi: beqi$likely $rm, $imm6, $tra */ - -static SEM_PC -SEM_FN_NAME (sh64_media,beqi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beqi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_imm6)))) { - { - UDI opval = CPU (h_tr[FLD (f_tra)]); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bge: bge$likely $rm, $rn, $tra */ - -static SEM_PC -SEM_FN_NAME (sh64_media,bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GEDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))) { - { - UDI opval = CPU (h_tr[FLD (f_tra)]); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bgeu: bgeu$likely $rm, $rn, $tra */ - -static SEM_PC -SEM_FN_NAME (sh64_media,bgeu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GEUDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))) { - { - UDI opval = CPU (h_tr[FLD (f_tra)]); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bgt: bgt$likely $rm, $rn, $tra */ - -static SEM_PC -SEM_FN_NAME (sh64_media,bgt) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GTDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))) { - { - UDI opval = CPU (h_tr[FLD (f_tra)]); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bgtu: bgtu$likely $rm, $rn, $tra */ - -static SEM_PC -SEM_FN_NAME (sh64_media,bgtu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GTUDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))) { - { - UDI opval = CPU (h_tr[FLD (f_tra)]); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* blink: blink $trb, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,blink) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_blink.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - { - DI opval = ORDI (ADDDI (pc, 4), 1); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - { - UDI opval = CPU (h_tr[FLD (f_trb)]); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bne: bne$likely $rm, $rn, $tra */ - -static SEM_PC -SEM_FN_NAME (sh64_media,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NEDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))) { - { - UDI opval = CPU (h_tr[FLD (f_tra)]); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bnei: bnei$likely $rm, $imm6, $tra */ - -static SEM_PC -SEM_FN_NAME (sh64_media,bnei) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beqi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NEDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_imm6)))) { - { - UDI opval = CPU (h_tr[FLD (f_tra)]); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* brk: brk */ - -static SEM_PC -SEM_FN_NAME (sh64_media,brk) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -sh64_break (current_cpu, pc); - - return vpc; -#undef FLD -} - -/* byterev: byterev $rm, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,byterev) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_xori.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_source; - DI tmp_result; - tmp_source = GET_H_GR (FLD (f_left)); - tmp_result = 0; -{ - tmp_result = ORDI (SLLDI (tmp_result, 8), ANDDI (tmp_source, 255)); - tmp_source = SRLDI (tmp_source, 8); -} -{ - tmp_result = ORDI (SLLDI (tmp_result, 8), ANDDI (tmp_source, 255)); - tmp_source = SRLDI (tmp_source, 8); -} -{ - tmp_result = ORDI (SLLDI (tmp_result, 8), ANDDI (tmp_source, 255)); - tmp_source = SRLDI (tmp_source, 8); -} -{ - tmp_result = ORDI (SLLDI (tmp_result, 8), ANDDI (tmp_source, 255)); - tmp_source = SRLDI (tmp_source, 8); -} -{ - tmp_result = ORDI (SLLDI (tmp_result, 8), ANDDI (tmp_source, 255)); - tmp_source = SRLDI (tmp_source, 8); -} -{ - tmp_result = ORDI (SLLDI (tmp_result, 8), ANDDI (tmp_source, 255)); - tmp_source = SRLDI (tmp_source, 8); -} -{ - tmp_result = ORDI (SLLDI (tmp_result, 8), ANDDI (tmp_source, 255)); - tmp_source = SRLDI (tmp_source, 8); -} -{ - tmp_result = ORDI (SLLDI (tmp_result, 8), ANDDI (tmp_source, 255)); - tmp_source = SRLDI (tmp_source, 8); -} - { - DI opval = tmp_result; - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* cmpeq: cmpeq $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,cmpeq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ((EQDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))) ? (1) : (0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* cmpgt: cmpgt $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,cmpgt) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ((GTDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))) ? (1) : (0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* cmpgtu: cmpgtu $rm,$rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,cmpgtu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ((GTUDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))) ? (1) : (0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* cmveq: cmveq $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,cmveq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQDI (GET_H_GR (FLD (f_left)), 0)) { - { - DI opval = GET_H_GR (FLD (f_right)); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* cmvne: cmvne $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,cmvne) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NEDI (GET_H_GR (FLD (f_left)), 0)) { - { - DI opval = GET_H_GR (FLD (f_right)); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* fabsd: fabs.d $drgh, $drf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fabsd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fabsd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_fabsd (current_cpu, GET_H_DR (FLD (f_left_right))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fabss: fabs.s $frgh, $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fabss) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fabsd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_fabss (current_cpu, CPU (h_fr[FLD (f_left_right)])); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* faddd: fadd.d $drg, $drh, $drf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,faddd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_faddd (current_cpu, GET_H_DR (FLD (f_left)), GET_H_DR (FLD (f_right))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fadds: fadd.s $frg, $frh, $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fadds) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_fadds (current_cpu, CPU (h_fr[FLD (f_left)]), CPU (h_fr[FLD (f_right)])); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fcmpeqd: fcmpeq.d $drg, $drh, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fcmpeqd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTBIDI (sh64_fcmpeqd (current_cpu, GET_H_DR (FLD (f_left)), GET_H_DR (FLD (f_right)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* fcmpeqs: fcmpeq.s $frg, $frh, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fcmpeqs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTBIDI (sh64_fcmpeqs (current_cpu, CPU (h_fr[FLD (f_left)]), CPU (h_fr[FLD (f_right)]))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* fcmpged: fcmpge.d $drg, $drh, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fcmpged) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTBIDI (sh64_fcmpged (current_cpu, GET_H_DR (FLD (f_left)), GET_H_DR (FLD (f_right)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* fcmpges: fcmpge.s $frg, $frh, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fcmpges) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTBIDI (sh64_fcmpges (current_cpu, CPU (h_fr[FLD (f_left)]), CPU (h_fr[FLD (f_right)]))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* fcmpgtd: fcmpgt.d $drg, $drh, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fcmpgtd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTBIDI (sh64_fcmpgtd (current_cpu, GET_H_DR (FLD (f_left)), GET_H_DR (FLD (f_right)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* fcmpgts: fcmpgt.s $frg, $frh, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fcmpgts) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTBIDI (sh64_fcmpgts (current_cpu, CPU (h_fr[FLD (f_left)]), CPU (h_fr[FLD (f_right)]))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* fcmpund: fcmpun.d $drg, $drh, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fcmpund) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTBIDI (sh64_fcmpund (current_cpu, GET_H_DR (FLD (f_left)), GET_H_DR (FLD (f_right)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* fcmpuns: fcmpun.s $frg, $frh, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fcmpuns) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTBIDI (sh64_fcmpuns (current_cpu, CPU (h_fr[FLD (f_left)]), CPU (h_fr[FLD (f_right)]))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* fcnvds: fcnv.ds $drgh, $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fcnvds) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fabsd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_fcnvds (current_cpu, GET_H_DR (FLD (f_left_right))); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fcnvsd: fcnv.sd $frgh, $drf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fcnvsd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fabsd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_fcnvsd (current_cpu, CPU (h_fr[FLD (f_left_right)])); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fdivd: fdiv.d $drg, $drh, $drf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fdivd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_fdivd (current_cpu, GET_H_DR (FLD (f_left)), GET_H_DR (FLD (f_right))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fdivs: fdiv.s $frg, $frh, $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fdivs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_fdivs (current_cpu, CPU (h_fr[FLD (f_left)]), CPU (h_fr[FLD (f_right)])); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fgetscr: fgetscr $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fgetscr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* fiprs: fipr.s $fvg, $fvh, $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fiprs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - UQI tmp_g; - UQI tmp_h; - SF tmp_temp; - tmp_g = FLD (f_left); - tmp_h = FLD (f_right); - tmp_temp = sh64_fmuls (current_cpu, CPU (h_fr[tmp_g]), CPU (h_fr[tmp_h])); - tmp_temp = sh64_fadds (current_cpu, tmp_temp, sh64_fmuls (current_cpu, CPU (h_fr[ADDQI (tmp_g, 1)]), CPU (h_fr[ADDQI (tmp_h, 1)]))); - tmp_temp = sh64_fadds (current_cpu, tmp_temp, sh64_fmuls (current_cpu, CPU (h_fr[ADDQI (tmp_g, 2)]), CPU (h_fr[ADDQI (tmp_h, 2)]))); - tmp_temp = sh64_fadds (current_cpu, tmp_temp, sh64_fmuls (current_cpu, CPU (h_fr[ADDQI (tmp_g, 3)]), CPU (h_fr[ADDQI (tmp_h, 3)]))); - { - SF opval = tmp_temp; - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } -} - - return vpc; -#undef FLD -} - -/* fldd: fld.d $rm, $disp10x8, $drf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fldd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fldd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = GETMEMDF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp10x8))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fldp: fld.p $rm, $disp10x8, $fpf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fldp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fldd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_f; - tmp_f = FLD (f_dest); - { - SF opval = GETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp10x8))); - CPU (h_fr[tmp_f]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - { - SF opval = GETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), ADDSI (FLD (f_disp10x8), 4))); - CPU (h_fr[ADDQI (tmp_f, 1)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } -} - - return vpc; -#undef FLD -} - -/* flds: fld.s $rm, $disp10x4, $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,flds) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_flds.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = GETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp10x4))); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fldxd: fldx.d $rm, $rn, $drf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fldxd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = GETMEMDF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fldxp: fldx.p $rm, $rn, $fpf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fldxp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_f; - tmp_f = FLD (f_dest); - { - SF opval = GETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))); - CPU (h_fr[tmp_f]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - { - SF opval = GETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), ADDDI (GET_H_GR (FLD (f_right)), 4))); - CPU (h_fr[ADDQI (tmp_f, 1)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } -} - - return vpc; -#undef FLD -} - -/* fldxs: fldx.s $rm, $rn, $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fldxs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = GETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* floatld: float.ld $frgh, $drf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,floatld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fabsd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_floatld (current_cpu, CPU (h_fr[FLD (f_left_right)])); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* floatls: float.ls $frgh, $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,floatls) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fabsd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_floatls (current_cpu, CPU (h_fr[FLD (f_left_right)])); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* floatqd: float.qd $drgh, $drf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,floatqd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fabsd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_floatqd (current_cpu, GET_H_DR (FLD (f_left_right))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* floatqs: float.qs $drgh, $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,floatqs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fabsd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_floatqs (current_cpu, GET_H_DR (FLD (f_left_right))); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fmacs: fmac.s $frg, $frh, $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fmacs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_fadds (current_cpu, CPU (h_fr[FLD (f_dest)]), sh64_fmuls (current_cpu, CPU (h_fr[FLD (f_left)]), CPU (h_fr[FLD (f_right)]))); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fmovd: fmov.d $drgh, $drf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fmovd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fabsd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = GET_H_DR (FLD (f_left_right)); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fmovdq: fmov.dq $drgh, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fmovdq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fabsd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = SUBWORDDFDI (GET_H_DR (FLD (f_left_right))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* fmovls: fmov.ls $rm, $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fmovls) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_xori.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = SUBWORDSISF (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fmovqd: fmov.qd $rm, $drf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fmovqd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_xori.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = SUBWORDDIDF (GET_H_GR (FLD (f_left))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fmovs: fmov.s $frgh, $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fmovs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fabsd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = CPU (h_fr[FLD (f_left_right)]); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fmovsl: fmov.sl $frgh, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fmovsl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fabsd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (SUBWORDSFSI (CPU (h_fr[FLD (f_left_right)]))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* fmuld: fmul.d $drg, $drh, $drf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fmuld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_fmuld (current_cpu, GET_H_DR (FLD (f_left)), GET_H_DR (FLD (f_right))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fmuls: fmul.s $frg, $frh, $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fmuls) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_fmuls (current_cpu, CPU (h_fr[FLD (f_left)]), CPU (h_fr[FLD (f_right)])); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fnegd: fneg.d $drgh, $drf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fnegd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fabsd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_fnegd (current_cpu, GET_H_DR (FLD (f_left_right))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fnegs: fneg.s $frgh, $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fnegs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fabsd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_fnegs (current_cpu, CPU (h_fr[FLD (f_left_right)])); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fputscr: fputscr $frgh */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fputscr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* fsqrtd: fsqrt.d $drgh, $drf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fsqrtd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fabsd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_fsqrtd (current_cpu, GET_H_DR (FLD (f_left_right))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fsqrts: fsqrt.s $frgh, $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fsqrts) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fabsd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_fsqrts (current_cpu, CPU (h_fr[FLD (f_left_right)])); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fstd: fst.d $rm, $disp10x8, $drf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fstd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fldd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = GET_H_DR (FLD (f_dest)); - SETMEMDF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp10x8)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fstp: fst.p $rm, $disp10x8, $fpf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fstp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fldd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_f; - tmp_f = FLD (f_dest); - { - SF opval = CPU (h_fr[tmp_f]); - SETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp10x8)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } - { - SF opval = CPU (h_fr[ADDQI (tmp_f, 1)]); - SETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), ADDSI (FLD (f_disp10x8), 4)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} - - return vpc; -#undef FLD -} - -/* fsts: fst.s $rm, $disp10x4, $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fsts) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_flds.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = CPU (h_fr[FLD (f_dest)]); - SETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp10x4)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fstxd: fstx.d $rm, $rn, $drf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fstxd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = GET_H_DR (FLD (f_dest)); - SETMEMDF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fstxp: fstx.p $rm, $rn, $fpf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fstxp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_f; - tmp_f = FLD (f_dest); - { - SF opval = CPU (h_fr[tmp_f]); - SETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } - { - SF opval = CPU (h_fr[ADDQI (tmp_f, 1)]); - SETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), ADDDI (GET_H_GR (FLD (f_right)), 4)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } -} - - return vpc; -#undef FLD -} - -/* fstxs: fstx.s $rm, $rn, $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fstxs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = CPU (h_fr[FLD (f_dest)]); - SETMEMSF (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fsubd: fsub.d $drg, $drh, $drf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fsubd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_fsubd (current_cpu, GET_H_DR (FLD (f_left)), GET_H_DR (FLD (f_right))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* fsubs: fsub.s $frg, $frh, $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,fsubs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_fsubs (current_cpu, CPU (h_fr[FLD (f_left)]), CPU (h_fr[FLD (f_right)])); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* ftrcdl: ftrc.dl $drgh, $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ftrcdl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fabsd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_ftrcdl (current_cpu, GET_H_DR (FLD (f_left_right))); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* ftrcsl: ftrc.sl $frgh, $frf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ftrcsl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fabsd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SF opval = sh64_ftrcsl (current_cpu, CPU (h_fr[FLD (f_left_right)])); - CPU (h_fr[FLD (f_dest)]) = opval; - TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* ftrcdq: ftrc.dq $drgh, $drf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ftrcdq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fabsd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_ftrcdq (current_cpu, GET_H_DR (FLD (f_left_right))); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* ftrcsq: ftrc.sq $frgh, $drf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ftrcsq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fabsd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DF opval = sh64_ftrcsq (current_cpu, CPU (h_fr[FLD (f_left_right)])); - SET_H_DR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'f', opval); - } - - return vpc; -#undef FLD -} - -/* ftrvs: ftrv.s $mtrxg, $fvh, $fvf */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ftrvs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -sh64_ftrvs (current_cpu, FLD (f_left), FLD (f_right), FLD (f_dest)); - - return vpc; -#undef FLD -} - -/* getcfg: getcfg $rm, $disp6, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,getcfg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* getcon: getcon $crk, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,getcon) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_xori.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = GET_H_CR (FLD (f_left)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* gettr: gettr $trb, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,gettr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_blink.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = CPU (h_tr[FLD (f_trb)]); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* icbi: icbi $rm, $disp6x32 */ - -static SEM_PC -SEM_FN_NAME (sh64_media,icbi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* ldb: ld.b $rm, $disp10, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTQIDI (GETMEMQI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* ldl: ld.l $rm, $disp10x4, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ldl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_flds.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (GETMEMSI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10x4))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* ldq: ld.q $rm, $disp10x8, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ldq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fldd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = GETMEMDI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10x8)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* ldub: ld.ub $rm, $disp10, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTQIDI (GETMEMQI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* lduw: ld.uw $rm, $disp10x2, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,lduw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_lduw.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTHIDI (GETMEMHI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10x2))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* ldw: ld.w $rm, $disp10x2, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ldw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_lduw.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTHIDI (GETMEMHI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10x2))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* ldhil: ldhi.l $rm, $disp6, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ldhil) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldhil.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_addr; - QI tmp_bytecount; - SI tmp_val; - tmp_addr = ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp6)); - tmp_bytecount = ADDDI (ANDDI (tmp_addr, 3), 1); - tmp_val = 0; -if (ANDQI (tmp_bytecount, 4)) { - { - DI opval = EXTSIDI (GETMEMSI (current_cpu, pc, ANDDI (tmp_addr, -4))); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} else { -if (GET_H_ENDIAN ()) { -{ -if (ANDQI (tmp_bytecount, 2)) { - tmp_val = ADDSI (SLLSI (tmp_val, 16), ZEXTHIDI (GETMEMHI (current_cpu, pc, ANDDI (tmp_addr, -4)))); -} -if (ANDQI (tmp_bytecount, 1)) { - tmp_val = ADDSI (SLLSI (tmp_val, 8), ZEXTQIDI (GETMEMQI (current_cpu, pc, tmp_addr))); -} - { - DI opval = EXTSIDI (tmp_val); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} -} else { -{ -if (ANDQI (tmp_bytecount, 1)) { - tmp_val = ADDSI (SLLSI (tmp_val, 8), ZEXTQIDI (GETMEMQI (current_cpu, pc, tmp_addr))); -} -if (ANDQI (tmp_bytecount, 2)) { - tmp_val = ADDSI (SLLSI (tmp_val, 16), ZEXTHIDI (GETMEMHI (current_cpu, pc, ANDDI (tmp_addr, -4)))); -} - { - DI opval = EXTSIDI (SLLSI (tmp_val, SUBSI (32, MULSI (8, tmp_bytecount)))); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} -} -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* ldhiq: ldhi.q $rm, $disp6, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ldhiq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldhil.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_addr; - QI tmp_bytecount; - DI tmp_val; - tmp_addr = ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp6)); - tmp_bytecount = ADDDI (ANDDI (tmp_addr, 7), 1); - tmp_val = 0; -if (ANDQI (tmp_bytecount, 8)) { - { - DI opval = GETMEMDI (current_cpu, pc, ANDDI (tmp_addr, -8)); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} else { -if (GET_H_ENDIAN ()) { -{ -if (ANDQI (tmp_bytecount, 4)) { - tmp_val = ADDDI (SLLDI (tmp_val, 32), ZEXTSIDI (GETMEMSI (current_cpu, pc, ANDDI (tmp_addr, -8)))); -} -if (ANDQI (tmp_bytecount, 2)) { - tmp_val = ADDDI (SLLDI (tmp_val, 16), ZEXTHIDI (GETMEMHI (current_cpu, pc, ANDDI (tmp_addr, -4)))); -} -if (ANDQI (tmp_bytecount, 1)) { - tmp_val = ADDDI (SLLDI (tmp_val, 8), ZEXTQIDI (GETMEMQI (current_cpu, pc, tmp_addr))); -} - { - DI opval = tmp_val; - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} -} else { -{ -if (ANDQI (tmp_bytecount, 1)) { - tmp_val = ADDDI (SLLDI (tmp_val, 8), ZEXTQIDI (GETMEMQI (current_cpu, pc, tmp_addr))); -} -if (ANDQI (tmp_bytecount, 2)) { - tmp_val = ADDDI (SLLDI (tmp_val, 16), ZEXTHIDI (GETMEMHI (current_cpu, pc, ANDDI (tmp_addr, -4)))); -} -if (ANDQI (tmp_bytecount, 4)) { - tmp_val = ADDDI (SLLDI (tmp_val, 32), ZEXTSIDI (GETMEMSI (current_cpu, pc, ANDDI (tmp_addr, -8)))); -} - { - DI opval = SLLDI (tmp_val, SUBSI (64, MULSI (8, tmp_bytecount))); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} -} -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* ldlol: ldlo.l $rm, $disp6, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ldlol) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldhil.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_addr; - QI tmp_bytecount; - SI tmp_val; - tmp_addr = ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp6)); - tmp_bytecount = SUBSI (4, ANDDI (tmp_addr, 3)); - tmp_val = 0; -if (ANDQI (tmp_bytecount, 4)) { - { - DI opval = EXTSIDI (GETMEMSI (current_cpu, pc, tmp_addr)); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} else { -if (GET_H_ENDIAN ()) { -{ -if (ANDQI (tmp_bytecount, 1)) { - tmp_val = ADDSI (SLLSI (tmp_val, 8), ZEXTQIDI (GETMEMQI (current_cpu, pc, tmp_addr))); -} -if (ANDQI (tmp_bytecount, 2)) { - tmp_val = ADDSI (SLLSI (tmp_val, 16), ZEXTHIDI (GETMEMHI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 1), -2)))); -} - { - DI opval = EXTSIDI (SLLSI (tmp_val, SUBSI (32, MULSI (8, tmp_bytecount)))); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} -} else { -{ -if (ANDQI (tmp_bytecount, 2)) { - tmp_val = ADDSI (SLLSI (tmp_val, 16), ZEXTHIDI (GETMEMHI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 1), -2)))); -} -if (ANDQI (tmp_bytecount, 1)) { - tmp_val = ADDSI (SLLSI (tmp_val, 8), ZEXTQIDI (GETMEMQI (current_cpu, pc, tmp_addr))); -} - { - DI opval = EXTSIDI (tmp_val); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} -} -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* ldloq: ldlo.q $rm, $disp6, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ldloq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldhil.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_addr; - QI tmp_bytecount; - DI tmp_val; - tmp_addr = ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp6)); - tmp_bytecount = SUBSI (8, ANDDI (tmp_addr, 7)); - tmp_val = 0; -if (ANDQI (tmp_bytecount, 8)) { - { - DI opval = GETMEMDI (current_cpu, pc, tmp_addr); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} else { -if (GET_H_ENDIAN ()) { -{ -if (ANDQI (tmp_bytecount, 1)) { - tmp_val = ADDDI (SLLDI (tmp_val, 8), ZEXTQIDI (GETMEMQI (current_cpu, pc, tmp_addr))); -} -if (ANDQI (tmp_bytecount, 2)) { - tmp_val = ADDDI (SLLDI (tmp_val, 16), ZEXTHIDI (GETMEMHI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 1), -2)))); -} -if (ANDQI (tmp_bytecount, 4)) { - tmp_val = ADDDI (SLLDI (tmp_val, 32), ZEXTSIDI (GETMEMSI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 3), -4)))); -} - { - DI opval = SLLDI (tmp_val, SUBSI (64, MULSI (8, tmp_bytecount))); - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} -} else { -{ -if (ANDQI (tmp_bytecount, 4)) { - tmp_val = ADDDI (SLLDI (tmp_val, 32), ZEXTSIDI (GETMEMSI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 3), -4)))); -} -if (ANDQI (tmp_bytecount, 2)) { - tmp_val = ADDDI (SLLDI (tmp_val, 16), ZEXTHIDI (GETMEMHI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 1), -2)))); -} -if (ANDQI (tmp_bytecount, 1)) { - tmp_val = ADDDI (SLLDI (tmp_val, 8), ZEXTQIDI (GETMEMQI (current_cpu, pc, tmp_addr))); -} - { - DI opval = tmp_val; - SET_H_GR (FLD (f_dest), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} -} -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* ldxb: ldx.b $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ldxb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTQIDI (GETMEMQI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* ldxl: ldx.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ldxl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (GETMEMSI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* ldxq: ldx.q $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ldxq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = GETMEMDI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* ldxub: ldx.ub $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ldxub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTQIDI (GETMEMUQI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* ldxuw: ldx.uw $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ldxuw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ZEXTHIDI (GETMEMUHI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* ldxw: ldx.w $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ldxw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTHIDI (GETMEMHI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* mabsl: mabs.l $rm, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mabsl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_xori.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = ABSSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)); - tmp_result1 = ABSSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0)); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mabsw: mabs.w $rm, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mabsw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_xori.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = ABSHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)); - tmp_result1 = ABSHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)); - tmp_result2 = ABSHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1)); - tmp_result3 = ABSHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0)); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* maddl: madd.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,maddl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = ADDSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), SUBWORDDISI (GET_H_GR (FLD (f_right)), 1)); - tmp_result1 = ADDSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), SUBWORDDISI (GET_H_GR (FLD (f_right)), 0)); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* maddw: madd.w $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,maddw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = ADDHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3)); - tmp_result1 = ADDHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2)); - tmp_result2 = ADDHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1)); - tmp_result3 = ADDHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0)); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* maddsl: madds.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,maddsl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = ((LTDI (ADDDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (ADDDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))), SLLDI (1, SUBSI (32, 1)))) ? (ADDDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1)))) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - tmp_result1 = ((LTDI (ADDDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 0))), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (ADDDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 0))), SLLDI (1, SUBSI (32, 1)))) ? (ADDDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 0)))) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* maddsub: madds.ub $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,maddsub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_result7; - QI tmp_result6; - QI tmp_result5; - QI tmp_result4; - QI tmp_result3; - QI tmp_result2; - QI tmp_result1; - QI tmp_result0; - tmp_result0 = ((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7))), MAKEDI (0, 0))) ? (0) : (((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7))), SLLDI (1, 8))) ? (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result1 = ((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6))), MAKEDI (0, 0))) ? (0) : (((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6))), SLLDI (1, 8))) ? (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result2 = ((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5))), MAKEDI (0, 0))) ? (0) : (((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5))), SLLDI (1, 8))) ? (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result3 = ((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4))), MAKEDI (0, 0))) ? (0) : (((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4))), SLLDI (1, 8))) ? (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result4 = ((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3))), MAKEDI (0, 0))) ? (0) : (((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3))), SLLDI (1, 8))) ? (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result5 = ((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2))), MAKEDI (0, 0))) ? (0) : (((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2))), SLLDI (1, 8))) ? (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result6 = ((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1))), MAKEDI (0, 0))) ? (0) : (((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1))), SLLDI (1, 8))) ? (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result7 = ((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0))), MAKEDI (0, 0))) ? (0) : (((LTDI (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0))), SLLDI (1, 8))) ? (ADDDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0)))) : (SUBQI (SLLQI (1, 8), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTQIDI (tmp_result7), 56), ORDI (SLLDI (ZEXTQIDI (tmp_result6), 48), ORDI (SLLDI (ZEXTQIDI (tmp_result5), 40), ORDI (SLLDI (ZEXTQIDI (tmp_result4), 32), ORDI (SLLDI (ZEXTQIDI (tmp_result3), 24), ORDI (SLLDI (ZEXTQIDI (tmp_result2), 16), ORDI (SLLDI (ZEXTQIDI (tmp_result1), 8), ZEXTQIDI (tmp_result0)))))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* maddsw: madds.w $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,maddsw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = ((LTDI (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3))), SLLDI (1, SUBSI (16, 1)))) ? (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result1 = ((LTDI (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2))), SLLDI (1, SUBSI (16, 1)))) ? (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result2 = ((LTDI (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1))), SLLDI (1, SUBSI (16, 1)))) ? (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result3 = ((LTDI (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0))), SLLDI (1, SUBSI (16, 1)))) ? (ADDDI (EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0)), EXTHIDI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mcmpeqb: mcmpeq.b $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mcmpeqb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_result7; - QI tmp_result6; - QI tmp_result5; - QI tmp_result4; - QI tmp_result3; - QI tmp_result2; - QI tmp_result1; - QI tmp_result0; - tmp_result0 = ((EQQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7))) ? (INVQI (0)) : (0)); - tmp_result1 = ((EQQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6))) ? (INVQI (0)) : (0)); - tmp_result2 = ((EQQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5))) ? (INVQI (0)) : (0)); - tmp_result3 = ((EQQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4))) ? (INVQI (0)) : (0)); - tmp_result4 = ((EQQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3))) ? (INVQI (0)) : (0)); - tmp_result5 = ((EQQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2))) ? (INVQI (0)) : (0)); - tmp_result6 = ((EQQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1))) ? (INVQI (0)) : (0)); - tmp_result7 = ((EQQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0))) ? (INVQI (0)) : (0)); - { - DI opval = ORDI (SLLDI (ZEXTQIDI (tmp_result7), 56), ORDI (SLLDI (ZEXTQIDI (tmp_result6), 48), ORDI (SLLDI (ZEXTQIDI (tmp_result5), 40), ORDI (SLLDI (ZEXTQIDI (tmp_result4), 32), ORDI (SLLDI (ZEXTQIDI (tmp_result3), 24), ORDI (SLLDI (ZEXTQIDI (tmp_result2), 16), ORDI (SLLDI (ZEXTQIDI (tmp_result1), 8), ZEXTQIDI (tmp_result0)))))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mcmpeql: mcmpeq.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mcmpeql) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = ((EQSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))) ? (INVSI (0)) : (0)); - tmp_result1 = ((EQSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), SUBWORDDISI (GET_H_GR (FLD (f_right)), 0))) ? (INVSI (0)) : (0)); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mcmpeqw: mcmpeq.w $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mcmpeqw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = ((EQHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3))) ? (INVHI (0)) : (0)); - tmp_result1 = ((EQHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2))) ? (INVHI (0)) : (0)); - tmp_result2 = ((EQHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1))) ? (INVHI (0)) : (0)); - tmp_result3 = ((EQHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0))) ? (INVHI (0)) : (0)); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mcmpgtl: mcmpgt.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mcmpgtl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = ((GTSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))) ? (INVSI (0)) : (0)); - tmp_result1 = ((GTSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), SUBWORDDISI (GET_H_GR (FLD (f_right)), 0))) ? (INVSI (0)) : (0)); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mcmpgtub: mcmpgt.ub $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mcmpgtub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_result7; - QI tmp_result6; - QI tmp_result5; - QI tmp_result4; - QI tmp_result3; - QI tmp_result2; - QI tmp_result1; - QI tmp_result0; - tmp_result0 = ((GTUQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7))) ? (INVQI (0)) : (0)); - tmp_result1 = ((GTUQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6))) ? (INVQI (0)) : (0)); - tmp_result2 = ((GTUQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5))) ? (INVQI (0)) : (0)); - tmp_result3 = ((GTUQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4))) ? (INVQI (0)) : (0)); - tmp_result4 = ((GTUQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3))) ? (INVQI (0)) : (0)); - tmp_result5 = ((GTUQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2))) ? (INVQI (0)) : (0)); - tmp_result6 = ((GTUQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1))) ? (INVQI (0)) : (0)); - tmp_result7 = ((GTUQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0))) ? (INVQI (0)) : (0)); - { - DI opval = ORDI (SLLDI (ZEXTQIDI (tmp_result7), 56), ORDI (SLLDI (ZEXTQIDI (tmp_result6), 48), ORDI (SLLDI (ZEXTQIDI (tmp_result5), 40), ORDI (SLLDI (ZEXTQIDI (tmp_result4), 32), ORDI (SLLDI (ZEXTQIDI (tmp_result3), 24), ORDI (SLLDI (ZEXTQIDI (tmp_result2), 16), ORDI (SLLDI (ZEXTQIDI (tmp_result1), 8), ZEXTQIDI (tmp_result0)))))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mcmpgtw: mcmpgt.w $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mcmpgtw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = ((GTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3))) ? (INVHI (0)) : (0)); - tmp_result1 = ((GTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2))) ? (INVHI (0)) : (0)); - tmp_result2 = ((GTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1))) ? (INVHI (0)) : (0)); - tmp_result3 = ((GTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0))) ? (INVHI (0)) : (0)); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mcmv: mcmv $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mcmv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ORDI (ANDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))), ANDDI (GET_H_GR (FLD (f_dest)), INVDI (GET_H_GR (FLD (f_right))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* mcnvslw: mcnvs.lw $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mcnvslw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = ((LTSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), SLLDI (1, SUBSI (16, 1)))) ? (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result1 = ((LTSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), SLLDI (1, SUBSI (16, 1)))) ? (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result2 = ((LTSI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1), SLLDI (1, SUBSI (16, 1)))) ? (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result3 = ((LTSI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 0), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 0), SLLDI (1, SUBSI (16, 1)))) ? (SUBWORDDISI (GET_H_GR (FLD (f_right)), 0)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mcnvswb: mcnvs.wb $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mcnvswb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_result7; - QI tmp_result6; - QI tmp_result5; - QI tmp_result4; - QI tmp_result3; - QI tmp_result2; - QI tmp_result1; - QI tmp_result0; - tmp_result0 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), NEGDI (SLLDI (1, SUBSI (8, 1))))) ? (NEGQI (SLLQI (1, SUBSI (8, 1)))) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), SLLDI (1, SUBSI (8, 1)))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)) : (SUBQI (SLLQI (1, SUBSI (8, 1)), 1))))); - tmp_result1 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), NEGDI (SLLDI (1, SUBSI (8, 1))))) ? (NEGQI (SLLQI (1, SUBSI (8, 1)))) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), SLLDI (1, SUBSI (8, 1)))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)) : (SUBQI (SLLQI (1, SUBSI (8, 1)), 1))))); - tmp_result2 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), NEGDI (SLLDI (1, SUBSI (8, 1))))) ? (NEGQI (SLLQI (1, SUBSI (8, 1)))) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), SLLDI (1, SUBSI (8, 1)))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1)) : (SUBQI (SLLQI (1, SUBSI (8, 1)), 1))))); - tmp_result3 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), NEGDI (SLLDI (1, SUBSI (8, 1))))) ? (NEGQI (SLLQI (1, SUBSI (8, 1)))) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), SLLDI (1, SUBSI (8, 1)))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0)) : (SUBQI (SLLQI (1, SUBSI (8, 1)), 1))))); - tmp_result4 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3), NEGDI (SLLDI (1, SUBSI (8, 1))))) ? (NEGQI (SLLQI (1, SUBSI (8, 1)))) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3), SLLDI (1, SUBSI (8, 1)))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3)) : (SUBQI (SLLQI (1, SUBSI (8, 1)), 1))))); - tmp_result5 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2), NEGDI (SLLDI (1, SUBSI (8, 1))))) ? (NEGQI (SLLQI (1, SUBSI (8, 1)))) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2), SLLDI (1, SUBSI (8, 1)))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2)) : (SUBQI (SLLQI (1, SUBSI (8, 1)), 1))))); - tmp_result6 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1), NEGDI (SLLDI (1, SUBSI (8, 1))))) ? (NEGQI (SLLQI (1, SUBSI (8, 1)))) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1), SLLDI (1, SUBSI (8, 1)))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1)) : (SUBQI (SLLQI (1, SUBSI (8, 1)), 1))))); - tmp_result7 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0), NEGDI (SLLDI (1, SUBSI (8, 1))))) ? (NEGQI (SLLQI (1, SUBSI (8, 1)))) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0), SLLDI (1, SUBSI (8, 1)))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0)) : (SUBQI (SLLQI (1, SUBSI (8, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTQIDI (tmp_result7), 56), ORDI (SLLDI (ZEXTQIDI (tmp_result6), 48), ORDI (SLLDI (ZEXTQIDI (tmp_result5), 40), ORDI (SLLDI (ZEXTQIDI (tmp_result4), 32), ORDI (SLLDI (ZEXTQIDI (tmp_result3), 24), ORDI (SLLDI (ZEXTQIDI (tmp_result2), 16), ORDI (SLLDI (ZEXTQIDI (tmp_result1), 8), ZEXTQIDI (tmp_result0)))))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mcnvswub: mcnvs.wub $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mcnvswub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_result7; - QI tmp_result6; - QI tmp_result5; - QI tmp_result4; - QI tmp_result3; - QI tmp_result2; - QI tmp_result1; - QI tmp_result0; - tmp_result0 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), MAKEDI (0, 0))) ? (0) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), SLLDI (1, 8))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result1 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), MAKEDI (0, 0))) ? (0) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), SLLDI (1, 8))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result2 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), MAKEDI (0, 0))) ? (0) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), SLLDI (1, 8))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1)) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result3 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), MAKEDI (0, 0))) ? (0) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), SLLDI (1, 8))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0)) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result4 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3), MAKEDI (0, 0))) ? (0) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3), SLLDI (1, 8))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3)) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result5 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2), MAKEDI (0, 0))) ? (0) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2), SLLDI (1, 8))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2)) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result6 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1), MAKEDI (0, 0))) ? (0) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1), SLLDI (1, 8))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1)) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result7 = ((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0), MAKEDI (0, 0))) ? (0) : (((LTHI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0), SLLDI (1, 8))) ? (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0)) : (SUBQI (SLLQI (1, 8), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTQIDI (tmp_result7), 56), ORDI (SLLDI (ZEXTQIDI (tmp_result6), 48), ORDI (SLLDI (ZEXTQIDI (tmp_result5), 40), ORDI (SLLDI (ZEXTQIDI (tmp_result4), 32), ORDI (SLLDI (ZEXTQIDI (tmp_result3), 24), ORDI (SLLDI (ZEXTQIDI (tmp_result2), 16), ORDI (SLLDI (ZEXTQIDI (tmp_result1), 8), ZEXTQIDI (tmp_result0)))))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mextr1: mextr1 $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mextr1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_count; - DI tmp_mask; - DI tmp_rhs; - tmp_count = MULQI (8, 1); - tmp_mask = SLLDI (INVSI (0), tmp_count); - tmp_rhs = SRLDI (ANDDI (GET_H_GR (FLD (f_left)), tmp_mask), tmp_count); - tmp_count = MULQI (8, SUBQI (8, 1)); - tmp_mask = SRLDI (INVSI (0), tmp_count); - { - DI opval = ORDI (tmp_rhs, SLLDI (ANDDI (GET_H_GR (FLD (f_right)), tmp_mask), tmp_count)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mextr2: mextr2 $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mextr2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_count; - DI tmp_mask; - DI tmp_rhs; - tmp_count = MULQI (8, 2); - tmp_mask = SLLDI (INVSI (0), tmp_count); - tmp_rhs = SRLDI (ANDDI (GET_H_GR (FLD (f_left)), tmp_mask), tmp_count); - tmp_count = MULQI (8, SUBQI (8, 2)); - tmp_mask = SRLDI (INVSI (0), tmp_count); - { - DI opval = ORDI (tmp_rhs, SLLDI (ANDDI (GET_H_GR (FLD (f_right)), tmp_mask), tmp_count)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mextr3: mextr3 $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mextr3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_count; - DI tmp_mask; - DI tmp_rhs; - tmp_count = MULQI (8, 3); - tmp_mask = SLLDI (INVSI (0), tmp_count); - tmp_rhs = SRLDI (ANDDI (GET_H_GR (FLD (f_left)), tmp_mask), tmp_count); - tmp_count = MULQI (8, SUBQI (8, 3)); - tmp_mask = SRLDI (INVSI (0), tmp_count); - { - DI opval = ORDI (tmp_rhs, SLLDI (ANDDI (GET_H_GR (FLD (f_right)), tmp_mask), tmp_count)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mextr4: mextr4 $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mextr4) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_count; - DI tmp_mask; - DI tmp_rhs; - tmp_count = MULQI (8, 4); - tmp_mask = SLLDI (INVSI (0), tmp_count); - tmp_rhs = SRLDI (ANDDI (GET_H_GR (FLD (f_left)), tmp_mask), tmp_count); - tmp_count = MULQI (8, SUBQI (8, 4)); - tmp_mask = SRLDI (INVSI (0), tmp_count); - { - DI opval = ORDI (tmp_rhs, SLLDI (ANDDI (GET_H_GR (FLD (f_right)), tmp_mask), tmp_count)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mextr5: mextr5 $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mextr5) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_count; - DI tmp_mask; - DI tmp_rhs; - tmp_count = MULQI (8, 5); - tmp_mask = SLLDI (INVSI (0), tmp_count); - tmp_rhs = SRLDI (ANDDI (GET_H_GR (FLD (f_left)), tmp_mask), tmp_count); - tmp_count = MULQI (8, SUBQI (8, 5)); - tmp_mask = SRLDI (INVSI (0), tmp_count); - { - DI opval = ORDI (tmp_rhs, SLLDI (ANDDI (GET_H_GR (FLD (f_right)), tmp_mask), tmp_count)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mextr6: mextr6 $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mextr6) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_count; - DI tmp_mask; - DI tmp_rhs; - tmp_count = MULQI (8, 6); - tmp_mask = SLLDI (INVSI (0), tmp_count); - tmp_rhs = SRLDI (ANDDI (GET_H_GR (FLD (f_left)), tmp_mask), tmp_count); - tmp_count = MULQI (8, SUBQI (8, 6)); - tmp_mask = SRLDI (INVSI (0), tmp_count); - { - DI opval = ORDI (tmp_rhs, SLLDI (ANDDI (GET_H_GR (FLD (f_right)), tmp_mask), tmp_count)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mextr7: mextr7 $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mextr7) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_count; - DI tmp_mask; - DI tmp_rhs; - tmp_count = MULQI (8, 7); - tmp_mask = SLLDI (INVSI (0), tmp_count); - tmp_rhs = SRLDI (ANDDI (GET_H_GR (FLD (f_left)), tmp_mask), tmp_count); - tmp_count = MULQI (8, SUBQI (8, 7)); - tmp_mask = SRLDI (INVSI (0), tmp_count); - { - DI opval = ORDI (tmp_rhs, SLLDI (ANDDI (GET_H_GR (FLD (f_right)), tmp_mask), tmp_count)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mmacfxwl: mmacfx.wl $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mmacfxwl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_result1; - SI tmp_result0; - tmp_result0 = SUBWORDDISI (GET_H_GR (FLD (f_dest)), 1); - tmp_result1 = SUBWORDDISI (GET_H_GR (FLD (f_dest)), 0); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3))); - tmp_temp = ((LTDI (SLLDI (tmp_temp, 1), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SLLDI (tmp_temp, 1), SLLDI (1, SUBSI (32, 1)))) ? (SLLDI (tmp_temp, 1)) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - tmp_result0 = ((LTDI (ADDDI (EXTSIDI (tmp_result0), EXTSIDI (tmp_temp)), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (ADDDI (EXTSIDI (tmp_result0), EXTSIDI (tmp_temp)), SLLDI (1, SUBSI (32, 1)))) ? (ADDDI (EXTSIDI (tmp_result0), EXTSIDI (tmp_temp))) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2))); - tmp_temp = ((LTDI (SLLDI (tmp_temp, 1), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SLLDI (tmp_temp, 1), SLLDI (1, SUBSI (32, 1)))) ? (SLLDI (tmp_temp, 1)) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - tmp_result1 = ((LTDI (ADDDI (EXTSIDI (tmp_result1), EXTSIDI (tmp_temp)), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (ADDDI (EXTSIDI (tmp_result1), EXTSIDI (tmp_temp)), SLLDI (1, SUBSI (32, 1)))) ? (ADDDI (EXTSIDI (tmp_result1), EXTSIDI (tmp_temp))) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mmacnfx.wl: mmacnfx.wl $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mmacnfx_wl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_result1; - SI tmp_result0; - tmp_result0 = SUBWORDDISI (GET_H_GR (FLD (f_dest)), 1); - tmp_result1 = SUBWORDDISI (GET_H_GR (FLD (f_dest)), 0); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3))); - tmp_temp = ((LTDI (SLLDI (tmp_temp, 1), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SLLDI (tmp_temp, 1), SLLDI (1, SUBSI (32, 1)))) ? (SLLDI (tmp_temp, 1)) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - tmp_result0 = ((LTDI (SUBDI (EXTSIDI (tmp_result0), EXTSIDI (tmp_temp)), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SUBDI (EXTSIDI (tmp_result0), EXTSIDI (tmp_temp)), SLLDI (1, SUBSI (32, 1)))) ? (SUBDI (EXTSIDI (tmp_result0), EXTSIDI (tmp_temp))) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2))); - tmp_temp = ((LTDI (SLLDI (tmp_temp, 1), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SLLDI (tmp_temp, 1), SLLDI (1, SUBSI (32, 1)))) ? (SLLDI (tmp_temp, 1)) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - tmp_result1 = ((LTDI (SUBDI (EXTSIDI (tmp_result1), EXTSIDI (tmp_temp)), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SUBDI (EXTSIDI (tmp_result1), EXTSIDI (tmp_temp)), SLLDI (1, SUBSI (32, 1)))) ? (SUBDI (EXTSIDI (tmp_result1), EXTSIDI (tmp_temp))) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mmull: mmul.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mmull) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = MULSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), SUBWORDDISI (GET_H_GR (FLD (f_right)), 1)); - tmp_result1 = MULSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), SUBWORDDISI (GET_H_GR (FLD (f_right)), 0)); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mmulw: mmul.w $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mmulw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = MULHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3)); - tmp_result1 = MULHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2)); - tmp_result2 = MULHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1)); - tmp_result3 = MULHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0)); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mmulfxl: mmulfx.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mmulfxl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_temp; - SI tmp_result0; - SI tmp_result1; - tmp_temp = MULDI (ZEXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)), ZEXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))); - tmp_result0 = ((LTDI (SRADI (tmp_temp, 31), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SRADI (tmp_temp, 31), SLLDI (1, SUBSI (32, 1)))) ? (SRADI (tmp_temp, 31)) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - tmp_temp = MULDI (ZEXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0)), ZEXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 0))); - tmp_result1 = ((LTDI (SRADI (tmp_temp, 31), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SRADI (tmp_temp, 31), SLLDI (1, SUBSI (32, 1)))) ? (SRADI (tmp_temp, 31)) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mmulfxw: mmulfx.w $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mmulfxw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - HI tmp_result0; - HI tmp_result1; - HI tmp_result2; - HI tmp_result3; - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3))); - tmp_result0 = ((LTSI (SRASI (tmp_temp, 15), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SRASI (tmp_temp, 15), SLLDI (1, SUBSI (16, 1)))) ? (SRASI (tmp_temp, 15)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2))); - tmp_result1 = ((LTSI (SRASI (tmp_temp, 15), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SRASI (tmp_temp, 15), SLLDI (1, SUBSI (16, 1)))) ? (SRASI (tmp_temp, 15)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1))); - tmp_result2 = ((LTSI (SRASI (tmp_temp, 15), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SRASI (tmp_temp, 15), SLLDI (1, SUBSI (16, 1)))) ? (SRASI (tmp_temp, 15)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0))); - tmp_result3 = ((LTSI (SRASI (tmp_temp, 15), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SRASI (tmp_temp, 15), SLLDI (1, SUBSI (16, 1)))) ? (SRASI (tmp_temp, 15)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mmulfxrpw: mmulfxrp.w $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mmulfxrpw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - HI tmp_result0; - HI tmp_result1; - HI tmp_result2; - HI tmp_result3; - HI tmp_c; - tmp_c = SLLSI (1, 14); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3))); - tmp_result0 = ((LTSI (SRASI (ADDSI (tmp_temp, tmp_c), 15), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SRASI (ADDSI (tmp_temp, tmp_c), 15), SLLDI (1, SUBSI (16, 1)))) ? (SRASI (ADDSI (tmp_temp, tmp_c), 15)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2))); - tmp_result1 = ((LTSI (SRASI (ADDSI (tmp_temp, tmp_c), 15), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SRASI (ADDSI (tmp_temp, tmp_c), 15), SLLDI (1, SUBSI (16, 1)))) ? (SRASI (ADDSI (tmp_temp, tmp_c), 15)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1))); - tmp_result2 = ((LTSI (SRASI (ADDSI (tmp_temp, tmp_c), 15), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SRASI (ADDSI (tmp_temp, tmp_c), 15), SLLDI (1, SUBSI (16, 1)))) ? (SRASI (ADDSI (tmp_temp, tmp_c), 15)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_temp = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0))); - tmp_result3 = ((LTSI (SRASI (ADDSI (tmp_temp, tmp_c), 15), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTSI (SRASI (ADDSI (tmp_temp, tmp_c), 15), SLLDI (1, SUBSI (16, 1)))) ? (SRASI (ADDSI (tmp_temp, tmp_c), 15)) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mmulhiwl: mmulhi.wl $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mmulhiwl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1))); - tmp_result1 = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0))); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mmullowl: mmullo.wl $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mmullowl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3))); - tmp_result1 = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2))); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mmulsumwq: mmulsum.wq $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mmulsumwq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_acc; - tmp_acc = MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0))); - tmp_acc = ADDDI (tmp_acc, MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1)))); - tmp_acc = ADDDI (tmp_acc, MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2)))); - tmp_acc = ADDDI (tmp_acc, MULSI (ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3)), ZEXTHISI (SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3)))); - { - DI opval = ADDDI (GET_H_GR (FLD (f_dest)), tmp_acc); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* movi: movi $imm16, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,movi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (FLD (f_imm16)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* mpermw: mperm.w $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mpermw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_control; - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_control = ANDQI (GET_H_GR (FLD (f_right)), 255); - tmp_result0 = SUBWORDDIHI (GET_H_GR (FLD (f_left)), SUBSI (3, ANDQI (tmp_control, 3))); - tmp_result1 = SUBWORDDIHI (GET_H_GR (FLD (f_left)), SUBSI (3, ANDQI (SRLQI (tmp_control, 2), 3))); - tmp_result2 = SUBWORDDIHI (GET_H_GR (FLD (f_left)), SUBSI (3, ANDQI (SRLQI (tmp_control, 4), 3))); - tmp_result3 = SUBWORDDIHI (GET_H_GR (FLD (f_left)), SUBSI (3, ANDQI (SRLQI (tmp_control, 6), 3))); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* msadubq: msad.ubq $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,msadubq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_acc; - tmp_acc = ABSDI (SUBQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0))); - tmp_acc = ADDDI (tmp_acc, ABSQI (SUBQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1)))); - tmp_acc = ADDDI (tmp_acc, ABSQI (SUBQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2)))); - tmp_acc = ADDDI (tmp_acc, ABSQI (SUBQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3)))); - tmp_acc = ADDDI (tmp_acc, ABSQI (SUBQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4)))); - tmp_acc = ADDDI (tmp_acc, ABSQI (SUBQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5)))); - tmp_acc = ADDDI (tmp_acc, ABSQI (SUBQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6)))); - tmp_acc = ADDDI (tmp_acc, ABSQI (SUBQI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7), SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7)))); - { - DI opval = ADDDI (GET_H_GR (FLD (f_dest)), tmp_acc); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mshaldsl: mshalds.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mshaldsl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = ((LTDI (SLLDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 31)), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SLLDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 31)), SLLDI (1, SUBSI (32, 1)))) ? (SLLDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 31))) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - tmp_result1 = ((LTDI (SLLDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 31)), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SLLDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 31)), SLLDI (1, SUBSI (32, 1)))) ? (SLLDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 31))) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mshaldsw: mshalds.w $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mshaldsw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = ((LTDI (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), ANDDI (GET_H_GR (FLD (f_right)), 15)), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), ANDDI (GET_H_GR (FLD (f_right)), 15)), SLLDI (1, SUBSI (16, 1)))) ? (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), ANDDI (GET_H_GR (FLD (f_right)), 15))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result1 = ((LTDI (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), ANDDI (GET_H_GR (FLD (f_right)), 15)), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), ANDDI (GET_H_GR (FLD (f_right)), 15)), SLLDI (1, SUBSI (16, 1)))) ? (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), ANDDI (GET_H_GR (FLD (f_right)), 15))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result2 = ((LTDI (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 15)), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 15)), SLLDI (1, SUBSI (16, 1)))) ? (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 15))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result3 = ((LTDI (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 15)), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 15)), SLLDI (1, SUBSI (16, 1)))) ? (SLLDI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 15))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mshardl: mshard.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mshardl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = SRASI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 31)); - tmp_result1 = SRASI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 31)); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mshardw: mshard.w $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mshardw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = SRAHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), ANDDI (GET_H_GR (FLD (f_right)), 15)); - tmp_result1 = SRAHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), ANDDI (GET_H_GR (FLD (f_right)), 15)); - tmp_result2 = SRAHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 15)); - tmp_result3 = SRAHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 15)); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mshardsq: mshards.q $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mshardsq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ((LTDI (SRADI (GET_H_GR (FLD (f_left)), ANDDI (GET_H_GR (FLD (f_right)), 63)), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGDI (SLLDI (1, SUBSI (16, 1)))) : (((LTDI (SRADI (GET_H_GR (FLD (f_left)), ANDDI (GET_H_GR (FLD (f_right)), 63)), SLLDI (1, SUBSI (16, 1)))) ? (SRADI (GET_H_GR (FLD (f_left)), ANDDI (GET_H_GR (FLD (f_right)), 63))) : (SUBDI (SLLDI (1, SUBSI (16, 1)), 1))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* mshfhib: mshfhi.b $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mshfhib) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_result7; - QI tmp_result6; - QI tmp_result5; - QI tmp_result4; - QI tmp_result3; - QI tmp_result2; - QI tmp_result1; - QI tmp_result0; - tmp_result0 = SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3); - tmp_result1 = SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3); - tmp_result2 = SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2); - tmp_result3 = SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2); - tmp_result4 = SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1); - tmp_result5 = SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1); - tmp_result6 = SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0); - tmp_result7 = SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0); - { - DI opval = ORDI (SLLDI (ZEXTQIDI (tmp_result7), 56), ORDI (SLLDI (ZEXTQIDI (tmp_result6), 48), ORDI (SLLDI (ZEXTQIDI (tmp_result5), 40), ORDI (SLLDI (ZEXTQIDI (tmp_result4), 32), ORDI (SLLDI (ZEXTQIDI (tmp_result3), 24), ORDI (SLLDI (ZEXTQIDI (tmp_result2), 16), ORDI (SLLDI (ZEXTQIDI (tmp_result1), 8), ZEXTQIDI (tmp_result0)))))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mshfhil: mshfhi.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mshfhil) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = SUBWORDDISI (GET_H_GR (FLD (f_left)), 0); - tmp_result1 = SUBWORDDISI (GET_H_GR (FLD (f_right)), 0); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mshfhiw: mshfhi.w $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mshfhiw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1); - tmp_result1 = SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1); - tmp_result2 = SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0); - tmp_result3 = SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mshflob: mshflo.b $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mshflob) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_result7; - QI tmp_result6; - QI tmp_result5; - QI tmp_result4; - QI tmp_result3; - QI tmp_result2; - QI tmp_result1; - QI tmp_result0; - tmp_result0 = SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7); - tmp_result1 = SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7); - tmp_result2 = SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6); - tmp_result3 = SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6); - tmp_result4 = SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5); - tmp_result5 = SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5); - tmp_result6 = SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4); - tmp_result7 = SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4); - { - DI opval = ORDI (SLLDI (ZEXTQIDI (tmp_result7), 56), ORDI (SLLDI (ZEXTQIDI (tmp_result6), 48), ORDI (SLLDI (ZEXTQIDI (tmp_result5), 40), ORDI (SLLDI (ZEXTQIDI (tmp_result4), 32), ORDI (SLLDI (ZEXTQIDI (tmp_result3), 24), ORDI (SLLDI (ZEXTQIDI (tmp_result2), 16), ORDI (SLLDI (ZEXTQIDI (tmp_result1), 8), ZEXTQIDI (tmp_result0)))))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mshflol: mshflo.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mshflol) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = SUBWORDDISI (GET_H_GR (FLD (f_left)), 1); - tmp_result1 = SUBWORDDISI (GET_H_GR (FLD (f_right)), 1); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mshflow: mshflo.w $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mshflow) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3); - tmp_result1 = SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3); - tmp_result2 = SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2); - tmp_result3 = SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mshlldl: mshlld.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mshlldl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = SLLSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 31)); - tmp_result1 = SLLSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 31)); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mshlldw: mshlld.w $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mshlldw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = SLLHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), ANDDI (GET_H_GR (FLD (f_right)), 15)); - tmp_result1 = SLLHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), ANDDI (GET_H_GR (FLD (f_right)), 15)); - tmp_result2 = SLLHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 15)); - tmp_result3 = SLLHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 15)); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mshlrdl: mshlrd.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mshlrdl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = SRLSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 31)); - tmp_result1 = SRLSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 31)); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mshlrdw: mshlrd.w $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mshlrdw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = SRLHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), ANDDI (GET_H_GR (FLD (f_right)), 15)); - tmp_result1 = SRLHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), ANDDI (GET_H_GR (FLD (f_right)), 15)); - tmp_result2 = SRLHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 15)); - tmp_result3 = SRLHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), ANDDI (GET_H_GR (FLD (f_right)), 15)); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* msubl: msub.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,msubl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = SUBSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), SUBWORDDISI (GET_H_GR (FLD (f_right)), 1)); - tmp_result1 = SUBSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0), SUBWORDDISI (GET_H_GR (FLD (f_right)), 0)); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* msubw: msub.w $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,msubw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - HI tmp_result3; - HI tmp_result2; - HI tmp_result1; - HI tmp_result0; - tmp_result0 = SUBHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 3), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 3)); - tmp_result1 = SUBHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 2), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 2)); - tmp_result2 = SUBHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 1), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 1)); - tmp_result3 = SUBHI (SUBWORDDIHI (GET_H_GR (FLD (f_left)), 0), SUBWORDDIHI (GET_H_GR (FLD (f_right)), 0)); - { - DI opval = ORDI (SLLDI (ZEXTHIDI (tmp_result3), 48), ORDI (SLLDI (ZEXTHIDI (tmp_result2), 32), ORDI (SLLDI (ZEXTHIDI (tmp_result1), 16), ZEXTHIDI (tmp_result0)))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* msubsl: msubs.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,msubsl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_result1; - SI tmp_result0; - tmp_result0 = ((LTDI (SUBDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SUBDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))), SLLDI (1, SUBSI (32, 1)))) ? (SUBDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1)))) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - tmp_result1 = ((LTDI (SUBDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 0))), NEGDI (SLLDI (1, SUBSI (32, 1))))) ? (NEGSI (SLLSI (1, SUBSI (32, 1)))) : (((LTDI (SUBDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 0))), SLLDI (1, SUBSI (32, 1)))) ? (SUBDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 0)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 0)))) : (SUBSI (SLLSI (1, SUBSI (32, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTSIDI (tmp_result1), 32), ZEXTSIDI (tmp_result0)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* msubsub: msubs.ub $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,msubsub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_result7; - QI tmp_result6; - QI tmp_result5; - QI tmp_result4; - QI tmp_result3; - QI tmp_result2; - QI tmp_result1; - QI tmp_result0; - tmp_result0 = ((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7))), MAKEDI (0, 0))) ? (0) : (((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7))), SLLDI (1, 8))) ? (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result1 = ((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6))), MAKEDI (0, 0))) ? (0) : (((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6))), SLLDI (1, 8))) ? (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result2 = ((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5))), MAKEDI (0, 0))) ? (0) : (((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5))), SLLDI (1, 8))) ? (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result3 = ((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4))), MAKEDI (0, 0))) ? (0) : (((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4))), SLLDI (1, 8))) ? (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result4 = ((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3))), MAKEDI (0, 0))) ? (0) : (((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3))), SLLDI (1, 8))) ? (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result5 = ((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2))), MAKEDI (0, 0))) ? (0) : (((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2))), SLLDI (1, 8))) ? (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result6 = ((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1))), MAKEDI (0, 0))) ? (0) : (((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1))), SLLDI (1, 8))) ? (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1)))) : (SUBQI (SLLQI (1, 8), 1))))); - tmp_result7 = ((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0))), MAKEDI (0, 0))) ? (0) : (((LTDI (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0))), SLLDI (1, 8))) ? (SUBDI (ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0)), ZEXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0)))) : (SUBQI (SLLQI (1, 8), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTQIDI (tmp_result7), 56), ORDI (SLLDI (ZEXTQIDI (tmp_result6), 48), ORDI (SLLDI (ZEXTQIDI (tmp_result5), 40), ORDI (SLLDI (ZEXTQIDI (tmp_result4), 32), ORDI (SLLDI (ZEXTQIDI (tmp_result3), 24), ORDI (SLLDI (ZEXTQIDI (tmp_result2), 16), ORDI (SLLDI (ZEXTQIDI (tmp_result1), 8), ZEXTQIDI (tmp_result0)))))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* msubsw: msubs.w $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,msubsw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - QI tmp_result7; - QI tmp_result6; - QI tmp_result5; - QI tmp_result4; - QI tmp_result3; - QI tmp_result2; - QI tmp_result1; - QI tmp_result0; - tmp_result0 = ((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7))), SLLDI (1, SUBSI (16, 1)))) ? (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 7)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 7)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result1 = ((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6))), SLLDI (1, SUBSI (16, 1)))) ? (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 6)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 6)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result2 = ((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5))), SLLDI (1, SUBSI (16, 1)))) ? (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 5)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 5)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result3 = ((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4))), SLLDI (1, SUBSI (16, 1)))) ? (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 4)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 4)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result4 = ((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3))), SLLDI (1, SUBSI (16, 1)))) ? (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 3)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 3)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result5 = ((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2))), SLLDI (1, SUBSI (16, 1)))) ? (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 2)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 2)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result6 = ((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1))), SLLDI (1, SUBSI (16, 1)))) ? (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 1)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 1)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - tmp_result7 = ((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0))), NEGDI (SLLDI (1, SUBSI (16, 1))))) ? (NEGHI (SLLHI (1, SUBSI (16, 1)))) : (((LTDI (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0))), SLLDI (1, SUBSI (16, 1)))) ? (SUBDI (EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_left)), 0)), EXTQIDI (SUBWORDDIQI (GET_H_GR (FLD (f_right)), 0)))) : (SUBHI (SLLHI (1, SUBSI (16, 1)), 1))))); - { - DI opval = ORDI (SLLDI (ZEXTQIDI (tmp_result7), 56), ORDI (SLLDI (ZEXTQIDI (tmp_result6), 48), ORDI (SLLDI (ZEXTQIDI (tmp_result5), 40), ORDI (SLLDI (ZEXTQIDI (tmp_result4), 32), ORDI (SLLDI (ZEXTQIDI (tmp_result3), 24), ORDI (SLLDI (ZEXTQIDI (tmp_result2), 16), ORDI (SLLDI (ZEXTQIDI (tmp_result1), 8), ZEXTQIDI (tmp_result0)))))))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* mulsl: muls.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mulsl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = MULDI (EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)), EXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* mulul: mulu.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,mulul) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = MULDI (ZEXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1)), ZEXTSIDI (SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* nop: nop */ - -static SEM_PC -SEM_FN_NAME (sh64_media,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* nsb: nsb $rm, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,nsb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_xori.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = sh64_nsb (current_cpu, GET_H_GR (FLD (f_left))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* ocbi: ocbi $rm, $disp6x32 */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ocbi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* ocbp: ocbp $rm, $disp6x32 */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ocbp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* ocbwb: ocbwb $rm, $disp6x32 */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ocbwb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* or: or $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ORDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* ori: ori $rm, $imm10, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ori) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ori.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ORDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_imm10))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* prefi: prefi $rm, $disp6x32 */ - -static SEM_PC -SEM_FN_NAME (sh64_media,prefi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* pta: pta$likely $disp16, $tra */ - -static SEM_PC -SEM_FN_NAME (sh64_media,pta) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_pta.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ADDSI (FLD (f_disp16), 1); - CPU (h_tr[FLD (f_tra)]) = opval; - TRACE_RESULT (current_cpu, abuf, "tr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* ptabs: ptabs$likely $rn, $tra */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ptabs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = GET_H_GR (FLD (f_right)); - CPU (h_tr[FLD (f_tra)]) = opval; - TRACE_RESULT (current_cpu, abuf, "tr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* ptb: ptb$likely $disp16, $tra */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ptb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_pta.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = FLD (f_disp16); - CPU (h_tr[FLD (f_tra)]) = opval; - TRACE_RESULT (current_cpu, abuf, "tr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* ptrel: ptrel$likely $rn, $tra */ - -static SEM_PC -SEM_FN_NAME (sh64_media,ptrel) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ADDDI (pc, GET_H_GR (FLD (f_right))); - CPU (h_tr[FLD (f_tra)]) = opval; - TRACE_RESULT (current_cpu, abuf, "tr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* putcfg: putcfg $rm, $disp6, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,putcfg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* putcon: putcon $rm, $crj */ - -static SEM_PC -SEM_FN_NAME (sh64_media,putcon) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_xori.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = GET_H_GR (FLD (f_left)); - SET_H_CR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "cr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* rte: rte */ - -static SEM_PC -SEM_FN_NAME (sh64_media,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* shard: shard $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,shard) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = SRADI (GET_H_GR (FLD (f_left)), ANDDI (GET_H_GR (FLD (f_right)), 63)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* shardl: shard.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,shardl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (SRASI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 63))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* shari: shari $rm, $uimm6, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,shari) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_shari.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = SRADI (GET_H_GR (FLD (f_left)), FLD (f_uimm6)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* sharil: shari.l $rm, $uimm6, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,sharil) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_shari.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (SRASI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDSI (FLD (f_uimm6), 63))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* shlld: shlld $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,shlld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = SLLDI (GET_H_GR (FLD (f_left)), ANDDI (GET_H_GR (FLD (f_right)), 63)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* shlldl: shlld.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,shlldl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (SLLSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 63))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* shlli: shlli $rm, $uimm6, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,shlli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_shari.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = SLLDI (GET_H_GR (FLD (f_left)), FLD (f_uimm6)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* shllil: shlli.l $rm, $uimm6, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,shllil) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_shari.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (SLLSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDSI (FLD (f_uimm6), 63))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* shlrd: shlrd $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,shlrd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = SRLDI (GET_H_GR (FLD (f_left)), ANDDI (GET_H_GR (FLD (f_right)), 63)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* shlrdl: shlrd.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,shlrdl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (SRLSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDDI (GET_H_GR (FLD (f_right)), 63))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* shlri: shlri $rm, $uimm6, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,shlri) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_shari.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = SRLDI (GET_H_GR (FLD (f_left)), FLD (f_uimm6)); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* shlril: shlri.l $rm, $uimm6, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,shlril) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_shari.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (SRLSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), ANDSI (FLD (f_uimm6), 63))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* shori: shori $uimm16, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,shori) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_shori.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = ORDI (SLLDI (GET_H_GR (FLD (f_dest)), 16), ZEXTSIDI (FLD (f_uimm16))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* sleep: sleep */ - -static SEM_PC -SEM_FN_NAME (sh64_media,sleep) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* stb: st.b $rm, $disp10, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - UQI opval = ANDQI (GET_H_GR (FLD (f_dest)), 255); - SETMEMUQI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stl: st.l $rm, $disp10x4, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,stl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_flds.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (GET_H_GR (FLD (f_dest)), 0xffffffff); - SETMEMSI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10x4))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stq: st.q $rm, $disp10x8, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,stq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_fldd.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = GET_H_GR (FLD (f_dest)); - SETMEMDI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10x8))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* stw: st.w $rm, $disp10x2, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,stw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_lduw.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - HI opval = ANDHI (GET_H_GR (FLD (f_dest)), 65535); - SETMEMHI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_disp10x2))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* sthil: sthi.l $rm, $disp6, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,sthil) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldhil.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_addr; - QI tmp_bytecount; - DI tmp_val; - tmp_addr = ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp6)); - tmp_bytecount = ADDDI (ANDDI (tmp_addr, 3), 1); -if (ANDQI (tmp_bytecount, 4)) { - { - SI opval = GET_H_GR (FLD (f_dest)); - SETMEMSI (current_cpu, pc, ANDDI (tmp_addr, -4), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} else { -if (GET_H_ENDIAN ()) { -{ - tmp_val = GET_H_GR (FLD (f_dest)); -if (ANDQI (tmp_bytecount, 1)) { -{ - { - UQI opval = ANDQI (tmp_val, 255); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 8); -} -} -if (ANDQI (tmp_bytecount, 2)) { -{ - { - HI opval = ANDHI (tmp_val, 65535); - SETMEMHI (current_cpu, pc, ANDDI (tmp_addr, -4), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 16); -} -} -} -} else { -{ - tmp_val = SRLDI (GET_H_GR (FLD (f_dest)), SUBSI (32, MULSI (8, tmp_bytecount))); -if (ANDQI (tmp_bytecount, 2)) { -{ - { - HI opval = ANDHI (tmp_val, 65535); - SETMEMHI (current_cpu, pc, ANDDI (tmp_addr, -4), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 16); -} -} -if (ANDQI (tmp_bytecount, 1)) { -{ - { - UQI opval = ANDQI (tmp_val, 255); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 8); -} -} -} -} -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* sthiq: sthi.q $rm, $disp6, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,sthiq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldhil.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_addr; - QI tmp_bytecount; - DI tmp_val; - tmp_addr = ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp6)); - tmp_bytecount = ADDDI (ANDDI (tmp_addr, 7), 1); -if (ANDQI (tmp_bytecount, 8)) { - { - DI opval = GET_H_GR (FLD (f_dest)); - SETMEMDI (current_cpu, pc, ANDDI (tmp_addr, -8), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "memory", 'D', opval); - } -} else { -if (GET_H_ENDIAN ()) { -{ - tmp_val = GET_H_GR (FLD (f_dest)); -if (ANDQI (tmp_bytecount, 1)) { -{ - { - UQI opval = ANDQI (tmp_val, 255); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 8); -} -} -if (ANDQI (tmp_bytecount, 2)) { -{ - { - HI opval = ANDHI (tmp_val, 65535); - SETMEMHI (current_cpu, pc, ANDDI (tmp_addr, -4), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 16); -} -} -if (ANDQI (tmp_bytecount, 4)) { -{ - { - SI opval = ANDSI (tmp_val, 0xffffffff); - SETMEMSI (current_cpu, pc, ANDDI (tmp_addr, -8), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 32); -} -} -} -} else { -{ - tmp_val = SRLDI (GET_H_GR (FLD (f_dest)), SUBSI (64, MULSI (8, tmp_bytecount))); -if (ANDQI (tmp_bytecount, 4)) { -{ - { - SI opval = ANDSI (tmp_val, 0xffffffff); - SETMEMSI (current_cpu, pc, ANDDI (tmp_addr, -8), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 32); -} -} -if (ANDQI (tmp_bytecount, 2)) { -{ - { - HI opval = ANDHI (tmp_val, 65535); - SETMEMHI (current_cpu, pc, ANDDI (tmp_addr, -4), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 16); -} -} -if (ANDQI (tmp_bytecount, 1)) { -{ - { - UQI opval = ANDQI (tmp_val, 255); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 8); -} -} -} -} -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* stlol: stlo.l $rm, $disp6, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,stlol) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldhil.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_addr; - QI tmp_bytecount; - DI tmp_val; - tmp_addr = ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp6)); - tmp_bytecount = SUBSI (4, ANDDI (tmp_addr, 3)); -if (ANDQI (tmp_bytecount, 4)) { - { - USI opval = GET_H_GR (FLD (f_dest)); - SETMEMUSI (current_cpu, pc, tmp_addr, opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} else { -if (GET_H_ENDIAN ()) { -{ - tmp_val = SRLDI (GET_H_GR (FLD (f_dest)), SUBSI (32, MULSI (8, tmp_bytecount))); -if (ANDQI (tmp_bytecount, 2)) { -{ - { - UHI opval = ANDHI (tmp_val, 65535); - SETMEMUHI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 1), -2), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 16); -} -} -if (ANDQI (tmp_bytecount, 1)) { -{ - { - UQI opval = ANDQI (tmp_val, 255); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 8); -} -} -} -} else { -{ - tmp_val = GET_H_GR (FLD (f_dest)); -if (ANDQI (tmp_bytecount, 1)) { -{ - { - UQI opval = ANDQI (tmp_val, 255); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 8); -} -} -if (ANDQI (tmp_bytecount, 2)) { -{ - { - UHI opval = ANDHI (tmp_val, 65535); - SETMEMUHI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 1), -2), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 16); -} -} -} -} -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* stloq: stlo.q $rm, $disp6, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,stloq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldhil.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_addr; - QI tmp_bytecount; - DI tmp_val; - tmp_addr = ADDDI (GET_H_GR (FLD (f_left)), FLD (f_disp6)); - tmp_bytecount = SUBSI (8, ANDDI (tmp_addr, 7)); -if (ANDQI (tmp_bytecount, 8)) { - { - UDI opval = GET_H_GR (FLD (f_dest)); - SETMEMUDI (current_cpu, pc, tmp_addr, opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "memory", 'D', opval); - } -} else { -if (GET_H_ENDIAN ()) { -{ - tmp_val = SRLDI (GET_H_GR (FLD (f_dest)), SUBSI (64, MULSI (8, tmp_bytecount))); -if (ANDQI (tmp_bytecount, 4)) { -{ - { - USI opval = ANDSI (tmp_val, 0xffffffff); - SETMEMUSI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 3), -4), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 32); -} -} -if (ANDQI (tmp_bytecount, 2)) { -{ - { - UHI opval = ANDHI (tmp_val, 65535); - SETMEMUHI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 1), -2), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 16); -} -} -if (ANDQI (tmp_bytecount, 1)) { -{ - { - UQI opval = ANDQI (tmp_val, 255); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 8); -} -} -} -} else { -{ - tmp_val = GET_H_GR (FLD (f_dest)); -if (ANDQI (tmp_bytecount, 1)) { -{ - { - UQI opval = ANDQI (tmp_val, 255); - SETMEMUQI (current_cpu, pc, tmp_addr, opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 8); -} -} -if (ANDQI (tmp_bytecount, 2)) { -{ - { - UHI opval = ANDHI (tmp_val, 65535); - SETMEMUHI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 1), -2), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 16); -} -} -if (ANDQI (tmp_bytecount, 4)) { -{ - { - USI opval = ANDSI (tmp_val, 0xffffffff); - SETMEMUSI (current_cpu, pc, ANDDI (ADDDI (tmp_addr, 3), -4), opval); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - tmp_val = SRLDI (tmp_val, 32); -} -} -} -} -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* stxb: stx.b $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,stxb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - UQI opval = SUBWORDDIQI (GET_H_GR (FLD (f_dest)), 7); - SETMEMUQI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stxl: stx.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,stxl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SUBWORDDISI (GET_H_GR (FLD (f_dest)), 1); - SETMEMSI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stxq: stx.q $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,stxq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = GET_H_GR (FLD (f_dest)); - SETMEMDI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* stxw: stx.w $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,stxw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - HI opval = SUBWORDDIHI (GET_H_GR (FLD (f_dest)), 3); - SETMEMHI (current_cpu, pc, ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* sub: sub $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = SUBDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* subl: sub.l $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,subl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = EXTSIDI (SUBSI (SUBWORDDISI (GET_H_GR (FLD (f_left)), 1), SUBWORDDISI (GET_H_GR (FLD (f_right)), 1))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* swapq: swap.q $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,swapq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_addr; - DI tmp_temp; - tmp_addr = ADDDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))); - tmp_temp = GETMEMDI (current_cpu, pc, tmp_addr); - { - DI opval = GET_H_GR (FLD (f_dest)); - SETMEMDI (current_cpu, pc, tmp_addr, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'D', opval); - } - { - DI opval = tmp_temp; - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* synci: synci */ - -static SEM_PC -SEM_FN_NAME (sh64_media,synci) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* synco: synco */ - -static SEM_PC -SEM_FN_NAME (sh64_media,synco) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* trapa: trapa $rm */ - -static SEM_PC -SEM_FN_NAME (sh64_media,trapa) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_xori.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -sh64_trapa (current_cpu, GET_H_GR (FLD (f_left)), pc); - - return vpc; -#undef FLD -} - -/* xor: xor $rm, $rn, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = XORDI (GET_H_GR (FLD (f_left)), GET_H_GR (FLD (f_right))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* xori: xori $rm, $imm6, $rd */ - -static SEM_PC -SEM_FN_NAME (sh64_media,xori) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_xori.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - DI opval = XORDI (GET_H_GR (FLD (f_left)), EXTSIDI (FLD (f_imm6))); - SET_H_GR (FLD (f_dest), opval); - TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* Table of all semantic fns. */ - -static const struct sem_fn_desc sem_fns[] = { - { SH64_MEDIA_INSN_X_INVALID, SEM_FN_NAME (sh64_media,x_invalid) }, - { SH64_MEDIA_INSN_X_AFTER, SEM_FN_NAME (sh64_media,x_after) }, - { SH64_MEDIA_INSN_X_BEFORE, SEM_FN_NAME (sh64_media,x_before) }, - { SH64_MEDIA_INSN_X_CTI_CHAIN, SEM_FN_NAME (sh64_media,x_cti_chain) }, - { SH64_MEDIA_INSN_X_CHAIN, SEM_FN_NAME (sh64_media,x_chain) }, - { SH64_MEDIA_INSN_X_BEGIN, SEM_FN_NAME (sh64_media,x_begin) }, - { SH64_MEDIA_INSN_ADD, SEM_FN_NAME (sh64_media,add) }, - { SH64_MEDIA_INSN_ADDL, SEM_FN_NAME (sh64_media,addl) }, - { SH64_MEDIA_INSN_ADDI, SEM_FN_NAME (sh64_media,addi) }, - { SH64_MEDIA_INSN_ADDIL, SEM_FN_NAME (sh64_media,addil) }, - { SH64_MEDIA_INSN_ADDZL, SEM_FN_NAME (sh64_media,addzl) }, - { SH64_MEDIA_INSN_ALLOCO, SEM_FN_NAME (sh64_media,alloco) }, - { SH64_MEDIA_INSN_AND, SEM_FN_NAME (sh64_media,and) }, - { SH64_MEDIA_INSN_ANDC, SEM_FN_NAME (sh64_media,andc) }, - { SH64_MEDIA_INSN_ANDI, SEM_FN_NAME (sh64_media,andi) }, - { SH64_MEDIA_INSN_BEQ, SEM_FN_NAME (sh64_media,beq) }, - { SH64_MEDIA_INSN_BEQI, SEM_FN_NAME (sh64_media,beqi) }, - { SH64_MEDIA_INSN_BGE, SEM_FN_NAME (sh64_media,bge) }, - { SH64_MEDIA_INSN_BGEU, SEM_FN_NAME (sh64_media,bgeu) }, - { SH64_MEDIA_INSN_BGT, SEM_FN_NAME (sh64_media,bgt) }, - { SH64_MEDIA_INSN_BGTU, SEM_FN_NAME (sh64_media,bgtu) }, - { SH64_MEDIA_INSN_BLINK, SEM_FN_NAME (sh64_media,blink) }, - { SH64_MEDIA_INSN_BNE, SEM_FN_NAME (sh64_media,bne) }, - { SH64_MEDIA_INSN_BNEI, SEM_FN_NAME (sh64_media,bnei) }, - { SH64_MEDIA_INSN_BRK, SEM_FN_NAME (sh64_media,brk) }, - { SH64_MEDIA_INSN_BYTEREV, SEM_FN_NAME (sh64_media,byterev) }, - { SH64_MEDIA_INSN_CMPEQ, SEM_FN_NAME (sh64_media,cmpeq) }, - { SH64_MEDIA_INSN_CMPGT, SEM_FN_NAME (sh64_media,cmpgt) }, - { SH64_MEDIA_INSN_CMPGTU, SEM_FN_NAME (sh64_media,cmpgtu) }, - { SH64_MEDIA_INSN_CMVEQ, SEM_FN_NAME (sh64_media,cmveq) }, - { SH64_MEDIA_INSN_CMVNE, SEM_FN_NAME (sh64_media,cmvne) }, - { SH64_MEDIA_INSN_FABSD, SEM_FN_NAME (sh64_media,fabsd) }, - { SH64_MEDIA_INSN_FABSS, SEM_FN_NAME (sh64_media,fabss) }, - { SH64_MEDIA_INSN_FADDD, SEM_FN_NAME (sh64_media,faddd) }, - { SH64_MEDIA_INSN_FADDS, SEM_FN_NAME (sh64_media,fadds) }, - { SH64_MEDIA_INSN_FCMPEQD, SEM_FN_NAME (sh64_media,fcmpeqd) }, - { SH64_MEDIA_INSN_FCMPEQS, SEM_FN_NAME (sh64_media,fcmpeqs) }, - { SH64_MEDIA_INSN_FCMPGED, SEM_FN_NAME (sh64_media,fcmpged) }, - { SH64_MEDIA_INSN_FCMPGES, SEM_FN_NAME (sh64_media,fcmpges) }, - { SH64_MEDIA_INSN_FCMPGTD, SEM_FN_NAME (sh64_media,fcmpgtd) }, - { SH64_MEDIA_INSN_FCMPGTS, SEM_FN_NAME (sh64_media,fcmpgts) }, - { SH64_MEDIA_INSN_FCMPUND, SEM_FN_NAME (sh64_media,fcmpund) }, - { SH64_MEDIA_INSN_FCMPUNS, SEM_FN_NAME (sh64_media,fcmpuns) }, - { SH64_MEDIA_INSN_FCNVDS, SEM_FN_NAME (sh64_media,fcnvds) }, - { SH64_MEDIA_INSN_FCNVSD, SEM_FN_NAME (sh64_media,fcnvsd) }, - { SH64_MEDIA_INSN_FDIVD, SEM_FN_NAME (sh64_media,fdivd) }, - { SH64_MEDIA_INSN_FDIVS, SEM_FN_NAME (sh64_media,fdivs) }, - { SH64_MEDIA_INSN_FGETSCR, SEM_FN_NAME (sh64_media,fgetscr) }, - { SH64_MEDIA_INSN_FIPRS, SEM_FN_NAME (sh64_media,fiprs) }, - { SH64_MEDIA_INSN_FLDD, SEM_FN_NAME (sh64_media,fldd) }, - { SH64_MEDIA_INSN_FLDP, SEM_FN_NAME (sh64_media,fldp) }, - { SH64_MEDIA_INSN_FLDS, SEM_FN_NAME (sh64_media,flds) }, - { SH64_MEDIA_INSN_FLDXD, SEM_FN_NAME (sh64_media,fldxd) }, - { SH64_MEDIA_INSN_FLDXP, SEM_FN_NAME (sh64_media,fldxp) }, - { SH64_MEDIA_INSN_FLDXS, SEM_FN_NAME (sh64_media,fldxs) }, - { SH64_MEDIA_INSN_FLOATLD, SEM_FN_NAME (sh64_media,floatld) }, - { SH64_MEDIA_INSN_FLOATLS, SEM_FN_NAME (sh64_media,floatls) }, - { SH64_MEDIA_INSN_FLOATQD, SEM_FN_NAME (sh64_media,floatqd) }, - { SH64_MEDIA_INSN_FLOATQS, SEM_FN_NAME (sh64_media,floatqs) }, - { SH64_MEDIA_INSN_FMACS, SEM_FN_NAME (sh64_media,fmacs) }, - { SH64_MEDIA_INSN_FMOVD, SEM_FN_NAME (sh64_media,fmovd) }, - { SH64_MEDIA_INSN_FMOVDQ, SEM_FN_NAME (sh64_media,fmovdq) }, - { SH64_MEDIA_INSN_FMOVLS, SEM_FN_NAME (sh64_media,fmovls) }, - { SH64_MEDIA_INSN_FMOVQD, SEM_FN_NAME (sh64_media,fmovqd) }, - { SH64_MEDIA_INSN_FMOVS, SEM_FN_NAME (sh64_media,fmovs) }, - { SH64_MEDIA_INSN_FMOVSL, SEM_FN_NAME (sh64_media,fmovsl) }, - { SH64_MEDIA_INSN_FMULD, SEM_FN_NAME (sh64_media,fmuld) }, - { SH64_MEDIA_INSN_FMULS, SEM_FN_NAME (sh64_media,fmuls) }, - { SH64_MEDIA_INSN_FNEGD, SEM_FN_NAME (sh64_media,fnegd) }, - { SH64_MEDIA_INSN_FNEGS, SEM_FN_NAME (sh64_media,fnegs) }, - { SH64_MEDIA_INSN_FPUTSCR, SEM_FN_NAME (sh64_media,fputscr) }, - { SH64_MEDIA_INSN_FSQRTD, SEM_FN_NAME (sh64_media,fsqrtd) }, - { SH64_MEDIA_INSN_FSQRTS, SEM_FN_NAME (sh64_media,fsqrts) }, - { SH64_MEDIA_INSN_FSTD, SEM_FN_NAME (sh64_media,fstd) }, - { SH64_MEDIA_INSN_FSTP, SEM_FN_NAME (sh64_media,fstp) }, - { SH64_MEDIA_INSN_FSTS, SEM_FN_NAME (sh64_media,fsts) }, - { SH64_MEDIA_INSN_FSTXD, SEM_FN_NAME (sh64_media,fstxd) }, - { SH64_MEDIA_INSN_FSTXP, SEM_FN_NAME (sh64_media,fstxp) }, - { SH64_MEDIA_INSN_FSTXS, SEM_FN_NAME (sh64_media,fstxs) }, - { SH64_MEDIA_INSN_FSUBD, SEM_FN_NAME (sh64_media,fsubd) }, - { SH64_MEDIA_INSN_FSUBS, SEM_FN_NAME (sh64_media,fsubs) }, - { SH64_MEDIA_INSN_FTRCDL, SEM_FN_NAME (sh64_media,ftrcdl) }, - { SH64_MEDIA_INSN_FTRCSL, SEM_FN_NAME (sh64_media,ftrcsl) }, - { SH64_MEDIA_INSN_FTRCDQ, SEM_FN_NAME (sh64_media,ftrcdq) }, - { SH64_MEDIA_INSN_FTRCSQ, SEM_FN_NAME (sh64_media,ftrcsq) }, - { SH64_MEDIA_INSN_FTRVS, SEM_FN_NAME (sh64_media,ftrvs) }, - { SH64_MEDIA_INSN_GETCFG, SEM_FN_NAME (sh64_media,getcfg) }, - { SH64_MEDIA_INSN_GETCON, SEM_FN_NAME (sh64_media,getcon) }, - { SH64_MEDIA_INSN_GETTR, SEM_FN_NAME (sh64_media,gettr) }, - { SH64_MEDIA_INSN_ICBI, SEM_FN_NAME (sh64_media,icbi) }, - { SH64_MEDIA_INSN_LDB, SEM_FN_NAME (sh64_media,ldb) }, - { SH64_MEDIA_INSN_LDL, SEM_FN_NAME (sh64_media,ldl) }, - { SH64_MEDIA_INSN_LDQ, SEM_FN_NAME (sh64_media,ldq) }, - { SH64_MEDIA_INSN_LDUB, SEM_FN_NAME (sh64_media,ldub) }, - { SH64_MEDIA_INSN_LDUW, SEM_FN_NAME (sh64_media,lduw) }, - { SH64_MEDIA_INSN_LDW, SEM_FN_NAME (sh64_media,ldw) }, - { SH64_MEDIA_INSN_LDHIL, SEM_FN_NAME (sh64_media,ldhil) }, - { SH64_MEDIA_INSN_LDHIQ, SEM_FN_NAME (sh64_media,ldhiq) }, - { SH64_MEDIA_INSN_LDLOL, SEM_FN_NAME (sh64_media,ldlol) }, - { SH64_MEDIA_INSN_LDLOQ, SEM_FN_NAME (sh64_media,ldloq) }, - { SH64_MEDIA_INSN_LDXB, SEM_FN_NAME (sh64_media,ldxb) }, - { SH64_MEDIA_INSN_LDXL, SEM_FN_NAME (sh64_media,ldxl) }, - { SH64_MEDIA_INSN_LDXQ, SEM_FN_NAME (sh64_media,ldxq) }, - { SH64_MEDIA_INSN_LDXUB, SEM_FN_NAME (sh64_media,ldxub) }, - { SH64_MEDIA_INSN_LDXUW, SEM_FN_NAME (sh64_media,ldxuw) }, - { SH64_MEDIA_INSN_LDXW, SEM_FN_NAME (sh64_media,ldxw) }, - { SH64_MEDIA_INSN_MABSL, SEM_FN_NAME (sh64_media,mabsl) }, - { SH64_MEDIA_INSN_MABSW, SEM_FN_NAME (sh64_media,mabsw) }, - { SH64_MEDIA_INSN_MADDL, SEM_FN_NAME (sh64_media,maddl) }, - { SH64_MEDIA_INSN_MADDW, SEM_FN_NAME (sh64_media,maddw) }, - { SH64_MEDIA_INSN_MADDSL, SEM_FN_NAME (sh64_media,maddsl) }, - { SH64_MEDIA_INSN_MADDSUB, SEM_FN_NAME (sh64_media,maddsub) }, - { SH64_MEDIA_INSN_MADDSW, SEM_FN_NAME (sh64_media,maddsw) }, - { SH64_MEDIA_INSN_MCMPEQB, SEM_FN_NAME (sh64_media,mcmpeqb) }, - { SH64_MEDIA_INSN_MCMPEQL, SEM_FN_NAME (sh64_media,mcmpeql) }, - { SH64_MEDIA_INSN_MCMPEQW, SEM_FN_NAME (sh64_media,mcmpeqw) }, - { SH64_MEDIA_INSN_MCMPGTL, SEM_FN_NAME (sh64_media,mcmpgtl) }, - { SH64_MEDIA_INSN_MCMPGTUB, SEM_FN_NAME (sh64_media,mcmpgtub) }, - { SH64_MEDIA_INSN_MCMPGTW, SEM_FN_NAME (sh64_media,mcmpgtw) }, - { SH64_MEDIA_INSN_MCMV, SEM_FN_NAME (sh64_media,mcmv) }, - { SH64_MEDIA_INSN_MCNVSLW, SEM_FN_NAME (sh64_media,mcnvslw) }, - { SH64_MEDIA_INSN_MCNVSWB, SEM_FN_NAME (sh64_media,mcnvswb) }, - { SH64_MEDIA_INSN_MCNVSWUB, SEM_FN_NAME (sh64_media,mcnvswub) }, - { SH64_MEDIA_INSN_MEXTR1, SEM_FN_NAME (sh64_media,mextr1) }, - { SH64_MEDIA_INSN_MEXTR2, SEM_FN_NAME (sh64_media,mextr2) }, - { SH64_MEDIA_INSN_MEXTR3, SEM_FN_NAME (sh64_media,mextr3) }, - { SH64_MEDIA_INSN_MEXTR4, SEM_FN_NAME (sh64_media,mextr4) }, - { SH64_MEDIA_INSN_MEXTR5, SEM_FN_NAME (sh64_media,mextr5) }, - { SH64_MEDIA_INSN_MEXTR6, SEM_FN_NAME (sh64_media,mextr6) }, - { SH64_MEDIA_INSN_MEXTR7, SEM_FN_NAME (sh64_media,mextr7) }, - { SH64_MEDIA_INSN_MMACFXWL, SEM_FN_NAME (sh64_media,mmacfxwl) }, - { SH64_MEDIA_INSN_MMACNFX_WL, SEM_FN_NAME (sh64_media,mmacnfx_wl) }, - { SH64_MEDIA_INSN_MMULL, SEM_FN_NAME (sh64_media,mmull) }, - { SH64_MEDIA_INSN_MMULW, SEM_FN_NAME (sh64_media,mmulw) }, - { SH64_MEDIA_INSN_MMULFXL, SEM_FN_NAME (sh64_media,mmulfxl) }, - { SH64_MEDIA_INSN_MMULFXW, SEM_FN_NAME (sh64_media,mmulfxw) }, - { SH64_MEDIA_INSN_MMULFXRPW, SEM_FN_NAME (sh64_media,mmulfxrpw) }, - { SH64_MEDIA_INSN_MMULHIWL, SEM_FN_NAME (sh64_media,mmulhiwl) }, - { SH64_MEDIA_INSN_MMULLOWL, SEM_FN_NAME (sh64_media,mmullowl) }, - { SH64_MEDIA_INSN_MMULSUMWQ, SEM_FN_NAME (sh64_media,mmulsumwq) }, - { SH64_MEDIA_INSN_MOVI, SEM_FN_NAME (sh64_media,movi) }, - { SH64_MEDIA_INSN_MPERMW, SEM_FN_NAME (sh64_media,mpermw) }, - { SH64_MEDIA_INSN_MSADUBQ, SEM_FN_NAME (sh64_media,msadubq) }, - { SH64_MEDIA_INSN_MSHALDSL, SEM_FN_NAME (sh64_media,mshaldsl) }, - { SH64_MEDIA_INSN_MSHALDSW, SEM_FN_NAME (sh64_media,mshaldsw) }, - { SH64_MEDIA_INSN_MSHARDL, SEM_FN_NAME (sh64_media,mshardl) }, - { SH64_MEDIA_INSN_MSHARDW, SEM_FN_NAME (sh64_media,mshardw) }, - { SH64_MEDIA_INSN_MSHARDSQ, SEM_FN_NAME (sh64_media,mshardsq) }, - { SH64_MEDIA_INSN_MSHFHIB, SEM_FN_NAME (sh64_media,mshfhib) }, - { SH64_MEDIA_INSN_MSHFHIL, SEM_FN_NAME (sh64_media,mshfhil) }, - { SH64_MEDIA_INSN_MSHFHIW, SEM_FN_NAME (sh64_media,mshfhiw) }, - { SH64_MEDIA_INSN_MSHFLOB, SEM_FN_NAME (sh64_media,mshflob) }, - { SH64_MEDIA_INSN_MSHFLOL, SEM_FN_NAME (sh64_media,mshflol) }, - { SH64_MEDIA_INSN_MSHFLOW, SEM_FN_NAME (sh64_media,mshflow) }, - { SH64_MEDIA_INSN_MSHLLDL, SEM_FN_NAME (sh64_media,mshlldl) }, - { SH64_MEDIA_INSN_MSHLLDW, SEM_FN_NAME (sh64_media,mshlldw) }, - { SH64_MEDIA_INSN_MSHLRDL, SEM_FN_NAME (sh64_media,mshlrdl) }, - { SH64_MEDIA_INSN_MSHLRDW, SEM_FN_NAME (sh64_media,mshlrdw) }, - { SH64_MEDIA_INSN_MSUBL, SEM_FN_NAME (sh64_media,msubl) }, - { SH64_MEDIA_INSN_MSUBW, SEM_FN_NAME (sh64_media,msubw) }, - { SH64_MEDIA_INSN_MSUBSL, SEM_FN_NAME (sh64_media,msubsl) }, - { SH64_MEDIA_INSN_MSUBSUB, SEM_FN_NAME (sh64_media,msubsub) }, - { SH64_MEDIA_INSN_MSUBSW, SEM_FN_NAME (sh64_media,msubsw) }, - { SH64_MEDIA_INSN_MULSL, SEM_FN_NAME (sh64_media,mulsl) }, - { SH64_MEDIA_INSN_MULUL, SEM_FN_NAME (sh64_media,mulul) }, - { SH64_MEDIA_INSN_NOP, SEM_FN_NAME (sh64_media,nop) }, - { SH64_MEDIA_INSN_NSB, SEM_FN_NAME (sh64_media,nsb) }, - { SH64_MEDIA_INSN_OCBI, SEM_FN_NAME (sh64_media,ocbi) }, - { SH64_MEDIA_INSN_OCBP, SEM_FN_NAME (sh64_media,ocbp) }, - { SH64_MEDIA_INSN_OCBWB, SEM_FN_NAME (sh64_media,ocbwb) }, - { SH64_MEDIA_INSN_OR, SEM_FN_NAME (sh64_media,or) }, - { SH64_MEDIA_INSN_ORI, SEM_FN_NAME (sh64_media,ori) }, - { SH64_MEDIA_INSN_PREFI, SEM_FN_NAME (sh64_media,prefi) }, - { SH64_MEDIA_INSN_PTA, SEM_FN_NAME (sh64_media,pta) }, - { SH64_MEDIA_INSN_PTABS, SEM_FN_NAME (sh64_media,ptabs) }, - { SH64_MEDIA_INSN_PTB, SEM_FN_NAME (sh64_media,ptb) }, - { SH64_MEDIA_INSN_PTREL, SEM_FN_NAME (sh64_media,ptrel) }, - { SH64_MEDIA_INSN_PUTCFG, SEM_FN_NAME (sh64_media,putcfg) }, - { SH64_MEDIA_INSN_PUTCON, SEM_FN_NAME (sh64_media,putcon) }, - { SH64_MEDIA_INSN_RTE, SEM_FN_NAME (sh64_media,rte) }, - { SH64_MEDIA_INSN_SHARD, SEM_FN_NAME (sh64_media,shard) }, - { SH64_MEDIA_INSN_SHARDL, SEM_FN_NAME (sh64_media,shardl) }, - { SH64_MEDIA_INSN_SHARI, SEM_FN_NAME (sh64_media,shari) }, - { SH64_MEDIA_INSN_SHARIL, SEM_FN_NAME (sh64_media,sharil) }, - { SH64_MEDIA_INSN_SHLLD, SEM_FN_NAME (sh64_media,shlld) }, - { SH64_MEDIA_INSN_SHLLDL, SEM_FN_NAME (sh64_media,shlldl) }, - { SH64_MEDIA_INSN_SHLLI, SEM_FN_NAME (sh64_media,shlli) }, - { SH64_MEDIA_INSN_SHLLIL, SEM_FN_NAME (sh64_media,shllil) }, - { SH64_MEDIA_INSN_SHLRD, SEM_FN_NAME (sh64_media,shlrd) }, - { SH64_MEDIA_INSN_SHLRDL, SEM_FN_NAME (sh64_media,shlrdl) }, - { SH64_MEDIA_INSN_SHLRI, SEM_FN_NAME (sh64_media,shlri) }, - { SH64_MEDIA_INSN_SHLRIL, SEM_FN_NAME (sh64_media,shlril) }, - { SH64_MEDIA_INSN_SHORI, SEM_FN_NAME (sh64_media,shori) }, - { SH64_MEDIA_INSN_SLEEP, SEM_FN_NAME (sh64_media,sleep) }, - { SH64_MEDIA_INSN_STB, SEM_FN_NAME (sh64_media,stb) }, - { SH64_MEDIA_INSN_STL, SEM_FN_NAME (sh64_media,stl) }, - { SH64_MEDIA_INSN_STQ, SEM_FN_NAME (sh64_media,stq) }, - { SH64_MEDIA_INSN_STW, SEM_FN_NAME (sh64_media,stw) }, - { SH64_MEDIA_INSN_STHIL, SEM_FN_NAME (sh64_media,sthil) }, - { SH64_MEDIA_INSN_STHIQ, SEM_FN_NAME (sh64_media,sthiq) }, - { SH64_MEDIA_INSN_STLOL, SEM_FN_NAME (sh64_media,stlol) }, - { SH64_MEDIA_INSN_STLOQ, SEM_FN_NAME (sh64_media,stloq) }, - { SH64_MEDIA_INSN_STXB, SEM_FN_NAME (sh64_media,stxb) }, - { SH64_MEDIA_INSN_STXL, SEM_FN_NAME (sh64_media,stxl) }, - { SH64_MEDIA_INSN_STXQ, SEM_FN_NAME (sh64_media,stxq) }, - { SH64_MEDIA_INSN_STXW, SEM_FN_NAME (sh64_media,stxw) }, - { SH64_MEDIA_INSN_SUB, SEM_FN_NAME (sh64_media,sub) }, - { SH64_MEDIA_INSN_SUBL, SEM_FN_NAME (sh64_media,subl) }, - { SH64_MEDIA_INSN_SWAPQ, SEM_FN_NAME (sh64_media,swapq) }, - { SH64_MEDIA_INSN_SYNCI, SEM_FN_NAME (sh64_media,synci) }, - { SH64_MEDIA_INSN_SYNCO, SEM_FN_NAME (sh64_media,synco) }, - { SH64_MEDIA_INSN_TRAPA, SEM_FN_NAME (sh64_media,trapa) }, - { SH64_MEDIA_INSN_XOR, SEM_FN_NAME (sh64_media,xor) }, - { SH64_MEDIA_INSN_XORI, SEM_FN_NAME (sh64_media,xori) }, - { 0, 0 } -}; - -/* Add the semantic fns to IDESC_TABLE. */ - -void -SEM_FN_NAME (sh64_media,init_idesc_table) (SIM_CPU *current_cpu) -{ - IDESC *idesc_table = CPU_IDESC (current_cpu); - const struct sem_fn_desc *sf; - int mach_num = MACH_NUM (CPU_MACH (current_cpu)); - - for (sf = &sem_fns[0]; sf->fn != 0; ++sf) - { - const CGEN_INSN *insn = idesc_table[sf->index].idata; - int valid_p = (CGEN_INSN_VIRTUAL_P (insn) - || CGEN_INSN_MACH_HAS_P (insn, mach_num)); -#if FAST_P - if (valid_p) - idesc_table[sf->index].sem_fast = sf->fn; - else - idesc_table[sf->index].sem_fast = SEM_FN_NAME (sh64_media,x_invalid); -#else - if (valid_p) - idesc_table[sf->index].sem_full = sf->fn; - else - idesc_table[sf->index].sem_full = SEM_FN_NAME (sh64_media,x_invalid); -#endif - } -} - diff --git a/sim/sh64/sh-desc.c b/sim/sh64/sh-desc.c deleted file mode 100644 index e95ab8782f5..00000000000 --- a/sim/sh64/sh-desc.c +++ /dev/null @@ -1,3287 +0,0 @@ -/* CPU data for sh. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Binutils and/or GDB, the GNU debugger. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#include "sysdep.h" -#include -#include -#include -#include "ansidecl.h" -#include "bfd.h" -#include "symcat.h" -#include "sh-desc.h" -#include "sh-opc.h" -#include "opintl.h" -#include "libiberty.h" - -/* Attributes. */ - -static const CGEN_ATTR_ENTRY bool_attr[] = -{ - { "#f", 0 }, - { "#t", 1 }, - { 0, 0 } -}; - -static const CGEN_ATTR_ENTRY MACH_attr[] = -{ - { "base", MACH_BASE }, - { "sh2", MACH_SH2 }, - { "sh3", MACH_SH3 }, - { "sh3e", MACH_SH3E }, - { "sh4", MACH_SH4 }, - { "sh5", MACH_SH5 }, - { "max", MACH_MAX }, - { 0, 0 } -}; - -static const CGEN_ATTR_ENTRY ISA_attr[] = -{ - { "compact", ISA_COMPACT }, - { "media", ISA_MEDIA }, - { "max", ISA_MAX }, - { 0, 0 } -}; - -const CGEN_ATTR_TABLE sh_cgen_ifield_attr_table[] = -{ - { "MACH", & MACH_attr[0], & MACH_attr[0] }, - { "ISA", & ISA_attr[0], & ISA_attr[0] }, - { "VIRTUAL", &bool_attr[0], &bool_attr[0] }, - { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] }, - { "ABS-ADDR", &bool_attr[0], &bool_attr[0] }, - { "RESERVED", &bool_attr[0], &bool_attr[0] }, - { "SIGN-OPT", &bool_attr[0], &bool_attr[0] }, - { "SIGNED", &bool_attr[0], &bool_attr[0] }, - { 0, 0, 0 } -}; - -const CGEN_ATTR_TABLE sh_cgen_hardware_attr_table[] = -{ - { "MACH", & MACH_attr[0], & MACH_attr[0] }, - { "VIRTUAL", &bool_attr[0], &bool_attr[0] }, - { "CACHE-ADDR", &bool_attr[0], &bool_attr[0] }, - { "PC", &bool_attr[0], &bool_attr[0] }, - { "PROFILE", &bool_attr[0], &bool_attr[0] }, - { 0, 0, 0 } -}; - -const CGEN_ATTR_TABLE sh_cgen_operand_attr_table[] = -{ - { "MACH", & MACH_attr[0], & MACH_attr[0] }, - { "ISA", & ISA_attr[0], & ISA_attr[0] }, - { "VIRTUAL", &bool_attr[0], &bool_attr[0] }, - { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] }, - { "ABS-ADDR", &bool_attr[0], &bool_attr[0] }, - { "SIGN-OPT", &bool_attr[0], &bool_attr[0] }, - { "SIGNED", &bool_attr[0], &bool_attr[0] }, - { "NEGATIVE", &bool_attr[0], &bool_attr[0] }, - { "RELAX", &bool_attr[0], &bool_attr[0] }, - { "SEM-ONLY", &bool_attr[0], &bool_attr[0] }, - { 0, 0, 0 } -}; - -const CGEN_ATTR_TABLE sh_cgen_insn_attr_table[] = -{ - { "MACH", & MACH_attr[0], & MACH_attr[0] }, - { "ISA", & ISA_attr[0], & ISA_attr[0] }, - { "ALIAS", &bool_attr[0], &bool_attr[0] }, - { "VIRTUAL", &bool_attr[0], &bool_attr[0] }, - { "UNCOND-CTI", &bool_attr[0], &bool_attr[0] }, - { "COND-CTI", &bool_attr[0], &bool_attr[0] }, - { "SKIP-CTI", &bool_attr[0], &bool_attr[0] }, - { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] }, - { "RELAXABLE", &bool_attr[0], &bool_attr[0] }, - { "RELAX", &bool_attr[0], &bool_attr[0] }, - { "NO-DIS", &bool_attr[0], &bool_attr[0] }, - { "PBB", &bool_attr[0], &bool_attr[0] }, - { "ILLSLOT", &bool_attr[0], &bool_attr[0] }, - { "FP-INSN", &bool_attr[0], &bool_attr[0] }, - { 0, 0, 0 } -}; - -/* Instruction set variants. */ - -static const CGEN_ISA sh_cgen_isa_table[] = { - { "media", 32, 32, 32, 32 }, - { "compact", 16, 16, 16, 16 }, - { 0, 0, 0, 0, 0 } -}; - -/* Machine variants. */ - -static const CGEN_MACH sh_cgen_mach_table[] = { - { "sh2", "sh2", MACH_SH2 }, - { "sh3", "sh3", MACH_SH3 }, - { "sh3e", "sh3e", MACH_SH3E }, - { "sh4", "sh4", MACH_SH4 }, - { "sh5", "sh5", MACH_SH5 }, - { 0, 0, 0 } -}; - -static CGEN_KEYWORD_ENTRY sh_cgen_opval_frc_names_entries[] = -{ - { "fr0", 0, {0, {0}}, 0, 0 }, - { "fr1", 1, {0, {0}}, 0, 0 }, - { "fr2", 2, {0, {0}}, 0, 0 }, - { "fr3", 3, {0, {0}}, 0, 0 }, - { "fr4", 4, {0, {0}}, 0, 0 }, - { "fr5", 5, {0, {0}}, 0, 0 }, - { "fr6", 6, {0, {0}}, 0, 0 }, - { "fr7", 7, {0, {0}}, 0, 0 }, - { "fr8", 8, {0, {0}}, 0, 0 }, - { "fr9", 9, {0, {0}}, 0, 0 }, - { "fr10", 10, {0, {0}}, 0, 0 }, - { "fr11", 11, {0, {0}}, 0, 0 }, - { "fr12", 12, {0, {0}}, 0, 0 }, - { "fr13", 13, {0, {0}}, 0, 0 }, - { "fr14", 14, {0, {0}}, 0, 0 }, - { "fr15", 15, {0, {0}}, 0, 0 } -}; - -CGEN_KEYWORD sh_cgen_opval_frc_names = -{ - & sh_cgen_opval_frc_names_entries[0], - 16, - 0, 0, 0, 0 -}; - -static CGEN_KEYWORD_ENTRY sh_cgen_opval_drc_names_entries[] = -{ - { "dr0", 0, {0, {0}}, 0, 0 }, - { "dr2", 2, {0, {0}}, 0, 0 }, - { "dr4", 4, {0, {0}}, 0, 0 }, - { "dr6", 6, {0, {0}}, 0, 0 }, - { "dr8", 8, {0, {0}}, 0, 0 }, - { "dr10", 10, {0, {0}}, 0, 0 }, - { "dr12", 12, {0, {0}}, 0, 0 }, - { "dr14", 14, {0, {0}}, 0, 0 } -}; - -CGEN_KEYWORD sh_cgen_opval_drc_names = -{ - & sh_cgen_opval_drc_names_entries[0], - 8, - 0, 0, 0, 0 -}; - -static CGEN_KEYWORD_ENTRY sh_cgen_opval_xf_names_entries[] = -{ - { "xf0", 0, {0, {0}}, 0, 0 }, - { "xf1", 1, {0, {0}}, 0, 0 }, - { "xf2", 2, {0, {0}}, 0, 0 }, - { "xf3", 3, {0, {0}}, 0, 0 }, - { "xf4", 4, {0, {0}}, 0, 0 }, - { "xf5", 5, {0, {0}}, 0, 0 }, - { "xf6", 6, {0, {0}}, 0, 0 }, - { "xf7", 7, {0, {0}}, 0, 0 }, - { "xf8", 8, {0, {0}}, 0, 0 }, - { "xf9", 9, {0, {0}}, 0, 0 }, - { "xf10", 10, {0, {0}}, 0, 0 }, - { "xf11", 11, {0, {0}}, 0, 0 }, - { "xf12", 12, {0, {0}}, 0, 0 }, - { "xf13", 13, {0, {0}}, 0, 0 }, - { "xf14", 14, {0, {0}}, 0, 0 }, - { "xf15", 15, {0, {0}}, 0, 0 } -}; - -CGEN_KEYWORD sh_cgen_opval_xf_names = -{ - & sh_cgen_opval_xf_names_entries[0], - 16, - 0, 0, 0, 0 -}; - -static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_gr_entries[] = -{ - { "r0", 0, {0, {0}}, 0, 0 }, - { "r1", 1, {0, {0}}, 0, 0 }, - { "r2", 2, {0, {0}}, 0, 0 }, - { "r3", 3, {0, {0}}, 0, 0 }, - { "r4", 4, {0, {0}}, 0, 0 }, - { "r5", 5, {0, {0}}, 0, 0 }, - { "r6", 6, {0, {0}}, 0, 0 }, - { "r7", 7, {0, {0}}, 0, 0 }, - { "r8", 8, {0, {0}}, 0, 0 }, - { "r9", 9, {0, {0}}, 0, 0 }, - { "r10", 10, {0, {0}}, 0, 0 }, - { "r11", 11, {0, {0}}, 0, 0 }, - { "r12", 12, {0, {0}}, 0, 0 }, - { "r13", 13, {0, {0}}, 0, 0 }, - { "r14", 14, {0, {0}}, 0, 0 }, - { "r15", 15, {0, {0}}, 0, 0 }, - { "r16", 16, {0, {0}}, 0, 0 }, - { "r17", 17, {0, {0}}, 0, 0 }, - { "r18", 18, {0, {0}}, 0, 0 }, - { "r19", 19, {0, {0}}, 0, 0 }, - { "r20", 20, {0, {0}}, 0, 0 }, - { "r21", 21, {0, {0}}, 0, 0 }, - { "r22", 22, {0, {0}}, 0, 0 }, - { "r23", 23, {0, {0}}, 0, 0 }, - { "r24", 24, {0, {0}}, 0, 0 }, - { "r25", 25, {0, {0}}, 0, 0 }, - { "r26", 26, {0, {0}}, 0, 0 }, - { "r27", 27, {0, {0}}, 0, 0 }, - { "r28", 28, {0, {0}}, 0, 0 }, - { "r29", 29, {0, {0}}, 0, 0 }, - { "r30", 30, {0, {0}}, 0, 0 }, - { "r31", 31, {0, {0}}, 0, 0 }, - { "r32", 32, {0, {0}}, 0, 0 }, - { "r33", 33, {0, {0}}, 0, 0 }, - { "r34", 34, {0, {0}}, 0, 0 }, - { "r35", 35, {0, {0}}, 0, 0 }, - { "r36", 36, {0, {0}}, 0, 0 }, - { "r37", 37, {0, {0}}, 0, 0 }, - { "r38", 38, {0, {0}}, 0, 0 }, - { "r39", 39, {0, {0}}, 0, 0 }, - { "r40", 40, {0, {0}}, 0, 0 }, - { "r41", 41, {0, {0}}, 0, 0 }, - { "r42", 42, {0, {0}}, 0, 0 }, - { "r43", 43, {0, {0}}, 0, 0 }, - { "r44", 44, {0, {0}}, 0, 0 }, - { "r45", 45, {0, {0}}, 0, 0 }, - { "r46", 46, {0, {0}}, 0, 0 }, - { "r47", 47, {0, {0}}, 0, 0 }, - { "r48", 48, {0, {0}}, 0, 0 }, - { "r49", 49, {0, {0}}, 0, 0 }, - { "r50", 50, {0, {0}}, 0, 0 }, - { "r51", 51, {0, {0}}, 0, 0 }, - { "r52", 52, {0, {0}}, 0, 0 }, - { "r53", 53, {0, {0}}, 0, 0 }, - { "r54", 54, {0, {0}}, 0, 0 }, - { "r55", 55, {0, {0}}, 0, 0 }, - { "r56", 56, {0, {0}}, 0, 0 }, - { "r57", 57, {0, {0}}, 0, 0 }, - { "r58", 58, {0, {0}}, 0, 0 }, - { "r59", 59, {0, {0}}, 0, 0 }, - { "r60", 60, {0, {0}}, 0, 0 }, - { "r61", 61, {0, {0}}, 0, 0 }, - { "r62", 62, {0, {0}}, 0, 0 }, - { "r63", 63, {0, {0}}, 0, 0 } -}; - -CGEN_KEYWORD sh_cgen_opval_h_gr = -{ - & sh_cgen_opval_h_gr_entries[0], - 64, - 0, 0, 0, 0 -}; - -static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_grc_entries[] = -{ - { "r0", 0, {0, {0}}, 0, 0 }, - { "r1", 1, {0, {0}}, 0, 0 }, - { "r2", 2, {0, {0}}, 0, 0 }, - { "r3", 3, {0, {0}}, 0, 0 }, - { "r4", 4, {0, {0}}, 0, 0 }, - { "r5", 5, {0, {0}}, 0, 0 }, - { "r6", 6, {0, {0}}, 0, 0 }, - { "r7", 7, {0, {0}}, 0, 0 }, - { "r8", 8, {0, {0}}, 0, 0 }, - { "r9", 9, {0, {0}}, 0, 0 }, - { "r10", 10, {0, {0}}, 0, 0 }, - { "r11", 11, {0, {0}}, 0, 0 }, - { "r12", 12, {0, {0}}, 0, 0 }, - { "r13", 13, {0, {0}}, 0, 0 }, - { "r14", 14, {0, {0}}, 0, 0 }, - { "r15", 15, {0, {0}}, 0, 0 } -}; - -CGEN_KEYWORD sh_cgen_opval_h_grc = -{ - & sh_cgen_opval_h_grc_entries[0], - 16, - 0, 0, 0, 0 -}; - -static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_cr_entries[] = -{ - { "cr0", 0, {0, {0}}, 0, 0 }, - { "cr1", 1, {0, {0}}, 0, 0 }, - { "cr2", 2, {0, {0}}, 0, 0 }, - { "cr3", 3, {0, {0}}, 0, 0 }, - { "cr4", 4, {0, {0}}, 0, 0 }, - { "cr5", 5, {0, {0}}, 0, 0 }, - { "cr6", 6, {0, {0}}, 0, 0 }, - { "cr7", 7, {0, {0}}, 0, 0 }, - { "cr8", 8, {0, {0}}, 0, 0 }, - { "cr9", 9, {0, {0}}, 0, 0 }, - { "cr10", 10, {0, {0}}, 0, 0 }, - { "cr11", 11, {0, {0}}, 0, 0 }, - { "cr12", 12, {0, {0}}, 0, 0 }, - { "cr13", 13, {0, {0}}, 0, 0 }, - { "cr14", 14, {0, {0}}, 0, 0 }, - { "cr15", 15, {0, {0}}, 0, 0 }, - { "cr16", 16, {0, {0}}, 0, 0 }, - { "cr17", 17, {0, {0}}, 0, 0 }, - { "cr18", 18, {0, {0}}, 0, 0 }, - { "cr19", 19, {0, {0}}, 0, 0 }, - { "cr20", 20, {0, {0}}, 0, 0 }, - { "cr21", 21, {0, {0}}, 0, 0 }, - { "cr22", 22, {0, {0}}, 0, 0 }, - { "cr23", 23, {0, {0}}, 0, 0 }, - { "cr24", 24, {0, {0}}, 0, 0 }, - { "cr25", 25, {0, {0}}, 0, 0 }, - { "cr26", 26, {0, {0}}, 0, 0 }, - { "cr27", 27, {0, {0}}, 0, 0 }, - { "cr28", 28, {0, {0}}, 0, 0 }, - { "cr29", 29, {0, {0}}, 0, 0 }, - { "cr30", 30, {0, {0}}, 0, 0 }, - { "cr31", 31, {0, {0}}, 0, 0 }, - { "cr32", 32, {0, {0}}, 0, 0 }, - { "cr33", 33, {0, {0}}, 0, 0 }, - { "cr34", 34, {0, {0}}, 0, 0 }, - { "cr35", 35, {0, {0}}, 0, 0 }, - { "cr36", 36, {0, {0}}, 0, 0 }, - { "cr37", 37, {0, {0}}, 0, 0 }, - { "cr38", 38, {0, {0}}, 0, 0 }, - { "cr39", 39, {0, {0}}, 0, 0 }, - { "cr40", 40, {0, {0}}, 0, 0 }, - { "cr41", 41, {0, {0}}, 0, 0 }, - { "cr42", 42, {0, {0}}, 0, 0 }, - { "cr43", 43, {0, {0}}, 0, 0 }, - { "cr44", 44, {0, {0}}, 0, 0 }, - { "cr45", 45, {0, {0}}, 0, 0 }, - { "cr46", 46, {0, {0}}, 0, 0 }, - { "cr47", 47, {0, {0}}, 0, 0 }, - { "cr48", 48, {0, {0}}, 0, 0 }, - { "cr49", 49, {0, {0}}, 0, 0 }, - { "cr50", 50, {0, {0}}, 0, 0 }, - { "cr51", 51, {0, {0}}, 0, 0 }, - { "cr52", 52, {0, {0}}, 0, 0 }, - { "cr53", 53, {0, {0}}, 0, 0 }, - { "cr54", 54, {0, {0}}, 0, 0 }, - { "cr55", 55, {0, {0}}, 0, 0 }, - { "cr56", 56, {0, {0}}, 0, 0 }, - { "cr57", 57, {0, {0}}, 0, 0 }, - { "cr58", 58, {0, {0}}, 0, 0 }, - { "cr59", 59, {0, {0}}, 0, 0 }, - { "cr60", 60, {0, {0}}, 0, 0 }, - { "cr61", 61, {0, {0}}, 0, 0 }, - { "cr62", 62, {0, {0}}, 0, 0 }, - { "cr63", 63, {0, {0}}, 0, 0 } -}; - -CGEN_KEYWORD sh_cgen_opval_h_cr = -{ - & sh_cgen_opval_h_cr_entries[0], - 64, - 0, 0, 0, 0 -}; - -static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_fr_entries[] = -{ - { "fr0", 0, {0, {0}}, 0, 0 }, - { "fr1", 1, {0, {0}}, 0, 0 }, - { "fr2", 2, {0, {0}}, 0, 0 }, - { "fr3", 3, {0, {0}}, 0, 0 }, - { "fr4", 4, {0, {0}}, 0, 0 }, - { "fr5", 5, {0, {0}}, 0, 0 }, - { "fr6", 6, {0, {0}}, 0, 0 }, - { "fr7", 7, {0, {0}}, 0, 0 }, - { "fr8", 8, {0, {0}}, 0, 0 }, - { "fr9", 9, {0, {0}}, 0, 0 }, - { "fr10", 10, {0, {0}}, 0, 0 }, - { "fr11", 11, {0, {0}}, 0, 0 }, - { "fr12", 12, {0, {0}}, 0, 0 }, - { "fr13", 13, {0, {0}}, 0, 0 }, - { "fr14", 14, {0, {0}}, 0, 0 }, - { "fr15", 15, {0, {0}}, 0, 0 }, - { "fr16", 16, {0, {0}}, 0, 0 }, - { "fr17", 17, {0, {0}}, 0, 0 }, - { "fr18", 18, {0, {0}}, 0, 0 }, - { "fr19", 19, {0, {0}}, 0, 0 }, - { "fr20", 20, {0, {0}}, 0, 0 }, - { "fr21", 21, {0, {0}}, 0, 0 }, - { "fr22", 22, {0, {0}}, 0, 0 }, - { "fr23", 23, {0, {0}}, 0, 0 }, - { "fr24", 24, {0, {0}}, 0, 0 }, - { "fr25", 25, {0, {0}}, 0, 0 }, - { "fr26", 26, {0, {0}}, 0, 0 }, - { "fr27", 27, {0, {0}}, 0, 0 }, - { "fr28", 28, {0, {0}}, 0, 0 }, - { "fr29", 29, {0, {0}}, 0, 0 }, - { "fr30", 30, {0, {0}}, 0, 0 }, - { "fr31", 31, {0, {0}}, 0, 0 }, - { "fr32", 32, {0, {0}}, 0, 0 }, - { "fr33", 33, {0, {0}}, 0, 0 }, - { "fr34", 34, {0, {0}}, 0, 0 }, - { "fr35", 35, {0, {0}}, 0, 0 }, - { "fr36", 36, {0, {0}}, 0, 0 }, - { "fr37", 37, {0, {0}}, 0, 0 }, - { "fr38", 38, {0, {0}}, 0, 0 }, - { "fr39", 39, {0, {0}}, 0, 0 }, - { "fr40", 40, {0, {0}}, 0, 0 }, - { "fr41", 41, {0, {0}}, 0, 0 }, - { "fr42", 42, {0, {0}}, 0, 0 }, - { "fr43", 43, {0, {0}}, 0, 0 }, - { "fr44", 44, {0, {0}}, 0, 0 }, - { "fr45", 45, {0, {0}}, 0, 0 }, - { "fr46", 46, {0, {0}}, 0, 0 }, - { "fr47", 47, {0, {0}}, 0, 0 }, - { "fr48", 48, {0, {0}}, 0, 0 }, - { "fr49", 49, {0, {0}}, 0, 0 }, - { "fr50", 50, {0, {0}}, 0, 0 }, - { "fr51", 51, {0, {0}}, 0, 0 }, - { "fr52", 52, {0, {0}}, 0, 0 }, - { "fr53", 53, {0, {0}}, 0, 0 }, - { "fr54", 54, {0, {0}}, 0, 0 }, - { "fr55", 55, {0, {0}}, 0, 0 }, - { "fr56", 56, {0, {0}}, 0, 0 }, - { "fr57", 57, {0, {0}}, 0, 0 }, - { "fr58", 58, {0, {0}}, 0, 0 }, - { "fr59", 59, {0, {0}}, 0, 0 }, - { "fr60", 60, {0, {0}}, 0, 0 }, - { "fr61", 61, {0, {0}}, 0, 0 }, - { "fr62", 62, {0, {0}}, 0, 0 }, - { "fr63", 63, {0, {0}}, 0, 0 } -}; - -CGEN_KEYWORD sh_cgen_opval_h_fr = -{ - & sh_cgen_opval_h_fr_entries[0], - 64, - 0, 0, 0, 0 -}; - -static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_fp_entries[] = -{ - { "fp0", 0, {0, {0}}, 0, 0 }, - { "fp1", 1, {0, {0}}, 0, 0 }, - { "fp2", 2, {0, {0}}, 0, 0 }, - { "fp3", 3, {0, {0}}, 0, 0 }, - { "fp4", 4, {0, {0}}, 0, 0 }, - { "fp5", 5, {0, {0}}, 0, 0 }, - { "fp6", 6, {0, {0}}, 0, 0 }, - { "fp7", 7, {0, {0}}, 0, 0 }, - { "fp8", 8, {0, {0}}, 0, 0 }, - { "fp9", 9, {0, {0}}, 0, 0 }, - { "fp10", 10, {0, {0}}, 0, 0 }, - { "fp11", 11, {0, {0}}, 0, 0 }, - { "fp12", 12, {0, {0}}, 0, 0 }, - { "fp13", 13, {0, {0}}, 0, 0 }, - { "fp14", 14, {0, {0}}, 0, 0 }, - { "fp15", 15, {0, {0}}, 0, 0 }, - { "fp16", 16, {0, {0}}, 0, 0 }, - { "fp17", 17, {0, {0}}, 0, 0 }, - { "fp18", 18, {0, {0}}, 0, 0 }, - { "fp19", 19, {0, {0}}, 0, 0 }, - { "fp20", 20, {0, {0}}, 0, 0 }, - { "fp21", 21, {0, {0}}, 0, 0 }, - { "fp22", 22, {0, {0}}, 0, 0 }, - { "fp23", 23, {0, {0}}, 0, 0 }, - { "fp24", 24, {0, {0}}, 0, 0 }, - { "fp25", 25, {0, {0}}, 0, 0 }, - { "fp26", 26, {0, {0}}, 0, 0 }, - { "fp27", 27, {0, {0}}, 0, 0 }, - { "fp28", 28, {0, {0}}, 0, 0 }, - { "fp29", 29, {0, {0}}, 0, 0 }, - { "fp30", 30, {0, {0}}, 0, 0 }, - { "fp31", 31, {0, {0}}, 0, 0 } -}; - -CGEN_KEYWORD sh_cgen_opval_h_fp = -{ - & sh_cgen_opval_h_fp_entries[0], - 32, - 0, 0, 0, 0 -}; - -static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_fv_entries[] = -{ - { "fv0", 0, {0, {0}}, 0, 0 }, - { "fv1", 1, {0, {0}}, 0, 0 }, - { "fv2", 2, {0, {0}}, 0, 0 }, - { "fv3", 3, {0, {0}}, 0, 0 }, - { "fv4", 4, {0, {0}}, 0, 0 }, - { "fv5", 5, {0, {0}}, 0, 0 }, - { "fv6", 6, {0, {0}}, 0, 0 }, - { "fv7", 7, {0, {0}}, 0, 0 }, - { "fv8", 8, {0, {0}}, 0, 0 }, - { "fv9", 9, {0, {0}}, 0, 0 }, - { "fv10", 10, {0, {0}}, 0, 0 }, - { "fv11", 11, {0, {0}}, 0, 0 }, - { "fv12", 12, {0, {0}}, 0, 0 }, - { "fv13", 13, {0, {0}}, 0, 0 }, - { "fv14", 14, {0, {0}}, 0, 0 }, - { "fv15", 15, {0, {0}}, 0, 0 } -}; - -CGEN_KEYWORD sh_cgen_opval_h_fv = -{ - & sh_cgen_opval_h_fv_entries[0], - 16, - 0, 0, 0, 0 -}; - -static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_fmtx_entries[] = -{ - { "mtrx0", 0, {0, {0}}, 0, 0 }, - { "mtrx1", 1, {0, {0}}, 0, 0 }, - { "mtrx2", 2, {0, {0}}, 0, 0 }, - { "mtrx3", 3, {0, {0}}, 0, 0 } -}; - -CGEN_KEYWORD sh_cgen_opval_h_fmtx = -{ - & sh_cgen_opval_h_fmtx_entries[0], - 4, - 0, 0, 0, 0 -}; - -static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_dr_entries[] = -{ - { "dr0", 0, {0, {0}}, 0, 0 }, - { "dr1", 1, {0, {0}}, 0, 0 }, - { "dr2", 2, {0, {0}}, 0, 0 }, - { "dr3", 3, {0, {0}}, 0, 0 }, - { "dr4", 4, {0, {0}}, 0, 0 }, - { "dr5", 5, {0, {0}}, 0, 0 }, - { "dr6", 6, {0, {0}}, 0, 0 }, - { "dr7", 7, {0, {0}}, 0, 0 }, - { "dr8", 8, {0, {0}}, 0, 0 }, - { "dr9", 9, {0, {0}}, 0, 0 }, - { "dr10", 10, {0, {0}}, 0, 0 }, - { "dr11", 11, {0, {0}}, 0, 0 }, - { "dr12", 12, {0, {0}}, 0, 0 }, - { "dr13", 13, {0, {0}}, 0, 0 }, - { "dr14", 14, {0, {0}}, 0, 0 }, - { "dr15", 15, {0, {0}}, 0, 0 }, - { "dr16", 16, {0, {0}}, 0, 0 }, - { "dr17", 17, {0, {0}}, 0, 0 }, - { "dr18", 18, {0, {0}}, 0, 0 }, - { "dr19", 19, {0, {0}}, 0, 0 }, - { "dr20", 20, {0, {0}}, 0, 0 }, - { "dr21", 21, {0, {0}}, 0, 0 }, - { "dr22", 22, {0, {0}}, 0, 0 }, - { "dr23", 23, {0, {0}}, 0, 0 }, - { "dr24", 24, {0, {0}}, 0, 0 }, - { "dr25", 25, {0, {0}}, 0, 0 }, - { "dr26", 26, {0, {0}}, 0, 0 }, - { "dr27", 27, {0, {0}}, 0, 0 }, - { "dr28", 28, {0, {0}}, 0, 0 }, - { "dr29", 29, {0, {0}}, 0, 0 }, - { "dr30", 30, {0, {0}}, 0, 0 }, - { "dr31", 31, {0, {0}}, 0, 0 }, - { "dr32", 32, {0, {0}}, 0, 0 }, - { "dr33", 33, {0, {0}}, 0, 0 }, - { "dr34", 34, {0, {0}}, 0, 0 }, - { "dr35", 35, {0, {0}}, 0, 0 }, - { "dr36", 36, {0, {0}}, 0, 0 }, - { "dr37", 37, {0, {0}}, 0, 0 }, - { "dr38", 38, {0, {0}}, 0, 0 }, - { "dr39", 39, {0, {0}}, 0, 0 }, - { "dr40", 40, {0, {0}}, 0, 0 }, - { "dr41", 41, {0, {0}}, 0, 0 }, - { "dr42", 42, {0, {0}}, 0, 0 }, - { "dr43", 43, {0, {0}}, 0, 0 }, - { "dr44", 44, {0, {0}}, 0, 0 }, - { "dr45", 45, {0, {0}}, 0, 0 }, - { "dr46", 46, {0, {0}}, 0, 0 }, - { "dr47", 47, {0, {0}}, 0, 0 }, - { "dr48", 48, {0, {0}}, 0, 0 }, - { "dr49", 49, {0, {0}}, 0, 0 }, - { "dr50", 50, {0, {0}}, 0, 0 }, - { "dr51", 51, {0, {0}}, 0, 0 }, - { "dr52", 52, {0, {0}}, 0, 0 }, - { "dr53", 53, {0, {0}}, 0, 0 }, - { "dr54", 54, {0, {0}}, 0, 0 }, - { "dr55", 55, {0, {0}}, 0, 0 }, - { "dr56", 56, {0, {0}}, 0, 0 }, - { "dr57", 57, {0, {0}}, 0, 0 }, - { "dr58", 58, {0, {0}}, 0, 0 }, - { "dr59", 59, {0, {0}}, 0, 0 }, - { "dr60", 60, {0, {0}}, 0, 0 }, - { "dr61", 61, {0, {0}}, 0, 0 }, - { "dr62", 62, {0, {0}}, 0, 0 }, - { "dr63", 63, {0, {0}}, 0, 0 } -}; - -CGEN_KEYWORD sh_cgen_opval_h_dr = -{ - & sh_cgen_opval_h_dr_entries[0], - 64, - 0, 0, 0, 0 -}; - -static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_tr_entries[] = -{ - { "tr0", 0, {0, {0}}, 0, 0 }, - { "tr1", 1, {0, {0}}, 0, 0 }, - { "tr2", 2, {0, {0}}, 0, 0 }, - { "tr3", 3, {0, {0}}, 0, 0 }, - { "tr4", 4, {0, {0}}, 0, 0 }, - { "tr5", 5, {0, {0}}, 0, 0 }, - { "tr6", 6, {0, {0}}, 0, 0 }, - { "tr7", 7, {0, {0}}, 0, 0 } -}; - -CGEN_KEYWORD sh_cgen_opval_h_tr = -{ - & sh_cgen_opval_h_tr_entries[0], - 8, - 0, 0, 0, 0 -}; - -static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_fvc_entries[] = -{ - { "fv0", 0, {0, {0}}, 0, 0 }, - { "fv4", 4, {0, {0}}, 0, 0 }, - { "fv8", 8, {0, {0}}, 0, 0 }, - { "fv12", 12, {0, {0}}, 0, 0 } -}; - -CGEN_KEYWORD sh_cgen_opval_h_fvc = -{ - & sh_cgen_opval_h_fvc_entries[0], - 4, - 0, 0, 0, 0 -}; - - -/* The hardware table. */ - -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) -#define A(a) (1 << CGEN_HW_##a) -#else -#define A(a) (1 << CGEN_HW_/**/a) -#endif - -const CGEN_HW_ENTRY sh_cgen_hw_table[] = -{ - { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { (1<name) - { - if (strcmp (name, table->bfd_name) == 0) - return table; - ++table; - } - abort (); -} - -/* Subroutine of sh_cgen_cpu_open to build the hardware table. */ - -static void -build_hw_table (cd) - CGEN_CPU_TABLE *cd; -{ - int i; - int machs = cd->machs; - const CGEN_HW_ENTRY *init = & sh_cgen_hw_table[0]; - /* MAX_HW is only an upper bound on the number of selected entries. - However each entry is indexed by it's enum so there can be holes in - the table. */ - const CGEN_HW_ENTRY **selected = - (const CGEN_HW_ENTRY **) xmalloc (MAX_HW * sizeof (CGEN_HW_ENTRY *)); - - cd->hw_table.init_entries = init; - cd->hw_table.entry_size = sizeof (CGEN_HW_ENTRY); - memset (selected, 0, MAX_HW * sizeof (CGEN_HW_ENTRY *)); - /* ??? For now we just use machs to determine which ones we want. */ - for (i = 0; init[i].name != NULL; ++i) - if (CGEN_HW_ATTR_VALUE (&init[i], CGEN_HW_MACH) - & machs) - selected[init[i].type] = &init[i]; - cd->hw_table.entries = selected; - cd->hw_table.num_entries = MAX_HW; -} - -/* Subroutine of sh_cgen_cpu_open to build the hardware table. */ - -static void -build_ifield_table (cd) - CGEN_CPU_TABLE *cd; -{ - cd->ifld_table = & sh_cgen_ifld_table[0]; -} - -/* Subroutine of sh_cgen_cpu_open to build the hardware table. */ - -static void -build_operand_table (cd) - CGEN_CPU_TABLE *cd; -{ - int i; - int machs = cd->machs; - const CGEN_OPERAND *init = & sh_cgen_operand_table[0]; - /* MAX_OPERANDS is only an upper bound on the number of selected entries. - However each entry is indexed by it's enum so there can be holes in - the table. */ - const CGEN_OPERAND **selected = - (const CGEN_OPERAND **) xmalloc (MAX_OPERANDS * sizeof (CGEN_OPERAND *)); - - cd->operand_table.init_entries = init; - cd->operand_table.entry_size = sizeof (CGEN_OPERAND); - memset (selected, 0, MAX_OPERANDS * sizeof (CGEN_OPERAND *)); - /* ??? For now we just use mach to determine which ones we want. */ - for (i = 0; init[i].name != NULL; ++i) - if (CGEN_OPERAND_ATTR_VALUE (&init[i], CGEN_OPERAND_MACH) - & machs) - selected[init[i].type] = &init[i]; - cd->operand_table.entries = selected; - cd->operand_table.num_entries = MAX_OPERANDS; -} - -/* Subroutine of sh_cgen_cpu_open to build the hardware table. - ??? This could leave out insns not supported by the specified mach/isa, - but that would cause errors like "foo only supported by bar" to become - "unknown insn", so for now we include all insns and require the app to - do the checking later. - ??? On the other hand, parsing of such insns may require their hardware or - operand elements to be in the table [which they mightn't be]. */ - -static void -build_insn_table (cd) - CGEN_CPU_TABLE *cd; -{ - int i; - const CGEN_IBASE *ib = & sh_cgen_insn_table[0]; - CGEN_INSN *insns = (CGEN_INSN *) xmalloc (MAX_INSNS * sizeof (CGEN_INSN)); - - memset (insns, 0, MAX_INSNS * sizeof (CGEN_INSN)); - for (i = 0; i < MAX_INSNS; ++i) - insns[i].base = &ib[i]; - cd->insn_table.init_entries = insns; - cd->insn_table.entry_size = sizeof (CGEN_IBASE); - cd->insn_table.num_init_entries = MAX_INSNS; -} - -/* Subroutine of sh_cgen_cpu_open to rebuild the tables. */ - -static void -sh_cgen_rebuild_tables (cd) - CGEN_CPU_TABLE *cd; -{ - int i,n_isas; - unsigned int isas = cd->isas; -#if 0 - unsigned int machs = cd->machs; -#endif - - cd->int_insn_p = CGEN_INT_INSN_P; - - /* Data derived from the isa spec. */ -#define UNSET (CGEN_SIZE_UNKNOWN + 1) - cd->default_insn_bitsize = UNSET; - cd->base_insn_bitsize = UNSET; - cd->min_insn_bitsize = 65535; /* some ridiculously big number */ - cd->max_insn_bitsize = 0; - for (i = 0; i < MAX_ISAS; ++i) - if (((1 << i) & isas) != 0) - { - const CGEN_ISA *isa = & sh_cgen_isa_table[i]; - - /* Default insn sizes of all selected isas must be equal or we set - the result to 0, meaning "unknown". */ - if (cd->default_insn_bitsize == UNSET) - cd->default_insn_bitsize = isa->default_insn_bitsize; - else if (isa->default_insn_bitsize == cd->default_insn_bitsize) - ; /* this is ok */ - else - cd->default_insn_bitsize = CGEN_SIZE_UNKNOWN; - - /* Base insn sizes of all selected isas must be equal or we set - the result to 0, meaning "unknown". */ - if (cd->base_insn_bitsize == UNSET) - cd->base_insn_bitsize = isa->base_insn_bitsize; - else if (isa->base_insn_bitsize == cd->base_insn_bitsize) - ; /* this is ok */ - else - cd->base_insn_bitsize = CGEN_SIZE_UNKNOWN; - - /* Set min,max insn sizes. */ - if (isa->min_insn_bitsize < cd->min_insn_bitsize) - cd->min_insn_bitsize = isa->min_insn_bitsize; - if (isa->max_insn_bitsize > cd->max_insn_bitsize) - cd->max_insn_bitsize = isa->max_insn_bitsize; - - ++n_isas; - } - -#if 0 /* Does nothing?? */ - /* Data derived from the mach spec. */ - for (i = 0; i < MAX_MACHS; ++i) - if (((1 << i) & machs) != 0) - { - const CGEN_MACH *mach = & sh_cgen_mach_table[i]; - - ++n_machs; - } -#endif - - /* Determine which hw elements are used by MACH. */ - build_hw_table (cd); - - /* Build the ifield table. */ - build_ifield_table (cd); - - /* Determine which operands are used by MACH/ISA. */ - build_operand_table (cd); - - /* Build the instruction table. */ - build_insn_table (cd); -} - -/* Initialize a cpu table and return a descriptor. - It's much like opening a file, and must be the first function called. - The arguments are a set of (type/value) pairs, terminated with - CGEN_CPU_OPEN_END. - - Currently supported values: - CGEN_CPU_OPEN_ISAS: bitmap of values in enum isa_attr - CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr - CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name - CGEN_CPU_OPEN_ENDIAN: specify endian choice - CGEN_CPU_OPEN_END: terminates arguments - - ??? Simultaneous multiple isas might not make sense, but it's not (yet) - precluded. - - ??? We only support ISO C stdargs here, not K&R. - Laziness, plus experiment to see if anything requires K&R - eventually - K&R will no longer be supported - e.g. GDB is currently trying this. */ - -CGEN_CPU_DESC -sh_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) -{ - CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE)); - static int init_p; - unsigned int isas = 0; /* 0 = "unspecified" */ - unsigned int machs = 0; /* 0 = "unspecified" */ - enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN; - va_list ap; - - if (! init_p) - { - init_tables (); - init_p = 1; - } - - memset (cd, 0, sizeof (*cd)); - - va_start (ap, arg_type); - while (arg_type != CGEN_CPU_OPEN_END) - { - switch (arg_type) - { - case CGEN_CPU_OPEN_ISAS : - isas = va_arg (ap, unsigned int); - break; - case CGEN_CPU_OPEN_MACHS : - machs = va_arg (ap, unsigned int); - break; - case CGEN_CPU_OPEN_BFDMACH : - { - const char *name = va_arg (ap, const char *); - const CGEN_MACH *mach = - lookup_mach_via_bfd_name (sh_cgen_mach_table, name); - - machs |= mach->num << 1; - break; - } - case CGEN_CPU_OPEN_ENDIAN : - endian = va_arg (ap, enum cgen_endian); - break; - default : - fprintf (stderr, "sh_cgen_cpu_open: unsupported argument `%d'\n", - arg_type); - abort (); /* ??? return NULL? */ - } - arg_type = va_arg (ap, enum cgen_cpu_open_arg); - } - va_end (ap); - - /* mach unspecified means "all" */ - if (machs == 0) - machs = (1 << MAX_MACHS) - 1; - /* base mach is always selected */ - machs |= 1; - /* isa unspecified means "all" */ - if (isas == 0) - isas = (1 << MAX_ISAS) - 1; - if (endian == CGEN_ENDIAN_UNKNOWN) - { - /* ??? If target has only one, could have a default. */ - fprintf (stderr, "sh_cgen_cpu_open: no endianness specified\n"); - abort (); - } - - cd->isas = isas; - cd->machs = machs; - cd->endian = endian; - /* FIXME: for the sparc case we can determine insn-endianness statically. - The worry here is where both data and insn endian can be independently - chosen, in which case this function will need another argument. - Actually, will want to allow for more arguments in the future anyway. */ - cd->insn_endian = endian; - - /* Table (re)builder. */ - cd->rebuild_tables = sh_cgen_rebuild_tables; - sh_cgen_rebuild_tables (cd); - - /* Default to not allowing signed overflow. */ - cd->signed_overflow_ok_p = 0; - - return (CGEN_CPU_DESC) cd; -} - -/* Cover fn to sh_cgen_cpu_open to handle the simple case of 1 isa, 1 mach. - MACH_NAME is the bfd name of the mach. */ - -CGEN_CPU_DESC -sh_cgen_cpu_open_1 (mach_name, endian) - const char *mach_name; - enum cgen_endian endian; -{ - return sh_cgen_cpu_open (CGEN_CPU_OPEN_BFDMACH, mach_name, - CGEN_CPU_OPEN_ENDIAN, endian, - CGEN_CPU_OPEN_END); -} - -/* Close a cpu table. - ??? This can live in a machine independent file, but there's currently - no place to put this file (there's no libcgen). libopcodes is the wrong - place as some simulator ports use this but they don't use libopcodes. */ - -void -sh_cgen_cpu_close (cd) - CGEN_CPU_DESC cd; -{ - if (cd->insn_table.init_entries) - free ((CGEN_INSN *) cd->insn_table.init_entries); - if (cd->hw_table.entries) - free ((CGEN_HW_ENTRY *) cd->hw_table.entries); - free (cd); -} - diff --git a/sim/sh64/sh-desc.h b/sim/sh64/sh-desc.h deleted file mode 100644 index 30402cc53fa..00000000000 --- a/sim/sh64/sh-desc.h +++ /dev/null @@ -1,249 +0,0 @@ -/* CPU data header for sh. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Binutils and/or GDB, the GNU debugger. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef SH_CPU_H -#define SH_CPU_H - -#define CGEN_ARCH sh - -/* Given symbol S, return sh_cgen_. */ -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) -#define CGEN_SYM(s) sh##_cgen_##s -#else -#define CGEN_SYM(s) sh/**/_cgen_/**/s -#endif - - -/* Selected cpu families. */ -#define HAVE_CPU_SH64 - -#define CGEN_INSN_LSB0_P 1 - -/* Minimum size of any insn (in bytes). */ -#define CGEN_MIN_INSN_SIZE 2 - -/* Maximum size of any insn (in bytes). */ -#define CGEN_MAX_INSN_SIZE 4 - -#define CGEN_INT_INSN_P 1 - -/* Maximum nymber of syntax bytes in an instruction. */ -#define CGEN_ACTUAL_MAX_SYNTAX_BYTES 22 - -/* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands. - e.g. In "b,a foo" the ",a" is an operand. If mnemonics have operands - we can't hash on everything up to the space. */ -#define CGEN_MNEMONIC_OPERANDS - -/* Maximum number of fields in an instruction. */ -#define CGEN_ACTUAL_MAX_IFMT_OPERANDS 8 - -/* Enums. */ - -/* Enum declaration for . */ -typedef enum frc_names { - H_FRC_FR0, H_FRC_FR1, H_FRC_FR2, H_FRC_FR3 - , H_FRC_FR4, H_FRC_FR5, H_FRC_FR6, H_FRC_FR7 - , H_FRC_FR8, H_FRC_FR9, H_FRC_FR10, H_FRC_FR11 - , H_FRC_FR12, H_FRC_FR13, H_FRC_FR14, H_FRC_FR15 -} FRC_NAMES; - -/* Enum declaration for . */ -typedef enum drc_names { - H_DRC_DR0 = 0, H_DRC_DR2 = 2, H_DRC_DR4 = 4, H_DRC_DR6 = 6 - , H_DRC_DR8 = 8, H_DRC_DR10 = 10, H_DRC_DR12 = 12, H_DRC_DR14 = 14 -} DRC_NAMES; - -/* Enum declaration for . */ -typedef enum xf_names { - H_XF_XF0, H_XF_XF1, H_XF_XF2, H_XF_XF3 - , H_XF_XF4, H_XF_XF5, H_XF_XF6, H_XF_XF7 - , H_XF_XF8, H_XF_XF9, H_XF_XF10, H_XF_XF11 - , H_XF_XF12, H_XF_XF13, H_XF_XF14, H_XF_XF15 -} XF_NAMES; - -/* Attributes. */ - -/* Enum declaration for machine type selection. */ -typedef enum mach_attr { - MACH_BASE, MACH_SH2, MACH_SH3, MACH_SH3E - , MACH_SH4, MACH_SH5, MACH_MAX -} MACH_ATTR; - -/* Enum declaration for instruction set selection. */ -typedef enum isa_attr { - ISA_COMPACT, ISA_MEDIA, ISA_MAX -} ISA_ATTR; - -/* Number of architecture variants. */ -#define MAX_ISAS ((int) ISA_MAX) -#define MAX_MACHS ((int) MACH_MAX) - -/* Ifield attribute indices. */ - -/* Enum declaration for cgen_ifld attrs. */ -typedef enum cgen_ifld_attr { - CGEN_IFLD_VIRTUAL, CGEN_IFLD_PCREL_ADDR, CGEN_IFLD_ABS_ADDR, CGEN_IFLD_RESERVED - , CGEN_IFLD_SIGN_OPT, CGEN_IFLD_SIGNED, CGEN_IFLD_END_BOOLS, CGEN_IFLD_START_NBOOLS = 31 - , CGEN_IFLD_MACH, CGEN_IFLD_ISA, CGEN_IFLD_END_NBOOLS -} CGEN_IFLD_ATTR; - -/* Number of non-boolean elements in cgen_ifld_attr. */ -#define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1) - -/* Enum declaration for sh ifield types. */ -typedef enum ifield_type { - SH_F_NIL, SH_F_ANYOF, SH_F_OP4, SH_F_OP8 - , SH_F_OP16, SH_F_SUB4, SH_F_SUB8, SH_F_SUB10 - , SH_F_RN, SH_F_RM, SH_F_8_1, SH_F_DISP8 - , SH_F_DISP12, SH_F_IMM8, SH_F_IMM4, SH_F_IMM4X2 - , SH_F_IMM4X4, SH_F_IMM8X2, SH_F_IMM8X4, SH_F_DN - , SH_F_DM, SH_F_VN, SH_F_VM, SH_F_XN - , SH_F_XM, SH_F_OP, SH_F_EXT, SH_F_RSVD - , SH_F_LEFT, SH_F_RIGHT, SH_F_DEST, SH_F_LEFT_RIGHT - , SH_F_TRA, SH_F_TRB, SH_F_LIKELY, SH_F_25 - , SH_F_8_2, SH_F_IMM6, SH_F_IMM10, SH_F_IMM16 - , SH_F_UIMM6, SH_F_UIMM16, SH_F_DISP6, SH_F_DISP6X32 - , SH_F_DISP10, SH_F_DISP10X8, SH_F_DISP10X4, SH_F_DISP10X2 - , SH_F_DISP16, SH_F_MAX -} IFIELD_TYPE; - -#define MAX_IFLD ((int) SH_F_MAX) - -/* Hardware attribute indices. */ - -/* Enum declaration for cgen_hw attrs. */ -typedef enum cgen_hw_attr { - CGEN_HW_VIRTUAL, CGEN_HW_CACHE_ADDR, CGEN_HW_PC, CGEN_HW_PROFILE - , CGEN_HW_END_BOOLS, CGEN_HW_START_NBOOLS = 31, CGEN_HW_MACH, CGEN_HW_END_NBOOLS -} CGEN_HW_ATTR; - -/* Number of non-boolean elements in cgen_hw_attr. */ -#define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1) - -/* Enum declaration for sh hardware types. */ -typedef enum cgen_hw_type { - HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR - , HW_H_IADDR, HW_H_PC, HW_H_GR, HW_H_GRC - , HW_H_CR, HW_H_SR, HW_H_FPSCR, HW_H_FRBIT - , HW_H_SZBIT, HW_H_PRBIT, HW_H_SBIT, HW_H_MBIT - , HW_H_QBIT, HW_H_FR, HW_H_FP, HW_H_FV - , HW_H_FMTX, HW_H_DR, HW_H_TR, HW_H_ENDIAN - , HW_H_ISM, HW_H_FRC, HW_H_DRC, HW_H_XF - , HW_H_XD, HW_H_FVC, HW_H_FPCCR, HW_H_GBR - , HW_H_PR, HW_H_MACL, HW_H_MACH, HW_H_TBIT - , HW_MAX -} CGEN_HW_TYPE; - -#define MAX_HW ((int) HW_MAX) - -/* Operand attribute indices. */ - -/* Enum declaration for cgen_operand attrs. */ -typedef enum cgen_operand_attr { - CGEN_OPERAND_VIRTUAL, CGEN_OPERAND_PCREL_ADDR, CGEN_OPERAND_ABS_ADDR, CGEN_OPERAND_SIGN_OPT - , CGEN_OPERAND_SIGNED, CGEN_OPERAND_NEGATIVE, CGEN_OPERAND_RELAX, CGEN_OPERAND_SEM_ONLY - , CGEN_OPERAND_END_BOOLS, CGEN_OPERAND_START_NBOOLS = 31, CGEN_OPERAND_MACH, CGEN_OPERAND_ISA - , CGEN_OPERAND_END_NBOOLS -} CGEN_OPERAND_ATTR; - -/* Number of non-boolean elements in cgen_operand_attr. */ -#define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1) - -/* Enum declaration for sh operand types. */ -typedef enum cgen_operand_type { - SH_OPERAND_PC, SH_OPERAND_ENDIAN, SH_OPERAND_ISM, SH_OPERAND_RM - , SH_OPERAND_RN, SH_OPERAND_R0, SH_OPERAND_FRN, SH_OPERAND_FRM - , SH_OPERAND_FVN, SH_OPERAND_FVM, SH_OPERAND_DRN, SH_OPERAND_DRM - , SH_OPERAND_IMM4, SH_OPERAND_IMM8, SH_OPERAND_UIMM8, SH_OPERAND_IMM4X2 - , SH_OPERAND_IMM4X4, SH_OPERAND_IMM8X2, SH_OPERAND_IMM8X4, SH_OPERAND_DISP8 - , SH_OPERAND_DISP12, SH_OPERAND_RM64, SH_OPERAND_RN64, SH_OPERAND_GBR - , SH_OPERAND_PR, SH_OPERAND_FPSCR, SH_OPERAND_TBIT, SH_OPERAND_SBIT - , SH_OPERAND_MBIT, SH_OPERAND_QBIT, SH_OPERAND_FPUL, SH_OPERAND_FRBIT - , SH_OPERAND_SZBIT, SH_OPERAND_PRBIT, SH_OPERAND_MACL, SH_OPERAND_MACH - , SH_OPERAND_FSDM, SH_OPERAND_FSDN, SH_OPERAND_RD, SH_OPERAND_FRG - , SH_OPERAND_FRH, SH_OPERAND_FRF, SH_OPERAND_FRGH, SH_OPERAND_FPF - , SH_OPERAND_FVG, SH_OPERAND_FVH, SH_OPERAND_FVF, SH_OPERAND_MTRXG - , SH_OPERAND_DRG, SH_OPERAND_DRH, SH_OPERAND_DRF, SH_OPERAND_DRGH - , SH_OPERAND_CRJ, SH_OPERAND_CRK, SH_OPERAND_TRA, SH_OPERAND_TRB - , SH_OPERAND_DISP6, SH_OPERAND_DISP6X32, SH_OPERAND_DISP10, SH_OPERAND_DISP10X2 - , SH_OPERAND_DISP10X4, SH_OPERAND_DISP10X8, SH_OPERAND_DISP16, SH_OPERAND_IMM6 - , SH_OPERAND_IMM10, SH_OPERAND_IMM16, SH_OPERAND_UIMM6, SH_OPERAND_UIMM16 - , SH_OPERAND_LIKELY, SH_OPERAND_MAX -} CGEN_OPERAND_TYPE; - -/* Number of operands types. */ -#define MAX_OPERANDS 72 - -/* Maximum number of operands referenced by any insn. */ -#define MAX_OPERAND_INSTANCES 8 - -/* Insn attribute indices. */ - -/* Enum declaration for cgen_insn attrs. */ -typedef enum cgen_insn_attr { - CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI - , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAX - , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_ILLSLOT, CGEN_INSN_FP_INSN - , CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31, CGEN_INSN_MACH, CGEN_INSN_ISA - , CGEN_INSN_END_NBOOLS -} CGEN_INSN_ATTR; - -/* Number of non-boolean elements in cgen_insn_attr. */ -#define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1) - -/* cgen.h uses things we just defined. */ -#include "opcode/cgen.h" - -/* Attributes. */ -extern const CGEN_ATTR_TABLE sh_cgen_hardware_attr_table[]; -extern const CGEN_ATTR_TABLE sh_cgen_ifield_attr_table[]; -extern const CGEN_ATTR_TABLE sh_cgen_operand_attr_table[]; -extern const CGEN_ATTR_TABLE sh_cgen_insn_attr_table[]; - -/* Hardware decls. */ - -extern CGEN_KEYWORD sh_cgen_opval_h_gr; -extern CGEN_KEYWORD sh_cgen_opval_h_grc; -extern CGEN_KEYWORD sh_cgen_opval_h_cr; -extern CGEN_KEYWORD sh_cgen_opval_h_fr; -extern CGEN_KEYWORD sh_cgen_opval_h_fp; -extern CGEN_KEYWORD sh_cgen_opval_h_fv; -extern CGEN_KEYWORD sh_cgen_opval_h_fmtx; -extern CGEN_KEYWORD sh_cgen_opval_h_dr; -extern CGEN_KEYWORD sh_cgen_opval_h_tr; -extern CGEN_KEYWORD sh_cgen_opval_frc_names; -extern CGEN_KEYWORD sh_cgen_opval_drc_names; -extern CGEN_KEYWORD sh_cgen_opval_xf_names; -extern CGEN_KEYWORD sh_cgen_opval_frc_names; -extern CGEN_KEYWORD sh_cgen_opval_h_fvc; - -/* Ifield support. */ - -extern const struct cgen_ifld sh_cgen_ifld_table[]; - - - - -#endif /* SH_CPU_H */ diff --git a/sim/sh64/sh-opc.h b/sim/sh64/sh-opc.h deleted file mode 100644 index 3e0b8e25ec5..00000000000 --- a/sim/sh64/sh-opc.h +++ /dev/null @@ -1,216 +0,0 @@ -/* Instruction opcode header for sh. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Binutils and/or GDB, the GNU debugger. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef SH_OPC_H -#define SH_OPC_H - -/* -- opc.h */ - -/* Allows reason codes to be output when assembler errors occur. */ -#define CGEN_VERBOSE_ASSEMBLER_ERRORS - -/* Override disassembly hashing - there are variable bits in the top - byte of these instructions. */ -#define CGEN_DIS_HASH_SIZE 8 -#define CGEN_DIS_HASH(buf,value) (((* (unsigned char*) (buf)) >> 6) % CGEN_DIS_HASH_SIZE) - -/* -- asm.c */ -/* Enum declaration for sh instruction types. */ -typedef enum cgen_insn_type { - SH_INSN_INVALID, SH_INSN_ADD_COMPACT, SH_INSN_ADDI_COMPACT, SH_INSN_ADDC_COMPACT - , SH_INSN_ADDV_COMPACT, SH_INSN_AND_COMPACT, SH_INSN_ANDI_COMPACT, SH_INSN_ANDB_COMPACT - , SH_INSN_BF_COMPACT, SH_INSN_BFS_COMPACT, SH_INSN_BRA_COMPACT, SH_INSN_BRAF_COMPACT - , SH_INSN_BRK_COMPACT, SH_INSN_BSR_COMPACT, SH_INSN_BSRF_COMPACT, SH_INSN_BT_COMPACT - , SH_INSN_BTS_COMPACT, SH_INSN_CLRMAC_COMPACT, SH_INSN_CLRS_COMPACT, SH_INSN_CLRT_COMPACT - , SH_INSN_CMPEQ_COMPACT, SH_INSN_CMPEQI_COMPACT, SH_INSN_CMPGE_COMPACT, SH_INSN_CMPGT_COMPACT - , SH_INSN_CMPHI_COMPACT, SH_INSN_CMPHS_COMPACT, SH_INSN_CMPPL_COMPACT, SH_INSN_CMPPZ_COMPACT - , SH_INSN_CMPSTR_COMPACT, SH_INSN_DIV0S_COMPACT, SH_INSN_DIV0U_COMPACT, SH_INSN_DIV1_COMPACT - , SH_INSN_DMULSL_COMPACT, SH_INSN_DMULUL_COMPACT, SH_INSN_DT_COMPACT, SH_INSN_EXTSB_COMPACT - , SH_INSN_EXTSW_COMPACT, SH_INSN_EXTUB_COMPACT, SH_INSN_EXTUW_COMPACT, SH_INSN_FABS_COMPACT - , SH_INSN_FADD_COMPACT, SH_INSN_FCMPEQ_COMPACT, SH_INSN_FCMPGT_COMPACT, SH_INSN_FCNVDS_COMPACT - , SH_INSN_FCNVSD_COMPACT, SH_INSN_FDIV_COMPACT, SH_INSN_FIPR_COMPACT, SH_INSN_FLDS_COMPACT - , SH_INSN_FLDI0_COMPACT, SH_INSN_FLDI1_COMPACT, SH_INSN_FLOAT_COMPACT, SH_INSN_FMAC_COMPACT - , SH_INSN_FMOV1_COMPACT, SH_INSN_FMOV2_COMPACT, SH_INSN_FMOV3_COMPACT, SH_INSN_FMOV4_COMPACT - , SH_INSN_FMOV5_COMPACT, SH_INSN_FMOV6_COMPACT, SH_INSN_FMOV7_COMPACT, SH_INSN_FMUL_COMPACT - , SH_INSN_FNEG_COMPACT, SH_INSN_FRCHG_COMPACT, SH_INSN_FSCHG_COMPACT, SH_INSN_FSQRT_COMPACT - , SH_INSN_FSTS_COMPACT, SH_INSN_FSUB_COMPACT, SH_INSN_FTRC_COMPACT, SH_INSN_FTRV_COMPACT - , SH_INSN_JMP_COMPACT, SH_INSN_JSR_COMPACT, SH_INSN_LDC_COMPACT, SH_INSN_LDCL_COMPACT - , SH_INSN_LDS_FPSCR_COMPACT, SH_INSN_LDSL_FPSCR_COMPACT, SH_INSN_LDS_FPUL_COMPACT, SH_INSN_LDSL_FPUL_COMPACT - , SH_INSN_LDS_MACH_COMPACT, SH_INSN_LDSL_MACH_COMPACT, SH_INSN_LDS_MACL_COMPACT, SH_INSN_LDSL_MACL_COMPACT - , SH_INSN_LDS_PR_COMPACT, SH_INSN_LDSL_PR_COMPACT, SH_INSN_MACL_COMPACT, SH_INSN_MACW_COMPACT - , SH_INSN_MOV_COMPACT, SH_INSN_MOVI_COMPACT, SH_INSN_MOVB1_COMPACT, SH_INSN_MOVB2_COMPACT - , SH_INSN_MOVB3_COMPACT, SH_INSN_MOVB4_COMPACT, SH_INSN_MOVB5_COMPACT, SH_INSN_MOVB6_COMPACT - , SH_INSN_MOVB7_COMPACT, SH_INSN_MOVB8_COMPACT, SH_INSN_MOVB9_COMPACT, SH_INSN_MOVB10_COMPACT - , SH_INSN_MOVL1_COMPACT, SH_INSN_MOVL2_COMPACT, SH_INSN_MOVL3_COMPACT, SH_INSN_MOVL4_COMPACT - , SH_INSN_MOVL5_COMPACT, SH_INSN_MOVL6_COMPACT, SH_INSN_MOVL7_COMPACT, SH_INSN_MOVL8_COMPACT - , SH_INSN_MOVL9_COMPACT, SH_INSN_MOVL10_COMPACT, SH_INSN_MOVL11_COMPACT, SH_INSN_MOVW1_COMPACT - , SH_INSN_MOVW2_COMPACT, SH_INSN_MOVW3_COMPACT, SH_INSN_MOVW4_COMPACT, SH_INSN_MOVW5_COMPACT - , SH_INSN_MOVW6_COMPACT, SH_INSN_MOVW7_COMPACT, SH_INSN_MOVW8_COMPACT, SH_INSN_MOVW9_COMPACT - , SH_INSN_MOVW10_COMPACT, SH_INSN_MOVW11_COMPACT, SH_INSN_MOVA_COMPACT, SH_INSN_MOVCAL_COMPACT - , SH_INSN_MOVT_COMPACT, SH_INSN_MULL_COMPACT, SH_INSN_MULSW_COMPACT, SH_INSN_MULUW_COMPACT - , SH_INSN_NEG_COMPACT, SH_INSN_NEGC_COMPACT, SH_INSN_NOP_COMPACT, SH_INSN_NOT_COMPACT - , SH_INSN_OCBI_COMPACT, SH_INSN_OCBP_COMPACT, SH_INSN_OCBWB_COMPACT, SH_INSN_OR_COMPACT - , SH_INSN_ORI_COMPACT, SH_INSN_ORB_COMPACT, SH_INSN_PREF_COMPACT, SH_INSN_ROTCL_COMPACT - , SH_INSN_ROTCR_COMPACT, SH_INSN_ROTL_COMPACT, SH_INSN_ROTR_COMPACT, SH_INSN_RTS_COMPACT - , SH_INSN_SETS_COMPACT, SH_INSN_SETT_COMPACT, SH_INSN_SHAD_COMPACT, SH_INSN_SHAL_COMPACT - , SH_INSN_SHAR_COMPACT, SH_INSN_SHLD_COMPACT, SH_INSN_SHLL_COMPACT, SH_INSN_SHLL2_COMPACT - , SH_INSN_SHLL8_COMPACT, SH_INSN_SHLL16_COMPACT, SH_INSN_SHLR_COMPACT, SH_INSN_SHLR2_COMPACT - , SH_INSN_SHLR8_COMPACT, SH_INSN_SHLR16_COMPACT, SH_INSN_STC_GBR_COMPACT, SH_INSN_STCL_GBR_COMPACT - , SH_INSN_STS_FPSCR_COMPACT, SH_INSN_STSL_FPSCR_COMPACT, SH_INSN_STS_FPUL_COMPACT, SH_INSN_STSL_FPUL_COMPACT - , SH_INSN_STS_MACH_COMPACT, SH_INSN_STSL_MACH_COMPACT, SH_INSN_STS_MACL_COMPACT, SH_INSN_STSL_MACL_COMPACT - , SH_INSN_STS_PR_COMPACT, SH_INSN_STSL_PR_COMPACT, SH_INSN_SUB_COMPACT, SH_INSN_SUBC_COMPACT - , SH_INSN_SUBV_COMPACT, SH_INSN_SWAPB_COMPACT, SH_INSN_SWAPW_COMPACT, SH_INSN_TASB_COMPACT - , SH_INSN_TRAPA_COMPACT, SH_INSN_TST_COMPACT, SH_INSN_TSTI_COMPACT, SH_INSN_TSTB_COMPACT - , SH_INSN_XOR_COMPACT, SH_INSN_XORI_COMPACT, SH_INSN_XORB_COMPACT, SH_INSN_XTRCT_COMPACT - , SH_INSN_ADD, SH_INSN_ADDL, SH_INSN_ADDI, SH_INSN_ADDIL - , SH_INSN_ADDZL, SH_INSN_ALLOCO, SH_INSN_AND, SH_INSN_ANDC - , SH_INSN_ANDI, SH_INSN_BEQ, SH_INSN_BEQI, SH_INSN_BGE - , SH_INSN_BGEU, SH_INSN_BGT, SH_INSN_BGTU, SH_INSN_BLINK - , SH_INSN_BNE, SH_INSN_BNEI, SH_INSN_BRK, SH_INSN_BYTEREV - , SH_INSN_CMPEQ, SH_INSN_CMPGT, SH_INSN_CMPGTU, SH_INSN_CMVEQ - , SH_INSN_CMVNE, SH_INSN_FABSD, SH_INSN_FABSS, SH_INSN_FADDD - , SH_INSN_FADDS, SH_INSN_FCMPEQD, SH_INSN_FCMPEQS, SH_INSN_FCMPGED - , SH_INSN_FCMPGES, SH_INSN_FCMPGTD, SH_INSN_FCMPGTS, SH_INSN_FCMPUND - , SH_INSN_FCMPUNS, SH_INSN_FCNVDS, SH_INSN_FCNVSD, SH_INSN_FDIVD - , SH_INSN_FDIVS, SH_INSN_FGETSCR, SH_INSN_FIPRS, SH_INSN_FLDD - , SH_INSN_FLDP, SH_INSN_FLDS, SH_INSN_FLDXD, SH_INSN_FLDXP - , SH_INSN_FLDXS, SH_INSN_FLOATLD, SH_INSN_FLOATLS, SH_INSN_FLOATQD - , SH_INSN_FLOATQS, SH_INSN_FMACS, SH_INSN_FMOVD, SH_INSN_FMOVDQ - , SH_INSN_FMOVLS, SH_INSN_FMOVQD, SH_INSN_FMOVS, SH_INSN_FMOVSL - , SH_INSN_FMULD, SH_INSN_FMULS, SH_INSN_FNEGD, SH_INSN_FNEGS - , SH_INSN_FPUTSCR, SH_INSN_FSQRTD, SH_INSN_FSQRTS, SH_INSN_FSTD - , SH_INSN_FSTP, SH_INSN_FSTS, SH_INSN_FSTXD, SH_INSN_FSTXP - , SH_INSN_FSTXS, SH_INSN_FSUBD, SH_INSN_FSUBS, SH_INSN_FTRCDL - , SH_INSN_FTRCSL, SH_INSN_FTRCDQ, SH_INSN_FTRCSQ, SH_INSN_FTRVS - , SH_INSN_GETCFG, SH_INSN_GETCON, SH_INSN_GETTR, SH_INSN_ICBI - , SH_INSN_LDB, SH_INSN_LDL, SH_INSN_LDQ, SH_INSN_LDUB - , SH_INSN_LDUW, SH_INSN_LDW, SH_INSN_LDHIL, SH_INSN_LDHIQ - , SH_INSN_LDLOL, SH_INSN_LDLOQ, SH_INSN_LDXB, SH_INSN_LDXL - , SH_INSN_LDXQ, SH_INSN_LDXUB, SH_INSN_LDXUW, SH_INSN_LDXW - , SH_INSN_MABSL, SH_INSN_MABSW, SH_INSN_MADDL, SH_INSN_MADDW - , SH_INSN_MADDSL, SH_INSN_MADDSUB, SH_INSN_MADDSW, SH_INSN_MCMPEQB - , SH_INSN_MCMPEQL, SH_INSN_MCMPEQW, SH_INSN_MCMPGTL, SH_INSN_MCMPGTUB - , SH_INSN_MCMPGTW, SH_INSN_MCMV, SH_INSN_MCNVSLW, SH_INSN_MCNVSWB - , SH_INSN_MCNVSWUB, SH_INSN_MEXTR1, SH_INSN_MEXTR2, SH_INSN_MEXTR3 - , SH_INSN_MEXTR4, SH_INSN_MEXTR5, SH_INSN_MEXTR6, SH_INSN_MEXTR7 - , SH_INSN_MMACFXWL, SH_INSN_MMACNFX_WL, SH_INSN_MMULL, SH_INSN_MMULW - , SH_INSN_MMULFXL, SH_INSN_MMULFXW, SH_INSN_MMULFXRPW, SH_INSN_MMULHIWL - , SH_INSN_MMULLOWL, SH_INSN_MMULSUMWQ, SH_INSN_MOVI, SH_INSN_MPERMW - , SH_INSN_MSADUBQ, SH_INSN_MSHALDSL, SH_INSN_MSHALDSW, SH_INSN_MSHARDL - , SH_INSN_MSHARDW, SH_INSN_MSHARDSQ, SH_INSN_MSHFHIB, SH_INSN_MSHFHIL - , SH_INSN_MSHFHIW, SH_INSN_MSHFLOB, SH_INSN_MSHFLOL, SH_INSN_MSHFLOW - , SH_INSN_MSHLLDL, SH_INSN_MSHLLDW, SH_INSN_MSHLRDL, SH_INSN_MSHLRDW - , SH_INSN_MSUBL, SH_INSN_MSUBW, SH_INSN_MSUBSL, SH_INSN_MSUBSUB - , SH_INSN_MSUBSW, SH_INSN_MULSL, SH_INSN_MULUL, SH_INSN_NOP - , SH_INSN_NSB, SH_INSN_OCBI, SH_INSN_OCBP, SH_INSN_OCBWB - , SH_INSN_OR, SH_INSN_ORI, SH_INSN_PREFI, SH_INSN_PTA - , SH_INSN_PTABS, SH_INSN_PTB, SH_INSN_PTREL, SH_INSN_PUTCFG - , SH_INSN_PUTCON, SH_INSN_RTE, SH_INSN_SHARD, SH_INSN_SHARDL - , SH_INSN_SHARI, SH_INSN_SHARIL, SH_INSN_SHLLD, SH_INSN_SHLLDL - , SH_INSN_SHLLI, SH_INSN_SHLLIL, SH_INSN_SHLRD, SH_INSN_SHLRDL - , SH_INSN_SHLRI, SH_INSN_SHLRIL, SH_INSN_SHORI, SH_INSN_SLEEP - , SH_INSN_STB, SH_INSN_STL, SH_INSN_STQ, SH_INSN_STW - , SH_INSN_STHIL, SH_INSN_STHIQ, SH_INSN_STLOL, SH_INSN_STLOQ - , SH_INSN_STXB, SH_INSN_STXL, SH_INSN_STXQ, SH_INSN_STXW - , SH_INSN_SUB, SH_INSN_SUBL, SH_INSN_SWAPQ, SH_INSN_SYNCI - , SH_INSN_SYNCO, SH_INSN_TRAPA, SH_INSN_XOR, SH_INSN_XORI - , SH_INSN_MAX -} CGEN_INSN_TYPE; - -/* Index of `invalid' insn place holder. */ -#define CGEN_INSN_INVALID SH_INSN_INVALID - -/* Total number of insns in table. */ -#define MAX_INSNS ((int) SH_INSN_MAX) - -/* This struct records data prior to insertion or after extraction. */ -struct cgen_fields -{ - int length; - long f_nil; - long f_anyof; - long f_op4; - long f_op8; - long f_op16; - long f_sub4; - long f_sub8; - long f_sub10; - long f_rn; - long f_rm; - long f_8_1; - long f_disp8; - long f_disp12; - long f_imm8; - long f_imm4; - long f_imm4x2; - long f_imm4x4; - long f_imm8x2; - long f_imm8x4; - long f_dn; - long f_dm; - long f_vn; - long f_vm; - long f_xn; - long f_xm; - long f_op; - long f_ext; - long f_rsvd; - long f_left; - long f_right; - long f_dest; - long f_left_right; - long f_tra; - long f_trb; - long f_likely; - long f_25; - long f_8_2; - long f_imm6; - long f_imm10; - long f_imm16; - long f_uimm6; - long f_uimm16; - long f_disp6; - long f_disp6x32; - long f_disp10; - long f_disp10x8; - long f_disp10x4; - long f_disp10x2; - long f_disp16; -}; - -#define CGEN_INIT_PARSE(od) \ -{\ -} -#define CGEN_INIT_INSERT(od) \ -{\ -} -#define CGEN_INIT_EXTRACT(od) \ -{\ -} -#define CGEN_INIT_PRINT(od) \ -{\ -} - - -#endif /* SH_OPC_H */ diff --git a/sim/sh64/sh64-sim.h b/sim/sh64/sh64-sim.h deleted file mode 100644 index fc3ed7add09..00000000000 --- a/sim/sh64/sh64-sim.h +++ /dev/null @@ -1,89 +0,0 @@ -/* collection of junk waiting time to sort out - Copyright (C) 2000 Free Software Foundation, Inc. - Contributed by Red Hat, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#ifndef SH64_SIM_H -#define SH64_SIM_H - -#define GETTWI GETTSI -#define SETTWI SETTSI - - -enum { - ISM_COMPACT, ISM_MEDIA -}; - -/* Hardware/device support. */ -extern device sh5_devices; - -/* FIXME: Temporary, until device support ready. */ -struct _device { int foo; }; - -extern IDESC * sh64_idesc_media; -extern IDESC * sh64_idesc_compact; - -/* Function prototypes from sh64.c. */ - -BI sh64_endian (SIM_CPU *); -VOID sh64_break (SIM_CPU *, PCADDR); -VOID sh64_trapa (SIM_CPU *, DI, PCADDR); -VOID sh64_compact_trapa (SIM_CPU *, UQI, PCADDR); - -SF sh64_fldi0 (SIM_CPU *); -SF sh64_fldi1 (SIM_CPU *); -DF sh64_fcnvsd (SIM_CPU *, SF); -SF sh64_fcnvds (SIM_CPU *, DF); - -DF sh64_fabsd (SIM_CPU *, DF); -SF sh64_fabss (SIM_CPU *, SF); -DF sh64_faddd (SIM_CPU *, DF, DF); -SF sh64_fadds (SIM_CPU *, SF, SF); -DF sh64_fdivd (SIM_CPU *, DF, DF); -SF sh64_fdivs (SIM_CPU *, SF, SF); -DF sh64_floatld (SIM_CPU *, SF); -SF sh64_floatls (SIM_CPU *, SF); -DF sh64_floatqd (SIM_CPU *, DF); -SF sh64_floatqs (SIM_CPU *, DF); -SF sh64_fmacs(SIM_CPU *, SF, SF, SF); -DF sh64_fmuld (SIM_CPU *, DF, DF); -SF sh64_fmuls (SIM_CPU *, SF, SF); -DF sh64_fnegd (SIM_CPU *, DF); -SF sh64_fnegs (SIM_CPU *, SF); -DF sh64_fsqrtd (SIM_CPU *, DF); -SF sh64_fsqrts (SIM_CPU *, SF); -DF sh64_fsubd (SIM_CPU *, DF, DF); -SF sh64_fsubs (SIM_CPU *, SF, SF); -SF sh64_ftrcdl (SIM_CPU *, DF); -DF sh64_ftrcdq (SIM_CPU *, DF); -SF sh64_ftrcsl (SIM_CPU *, SF); -DF sh64_ftrcsq (SIM_CPU *, SF); -VOID sh64_ftrvs (SIM_CPU *, unsigned, unsigned, unsigned); - -BI sh64_fcmpeqs (SIM_CPU *, SF, SF); -BI sh64_fcmpeqd (SIM_CPU *, DF, DF); -BI sh64_fcmpges (SIM_CPU *, SF, SF); -BI sh64_fcmpged (SIM_CPU *, DF, DF); -BI sh64_fcmpgts (SIM_CPU *, SF, SF); -BI sh64_fcmpgtd (SIM_CPU *, DF, DF); -BI sh64_fcmpund (SIM_CPU *, DF, DF); -BI sh64_fcmpuns (SIM_CPU *, SF, SF); - -DI sh64_nsb (SIM_CPU *, DI); - -#endif /* SH64_SIM_H */ diff --git a/sim/sh64/sh64.c b/sim/sh64/sh64.c deleted file mode 100644 index 12ce3f69a66..00000000000 --- a/sim/sh64/sh64.c +++ /dev/null @@ -1,1030 +0,0 @@ -/* SH5 simulator support code - Copyright (C) 2000, 2001 Free Software Foundation, Inc. - Contributed by Red Hat, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#define WANT_CPU -#define WANT_CPU_SH64 - -#include "sim-main.h" -#include "sim-fpu.h" -#include "cgen-mem.h" -#include "cgen-ops.h" - -#include "gdb/callback.h" -#include "defs-compact.h" - -#include "bfd.h" -/* From include/gdb/. */ -#include "gdb/sim-sh.h" - -#define SYS_exit 1 -#define SYS_read 3 -#define SYS_write 4 -#define SYS_open 5 -#define SYS_close 6 -#define SYS_lseek 19 -#define SYS_time 23 -#define SYS_argc 172 -#define SYS_argnlen 173 -#define SYS_argn 174 - -IDESC * sh64_idesc_media; -IDESC * sh64_idesc_compact; - -BI -sh64_endian (SIM_CPU *current_cpu) -{ - return (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN); -} - -SF -sh64_fldi0 (SIM_CPU *current_cpu) -{ - SF result; - sim_fpu_to32 (&result, &sim_fpu_zero); - return result; -} - -SF -sh64_fldi1 (SIM_CPU *current_cpu) -{ - SF result; - sim_fpu_to32 (&result, &sim_fpu_one); - return result; -} - -DF -sh64_fabsd(SIM_CPU *current_cpu, DF drgh) -{ - DF result; - sim_fpu f, fres; - - sim_fpu_64to (&f, drgh); - sim_fpu_abs (&fres, &f); - sim_fpu_to64 (&result, &fres); - return result; -} - -SF -sh64_fabss(SIM_CPU *current_cpu, SF frgh) -{ - SF result; - sim_fpu f, fres; - - sim_fpu_32to (&f, frgh); - sim_fpu_abs (&fres, &f); - sim_fpu_to32 (&result, &fres); - return result; -} - -DF -sh64_faddd(SIM_CPU *current_cpu, DF drg, DF drh) -{ - DF result; - sim_fpu f1, f2, fres; - - sim_fpu_64to (&f1, drg); - sim_fpu_64to (&f2, drh); - sim_fpu_add (&fres, &f1, &f2); - sim_fpu_to64 (&result, &fres); - return result; -} - -SF -sh64_fadds(SIM_CPU *current_cpu, SF frg, SF frh) -{ - SF result; - sim_fpu f1, f2, fres; - - sim_fpu_32to (&f1, frg); - sim_fpu_32to (&f2, frh); - sim_fpu_add (&fres, &f1, &f2); - sim_fpu_to32 (&result, &fres); - return result; -} - -BI -sh64_fcmpeqd(SIM_CPU *current_cpu, DF drg, DF drh) -{ - sim_fpu f1, f2; - - sim_fpu_64to (&f1, drg); - sim_fpu_64to (&f2, drh); - return sim_fpu_is_eq (&f1, &f2); -} - -BI -sh64_fcmpeqs(SIM_CPU *current_cpu, SF frg, SF frh) -{ - sim_fpu f1, f2; - - sim_fpu_32to (&f1, frg); - sim_fpu_32to (&f2, frh); - return sim_fpu_is_eq (&f1, &f2); -} - -BI -sh64_fcmpged(SIM_CPU *current_cpu, DF drg, DF drh) -{ - sim_fpu f1, f2; - - sim_fpu_64to (&f1, drg); - sim_fpu_64to (&f2, drh); - return sim_fpu_is_ge (&f1, &f2); -} - -BI -sh64_fcmpges(SIM_CPU *current_cpu, SF frg, SF frh) -{ - sim_fpu f1, f2; - - sim_fpu_32to (&f1, frg); - sim_fpu_32to (&f2, frh); - return sim_fpu_is_ge (&f1, &f2); -} - -BI -sh64_fcmpgtd(SIM_CPU *current_cpu, DF drg, DF drh) -{ - sim_fpu f1, f2; - - sim_fpu_64to (&f1, drg); - sim_fpu_64to (&f2, drh); - return sim_fpu_is_gt (&f1, &f2); -} - -BI -sh64_fcmpgts(SIM_CPU *current_cpu, SF frg, SF frh) -{ - sim_fpu f1, f2; - - sim_fpu_32to (&f1, frg); - sim_fpu_32to (&f2, frh); - return sim_fpu_is_gt (&f1, &f2); -} - -BI -sh64_fcmpund(SIM_CPU *current_cpu, DF drg, DF drh) -{ - sim_fpu f1, f2; - - sim_fpu_64to (&f1, drg); - sim_fpu_64to (&f2, drh); - return (sim_fpu_is_nan (&f1) || sim_fpu_is_nan (&f2)); -} - -BI -sh64_fcmpuns(SIM_CPU *current_cpu, SF frg, SF frh) -{ - sim_fpu f1, f2; - - sim_fpu_32to (&f1, frg); - sim_fpu_32to (&f2, frh); - return (sim_fpu_is_nan (&f1) || sim_fpu_is_nan (&f2)); -} - -SF -sh64_fcnvds(SIM_CPU *current_cpu, DF drgh) -{ - union { - unsigned long long ll; - double d; - } f1; - - union { - unsigned long l; - float f; - } f2; - - f1.ll = drgh; - f2.f = (float) f1.d; - - return (SF) f2.l; -} - -DF -sh64_fcnvsd(SIM_CPU *current_cpu, SF frgh) -{ - DF result; - sim_fpu f; - - sim_fpu_32to (&f, frgh); - sim_fpu_to64 (&result, &f); - return result; -} - -DF -sh64_fdivd(SIM_CPU *current_cpu, DF drg, DF drh) -{ - DF result; - sim_fpu f1, f2, fres; - - sim_fpu_64to (&f1, drg); - sim_fpu_64to (&f2, drh); - sim_fpu_div (&fres, &f1, &f2); - sim_fpu_to64 (&result, &fres); - return result; -} - -SF -sh64_fdivs(SIM_CPU *current_cpu, SF frg, SF frh) -{ - SF result; - sim_fpu f1, f2, fres; - - sim_fpu_32to (&f1, frg); - sim_fpu_32to (&f2, frh); - sim_fpu_div (&fres, &f1, &f2); - sim_fpu_to32 (&result, &fres); - return result; -} - -DF -sh64_floatld(SIM_CPU *current_cpu, SF frgh) -{ - DF result; - sim_fpu f; - - sim_fpu_i32to (&f, frgh, sim_fpu_round_default); - sim_fpu_to64 (&result, &f); - return result; -} - -SF -sh64_floatls(SIM_CPU *current_cpu, SF frgh) -{ - SF result; - sim_fpu f; - - sim_fpu_i32to (&f, frgh, sim_fpu_round_default); - sim_fpu_to32 (&result, &f); - return result; -} - -DF -sh64_floatqd(SIM_CPU *current_cpu, DF drgh) -{ - DF result; - sim_fpu f; - - sim_fpu_i64to (&f, drgh, sim_fpu_round_default); - sim_fpu_to64 (&result, &f); - return result; -} - -SF -sh64_floatqs(SIM_CPU *current_cpu, DF drgh) -{ - SF result; - sim_fpu f; - - sim_fpu_i64to (&f, drgh, sim_fpu_round_default); - sim_fpu_to32 (&result, &f); - return result; -} - -SF -sh64_fmacs(SIM_CPU *current_cpu, SF fr0, SF frm, SF frn) -{ - SF result; - sim_fpu m1, m2, a1, fres; - - sim_fpu_32to (&m1, fr0); - sim_fpu_32to (&m2, frm); - sim_fpu_32to (&a1, frn); - - sim_fpu_mul (&fres, &m1, &m2); - sim_fpu_add (&fres, &fres, &a1); - - sim_fpu_to32 (&result, &fres); - return result; -} - -DF -sh64_fmuld(SIM_CPU *current_cpu, DF drg, DF drh) -{ - DF result; - sim_fpu f1, f2, fres; - - sim_fpu_64to (&f1, drg); - sim_fpu_64to (&f2, drh); - sim_fpu_mul (&fres, &f1, &f2); - sim_fpu_to64 (&result, &fres); - return result; -} - -SF -sh64_fmuls(SIM_CPU *current_cpu, SF frg, SF frh) -{ - SF result; - sim_fpu f1, f2, fres; - - sim_fpu_32to (&f1, frg); - sim_fpu_32to (&f2, frh); - sim_fpu_mul (&fres, &f1, &f2); - sim_fpu_to32 (&result, &fres); - return result; -} - -DF -sh64_fnegd(SIM_CPU *current_cpu, DF drgh) -{ - DF result; - sim_fpu f1, f2; - - sim_fpu_64to (&f1, drgh); - sim_fpu_neg (&f2, &f1); - sim_fpu_to64 (&result, &f2); - return result; -} - -SF -sh64_fnegs(SIM_CPU *current_cpu, SF frgh) -{ - SF result; - sim_fpu f, fres; - - sim_fpu_32to (&f, frgh); - sim_fpu_neg (&fres, &f); - sim_fpu_to32 (&result, &fres); - return result; -} - -DF -sh64_fsqrtd(SIM_CPU *current_cpu, DF drgh) -{ - DF result; - sim_fpu f, fres; - - sim_fpu_64to (&f, drgh); - sim_fpu_sqrt (&fres, &f); - sim_fpu_to64 (&result, &fres); - return result; -} - -SF -sh64_fsqrts(SIM_CPU *current_cpu, SF frgh) -{ - SF result; - sim_fpu f, fres; - - sim_fpu_32to (&f, frgh); - sim_fpu_sqrt (&fres, &f); - sim_fpu_to32 (&result, &fres); - return result; -} - -DF -sh64_fsubd(SIM_CPU *current_cpu, DF drg, DF drh) -{ - DF result; - sim_fpu f1, f2, fres; - - sim_fpu_64to (&f1, drg); - sim_fpu_64to (&f2, drh); - sim_fpu_sub (&fres, &f1, &f2); - sim_fpu_to64 (&result, &fres); - return result; -} - -SF -sh64_fsubs(SIM_CPU *current_cpu, SF frg, SF frh) -{ - SF result; - sim_fpu f1, f2, fres; - - sim_fpu_32to (&f1, frg); - sim_fpu_32to (&f2, frh); - sim_fpu_sub (&fres, &f1, &f2); - sim_fpu_to32 (&result, &fres); - return result; -} - -SF -sh64_ftrcdl(SIM_CPU *current_cpu, DF drgh) -{ - SI result; - sim_fpu f; - - sim_fpu_64to (&f, drgh); - sim_fpu_to32i (&result, &f, sim_fpu_round_zero); - return (SF) result; -} - -SF -sh64_ftrcsl(SIM_CPU *current_cpu, SF frgh) -{ - SI result; - sim_fpu f; - - sim_fpu_32to (&f, frgh); - sim_fpu_to32i (&result, &f, sim_fpu_round_zero); - return (SF) result; -} - -DF -sh64_ftrcdq(SIM_CPU *current_cpu, DF drgh) -{ - DI result; - sim_fpu f; - - sim_fpu_64to (&f, drgh); - sim_fpu_to64i (&result, &f, sim_fpu_round_zero); - return (DF) result; -} - -DF -sh64_ftrcsq(SIM_CPU *current_cpu, SF frgh) -{ - DI result; - sim_fpu f; - - sim_fpu_32to (&f, frgh); - sim_fpu_to64i (&result, &f, sim_fpu_round_zero); - return (DF) result; -} - -void -sh64_ftrvs(SIM_CPU *cpu, unsigned g, unsigned h, unsigned f) -{ - int i, j; - - for (i = 0; i < 4; i++) - { - SF result; - sim_fpu sum; - sim_fpu_32to (&sum, 0); - - for (j = 0; j < 4; j++) - { - sim_fpu f1, f2, temp; - sim_fpu_32to (&f1, sh64_h_fr_get (cpu, (g + i) + (j * 4))); - sim_fpu_32to (&f2, sh64_h_fr_get (cpu, h + j)); - sim_fpu_mul (&temp, &f1, &f2); - sim_fpu_add (&sum, &sum, &temp); - } - sim_fpu_to32 (&result, &sum); - sh64_h_fr_set (cpu, f + i, result); - } -} - -/* Count the number of arguments. */ -static int -count_argc (cpu) - SIM_CPU *cpu; -{ - int i = 0; - - if (! STATE_PROG_ARGV (CPU_STATE (cpu))) - return -1; - - while (STATE_PROG_ARGV (CPU_STATE (cpu)) [i] != NULL) - ++i; - - return i; -} - -/* Read a null terminated string from memory, return in a buffer */ -static char * -fetch_str (current_cpu, pc, addr) - SIM_CPU *current_cpu; - PCADDR pc; - DI addr; -{ - char *buf; - int nr = 0; - while (sim_core_read_1 (current_cpu, - pc, read_map, addr + nr) != 0) - nr++; - buf = NZALLOC (char, nr + 1); - sim_read (CPU_STATE (current_cpu), addr, buf, nr); - return buf; -} - -static void -trap_handler (SIM_CPU *current_cpu, int shmedia_abi_p, UQI trapnum, PCADDR pc) -{ - char ch; - switch (trapnum) - { - case 1: - ch = GET_H_GRC (0); - sim_io_write_stdout (CPU_STATE (current_cpu), &ch, 1); - fflush (stdout); - break; - case 2: - sim_engine_halt (CPU_STATE (current_cpu), current_cpu, NULL, pc, sim_stopped, SIM_SIGTRAP); - break; - case 34: - { - int i; - int ret_reg = (shmedia_abi_p) ? 2 : 0; - char *buf; - DI PARM1 = GET_H_GR ((shmedia_abi_p) ? 3 : 5); - DI PARM2 = GET_H_GR ((shmedia_abi_p) ? 4 : 6); - DI PARM3 = GET_H_GR ((shmedia_abi_p) ? 5 : 7); - - switch (GET_H_GR ((shmedia_abi_p) ? 2 : 4)) - { - case SYS_write: - buf = zalloc (PARM3); - sim_read (CPU_STATE (current_cpu), PARM2, buf, PARM3); - SET_H_GR (ret_reg, - sim_io_write (CPU_STATE (current_cpu), - PARM1, buf, PARM3)); - zfree (buf); - break; - - case SYS_lseek: - SET_H_GR (ret_reg, - sim_io_lseek (CPU_STATE (current_cpu), - PARM1, PARM2, PARM3)); - break; - - case SYS_exit: - sim_engine_halt (CPU_STATE (current_cpu), current_cpu, - NULL, pc, sim_exited, PARM1); - break; - - case SYS_read: - buf = zalloc (PARM3); - SET_H_GR (ret_reg, - sim_io_read (CPU_STATE (current_cpu), - PARM1, buf, PARM3)); - sim_write (CPU_STATE (current_cpu), PARM2, buf, PARM3); - zfree (buf); - break; - - case SYS_open: - buf = fetch_str (current_cpu, pc, PARM1); - SET_H_GR (ret_reg, - sim_io_open (CPU_STATE (current_cpu), - buf, PARM2)); - zfree (buf); - break; - - case SYS_close: - SET_H_GR (ret_reg, - sim_io_close (CPU_STATE (current_cpu), PARM1)); - break; - - case SYS_time: - SET_H_GR (ret_reg, time (0)); - break; - - case SYS_argc: - SET_H_GR (ret_reg, count_argc (current_cpu)); - break; - - case SYS_argnlen: - if (PARM1 < count_argc (current_cpu)) - SET_H_GR (ret_reg, - strlen (STATE_PROG_ARGV (CPU_STATE (current_cpu)) [PARM1])); - else - SET_H_GR (ret_reg, -1); - break; - - case SYS_argn: - if (PARM1 < count_argc (current_cpu)) - { - /* Include the NULL byte. */ - i = strlen (STATE_PROG_ARGV (CPU_STATE (current_cpu)) [PARM1]) + 1; - sim_write (CPU_STATE (current_cpu), - PARM2, - STATE_PROG_ARGV (CPU_STATE (current_cpu)) [PARM1], - i); - - /* Just for good measure. */ - SET_H_GR (ret_reg, i); - break; - } - else - SET_H_GR (ret_reg, -1); - break; - - default: - SET_H_GR (ret_reg, -1); - } - } - break; - case 253: - puts ("pass"); - exit (0); - case 254: - puts ("fail"); - exit (1); - case 0xc3: - /* fall through. */ - case 255: - sim_engine_halt (CPU_STATE (current_cpu), current_cpu, NULL, pc, sim_stopped, SIM_SIGTRAP); - break; - } -} - -void -sh64_trapa (SIM_CPU *current_cpu, DI rm, PCADDR pc) -{ - trap_handler (current_cpu, 1, (UQI) rm & 0xff, pc); -} - -void -sh64_compact_trapa (SIM_CPU *current_cpu, UQI trapnum, PCADDR pc) -{ - int mach_sh5_p; - - /* If this is an SH5 executable, this is SHcompact code running in - the SHmedia ABI. */ - - mach_sh5_p = - (bfd_get_mach (STATE_PROG_BFD (CPU_STATE (current_cpu))) == bfd_mach_sh5); - - trap_handler (current_cpu, mach_sh5_p, trapnum, pc); -} - -DI -sh64_nsb (SIM_CPU *current_cpu, DI rm) -{ - int result = 0, count; - UDI source = (UDI) rm; - - if ((source >> 63)) - source = ~source; - source <<= 1; - - for (count = 32; count; count >>= 1) - { - UDI newval = source << count; - - if ((newval >> count) == source) - { - result |= count; - source = newval; - } - } - - return result; -} - -void -sh64_break (SIM_CPU *current_cpu, PCADDR pc) -{ - SIM_DESC sd = CPU_STATE (current_cpu); - sim_engine_halt (sd, current_cpu, NULL, pc, sim_stopped, SIM_SIGTRAP); -} - -void -set_isa (SIM_CPU *current_cpu, int mode) -{ - /* Do nothing. */ -} - -/* The semantic code invokes this for invalid (unrecognized) instructions. */ - -SEM_PC -sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia, SEM_PC vpc) -{ - SIM_DESC sd = CPU_STATE (current_cpu); - sim_engine_halt (sd, current_cpu, NULL, cia, sim_stopped, SIM_SIGILL); - - return vpc; -} - - -/* Process an address exception. */ - -void -sh64_core_signal (SIM_DESC sd, SIM_CPU *current_cpu, sim_cia cia, - unsigned int map, int nr_bytes, address_word addr, - transfer_type transfer, sim_core_signals sig) -{ - sim_core_signal (sd, current_cpu, cia, map, nr_bytes, addr, - transfer, sig); -} - - -/* Initialize cycle counting for an insn. - FIRST_P is non-zero if this is the first insn in a set of parallel - insns. */ - -void -sh64_compact_model_insn_before (SIM_CPU *cpu, int first_p) -{ - /* Do nothing. */ -} - -void -sh64_media_model_insn_before (SIM_CPU *cpu, int first_p) -{ - /* Do nothing. */ -} - -/* Record the cycles computed for an insn. - LAST_P is non-zero if this is the last insn in a set of parallel insns, - and we update the total cycle count. - CYCLES is the cycle count of the insn. */ - -void -sh64_compact_model_insn_after(SIM_CPU *cpu, int last_p, int cycles) -{ - /* Do nothing. */ -} - -void -sh64_media_model_insn_after(SIM_CPU *cpu, int last_p, int cycles) -{ - /* Do nothing. */ -} - -int -sh64_fetch_register (SIM_CPU *cpu, int nr, unsigned char *buf, int len) -{ - /* Fetch general purpose registers. */ - if (nr >= SIM_SH64_R0_REGNUM - && nr < (SIM_SH64_R0_REGNUM + SIM_SH64_NR_R_REGS) - && len == 8) - { - *((unsigned64*) buf) = - H2T_8 (sh64_h_gr_get (cpu, nr - SIM_SH64_R0_REGNUM)); - return len; - } - - /* Fetch PC. */ - if (nr == SIM_SH64_PC_REGNUM && len == 8) - { - *((unsigned64*) buf) = H2T_8 (sh64_h_pc_get (cpu) | sh64_h_ism_get (cpu)); - return len; - } - - /* Fetch status register (SR). */ - if (nr == SIM_SH64_SR_REGNUM && len == 8) - { - *((unsigned64*) buf) = H2T_8 (sh64_h_sr_get (cpu)); - return len; - } - - /* Fetch saved status register (SSR) and PC (SPC). */ - if ((nr == SIM_SH64_SSR_REGNUM || nr == SIM_SH64_SPC_REGNUM) - && len == 8) - { - *((unsigned64*) buf) = 0; - return len; - } - - /* Fetch target registers. */ - if (nr >= SIM_SH64_TR0_REGNUM - && nr < (SIM_SH64_TR0_REGNUM + SIM_SH64_NR_TR_REGS) - && len == 8) - { - *((unsigned64*) buf) = - H2T_8 (sh64_h_tr_get (cpu, nr - SIM_SH64_TR0_REGNUM)); - return len; - } - - /* Fetch floating point registers. */ - if (nr >= SIM_SH64_FR0_REGNUM - && nr < (SIM_SH64_FR0_REGNUM + SIM_SH64_NR_FP_REGS) - && len == 4) - { - *((unsigned32*) buf) = - H2T_4 (sh64_h_fr_get (cpu, nr - SIM_SH64_FR0_REGNUM)); - return len; - } - - /* We should never get here. */ - return 0; -} - -int -sh64_store_register (SIM_CPU *cpu, int nr, unsigned char *buf, int len) -{ - /* Store general purpose registers. */ - if (nr >= SIM_SH64_R0_REGNUM - && nr < (SIM_SH64_R0_REGNUM + SIM_SH64_NR_R_REGS) - && len == 8) - { - sh64_h_gr_set (cpu, nr - SIM_SH64_R0_REGNUM, T2H_8 (*((unsigned64*)buf))); - return len; - } - - /* Store PC. */ - if (nr == SIM_SH64_PC_REGNUM && len == 8) - { - unsigned64 new_pc = T2H_8 (*((unsigned64*)buf)); - sh64_h_pc_set (cpu, new_pc); - return len; - } - - /* Store status register (SR). */ - if (nr == SIM_SH64_SR_REGNUM && len == 8) - { - sh64_h_sr_set (cpu, T2H_8 (*((unsigned64*)buf))); - return len; - } - - /* Store saved status register (SSR) and PC (SPC). */ - if (nr == SIM_SH64_SSR_REGNUM || nr == SIM_SH64_SPC_REGNUM) - { - /* Do nothing. */ - return len; - } - - /* Store target registers. */ - if (nr >= SIM_SH64_TR0_REGNUM - && nr < (SIM_SH64_TR0_REGNUM + SIM_SH64_NR_TR_REGS) - && len == 8) - { - sh64_h_tr_set (cpu, nr - SIM_SH64_TR0_REGNUM, T2H_8 (*((unsigned64*)buf))); - return len; - } - - /* Store floating point registers. */ - if (nr >= SIM_SH64_FR0_REGNUM - && nr < (SIM_SH64_FR0_REGNUM + SIM_SH64_NR_FP_REGS) - && len == 4) - { - sh64_h_fr_set (cpu, nr - SIM_SH64_FR0_REGNUM, T2H_4 (*((unsigned32*)buf))); - return len; - } - - /* We should never get here. */ - return 0; -} - -void -sh64_engine_run_full(SIM_CPU *cpu) -{ - if (sh64_h_ism_get (cpu) == ISM_MEDIA) - { - if (!sh64_idesc_media) - { - sh64_media_init_idesc_table (cpu); - sh64_idesc_media = CPU_IDESC (cpu); - } - else - CPU_IDESC (cpu) = sh64_idesc_media; - sh64_media_engine_run_full (cpu); - } - else - { - if (!sh64_idesc_compact) - { - sh64_compact_init_idesc_table (cpu); - sh64_idesc_compact = CPU_IDESC (cpu); - } - else - CPU_IDESC (cpu) = sh64_idesc_compact; - sh64_compact_engine_run_full (cpu); - } -} - -void -sh64_engine_run_fast (SIM_CPU *cpu) -{ - if (sh64_h_ism_get (cpu) == ISM_MEDIA) - { - if (!sh64_idesc_media) - { - sh64_media_init_idesc_table (cpu); - sh64_idesc_media = CPU_IDESC (cpu); - } - else - CPU_IDESC (cpu) = sh64_idesc_media; - sh64_media_engine_run_fast (cpu); - } - else - { - if (!sh64_idesc_compact) - { - sh64_compact_init_idesc_table (cpu); - sh64_idesc_compact = CPU_IDESC (cpu); - } - else - CPU_IDESC (cpu) = sh64_idesc_compact; - sh64_compact_engine_run_fast (cpu); - } -} - -static void -sh64_prepare_run (SIM_CPU *cpu) -{ - /* Nothing. */ -} - -static const CGEN_INSN * -sh64_get_idata (SIM_CPU *cpu, int inum) -{ - return CPU_IDESC (cpu) [inum].idata; -} - -static void -sh64_init_cpu (SIM_CPU *cpu) -{ - CPU_REG_FETCH (cpu) = sh64_fetch_register; - CPU_REG_STORE (cpu) = sh64_store_register; - CPU_PC_FETCH (cpu) = sh64_h_pc_get; - CPU_PC_STORE (cpu) = sh64_h_pc_set; - CPU_GET_IDATA (cpu) = sh64_get_idata; - /* Only used by profiling. 0 disables it. */ - CPU_MAX_INSNS (cpu) = 0; - CPU_INSN_NAME (cpu) = cgen_insn_name; - CPU_FULL_ENGINE_FN (cpu) = sh64_engine_run_full; -#if WITH_FAST - CPU_FAST_ENGINE_FN (cpu) = sh64_engine_run_fast; -#else - CPU_FAST_ENGINE_FN (cpu) = sh64_engine_run_full; -#endif -} - -static void -shmedia_init_cpu (SIM_CPU *cpu) -{ - sh64_init_cpu (cpu); -} - -static void -shcompact_init_cpu (SIM_CPU *cpu) -{ - sh64_init_cpu (cpu); -} - -static void -sh64_model_init() -{ - /* Do nothing. */ -} - -static const MODEL sh_models [] = -{ - { "sh2", & sh2_mach, MODEL_SH5, NULL, sh64_model_init }, - { "sh3", & sh3_mach, MODEL_SH5, NULL, sh64_model_init }, - { "sh3e", & sh3_mach, MODEL_SH5, NULL, sh64_model_init }, - { "sh4", & sh4_mach, MODEL_SH5, NULL, sh64_model_init }, - { "sh5", & sh5_mach, MODEL_SH5, NULL, sh64_model_init }, - { 0 } -}; - -static const MACH_IMP_PROPERTIES sh5_imp_properties = -{ - sizeof (SIM_CPU), -#if WITH_SCACHE - sizeof (SCACHE) -#else - 0 -#endif -}; - -const MACH sh2_mach = -{ - "sh2", "sh2", MACH_SH5, - 16, 16, &sh_models[0], &sh5_imp_properties, - shcompact_init_cpu, - sh64_prepare_run -}; - -const MACH sh3_mach = -{ - "sh3", "sh3", MACH_SH5, - 16, 16, &sh_models[1], &sh5_imp_properties, - shcompact_init_cpu, - sh64_prepare_run -}; - -const MACH sh3e_mach = -{ - "sh3e", "sh3e", MACH_SH5, - 16, 16, &sh_models[2], &sh5_imp_properties, - shcompact_init_cpu, - sh64_prepare_run -}; - -const MACH sh4_mach = -{ - "sh4", "sh4", MACH_SH5, - 16, 16, &sh_models[3], &sh5_imp_properties, - shcompact_init_cpu, - sh64_prepare_run -}; - -const MACH sh5_mach = -{ - "sh5", "sh5", MACH_SH5, - 32, 32, &sh_models[4], &sh5_imp_properties, - shmedia_init_cpu, - sh64_prepare_run -}; diff --git a/sim/sh64/sim-if.c b/sim/sh64/sim-if.c deleted file mode 100644 index f34ff29065e..00000000000 --- a/sim/sh64/sim-if.c +++ /dev/null @@ -1,236 +0,0 @@ -/* Main simulator entry points specific to the SH5. - Copyright (C) 2000 Free Software Foundation, Inc. - Contributed by Cygnus Solutions. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#include "libiberty.h" -#include "bfd.h" -#include "sim-main.h" -#ifdef HAVE_STDLIB_H -#include -#endif -#include "sim-options.h" -#include "dis-asm.h" - -static void free_state (SIM_DESC); - -/* Since we don't build the cgen-opcode table, we use a wrapper around - the existing disassembler from libopcodes. */ -static CGEN_DISASSEMBLER sh64_disassemble_insn; - -/* Records simulator descriptor so utilities like sh5_dump_regs can be - called from gdb. */ -SIM_DESC current_state; - -/* Cover function of sim_state_free to free the cpu buffers as well. */ - -static void -free_state (SIM_DESC sd) -{ - if (STATE_MODULES (sd) != NULL) - sim_module_uninstall (sd); - sim_cpu_free_all (sd); - sim_state_free (sd); -} - -/* Create an instance of the simulator. */ - -SIM_DESC -sim_open (kind, callback, abfd, argv) - SIM_OPEN_KIND kind; - host_callback *callback; - struct bfd *abfd; - char **argv; -{ - char c; - int i; - SIM_DESC sd = sim_state_alloc (kind, callback); - - /* The cpu data is kept in a separately allocated chunk of memory. */ - if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - -#if 0 /* FIXME: pc is in mach-specific struct */ - /* FIXME: watchpoints code shouldn't need this */ - { - SIM_CPU *current_cpu = STATE_CPU (sd, 0); - STATE_WATCHPOINTS (sd)->pc = &(PC); - STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC); - } -#endif - - if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - -#if 0 /* FIXME: 'twould be nice if we could do this */ - /* These options override any module options. - Obviously ambiguity should be avoided, however the caller may wish to - augment the meaning of an option. */ - if (extra_options != NULL) - sim_add_option_table (sd, extra_options); -#endif - - /* getopt will print the error message so we just have to exit if this fails. - FIXME: Hmmm... in the case of gdb we need getopt to call - print_filtered. */ - if (sim_parse_args (sd, argv) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - - /* Allocate core managed memory if none specified by user. - Use address 4 here in case the user wanted address 0 unmapped. */ - if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0) - sim_do_commandf (sd, "memory region 0,0x%x", SH64_DEFAULT_MEM_SIZE); - - /* Add a small memory region way up in the address space to handle - writes to invalidate an instruction cache line. This is used for - trampolines. Since we don't simulate the cache, this memory just - avoids bus errors. 64K ought to do. */ - sim_do_command (sd," memory region 0xf0000000,0x10000"); - - /* check for/establish the reference program image */ - if (sim_analyze_program (sd, - (STATE_PROG_ARGV (sd) != NULL - ? *STATE_PROG_ARGV (sd) - : NULL), - abfd) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - - /* Establish any remaining configuration options. */ - if (sim_config (sd) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - - if (sim_post_argv_init (sd) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - - /* Open a copy of the cpu descriptor table. */ - { - CGEN_CPU_DESC cd = sh_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name, - CGEN_ENDIAN_BIG); - - for (i = 0; i < MAX_NR_PROCESSORS; ++i) - { - SIM_CPU *cpu = STATE_CPU (sd, i); - CPU_CPU_DESC (cpu) = cd; - CPU_DISASSEMBLER (cpu) = sh64_disassemble_insn; - } - } - - /* Clear idesc table pointers for good measure. */ - sh64_idesc_media = sh64_idesc_compact = NULL; - - /* Initialize various cgen things not done by common framework. - Must be done after sh_cgen_cpu_open. */ - cgen_init (sd); - - /* Store in a global so things like sparc32_dump_regs can be invoked - from the gdb command line. */ - current_state = sd; - - return sd; -} - -void -sim_close (sd, quitting) - SIM_DESC sd; - int quitting; -{ - sh_cgen_cpu_close (CPU_CPU_DESC (STATE_CPU (sd, 0))); - sim_module_uninstall (sd); -} - -SIM_RC -sim_create_inferior (sd, abfd, argv, envp) - SIM_DESC sd; - struct bfd *abfd; - char **argv; - char **envp; -{ - SIM_CPU *current_cpu = STATE_CPU (sd, 0); - SIM_ADDR addr; - - if (abfd != NULL) - addr = bfd_get_start_address (abfd); - else - addr = 0; - sim_pc_set (current_cpu, addr); - -#if 0 - STATE_ARGV (sd) = sim_copy_argv (argv); - STATE_ENVP (sd) = sim_copy_argv (envp); -#endif - - return SIM_RC_OK; -} - -void -sim_do_command (sd, cmd) - SIM_DESC sd; - char *cmd; -{ - if (sim_args_command (sd, cmd) != SIM_RC_OK) - sim_io_eprintf (sd, "Unknown command `%s'\n", cmd); -} - - -/* Disassemble an instruction. */ - -static void -sh64_disassemble_insn (SIM_CPU *cpu, const CGEN_INSN *insn, - const ARGBUF *abuf, IADDR pc, char *buf) -{ - struct disassemble_info disasm_info; - SFILE sfile; - SIM_DESC sd = CPU_STATE (cpu); - - sfile.buffer = sfile.current = buf; - INIT_DISASSEMBLE_INFO (disasm_info, (FILE *) &sfile, - (fprintf_ftype) sim_disasm_sprintf); - - disasm_info.arch = bfd_get_arch (STATE_PROG_BFD (sd)); - disasm_info.mach = bfd_get_mach (STATE_PROG_BFD (sd)); - disasm_info.endian = - (bfd_big_endian (STATE_PROG_BFD (sd)) ? BFD_ENDIAN_BIG - : bfd_little_endian (STATE_PROG_BFD (sd)) ? BFD_ENDIAN_LITTLE - : BFD_ENDIAN_UNKNOWN); - disasm_info.read_memory_func = sim_disasm_read_memory; - disasm_info.memory_error_func = sim_disasm_perror_memory; - disasm_info.application_data = (PTR) cpu; - - if (sh64_h_ism_get (cpu) == ISM_MEDIA) - print_insn_sh64x_media (pc, &disasm_info); - else - print_insn_sh (pc, &disasm_info); -} diff --git a/sim/sh64/sim-main.h b/sim/sh64/sim-main.h deleted file mode 100644 index e7cbe99217a..00000000000 --- a/sim/sh64/sim-main.h +++ /dev/null @@ -1,75 +0,0 @@ -/* Main header for the Hitachi SH64 architecture. */ - -#ifndef SIM_MAIN_H -#define SIM_MAIN_H - -#define USING_SIM_BASE_H /* FIXME: quick hack */ - -struct _sim_cpu; /* FIXME: should be in sim-basics.h */ -typedef struct _sim_cpu SIM_CPU; - -/* sim-basics.h includes config.h but cgen-types.h must be included before - sim-basics.h and cgen-types.h needs config.h. */ -#include "config.h" - -#include "symcat.h" -#include "sim-basics.h" -#include "cgen-types.h" -#include "sh-desc.h" -#include "sh-opc.h" -#include "arch.h" - -/* These must be defined before sim-base.h. */ -typedef UDI sim_cia; - -#define CIA_GET(cpu) CPU_PC_GET (cpu) -#define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val) | (sh64_h_ism_get (cpu))) - -#include "sim-base.h" -#include "cgen-sim.h" -#include "sh64-sim.h" - -/* The _sim_cpu struct. */ - -struct _sim_cpu { - /* sim/common cpu base. */ - sim_cpu_base base; - - /* Static parts of cgen. */ - CGEN_CPU cgen_cpu; - - /* CPU specific parts go here. - Note that in files that don't need to access these pieces WANT_CPU_FOO - won't be defined and thus these parts won't appear. This is ok in the - sense that things work. It is a source of bugs though. - One has to of course be careful to not take the size of this - struct and no structure members accessed in non-cpu specific files can - go after here. Oh for a better language. */ -#if defined (WANT_CPU_SH64) - SH64_CPU_DATA cpu_data; -#endif -}; - -/* The sim_state struct. */ - -struct sim_state { - sim_cpu *cpu; -#define STATE_CPU(sd, n) (/*&*/ (sd)->cpu) - - CGEN_STATE cgen_state; - - sim_state_base base; -}; - -/* Misc. */ - -/* Catch address exceptions. */ -extern SIM_CORE_SIGNAL_FN sh64_core_signal; -#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ -sh64_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \ - (TRANSFER), (ERROR)) - -/* Default memory size. */ -#define SH64_DEFAULT_MEM_SIZE 0x800000 /* 8M */ - -#endif /* SIM_MAIN_H */ diff --git a/sim/sh64/tconfig.in b/sim/sh64/tconfig.in deleted file mode 100644 index bab3f1ce7ed..00000000000 --- a/sim/sh64/tconfig.in +++ /dev/null @@ -1,45 +0,0 @@ -/* SH64 target configuration file. -*- C -*- */ - -/* Define this if the simulator can vary the size of memory. - See the xxx simulator for an example. - This enables the `-m size' option. - The memory size is stored in STATE_MEM_SIZE. */ -/* Not used for SH64 since we use the memory module. TODO -- check this */ -/* #define SIM_HAVE_MEM_SIZE */ - -/* See sim-hload.c. We properly handle LMA. -- TODO: check this */ -#define SIM_HANDLES_LMA 1 - -/* For MSPR support. FIXME: revisit. */ -#define WITH_DEVICES 0 - -/* FIXME: Revisit. */ -#ifdef HAVE_DV_SOCKSER -MODULE_INSTALL_FN dv_sockser_install; -#define MODULE_LIST dv_sockser_install, -#endif - -#if 0 -/* Enable watchpoints. */ -#define WITH_WATCHPOINTS 1 -#endif - -/* ??? Temporary hack until model support unified. */ -#define SIM_HAVE_MODEL - -/* Define this to enable the intrinsic breakpoint mechanism. */ -/* FIXME: may be able to remove SIM_HAVE_BREAKPOINTS since it essentially - duplicates ifdef SIM_BREAKPOINT (right?) */ -#if 1 -#define SIM_HAVE_BREAKPOINTS -#define SIM_BREAKPOINT { 0, 0, 0, 0xD } -#define SIM_BREAKPOINT_SIZE 4 -#endif - -/* This is a global setting. Different cpu families can't mix-n-match -scache - and -pbb. However some cpu families may use -simple while others use - one of -scache/-pbb. ???? */ -#define WITH_SCACHE_PBB 1 - -/* Define this if the target cpu is bi-endian and the simulator supports it. */ -#define SIM_HAVE_BIENDIAN diff --git a/sim/testsuite/sim/sh64/ChangeLog b/sim/testsuite/sim/sh64/ChangeLog deleted file mode 100644 index 8bb2f764ae6..00000000000 --- a/sim/testsuite/sim/sh64/ChangeLog +++ /dev/null @@ -1,21 +0,0 @@ -2001-01-06 Ben Elliston - - * misc/fr-dr.s: New test. - -2001-01-03 Ben Elliston - - * interwork.exp: Match .s files only. - -2000-12-06 Ben Elliston - - * interwork.exp: New test case. - -2000-11-16 Ben Elliston - - * allinsn.exp: Rename from this .. - * compact.exp: .. to this. - * media.exp: New test case. - -2000-11-13 Ben Elliston - - * allinsn.exp: New test case. diff --git a/sim/testsuite/sim/sh64/compact.exp b/sim/testsuite/sim/sh64/compact.exp deleted file mode 100644 index d3d482acf0f..00000000000 --- a/sim/testsuite/sim/sh64/compact.exp +++ /dev/null @@ -1,19 +0,0 @@ -# SHcompact testsuite. - -if [istarget sh64-*-*] { - # load support procs (none yet) - # load_lib cgen.exp - - # all machines - set all_machs "sh5" - - # The .cgs suffix is for "cgen .s". - foreach src [lsort [glob -nocomplain $srcdir/$subdir/compact/*.cgs]] { - # If we're only testing specific files and this isn't one of them, - # skip it. - if ![runtest_file_p $runtests $src] { - continue - } - run_sim_test $src $all_machs - } -} diff --git a/sim/testsuite/sim/sh64/compact/ChangeLog b/sim/testsuite/sim/sh64/compact/ChangeLog deleted file mode 100644 index 99aaec1ff02..00000000000 --- a/sim/testsuite/sim/sh64/compact/ChangeLog +++ /dev/null @@ -1,26 +0,0 @@ -2002-01-09 Ben Elliston - - * macl.cgs: For good measure, clear the S bit at startup. - -2001-01-11 Ben Elliston - - * fmov.cgs (f13b): Compare R0 with R1, not R2, when testing that - the source register was correctly post-incremented. - -2000-12-01 Ben Elliston - - * *.cgs (ld): Link tests with -m shelf32. - -2000-11-24 Ben Elliston - - * fmov.cgs: New test case. - * ftrv.cgs: Populate the matrix with meaningful values. - -2000-11-22 Ben Elliston - - * *.cgs (as): Assemble tests with -isa=shcompact. - -2000-11-16 Ben Elliston - - * *.cgs: New test cases. - diff --git a/sim/testsuite/sim/sh64/compact/add.cgs b/sim/testsuite/sim/sh64/compact/add.cgs deleted file mode 100644 index 105e4849069..00000000000 --- a/sim/testsuite/sim/sh64/compact/add.cgs +++ /dev/null @@ -1,55 +0,0 @@ -# sh testcase for add $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start -init: - # Initialise some registers with values which help us to verify - # that the correct source registers are used by the ADD instruction. - mov #0, r0 - mov #1, r1 - mov #2, r2 - mov #3, r3 - mov #5, r5 - mov #15, r15 - -add: - # 0 + 0 = 0. - add r0, r0 - assert r0, #0 - - # 0 + 1 = 1. - add r0, r1 - assert r1, #1 - - # 1 + 2 = 3. - add r1, r2 - assert r2, #3 - - # 3 + 5 = 8. - add r3, r5 - assert r5, #8 - - # 8 + 8 = 16. - add r5, r5 - assert r5, #16 - - # 15 + 1 = 16. - add r15, r1 - assert r1, #16 - -neg: - mov #1, r0 - neg r0, r0 - mov #2, r1 - add r0, r1 - assert r1, #1 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/addc.cgs b/sim/testsuite/sim/sh64/compact/addc.cgs deleted file mode 100644 index f6e46e1a969..00000000000 --- a/sim/testsuite/sim/sh64/compact/addc.cgs +++ /dev/null @@ -1,90 +0,0 @@ -# sh testcase for addc $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - # Initialise some registers with values which help us to verify - # that the correct source registers are used by the ADDC instruction. - - .macro init - mov #0, r0 - mov #1, r1 - mov #2, r2 - mov #3, r3 - mov #5, r5 - mov #15, r15 - .endm - - start - - init -add: - clrt - addc r0, r0 - assert r0, #0 - clrt - addc r0, r1 - assert r1, #1 - clrt - addc r1, r2 - assert r2, #3 - clrt - addc r3, r5 - assert r5, #8 - clrt - addc r5, r5 - assert r5, #16 - clrt - addc r15, r1 - assert r1, #16 - - init -addt: - sett - addc r0, r0 - assert r0, #1 - sett - addc r0, r1 - assert r1, #3 - sett - addc r1, r2 - assert r2, #6 - sett - addc r3, r5 - assert r5, #9 - sett - addc r5, r5 - assert r5, #19 - sett - addc r15, r1 - assert r1, #19 - - bra next - nop - -wrong: - fail - -next: - init -large: - clrt - mov #1, r0 - neg r0, r0 - mov #2, r1 - addc r0, r1 - assert r1, #1 - - init -larget: - sett - mov #1, r0 - neg r0, r0 - mov #2, r1 - addc r0, r1 - assert r1, #2 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/compact/addi.cgs b/sim/testsuite/sim/sh64/compact/addi.cgs deleted file mode 100644 index 7c96ddf76d5..00000000000 --- a/sim/testsuite/sim/sh64/compact/addi.cgs +++ /dev/null @@ -1,46 +0,0 @@ -# sh testcase for add #$imm8, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start -init: - # Initialise some registers with values which help us to verify - # that the correct source registers are used by the ADD instruction. - mov #0, r0 - mov #1, r1 - mov #2, r2 - mov #3, r3 - mov #5, r5 - mov #15, r15 - -addi: - # 0 + 0 = 0. - add #0, r0 - assert r0, #0 - - # 0 + 1 = 1. - add #0, r1 - assert r1, #1 - - # 2 + 2 = 4. - add #2, r2 - assert r2, #4 - - # 120 + 5 = 125. - add #120, r5 - assert r5, #125 - -large: - mov #1, r0 - neg r0, r0 - add #2, r0 - assert r0, #1 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/addv.cgs b/sim/testsuite/sim/sh64/compact/addv.cgs deleted file mode 100644 index 0267e5dfa00..00000000000 --- a/sim/testsuite/sim/sh64/compact/addv.cgs +++ /dev/null @@ -1,48 +0,0 @@ -# sh testcase for addv $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start -zero: - mov #0, r0 - mov #0, r1 - addv r0, r1 - # Assert !T and #0. - bt wrong - assert r1, #0 - -one: - mov #0, r0 - mov #1, r1 - addv r0, r1 - # Assert !T and #1. - bt wrong - assert r1, #1 - -large: - # Produce MAXINT in R0. - mov #0, r0 - not r0, r0 - shlr r0 - - # Put #3 into R1. - mov #3, r1 - - # Add them and overflow. - addv r0, r1 - - # Assert T and overflowed value. - bf wrong - mov #1, r7 - rotr r7 - add #2, r7 - cmp/eq r1, r7 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/and.cgs b/sim/testsuite/sim/sh64/compact/and.cgs deleted file mode 100644 index e1452752ae0..00000000000 --- a/sim/testsuite/sim/sh64/compact/and.cgs +++ /dev/null @@ -1,33 +0,0 @@ -# sh testcase for and $rm64, $rn64 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global and -and: - mov #1, r1 - mov #7, r2 - rotr r2 - rotr r2 - and r1, r2 - - # R1 & R2 = 1. - assert r2, #1 - -another: - mov #192, r1 - mov #0, r2 - and r1, r2 - - # R1 & R2 = 0. - assert r2, #0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/andb.cgs b/sim/testsuite/sim/sh64/compact/andb.cgs deleted file mode 100644 index 77e628598b1..00000000000 --- a/sim/testsuite/sim/sh64/compact/andb.cgs +++ /dev/null @@ -1,24 +0,0 @@ -# sh testcase for and.b #$imm8, @(r0, gbr) -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global orb -init: - # Init GBR and R0. - mov #30, r0 - ldc r0, gbr - mov #40, r0 - -orb: - and.b #255, @(r0, gbr) - and.b #170, @(r0, gbr) - and.b #255, @(r0, gbr) - and.b #0, @(r0, gbr) - -okay: - pass diff --git a/sim/testsuite/sim/sh64/compact/andi.cgs b/sim/testsuite/sim/sh64/compact/andi.cgs deleted file mode 100644 index 32d71c5b477..00000000000 --- a/sim/testsuite/sim/sh64/compact/andi.cgs +++ /dev/null @@ -1,43 +0,0 @@ -# sh testcase for and #$imm8, r0 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global andi -andi: - mov #0, r0 - or #255, r0 - and #0, r0 - assert r0, #0 - -large: - mov #0, r0 - or #255, r0 - shll8 r0 - or #255, r0 - shll8 r0 - or #255, r0 - shll8 r0 - or #255, r0 - -mask: - and #255, r0 - mov r0, r1 - mov #0, r0 - or #255, r0 - cmp/eq r0, r1 - bf wrong - -mask0: - and #0, r0 - assert r0, #0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/bf.cgs b/sim/testsuite/sim/sh64/compact/bf.cgs deleted file mode 100644 index 5c361f94b89..00000000000 --- a/sim/testsuite/sim/sh64/compact/bf.cgs +++ /dev/null @@ -1,24 +0,0 @@ -# sh testcase for bf $disp8 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global taken -taken: - clrt - bf ntaken - fail - .global ntaken -ntaken: - sett - bf bad - pass -bad: - fail - fail - fail - fail diff --git a/sim/testsuite/sim/sh64/compact/bfs.cgs b/sim/testsuite/sim/sh64/compact/bfs.cgs deleted file mode 100644 index 3cad5f6fc73..00000000000 --- a/sim/testsuite/sim/sh64/compact/bfs.cgs +++ /dev/null @@ -1,28 +0,0 @@ -# sh testcase for bf/s $disp8 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global taken -taken: - clrt - bf/s ntaken -slot1: - nop - fail - .global ntaken -ntaken: - sett - bf/s bad -slot2: - nop - pass -bad: - fail - fail - fail - fail diff --git a/sim/testsuite/sim/sh64/compact/bra.cgs b/sim/testsuite/sim/sh64/compact/bra.cgs deleted file mode 100644 index 77c6da9bdde..00000000000 --- a/sim/testsuite/sim/sh64/compact/bra.cgs +++ /dev/null @@ -1,23 +0,0 @@ -# sh testcase for bra $disp12 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global bra -bra: - bra okay -slot: - nop -bad: - fail - fail - fail - .global okay -okay: - pass - fail - diff --git a/sim/testsuite/sim/sh64/compact/braf.cgs b/sim/testsuite/sim/sh64/compact/braf.cgs deleted file mode 100644 index e761f6d0a6d..00000000000 --- a/sim/testsuite/sim/sh64/compact/braf.cgs +++ /dev/null @@ -1,24 +0,0 @@ -# sh testcase for braf $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global braf -braf: - mov #4, r0 - braf r0 -slot: - nop -bad: - fail - fail -okay: - pass -alsobad: - fail - fail - fail diff --git a/sim/testsuite/sim/sh64/compact/brk.cgs b/sim/testsuite/sim/sh64/compact/brk.cgs deleted file mode 100644 index 99080724565..00000000000 --- a/sim/testsuite/sim/sh64/compact/brk.cgs +++ /dev/null @@ -1,18 +0,0 @@ -# sh testcase for brk -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - .global brk -brk: - # If we hit the breakpoint, the sim will stop. - pass - - # FIXME: breakpoint instruction. - # The SH4 assembler doesn't know about "brk". - .word 0x003b -bad: - fail diff --git a/sim/testsuite/sim/sh64/compact/bsr.cgs b/sim/testsuite/sim/sh64/compact/bsr.cgs deleted file mode 100644 index 75a1a2b275e..00000000000 --- a/sim/testsuite/sim/sh64/compact/bsr.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# sh testcase for bsr $disp12 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global bsr -bsr: - bsr okay -slot: - nop -bad: - fail - fail -okay: - pass -alsobad: - fail diff --git a/sim/testsuite/sim/sh64/compact/bsrf.cgs b/sim/testsuite/sim/sh64/compact/bsrf.cgs deleted file mode 100644 index 9360eaa88b0..00000000000 --- a/sim/testsuite/sim/sh64/compact/bsrf.cgs +++ /dev/null @@ -1,22 +0,0 @@ -# sh testcase for bsrf $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - -bsrf: - mov #4, r0 - bsrf r0 -slot: - nop -bad: - fail - fail -okay: - pass -alsobad: - fail - fail diff --git a/sim/testsuite/sim/sh64/compact/bt.cgs b/sim/testsuite/sim/sh64/compact/bt.cgs deleted file mode 100644 index 65b9d61b885..00000000000 --- a/sim/testsuite/sim/sh64/compact/bt.cgs +++ /dev/null @@ -1,24 +0,0 @@ -# sh testcase for bt $disp8 -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global taken -taken: - sett - bt ntaken - fail - .global ntaken -ntaken: - clrt - bt bad - pass -bad: - fail - fail - fail - fail diff --git a/sim/testsuite/sim/sh64/compact/bts.cgs b/sim/testsuite/sim/sh64/compact/bts.cgs deleted file mode 100644 index 3d62e4d822c..00000000000 --- a/sim/testsuite/sim/sh64/compact/bts.cgs +++ /dev/null @@ -1,28 +0,0 @@ -# sh testcase for bt/s $disp8 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global taken -taken: - sett - bt/s ntaken -slot1: - nop - fail - .global ntaken -ntaken: - clrt - bt/s bad -slot2: - nop - pass -bad: - fail - fail - fail - fail diff --git a/sim/testsuite/sim/sh64/compact/clrmac.cgs b/sim/testsuite/sim/sh64/compact/clrmac.cgs deleted file mode 100644 index 482dc804d62..00000000000 --- a/sim/testsuite/sim/sh64/compact/clrmac.cgs +++ /dev/null @@ -1,13 +0,0 @@ -# sh testcase for clrmac -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global clrmac -clrmac: - clrmac - pass diff --git a/sim/testsuite/sim/sh64/compact/clrs.cgs b/sim/testsuite/sim/sh64/compact/clrs.cgs deleted file mode 100644 index bed5fd5178e..00000000000 --- a/sim/testsuite/sim/sh64/compact/clrs.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for clrs -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global clrs -clrs: - clrs - # Somehow ensure that S is set. - pass diff --git a/sim/testsuite/sim/sh64/compact/clrt.cgs b/sim/testsuite/sim/sh64/compact/clrt.cgs deleted file mode 100644 index 281c2f4243d..00000000000 --- a/sim/testsuite/sim/sh64/compact/clrt.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# sh testcase for clrt -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global clrt -clrt: - clrt - bt wrong - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/cmpeq.cgs b/sim/testsuite/sim/sh64/compact/cmpeq.cgs deleted file mode 100644 index 3cc744cf7f7..00000000000 --- a/sim/testsuite/sim/sh64/compact/cmpeq.cgs +++ /dev/null @@ -1,52 +0,0 @@ -# sh testcase for cmp/eq $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - -zeroes: - mov #0, r1 - mov #0, r2 - cmp/eq r1, r2 - bf wrong - -zero1: - mov #0, r1 - mov #1, r2 - cmp/eq r1, r2 - bt wrong - -zero2: - mov #0, r2 - mov #1, r1 - cmp/eq r2, r1 - bt wrong - -equal: - mov #192, r1 - mov #192, r2 - cmp/eq r1, r2 - bf wrong - -noteq: - mov #192, r1 - mov #193, r2 - cmp/eq r1, r2 - bt wrong - -large: - mov #1, r1 - rotr r1 - mov #1, r2 - rotr r2 - cmp/eq r1, r2 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/cmpeqi.cgs b/sim/testsuite/sim/sh64/compact/cmpeqi.cgs deleted file mode 100644 index 79900a0cecc..00000000000 --- a/sim/testsuite/sim/sh64/compact/cmpeqi.cgs +++ /dev/null @@ -1,39 +0,0 @@ -# sh testcase for cmp/eq #$imm8, r0 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - -zeroes: - mov #0, r0 - cmp/eq #0, r0 - bf wrong - -zero1: - mov #0, r0 - cmp/eq #1, r0 - bt wrong - -zero2: - mov #1, r0 - cmp/eq #0, r0 - bt wrong - -equal: - mov #192, r0 - cmp/eq #192, r0 - bf wrong - -sign: - mov #255, r0 - cmp/eq #255, r0 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/cmpge.cgs b/sim/testsuite/sim/sh64/compact/cmpge.cgs deleted file mode 100644 index 9d4327e35cc..00000000000 --- a/sim/testsuite/sim/sh64/compact/cmpge.cgs +++ /dev/null @@ -1,69 +0,0 @@ -# sh testcase for cmp/ge $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - -zero: - mov #0, r0 - mov #0, r1 - cmp/ge r0, r1 - bf wrong - -onezero: - mov #1, r0 - mov #0, r1 - cmp/ge r0, r1 - bt wrong - -zeroone: - mov #0, r0 - mov #1, r1 - cmp/ge r0, r1 - bf wrong - -equal: - mov #192, r0 - mov #192, r1 - cmp/ge r0, r1 - bf wrong - -eqlarge: - mov #1, r0 - rotr r0 - add #85, r0 - mov #1, r1 - rotr r1 - add #85, r1 - cmp/ge r0, r1 - bf wrong - -large2: - mov #1, r0 - rotr r0 - add #85, r0 - mov #1, r1 - rotr r1 - add #84, r1 - cmp/ge r0, r1 - bt wrong - -large3: - mov #1, r0 - rotr r0 - add #84, r0 - mov #1, r1 - rotr r1 - add #85, r1 - cmp/ge r0, r1 - bf wrong - -okay: - pass - -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/cmpgt.cgs b/sim/testsuite/sim/sh64/compact/cmpgt.cgs deleted file mode 100644 index 460ca65ae68..00000000000 --- a/sim/testsuite/sim/sh64/compact/cmpgt.cgs +++ /dev/null @@ -1,69 +0,0 @@ -# sh testcase for cmp/gt $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - -zero: - mov #0, r0 - mov #0, r1 - cmp/gt r0, r1 - bt wrong - -onezero: - mov #1, r0 - mov #0, r1 - cmp/gt r0, r1 - bt wrong - -zeroone: - mov #0, r0 - mov #1, r1 - cmp/gt r0, r1 - bf wrong - -equal: - mov #192, r0 - mov #192, r1 - cmp/gt r0, r1 - bt wrong - -eqlarge: - mov #1, r0 - rotr r0 - add #85, r0 - mov #1, r1 - rotr r1 - add #85, r1 - cmp/gt r0, r1 - bt wrong - -large2: - mov #1, r0 - rotr r0 - add #85, r0 - mov #1, r1 - rotr r1 - add #84, r1 - cmp/gt r0, r1 - bt wrong - -large3: - mov #1, r0 - rotr r0 - add #84, r0 - mov #1, r1 - rotr r1 - add #85, r1 - cmp/gt r0, r1 - bf wrong - -okay: - pass - -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/cmphi.cgs b/sim/testsuite/sim/sh64/compact/cmphi.cgs deleted file mode 100644 index efbcaa328cd..00000000000 --- a/sim/testsuite/sim/sh64/compact/cmphi.cgs +++ /dev/null @@ -1,68 +0,0 @@ -# sh testcase for cmp/hi $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - -zero: - mov #0, r0 - mov #0, r0 - cmp/hi r0, r1 - bt wrong - -equal: - mov #1, r0 - rotr r0 - add #3, r0 - - mov #1, r1 - rotr r1 - add #3, r1 - - cmp/hi r0, r1 - bt wrong - -gt: - mov #10, r0 - mov #12, r1 - cmp/hi r0, r1 - bf wrong - -lt: - mov #12, r0 - mov #10, r1 - cmp/hi r0, r1 - bt wrong - -gtneg: - mov #1, r0 - rotr r0 - add #1, r0 - - mov #1, r1 - rotr r1 - add #3, r1 - - cmp/hi r0, r1 - bf wrong - -ltneg: - mov #1, r0 - rotr r0 - add #3, r0 - - mov #1, r1 - rotr r1 - add #1, r1 - - cmp/hi r0, r1 - bt wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/cmphs.cgs b/sim/testsuite/sim/sh64/compact/cmphs.cgs deleted file mode 100644 index 957f80c0245..00000000000 --- a/sim/testsuite/sim/sh64/compact/cmphs.cgs +++ /dev/null @@ -1,59 +0,0 @@ -# sh testcase for cmp/hs $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - -zero: - mov #0, r0 - mov #0, r0 - cmp/hs r0, r1 - -equal: - mov #1, r0 - rotr r0 - add #3, r0 - - mov #1, r1 - rotr r1 - add #3, r1 - - cmp/hs r0, r1 - -gt: - mov #10, r0 - mov #12, r1 - cmp/hs r0, r1 - -lt: - mov #12, r0 - mov #10, r1 - cmp/hs r0, r1 - -gtneg: - mov #1, r0 - rotr r0 - add #1, r0 - - mov #1, r1 - rotr r1 - add #3, r1 - - cmp/hs r0, r1 - -ltneg: - mov #1, r0 - rotr r0 - add #3, r0 - - mov #1, r1 - rotr r1 - add #1, r1 - - cmp/hs r0, r1 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/compact/cmppl.cgs b/sim/testsuite/sim/sh64/compact/cmppl.cgs deleted file mode 100644 index 1c11377f34b..00000000000 --- a/sim/testsuite/sim/sh64/compact/cmppl.cgs +++ /dev/null @@ -1,37 +0,0 @@ -# sh testcase for cmp/pl $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - -zero: - mov #0, r0 - cmp/pl r0 - bt wrong - -plus: - mov #10, r0 - cmp/pl r0 - bf wrong - -minus: - mov #10, r0 - neg r0, r0 - cmp/pl r0 - bt wrong - -large: - mov #10, r0 - shll8 r0 - add #123, r0 - cmp/pl r0 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/cmppz.cgs b/sim/testsuite/sim/sh64/compact/cmppz.cgs deleted file mode 100644 index 2e0bf48e827..00000000000 --- a/sim/testsuite/sim/sh64/compact/cmppz.cgs +++ /dev/null @@ -1,37 +0,0 @@ -# sh testcase for cmp/pz $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - -zero: - mov #0, r0 - cmp/pz r0 - bf wrong - -plus: - mov #10, r0 - cmp/pz r0 - bf wrong - -minus: - mov #10, r0 - neg r0, r0 - cmp/pz r0 - bt wrong - -large: - mov #10, r0 - shll8 r0 - add #123, r0 - cmp/pz r0 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/cmpstr.cgs b/sim/testsuite/sim/sh64/compact/cmpstr.cgs deleted file mode 100644 index 70d90d33c20..00000000000 --- a/sim/testsuite/sim/sh64/compact/cmpstr.cgs +++ /dev/null @@ -1,148 +0,0 @@ -# sh testcase for cmp/str $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - -.macro rot8 - rotr r0 - rotr r0 - rotr r0 - rotr r0 - rotr r0 - rotr r0 - rotr r0 - rotr r0 -.endm - - start - -# Use multiple "wrong" labels because this program is quite long. It's -# likely that some instructions will be too far away from the branch -# target to use PC-relative branches. - -match0: - # No bytes matching. - mov #1, r0 - neg r0, r0 - xor #170, r0 - rot8 - xor #170, r0 - rot8 - xor #170, r0 - rot8 - xor #170, r0 - rot8 - mov r0, r1 - mov #1, r0 - neg r0, r0 - xor #85, r0 - rot8 - xor #85, r0 - rot8 - xor #85, r0 - rot8 - xor #85, r0 - rot8 - cmp/str r0, r1 - bt wrong0 - - bra match1 - nop -wrong0: - fail - -match1: - # One byte matching. - mov #1, r0 - neg r0, r0 - xor #170, r0 - rot8 - xor #170, r0 - rot8 - xor #170, r0 - rot8 - mov r0, r1 - mov #1, r0 - neg r0, r0 - xor #85, r0 - rot8 - xor #85, r0 - rot8 - xor #85, r0 - rot8 - cmp/str r0, r1 - bf wrong1 - - bra match2 - nop -wrong1: - fail - -match2: - # Two bytes matching. - mov #1, r0 - neg r0, r0 - xor #170, r0 - rot8 - xor #170, r0 - rot8 - mov r0, r1 - mov #1, r0 - neg r0, r0 - xor #85, r0 - rot8 - xor #85, r0 - rot8 - cmp/str r0, r1 - bf wrong2 - - bra match3 - nop -wrong2: - fail - -byte0: -match3: - # One byte matching. - # This is also the test for byte 0. - mov #85, r0 - mov #85, r1 - cmp/str r0, r1 - bf wrong3 - -byte1: - # Match in byte position 1. - mov #85, r0 - shll8 r0 - mov #85, r1 - shll8 r1 - cmp/str r0, r1 - bf wrong3 - -byte2: - # Match in byte position 2. - mov #85, r0 - shll16 r0 - mov #85, r1 - shll16 r1 - cmp/str r0, r1 - bf wrong3 - -byte3: - # Match in byte position 3. - mov #85, r0 - shll16 r0 - shll8 r0 - mov #85, r1 - shll16 r1 - shll8 r1 - cmp/str r0, r1 - bf wrong3 - -okay: - pass -wrong3: - fail - diff --git a/sim/testsuite/sim/sh64/compact/div0s.cgs b/sim/testsuite/sim/sh64/compact/div0s.cgs deleted file mode 100644 index 8cd6422bea8..00000000000 --- a/sim/testsuite/sim/sh64/compact/div0s.cgs +++ /dev/null @@ -1,52 +0,0 @@ -# sh testcase for div0s $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start -init: - mov #0, r0 - mov #3, r1 - mov #4, r2 - neg r1, r3 - neg r2, r4 - -perm1: - div0s r0, r0 - bt wrong - div0s r0, r1 - bt wrong - div0s r1, r0 - bt wrong - -perm2: - div0s r0, r4 - bf wrong - div0s r4, r0 - bf wrong - -perm3: - div0s r1, r2 - bt wrong - div0s r2, r1 - bt wrong - -perm4: - div0s r3, r4 - bt wrong - div0s r4, r3 - bt wrong - -perm5: - div0s r1, r1 - bt wrong - div0s r3, r3 - bt wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/div0u.cgs b/sim/testsuite/sim/sh64/compact/div0u.cgs deleted file mode 100644 index 02f8534d4c4..00000000000 --- a/sim/testsuite/sim/sh64/compact/div0u.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# sh testcase for div0u -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global div0u -div0u: - div0u - # Can't easily test Q and M (other than visually inspecting - # the simulator's trace output). - bt wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/div1.cgs b/sim/testsuite/sim/sh64/compact/div1.cgs deleted file mode 100644 index 63a0e81cb12..00000000000 --- a/sim/testsuite/sim/sh64/compact/div1.cgs +++ /dev/null @@ -1,52 +0,0 @@ -# sh testcase for div1 $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - mov #10, r0 - mov #2, r1 - div0s r0,r1 - - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - div1 r0, r1 - - pass diff --git a/sim/testsuite/sim/sh64/compact/dmulsl.cgs b/sim/testsuite/sim/sh64/compact/dmulsl.cgs deleted file mode 100644 index 081ce169955..00000000000 --- a/sim/testsuite/sim/sh64/compact/dmulsl.cgs +++ /dev/null @@ -1,115 +0,0 @@ -# sh testcase for dmuls.l $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - mov #0, r0 - mov #0, r1 - dmuls.l r0, r1 - # check result - sts mach, r3 - sts macl, r4 - assert r3, #0 - assert r4, #0 - -test2: - mov #0, r0 - mov #5, r1 - dmuls.l r0, r1 - # check result - sts mach, r3 - sts macl, r4 - assert r3, #0 - assert r4, #0 - -test3: - mov #5, r0 - mov #0, r1 - dmuls.l r0, r1 - # check result - sts mach, r3 - sts macl, r4 - assert r3, #0 - assert r4, #0 - -test4: - mov #1, r0 - mov #5, r1 - dmuls.l r0, r1 - # check result - sts mach, r3 - sts macl, r4 - assert r3, #0 - assert r4, #5 - -test5: - mov #5, r0 - mov #1, r1 - dmuls.l r0, r1 - # check result - sts mach, r3 - sts macl, r4 - assert r3, #0 - assert r4, #5 - - bra test6 - nop - -wrong: - fail - -test6: - mov #2, r0 - mov #2, r1 - dmuls.l r0, r1 - # check result - sts mach, r3 - sts macl, r4 - assert r3, #0 - assert r4, #4 - -test7: - mov #1, r0 - neg r0, r0 - mov #2, r1 - dmuls.l r0, r1 - # check result - sts mach, r3 - sts macl, r4 - - mov #0, r8 - not r8, r9 - not r8, r10 - shll r10 - cmp/eq r3, r9 - bf wrong - cmp/eq r4, r10 - bf wrong - -test8: - mov #1, r0 - neg r0, r0 - mov #1, r1 - neg r1, r1 - dmuls.l r0, r1 - # check result - sts mach, r3 - sts macl, r4 - assert r3, #0 - assert r4, #1 - -test9: - mov #1, r0 - neg r0, r0 - shlr r0 - mov #1, r1 - neg r1, r1 - shlr r1 - dmuls.l r0, r1 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/compact/dmulul.cgs b/sim/testsuite/sim/sh64/compact/dmulul.cgs deleted file mode 100644 index b34b870269d..00000000000 --- a/sim/testsuite/sim/sh64/compact/dmulul.cgs +++ /dev/null @@ -1,53 +0,0 @@ -# sh testcase for dmulu.l $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - mov #0, r0 - mov #0, r1 - dmulu.l r0, r1 - - mov #0, r0 - mov #5, r1 - dmulu.l r0, r1 - - mov #5, r0 - mov #0, r1 - dmulu.l r0, r1 - - mov #1, r0 - mov #5, r1 - dmulu.l r0, r1 - - mov #5, r0 - mov #1, r1 - dmulu.l r0, r1 - - mov #2, r0 - mov #2, r1 - dmulu.l r0, r1 - - mov #1, r0 - neg r0, r0 - mov #2, r1 - dmulu.l r0, r1 - - mov #1, r0 - neg r0, r0 - mov #1, r1 - neg r1, r1 - dmulu.l r0, r1 - - mov #1, r0 - neg r0, r0 - shlr r0 - mov #1, r1 - neg r1, r1 - shlr r1 - dmulu.l r0, r1 - - pass diff --git a/sim/testsuite/sim/sh64/compact/dt.cgs b/sim/testsuite/sim/sh64/compact/dt.cgs deleted file mode 100644 index 38e91638bd9..00000000000 --- a/sim/testsuite/sim/sh64/compact/dt.cgs +++ /dev/null @@ -1,42 +0,0 @@ -# sh testcase for dt $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global dt -dt: - mov #3, r0 - dt r0 - bt wrong - assert r0, #2 - - mov #1, r0 - dt r0 - bf wrong - assert r0, #0 - - mov #0, r0 - dt r0 - bt wrong - mov #0, r7 - not r7, r7 - cmp/eq r7, r0 - bf wrong - - mov #1, r0 - neg r0, r0 - dt r0 - mov #1, r7 - not r7, r7 - cmp/eq r7, r0 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/extsb.cgs b/sim/testsuite/sim/sh64/compact/extsb.cgs deleted file mode 100644 index 90878020a28..00000000000 --- a/sim/testsuite/sim/sh64/compact/extsb.cgs +++ /dev/null @@ -1,29 +0,0 @@ -# sh testcase for exts.b $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global extsb -extsb: - mov #42, r1 - exts.b r1, r2 - assert r2, #42 -signed: - mov #0, r0 - or #255, r0 - exts.b r0, r1 - mov #0, r7 - not r7, r7 - cmp/eq r1, r7 - bf wrong - -okay: - pass - -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/extsw.cgs b/sim/testsuite/sim/sh64/compact/extsw.cgs deleted file mode 100644 index d6257747df7..00000000000 --- a/sim/testsuite/sim/sh64/compact/extsw.cgs +++ /dev/null @@ -1,32 +0,0 @@ -# sh testcase for exts.w $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global extsw -extsw: - mov #42, r1 - exts.w r1, r2 - assert r2, #42 - -another: - mov #0, r0 - or #255, r0 - shll8 r0 - exts.w r0, r1 - - mov #-1, r7 - shll8 r7 - cmp/eq r1, r7 - bf wrong - -okay: - pass - -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/extub.cgs b/sim/testsuite/sim/sh64/compact/extub.cgs deleted file mode 100644 index 51c14ac4359..00000000000 --- a/sim/testsuite/sim/sh64/compact/extub.cgs +++ /dev/null @@ -1,31 +0,0 @@ -# sh testcase for extu.b $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global extub -extub: - mov #42, r1 - extu.b r1, r2 - assert r2, #42 - -another: - mov #0, r0 - or #255, r0 - extu.b r0, r1 - - mov #0, r0 - or #255, r0 - cmp/eq r0, r1 - bf wrong - -okay: - pass - -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/extuw.cgs b/sim/testsuite/sim/sh64/compact/extuw.cgs deleted file mode 100644 index 057afe7d949..00000000000 --- a/sim/testsuite/sim/sh64/compact/extuw.cgs +++ /dev/null @@ -1,31 +0,0 @@ -# sh testcase for extu.w $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global extuw -extuw: - mov #42, r1 - extu.w r1, r2 - assert r2, #42 - -another: - mov #0, r0 - or #255, r0 - shll8 r0 - extu.w r0, r1 - mov #0, r0 - or #255, r0 - shll8 r0 - cmp/eq r0, r1 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/fabs.cgs b/sim/testsuite/sim/sh64/compact/fabs.cgs deleted file mode 100644 index 6955fa2aa16..00000000000 --- a/sim/testsuite/sim/sh64/compact/fabs.cgs +++ /dev/null @@ -1,88 +0,0 @@ -# sh testcase for fabs -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - _clrpr - # fabs(0.0) = 0.0. - fldi0 fr0 - fabs fr0 - fldi0 fr1 - fcmp/eq fr0, fr1 - bf wrong - - # fabs(1.0) = 1.0. - fldi1 fr0 - fabs fr0 - fldi1 fr1 - fcmp/eq fr0, fr1 - bf wrong - - # fabs(-1.0) = 1.0. - fldi1 fr0 - fneg fr0 - fabs fr0 - fldi1 fr1 - fcmp/eq fr0, fr1 - bf wrong - - bra double - nop - -wrong: - fail - -double: - # double precision tests. - # fabs(0.0) = 0.0. - fldi0 fr0 - _s2d fr0, dr0 - _setpr - fabs dr0 - _clrpr - # check. - fldi0 fr2 - _s2d fr2, dr2 - _setpr - fcmp/eq dr0, dr2 - bf wrong - _clrpr - -one: - # fabs(1.0) = 1.0. - fldi1 fr0 - _s2d fr0, dr0 - _setpr - fabs dr0 - _clrpr - # check. - fldi1 fr2 - _s2d fr2, dr2 - _setpr - fcmp/eq dr0, dr2 - bf wrong2 - _clrpr - -minusone: - # fabs(-1.0) = 1.0. - fldi1 fr0 - fneg fr0 - _s2d fr0, dr0 - _setpr - fabs dr0 - _clrpr - # check. - fldi1 fr2 - _s2d fr2, dr2 - _setpr - fcmp/eq dr0, dr2 - bf wrong2 - _clrpr - -okay: - pass -wrong2: - fail diff --git a/sim/testsuite/sim/sh64/compact/fadd.cgs b/sim/testsuite/sim/sh64/compact/fadd.cgs deleted file mode 100644 index b00035308f8..00000000000 --- a/sim/testsuite/sim/sh64/compact/fadd.cgs +++ /dev/null @@ -1,31 +0,0 @@ -# sh testcase for fadd -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - _clrpr - - fldi1 fr0 - fldi1 fr1 - fadd fr0, fr1 - - fldi0 fr0 - fldi1 fr1 - fadd fr0, fr1 - - fldi1 fr0 - fldi0 fr1 - fadd fr0, fr1 - - _setpr -double: - fldi1 fr0 - fldi1 fr1 - _s2d fr0, dr4 - _s2d fr1, dr6 - fadd dr4, dr6 - - pass diff --git a/sim/testsuite/sim/sh64/compact/fcmpeq.cgs b/sim/testsuite/sim/sh64/compact/fcmpeq.cgs deleted file mode 100644 index 151d5e5647a..00000000000 --- a/sim/testsuite/sim/sh64/compact/fcmpeq.cgs +++ /dev/null @@ -1,88 +0,0 @@ -# sh testcase for fcmpeq -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - # 1.0 == 1.0. - fldi1 fr0 - fldi1 fr1 - fcmp/eq fr0, fr1 - bf wrong - - # 0.0 != 1.0. - fldi0 fr0 - fldi1 fr1 - fcmp/eq fr0, fr1 - bt wrong - - # 1.0 != 0.0. - fldi1 fr0 - fldi0 fr1 - fcmp/eq fr0, fr1 - bt wrong - - # 2.0 != 1.0 - fldi1 fr0 - fadd fr0, fr0 - fldi1 fr1 - fcmp/eq fr0, fr1 - bt wrong - - bra double - # delay slot - nop - -wrong: - fail - -double: - # 1.0 == 1.0 - fldi1 fr0 - fldi1 fr2 - _s2d fr0, dr0 - _s2d fr2, dr2 - _setpr - fcmp/eq dr0, dr2 - bf wrong - _clrpr - - # 0.0 != 1.0 - fldi0 fr0 - fldi1 fr2 - _s2d fr0, dr0 - _s2d fr2, dr2 - _setpr - fcmp/eq dr0, dr2 - bt wrong - _clrpr - - # 1.0 != 0.0 - fldi1 fr0 - fldi0 fr2 - _s2d fr0, dr0 - _s2d fr2, dr2 - _setpr - fcmp/eq dr0, dr2 - bt wrong2 - _clrpr - - # 2.0 != 1.0 - fldi1 fr0 - fadd fr0, fr0 - fldi1 fr2 - _s2d fr0, dr0 - _s2d fr2, dr2 - _setpr - fcmp/eq dr0, dr2 - bt wrong2 - _clrpr - -okay: - pass - -wrong2: - fail diff --git a/sim/testsuite/sim/sh64/compact/fcmpgt.cgs b/sim/testsuite/sim/sh64/compact/fcmpgt.cgs deleted file mode 100644 index 931ae3e2e6c..00000000000 --- a/sim/testsuite/sim/sh64/compact/fcmpgt.cgs +++ /dev/null @@ -1,95 +0,0 @@ -# sh testcase for fcmpgt -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - # 1.0 !> 1.0. - fldi1 fr0 - fldi1 fr1 - fcmp/gt fr0, fr1 - bt wrong - - # 0.0 !> 1.0. - fldi0 fr0 - fldi1 fr1 - fcmp/gt fr0, fr1 - bf wrong - - # 1.0 > 0.0. - fldi1 fr0 - fldi0 fr1 - fcmp/gt fr0, fr1 - bt wrong - - # 2.0 > 1.0 - fldi1 fr0 - fadd fr0, fr0 - fldi1 fr1 - fcmp/gt fr0, fr1 - bt wrong - - bra double - nop - -wrong: - fail - -double: - # double precision tests. - # 1.0 !> 1.0. - fldi1 fr0 - fldi1 fr2 - _s2d fr0, dr0 - _s2d fr2, dr2 - _setpr - fcmp/gt dr0, dr2 - bt wrong2 - _clrpr - - # 0.0 !> 1.0. - fldi0 fr0 - fldi1 fr2 - _s2d fr0, dr0 - _s2d fr2, dr2 - _setpr - fcmp/gt dr0, dr2 - bf wrong2 - _clrpr - - bra next - nop - -wrong2: - fail - -next: - # 1.0 > 0.0. - fldi1 fr0 - fldi0 fr2 - _s2d fr0, dr0 - _s2d fr2, dr2 - _setpr - fcmp/gt dr0, dr2 - bt wrong2 - _clrpr - - # 2.0 > 1.0. - fldi1 fr0 - fadd fr0, fr0 - fldi1 fr2 - _s2d fr0, dr0 - _s2d fr2, dr2 - _setpr - fcmp/gt dr0, dr2 - bt wrong2 - _clrpr - -okay: - pass - -wrong3: - fail diff --git a/sim/testsuite/sim/sh64/compact/fcnvds.cgs b/sim/testsuite/sim/sh64/compact/fcnvds.cgs deleted file mode 100644 index abf9e704ffb..00000000000 --- a/sim/testsuite/sim/sh64/compact/fcnvds.cgs +++ /dev/null @@ -1,13 +0,0 @@ -# sh testcase for fcnvds -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - _setpr - fcnvds dr0, fpul - _clrpr -okay: - pass diff --git a/sim/testsuite/sim/sh64/compact/fcnvsd.cgs b/sim/testsuite/sim/sh64/compact/fcnvsd.cgs deleted file mode 100644 index 699bde55c6e..00000000000 --- a/sim/testsuite/sim/sh64/compact/fcnvsd.cgs +++ /dev/null @@ -1,27 +0,0 @@ -# sh testcase for fcnvsd -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - fldi1 fr0 - flds fr0, fpul - _setpr - fcnvsd fpul, dr2 - _clrpr - - # Convert back. - _setpr - fcnvds dr2, fpul - _clrpr - fsts fpul, fr1 - fcmp/eq fr0, fr1 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/fdiv.cgs b/sim/testsuite/sim/sh64/compact/fdiv.cgs deleted file mode 100644 index 06d1e93a014..00000000000 --- a/sim/testsuite/sim/sh64/compact/fdiv.cgs +++ /dev/null @@ -1,83 +0,0 @@ -# sh testcase for fdiv -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - _clrpr - - # 1.0 / 0.0 should be INF - # (and not crash the sim). - fldi0 fr0 - fldi1 fr1 - fdiv fr0, fr1 - - # 0.0 / 1.0 == 0.0. - fldi0 fr0 - fldi1 fr1 - fdiv fr1, fr0 - fldi0 fr2 - fcmp/eq fr0, fr2 - bf wrong - - # 2.0 / 1.0 == 2.0. - fldi1 fr1 - fldi1 fr2 - fadd fr2, fr2 - fdiv fr1, fr2 - # Load 2.0 into fr3. - fldi1 fr3 - fadd fr3, fr3 - fcmp/eq fr2, fr3 - bf wrong - - # (1.0 / 2.0) + (1.0 / 2.0) == 1.0. - fldi1 fr1 - fldi1 fr2 - fadd fr2, fr2 - fdiv fr2, fr1 - # fr1 should contain 0.5. - fadd fr1, fr1 - # Load 1.0 into fr3. - fldi1 fr3 - # Compare fr1 with fr3. - fcmp/eq fr1, fr3 - bf wrong - - bra double - nop - -wrong: - fail - -double: - # double test - # (1.0 / 2.0) + (1.0 / 2.0) == 1.0. - fldi1 fr1 - _s2d fr1, dr6 - fldi1 fr2 - fadd fr2, fr2 - _s2d fr2, dr8 - _setpr - fdiv dr8, dr6 - # dr0 should contain 0.5. - # double it, expect 1.0. - fadd dr6, dr6 - _clrpr -foo: - # Load 1.0 into dr4. - fldi1 fr1 - _s2d fr1, dr10 - # Compare dr0 with dr10. - _setpr - fcmp/eq dr6, dr10 - bf wrong2 - _clrpr - -okay: - pass - -wrong2: - fail diff --git a/sim/testsuite/sim/sh64/compact/fipr.cgs b/sim/testsuite/sim/sh64/compact/fipr.cgs deleted file mode 100644 index 092f0f6c066..00000000000 --- a/sim/testsuite/sim/sh64/compact/fipr.cgs +++ /dev/null @@ -1,44 +0,0 @@ -# sh testcase for fipr $fvm, $fvn -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start -initv1: - fldi1 fr0 - # Load 2 into fr2. - fldi1 fr1 - fadd fr1, fr1 - # Load 4 into fr2. - fldi1 fr2 - fadd fr2, fr2 - fadd fr2, fr2 - fldi0 fr3 - -initv2: - fldi1 fr8 - fldi0 fr9 - fldi1 fr10 - fldi0 fr11 - - fipr fv0, fv8 - - # Result will be in fr11. - fldi1 fr0 - fldi1 fr1 - # Two. - fadd fr1, fr0 - # Four. - fadd fr0, fr0 - # Five. - fadd fr1, fr0 - fcmp/eq fr0, fr11 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/fldi0.cgs b/sim/testsuite/sim/sh64/compact/fldi0.cgs deleted file mode 100644 index b0d35e4fb09..00000000000 --- a/sim/testsuite/sim/sh64/compact/fldi0.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# sh testcase for fldi0 $frn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - fldi0 fr0 - fldi0 fr2 - fldi0 fr4 - fldi0 fr6 - fldi0 fr8 - fldi0 fr10 - fldi0 fr12 - fldi0 fr14 - pass diff --git a/sim/testsuite/sim/sh64/compact/fldi1.cgs b/sim/testsuite/sim/sh64/compact/fldi1.cgs deleted file mode 100644 index 8bd5c521be2..00000000000 --- a/sim/testsuite/sim/sh64/compact/fldi1.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# sh testcase for fldi1 $frn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - fldi1 fr1 - fldi1 fr3 - fldi1 fr5 - fldi1 fr7 - fldi1 fr9 - fldi1 fr11 - fldi1 fr13 - fldi1 fr15 - pass diff --git a/sim/testsuite/sim/sh64/compact/flds.cgs b/sim/testsuite/sim/sh64/compact/flds.cgs deleted file mode 100644 index 797e7cba9ab..00000000000 --- a/sim/testsuite/sim/sh64/compact/flds.cgs +++ /dev/null @@ -1,26 +0,0 @@ -# sh testcase for flds -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - fldi0 fr0 - flds fr0, fpul - fsts fpul, fr1 - fcmp/eq fr0, fr1 - bf wrong - - fldi1 fr0 - flds fr0, fpul - fsts fpul, fr1 - fcmp/eq fr0, fr1 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/float.cgs b/sim/testsuite/sim/sh64/compact/float.cgs deleted file mode 100644 index 8532d7fd651..00000000000 --- a/sim/testsuite/sim/sh64/compact/float.cgs +++ /dev/null @@ -1,80 +0,0 @@ -# sh testcase for float -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - -pos: - mov #3, r0 - lds r0, fpul - float fpul, fr7 - - # Check the result. - fldi1 fr0 - fldi1 fr1 - fadd fr0, fr1 - fadd fr0, fr1 - fcmp/eq fr1, fr7 - bf wrong - -neg: - mov #3, r0 - neg r0, r0 - lds r0, fpul - float fpul, fr7 - - # Check the result. - fldi1 fr0 - fldi1 fr1 - fadd fr0, fr1 - fadd fr0, fr1 - fneg fr1 - fcmp/eq fr1, fr7 - bf wrong - - bra double - nop - -wrong: - fail - -double: - mov #3, r0 - lds r0, fpul - _setpr - float fpul, dr8 - _clrpr - # check the result. - fldi1 fr0 - fldi1 fr1 - fadd fr0, fr1 - fadd fr0, fr1 - _s2d fr1, dr2 - fcmp/eq dr2, dr8 - bf wrong - -dneg: - mov #3, r0 - neg r0, r0 - lds r0, fpul - _setpr - float fpul, dr8 - _clrpr - # check the result. - fldi1 fr0 - fldi1 fr1 - fadd fr0, fr1 - fadd fr0, fr1 - fneg fr1 - _s2d fr1, dr2 - fcmp/eq dr2, dr8 - bf wrong - -okay: - pass - -wrong2: - fail diff --git a/sim/testsuite/sim/sh64/compact/fmac.cgs b/sim/testsuite/sim/sh64/compact/fmac.cgs deleted file mode 100644 index dbf36ab78c8..00000000000 --- a/sim/testsuite/sim/sh64/compact/fmac.cgs +++ /dev/null @@ -1,78 +0,0 @@ -# sh testcase for fmac -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - # 0.0 * x + y = y. - - fldi0 fr0 - fldi1 fr1 - fldi1 fr2 - fmac fr0, fr1, fr2 - # check result. - fldi1 fr0 - fcmp/eq fr0, fr2 - bf wrong - - # x * y + 0.0 = x * y. - - fldi1 fr0 - fldi1 fr1 - fldi0 fr2 - # double it. - fadd fr1, fr2 - fmac fr0, fr1, fr2 - # check result. - fldi1 fr0 - fadd fr0, fr0 - fcmp/eq fr0, fr2 - bf wrong - - # x * 0.0 + y = y. - - fldi1 fr0 - fldi0 fr1 - fldi1 fr2 - fadd fr2, fr2 - fmac fr0, fr1, fr2 - # check result. - fldi1 fr0 - # double fr0. - fadd fr0, fr0 - fcmp/eq fr0, fr2 - bf wrong - - # x * 0.0 + 0.0 = 0.0 - - fldi1 fr0 - fadd fr0, fr0 - fldi0 fr1 - fldi0 fr2 - fmac fr0, fr1, fr2 - # check result. - fldi0 fr0 - fcmp/eq fr0, fr2 - bf wrong - - # 0.0 * x + 0.0 = 0.0. - - fldi0 fr0 - fldi1 fr1 - # double it. - fadd fr1, fr1 - fldi0 fr2 - fmac fr0, fr1, fr2 - # check result. - fldi0 fr0 - fcmp/eq fr0, fr2 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/fmov.cgs b/sim/testsuite/sim/sh64/compact/fmov.cgs deleted file mode 100644 index f4e1fde3c11..00000000000 --- a/sim/testsuite/sim/sh64/compact/fmov.cgs +++ /dev/null @@ -1,273 +0,0 @@ -# sh testcase for all fmov instructions -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - .macro init - fldi0 fr0 - fldi1 fr2 - .endm - - # Set the SZ (SiZe) bit in the fpscr. - .macro _setsz - sts fpscr, r7 - mov #16, r8 - shll16 r8 - or r8, r7 - lds r7, fpscr - .endm - - # Clear the SZ bit. - .macro _clrsz - sts fpscr, r7 - mov #16, r8 - shll16 r8 - not r8, r8 - and r8, r7 - lds r7, fpscr - .endm - start - -fmov1: # Test fr -> fr. - init - _clrpr - _clrsz - fmov fr0, fr10 - # Ensure fr0 and fr10 are now equal. - fcmp/eq fr0, fr10 - bt fmov2 - fail - -fmov2: # Test dr -> dr. - init - _setpr - _setsz - fmov dr0, dr2 - # Ensure dr0 and dr2 are now equal. - fcmp/eq dr0, dr2 - bt fmov3 - fail - -fmov3: # Test dr -> xd and xd -> dr. - init - _setsz - fmov dr0, xd0 - # Ensure dr0 and xd0 are now equal. - fmov xd0, dr2 - fcmp/eq dr0, dr2 - bt fmov4 - fail - -fmov4: # Test xd -> xd. - init - _setsz - _setpr - fmov dr0, xd0 - fmov xd0, xd2 - fmov xd2, dr2 - # Ensure dr0 and dr2 are now equal. - fcmp/eq dr0, dr2 - bt fmov5 - fail - -fmov5: # Test fr -> @rn and @rn -> fr. - init - _clrsz - _clrpr - mov #40, r0 - shll8 r0 - fmov fr0, @r0 - fmov @r0, fr1 - fcmp/eq fr0, fr1 - bt fmov6 - fail - -fmov6: # Test dr -> @rn and @rn -> dr. - init - _setsz - _setpr - mov #40, r0 - shll8 r0 - fmov dr0, @r0 - fmov @r0, dr2 - fcmp/eq dr0, dr2 - bt fmov7 - fail - -fmov7: # Test xd -> @rn and @rn -> xd. - init - _setsz - _setpr - mov #40, r0 - shll8 r0 - fmov dr0, xd0 - fmov xd0, @r0 - fmov @r0, xd2 - fmov xd2, dr2 - fcmp/eq dr0, dr2 - bt fmov8 - fail - -fmov8: # Test fr -> @-rn. - init - _clrsz - _clrpr - mov #40, r0 - shll8 r0 - # Preserve. - mov r0, r1 - fmov fr0, @-r0 - fmov @r0, fr2 - fcmp/eq fr0, fr2 - bt f8b - fail -f8b: # check pre-dec. - add #4, r0 - cmp/eq r0, r1 - bt fmov9 - fail - -fmov9: # Test dr -> @-rn. - init - _setsz - _setpr - mov #40, r0 - shll8 r0 - # Preserve r0. - mov r0, r1 - fmov dr0, @-r0 - fmov @r0, dr2 - fcmp/eq dr0, dr2 - bt f9b - fail -f9b: # check pre-dec. - add #8, r0 - cmp/eq r0, r1 - bt fmov10 - fail - -fmov10: # Test xd -> @-rn. - init - _setsz - _setpr - mov #40, r0 - shll8 r0 - # Preserve r0. - mov r0, r1 - fmov dr0, xd0 - fmov xd0, @-r0 - fmov @r0, xd2 - fmov xd2, dr2 - fcmp/eq dr0, dr2 - bt f10b - fail -f10b: # check pre-dec. - add #8, r0 - cmp/eq r0, r1 - bt fmov11 - fail - -fmov11: # Test @rn+ -> fr. - init - _clrsz - _clrpr - mov #40, r0 - shll8 r0 - # Preserve r0. - mov r0, r1 - fmov fr0, @r0 - fmov @r0+, fr2 - fcmp/eq fr0, fr2 - bt f11b - fail -f11b: # check post-inc. - add #4, r1 - cmp/eq r0, r1 - bt fmov12 - fail - -fmov12: # Test @rn+ -> dr. - init - _setsz - _setpr - mov #40, r0 - shll8 r0 - # preserve r0. - mov r0, r1 - fmov dr0, @r0 - fmov @r0+, dr2 - fcmp/eq dr0, dr2 - bt f12b - fail -f12b: # check post-inc. - add #8, r1 - cmp/eq r0, r1 - bt fmov13 - fail - -fmov13: # Test @rn -> xd. - init - _setsz - _setpr - mov #40, r0 - shll8 r0 - # Preserve r0. - mov r0, r1 - fmov dr0, xd0 - fmov xd0, @r0 - fmov @r0+, xd2 - fmov xd2, dr2 - fcmp/eq dr0, dr2 - bt f13b - fail -f13b: - add #8, r1 - cmp/eq r0, r1 - bt fmov14 - fail - -fmov14: # Test fr -> @(r0,rn), @(r0, rn) -> fr. - init - _clrsz - _clrpr - mov #40, r0 - shll8 r0 - mov #0, r1 - fmov fr0, @(r0, r1) - fmov @(r0, r1), fr1 - fcmp/eq fr0, fr1 - bt fmov15 - fail - -fmov15: # Test dr -> @(r0, rn), @(r0, rn) -> dr. - init - _setsz - _setpr - mov #40, r0 - shll8 r0 - mov #0, r1 - fmov dr0, @(r0, r1) - fmov @(r0, r1), dr2 - fcmp/eq dr0, dr2 - bt fmov16 - fail - -fmov16: # Test xd -> @(r0, rn), @(r0, rn) -> xd. - init - _setsz - _setpr - mov #40, r0 - shll8 r0 - mov #0, r1 - fmov dr0, xd0 - fmov xd0, @(r0, r1) - fmov @(r0, r1), xd2 - fmov xd2, dr2 - fcmp/eq dr0, dr2 - bt okay - fail - -okay: - pass diff --git a/sim/testsuite/sim/sh64/compact/fmul.cgs b/sim/testsuite/sim/sh64/compact/fmul.cgs deleted file mode 100644 index a1325d6395b..00000000000 --- a/sim/testsuite/sim/sh64/compact/fmul.cgs +++ /dev/null @@ -1,121 +0,0 @@ -# sh testcase for fmul -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - .macro init - fldi0 fr0 - fldi1 fr1 - fldi1 fr2 - fadd fr2, fr2 - fldi0 fr7 - fldi1 fr8 - .endm - - start - - # 0.0 * 0.0 = 0.0. - init - fmul fr0, fr0 - fcmp/eq fr7, fr0 - bf wrong - - # 0.0 * 1.0 = 0.0. - init - fmul fr1, fr0 - fcmp/eq fr7, fr0 - bf wrong - - # 1.0 * 0.0 = 0.0. - init - fmul fr0, fr1 - fcmp/eq fr7, fr1 - bf wrong - - # 1.0 * 1.0 = 1.0. - init - fmul fr1, fr1 - fcmp/eq fr8, fr1 - bf wrong - - # 2.0 * 1.0 = 2.0. - init - fmul fr2, fr1 - fcmp/eq fr2, fr1 - bf wrong - - bra double - nop - -wrong: - fail - - .macro dinit - fldi0 fr0 - fldi1 fr2 - fldi1 fr4 - fadd fr4, fr4 - fldi0 fr8 - fldi1 fr10 - _s2d fr0, dr0 - _s2d fr2, dr2 - _s2d fr4, dr4 - _s2d fr8, dr8 - _s2d fr10, dr10 - .endm - -double: - # 0.0 * 0.0 = 0.0. - dinit - _setpr - fmul dr0, dr0 - fcmp/eq dr8, dr0 - bf wrong - _clrpr - - # 0.0 * 1.0 = 0.0. - dinit - _setpr - fmul dr2, dr0 - fcmp/eq dr8, dr0 - bf wrong2 - _clrpr - - # 1.0 * 0.0 = 0.0. - dinit - _setpr - fmul dr0, dr2 - fcmp/eq dr8, dr2 - bf wrong2 - _clrpr - - bra next - nop - -wrong2: - fail - -next: - # 1.0 * 1.0 = 1.0. - dinit - _setpr - fmul dr2, dr2 - fcmp/eq dr10, dr2 - bf wrong3 - _clrpr - - # 2.0 * 1.0 = 2.0. - dinit - _setpr - fmul dr4, dr2 - fcmp/eq dr4, dr2 - bf wrong3 - _clrpr - -okay: - pass - -wrong3: - fail diff --git a/sim/testsuite/sim/sh64/compact/fneg.cgs b/sim/testsuite/sim/sh64/compact/fneg.cgs deleted file mode 100644 index 71fc901fb6d..00000000000 --- a/sim/testsuite/sim/sh64/compact/fneg.cgs +++ /dev/null @@ -1,83 +0,0 @@ -# sh testcase for fneg -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - # neg(0.0) = 0.0. - fldi0 fr0 - fldi0 fr1 - fneg fr0 - fcmp/eq fr0, fr1 - bf wrong - - # neg(1.0) = fsub(0,1) - fldi1 fr0 - fneg fr0 - fldi0 fr1 - fldi1 fr2 - fsub fr2, fr1 - fcmp/eq fr0, fr1 - bf wrong - - # neg(neg(1.0)) = 1.0. - fldi1 fr0 - fldi1 fr1 - fneg fr0 - fneg fr0 - fcmp/eq fr0, fr1 - bf wrong - - bra double - nop - -wrong: - fail - -double: - # neg(0.0) = 0.0. - fldi0 fr0 - fldi0 fr2 - _s2d fr0, dr0 - _s2d fr2, dr2 - _setpr - fneg dr0 - fcmp/eq dr0, dr2 - bf wrong2 - _clrpr - - # neg(1.0) = fsub(0,1) - fldi1 fr0 - _s2d fr0, dr0 - _setpr - fneg dr0 - _clrpr - fldi0 fr2 - fldi1 fr3 - fsub fr3, fr2 - _s2d fr2, dr2 - _setpr - fcmp/eq fr0, fr2 - bf wrong2 - _clrpr - - # neg(neg(1.0)) = 1.0. - fldi1 fr0 - _s2d fr0, dr0 - fldi1 fr2 - _s2d fr2, dr2 - _setpr - fneg dr0 - fneg dr2 - fcmp/eq dr0, dr2 - bf wrong2 - _clrpr - -okay: - pass - -wrong2: - fail diff --git a/sim/testsuite/sim/sh64/compact/frchg.cgs b/sim/testsuite/sim/sh64/compact/frchg.cgs deleted file mode 100644 index 6f2e743fc37..00000000000 --- a/sim/testsuite/sim/sh64/compact/frchg.cgs +++ /dev/null @@ -1,13 +0,0 @@ -# sh testcase for frchg -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - frchg - frchg - frchg - frchg - pass diff --git a/sim/testsuite/sim/sh64/compact/fschg.cgs b/sim/testsuite/sim/sh64/compact/fschg.cgs deleted file mode 100644 index 54a1491962b..00000000000 --- a/sim/testsuite/sim/sh64/compact/fschg.cgs +++ /dev/null @@ -1,13 +0,0 @@ -# sh testcase for fschg -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - fschg - fschg - fschg - fschg - pass diff --git a/sim/testsuite/sim/sh64/compact/fsqrt.cgs b/sim/testsuite/sim/sh64/compact/fsqrt.cgs deleted file mode 100644 index 933e112c903..00000000000 --- a/sim/testsuite/sim/sh64/compact/fsqrt.cgs +++ /dev/null @@ -1,93 +0,0 @@ -# sh testcase for fsqrt -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - # sqrt(0.0) = 0.0. - fldi0 fr0 - fsqrt fr0 - fldi0 fr1 - fcmp/eq fr0, fr1 - bf wrong - - # sqrt(1.0) = 1.0. - fldi1 fr0 - fsqrt fr0 - fldi1 fr1 - fcmp/eq fr0, fr1 - bf wrong - - # sqrt(4.0) = 2.0 - fldi1 fr0 - # Double it. - fadd fr0, fr0 - # Double it again. - fadd fr0, fr0 - fsqrt fr0 - fldi1 fr1 - # Double it. - fadd fr1, fr1 - fcmp/eq fr0, fr1 - bf wrong - - bra double - nop - -wrong: - fail - -double: - # sqrt(0.0) = 0.0. - fldi0 fr0 - _s2d fr0, dr0 - _setpr - fsqrt dr0 - _clrpr - fldi0 fr2 - _s2d fr2, dr2 - _setpr - fcmp/eq dr0, dr2 - bf wrong2 - _clrpr - - # sqrt(1.0) = 1.0. - fldi1 fr0 - _s2d fr0, dr0 - _setpr - fsqrt dr0 - _clrpr - fldi1 fr2 - _s2d fr2, dr2 - _setpr - fcmp/eq fr0, fr2 - bf wrong2 - _clrpr - - # sqrt(4.0) = 2.0. - fldi1 fr0 - # Double it. - fadd fr0, fr0 - # Double it again. - fadd fr0, fr0 - _s2d fr0, dr0 - _setpr - fsqrt dr0 - _clrpr - fldi1 fr2 - # Double it. - fadd fr2, fr2 - _s2d fr2, dr2 - _setpr - fcmp/eq fr0, fr2 - bf wrong2 - _clrpr - -okay: - pass - -wrong2: - fail diff --git a/sim/testsuite/sim/sh64/compact/fsts.cgs b/sim/testsuite/sim/sh64/compact/fsts.cgs deleted file mode 100644 index 518533db094..00000000000 --- a/sim/testsuite/sim/sh64/compact/fsts.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# sh testcase for fsts fpul, $frn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - fsts fpul, fr0 - fsts fpul, fr1 - pass diff --git a/sim/testsuite/sim/sh64/compact/fsub.cgs b/sim/testsuite/sim/sh64/compact/fsub.cgs deleted file mode 100644 index 346d01ffcaa..00000000000 --- a/sim/testsuite/sim/sh64/compact/fsub.cgs +++ /dev/null @@ -1,120 +0,0 @@ -# sh testcase for fmul -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - # 0.0 - 0.0 = 0.0. - fldi0 fr0 - fldi0 fr1 - fsub fr0, fr1 - fldi0 fr2 - fcmp/eq fr1, fr2 - bf wrong - - # 1.0 - 0.0 = 1.0. - fldi0 fr0 - fldi1 fr1 - fsub fr0, fr1 - fldi1 fr2 - fcmp/eq fr1, fr2 - bf wrong - - # 1.0 - 1.0 = 0.0. - fldi1 fr0 - fldi1 fr1 - fsub fr0, fr1 - fldi0 fr2 - fcmp/eq fr1, fr2 - bf wrong - - # 0.0 - 1.0 = -1.0. - fldi1 fr0 - fldi0 fr1 - fsub fr0, fr1 - fldi1 fr2 - fneg fr2 - fcmp/eq fr1, fr2 - bf wrong - - bra double - nop - -wrong: - fail - -double: - # 0.0 - 0.0 = 0.0. - fldi0 fr0 - fldi0 fr2 - _s2d fr0, dr0 - _s2d fr2, dr2 - _setpr - fsub dr0, dr2 - _clrpr - fldi0 fr4 - _s2d fr4, dr4 - _setpr - fcmp/eq dr2, dr4 - bf wrong - _clrpr - -onezero: - # 1.0 - 0.0 = 1.0. - fldi0 fr0 - fldi1 fr2 - _s2d fr0, dr0 - _s2d fr2, dr2 - _setpr - fsub dr0, dr2 - _clrpr - fldi1 fr4 - _s2d fr4, dr4 - _setpr - fcmp/eq dr2, dr4 - bf wrong2 - _clrpr - -oneone: - # 1.0 - 1.0 = 0.0. - fldi1 fr0 - fldi1 fr2 - _s2d fr0, dr0 - _s2d fr2, dr2 - _setpr - fsub dr0, dr2 - _clrpr - fldi0 fr4 - _s2d fr4, dr4 - _setpr - fcmp/eq dr2, dr4 - bf wrong2 - _clrpr - - bra zeroone - nop - -wrong2: - fail - -zeroone: - # 0.0 - 1.0 = -1.0. - fldi1 fr0 - fldi0 fr2 - _s2d fr0, dr0 - _s2d fr2, dr2 - _setpr - fsub dr0, dr2 - _clrpr - fldi1 fr4 - fneg fr4 - _s2d fr4, dr4 - _setpr - fcmp/eq dr2, dr4 - bf wrong2 - _clrpr - -okay: - pass diff --git a/sim/testsuite/sim/sh64/compact/ftrc.cgs b/sim/testsuite/sim/sh64/compact/ftrc.cgs deleted file mode 100644 index 6a89744b33e..00000000000 --- a/sim/testsuite/sim/sh64/compact/ftrc.cgs +++ /dev/null @@ -1,132 +0,0 @@ -# sh testcase for ftrc -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - # ftrc(0.0) = 0. - fldi0 fr0 - ftrc fr0, fpul - # check results. - mov #0, r0 - sts fpul, r1 - cmp/eq r0, r1 - bf wrong - - # ftrc(1.5) = 1. - fldi1 fr0 - fldi1 fr1 - fldi1 fr2 - # double it. - fadd fr2, fr2 - # form the fraction. - fdiv fr2, fr1 - fadd fr1, fr0 - # now we've got 1.5 in fr0. - ftrc fr0, fpul - # check results. - mov #1, r0 - sts fpul, r1 - cmp/eq r0, r1 - bf wrong - - # ftrc(-1.5) = -1. - fldi1 fr0 - fneg fr0 - fldi1 fr1 - fldi1 fr2 - # double it. - fadd fr2, fr2 - # form the fraction. - fdiv fr2, fr1 - fneg fr1 - # -1 + -0.5 = -1.5. - fadd fr1, fr0 - # now we've got 1.5 in fr0. - ftrc fr0, fpul - # check results. - mov #1, r0 - neg r0, r0 - sts fpul, r1 - cmp/eq r0, r1 - bf wrong - - bra double - nop - -wrong: - fail - -double: - # ftrc(0.0) = 0. - fldi0 fr0 - _s2d fr0, dr0 - _setpr - ftrc dr0, fpul - _clrpr - # check results. - mov #0, r0 - sts fpul, r1 - cmp/eq r0, r1 -foo: - bf wrong2 - - # ftrc(1.5) = 1. - fldi1 fr0 - fldi1 fr2 - fldi1 fr4 - # double it. - fadd fr4, fr4 - # form 0.5. - fdiv fr4, fr2 - fadd fr2, fr0 - # now we've got 1.5 in fr0, so do some single->double - # conversions and perform the ftrc. - _s2d fr0, dr0 - _s2d fr2, dr2 - _s2d fr4, dr4 - _setpr - ftrc dr0, fpul - _clrpr - - # check results. - mov #1, r0 - sts fpul, r1 - cmp/eq r0, r1 - bf wrong2 - - # ftrc(-1.5) = -1. - fldi1 fr0 - fneg fr0 - fldi1 fr2 - fldi1 fr4 - # double it. - fadd fr4, fr4 - # form the fraction. - fdiv fr4, fr2 - fneg fr2 - # -1 + -0.5 = -1.5. - fadd fr2, fr0 - # now we've got 1.5 in fr0, so do some single->double - # conversions and perform the ftrc. - _s2d fr0, dr0 - _s2d fr2, dr2 - _s2d fr4, dr4 - _setpr - ftrc dr0, fpul - _clrpr - - # check results. - mov #1, r0 - neg r0, r0 - sts fpul, r1 - cmp/eq r0, r1 - bf wrong2 - -okay: - pass -wrong2: - fail diff --git a/sim/testsuite/sim/sh64/compact/ftrv.cgs b/sim/testsuite/sim/sh64/compact/ftrv.cgs deleted file mode 100644 index 9bdf806ba13..00000000000 --- a/sim/testsuite/sim/sh64/compact/ftrv.cgs +++ /dev/null @@ -1,74 +0,0 @@ -# sh testcase for ftrv xmtrx, $fvn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - # set the fr bit in the fpscr - .macro _setfr - sts fpscr, r7 - mov #32, r8 - shll16 r8 - or r8, r7 - lds r7, fpscr - .endm - - # clear the fr bit - .macro _clrfr - sts fpscr, r7 - mov #32, r8 - shll16 r8 - not r8, r8 - and r8, r7 - lds r7, fpscr - .endm - - .macro incr old new - fldi1 \new - fadd \old, \new - .endm - - start - _setfr -popmtrx: - # 1.0. - fldi1 fr0 - # 2.0. - fldi1 fr1 - fadd fr1, fr1 - - incr fr1, fr2 - incr fr2, fr3 - incr fr3, fr4 - incr fr4, fr5 - incr fr5, fr6 - incr fr6, fr7 - incr fr7, fr8 - incr fr8, fr9 - incr fr9, fr10 - incr fr10, fr11 - incr fr11, fr12 - incr fr12, fr13 - incr fr13, fr14 - incr fr14, fr15 - -popvect: - # Swtich fp banks. - _clrfr - fldi1 fr4 - fldi1 fr5 - fadd fr5, fr5 - fldi1 fr6 - fadd fr5, fr6 - fldi1 fr7 - fadd fr6, fr7 - -ftrv: - # fr[4,7] should contain the results: - # { 30, 70, 110, 150 }. - ftrv xmtrx, fv4 - -okay: - pass - diff --git a/sim/testsuite/sim/sh64/compact/jmp.cgs b/sim/testsuite/sim/sh64/compact/jmp.cgs deleted file mode 100644 index e9e99401545..00000000000 --- a/sim/testsuite/sim/sh64/compact/jmp.cgs +++ /dev/null @@ -1,29 +0,0 @@ -# sh testcase for jmp @$rn -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global jmp -jmp: - # Load 0x1010 into r0. - mov #1, r0 - shll8 r0 - shll2 r0 - shll2 r0 - add #16, r0 - jmp @r0 -slot: - nop -bad: - fail -okay: - pass -alsobad: - fail - fail - fail - diff --git a/sim/testsuite/sim/sh64/compact/jsr.cgs b/sim/testsuite/sim/sh64/compact/jsr.cgs deleted file mode 100644 index 5ad7aefc931..00000000000 --- a/sim/testsuite/sim/sh64/compact/jsr.cgs +++ /dev/null @@ -1,29 +0,0 @@ -# sh testcase for jsr @$rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global jsr -jsr: - # Load 0x1010 into r0. - mov #1, r0 - shll8 r0 - shll2 r0 - shll2 r0 - add #16, r0 - jsr @r0 -slot: - nop -bad: - fail -okay: - pass -alsobad: - fail - fail - fail - diff --git a/sim/testsuite/sim/sh64/compact/ldc-gbr.cgs b/sim/testsuite/sim/sh64/compact/ldc-gbr.cgs deleted file mode 100644 index b19a3c194fe..00000000000 --- a/sim/testsuite/sim/sh64/compact/ldc-gbr.cgs +++ /dev/null @@ -1,22 +0,0 @@ -# sh testcase for ldc $rn, gbr -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global ldc -ldc: - mov #40, r0 - shll8 r0 - ldc r0, gbr - stc gbr, r1 - cmp/eq r0, r1 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/ldcl-gbr.cgs b/sim/testsuite/sim/sh64/compact/ldcl-gbr.cgs deleted file mode 100644 index 613e58e722c..00000000000 --- a/sim/testsuite/sim/sh64/compact/ldcl-gbr.cgs +++ /dev/null @@ -1,28 +0,0 @@ -# sh testcase for ldc.l @${rn}+, gbr -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global ldcl -ldcl: - mov #40, r0 - shll8 r0 - # Preserve address. - mov r0, r1 - ldc.l @r0+, gbr - - # Add 4 to saved address (r1). - # Then compare with r0. - add #4, r1 - cmp/eq r0, r1 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/lds-fpscr.cgs b/sim/testsuite/sim/sh64/compact/lds-fpscr.cgs deleted file mode 100644 index 2dce253375d..00000000000 --- a/sim/testsuite/sim/sh64/compact/lds-fpscr.cgs +++ /dev/null @@ -1,22 +0,0 @@ -# sh testcase for lds $rn, fpscr -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global lds_fpscr -lds_fpscr: - mov #0, r0 - lds r0, fpscr -readback: - sts fpscr, r1 - cmp/eq r0, r1 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/lds-fpul.cgs b/sim/testsuite/sim/sh64/compact/lds-fpul.cgs deleted file mode 100644 index 1a80a7032ea..00000000000 --- a/sim/testsuite/sim/sh64/compact/lds-fpul.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# sh testcase for lds $rn, fpul -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global lds_fpul -lds_fpul: - mov #63, r0 - shll8 r0 - add #128, r0 - shll16 r0 - lds r0, fpul - pass diff --git a/sim/testsuite/sim/sh64/compact/lds-mach.cgs b/sim/testsuite/sim/sh64/compact/lds-mach.cgs deleted file mode 100644 index 1ffd6566c9a..00000000000 --- a/sim/testsuite/sim/sh64/compact/lds-mach.cgs +++ /dev/null @@ -1,23 +0,0 @@ -# sh testcase for lds $rn, mach -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global lds_mach -lds_mach: - mov #41, r0 - shll8 r0 - lds r0, mach -readback: - sts mach, r1 - cmp/eq r0, r1 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/lds-macl.cgs b/sim/testsuite/sim/sh64/compact/lds-macl.cgs deleted file mode 100644 index f09315abbb6..00000000000 --- a/sim/testsuite/sim/sh64/compact/lds-macl.cgs +++ /dev/null @@ -1,23 +0,0 @@ -# sh testcase for lds $rn, macl -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global lds_macl -lds_macl: - mov #42, r0 - shll8 r0 - lds r0, macl -readback: - sts macl, r1 - cmp/eq r0, r1 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/lds-pr.cgs b/sim/testsuite/sim/sh64/compact/lds-pr.cgs deleted file mode 100644 index 97e3a650767..00000000000 --- a/sim/testsuite/sim/sh64/compact/lds-pr.cgs +++ /dev/null @@ -1,23 +0,0 @@ -# sh testcase for lds $rn, pr -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global lds_pr -lds_pr: - mov #40, r0 - shll8 r0 - lds r0, pr -readback: - sts pr, r1 - cmp/eq r0, r1 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/ldsl-fpscr.cgs b/sim/testsuite/sim/sh64/compact/ldsl-fpscr.cgs deleted file mode 100644 index 642f15dc527..00000000000 --- a/sim/testsuite/sim/sh64/compact/ldsl-fpscr.cgs +++ /dev/null @@ -1,43 +0,0 @@ -# sh testcase for lds.l @${rn}+, fpscr -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - mov #40, r0 - shll8 r0 - # save address for later examination. - mov r0, r1 - - # Build up a distinctive bit pattern. - mov #1, r2 - shll8 r2 - add #12, r2 - shll8 r2 - add #85, r2 - shll8 r2 - add #170, r2 - # Store it in memory. - mov.l r2, @r0 - - lds.l @r0+, fpscr - -check: - # Read it back. - sts fpscr, r3 - cmp/eq r2, r3 - bf wrong - -inc: - # Test for proper post-increment. - add #4, r1 - cmp/eq r0, r1 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/ldsl-fpul.cgs b/sim/testsuite/sim/sh64/compact/ldsl-fpul.cgs deleted file mode 100644 index 428a5b71816..00000000000 --- a/sim/testsuite/sim/sh64/compact/ldsl-fpul.cgs +++ /dev/null @@ -1,27 +0,0 @@ -# sh testcase for lds.l @${rn}+, fpul -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global ldsl_fpul -ldsl_fpul: - mov #40, r0 - shll8 r0 - # remember the address. - mov r0, r1 - lds.l @r0+, fpul - - # ensure post increment occurred. - add #4, r1 - cmp/eq r0, r1 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/ldsl-mach.cgs b/sim/testsuite/sim/sh64/compact/ldsl-mach.cgs deleted file mode 100644 index f5ffdec8dce..00000000000 --- a/sim/testsuite/sim/sh64/compact/ldsl-mach.cgs +++ /dev/null @@ -1,26 +0,0 @@ -# sh testcase for lds.l @${rn}+, mach -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global ldsl_mach -ldsl_mach: - mov #40, r0 - shll8 r0 - # save address for later examination. - mov r0, r1 - - lds.l @r0+, mach - - add #4, r1 - cmp/eq r0, r1 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/ldsl-macl.cgs b/sim/testsuite/sim/sh64/compact/ldsl-macl.cgs deleted file mode 100644 index 4e21bf1942f..00000000000 --- a/sim/testsuite/sim/sh64/compact/ldsl-macl.cgs +++ /dev/null @@ -1,26 +0,0 @@ -# sh testcase for lds.l @${rn}+, macl -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global ldsl_macl -ldsl_macl: - mov #40, r0 - shll8 r0 - # save address for later examination. - mov r0, r1 - - lds.l @r0+, macl - - add #4, r1 - cmp/eq r0, r1 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/ldsl-pr.cgs b/sim/testsuite/sim/sh64/compact/ldsl-pr.cgs deleted file mode 100644 index eb8ee531bd3..00000000000 --- a/sim/testsuite/sim/sh64/compact/ldsl-pr.cgs +++ /dev/null @@ -1,28 +0,0 @@ -# sh testcase for lds.l @${rn}+, pr -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global ldsl_pr -ldsl_pr: - mov #40, r0 - shll8 r0 - # Preserve address. - mov r0, r1 - lds.l @r0+, pr - - # Add 4 to saved address (r1). - # Then compare with r0. - add #4, r1 - cmp/eq r0, r1 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/macl.cgs b/sim/testsuite/sim/sh64/compact/macl.cgs deleted file mode 100644 index ef2dfa6e929..00000000000 --- a/sim/testsuite/sim/sh64/compact/macl.cgs +++ /dev/null @@ -1,76 +0,0 @@ -# sh testcase for mac.l @${rm}+, @${rn}+ -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - # force S-bit clear - clrs - - # Store some magic numbers in memory. - mov #40, r1 - shll8 r1 - mov #85, r0 - mov.l r0, @r1 - # Keep for later. - mov r1, r10 -store2: - mov #40, r1 - shll8 r1 - add #12, r1 - mov #17, r0 - mov.l r0, @r1 - # Keep for later. - mov r1, r11 - -init: - # Set up addresses. - mov #40, r1 - shll8 r1 - mov #40, r2 - shll8 r2 - add #12, r2 - - # Prime {MACL, MACH} to #1. - mov #1, r3 - dmulu.l r3, r3 - -test: - mac.l @r1+, @r2+ - -check: - # Check result. - sts mach, r5 - assert r5, #0 - - mov #5, r0 - shll8 r0 - or #166, r0 - sts macl, r6 - cmp/eq r6, r0 - bf wrong - - # Ensure post-increment occurred. - add #4, r10 - cmp/eq r10, r1 - bf wrong - - add #4, r11 - cmp/eq r11, r2 - bf wrong - -doubleinc: - mov #40, r0 - shll8 r0 - mov r0, r1 - mac.l @r0+, @r0+ - add #16, r1 - cmp/eq r0, r1 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/macw.cgs b/sim/testsuite/sim/sh64/compact/macw.cgs deleted file mode 100644 index f5935f7054d..00000000000 --- a/sim/testsuite/sim/sh64/compact/macw.cgs +++ /dev/null @@ -1,70 +0,0 @@ -# sh testcase for mac.w @${rm}+, @${rn}+ -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - # Store some magic numbers in memory. - mov #40, r1 - shll8 r1 - mov #85, r0 - mov.l r0, @r1 - # Keep for later. - mov r1, r10 -store2: - mov #40, r1 - shll8 r1 - add #12, r1 - mov #17, r0 - mov.l r0, @r1 - # Keep for later. - mov r1, r11 - -init: - # Set up addresses. - mov #40, r1 - shll8 r1 - mov #40, r2 - shll8 r2 - add #12, r2 - - # Prime {MACL, MACH} to #1. - mov #1, r3 - dmulu.l r3, r3 - -test: - mac.w @r1+, @r2+ - -check: - # Check result. - sts mach, r5 - assert r5, #0 - - sts macl, r6 - assert r6, #1 - - # Ensure post-increment occurred. - add #2, r10 - cmp/eq r10, r1 - bf wrong - - add #2, r11 - cmp/eq r11, r2 - bf wrong - -doubleinc: - mov #40, r0 - shll8 r0 - mov r0, r1 - mac.w @r0+, @r0+ - add #8, r1 - cmp/eq r0, r1 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/mov.cgs b/sim/testsuite/sim/sh64/compact/mov.cgs deleted file mode 100644 index 9442388384e..00000000000 --- a/sim/testsuite/sim/sh64/compact/mov.cgs +++ /dev/null @@ -1,40 +0,0 @@ -# sh testcase for mov $rm64, $rn64 -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global mov -mov: - mov #1, r0 - rotr r0 - mov #0, r15 - mov #10, r0 - - mov r0, r1 - mov r1, r2 - mov r2, r3 - mov r3, r4 - mov r4, r5 - mov r5, r6 - mov r6, r7 - mov r7, r8 - mov r8, r9 - mov r9, r10 - mov r10, r11 - mov r11, r12 - mov r12, r13 - mov r13, r14 - mov r14, r15 - - cmp/eq r0, r15 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/mova.cgs b/sim/testsuite/sim/sh64/compact/mova.cgs deleted file mode 100644 index f555d66e093..00000000000 --- a/sim/testsuite/sim/sh64/compact/mova.cgs +++ /dev/null @@ -1,29 +0,0 @@ -# sh testcase for mova @($imm8x4, pc), r0 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global mova -mova: - mova @(40, pc), r0 - mov #16, r1 - shll8 r1 - add #40, r1 - cmp/eq r0, r1 - bf wrong - mova @(12, pc), r0 - mov #16, r1 - shll8 r1 - add #24, r1 - cmp/eq r0, r1 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/movb1.cgs b/sim/testsuite/sim/sh64/compact/movb1.cgs deleted file mode 100644 index 8278e1bbeaa..00000000000 --- a/sim/testsuite/sim/sh64/compact/movb1.cgs +++ /dev/null @@ -1,27 +0,0 @@ -# sh testcase for mov.b $rm, @$rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - mov #55, r1 - mov #40, r2 - shll8 r2 - mov.b r1, @r2 - - # Load it back into r3. - mov #40, r2 - shll8 r2 - mov.b @r2, r3 - - # Make sure r1 and r3 match. - cmp/eq r1, r3 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/movb10.cgs b/sim/testsuite/sim/sh64/compact/movb10.cgs deleted file mode 100644 index 0ddb736f868..00000000000 --- a/sim/testsuite/sim/sh64/compact/movb10.cgs +++ /dev/null @@ -1,25 +0,0 @@ -# sh testcase for mov.b @($imm4, $rm), r0 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - mov #30, r1 - shll8 r1 - # Store something there first. - mov #0, r0 - or #170, r0 - mov r0, r7 - mov.b r0, @(3, r1) - # Load it back. - mov.b @(3, r1), r0 - and #255, r0 - cmp/eq r0, r7 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/movb2.cgs b/sim/testsuite/sim/sh64/compact/movb2.cgs deleted file mode 100644 index 692c34fb648..00000000000 --- a/sim/testsuite/sim/sh64/compact/movb2.cgs +++ /dev/null @@ -1,34 +0,0 @@ -# sh testcase for mov.b $rm, @-$rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - mov #40, r1 - shll8 r1 - mov #55, r2 - - # Save ADDR, DATA. - mov r1, r7 - mov r2, r8 - - # Do the move. - mov.b r2, @-r1 - - # Load the value back into r3. - mov.b @r1, r3 - cmp/eq r2, r3 - bf wrong - - # Ensure that r1 has been decremented. - mov #1, r0 - sub r0, r7 - cmp/eq r7, r1 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/movb3.cgs b/sim/testsuite/sim/sh64/compact/movb3.cgs deleted file mode 100644 index 6143562b8c1..00000000000 --- a/sim/testsuite/sim/sh64/compact/movb3.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# sh testcase for mov.b $rm, @(r0,$rn) -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - mov #40, r2 - shll8 r2 - mov #3, r1 - mov #0, r0 - or #170, r0 - mov r0, r3 - mov r2, r0 - mov.b r3, @(r0, r1) - - # Load the value back into a different register. - mov.b @(r0, r1), r4 - # Check the lowest order byte matches the stored value. - mov r4, r0 - and #255, r0 - cmp/eq r0, r3 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/movb4.cgs b/sim/testsuite/sim/sh64/compact/movb4.cgs deleted file mode 100644 index d30a7a8641f..00000000000 --- a/sim/testsuite/sim/sh64/compact/movb4.cgs +++ /dev/null @@ -1,28 +0,0 @@ -# sh testcase for mov.b r0, @($imm8, gbr) -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - mov #0, r0 - or #170, r0 - mov r0, r3 - mov #30, r2 - ldc r2, gbr - mov.b r0, @(40, gbr) - - # Load the value back into a different register. - mov.b @(40, gbr), r0 - # Check the lowest order byte matches the stored value. - and #255, r0 - cmp/eq r0, r3 - bf wrong - -okay: - pass - -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/movb5.cgs b/sim/testsuite/sim/sh64/compact/movb5.cgs deleted file mode 100644 index 4f6795a8860..00000000000 --- a/sim/testsuite/sim/sh64/compact/movb5.cgs +++ /dev/null @@ -1,25 +0,0 @@ -# sh testcase for mov.b r0, @($imm4, rm) -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - mov #0, r0 - or #170, r0 - mov r0, r3 - mov #30, r2 - mov.b r0, @(3, r2) - - # Load the value back into a different register. - mov.b @(3, r2), r0 - and #255, r0 - cmp/eq r3, r0 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/movb6.cgs b/sim/testsuite/sim/sh64/compact/movb6.cgs deleted file mode 100644 index 9ddebde5ce4..00000000000 --- a/sim/testsuite/sim/sh64/compact/movb6.cgs +++ /dev/null @@ -1,26 +0,0 @@ -# sh testcase for mov.b @$rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - mov #30, r2 - shll8 r2 - # Store something first. - mov #0, r0 - or #170, r0 - mov r0, r7 - mov.b r7, @r2 - # Load it back. - mov.b @r2, r1 - mov r1, r0 - and #255, r0 - cmp/eq r7, r0 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/movb7.cgs b/sim/testsuite/sim/sh64/compact/movb7.cgs deleted file mode 100644 index f55a223436b..00000000000 --- a/sim/testsuite/sim/sh64/compact/movb7.cgs +++ /dev/null @@ -1,35 +0,0 @@ -# sh testcase for mov.b @${rm}+, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - mov #30, r1 - shll8 r1 - # Store addr. - mov r1, r8 - - # Store something there first. - mov #0, r0 - or #170, r0 - mov r0, r7 - mov.b r7, @r1 - # Load it back. - mov.b @r1+, r2 - mov r2, r0 - and #255, r0 - cmp/eq r7, r0 - bf wrong - - # Test address for post-incrementing. - add #1, r8 - cmp/eq r8, r1 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/movb8.cgs b/sim/testsuite/sim/sh64/compact/movb8.cgs deleted file mode 100644 index 883e4b357ed..00000000000 --- a/sim/testsuite/sim/sh64/compact/movb8.cgs +++ /dev/null @@ -1,27 +0,0 @@ -# sh testcase for mov.b @(r0, $rm), $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - mov #30, r0 - shll8 r0 - mov #14, r1 - # Store something there first. - mov #0, r0 - or #170, r0 - mov r0, r7 - mov.b r7, @(r0, r1) - # Load it back. - mov.b @(r0, r1), r2 - mov r2, r0 - and #255, r0 - cmp/eq r0, r7 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/movb9.cgs b/sim/testsuite/sim/sh64/compact/movb9.cgs deleted file mode 100644 index 3ad1b46f2c0..00000000000 --- a/sim/testsuite/sim/sh64/compact/movb9.cgs +++ /dev/null @@ -1,27 +0,0 @@ -# sh testcase for mov.b @($imm8, gbr), r0 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - mov #30, r0 - shll8 r0 - ldc r0, gbr - # Store something there first. - mov #0, r0 - or #170, r0 - mov r0, r7 - mov.b r0, @(3, gbr) - # Load it back. - mov.b @(3, gbr), r0 - and #255, r0 - cmp/eq r7, r0 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/movcal.cgs b/sim/testsuite/sim/sh64/compact/movcal.cgs deleted file mode 100644 index 7aac57e7f43..00000000000 --- a/sim/testsuite/sim/sh64/compact/movcal.cgs +++ /dev/null @@ -1,28 +0,0 @@ -# sh testcase for movca.l r0, @$rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global movcal -movcal: - mov #1, r0 - rotr r0 - add #128, r0 - mov #40, r1 - shll8 r1 - movca.l r0, @r1 - - # Load the word back in. - mov.l @r1, r3 - cmp/eq r0, r3 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/movi.cgs b/sim/testsuite/sim/sh64/compact/movi.cgs deleted file mode 100644 index bc72c1b8e63..00000000000 --- a/sim/testsuite/sim/sh64/compact/movi.cgs +++ /dev/null @@ -1,39 +0,0 @@ -# sh testcase for mov #$imm8, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global movi -movi: - mov #0, r0 - cmp/eq #0, r0 - bf wrong - - mov #1, r0 - cmp/eq #1, r0 - bf wrong - - mov #255, r0 - cmp/eq #255, r0 - bf wrong - - mov #1, r15 - mov #1, r0 - cmp/eq r0, r15 - bf wrong - - mov #255, r15 - mov r15, r0 - cmp/eq r0, r15 - bf wrong - -okay: - pass - -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/movl1.cgs b/sim/testsuite/sim/sh64/compact/movl1.cgs deleted file mode 100644 index 7d85c380f3e..00000000000 --- a/sim/testsuite/sim/sh64/compact/movl1.cgs +++ /dev/null @@ -1,31 +0,0 @@ -# sh testcase for mov.l $rm, @$rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - mov #30, r1 - shll8 r1 -init: - # Build up a distinctive bit pattern. - mov #1, r2 - shll8 r2 - add #12, r2 - shll8 r2 - add #85, r2 - shll8 r2 - add #170, r2 - - mov.l r2, @r1 - - # Load it back. - mov.l @r1, r3 - cmp/eq r2, r3 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/movl10.cgs b/sim/testsuite/sim/sh64/compact/movl10.cgs deleted file mode 100644 index 5e9cf2d2fbd..00000000000 --- a/sim/testsuite/sim/sh64/compact/movl10.cgs +++ /dev/null @@ -1,34 +0,0 @@ -# sh testcase for mov.l @($imm8x4, pc), $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - -init: - # Build up a distinctive bit pattern. - mov #1, r2 - shll8 r2 - add #12, r2 - shll8 r2 - add #85, r2 - shll8 r2 - add #170, r2 - - # Store to memory. - mov #16, r1 - shll8 r1 - add #32, r1 - mov.l r2, @r1 -check: - # Read it back. - mov.l @(12, pc), r0 - cmp/eq r2, r0 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/movl11.cgs b/sim/testsuite/sim/sh64/compact/movl11.cgs deleted file mode 100644 index 32c763d8a2e..00000000000 --- a/sim/testsuite/sim/sh64/compact/movl11.cgs +++ /dev/null @@ -1,32 +0,0 @@ -# sh testcase for mov.l @($imm4x4, $rm), $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - mov #30, r0 - shll8 r0 - # Build up a distinctive bit pattern. - mov #1, r2 - shll8 r2 - add #12, r2 - shll8 r2 - add #85, r2 - shll8 r2 - add #170, r2 - # Store something first. - mov.l r2, @(12, r0) - -check: - # Read it back. - mov.l @(12, r0), r1 - cmp/eq r2, r1 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/movl2.cgs b/sim/testsuite/sim/sh64/compact/movl2.cgs deleted file mode 100644 index bb550612cce..00000000000 --- a/sim/testsuite/sim/sh64/compact/movl2.cgs +++ /dev/null @@ -1,43 +0,0 @@ -# sh testcase for mov.l $rm, @-$rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - mov #30, r1 - shll8 r1 - # Save address. - mov r1, r7 - -init: - # Build up a distinctive bit pattern. - mov #1, r2 - shll8 r2 - add #12, r2 - shll8 r2 - add #85, r2 - shll8 r2 - add #170, r2 - mov.l r2, @-r1 - -check: - # Compare the value loaded into another reg. - mov.l @r1, r3 - cmp/eq r2, r3 - bf wrong - -dec: - # Ensure address is decremented. - mov #4, r6 - sub r6, r7 - cmp/eq r1, r7 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/movl3.cgs b/sim/testsuite/sim/sh64/compact/movl3.cgs deleted file mode 100644 index 6205de7558d..00000000000 --- a/sim/testsuite/sim/sh64/compact/movl3.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# sh testcase for mov.l $rm, @(r0, $rn) -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - -setaddr: - mov #0, r0 - mov #30, r1 - shll8 r1 - -init: - # Build up a distinctive bit pattern. - mov #1, r2 - shll8 r2 - add #12, r2 - shll8 r2 - add #85, r2 - shll8 r2 - add #170, r2 - - mov.l r2, @(r0, r1) - -check: - # Load it back. - mov.l @(r0, r1), r3 - cmp/eq r2, r3 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/movl4.cgs b/sim/testsuite/sim/sh64/compact/movl4.cgs deleted file mode 100644 index 44440946365..00000000000 --- a/sim/testsuite/sim/sh64/compact/movl4.cgs +++ /dev/null @@ -1,38 +0,0 @@ -# sh testcase for mov.l r0, @($imm8x4, gbr) -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - -setaddr: - mov #30, r1 - shll8 r1 - ldc r1, gbr - -init: - # Build up a distinctive bit pattern. - mov #1, r0 - shll8 r0 - add #12, r0 - shll8 r0 - add #85, r0 - shll8 r0 - add #170, r0 - # Preserve. - mov r0, r7 - - mov.l r0, @(4, gbr) -check: - # Load it back. - mov.l @(4, gbr), r0 - cmp/eq r0, r7 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/movl5.cgs b/sim/testsuite/sim/sh64/compact/movl5.cgs deleted file mode 100644 index 897ebef2367..00000000000 --- a/sim/testsuite/sim/sh64/compact/movl5.cgs +++ /dev/null @@ -1,37 +0,0 @@ -# sh testcase for mov.l $rm, @($imm4x4, $rn) -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - -setaddr: - mov #30, r1 - shll8 r1 - -init: - # Build up a distinctive bit pattern. - mov #1, r0 - shll8 r0 - add #12, r0 - shll8 r0 - add #85, r0 - shll8 r0 - add #170, r0 - # Preserve. - mov r0, r7 - - mov.l r0, @(4, r1) -check: - # Load it back. - mov.l @(4, r1), r0 - cmp/eq r7, r0 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/movl6.cgs b/sim/testsuite/sim/sh64/compact/movl6.cgs deleted file mode 100644 index 42f63b2a9ac..00000000000 --- a/sim/testsuite/sim/sh64/compact/movl6.cgs +++ /dev/null @@ -1,25 +0,0 @@ -# sh testcase for mov.l @$rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - mov #30, r0 - shll8 r0 - # Store something there first. - mov #170, r1 - mov.l r1, @r0 -check: - # Load it back. - mov.l @r0, r3 - cmp/eq r1, r3 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/movl7.cgs b/sim/testsuite/sim/sh64/compact/movl7.cgs deleted file mode 100644 index b6c12fc5515..00000000000 --- a/sim/testsuite/sim/sh64/compact/movl7.cgs +++ /dev/null @@ -1,37 +0,0 @@ -# sh testcase for mov.l @$rm+, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - mov #30, r0 - shll8 r0 - # Preserve address. - mov r0, r7 - # Store something first. - mov #170, r3 - mov.l r3, @r0 - - mov.l @r0+, r1 -check: - cmp/eq r1, r3 - bf wrong - - # Ensure address is post-incremented. - add #4, r7 - cmp/eq r7, r0 - bf wrong - -equal: - # Test rm = rn. - mov #30, r0 - shll8 r0 - mov.l @r0+, r0 - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/movl8.cgs b/sim/testsuite/sim/sh64/compact/movl8.cgs deleted file mode 100644 index a6cd932d0a2..00000000000 --- a/sim/testsuite/sim/sh64/compact/movl8.cgs +++ /dev/null @@ -1,24 +0,0 @@ -# sh testcase for mov.l @(r0, $rm), $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - mov #0, r0 - mov #30, r1 - shll8 r1 - # Store something there first. - mov #170, r3 - mov.l r3, @(r0, r1) -check: - # Load it back. - mov.l @(r0, r1), r2 - cmp/eq r2, r3 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/movl9.cgs b/sim/testsuite/sim/sh64/compact/movl9.cgs deleted file mode 100644 index 4fa07b069d8..00000000000 --- a/sim/testsuite/sim/sh64/compact/movl9.cgs +++ /dev/null @@ -1,24 +0,0 @@ -# sh testcase for mov.l @($imm8x4, gbr), r0 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - mov #30, r1 - shll8 r1 - ldc r1, gbr - # Store something there first. - mov #170, r0 - mov r0, r7 - mov.l r0, @(12, gbr) -check: - # Load it back. - mov.l @(12, gbr), r0 - cmp/eq r0, r7 - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/movt.cgs b/sim/testsuite/sim/sh64/compact/movt.cgs deleted file mode 100644 index 45539810beb..00000000000 --- a/sim/testsuite/sim/sh64/compact/movt.cgs +++ /dev/null @@ -1,28 +0,0 @@ -# sh testcase for movt $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global movt -init: - sett - movt r1 - assert r1, #1 -clear: - clrt - movt r1 - assert r1, #0 -set: - sett - movt r1 - assert r1, #1 - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/movw1.cgs b/sim/testsuite/sim/sh64/compact/movw1.cgs deleted file mode 100644 index 5d55a581ffd..00000000000 --- a/sim/testsuite/sim/sh64/compact/movw1.cgs +++ /dev/null @@ -1,29 +0,0 @@ -# sh testcase for mov.w $rm, @$rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - mov #30, r1 - shll8 r1 -init: - # Build up a distinctive bit pattern. - mov #1, r2 - shll8 r2 - add #12, r2 - mov.w r2, @r1 -check: - # Read it back. - mov.w @r1, r3 - shll16 r2 - shll16 r3 - cmp/eq r2, r3 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/movw10.cgs b/sim/testsuite/sim/sh64/compact/movw10.cgs deleted file mode 100644 index 5bab9117e9e..00000000000 --- a/sim/testsuite/sim/sh64/compact/movw10.cgs +++ /dev/null @@ -1,32 +0,0 @@ -# sh testcase for mov.w @($imm8x2, pc), $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - # Build up a distinctive bit pattern. - mov #1, r2 - shll8 r2 - add #12, r2 - - # Store to memory. - mov #16, r1 - shll8 r1 - add #32, r1 - mov.w r2, @r1 - -check: - # Read it back. - mov.w @(18, pc), r0 - shll16 r0 - shll16 r2 - cmp/eq r0, r2 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/movw11.cgs b/sim/testsuite/sim/sh64/compact/movw11.cgs deleted file mode 100644 index df739fa783d..00000000000 --- a/sim/testsuite/sim/sh64/compact/movw11.cgs +++ /dev/null @@ -1,35 +0,0 @@ -# sh testcase for mov.w @($imm4x2, $rm), r0 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - mov #30, r1 - shll8 r1 - - # Build up a distinctive bit pattern. - mov #1, r0 - shll8 r0 - add #12, r0 - - # Preserve r0. - mov r0, r3 - - # Store something first. - mov.w r0, @(12, r1) - -check: - # Read it back. - mov.w @(12, r1), r0 - shll16 r0 - shll16 r3 - cmp/eq r0, r3 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/movw2.cgs b/sim/testsuite/sim/sh64/compact/movw2.cgs deleted file mode 100644 index 27c29dc0292..00000000000 --- a/sim/testsuite/sim/sh64/compact/movw2.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# sh testcase for mov.w $rm, @-$rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - mov #30, r1 - shll8 r1 - # Preserve. - mov r1, r7 -init: - # Build up a distinctive bit pattern. - mov #1, r2 - shll8 r2 - add #12, r2 -store: - mov.w r2, @-r1 -check: - # Read it back. - mov.w @r1, r3 - shll16 r2 - shll16 r3 - cmp/eq r2, r3 - bf wrong -dec: - add #2, r1 - cmp/eq r7, r1 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/movw3.cgs b/sim/testsuite/sim/sh64/compact/movw3.cgs deleted file mode 100644 index d7b39c81506..00000000000 --- a/sim/testsuite/sim/sh64/compact/movw3.cgs +++ /dev/null @@ -1,31 +0,0 @@ -# sh testcase for mov.w $rm, @(r0, $rn) -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - mov #0, r0 - mov #30, r1 - shll8 r1 -init: - # Build up a distinctive bit pattern. - mov #1, r2 - shll8 r2 - add #12, r2 - mov.w r2, @(r0, r1) -check: - # Read it back. - mov.w @(r0, r1), r3 - shll16 r2 - shll16 r3 - cmp/eq r2, r3 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/movw4.cgs b/sim/testsuite/sim/sh64/compact/movw4.cgs deleted file mode 100644 index 4853b5019bc..00000000000 --- a/sim/testsuite/sim/sh64/compact/movw4.cgs +++ /dev/null @@ -1,31 +0,0 @@ -# sh testcase for mov.w r0, @($imm8x2, gbr) -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - mov #30, r0 - shll8 r0 - ldc r0, gbr - -init: - # Build up a distinctive bit pattern. - mov #1, r0 - shll8 r0 - add #12, r0 - # Preserve r0. - mov r0, r7 - mov.w r0, @(12, gbr) -check: - mov.w @(12, gbr), r0 - cmp/eq r0, r7 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/movw5.cgs b/sim/testsuite/sim/sh64/compact/movw5.cgs deleted file mode 100644 index 9b4f84f6516..00000000000 --- a/sim/testsuite/sim/sh64/compact/movw5.cgs +++ /dev/null @@ -1,32 +0,0 @@ -# sh testcase for mov.w r0, @($imm4x2, $rn) -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - mov #30, r1 - shll8 r1 - -init: - # Build up a distinctive bit pattern. - mov #1, r0 - shll8 r0 - add #12, r0 - # Preserve. - mov r0, r7 -move: - mov.w r0, @(12, r1) -check: - mov.w @(12, r1), r0 - shll16 r0 - shll16 r7 - cmp/eq r0, r7 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/movw6.cgs b/sim/testsuite/sim/sh64/compact/movw6.cgs deleted file mode 100644 index 758497c13e7..00000000000 --- a/sim/testsuite/sim/sh64/compact/movw6.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# sh testcase for mov.w @$rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - mov #30, r0 - shll8 r0 - - # Store something first. - # Build up a distinctive bit pattern. - mov #1, r2 - shll8 r2 - add #12, r2 - mov.w r2, @r0 - -check: - # Read it back. - mov.w @r0, r1 - cmp/eq r1, r2 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/movw7.cgs b/sim/testsuite/sim/sh64/compact/movw7.cgs deleted file mode 100644 index 45f5c098e4e..00000000000 --- a/sim/testsuite/sim/sh64/compact/movw7.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# sh testcase for mov.w @${rm}+, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - mov #30, r0 - shll8 r0 - # Preserve address. - mov r0, r7 - - # Store something first. - # Build up a distinctive bit pattern. - mov #1, r2 - shll8 r2 - add #12, r2 - mov.w r2, @r0 -check: - # Read it back. - mov.w @r0+, r3 - cmp/eq r2, r3 - bf wrong - -inc: - # Ensure address is post-incremented. - add #2, r7 - cmp/eq r0, r7 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/movw8.cgs b/sim/testsuite/sim/sh64/compact/movw8.cgs deleted file mode 100644 index 0a7ce3f346c..00000000000 --- a/sim/testsuite/sim/sh64/compact/movw8.cgs +++ /dev/null @@ -1,31 +0,0 @@ -# sh testcase for mov.w @(r0, $rm), $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - mov #30, r0 - shll8 r0 - mov #10, r1 - - # Store something first. - # Build up a distinctive bit pattern. - mov #1, r2 - shll8 r2 - add #12, r2 - - mov.w r2, @(r0, r1) -check: - # Read it back. - mov.w @(r0, r1), r3 - shll16 r2 - shll16 r3 - cmp/eq r2, r3 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/movw9.cgs b/sim/testsuite/sim/sh64/compact/movw9.cgs deleted file mode 100644 index 1872f06afb6..00000000000 --- a/sim/testsuite/sim/sh64/compact/movw9.cgs +++ /dev/null @@ -1,33 +0,0 @@ -# sh testcase for mov.w @($imm8x2, gbr), r0 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - mov #30, r0 - shll8 r0 - ldc r0, gbr - - # Store something first. - # Build up a distinctive bit pattern. - mov #1, r0 - shll8 r0 - add #12, r0 - # Preserve r0. - mov r0, r7 - mov.w r0, @(12, gbr) - -check: - # Load it back. - mov.w @(12, gbr), r0 - shll16 r0 - shll16 r7 - cmp/eq r0, r7 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/mull.cgs b/sim/testsuite/sim/sh64/compact/mull.cgs deleted file mode 100644 index 921141aafd6..00000000000 --- a/sim/testsuite/sim/sh64/compact/mull.cgs +++ /dev/null @@ -1,64 +0,0 @@ -# sh testcase for mul.l $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global mull -mull: - mov #3, r0 - mov #5, r1 - mul.l r0, r1 - - # Check the result. - sts macl, r3 - mov #15, r4 - cmp/eq r3, r4 - bf wrong - -lxs: - # Large * small. - mov #255, r0 - mov #0, r1 - mul.l r0, r1 - - # Check the result. - sts macl, r3 - mov #0, r4 - cmp/eq r3, r4 - bf wrong - -sxl: - # Small * large. - mov #0, r0 - mov #255, r1 - mul.l r0, r1 - - # Check the result. - sts macl, r3 - mov #0, r4 - cmp/eq r3, r4 - bf wrong - -lxl: - # Large * large. - mov #1, r0 - neg r0, r0 - mov #2, r1 - mul.l r0, r1 - - # Check the result. - sts macl, r3 - mov #2, r4 - neg r4, r4 - cmp/eq r3, r4 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/mulsw.cgs b/sim/testsuite/sim/sh64/compact/mulsw.cgs deleted file mode 100644 index 05c8a3d384c..00000000000 --- a/sim/testsuite/sim/sh64/compact/mulsw.cgs +++ /dev/null @@ -1,91 +0,0 @@ -# sh testcase for muls.w $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - sts mach, r7 - - .global mulsw -zero: - mov #0, r0 - mov #1, r1 - muls.w r0, r1 - - # Check the result. - sts macl, r3 - mov #0, r4 - cmp/eq r3, r4 - bf wrong - -sxs: - # Small * small. - mov #1, r0 - mov #2, r1 - muls.w r0, r1 - - # Check the result. - sts macl, r3 - mov #2, r4 - cmp/eq r3, r4 - bf wrong - -sxl: - # Small * large. - mov #1, r0 - mov #255, r1 - shll8 r1 - muls.w r0, r1 - - # Check the result. - sts macl, r3 - mov #0, r4 - not r4, r4 - shll8 r4 - cmp/eq r3, r4 - bf wrong - -lxs: - # Large * small. - mov #255, r0 - shll8 r0 - mov #1, r1 - muls.w r0, r1 - - # Check the result. - sts macl, r3 - mov #0, r4 - not r4, r4 - shll8 r4 - cmp/eq r3, r4 - bf wrong - -lxl: - # Large * large. - mov #255, r0 - shll8 r0 - mov #255, r1 - shll8 r1 - muls.w r0, r1 - - # Check the result. - sts macl, r3 - mov #1, r4 - shll16 r4 - cmp/eq r3, r4 - bf wrong - -invariant: - # Ensure MACH is invariant. - sts mach, r8 - cmp/eq r7, r8 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/muluw.cgs b/sim/testsuite/sim/sh64/compact/muluw.cgs deleted file mode 100644 index fa0a3343332..00000000000 --- a/sim/testsuite/sim/sh64/compact/muluw.cgs +++ /dev/null @@ -1,96 +0,0 @@ -# sh testcase for mulu.w $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - sts mach, r7 - - .global mulsw -zero: - mov #0, r0 - mov #1, r1 - mulu.w r0, r1 - - # Check the result. - sts macl, r1 - mov #0, r0 - cmp/eq r0, r1 - bf wrong - -sxs: - # Small * small. - mov #1, r0 - mov #2, r1 - mulu.w r0, r1 - - # Check the result. - sts macl, r1 - mov #2, r0 - cmp/eq r0, r1 - bf wrong - -sxl: - # Small * large. - mov #1, r1 - mov #0, r0 - or #255, r0 - shll8 r0 - mulu.w r1, r0 - - # Check the result. - sts macl, r1 - mov #0, r0 - or #255, r0 - shll8 r0 - cmp/eq r0, r1 - bf wrong - -lxs: - # Large * small. - mov #0, r0 - or #255, r0 - shll8 r0 - mov #1, r1 - mulu.w r0, r1 - - # Check the result. - sts macl, r1 - mov #0, r0 - or #255, r0 - shll8 r0 - cmp/eq r0, r1 - bf wrong - -lxl: - # Large * large. - mov #0, r0 - or #255, r0 - shll8 r0 - mov r0, r1 - mulu.w r0, r1 - - # Check the result. - sts macl, r1 - mov #0, r0 - or #254, r0 - shll8 r0 - or #1, r0 - shll16 r0 - cmp/eq r0, r1 - bf wrong - -invariant: - # Ensure MACH is invariant. - sts mach, r8 - cmp/eq r7, r8 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/neg.cgs b/sim/testsuite/sim/sh64/compact/neg.cgs deleted file mode 100644 index b6f98d74060..00000000000 --- a/sim/testsuite/sim/sh64/compact/neg.cgs +++ /dev/null @@ -1,55 +0,0 @@ -# sh testcase for neg $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - .macro signbit sign - shlr16 r1 - shlr8 r1 - shlr r1 - shlr r1 - shlr r1 - shlr r1 - shlr r1 - shlr r1 - shlr r1 - assert r1, \sign - .endm - start - - .global neg -neg: - mov #0, r0 - neg r0, r1 - signbit #0 - - mov #42, r0 - neg r0, r1 - signbit #1 - - mov #0, r0 - or #25, r0 - neg r0, r1 - signbit #1 - - # neg(0) is 0. - mov #0, r0 - neg r0, r1 - signbit #0 - - # neg(neg(x)) = x. - mov #42, r0 - neg r0, r1 - signbit #1 - mov #42, r0 - neg r0, r2 - neg r2, r1 - signbit #0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/negc.cgs b/sim/testsuite/sim/sh64/compact/negc.cgs deleted file mode 100644 index 1f5547d9bab..00000000000 --- a/sim/testsuite/sim/sh64/compact/negc.cgs +++ /dev/null @@ -1,66 +0,0 @@ -# sh testcase for negc $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - .macro signbit sign - mov r1, r2 - shlr16 r2 - shlr8 r2 - shlr r2 - shlr r2 - shlr r2 - shlr r2 - shlr r2 - shlr r2 - shlr r2 - assert r2, \sign - .endm - start - - .global negc -negc: - clrt - mov #1, r0 - negc r0, r1 - signbit #1 - -negc2: - sett - mov #1, r0 - negc r0, r1 - signbit #1 - -negc3: - clrt - mov #0, r0 - negc r0, r1 - signbit #0 - -negc4: - sett - mov #0, r0 - negc r0, r1 - signbit #1 - -negc5: - clrt - mov #0, r0 - or #255, r0 - negc r0, r1 - signbit #1 - -negc6: - sett - mov #0, r0 - or #255, r0 - negc r0, r1 - signbit #1 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/nop.cgs b/sim/testsuite/sim/sh64/compact/nop.cgs deleted file mode 100644 index 8ce910c5abd..00000000000 --- a/sim/testsuite/sim/sh64/compact/nop.cgs +++ /dev/null @@ -1,13 +0,0 @@ -# sh testcase for nop -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global nop -nop: - nop - pass diff --git a/sim/testsuite/sim/sh64/compact/not.cgs b/sim/testsuite/sim/sh64/compact/not.cgs deleted file mode 100644 index 380808ddb57..00000000000 --- a/sim/testsuite/sim/sh64/compact/not.cgs +++ /dev/null @@ -1,47 +0,0 @@ -# sh testcase for not $rm64, $rn64 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global not -not: - mov #0, r0 - or #192, r0 - not r0, r1 - - mov #0, r0 - or #255, r0 - shll8 r0 - or #255, r0 - shll8 r0 - or #255, r0 - shll8 r0 - or #63, r0 - - cmp/eq r0, r1 - bf wrong - -ones: - mov #0, r1 - not r1, r2 - - mov #0, r0 - or #255, r0 - shll8 r0 - or #255, r0 - shll8 r0 - or #255, r0 - shll8 r0 - or #255, r0 - cmp/eq r0, r2 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/ocbi.cgs b/sim/testsuite/sim/sh64/compact/ocbi.cgs deleted file mode 100644 index 12fb2a116c4..00000000000 --- a/sim/testsuite/sim/sh64/compact/ocbi.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for ocbi @$rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - .global ocbi -ocbi: - ocbi @r0 - ocbi @r1 - ocbi @r15 - pass diff --git a/sim/testsuite/sim/sh64/compact/ocbp.cgs b/sim/testsuite/sim/sh64/compact/ocbp.cgs deleted file mode 100644 index 153aff2eade..00000000000 --- a/sim/testsuite/sim/sh64/compact/ocbp.cgs +++ /dev/null @@ -1,15 +0,0 @@ -# sh testcase for ocbp @$rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global ocbp -ocbp: - ocbp @r0 - ocbp @r1 - ocbp @r15 - pass diff --git a/sim/testsuite/sim/sh64/compact/ocbwb.cgs b/sim/testsuite/sim/sh64/compact/ocbwb.cgs deleted file mode 100644 index 6b0a741cbca..00000000000 --- a/sim/testsuite/sim/sh64/compact/ocbwb.cgs +++ /dev/null @@ -1,15 +0,0 @@ -# sh testcase for ocbwb @$rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global ocbwb -ocbwb: - ocbwb @r0 - ocbwb @r1 - ocbwb @r15 - pass diff --git a/sim/testsuite/sim/sh64/compact/or.cgs b/sim/testsuite/sim/sh64/compact/or.cgs deleted file mode 100644 index a02eee39aaf..00000000000 --- a/sim/testsuite/sim/sh64/compact/or.cgs +++ /dev/null @@ -1,43 +0,0 @@ -# sh testcase for or $rm64, $rn64 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global or -or: - mov #1, r0 - rotr r0 - mov #1, r1 - or r0, r1 - - mov #1, r7 - rotr r7 - add #1, r7 - cmp/eq r7, r1 - bf wrong - - .global or2 -or2: - mov #85, r0 - shll16 r0 - shll8 r0 - mov #85, r1 - shll8 r1 - or r0, r1 - - mov #85, r7 - shll16 r7 - add #85 ,r7 - shll8 r7 - cmp/eq r1, r7 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/orb.cgs b/sim/testsuite/sim/sh64/compact/orb.cgs deleted file mode 100644 index 7e962f6fe69..00000000000 --- a/sim/testsuite/sim/sh64/compact/orb.cgs +++ /dev/null @@ -1,24 +0,0 @@ -# sh testcase for or.b #$imm8, @(r0, gbr) -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global orb -init: - # Init GBR and R0. - mov #30, r0 - ldc r0, gbr - mov #40, r0 - -orb: - or.b #0, @(r0, gbr) - or.b #170, @(r0, gbr) - or.b #0, @(r0, gbr) - or.b #255, @(r0, gbr) - -okay: - pass diff --git a/sim/testsuite/sim/sh64/compact/ori.cgs b/sim/testsuite/sim/sh64/compact/ori.cgs deleted file mode 100644 index 63a5fb58740..00000000000 --- a/sim/testsuite/sim/sh64/compact/ori.cgs +++ /dev/null @@ -1,40 +0,0 @@ -# sh testcase for or #$imm8, r0 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global ori -ori: - mov #1, r0 - rotr r0 - or #1, r0 - - mov #1, r7 - rotr r7 - add #1, r7 - cmp/eq r0, r7 - bf wrong - - .global ori2 -ori2: - mov #85, r0 - shll16 r0 - shll8 r0 - or #85, r0 - - mov #85, r7 - shll16 r7 - shll8 r7 - add #85, r7 - cmp/eq r0, r7 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/pref.cgs b/sim/testsuite/sim/sh64/compact/pref.cgs deleted file mode 100644 index 065e0932e6c..00000000000 --- a/sim/testsuite/sim/sh64/compact/pref.cgs +++ /dev/null @@ -1,15 +0,0 @@ -# sh testcase for pref @$rn -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global pref -pref: - pref @r0 - pref @r1 - pref @r15 - pass diff --git a/sim/testsuite/sim/sh64/compact/rotcl.cgs b/sim/testsuite/sim/sh64/compact/rotcl.cgs deleted file mode 100644 index 5e1a3b91137..00000000000 --- a/sim/testsuite/sim/sh64/compact/rotcl.cgs +++ /dev/null @@ -1,121 +0,0 @@ -# sh testcase for rotcl $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global rotcl - -rotcl: - clrt - mov #1, r1 - rotcl r1 - assert r1, #2 - clrt - rotcl r1 - assert r1, #4 - clrt - rotcl r1 - assert r1, #8 - clrt - rotcl r1 - assert r1, #16 - clrt - rotcl r1 - assert r1, #32 - clrt - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - bf wrong - rotcl r1 - assert r1, #1 - - bra trotcl - nop - -wrong: - fail - -trotcl: - sett - mov #1, r1 - rotcl r1 - assert r1, #3 - clrt - rotcl r1 - assert r1, #6 - clrt - rotcl r1 - assert r1, #12 - clrt - rotcl r1 - assert r1, #24 - clrt - rotcl r1 - assert r1, #48 - clrt - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - rotcl r1 - bf wrong2 - assert r1, #1 - rotcl r1 - rotcl r1 - -okay: - pass -wrong2: - fail diff --git a/sim/testsuite/sim/sh64/compact/rotcr.cgs b/sim/testsuite/sim/sh64/compact/rotcr.cgs deleted file mode 100644 index b53300ec54f..00000000000 --- a/sim/testsuite/sim/sh64/compact/rotcr.cgs +++ /dev/null @@ -1,103 +0,0 @@ -# sh testcase for rotcr $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global rotcr -rotcr: - clrt - mov #1, r1 - rotcr r1 - bf wrong - assert r1, #0 - sett - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - assert r1, #1 - rotcr r1 - bf wrong - -trotcr: - sett - mov #1, r1 - rotcr r1 - bf wrong - sett - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - rotcr r1 - bf wrong - assert r1, #1 - rotcr r1 - bf wrong - rotcr r1 - -okay: - pass -wrong: - fail - - diff --git a/sim/testsuite/sim/sh64/compact/rotl.cgs b/sim/testsuite/sim/sh64/compact/rotl.cgs deleted file mode 100644 index e292de7e437..00000000000 --- a/sim/testsuite/sim/sh64/compact/rotl.cgs +++ /dev/null @@ -1,62 +0,0 @@ -# sh testcase for rotl $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global rotl -rotl: - mov #1, r1 - rotl r1 - assert r1, #2 - rotl r1 - assert r1, #4 - rotl r1 - assert r1, #8 - rotl r1 - assert r1, #16 - rotl r1 - assert r1, #32 - rotl r1 - assert r1, #64 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - rotl r1 - bf wrong - assert r1, #1 - rotl r1 - rotl r1 - rotl r1 - assert r1, #8 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/rotr.cgs b/sim/testsuite/sim/sh64/compact/rotr.cgs deleted file mode 100644 index 7f80f993aea..00000000000 --- a/sim/testsuite/sim/sh64/compact/rotr.cgs +++ /dev/null @@ -1,55 +0,0 @@ -# sh testcase for rotr $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global rotr -rotr: - mov #1, r1 - rotr r1 - bf wrong - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - rotr r1 - assert r1, #1 - rotr r1 - rotr r1 - rotr r1 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/rts.cgs b/sim/testsuite/sim/sh64/compact/rts.cgs deleted file mode 100644 index eeb8dce9332..00000000000 --- a/sim/testsuite/sim/sh64/compact/rts.cgs +++ /dev/null @@ -1,24 +0,0 @@ -# sh testcase for rts -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global rts -rts: - bsr subroutine -slot: - nop -return: - pass - fail - -subroutine: - rts -rts_slot: - nop -bad: - fail diff --git a/sim/testsuite/sim/sh64/compact/sets.cgs b/sim/testsuite/sim/sh64/compact/sets.cgs deleted file mode 100644 index f031701d6ee..00000000000 --- a/sim/testsuite/sim/sh64/compact/sets.cgs +++ /dev/null @@ -1,13 +0,0 @@ -# sh testcase for sets -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global sets -sets: - sets - pass diff --git a/sim/testsuite/sim/sh64/compact/sett.cgs b/sim/testsuite/sim/sh64/compact/sett.cgs deleted file mode 100644 index 9ae8af536e7..00000000000 --- a/sim/testsuite/sim/sh64/compact/sett.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# sh testcase for sett -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global sett -sett: - sett - bf wrong - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/shad.cgs b/sim/testsuite/sim/sh64/compact/shad.cgs deleted file mode 100644 index 340743d8f1f..00000000000 --- a/sim/testsuite/sim/sh64/compact/shad.cgs +++ /dev/null @@ -1,58 +0,0 @@ -# sh testcase for shad $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global null -null: - mov #1, r0 - mov #0, r1 - shad r1, r0 - # no shift is performed. - assert r0, #1 - - .global gt0 -gt0: - mov #4, r0 - mov #3, r1 - shad r1, r0 - # shift left 3 bits. - assert r0, #32 - - .global lt0 -lt0: - mov #32, r0 - mov #3, r1 - neg r1, r1 - shad r1, r0 - # shift right 3 bits. - assert r0, #4 - - .global fillpos -fillpos: - mov #1, r0 - mov #1, r1 - rotr r1 - shad r1, r0 - # check result. - assert r0, #0 - - .global fillneg -fillneg: - mov #1, r0 - neg r0, r0 - mov #1, r1 - rotr r1 - shad r1, r0 - # check result. - not r0, r0 - assert r0, #0 - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/shal.cgs b/sim/testsuite/sim/sh64/compact/shal.cgs deleted file mode 100644 index dfea947e856..00000000000 --- a/sim/testsuite/sim/sh64/compact/shal.cgs +++ /dev/null @@ -1,57 +0,0 @@ -# sh testcase for shal $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global shal -shal: - mov #1, r1 - shal r1 - assert r1, #2 - shal r1 - assert r1, #4 - shal r1 - assert r1, #8 - shal r1 - assert r1, #16 - shal r1 - assert r1, #32 - shal r1 - assert r1, #64 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - shal r1 - assert r1, #0 - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/shar.cgs b/sim/testsuite/sim/sh64/compact/shar.cgs deleted file mode 100644 index e3e92fca080..00000000000 --- a/sim/testsuite/sim/sh64/compact/shar.cgs +++ /dev/null @@ -1,40 +0,0 @@ -# sh testcase for shar $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global shar -shar: - mov #0, r0 - or #192, r0 - shar r0 - bt wrong - shar r0 - bt wrong - shar r0 - bt wrong - shar r0 - bt wrong - shar r0 - bt wrong - shar r0 - bt wrong - shar r0 - bf wrong - shar r0 - bf wrong - shar r0 - bt wrong - shar r0 - bt wrong - assert r0, #0 - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/shld.cgs b/sim/testsuite/sim/sh64/compact/shld.cgs deleted file mode 100644 index 32e4100259d..00000000000 --- a/sim/testsuite/sim/sh64/compact/shld.cgs +++ /dev/null @@ -1,48 +0,0 @@ -# sh testcase for shld $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global null -null: - mov #1, r0 - mov #0, r1 - shld r1, r0 - # no shift is performed. - assert r0, #1 - - .global gt0 -gt0: - mov #4, r0 - mov #3, r1 - shld r1, r0 - # shift left 3 bits. - assert r0, #32 - - .global lt0 -lt0: - mov #32, r0 - mov #3, r1 - neg r1, r1 - shld r1, r0 - # shift right 3 bits. - assert r0, #4 - - .global fill -fill: - mov #1, r0 - rotr r0 - mov #1, r1 - rotr r1 - shld r1, r0 - assert r0, #0 - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/shll.cgs b/sim/testsuite/sim/sh64/compact/shll.cgs deleted file mode 100644 index 882f2c2e1ef..00000000000 --- a/sim/testsuite/sim/sh64/compact/shll.cgs +++ /dev/null @@ -1,57 +0,0 @@ -# sh testcase for shll $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global shll -shll: - mov #1, r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - shll r1 - assert r1, #0 -another: - mov #1, r1 - shll r1 - shll r1 - shll r1 - assert r1, #8 - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/shll16.cgs b/sim/testsuite/sim/sh64/compact/shll16.cgs deleted file mode 100644 index 0637c3de706..00000000000 --- a/sim/testsuite/sim/sh64/compact/shll16.cgs +++ /dev/null @@ -1,44 +0,0 @@ -# sh testcase for shll16 $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global shll16 -shll16: - mov #108, r1 - shll16 r1 - shll16 r1 - assert r1, #0 - -another: - mov #1, r1 - shll16 r1 - mov #1, r7 - shll r7 - shll r7 - shll r7 - shll r7 - shll r7 - shll r7 - shll r7 - shll r7 - shll r7 - shll r7 - shll r7 - shll r7 - shll r7 - shll r7 - shll r7 - shll r7 - cmp/eq r1, r7 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/shll2.cgs b/sim/testsuite/sim/sh64/compact/shll2.cgs deleted file mode 100644 index 6e28c664307..00000000000 --- a/sim/testsuite/sim/sh64/compact/shll2.cgs +++ /dev/null @@ -1,40 +0,0 @@ -# sh testcase for shll2 $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global shll2 -shll2: - mov #1, r1 - shll2 r1 - shll2 r1 - shll2 r1 - shll2 r1 - shll2 r1 - shll2 r1 - shll2 r1 - shll2 r1 - shll2 r1 - shll2 r1 - shll2 r1 - shll2 r1 - shll2 r1 - shll2 r1 - shll2 r1 - shll2 r1 - assert r1, #0 - -another: - mov #1, r1 - shll2 r1 - assert r1, #4 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/shll8.cgs b/sim/testsuite/sim/sh64/compact/shll8.cgs deleted file mode 100644 index fe455ec753d..00000000000 --- a/sim/testsuite/sim/sh64/compact/shll8.cgs +++ /dev/null @@ -1,38 +0,0 @@ -# sh testcase for shll8 $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global shll8 -shll8: - mov #1, r1 - shll8 r1 - shll8 r1 - shll8 r1 - shll8 r1 - assert r1, #0 - -another: - mov #1, r1 - shll8 r1 - mov #1, r7 - shll r7 - shll r7 - shll r7 - shll r7 - shll r7 - shll r7 - shll r7 - shll r7 - cmp/eq r1, r7 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/shlr.cgs b/sim/testsuite/sim/sh64/compact/shlr.cgs deleted file mode 100644 index 9d86461b959..00000000000 --- a/sim/testsuite/sim/sh64/compact/shlr.cgs +++ /dev/null @@ -1,33 +0,0 @@ -# sh testcase for shlr $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global shlr -shlr: - mov #0, r0 - or #192, r0 - shlr r0 - shlr r0 - shlr r0 - shlr r0 - shlr r0 - shlr r0 - # Make sure a bit is shifted into T. - shlr r0 - bf wrong - # Ditto. - shlr r0 - bf wrong - shlr r0 - assert r0, #0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/shlr16.cgs b/sim/testsuite/sim/sh64/compact/shlr16.cgs deleted file mode 100644 index 7bfc62788f3..00000000000 --- a/sim/testsuite/sim/sh64/compact/shlr16.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for shlr16 $rn -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global shrl16 -shrl16: - shlr16 r0 - - pass diff --git a/sim/testsuite/sim/sh64/compact/shlr2.cgs b/sim/testsuite/sim/sh64/compact/shlr2.cgs deleted file mode 100644 index 6f085979443..00000000000 --- a/sim/testsuite/sim/sh64/compact/shlr2.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for shlr2 $rn -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global shrl2 -shrl2: - shlr2 r0 - - pass diff --git a/sim/testsuite/sim/sh64/compact/shlr8.cgs b/sim/testsuite/sim/sh64/compact/shlr8.cgs deleted file mode 100644 index 82040b581b8..00000000000 --- a/sim/testsuite/sim/sh64/compact/shlr8.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for shlr8 $rn -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global shrl8 -shrl8: - shlr8 r0 - - pass diff --git a/sim/testsuite/sim/sh64/compact/stc-gbr.cgs b/sim/testsuite/sim/sh64/compact/stc-gbr.cgs deleted file mode 100644 index 1b84008c9d2..00000000000 --- a/sim/testsuite/sim/sh64/compact/stc-gbr.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# sh testcase for stc gbr, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global stc_gbr -stc_gbr: - stc gbr, r1 - mov #42, r1 - ldc r1, gbr - stc gbr, r2 - cmp/eq r1, r2 - bf wrong -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/stcl-gbr.cgs b/sim/testsuite/sim/sh64/compact/stcl-gbr.cgs deleted file mode 100644 index 3e74cc551de..00000000000 --- a/sim/testsuite/sim/sh64/compact/stcl-gbr.cgs +++ /dev/null @@ -1,27 +0,0 @@ -# sh testcase for stc.l gbr, @-$rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global stcl_gbr -stcl_gbr: - mov #42, r0 - ldc r0, gbr - mov #40, r0 - shll8 r0 - # save address - mov r0, r1 - stc.l gbr, @-r0 - - add #4, r0 - cmp/eq r0, r1 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/sts-fpscr.cgs b/sim/testsuite/sim/sh64/compact/sts-fpscr.cgs deleted file mode 100644 index 42724b44fff..00000000000 --- a/sim/testsuite/sim/sh64/compact/sts-fpscr.cgs +++ /dev/null @@ -1,23 +0,0 @@ -# sh testcase for sts fpscr, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global sts_fpscr -sts_fpscr: - sts fpscr, r0 - mov #42, r0 - lds r0, fpscr - sts fpscr, r1 - cmp/eq r0, r1 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/sts-fpul.cgs b/sim/testsuite/sim/sh64/compact/sts-fpul.cgs deleted file mode 100644 index ddbdaf15fb2..00000000000 --- a/sim/testsuite/sim/sh64/compact/sts-fpul.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for sts fpul, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global sts_fpul -sts_fpul: - # This is properly exercised by the lds-fpul test case. - sts fpul, r1 - pass diff --git a/sim/testsuite/sim/sh64/compact/sts-mach.cgs b/sim/testsuite/sim/sh64/compact/sts-mach.cgs deleted file mode 100644 index 4d34bc17aa8..00000000000 --- a/sim/testsuite/sim/sh64/compact/sts-mach.cgs +++ /dev/null @@ -1,22 +0,0 @@ -# sh testcase for sts mach, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global sts_mach -sts_mach: - mov #42, r0 - lds r0, mach - sts mach, r1 - cmp/eq r0, r1 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/sts-macl.cgs b/sim/testsuite/sim/sh64/compact/sts-macl.cgs deleted file mode 100644 index b805f796e44..00000000000 --- a/sim/testsuite/sim/sh64/compact/sts-macl.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# sh testcase for sts macl, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global sts_macl -sts_macl: - mov #42, r0 - lds r0, macl - sts macl, r1 - cmp/eq r0, r1 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/sts-pr.cgs b/sim/testsuite/sim/sh64/compact/sts-pr.cgs deleted file mode 100644 index 3e4f6ee880a..00000000000 --- a/sim/testsuite/sim/sh64/compact/sts-pr.cgs +++ /dev/null @@ -1,22 +0,0 @@ -# sh testcase for sts pr, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global sts_pr -sts_pr: - mov #42, r0 - lds r0, pr - sts pr, r1 - cmp/eq r0, r1 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/stsl-fpscr.cgs b/sim/testsuite/sim/sh64/compact/stsl-fpscr.cgs deleted file mode 100644 index 032870dc189..00000000000 --- a/sim/testsuite/sim/sh64/compact/stsl-fpscr.cgs +++ /dev/null @@ -1,28 +0,0 @@ -# sh testcase for sts.l fpscr, @-$rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global stsl_fpscr -stsl_fpscr: - mov #40, r0 - shll8 r0 - # Preserve r0. - mov r0, r7 - sts.l fpscr, @-r0 - -check: - # Ensure r0 is decremented. - add #4, r0 - cmp/eq r0, r7 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/stsl-fpul.cgs b/sim/testsuite/sim/sh64/compact/stsl-fpul.cgs deleted file mode 100644 index 89bd9e73849..00000000000 --- a/sim/testsuite/sim/sh64/compact/stsl-fpul.cgs +++ /dev/null @@ -1,27 +0,0 @@ -# sh testcase for sts.l fpul, @-$rn -*- Asm -*_ -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global stsl_fpul -stsl_fpul: - mov #40, r0 - shll8 r0 - # Preserve r0. - mov r0, r7 - sts.l fpul, @-r0 - -dec: - # Check for proper pre-decrementing. - add #4, r0 - cmp/eq r0, r7 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/stsl-mach.cgs b/sim/testsuite/sim/sh64/compact/stsl-mach.cgs deleted file mode 100644 index e15bddece29..00000000000 --- a/sim/testsuite/sim/sh64/compact/stsl-mach.cgs +++ /dev/null @@ -1,42 +0,0 @@ -# sh testcase for sts.l mach, @-$rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global stsl_mach -stsl_mach: - # Build up a distinctive bit pattern. - mov #1, r0 - shll8 r0 - add #12, r0 - shll8 r0 - add #85, r0 - shll8 r0 - add #170, r0 - - lds r0, mach - mov #40, r2 - shll8 r2 - # Preserve r2. - mov r2, r7 - sts.l mach, @-r2 - - # check results. - mov.l @r2, r3 - cmp/eq r0, r3 - bf wrong - - # Ensure decrement occurred. - add #4, r2 - cmp/eq r2, r7 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/stsl-macl.cgs b/sim/testsuite/sim/sh64/compact/stsl-macl.cgs deleted file mode 100644 index 854ef341552..00000000000 --- a/sim/testsuite/sim/sh64/compact/stsl-macl.cgs +++ /dev/null @@ -1,42 +0,0 @@ -# sh testcase for sts.l macl, @-$rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global stsl_macl -stsl_macl: - # Build up a distinctive bit pattern. - mov #1, r0 - shll8 r0 - add #12, r0 - shll8 r0 - add #85, r0 - shll8 r0 - add #170, r0 - - lds r0, macl - mov #40, r2 - shll8 r2 - # Preserve r2. - mov r2, r7 - sts.l macl, @-r2 - - # check results. - mov.l @r2, r3 - cmp/eq r0, r3 - bf wrong - - # Ensure decrement occurred. - add #4, r2 - cmp/eq r2, r7 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/stsl-pr.cgs b/sim/testsuite/sim/sh64/compact/stsl-pr.cgs deleted file mode 100644 index b519c9bb5bd..00000000000 --- a/sim/testsuite/sim/sh64/compact/stsl-pr.cgs +++ /dev/null @@ -1,42 +0,0 @@ -# sh testcase for sts.l pr, @-$rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global stsl_pr -stsl_pr: - # Build up a distinctive bit pattern. - mov #1, r0 - shll8 r0 - add #12, r0 - shll8 r0 - add #85, r0 - shll8 r0 - add #170, r0 - - lds r0, pr - mov #40, r2 - shll8 r2 - # Preserve r2. - mov r2, r7 - sts.l pr, @-r2 - - # check results. - mov.l @r2, r3 - cmp/eq r0, r3 - bf wrong - - # Ensure decrement occurred. - add #4, r2 - cmp/eq r2, r7 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/sub.cgs b/sim/testsuite/sim/sh64/compact/sub.cgs deleted file mode 100644 index 3ba29f872aa..00000000000 --- a/sim/testsuite/sim/sh64/compact/sub.cgs +++ /dev/null @@ -1,68 +0,0 @@ -# sh testcase for sub $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global sub1 -sub1: - # 0 - x. - mov #0, r0 - mov #3, r1 - sub r1, r0 - - mov #2, r7 - not r7, r7 - cmp/eq r7, r0 - bf wrong - - .global sub2 -sub2: - # x - 0. - mov #0, r0 - mov #3, r1 - sub r0, r1 - assert r1, #3 - - .global sub3 -sub3: - # x - y. - mov #4, r0 - mov #3, r1 - sub r0, r1 - - mov #0, r7 - not r7, r7 - cmp/eq r7, r1 - bf wrong - - .global sub4 -sub4: - # y - x. - mov #4, r0 - mov #3, r1 - sub r1, r0 - assert r0, #1 - - .global sub5 -sub5: - # y - y == 0 (where y are in two distinct registers). - mov #4, r0 - mov #4, r1 - sub r1, r0 - assert r0, #0 - - .global sub6 -sub6: - # y - y = 0 (where y is the same register). - mov #4, r1 - sub r1, r1 - assert r1, #0 - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/subc.cgs b/sim/testsuite/sim/sh64/compact/subc.cgs deleted file mode 100644 index cda1e84ae9d..00000000000 --- a/sim/testsuite/sim/sh64/compact/subc.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# sh testcase for subc $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start -zero: - mov #0, r0 - mov #0, r1 - clrt - subc r0, r1 - assert r1, #0 - -zerot: - mov #0, r0 - mov #0, r1 - sett - subc r0, r1 - # Invert all 1's to all 0's for ease of comparison. - not r1, r1 - assert r1, #0 - -null: - mov #0, r0 - mov #10, r1 - clrt - subc r0, r1 - assert r1, #10 - -nullt: - mov #0, r0 - mov #10, r1 - sett - subc r0, r1 - assert r1, #9 - -subc: - mov #10, r0 - mov #0, r1 - clrt - subc r0, r1 - # Again, invert .. - not r1, r1 - assert r1, #9 - -subct: - mov #10, r0 - mov #0, r1 - sett - subc r0, r1 - # Again, invert .. - not r1, r1 - assert r1, #10 - -subc2: - mov #10, r0 - mov #20, r1 - clrt - subc r0, r1 - assert r1, #10 - -subc2t: - mov #20, r0 - mov #10, r1 - sett - subc r0, r1 - # Again, invert .. - not r1, r1 - assert r1, #10 - -subc3: - mov #5, r0 - mov #5, r1 - clrt - subc r0, r1 - assert r1, #0 - -subc3t: - mov #5, r0 - mov #5, r1 - sett - subc r0, r1 - # Again, invert .. - not r1, r1 - assert r1, #0 - -large: - mov #2, r0 - mov #10, r1 - clrt - subc r1, r0 - # Again, invert .. - not r0, r0 - assert r0, #7 - -larget: - mov #2, r0 - mov #10, r1 - sett - subc r0, r1 - assert r1, #7 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/subv.cgs b/sim/testsuite/sim/sh64/compact/subv.cgs deleted file mode 100644 index ceb8c64e7fd..00000000000 --- a/sim/testsuite/sim/sh64/compact/subv.cgs +++ /dev/null @@ -1,55 +0,0 @@ -# sh testcase for subv $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start -zero: - mov #0, r0 - mov #0, r1 - subv r0, r1 - bt wrong - assert r1, #0 - -one: - mov #10, r0 - mov #0, r1 - subv r0, r1 - bt wrong - not r1, r1 - assert r1, #9 - -large: - # Produce MAXINT in R0. - mov #0, r0 - not r0, r0 - shlr r0 - - # Put -3 into R1. - mov #3, r1 - neg r1, r1 - - # Subtract them and underflow. - subv r0, r1 - bf wrong - -another: - # Produce MAXINT in R0. - mov #0, r0 - not r0, r0 - shlr r0 - - # Put -3 into R1. - mov #3, r1 - neg r1, r1 - - # Subtract them and overflow. - subv r1, r0 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/swapb.cgs b/sim/testsuite/sim/sh64/compact/swapb.cgs deleted file mode 100644 index 22f6f16a2e1..00000000000 --- a/sim/testsuite/sim/sh64/compact/swapb.cgs +++ /dev/null @@ -1,44 +0,0 @@ -# sh testcase for swap.b $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - -init: - # Build up a distinctive bit pattern. - mov #1, r0 - shll8 r0 - add #12, r0 - shll8 r0 - add #85, r0 - shll8 r0 - add #70, r0 - -test: - # Swap the lower two bytes into a different register. - swap.b r0, r1 - mov #1, r7 - shll8 r7 - add #12, r7 - shll8 r7 - add #70, r7 - shll8 r7 - add #85, r7 - cmp/eq r1, r7 - bf wrong - -swapback: - # Swap the lower two bytes into the same registers. - # R0 should now equal R1. - swap.b r1, r2 - cmp/eq r0, r2 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/swapw.cgs b/sim/testsuite/sim/sh64/compact/swapw.cgs deleted file mode 100644 index fa1ab697f27..00000000000 --- a/sim/testsuite/sim/sh64/compact/swapw.cgs +++ /dev/null @@ -1,43 +0,0 @@ -# sh testcase for swap.w $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global swapw -swapw: - # Build up a characteristic bit pattern in R0. - mov #85, r0 - shll16 r0 - add #3, r0 - rotr r0 - rotr r0 - or #170, r0 - # Preserve for later. - mov r0, r8 - -test: - swap.w r0, r1 - mov #64, r0 - shll8 r0 - or #170, r0 - shll8 r0 - or #192, r0 - shll8 r0 - or #21, r0 - cmp/eq r1, r0 - bf wrong - -swapback: - swap.w r1, r2 - cmp/eq r2, r8 - bf wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/tasb.cgs b/sim/testsuite/sim/sh64/compact/tasb.cgs deleted file mode 100644 index cb7f61870d2..00000000000 --- a/sim/testsuite/sim/sh64/compact/tasb.cgs +++ /dev/null @@ -1,26 +0,0 @@ -# sh testcase for tas.b @$rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - -tasb1: - mov #40, r0 - shll8 r0 - tas.b @r0 - bf wrong - -tasb2: - mov #40, r0 - shll8 r0 - tas.b @r0 - bt wrong - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/testutils.inc b/sim/testsuite/sim/sh64/compact/testutils.inc deleted file mode 100644 index b1ad830578b..00000000000 --- a/sim/testsuite/sim/sh64/compact/testutils.inc +++ /dev/null @@ -1,49 +0,0 @@ -# Support macros for the assembly test cases. - - .macro start - .text - .global start -start: - .endm - - # Perform a single to double precision floating point conversion. - .macro _s2d fpr dpr - flds \fpr, fpul - _setpr - fcnvsd fpul, \dpr - _clrpr - .endm - - # Set the PR (PRecision) bit in the FPSCR. - .macro _setpr - sts fpscr, r7 - mov #8, r8 - shll16 r8 - or r8, r7 - lds r7, fpscr - .endm - - # Clear the PR bit. - .macro _clrpr - sts fpscr, r7 - mov #8, r8 - shll16 r8 - not r8, r8 - and r8, r7 - lds r7, fpscr - .endm - - # nb: this macro clobbers R7. - .macro assert reg value - mov \value, r7 - cmp/eq \reg, r7 - bf wrong - .endm - - .macro pass - trapa #253 - .endm - - .macro fail - trapa #254 - .endm diff --git a/sim/testsuite/sim/sh64/compact/trapa.cgs b/sim/testsuite/sim/sh64/compact/trapa.cgs deleted file mode 100644 index 24f8a6b13ba..00000000000 --- a/sim/testsuite/sim/sh64/compact/trapa.cgs +++ /dev/null @@ -1,13 +0,0 @@ -# sh testcase for trapa #$imm8 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global trapa -trapa: - # pass is a macro for "trapa #253". - trapa #253 diff --git a/sim/testsuite/sim/sh64/compact/tst.cgs b/sim/testsuite/sim/sh64/compact/tst.cgs deleted file mode 100644 index a72b8a9a743..00000000000 --- a/sim/testsuite/sim/sh64/compact/tst.cgs +++ /dev/null @@ -1,62 +0,0 @@ -# sh testcase for tst $rm, $rn -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global tst1 -tst1: - mov #0, r0 - mov #0, r1 - tst r0, r0 - bf wrong - -test2: - mov #0, r0 - mov #1, r1 - tst r0, r1 - bf wrong - -test3: - mov #0, r0 - mov #1, r1 - tst r1, r0 - bf wrong - -test4: - mov #1, r0 - mov #1, r1 - tst r0, r1 - bt wrong - -test5: - mov #1, r0 - rotr r0 - add #85, r0 - shll16 r0 - add #12, r0 - mov #1, r1 - rotr r1 - add #85, r1 - shll16 r1 - add #12, r1 - tst r0, r1 - bt wrong - -test6: - mov #1, r0 - rotr r0 - add #85, r0 - shll16 r0 - add #12, r0 - mov #1, r1 - tst r0, r1 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/tstb.cgs b/sim/testsuite/sim/sh64/compact/tstb.cgs deleted file mode 100644 index 1b3829b1d30..00000000000 --- a/sim/testsuite/sim/sh64/compact/tstb.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# sh testcase for tst.b #$imm8, @(r0, gbr) -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global orb -init: - # Init GBR and R0. - mov #30, r0 - ldc r0, gbr - mov #40, r0 - -orb: - tst.b #0, @(r0, gbr) - bf wrong - tst.b #170, @(r0, gbr) - bf wrong - tst.b #0, @(r0, gbr) - bf wrong - tst.b #255, @(r0, gbr) - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/compact/tsti.cgs b/sim/testsuite/sim/sh64/compact/tsti.cgs deleted file mode 100644 index e088029b470..00000000000 --- a/sim/testsuite/sim/sh64/compact/tsti.cgs +++ /dev/null @@ -1,32 +0,0 @@ -# sh testcase for tst #$imm8, r0 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global tsti -tsti: - mov #0, r0 - tst #0, r0 - -tsti2: - mov #0, r0 - tst #1, r0 - -tsti3: - mov #1, r0 - tst #0, r0 - -tsti4: - mov #1, r0 - tst #1, r0 - -tsti5: - mov #255, r0 - tst #255, r0 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/compact/xor.cgs b/sim/testsuite/sim/sh64/compact/xor.cgs deleted file mode 100644 index d158aaf3713..00000000000 --- a/sim/testsuite/sim/sh64/compact/xor.cgs +++ /dev/null @@ -1,70 +0,0 @@ -# sh testcase for xor $rm64, $rn64 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global xor -xor: - # 0 (+) 1 = 1. - mov #0, r0 - mov #1, r1 - xor r0, r1 - assert r1, #1 - -xor2: - # 1 (+) 0 = 0. - mov #1, r0 - mov #0, r1 - xor r0, r1 - assert r1, #1 - -xor3: - # 0 (+) 0 = 0. - mov #0, r0 - mov #0, r1 - xor r0, r1 - assert r1, #0 - -xor4: - # 0 (+) 0 = 0. - mov #0, r0 - xor r0, r0 - assert r0, #0 - -xor5: - mov #0, r0 - or #85, r0 - shll16 r0 - or #170, r0 - mov r0, r1 - mov #0, r0 - or #85, r0 - shll16 r0 - or #170, r0 - xor r1, r0 - assert r0, #0 - -xor6: - mov #0, r0 - or #85, r0 - shll16 r0 - or #170, r0 - mov r0, r1 - mov #0, r0 - or #85, r0 - shll16 r0 - or #12, r0 - xor r0, r1 - mov #0, r0 - or #166, r0 - cmp/eq r0, r1 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/xorb.cgs b/sim/testsuite/sim/sh64/compact/xorb.cgs deleted file mode 100644 index b31464b3c13..00000000000 --- a/sim/testsuite/sim/sh64/compact/xorb.cgs +++ /dev/null @@ -1,24 +0,0 @@ -# sh testcase for xor.b #$imm8, @(r0, gbr) -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global orb -init: - # Init GBR and R0. - mov #30, r0 - ldc r0, gbr - mov #40, r0 - -orb: - xor.b #0, @(r0, gbr) - xor.b #170, @(r0, gbr) - xor.b #0, @(r0, gbr) - xor.b #255, @(r0, gbr) - -okay: - pass diff --git a/sim/testsuite/sim/sh64/compact/xori.cgs b/sim/testsuite/sim/sh64/compact/xori.cgs deleted file mode 100644 index 732b9ec5c48..00000000000 --- a/sim/testsuite/sim/sh64/compact/xori.cgs +++ /dev/null @@ -1,50 +0,0 @@ -# sh testcase for xor #$imm8, r0 -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - - .global xori -xori: - # 0 (+) 1 = 1. - mov #0, r0 - xor #1, r0 - assert r0, #1 - -xori2: - # 1 (+) 0 = 1. - mov #1, r0 - xor #0, r0 - assert r0, #1 - -xori3: - # 1 (+) 1 = 0. - mov #1, r0 - xor #1, r0 - assert r0, #0 - -xori4: - # 255 (+) 255 = 0. - mov #0, r0 - or #255, r0 - xor #255, r0 - assert r0, #0 - -xori5: - # 0 (+) 255 = 255. - mov #0, r0 - xor #255, r0 - mov r0, r1 - - mov #0, r0 - or #255, r0 - cmp/eq r0, r1 - bf wrong - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/compact/xtrct.cgs b/sim/testsuite/sim/sh64/compact/xtrct.cgs deleted file mode 100644 index 11dae7cbdec..00000000000 --- a/sim/testsuite/sim/sh64/compact/xtrct.cgs +++ /dev/null @@ -1,46 +0,0 @@ -# sh testcase for xtrct $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start - -init: - mov #170, r0 - shll8 r0 - add #1, r0 - shll8 r0 - add #66, r0 - shll8 r0 - mov r0, r1 - - mov #85, r0 - shll8 r0 - add #2, r0 - shll8 r0 - add #42, r0 - shll8 r0 - add #3, r0 - -copy: - mov r0, r3 - mov r1, r4 - -xtrct: - xtrct r0, r1 - -check: - # Lower r3, upper r4. - shll16 r3 - shlr16 r4 - or r3, r4 - cmp/eq r1, r4 - bf wrong - -okay: - pass -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/interwork.exp b/sim/testsuite/sim/sh64/interwork.exp deleted file mode 100644 index acd19b3c90c..00000000000 --- a/sim/testsuite/sim/sh64/interwork.exp +++ /dev/null @@ -1,20 +0,0 @@ -# SH64 interworking testsuite. -# In particular, test parts of the instruction set that can be used -# for SHmedia/SHcompact instruction set mode switches. - -if [istarget sh64-*-*] { - # load support procs (none yet) - # load_lib cgen.exp - - # all machines - set all_machs "sh5" - - foreach src [lsort [glob -nocomplain $srcdir/$subdir/misc/*.s]] { - # If we're only testing specific files and this isn't one of them, - # skip it. - if ![runtest_file_p $runtests $src] { - continue - } - run_sim_test $src $all_machs - } -} diff --git a/sim/testsuite/sim/sh64/media.exp b/sim/testsuite/sim/sh64/media.exp deleted file mode 100644 index 1a3d9f4c961..00000000000 --- a/sim/testsuite/sim/sh64/media.exp +++ /dev/null @@ -1,19 +0,0 @@ -# SHmedia testsuite. - -if [istarget sh64-*-*] { - # load support procs (none yet) - # load_lib cgen.exp - - # all machines - set all_machs "sh5" - - # The .cgs suffix is for "cgen .s". - foreach src [lsort [glob -nocomplain $srcdir/$subdir/media/*.cgs]] { - # If we're only testing specific files and this isn't one of them, - # skip it. - if ![runtest_file_p $runtests $src] { - continue - } - run_sim_test $src $all_machs - } -} diff --git a/sim/testsuite/sim/sh64/media/ChangeLog b/sim/testsuite/sim/sh64/media/ChangeLog deleted file mode 100644 index e435dbe5278..00000000000 --- a/sim/testsuite/sim/sh64/media/ChangeLog +++ /dev/null @@ -1,102 +0,0 @@ -2001-01-09 Ben Elliston - - * nsb.cgs: Test consecutive bits of zeros as well as ones. - * ptb.cgs: Clean up. - -2001-01-08 Ben Elliston - - * fcmpund.cgs, fcmpuns.cgs: Complete test cases. - * fcnvds.cgs, fcnvsd.cgs, fgetscr.cgs, fiprs.cgs: Ditto. - * floatld.cgs, floatls.cgs, floatqd.cgs, floatqs.cgs: Ditto. - * fmuld.cgs, fmuls.cgs, fputscr.cgs, fstxp.cgs: Ditto. - * fsubd.cgs, fsubs.cgs, ftrcdl.cgs, ftrcdq.cgs: Ditto. - * ftrcsl.cgs, ftrcsq.cgs, ftrvs.cgs: Ditto. - * ldhil.cgs, ldhiq.cgs, ldlol.cgs, ldloq.cgs: Ditto. - * mabsl.cgs, mabsw.cgs, maddl.cgs, maddsl.cgs: Ditto. - * maddsub.cgs, maddsw.cgs, maddw.cgs: Ditto. - * mcmpeqb.cgs, mcmpeql.cgs, mcmpeqw.cgs: Ditto. - * mcmpgtl.cgs, mcmpgtub.cgs, mcmpgtw.cgs: Ditto. - * mcmv.cgs, mcnvslw.cgs, mcnvswb.cgs, mcnvswub.cgs: Ditto. - * mmacfxwl.cgs, mmacnfx-wl.cgs: Ditto. - * mmulfxl.cgs, mmulfxrpw.cgs, mmulfxw.cgs: Ditto. - * mmulhiwl.cgs, mmull.cgs, mmullowl.cgs: Ditto. - * mmulsumwq.cgs, mmulw.cgs, movi.cgs: Ditto. - * mpermw.cgs, msadubq.cgs: Ditto. - * mshaldsl.cgs, mshaldsw.cgs: Ditto. - * mshardl.cgs, mshardsq.cgs, mshardw.cgs: Ditto. - * mshfhib.cgs, mshfhil.cgs, mshfhiw.cgs: Ditto. - * mshflob.cgs, mshflol.cgs, mshflow.cgs: Ditto. - * mshlldl.cgs, mshlldw.cgs, mshlrdl.cgs: Ditto. - * mshlrdw.cgs, msubl.cgs, msubsl.cgs: Ditto. - * msubsub.cgs, msubsw.cgs, msubw.cgs: Ditto. - * mulsl.cgs, mulul.cgs: Ditto. - * ptabs.cgs, ptb.cgs, ptrel.cgs: Ditto. - * shard.cgs, shardl.cgs, shari.cgs, sharil.cgs: Ditto. - * shlld.cgs, shlldl.cgs, shlli.cgs, shllil.cgs: Ditto. - * shlrd.cgs, shlrdl.cgs, shlri.cgs, shlril.cgs: Ditto. - * sthil.cgs, sthiq.cgs, swapq.cgs, trapa.cgs: Ditto. - - * testutils.inc (pass): Pass correct "syscall" number. - (fail): Ditto. - -2000-12-13 Ben Elliston - - * sub.cgs, subl.cgs: Complete test cases. - * ptrel.cgs: Likewise. - - * shori.cgs: Test for zero extension of immediate operand. - * fcmpged.cgs, fcmpges.cgs, fldd.cgs: Complete test cases. - * fldp.cgs, flds.cgs, fldxd.cgs, fldxp.cgs: Likewise. - * fldxs.cgs, fmacs.cgs, fnegd.cgs, fnegs.cgs: Likewise. - * fsqrtd.cgs, fsqrts.cgs, fstd.cgs, fstp.cgs: Likewise. - * fsts.cgs, fstxd.cgs, fstxs.cgs: Likewise. - -2000-12-12 Ben Elliston - - * testutils.inc (pass): Use simple syscall mechanism. - (fail): Likewise. - (_packb, _packw, _packl): New macros for packing slices. - - * stb.cgs, stq.cgs, stxb.cgs, stxq.cgs: Complete test cases. - * stl.cgs, stw.cgs, stxl.cgs, stxw.cgs: Likewise. - * ldl.cgs, ldq.cgs, ldub.cgs, lduw.cgs, ldw.cgs: Likewise. - * ldxb.cgs, ldxl.cgs, ldxq.cgs, ldxub.cgs: Likewise. - * ldxuw.cgs, ldxw.cgs, nsb.cgs, trapa.cgs: Likewise. - - * fcmpeqd.cgs, fcmpeqs.cgs, fcmpgtd.cgs: Complete test cases. - * fcmpgts.cgs, fdivd.cgs, fdivs.cgs, fmovd.cgs: Likewise. - * fmovdq.cgs, fmovqd.cgs, fmovls.cgs, fmovs.cgs: Likewise. - * fmovsl.cgs: Likewise. - -2000-12-11 Ben Elliston - - * fabss.cgs, fabsd.cgs, fadds.cgs, faddd.cgs: Complete test cases. - * getcfg.cgs, getcon.cgs, gettr.cgs, icbi.cgs: Likewise. - * prefi.cgs, pta.cgs, ptabs.cgs, ptb.cgs: Likewise. - * putcon.cgs, putcfg.cgs, rte.cgs: Likewise. - - * add.cgs, addi.cgs, addl.cgs, addil.cgs: Complete test cases. - * addl.cgs, addzl.cgs, alloco.cgs, and.cgs, andc.cgs: Likewise. - * andi.cgs, beq.cgs, beqi.cgs, bge.cgs, bgeu.cgs: Likewise. - * bgt.cgs, bgtu.cgs, blink.cgs, bne.cgs, bnei.cgs: Likewise. - * brk.cgs, byterev.cgs, cmpeq.cgs, cmpgt.cgs: Likewise. - * cmpgtu.cgs, cmveq.cgs, cmvne.cgs: Likewise. - -2000-12-07 Ben Elliston - - * mextr1.cgs, mextr2.cgs, mextr3.cgs: Complete test cases. - * mextr4.cgs, mextr5.cgs, mextr6.cgs, mextr7.cgs: Likewise. - -2000-12-05 Ben Elliston - - * nop.cgs, ocbi.cgs, ocbp.cgs, ocbwb.cgs: Complete test cases. - * or.cgs, ori.cgs, xor.cgs, xori.cgs: Ditto. - * sleep.cgs, synci.cgs, synco.cgs: Ditto. - -2000-11-22 Ben Elliston - - * *.cgs: Include "media/testutils.inc", not "testutils.inc" as - generated test cases do. Miscellaneous fixes. - - * testutils.inc: New file. - * *.cgs: Generate test cases. diff --git a/sim/testsuite/sim/sh64/media/add.cgs b/sim/testsuite/sim/sh64/media/add.cgs deleted file mode 100644 index 9778e8fd62c..00000000000 --- a/sim/testsuite/sim/sh64/media/add.cgs +++ /dev/null @@ -1,47 +0,0 @@ -# sh testcase for add $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global add -init: - pta wrong, tr0 -add: - movi 10, r0 - movi 0, r1 - add r0, r1, r3 - movi 10, r4 - bne r3, r4, tr0 - -add0: - movi 1, r63 - add r63, r63, r1 - bnei r1, 0, tr0 - -add2: - movi 0, r0 - movi 10, r1 - add r0, r1, r3 - movi 10, r4 - bne r3, r4, tr0 - -add3: - movi 10, r1 - add r63, r1, r3 - movi 10, r4 - bne r3, r4, tr0 - -add4: - movi 10, r1 - add r1, r63, r3 - movi 10, r4 - bne r3, r4, tr0 - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/addi.cgs b/sim/testsuite/sim/sh64/media/addi.cgs deleted file mode 100644 index 3d4b49f5995..00000000000 --- a/sim/testsuite/sim/sh64/media/addi.cgs +++ /dev/null @@ -1,37 +0,0 @@ -# sh testcase for addi $rm, $disp10, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -addi1: - movi 1, r0 - addi r0, 10, r0 - bnei r0, 11, tr0 - -addi2: - movi 10, r0 - addi r0, 1, r0 - bnei r0, 11, tr0 - -addi3: - movi 10, r0 - addi r0, -1, r0 - bnei r0, 9, tr0 - -addi4: - movi 20, r0 - addi r0, -2, r0 - bnei r0, 18, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/addil.cgs b/sim/testsuite/sim/sh64/media/addil.cgs deleted file mode 100644 index 5c92e2733a6..00000000000 --- a/sim/testsuite/sim/sh64/media/addil.cgs +++ /dev/null @@ -1,49 +0,0 @@ -# sh testcase for addi.l $rm, $disp10, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -addil0: - movi 1, r63 - addi.l r63, 0, r1 - bnei r1, 0, tr0 - -addil1: - movi 10, r0 - addi.l r0, 0, r3 - bnei r3, 10, tr0 - -addil2: - movi 0, r0 - addi.l r0, 10, r2 - bnei r2, 10, tr0 - -addil3: - addi.l r63, 10, r1 - bnei r1, 10, tr0 - -addil4: - movi 10, r0 - addi.l r0, 0, r1 - bnei r1, 10, tr0 - -addil5: - # Ensure top 32-bits are discarded when adding. - movi 10, r0 - shlli r0, 32, r0 - addi r0, 10, r0 - addi.l r0, 10, r2 - bnei r2, 20, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/addl.cgs b/sim/testsuite/sim/sh64/media/addl.cgs deleted file mode 100644 index 7f94b616206..00000000000 --- a/sim/testsuite/sim/sh64/media/addl.cgs +++ /dev/null @@ -1,61 +0,0 @@ -# sh testcase for add.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global addl -init: - pta wrong, tr0 - -addl0: - movi 1, r63 - add.l r63, r63, r1 - bnei r1, 0, tr0 - -addl1: - movi 10, r0 - movi 0, r1 - add.l r0, r1, r3 - movi 10, r4 - bne r3, r4, tr0 - -addl2: - movi 0, r0 - movi 10, r1 - add.l r0, r1, r2 - movi 10, r3 - bne r2, r3, tr0 - -addl3: - movi 10, r0 - add.l r63, r0, r1 - movi 10, r2 - bne r1, r2, tr0 - -addl4: - movi 10, r0 - add.l r0, r63, r1 - movi 10, r2 - bne r1, r2, tr0 - -addl5: - # Ensure top 32-bits are discarded when adding. - movi 10, r0 - shlli r0, 32, r0 - addi r0, 10, r0 - movi 10, r1 - shlli r1, 32, r1 - addi r1, 10, r1 - add.l r0, r1, r2 - movi 20, r3 - bne r2, r3, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/addzl.cgs b/sim/testsuite/sim/sh64/media/addzl.cgs deleted file mode 100644 index b7917d377a6..00000000000 --- a/sim/testsuite/sim/sh64/media/addzl.cgs +++ /dev/null @@ -1,39 +0,0 @@ -# sh testcase for addz.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -addzl1: - movi 1, r0 - movi 2, r1 - addz.l r0, r1, r2 - bnei r2, 3, tr0 - -addzl2: - movi 1, r0 - shlli r0, 32, r0 - addi r0, 2, r0 - movi 1, r1 - shlli r1, 32, r1 - addi r1, 2, r1 - addz.l r0, r1, r2 - bnei r2, 4, tr0 - -addzl3: - movi 1, r0 - shlli r0, 31, r0 - addi r0, 2, r0 - movi 2, r1 - addz.l r0, r1, r2 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/alloco.cgs b/sim/testsuite/sim/sh64/media/alloco.cgs deleted file mode 100644 index 5f27359c3b6..00000000000 --- a/sim/testsuite/sim/sh64/media/alloco.cgs +++ /dev/null @@ -1,10 +0,0 @@ -# sh testcase for alloco $rm, $disp6x32 -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - alloco r0, 32 - pass diff --git a/sim/testsuite/sim/sh64/media/and.cgs b/sim/testsuite/sim/sh64/media/and.cgs deleted file mode 100644 index c2d42339bcf..00000000000 --- a/sim/testsuite/sim/sh64/media/and.cgs +++ /dev/null @@ -1,68 +0,0 @@ -# sh testcase for and $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -and0: - # 0 and 0 is 0. - movi 0, r0 - movi 0, r1 - and r0, r1, r2 - bnei r2, 0, tr0 - -and1: - # 0 and 1 is 0. - movi 0, r0 - movi 1, r1 - and r0, r1, r2 - bnei r2, 0, tr0 - -and2: - # 1 and 0 is 0. - movi 1, r0 - movi 0, r1 - and r0, r1, r2 - bnei r2, 0, tr0 - -and3: - # 1 and 1 is 1. - movi 1, r0 - movi 1, r1 - and r0, r1, r2 - bnei r2, 1, tr0 - -and4: - movi 1, r0 - shlli r0, 63, r0 - movi 1, r1 - shlli r1, 63, r1 - and r0, r1, r2 - # Check it. - movi 1, r3 - shlli r3, 63, r3 - bne r2, r3, tr0 - -and5: - movi 1, r0 - shlli r0, 63, r0 - movi 1, r1 - shlli r1, 63, r1 - ori r1, 1, r1 - and r0, r1, r2 - # Check it. - movi 1, r3 - shlli r1, 63, r1 - bne r1, r2, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/andc.cgs b/sim/testsuite/sim/sh64/media/andc.cgs deleted file mode 100644 index 60b50ace465..00000000000 --- a/sim/testsuite/sim/sh64/media/andc.cgs +++ /dev/null @@ -1,50 +0,0 @@ -# sh testcase for andc $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -andc1: - # X . !X = 0. - movi 3, r0 - movi 3, r1 - andc r0, r1, r2 - bnei r2, 0, tr0 - -andc2: - # X . 0 = X. - movi 3, r0 - movi 0, r1 - andc r0, r1, r2 - bnei r2, 3, tr0 - -andc3: - # wide X . 0 = wide X. - movi 0x1020, r0 - shlli r0, 8, r0 - ori r0, 0x30, r0 - shlli r0, 8, r0 - ori r0, 0x40, r0 - shlli r0, 8, r0 - ori r0, 0x50, r0 - shlli r0, 8, r0 - ori r0, 0x60, r0 - shlli r0, 8, r0 - ori r0, 0x70, r0 - shlli r0, 8, r0 - ori r0, 0x80, r0 - movi 0, r1 - andc r0, r1, r2 - bne r0, r2, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/andi.cgs b/sim/testsuite/sim/sh64/media/andi.cgs deleted file mode 100644 index decfc2fc2ec..00000000000 --- a/sim/testsuite/sim/sh64/media/andi.cgs +++ /dev/null @@ -1,46 +0,0 @@ -# sh testcase for andi $rm, $disp10, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -andi0: - # 0 and 0 is 0. - movi 0, r0 - andi r0, 0, r2 - bnei r2, 0, tr0 - -and1: - # 0 and 1 is 0. - movi 0, r0 - andi r0, 1, r2 - bnei r2, 0, tr0 - -and2: - # 1 and 0 is 0. - movi 1, r0 - andi r0, 0, r2 - bnei r2, 0, tr0 - -and3: - # 1 and 1 is 1. - movi 1, r0 - andi r0, 1, r2 - bnei r2, 1, tr0 - -and4: - movi 15, r0 - andi r0, 3, r2 - bnei r2, 3, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/beq.cgs b/sim/testsuite/sim/sh64/media/beq.cgs deleted file mode 100644 index 6f96ffdf00f..00000000000 --- a/sim/testsuite/sim/sh64/media/beq.cgs +++ /dev/null @@ -1,52 +0,0 @@ -# sh testcase for beq$likely $rm, $rn, $tra -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global beq -init: - # Load up the branch target registers. - pta beq2, tr0 - pta beq3, tr1 - pta wrong, tr2 - -beq1: - # Compare r0 with itself. - # Always true, so branch likely. - movi 1, r0 - beq/l r0, r0, tr0 - # We should branch over this. - fail - -beq2: - # Ensure high order bits are compared, too. - movi 1, r0 - shlli r0, 35, r0 - addi r0, 10, r0 - movi 1, r1 - shlli r1, 35, r1 - addi r1, 10, r1 - beq r0, r1, tr1 - # We should branch over this, too. - fail - -beq3: - movi 1, r0 - shlli r0, 35, r0 - addi r0, 10, r0 - movi 2, r1 - shlli r1, 35, r1 - addi r1, 9, r1 - # Unlikely we'll branch! - beq/u r0, r1, tr2 - # We should proceed to pass here. - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/beqi.cgs b/sim/testsuite/sim/sh64/media/beqi.cgs deleted file mode 100644 index c2b4ea8acf5..00000000000 --- a/sim/testsuite/sim/sh64/media/beqi.cgs +++ /dev/null @@ -1,40 +0,0 @@ -# sh testcase for beqi$likely $rm, $imm6, $tra -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global beqi -init: - # Load up the branch target registers. - pta beqi2, tr0 - pta beqi3, tr1 - pta wrong, tr2 - -beqi1: - # Always true, so branch likely. - movi 1, r0 - beqi/l r0, 1, tr0 - # We should branch over this. - fail - -beqi2: - movi 22, r3 - beqi r3, 22, tr1 - # We should branch over this. - fail - -beqi3: - movi 27, r7 - # We shouldn't branch here. - beqi/u r7, 23, tr2 - # We should proceed to pass here. - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/bge.cgs b/sim/testsuite/sim/sh64/media/bge.cgs deleted file mode 100644 index 832ff06ac21..00000000000 --- a/sim/testsuite/sim/sh64/media/bge.cgs +++ /dev/null @@ -1,40 +0,0 @@ -# sh testcase for bge$likely $rm, $rn, $tra -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global bge -init: - pta bge2, tr0 - pta bge3, tr1 - pta wrong, tr2 - movi 0, r0 - -bge1: - # Compare r0 with itself. - bge/l r0, r0, tr0 - # We should branch here. - fail - -bge2: - movi 1, r1 - movi 1, r2 - bge r1, r2, tr1 - # We should branch here. - fail - -bge3: - movi -1, r1 - movi 1, r2 - bge r1, r2, tr2 - # We should not branch here. - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/bgeu.cgs b/sim/testsuite/sim/sh64/media/bgeu.cgs deleted file mode 100644 index da469d0e4ae..00000000000 --- a/sim/testsuite/sim/sh64/media/bgeu.cgs +++ /dev/null @@ -1,47 +0,0 @@ -# sh testcase for bgeu$likely $rm, $rn, $tra -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global bgeu -init: - movi 0, r0 - -bgeu1: - # Compare r0 with itself. - pta bgeu2, tr0 - bgeu/l r0, r0, tr0 - # We should branch here. - fail - -bgeu2: - movi 1, r1 - movi 1, r2 - pta bge3, tr0 - bgeu r1, r2, tr0 - # We should branch here. - fail - -bge3: - movi -1, r1 - movi 1, r2 - # We SHOULD branch here. - pta bge4, tr0 - bgeu r1, r2, tr0 - fail - -bge4: - movi 1, r1 - movi -1, r2 - # We should not branch here. - pta wrong, tr0 - bgeu r1, r2, tr0 -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/bgt.cgs b/sim/testsuite/sim/sh64/media/bgt.cgs deleted file mode 100644 index 8866635b818..00000000000 --- a/sim/testsuite/sim/sh64/media/bgt.cgs +++ /dev/null @@ -1,32 +0,0 @@ -# sh testcase for bgt$likely $rm, $rn, $tra -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - -init: - pta wrong, tr0 - -bgt1: - movi 1, r0 - movi -1, r1 - bgt r1, r0, tr0 - -bgt2: - bgt r0, r0, tr0 - -bgt3: - pta okay, tr1 - movi -1, r0 - movi 1, r1 - bgt r0, r1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/bgtu.cgs b/sim/testsuite/sim/sh64/media/bgtu.cgs deleted file mode 100644 index 3cc02696e75..00000000000 --- a/sim/testsuite/sim/sh64/media/bgtu.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# sh testcase for bgtu$likely $rm, $rn, $tra -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - -init: - pta wrong, tr0 - -bgtu1: - movi 1, r0 - movi -1, r1 - pta bgt2, tr1 - bgtu r1, r0, tr1 - fail - -bgt2: - bgtu r0, r0, tr0 - -bgt3: - pta okay, tr1 - movi -1, r0 - movi 1, r1 - pta okay, tr1 - bgtu r0, r1, tr1 - fail - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/blink.cgs b/sim/testsuite/sim/sh64/media/blink.cgs deleted file mode 100644 index 000d1f597f2..00000000000 --- a/sim/testsuite/sim/sh64/media/blink.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# sh testcase for blink $trb, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -blink: - pta target, tr0 - gettr tr0, r1 - ptabs r1, tr0 - blink tr0, r0 - fail - -target: - pass diff --git a/sim/testsuite/sim/sh64/media/bne.cgs b/sim/testsuite/sim/sh64/media/bne.cgs deleted file mode 100644 index f574147e3de..00000000000 --- a/sim/testsuite/sim/sh64/media/bne.cgs +++ /dev/null @@ -1,23 +0,0 @@ -# sh testcase for bne$likely $rm, $rn, $tra -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - movi 1, r0 - pta wrong, tr0 - pta okay, tr1 - -bne1: - bne r63, r63, tr0 -bne2: - bne r0, r63, tr1 -bad: - fail -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/bnei.cgs b/sim/testsuite/sim/sh64/media/bnei.cgs deleted file mode 100644 index 5ce33991c0d..00000000000 --- a/sim/testsuite/sim/sh64/media/bnei.cgs +++ /dev/null @@ -1,23 +0,0 @@ -# sh testcase for bnei$likely $rm, $imm6, $tra -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - movi 1, r0 - pta wrong, tr0 - pta okay, tr1 - -bnei1: - bnei r63, 0, tr0 -bnei2: - bnei r0, 3, tr1 -bad: - fail -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/brk.cgs b/sim/testsuite/sim/sh64/media/brk.cgs deleted file mode 100644 index 073641443ec..00000000000 --- a/sim/testsuite/sim/sh64/media/brk.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# sh testcase for brk -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - # brk will cause the sim to trap, so avoid it. - pass - brk diff --git a/sim/testsuite/sim/sh64/media/byterev.cgs b/sim/testsuite/sim/sh64/media/byterev.cgs deleted file mode 100644 index d97c3adb7b0..00000000000 --- a/sim/testsuite/sim/sh64/media/byterev.cgs +++ /dev/null @@ -1,67 +0,0 @@ -# sh testcase for byterev $rm, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - pta wrong, tr0 -init: - # Put a distinctive pattern in r0. - movi 10, r0 - shlli r0, 8, r0 - ori r0, 20, r0 - shlli r0, 8, r0 - ori r0, 30, r0 - shlli r0, 8, r0 - ori r0, 40, r0 - shlli r0, 8, r0 - ori r0, 50, r0 - shlli r0, 8, r0 - ori r0, 60, r0 - shlli r0, 8, r0 - ori r0, 70, r0 - shlli r0, 8, r0 - ori r0, 80, r0 - -byterev: - byterev r0, r1 - -check: - andi r1, 255, r2 - movi 10, r3 - bne r2, r3, tr0 - shlri r1, 8, r1 - andi r1, 255, r2 - movi 20, r3 - bne r2, r3, tr0 - shlri r1, 8, r1 - andi r1, 255, r2 - movi 30, r3 - bne r2, r3, tr0 - shlri r1, 8, r1 - andi r1, 255, r2 - movi 40, r3 - bne r2, r3, tr0 - shlri r1, 8, r1 - andi r1, 255, r2 - movi 50, r3 - bne r2, r3, tr0 - shlri r1, 8, r1 - andi r1, 255, r2 - movi 60, r3 - bne r2, r3, tr0 - shlri r1, 8, r1 - andi r1, 255, r2 - movi 70, r3 - bne r2, r3, tr0 - shlri r1, 8, r1 - andi r1, 255, r2 - movi 80, r3 - bne r2, r3, tr0 - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/cmpeq.cgs b/sim/testsuite/sim/sh64/media/cmpeq.cgs deleted file mode 100644 index 78f51f4a65d..00000000000 --- a/sim/testsuite/sim/sh64/media/cmpeq.cgs +++ /dev/null @@ -1,42 +0,0 @@ -# sh testcase for cmpeq $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - movi 0, r0 - movi 1, r1 - movi 2, r2 - movi 2, r3 - movi 3, r4 - -cmpeq1: - cmpeq r2, r2, r7 - bne r7, r1, tr0 - -cmpeq2: - cmpeq r2, r3, r7 - bne r7, r1, tr0 - -cmpeq3: - cmpeq r2, r4, r7 - bne r7, r0, tr0 - -cmpeq4: - movi 1, r2 - shlli r2, 63, r2 - movi 1, r3 - shlli r3, 63, r3 - cmpeq r2, r3, r7 - bne r7, r1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/cmpgt.cgs b/sim/testsuite/sim/sh64/media/cmpgt.cgs deleted file mode 100644 index e4a971bd5ee..00000000000 --- a/sim/testsuite/sim/sh64/media/cmpgt.cgs +++ /dev/null @@ -1,43 +0,0 @@ -# sh testcase for cmpgt $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - movi 0, r0 - movi 1, r1 - movi 2, r2 - movi 2, r3 - movi 3, r4 - -cmpgt1: - cmpgt r2, r2, r7 - bne r7, r0, tr0 - -cmpgt2: - cmpgt r2, r3, r7 - bne r7, r0, tr0 - -cmpgt3: - cmpgt r4, r2, r7 - bne r7, r1, tr0 - -cmpgt4: - movi 1, r2 - shlli r2, 63, r2 - movi 1, r3 - shlli r3, 63, r3 - addi r3, 1, r3 - cmpgt r3, r2, r7 - bne r7, r1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/cmpgtu.cgs b/sim/testsuite/sim/sh64/media/cmpgtu.cgs deleted file mode 100644 index b896dfcb9fd..00000000000 --- a/sim/testsuite/sim/sh64/media/cmpgtu.cgs +++ /dev/null @@ -1,43 +0,0 @@ -# sh testcase for cmpgtu $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - movi 0, r0 - movi 1, r1 - movi 2, r2 - movi 2, r3 - movi 3, r4 - -cmpgt1: - cmpgtu r2, r2, r7 - bne r7, r0, tr0 - -cmpgt2: - cmpgtu r2, r3, r7 - bne r7, r0, tr0 - -cmpgt3: - cmpgtu r4, r2, r7 - bne r7, r1, tr0 - -cmpgt4: - movi 1, r2 - shlli r2, 63, r2 - movi 1, r3 - shlli r3, 63, r3 - addi r3, 1, r3 - cmpgtu r3, r2, r7 - bne r7, r1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/cmveq.cgs b/sim/testsuite/sim/sh64/media/cmveq.cgs deleted file mode 100644 index 0f49733de36..00000000000 --- a/sim/testsuite/sim/sh64/media/cmveq.cgs +++ /dev/null @@ -1,32 +0,0 @@ -# sh testcase for cmveq $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - - movi 0, r0 - movi 1, r1 - movi 2, r2 - movi 21, r3 - -cmveq: - # Zap r7. - movi 0, r7 - - cmveq r0, r2, r7 - bne r2, r7, tr0 - - cmveq r1, r3, r7 - # Make sure r7 is still equal to r2. - bne r2, r7, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/cmvne.cgs b/sim/testsuite/sim/sh64/media/cmvne.cgs deleted file mode 100644 index 909179afc76..00000000000 --- a/sim/testsuite/sim/sh64/media/cmvne.cgs +++ /dev/null @@ -1,32 +0,0 @@ -# sh testcase for cmvne $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - - movi 0, r0 - movi 1, r1 - movi 2, r2 - movi 21, r3 - -cmvne: - # Zap r7. - movi 0, r7 - - cmvne r1, r2, r7 - bne r2, r7, tr0 - - cmvne r0, r3, r7 - # Make sure r7 is still equal to r2. - bne r2, r7, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fabsd.cgs b/sim/testsuite/sim/sh64/media/fabsd.cgs deleted file mode 100644 index 47060fcc44b..00000000000 --- a/sim/testsuite/sim/sh64/media/fabsd.cgs +++ /dev/null @@ -1,39 +0,0 @@ -# sh testcase for fabs.d $drgh, $drf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - movi 0, r0 - movi 1, r1 - -fabs0: - # Ensure fabs(-1) = 1. - fmov.ls r0, fr7 - float.ld fr7, dr0 - fmov.ls r1, fr7 - float.ld fr7, dr2 - fsub.d dr0, dr2, dr4 - fabs.d dr4, dr6 - fcmpeq.d dr6, dr2, r7 - bnei r7, 1, tr0 - -fabs1: - # Ensure fabs(1) = 1. - fmov.ls r0, fr7 - float.ld fr7, dr0 - fmov.ls r1, fr7 - float.ld fr7, dr2 - fabs.d dr2, dr4 - fcmpeq.d dr2, dr4, r7 - bnei r7, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fabss.cgs b/sim/testsuite/sim/sh64/media/fabss.cgs deleted file mode 100644 index dd9aec7e640..00000000000 --- a/sim/testsuite/sim/sh64/media/fabss.cgs +++ /dev/null @@ -1,39 +0,0 @@ -# sh testcase for fabs.s $frgh, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - movi 0, r0 - movi 1, r1 - -fabs0: - # Ensure fabs(-1) = 1. - fmov.ls r0, fr7 - float.ls fr7, fr0 - fmov.ls r1, fr7 - float.ls fr7, fr1 - fsub.s fr0, fr1, fr2 - fabs.s fr2, fr3 - fcmpeq.s fr3, fr1, r7 - bnei r7, 1, tr0 - -fabs1: - # Ensure fabs(1) = 1. - fmov.ls r0, fr7 - float.ls fr7, fr0 - fmov.ls r1, fr7 - float.ls fr7, fr1 - fabs.s fr1, fr2 - fcmpeq.s fr1, fr2, r7 - bnei r7, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/faddd.cgs b/sim/testsuite/sim/sh64/media/faddd.cgs deleted file mode 100644 index 096f8528946..00000000000 --- a/sim/testsuite/sim/sh64/media/faddd.cgs +++ /dev/null @@ -1,33 +0,0 @@ -# sh testcase for fadd.d $drg, $drh, $drf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - movi 2, r0 - movi 3, r1 - -fadd0: - # Add 2 and 3. - fmov.ls r0, fr7 - float.ld fr7, dr0 - fmov.ls r1, fr7 - float.ld fr7, dr2 - fadd.d dr0, dr2, dr4 - # Check to make sure we got 5. - movi 5, r2 - fmov.ls r2, fr7 - float.ld fr7, dr6 - fcmpeq.d dr4, dr6, r7 - bnei r7, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fadds.cgs b/sim/testsuite/sim/sh64/media/fadds.cgs deleted file mode 100644 index fb93979c737..00000000000 --- a/sim/testsuite/sim/sh64/media/fadds.cgs +++ /dev/null @@ -1,34 +0,0 @@ -# sh testcase for fadd.s $frg, $frh, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global fadds -init: - pta wrong, tr0 - movi 2, r0 - movi 3, r1 - -fadd0: - # Add 2 and 3. - fmov.ls r0, fr7 - float.ls fr7, fr0 - fmov.ls r1, fr7 - float.ls fr7, fr1 - fadd.s fr0, fr1, fr2 - # Check to make sure we got 5. - movi 5, r2 - fmov.ls r2, fr7 - float.ls fr7, fr3 - fcmpeq.s fr2, fr3, r7 - bnei r7, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fcmpeqd.cgs b/sim/testsuite/sim/sh64/media/fcmpeqd.cgs deleted file mode 100644 index c19356476f9..00000000000 --- a/sim/testsuite/sim/sh64/media/fcmpeqd.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# sh testcase for fcmpeq.d $drg, $drh, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -fcmpeq1: - movi 1, r0 - fmov.ls r0, fr0 - fmov.ls r0, fr1 - float.ld fr0, dr2 - float.ld fr1, dr4 - fcmpeq.d dr2, dr2, r7 - bnei r7, 1, tr0 - -fcmpeq2: - movi 1, r0 - fmov.ls r0, fr0 - movi 2, r1 - fmov.ls r1, fr1 - float.ld fr0, dr4 - float.ld fr1, dr6 - fcmpeq.d dr4, dr6, r7 - bnei r7, 0, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fcmpeqs.cgs b/sim/testsuite/sim/sh64/media/fcmpeqs.cgs deleted file mode 100644 index 216894d7d20..00000000000 --- a/sim/testsuite/sim/sh64/media/fcmpeqs.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# sh testcase for fcmpeq.s $frg, $frh, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -fcmpeq1: - movi 1, r0 - fmov.ls r0, fr0 - fmov.ls r0, fr1 - float.ls fr0, fr2 - float.ls fr1, fr3 - fcmpeq.s fr2, fr3, r7 - bnei r7, 1, tr0 - -fcmpeq2: - movi 1, r0 - fmov.ls r0, fr0 - movi 2, r1 - fmov.ls r1, fr1 - float.ls fr0, fr2 - float.ls fr1, fr3 - fcmpeq.s fr2, fr3, r7 - bnei r7, 0, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fcmpged.cgs b/sim/testsuite/sim/sh64/media/fcmpged.cgs deleted file mode 100644 index 52496cc6b14..00000000000 --- a/sim/testsuite/sim/sh64/media/fcmpged.cgs +++ /dev/null @@ -1,46 +0,0 @@ -# sh testcase for fcmpge.d $drg, $drh, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -fcmpge1: # 2 = 2. - movi 2, r0 - fmov.ls r0, fr0 - fmov.ls r0, fr1 - float.ld fr0, dr2 - float.ld fr1, dr4 - fcmpge.d dr2, dr4, r7 - bnei r7, 1, tr0 - -fcmpge2: # 4 > 2. - movi 4, r0 - fmov.ls r0, fr0 - movi 2, r0 - fmov.ls r0, fr1 - float.ld fr0, dr2 - float.ld fr1, dr4 - fcmpge.d dr2, dr4, r7 - bnei r7, 1, tr0 - -fcmpge3: # 2 < 4. - movi 2, r0 - fmov.ls r0, fr0 - movi 4, r0 - fmov.ls r0, fr1 - float.ld fr0, dr2 - float.ld fr1, dr4 - fcmpge.d dr2, dr4, r7 - bnei r7, 0, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fcmpges.cgs b/sim/testsuite/sim/sh64/media/fcmpges.cgs deleted file mode 100644 index 2dd0a35fd27..00000000000 --- a/sim/testsuite/sim/sh64/media/fcmpges.cgs +++ /dev/null @@ -1,46 +0,0 @@ -# sh testcase for fcmpge.s $frg, $frh, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -fcmpge1: # 2 = 2. - movi 2, r0 - fmov.ls r0, fr0 - fmov.ls r0, fr1 - float.ls fr0, fr2 - float.ls fr1, fr3 - fcmpge.s fr2, fr3, r7 - bnei r7, 1, tr0 - -fcmpge2: # 3 > 2. - movi 3, r0 - fmov.ls r0, fr0 - movi 2, r0 - fmov.ls r0, fr1 - float.ls fr0, fr2 - float.ls fr1, fr3 - fcmpge.s fr2, fr3, r7 - bnei r7, 1, tr0 - -fcmpge3: # 2 < 3. - movi 2, r0 - fmov.ls r0, fr0 - movi 3, r0 - fmov.ls r0, fr1 - float.ls fr0, fr2 - float.ls fr1, fr3 - fcmpge.s fr2, fr3, r7 - bnei r7, 0, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fcmpgtd.cgs b/sim/testsuite/sim/sh64/media/fcmpgtd.cgs deleted file mode 100644 index aec952097de..00000000000 --- a/sim/testsuite/sim/sh64/media/fcmpgtd.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# sh testcase for fcmpgt.d $drg, $drh, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -fcmpgt1: - movi 2, r0 - fmov.qd r0, dr0 - movi 1, r1 - fmov.qd r1, dr2 - float.qd dr0, dr4 - float.qd dr2, dr6 - fcmpgt.d dr4, dr6, r7 - bnei r7, 1, tr0 - -fcmpgt2: - movi 1, r0 - fmov.qd r0, dr0 - fmov.qd r0, dr2 - float.qd dr0, dr4 - float.qd dr2, dr6 - fcmpgt.d dr4, dr6, r7 - bnei r7, 0, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fcmpgts.cgs b/sim/testsuite/sim/sh64/media/fcmpgts.cgs deleted file mode 100644 index 893bbcbf60b..00000000000 --- a/sim/testsuite/sim/sh64/media/fcmpgts.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# sh testcase for fcmpgt.s $frg, $frh, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -fcmpgt1: - movi 2, r0 - fmov.ls r0, fr0 - movi 1, r1 - fmov.ls r1, fr1 - float.ls fr0, fr2 - float.ls fr1, fr3 - fcmpgt.s fr2, fr3, r7 - bnei r7, 1, tr0 - -fcmpgt2: - movi 1, r0 - fmov.ls r0, fr0 - fmov.ls r0, fr1 - float.ls fr0, fr2 - float.ls fr1, fr3 - fcmpgt.s fr2, fr3, r7 - bnei r7, 0, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fcmpund.cgs b/sim/testsuite/sim/sh64/media/fcmpund.cgs deleted file mode 100644 index b87fb8d9fb6..00000000000 --- a/sim/testsuite/sim/sh64/media/fcmpund.cgs +++ /dev/null @@ -1,26 +0,0 @@ -# sh testcase for fcmpun.d $drg, $drh, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -fcmpund: - movi 0, r0 - movi 1, r1 - fmov.qd r0, dr0 - float.qd dr0, dr0 - fmov.qd r1, dr2 - float.qd dr2, dr2 - fcmpun.d dr0, dr2, r7 - bnei r7, 0, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fcmpuns.cgs b/sim/testsuite/sim/sh64/media/fcmpuns.cgs deleted file mode 100644 index 6c2ed96b4a3..00000000000 --- a/sim/testsuite/sim/sh64/media/fcmpuns.cgs +++ /dev/null @@ -1,26 +0,0 @@ -# sh testcase for fcmpun.s $frg, $frh, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -fcmpuns: - movi 0, r0 - movi 1, r1 - fmov.ls r0, fr0 - float.ls fr0, fr0 - fmov.ls r1, fr1 - float.ls fr1, fr1 - fcmpun.s fr0, fr1, r7 - bnei r7, 0, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fcnvds.cgs b/sim/testsuite/sim/sh64/media/fcnvds.cgs deleted file mode 100644 index aa6c993fb85..00000000000 --- a/sim/testsuite/sim/sh64/media/fcnvds.cgs +++ /dev/null @@ -1,27 +0,0 @@ -# sh testcase for fcnv.ds $drgh, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -fcnvds: - movi 9, r0 - fmov.qd r0, dr0 - float.qd dr0, dr0 - fcnv.ds dr0, fr3 - movi 9, r0 - fmov.ls r0, fr4 - float.ls fr4, fr4 - fcmpeq.s fr3, fr4, r7 - bnei r7, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fcnvsd.cgs b/sim/testsuite/sim/sh64/media/fcnvsd.cgs deleted file mode 100644 index 6c2396fe815..00000000000 --- a/sim/testsuite/sim/sh64/media/fcnvsd.cgs +++ /dev/null @@ -1,27 +0,0 @@ -# sh testcase for fcnv.sd $frgh, $drf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -fcnvsd: - movi 9, r0 - fmov.ls r0, fr0 - float.ls fr0, fr0 - fcnv.sd fr0, dr2 - movi 9, r0 - fmov.qd r0, dr4 - float.qd dr4, dr4 - fcmpeq.d dr2, dr4, r7 - bnei r7, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fdivd.cgs b/sim/testsuite/sim/sh64/media/fdivd.cgs deleted file mode 100644 index 62401c6b47e..00000000000 --- a/sim/testsuite/sim/sh64/media/fdivd.cgs +++ /dev/null @@ -1,39 +0,0 @@ -# sh testcase for fdiv.d $drg, $drh, $drf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -fdivd1: - movi 1, r0 - fmov.qd r0, dr0 - float.qd dr0, dr0 - movi 2, r1 - fmov.qd r1, dr2 - float.qd dr2, dr2 - fdiv.d dr0, dr2, dr4 - -fdvid2: - movi 6, r0 - fmov.qd r0, dr0 - float.qd dr0, dr0 - movi 2, r1 - fmov.qd r1, dr2 - float.qd dr2, dr2 - fdiv.d dr0, dr2, dr4 - movi 3, r3 - fmov.qd r3, dr6 - float.qd dr6, dr6 - fcmpeq.d dr4, dr6, r7 - bnei r7, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fdivs.cgs b/sim/testsuite/sim/sh64/media/fdivs.cgs deleted file mode 100644 index 9b20f686b92..00000000000 --- a/sim/testsuite/sim/sh64/media/fdivs.cgs +++ /dev/null @@ -1,39 +0,0 @@ -# sh testcase for fdiv.s $frg, $frh, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -fdivs1: - movi 1, r0 - fmov.ls r0, fr0 - float.ls fr0, fr0 - movi 2, r1 - fmov.ls r1, fr1 - float.ls fr1, fr1 - fdiv.s fr0, fr1, fr2 - -fdvis2: - movi 6, r0 - fmov.ls r0, fr0 - float.ls fr0, fr0 - movi 2, r1 - fmov.ls r1, fr1 - float.ls fr1, fr1 - fdiv.s fr0, fr1, fr2 - movi 3, r3 - fmov.ls r3, fr3 - float.ls fr3, fr3 - fcmpeq.s fr2, fr3, r7 - bnei r7, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fgetscr.cgs b/sim/testsuite/sim/sh64/media/fgetscr.cgs deleted file mode 100644 index 6aa227480ce..00000000000 --- a/sim/testsuite/sim/sh64/media/fgetscr.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for fgetscr $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global fgetscr -fgetscr: - fgetscr fr0 - - pass diff --git a/sim/testsuite/sim/sh64/media/fiprs.cgs b/sim/testsuite/sim/sh64/media/fiprs.cgs deleted file mode 100644 index fef62d11c7c..00000000000 --- a/sim/testsuite/sim/sh64/media/fiprs.cgs +++ /dev/null @@ -1,42 +0,0 @@ -# sh testcase for fipr.s $fvg, $fvh, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - .macro _load val, fpreg - # This macro clobbers r0. - movi \val, r0 - fmov.ls r0, \fpreg - float.ls \fpreg, \fpreg - .endm - - start - - .global fiprs -init: - pta wrong, tr0 - - _load 1, fr0 - _load 2, fr1 - _load 3, fr2 - _load 4, fr3 - _load 1, fr4 - _load 2, fr5 - _load 3, fr6 - _load 4, fr7 - -fiprs: - fipr.s fv0, fv4, fr9 - -check: - _load 30, fr10 - fcmpeq.s fr9, fr10, r7 - bnei r7, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fldd.cgs b/sim/testsuite/sim/sh64/media/fldd.cgs deleted file mode 100644 index ded2a9fe8f5..00000000000 --- a/sim/testsuite/sim/sh64/media/fldd.cgs +++ /dev/null @@ -1,13 +0,0 @@ -# sh testcase for fld.d $rm, $disp10x8, $drf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - movi 0x2800, r0 - fld.d r0, 0, dr0 - fld.d r0, 8, dr0 - fld.d r0, -8, dr0 - pass diff --git a/sim/testsuite/sim/sh64/media/fldp.cgs b/sim/testsuite/sim/sh64/media/fldp.cgs deleted file mode 100644 index 8727110378c..00000000000 --- a/sim/testsuite/sim/sh64/media/fldp.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# sh testcase for fld.p $rm, $disp10x8, $fpf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - movi 0x2800, r0 - -fldp: - fld.p r0, 0, fp0 - fld.p r0, 8, fp2 - fld.p r0, -8, fp4 - pass diff --git a/sim/testsuite/sim/sh64/media/flds.cgs b/sim/testsuite/sim/sh64/media/flds.cgs deleted file mode 100644 index 75d5e961e26..00000000000 --- a/sim/testsuite/sim/sh64/media/flds.cgs +++ /dev/null @@ -1,13 +0,0 @@ -# sh testcase for fld.s $rm, $disp10x4, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - movi 0x2800, r0 - fld.s r0, 0, fr0 - fld.s r0, 4, fr0 - fld.s r0, -4, fr0 - pass diff --git a/sim/testsuite/sim/sh64/media/fldxd.cgs b/sim/testsuite/sim/sh64/media/fldxd.cgs deleted file mode 100644 index 63cb56bb06f..00000000000 --- a/sim/testsuite/sim/sh64/media/fldxd.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# sh testcase for fldx.d $rm, $rn, $drf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - movi 0x2800, r0 - movi 0, r1 - fldx.d r0, r1, dr0 - movi 8, r1 - fldx.d r0, r1, dr0 - movi -8, r1 - fldx.d r0, r1, dr0 - pass diff --git a/sim/testsuite/sim/sh64/media/fldxp.cgs b/sim/testsuite/sim/sh64/media/fldxp.cgs deleted file mode 100644 index 3d929c6fef8..00000000000 --- a/sim/testsuite/sim/sh64/media/fldxp.cgs +++ /dev/null @@ -1,22 +0,0 @@ -# sh testcase for fldx.p $rm, $rn, $fpf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - movi 0x2800, r0 - -fldxp: - movi 0, r1 - fldx.p r0, r1, fp0 - - movi 8, r1 - fldx.p r0, r1, fp2 - - movi -8, r1 - fldx.p r0, r1, fp4 - - pass diff --git a/sim/testsuite/sim/sh64/media/fldxs.cgs b/sim/testsuite/sim/sh64/media/fldxs.cgs deleted file mode 100644 index 10feb3e54a9..00000000000 --- a/sim/testsuite/sim/sh64/media/fldxs.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# sh testcase for fldx.s $rm, $rn, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - movi 0x2800, r0 - movi 0, r1 - fldx.s r0, r1, fr0 - movi 4, r1 - fldx.s r0, r1, fr0 - movi -4, r1 - fldx.s r0, r1, fr0 - pass diff --git a/sim/testsuite/sim/sh64/media/floatld.cgs b/sim/testsuite/sim/sh64/media/floatld.cgs deleted file mode 100644 index 31f6111061b..00000000000 --- a/sim/testsuite/sim/sh64/media/floatld.cgs +++ /dev/null @@ -1,12 +0,0 @@ -# sh testcase for float.ld $frgh, $drf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - movi 1, r0 - fmov.ls r0, fr0 - float.ld fr0, dr0 - pass diff --git a/sim/testsuite/sim/sh64/media/floatls.cgs b/sim/testsuite/sim/sh64/media/floatls.cgs deleted file mode 100644 index 4c8fb992798..00000000000 --- a/sim/testsuite/sim/sh64/media/floatls.cgs +++ /dev/null @@ -1,12 +0,0 @@ -# sh testcase for float.ls $frgh, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - movi 1, r0 - fmov.ls r0, fr0 - float.ls fr0, fr0 - pass diff --git a/sim/testsuite/sim/sh64/media/floatqd.cgs b/sim/testsuite/sim/sh64/media/floatqd.cgs deleted file mode 100644 index ea5ddd9e49a..00000000000 --- a/sim/testsuite/sim/sh64/media/floatqd.cgs +++ /dev/null @@ -1,12 +0,0 @@ -# sh testcase for float.qd $drgh, $drf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - movi 1, r0 - fmov.qd r0, dr0 - float.qd dr0, dr2 - pass diff --git a/sim/testsuite/sim/sh64/media/floatqs.cgs b/sim/testsuite/sim/sh64/media/floatqs.cgs deleted file mode 100644 index fcf35e29548..00000000000 --- a/sim/testsuite/sim/sh64/media/floatqs.cgs +++ /dev/null @@ -1,12 +0,0 @@ -# sh testcase for float.qs $drgh, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - movi 1, r0 - fmov.qd r0, dr0 - float.qs dr0, fr1 - pass diff --git a/sim/testsuite/sim/sh64/media/fmacs.cgs b/sim/testsuite/sim/sh64/media/fmacs.cgs deleted file mode 100644 index 62219c5fafd..00000000000 --- a/sim/testsuite/sim/sh64/media/fmacs.cgs +++ /dev/null @@ -1,39 +0,0 @@ -# sh testcase for fmac.s $frg, $frh, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -fmacs: - movi 2, r0 - fmov.ls r0, fr0 - float.ls fr0, fr0 - - movi 3, r1 - fmov.ls r1, fr1 - float.ls fr1, fr1 - - movi 4, r2 - fmov.ls r2, fr2 - float.ls fr2, fr2 - - fmac.s fr0, fr1, fr2 - - movi 10, r3 - fmov.ls r3, fr3 - float.ls fr3, fr3 - - fcmpeq.s fr2, fr3, r7 - bnei r7, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fmovd.cgs b/sim/testsuite/sim/sh64/media/fmovd.cgs deleted file mode 100644 index 03c05ad1776..00000000000 --- a/sim/testsuite/sim/sh64/media/fmovd.cgs +++ /dev/null @@ -1,24 +0,0 @@ -# sh testcase for fmov.d $drgh, $drf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -fmovd: - movi 4, r0 - fmov.qd r0, dr0 - float.qd dr0, dr2 - fmov.d dr2, dr4 - fcmpeq.d dr2, dr4, r7 - bnei r7, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fmovdq.cgs b/sim/testsuite/sim/sh64/media/fmovdq.cgs deleted file mode 100644 index ff5c3fe9302..00000000000 --- a/sim/testsuite/sim/sh64/media/fmovdq.cgs +++ /dev/null @@ -1,23 +0,0 @@ -# sh testcase for fmov.dq $drgh, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -fmovdq: - movi 4, r0 - fmov.qd r0, dr0 - fmov.dq dr0, r1 - bne r0, r1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fmovls.cgs b/sim/testsuite/sim/sh64/media/fmovls.cgs deleted file mode 100644 index 850ec33d160..00000000000 --- a/sim/testsuite/sim/sh64/media/fmovls.cgs +++ /dev/null @@ -1,26 +0,0 @@ -# sh testcase for fmov.ls $rm, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -fmovls0: - movi 0, r0 - fmov.ls r0, fr0 - -fmovls1: - movi 1, r1 - fmov.ls r1, fr1 - -upper: - movi 1, r2 - shlli r2, 63, r2 - ori r2, 3, r2 - # Bit 63 should be ignored. - fmov.ls r2, fr2 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/fmovqd.cgs b/sim/testsuite/sim/sh64/media/fmovqd.cgs deleted file mode 100644 index 64eac72b3df..00000000000 --- a/sim/testsuite/sim/sh64/media/fmovqd.cgs +++ /dev/null @@ -1,22 +0,0 @@ -# sh testcase for fmov.qd $rm, $drf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -fmovdq: - movi 4, r0 - fmov.qd r0, dr0 - fmov.dq dr0, r1 - bne r0, r1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fmovs.cgs b/sim/testsuite/sim/sh64/media/fmovs.cgs deleted file mode 100644 index f126aa5a41c..00000000000 --- a/sim/testsuite/sim/sh64/media/fmovs.cgs +++ /dev/null @@ -1,24 +0,0 @@ -# sh testcase for fmov.s $frgh, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -fmovs: - movi 8, r0 - fmov.ls r0, fr7 - float.ls fr7, fr0 - fmov.s fr0, fr1 - fcmpeq.s fr0, fr1, r7 - bnei r7, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fmovsl.cgs b/sim/testsuite/sim/sh64/media/fmovsl.cgs deleted file mode 100644 index 7dfdab1d145..00000000000 --- a/sim/testsuite/sim/sh64/media/fmovsl.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# sh testcase for fmov.sl $frgh, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -fmovsl: - pta wrong, tr0 - movi 9, r0 - fmov.ls r0, fr0 - fmov.sl fr0, r1 - bne r0, r1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fmuld.cgs b/sim/testsuite/sim/sh64/media/fmuld.cgs deleted file mode 100644 index 2ad67cdc532..00000000000 --- a/sim/testsuite/sim/sh64/media/fmuld.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# sh testcase for fmul.d $drg, $drh, $drf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -fmuld1: - movi 2, r0 - fmov.qd r0, dr0 - float.qd dr0, dr0 - movi 3, r1 - fmov.qd r1, dr2 - float.qd dr2, dr2 - fmul.d dr0, dr2, dr4 - movi 6, r2 - fmov.qd r2, dr6 - float.qd dr6, dr6 - fcmpeq.d dr4, dr6, r7 - bnei r7, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fmuls.cgs b/sim/testsuite/sim/sh64/media/fmuls.cgs deleted file mode 100644 index 4b8875f0c59..00000000000 --- a/sim/testsuite/sim/sh64/media/fmuls.cgs +++ /dev/null @@ -1,31 +0,0 @@ -# sh testcase for fmul.s $frg, $frh, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -fmuls1: - movi 2, r0 - fmov.ls r0, fr0 - float.ls fr0, fr0 - movi 3, r1 - fmov.ls r1, fr1 - float.ls fr1, fr1 - fmul.s fr0, fr1, fr2 - movi 6, r2 - fmov.ls r2, fr3 - float.ls fr3, fr3 - fcmpeq.s fr2, fr3, r7 - bnei r7, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fnegd.cgs b/sim/testsuite/sim/sh64/media/fnegd.cgs deleted file mode 100644 index 67b381345b6..00000000000 --- a/sim/testsuite/sim/sh64/media/fnegd.cgs +++ /dev/null @@ -1,35 +0,0 @@ -# sh testcase for fneg.d $drgh, $drf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - movi 0, r0 - movi 1, r1 - -fnegd0: - # Ensure fnegd(0) = 0. - fmov.ls r0, fr7 - float.ld fr7, dr0 - fneg.d dr0, dr2 - fcmpeq.d dr0, dr2, r7 - bnei r7, 1, tr0 - -fnegd1: - # Ensure fnegd(fnegd(1)) = 1. - fmov.ls r1, fr7 - float.ld fr7, dr0 - fneg.d dr0, dr2 - fneg.d dr2, dr4 - fcmpeq.d dr0, dr4, r7 - bnei r7, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fnegs.cgs b/sim/testsuite/sim/sh64/media/fnegs.cgs deleted file mode 100644 index 9ad625a1f1f..00000000000 --- a/sim/testsuite/sim/sh64/media/fnegs.cgs +++ /dev/null @@ -1,35 +0,0 @@ -# sh testcase for fneg.s $frgh, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - movi 0, r0 - movi 1, r1 - -fnegs0: - # Ensure fnegs(0) = 0. - fmov.ls r0, fr7 - float.ls fr7, fr0 - fneg.s fr0, fr1 - fcmpeq.s fr0, fr1, r7 - bnei r7, 1, tr0 - -fnegs1: - # Ensure fnegs(fnegs(1)) = 1. - fmov.ls r1, fr7 - float.ls fr7, fr0 - fneg.s fr0, fr1 - fneg.s fr1, fr2 - fcmpeq.s fr0, fr2, r7 - bnei r7, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fputscr.cgs b/sim/testsuite/sim/sh64/media/fputscr.cgs deleted file mode 100644 index 28d2e7230ee..00000000000 --- a/sim/testsuite/sim/sh64/media/fputscr.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for fputscr $frgh -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global fputscr -fputscr: - fputscr fr0 - - pass diff --git a/sim/testsuite/sim/sh64/media/fsqrtd.cgs b/sim/testsuite/sim/sh64/media/fsqrtd.cgs deleted file mode 100644 index ae6120002e0..00000000000 --- a/sim/testsuite/sim/sh64/media/fsqrtd.cgs +++ /dev/null @@ -1,27 +0,0 @@ -# sh testcase for fsqrt.d $frgh, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - movi 9, r0 - fmov.ls r0, fr7 - float.ld fr7, dr0 - movi 3, r1 - fmov.ls r1, fr7 - float.ld fr7, dr2 - -fsqrtd: - fsqrt.d dr0, dr4 - fcmpeq.d dr2, dr4, r7 - bnei r7, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fsqrts.cgs b/sim/testsuite/sim/sh64/media/fsqrts.cgs deleted file mode 100644 index f1183933159..00000000000 --- a/sim/testsuite/sim/sh64/media/fsqrts.cgs +++ /dev/null @@ -1,27 +0,0 @@ -# sh testcase for fsqrt.s $frgh, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - movi 9, r0 - fmov.ls r0, fr7 - float.ls fr7, fr0 - movi 3, r1 - fmov.ls r1, fr7 - float.ls fr7, fr2 - -fsqrts: - fsqrt.s fr0, fr1 - fcmpeq.s fr1, fr2, r7 - bnei r7, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fstd.cgs b/sim/testsuite/sim/sh64/media/fstd.cgs deleted file mode 100644 index 16ab5b6672c..00000000000 --- a/sim/testsuite/sim/sh64/media/fstd.cgs +++ /dev/null @@ -1,34 +0,0 @@ -# sh testcase for fst.d $rm, $disp10x8, $drf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global fstd -fstd: - movi 0x1020, r0 - shlli r0, 8, r0 - ori r0, 0x30, r0 - shlli r0, 8, r0 - ori r0, 0x40, r0 - shlli r0, 8, r0 - ori r0, 0x50, r0 - shlli r0, 8, r0 - ori r0, 0x60, r0 - shlli r0, 8, r0 - ori r0, 0x70, r0 - shlli r0, 8, r0 - ori r0, 0x80, r0 - # Set target address. - movi 0x2800, r1 - fmov.qd r0, dr0 - - fst.d r1, 0, dr0 - fst.d r1, 8, dr0 - fst.d r1, -8, dr0 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/fstp.cgs b/sim/testsuite/sim/sh64/media/fstp.cgs deleted file mode 100644 index e0c396ac59a..00000000000 --- a/sim/testsuite/sim/sh64/media/fstp.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for fst.p $rm, $disp10x8, $fpf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global fstp -fstp: - fst.p r0, 0, fp0 - - pass diff --git a/sim/testsuite/sim/sh64/media/fsts.cgs b/sim/testsuite/sim/sh64/media/fsts.cgs deleted file mode 100644 index fb692cf274c..00000000000 --- a/sim/testsuite/sim/sh64/media/fsts.cgs +++ /dev/null @@ -1,34 +0,0 @@ -# sh testcase for fst.s $rm, $disp10x4, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global fsts -fsts: - movi 0x1020, r0 - shlli r0, 8, r0 - ori r0, 0x30, r0 - shlli r0, 8, r0 - ori r0, 0x40, r0 - shlli r0, 8, r0 - ori r0, 0x50, r0 - shlli r0, 8, r0 - ori r0, 0x60, r0 - shlli r0, 8, r0 - ori r0, 0x70, r0 - shlli r0, 8, r0 - ori r0, 0x80, r0 - # Set target address. - movi 0x2800, r1 - fmov.ls r0, fr0 - - fst.s r1, 0, fr0 - fst.s r1, 4, fr0 - fst.s r1, -4, fr0 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/fstxd.cgs b/sim/testsuite/sim/sh64/media/fstxd.cgs deleted file mode 100644 index 10f6c1436b5..00000000000 --- a/sim/testsuite/sim/sh64/media/fstxd.cgs +++ /dev/null @@ -1,31 +0,0 @@ -# sh testcase for fstx.d $rm, $rn, $drf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global fstxd -fstxd: - movi 0x1020, r0 - shlli r0, 8, r0 - ori r0, 0x30, r0 - shlli r0, 8, r0 - ori r0, 0x40, r0 - shlli r0, 8, r0 - ori r0, 0x50, r0 - shlli r0, 8, r0 - ori r0, 0x60, r0 - shlli r0, 8, r0 - ori r0, 0x70, r0 - shlli r0, 8, r0 - ori r0, 0x80, r0 - fmov.qd r0, dr0 - movi 0x2800, r1 - movi -8, r2 - fstx.d r1, r2, dr0 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/fstxp.cgs b/sim/testsuite/sim/sh64/media/fstxp.cgs deleted file mode 100644 index 1829f58eb25..00000000000 --- a/sim/testsuite/sim/sh64/media/fstxp.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for fstx.p $rm, $rn, $fpf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global fstxp -fstxp: - fstx.p r0, r0, fp0 - - pass diff --git a/sim/testsuite/sim/sh64/media/fstxs.cgs b/sim/testsuite/sim/sh64/media/fstxs.cgs deleted file mode 100644 index 0b4ff96dba9..00000000000 --- a/sim/testsuite/sim/sh64/media/fstxs.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# sh testcase for fstx.s $rm, $rn, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - .global fstxs -fstxs: - movi 0x1020, r0 - shlli r0, 8, r0 - ori r0, 0x30, r0 - shlli r0, 8, r0 - ori r0, 0x40, r0 - shlli r0, 8, r0 - ori r0, 0x50, r0 - shlli r0, 8, r0 - ori r0, 0x60, r0 - shlli r0, 8, r0 - ori r0, 0x70, r0 - shlli r0, 8, r0 - ori r0, 0x80, r0 - fmov.ls r0, fr0 - movi 0x2800, r1 - movi -8, r2 - fstx.s r1, r2, fr0 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/fsubd.cgs b/sim/testsuite/sim/sh64/media/fsubd.cgs deleted file mode 100644 index 93dc421b01f..00000000000 --- a/sim/testsuite/sim/sh64/media/fsubd.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# sh testcase for fsub.d $drg, $drh, $drf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global fsubd -init: - pta wrong, tr0 - -fsubd: - movi 9, r0 - fmov.qd r0, dr0 - float.qd dr0, dr0 - - movi 3, r0 - fmov.qd r0, dr2 - float.qd dr2, dr2 - - fsub.d dr0, dr2, dr4 - - movi 6, r0 - fmov.qd r0, dr6 - float.qd dr6, dr6 - - fcmpeq.d dr4, dr6, r7 - bnei r7, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/fsubs.cgs b/sim/testsuite/sim/sh64/media/fsubs.cgs deleted file mode 100644 index b009f094054..00000000000 --- a/sim/testsuite/sim/sh64/media/fsubs.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# sh testcase for fsub.s $frg, $frh, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global fsubs -init: - pta wrong, tr0 - -fsubs: - movi 9, r0 - fmov.ls r0, fr0 - float.ls fr0, fr0 - - movi 3, r0 - fmov.ls r0, fr1 - float.ls fr1, fr1 - - fsub.s fr0, fr1, fr2 - - movi 6, r0 - fmov.ls r0, fr3 - float.ls fr3, fr3 - - fcmpeq.s fr2, fr3, r7 - bnei r7, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/ftrcdl.cgs b/sim/testsuite/sim/sh64/media/ftrcdl.cgs deleted file mode 100644 index 3aafb83dca3..00000000000 --- a/sim/testsuite/sim/sh64/media/ftrcdl.cgs +++ /dev/null @@ -1,26 +0,0 @@ -# sh testcase for ftrc.dl $drgh, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global ftrcdl -init: - pta wrong, tr0 - -ftrcdl: - movi -9, r0 - fmov.qd r0, dr0 - float.qd dr0, dr0 - ftrc.dl dr0, fr0 - fmov.sl fr0, r1 - bne r0, r1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/ftrcdq.cgs b/sim/testsuite/sim/sh64/media/ftrcdq.cgs deleted file mode 100644 index 6cd63fb029e..00000000000 --- a/sim/testsuite/sim/sh64/media/ftrcdq.cgs +++ /dev/null @@ -1,24 +0,0 @@ -# sh testcase for ftrc.dq $drgh, $drf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -ftrcdq: - movi -9, r0 - fmov.qd r0, dr0 - float.qd dr0, dr0 - ftrc.dq dr0, dr2 - fmov.dq dr2, r1 - bne r0, r1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/ftrcsl.cgs b/sim/testsuite/sim/sh64/media/ftrcsl.cgs deleted file mode 100644 index 9fd7faebd1a..00000000000 --- a/sim/testsuite/sim/sh64/media/ftrcsl.cgs +++ /dev/null @@ -1,26 +0,0 @@ -# sh testcase for ftrc.sl $frgh, $frf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global ftrcsl -init: - pta wrong, tr0 - -ftrcsl: - movi -9, r0 - fmov.ls r0, fr0 - float.ls fr0, fr0 - ftrc.sl fr0, fr1 - fmov.sl fr1, r1 - bne r0, r1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/ftrcsq.cgs b/sim/testsuite/sim/sh64/media/ftrcsq.cgs deleted file mode 100644 index 8f19d595e10..00000000000 --- a/sim/testsuite/sim/sh64/media/ftrcsq.cgs +++ /dev/null @@ -1,25 +0,0 @@ -# sh testcase for ftrc.sq $frgh, $drf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -ftrcsq: - movi -9, r0 - fmov.ls r0, fr0 - float.ls fr0, fr0 - ftrc.sq fr0, dr2 - fmov.dq dr2, r1 - bne r0, r1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/ftrvs.cgs b/sim/testsuite/sim/sh64/media/ftrvs.cgs deleted file mode 100644 index be7a75ad885..00000000000 --- a/sim/testsuite/sim/sh64/media/ftrvs.cgs +++ /dev/null @@ -1,67 +0,0 @@ -# sh testcase for ftrv.s $mtrxg, $fvh, $fvf -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - .macro _load val, fpreg - # This macro clobbers r0. - movi \val, r0 - fmov.ls r0, \fpreg - float.ls \fpreg, \fpreg - .endm - - start - -init: - pta wrong, tr0 - - _load 1, fr0 - _load 2, fr4 - _load 3, fr8 - _load 4, fr12 - _load 5, fr1 - _load 6, fr5 - _load 7, fr9 - _load 8, fr13 - _load 9, fr2 - _load 10, fr6 - _load 11, fr10 - _load 12, fr14 - _load 13, fr3 - _load 14, fr7 - _load 15, fr11 - _load 16, fr15 - - _load 1, fr16 - _load 2, fr17 - _load 3, fr18 - _load 4, fr19 - -ftrvs: - ftrv.s mtrx0, fv16, fv20 - -check: - _load 30, fr0 - _load 70, fr1 - _load 110, fr2 - _load 150, fr3 - - fcmpeq.s fr0, fr20, r0 - bnei r0, 1, tr0 - - fcmpeq.s fr1, fr21, r0 - bnei r0, 1, tr0 - - fcmpeq.s fr2, fr22, r0 - bnei r0, 1, tr0 - - fcmpeq.s fr3, fr23, r0 - bnei r0, 1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/getcfg.cgs b/sim/testsuite/sim/sh64/media/getcfg.cgs deleted file mode 100644 index d151739846e..00000000000 --- a/sim/testsuite/sim/sh64/media/getcfg.cgs +++ /dev/null @@ -1,10 +0,0 @@ -# sh testcase for getcfg $rm, $disp6, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - getcfg r0, 0, r0 - pass diff --git a/sim/testsuite/sim/sh64/media/getcon.cgs b/sim/testsuite/sim/sh64/media/getcon.cgs deleted file mode 100644 index 8eeb43cd5b0..00000000000 --- a/sim/testsuite/sim/sh64/media/getcon.cgs +++ /dev/null @@ -1,29 +0,0 @@ -# sh testcase for getcon $crk, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -getcon1: - movi 22, r0 - putcon r0, cr0 - getcon cr0, r1 - bne r0, r1, tr0 - -getcon2: - movi 12, r0 - shlli r0, 35, r0 - putcon r0, cr20 - getcon cr20, r20 - bne r0, r20, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/gettr.cgs b/sim/testsuite/sim/sh64/media/gettr.cgs deleted file mode 100644 index 8840a361bb0..00000000000 --- a/sim/testsuite/sim/sh64/media/gettr.cgs +++ /dev/null @@ -1,48 +0,0 @@ -# sh testcase for gettr $trb, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - # tr0 is reserved. - # don't use it anywhere else in this test. - pta wrong, tr0 - -gettr1: - # Put garbage in r1, r2. - movi 20, r1 - movi 30, r2 - - pta foo, tr1 - pta foo, tr2 - -check1: - gettr tr1, r1 - gettr tr2, r2 - bne r1, r2, tr0 - -gettr2: - # Put garbage in r3, r4. - movi 21, r3 - movi 42, r4 - -check2: - pta foo, tr1 - gettr tr1, r2 - ptabs r2, tr2 - gettr tr2, r3 - ptabs r3, tr3 - gettr tr3, r4 - bne r2, r4, tr0 - -okay: - pass - -wrong: - fail - -foo: - nop diff --git a/sim/testsuite/sim/sh64/media/icbi.cgs b/sim/testsuite/sim/sh64/media/icbi.cgs deleted file mode 100644 index 9ba18452ef6..00000000000 --- a/sim/testsuite/sim/sh64/media/icbi.cgs +++ /dev/null @@ -1,10 +0,0 @@ -# sh testcase for icbi $rm, $disp6x32 -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - icbi r0, 0 - pass diff --git a/sim/testsuite/sim/sh64/media/ldb.cgs b/sim/testsuite/sim/sh64/media/ldb.cgs deleted file mode 100644 index fad1e6e15ee..00000000000 --- a/sim/testsuite/sim/sh64/media/ldb.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# sh testcase for ld.b $rm, $disp10, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - movi 20, r3 - shlli r3, 8, r3 - -ldb1: - ld.b r3, 0, r0 -ldb2: - ld.b r3, -1, r0 -ldb3: - ld.b r3, 1, r0 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/ldhil.cgs b/sim/testsuite/sim/sh64/media/ldhil.cgs deleted file mode 100644 index 4323985ea49..00000000000 --- a/sim/testsuite/sim/sh64/media/ldhil.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for ldhi.l $rm, $disp6, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global ldhil -ldhil: - ldhi.l r0, 0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/ldhiq.cgs b/sim/testsuite/sim/sh64/media/ldhiq.cgs deleted file mode 100644 index c34a952bba7..00000000000 --- a/sim/testsuite/sim/sh64/media/ldhiq.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for ldhi.q $rm, $disp6, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global ldhiq -ldhiq: - ldhi.q r0, 0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/ldl.cgs b/sim/testsuite/sim/sh64/media/ldl.cgs deleted file mode 100644 index b8b8725dee1..00000000000 --- a/sim/testsuite/sim/sh64/media/ldl.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# sh testcase for ld.l $rm, $disp10x4, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - movi 20, r3 - shlli r3, 8, r3 - -ldl1: - ld.l r3, 0, r0 -ldl2: - ld.l r3, -4, r0 -ldl3: - ld.l r3, 4, r0 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/ldlol.cgs b/sim/testsuite/sim/sh64/media/ldlol.cgs deleted file mode 100644 index 8204f40ebf4..00000000000 --- a/sim/testsuite/sim/sh64/media/ldlol.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for ldlo.l $rm, $disp6, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global ldlol -ldlol: - ldlo.l r0, 0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/ldloq.cgs b/sim/testsuite/sim/sh64/media/ldloq.cgs deleted file mode 100644 index 0cf128e2013..00000000000 --- a/sim/testsuite/sim/sh64/media/ldloq.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for ldlo.q $rm, $disp6, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global ldloq -ldloq: - ldlo.q r0, 0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/ldq.cgs b/sim/testsuite/sim/sh64/media/ldq.cgs deleted file mode 100644 index cacc076bb90..00000000000 --- a/sim/testsuite/sim/sh64/media/ldq.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# sh testcase for ld.q $rm, $disp10x8, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - movi 20, r3 - shlli r3, 8, r3 - -ldl1: - ld.q r3, 0, r0 -ldl2: - ld.q r3, -8, r0 -ldl3: - ld.q r3, 8, r0 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/ldub.cgs b/sim/testsuite/sim/sh64/media/ldub.cgs deleted file mode 100644 index 825ce642e31..00000000000 --- a/sim/testsuite/sim/sh64/media/ldub.cgs +++ /dev/null @@ -1,22 +0,0 @@ -# sh testcase for ld.ub $rm, $disp10, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - movi 20, r3 - shlli r3, 8, r3 - -ldub1: - ld.ub r3, 0, r0 -ldub2: - ld.ub r3, -1, r0 -ldub3: - ld.ub r3, 1, r0 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/lduw.cgs b/sim/testsuite/sim/sh64/media/lduw.cgs deleted file mode 100644 index a329802e22b..00000000000 --- a/sim/testsuite/sim/sh64/media/lduw.cgs +++ /dev/null @@ -1,22 +0,0 @@ -# sh testcase for ld.uw $rm, $disp10, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - movi 20, r3 - shlli r3, 8, r3 - -lduw1: - ld.uw r3, 0, r0 -lduw2: - ld.uw r3, -2, r0 -lduw3: - ld.uw r3, 2, r0 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/ldw.cgs b/sim/testsuite/sim/sh64/media/ldw.cgs deleted file mode 100644 index d39405515a9..00000000000 --- a/sim/testsuite/sim/sh64/media/ldw.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# sh testcase for ld.w $rm, $disp10, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - movi 20, r3 - shlli r3, 8, r3 - -ldw1: - ld.w r3, 0, r0 -ldw2: - ld.w r3, -2, r0 -ldw3: - ld.w r3, 2, r0 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/ldxb.cgs b/sim/testsuite/sim/sh64/media/ldxb.cgs deleted file mode 100644 index 36038df8da4..00000000000 --- a/sim/testsuite/sim/sh64/media/ldxb.cgs +++ /dev/null @@ -1,28 +0,0 @@ -# sh testcase for ldx.b $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -ldxb1: - movi 20, r3 - shlli r3, 8, r3 - movi 0, r4 - ldx.b r3, r4, r0 - -ldxb2: - movi 20, r3 - shlli r3, 8, r3 - movi 1, r4 - ldx.b r3, r4, r0 - -ldxb3: - movi 20, r3 - shlli r3, 8, r3 - movi -1, r4 - ldx.b r3, r4, r0 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/ldxl.cgs b/sim/testsuite/sim/sh64/media/ldxl.cgs deleted file mode 100644 index 0596e9f325b..00000000000 --- a/sim/testsuite/sim/sh64/media/ldxl.cgs +++ /dev/null @@ -1,28 +0,0 @@ -# sh testcase for ldx.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -ldxl1: - movi 20, r3 - shlli r3, 8, r3 - movi 0, r4 - ldx.l r3, r4, r0 - -ldxl2: - movi 20, r3 - shlli r3, 8, r3 - movi 4, r4 - ldx.l r3, r4, r0 - -ldxl3: - movi 20, r3 - shlli r3, 8, r3 - movi -4, r4 - ldx.l r3, r4, r0 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/ldxq.cgs b/sim/testsuite/sim/sh64/media/ldxq.cgs deleted file mode 100644 index 1247f220562..00000000000 --- a/sim/testsuite/sim/sh64/media/ldxq.cgs +++ /dev/null @@ -1,28 +0,0 @@ -# sh testcase for ldx.q $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -ldxq1: - movi 20, r3 - shlli r3, 8, r3 - movi 0, r4 - ldx.q r3, r4, r0 - -ldxq2: - movi 20, r3 - shlli r3, 8, r3 - movi 8, r4 - ldx.q r3, r4, r0 - -ldxq3: - movi 20, r3 - shlli r3, 8, r3 - movi -8, r4 - ldx.q r3, r4, r0 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/ldxub.cgs b/sim/testsuite/sim/sh64/media/ldxub.cgs deleted file mode 100644 index e863a3bfccf..00000000000 --- a/sim/testsuite/sim/sh64/media/ldxub.cgs +++ /dev/null @@ -1,28 +0,0 @@ -# sh testcase for ldx.ub $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -ldxub1: - movi 20, r3 - shlli r3, 8, r3 - movi 0, r4 - ldx.ub r3, r4, r0 - -ldxub2: - movi 20, r3 - shlli r3, 8, r3 - movi 1, r4 - ldx.ub r3, r4, r0 - -ldxub3: - movi 20, r3 - shlli r3, 8, r3 - movi -1, r4 - ldx.ub r3, r4, r0 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/ldxuw.cgs b/sim/testsuite/sim/sh64/media/ldxuw.cgs deleted file mode 100644 index 282812db895..00000000000 --- a/sim/testsuite/sim/sh64/media/ldxuw.cgs +++ /dev/null @@ -1,29 +0,0 @@ -# sh testcase for ldx.uw $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -ldxuw1: - movi 20, r3 - shlli r3, 8, r3 - movi 0, r4 - ldx.uw r3, r4, r0 - -ldxuw2: - movi 20, r3 - shlli r3, 8, r3 - movi 2, r4 - ldx.uw r3, r4, r0 - -ldxuw3: - movi 20, r3 - shlli r3, 8, r3 - movi -2, r4 - ldx.uw r3, r4, r0 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/ldxw.cgs b/sim/testsuite/sim/sh64/media/ldxw.cgs deleted file mode 100644 index d377fef6177..00000000000 --- a/sim/testsuite/sim/sh64/media/ldxw.cgs +++ /dev/null @@ -1,29 +0,0 @@ -# sh testcase for ldx.w $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -ldxw1: - movi 20, r3 - shlli r3, 8, r3 - movi 0, r4 - ldx.w r3, r4, r0 - -ldxw2: - movi 20, r3 - shlli r3, 8, r3 - movi 2, r4 - ldx.w r3, r4, r0 - -ldxw3: - movi 20, r3 - shlli r3, 8, r3 - movi -2, r4 - ldx.w r3, r4, r0 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/mabsl.cgs b/sim/testsuite/sim/sh64/media/mabsl.cgs deleted file mode 100644 index a8af663ea12..00000000000 --- a/sim/testsuite/sim/sh64/media/mabsl.cgs +++ /dev/null @@ -1,39 +0,0 @@ -# sh testcase for mabs.l $rm, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mabsl -init: - pta wrong, tr0 - -mabsl1: - # Pack { 1 3 } into R0. - _packl 1, 3, r0 - - mabs.l r0, r1 - - # Test for { 1 3 } in R0. - _packl 1, 3, r2 - bne r0, r2, tr0 - -mabsl2: - # Pack { -1, -1 } into R0. - _packl 1, 1, r0 - - # Set the left sign bit. - movi 1, r1 - shlli r1, 63, r1 - or r0, r1, r0 - - mabs.l r0, r2 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/mabsw.cgs b/sim/testsuite/sim/sh64/media/mabsw.cgs deleted file mode 100644 index f4e980a19c6..00000000000 --- a/sim/testsuite/sim/sh64/media/mabsw.cgs +++ /dev/null @@ -1,38 +0,0 @@ -# sh testcase for mabs.w $rm, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -mabsw1: - # Pack { 1 3 5 7 } into R0. - _packw 1, 3, 5, 7, r0 - - mabs.l r0, r1 - - # Test for { 1 3 5 7 } in R0. - _packw 1, 3, 5, 7, r2 - bne r0, r2, tr0 - -mabsw2: - # Pack { -1, -1, -1, -1 } into R0. - _packw 1, 1, 1, 1, r0 - - # Set the left sign bit - movi 1, r1 - shlli r1, 63, r1 - or r0, r1, r0 - - mabs.w r0, r2 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/maddl.cgs b/sim/testsuite/sim/sh64/media/maddl.cgs deleted file mode 100644 index 4bdf5463866..00000000000 --- a/sim/testsuite/sim/sh64/media/maddl.cgs +++ /dev/null @@ -1,29 +0,0 @@ -# sh testcase for madd.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -maddl: - # Load { 1 2 } into r0. - _packl 1, 2, r0 - # Load { 3 4 } into r1. - _packl 3, 4, r1 - - # Add slices to produce { 4 6 }. - madd.l r0, r1, r2 - - _packl 4, 6, r3 - bne r2, r3, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/maddsl.cgs b/sim/testsuite/sim/sh64/media/maddsl.cgs deleted file mode 100644 index 3977275dc89..00000000000 --- a/sim/testsuite/sim/sh64/media/maddsl.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for madds.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global maddsl -maddsl: - madds.l r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/maddsub.cgs b/sim/testsuite/sim/sh64/media/maddsub.cgs deleted file mode 100644 index a55f927a3e1..00000000000 --- a/sim/testsuite/sim/sh64/media/maddsub.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for madds.ub $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global maddsub -maddsub: - madds.ub r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/maddsw.cgs b/sim/testsuite/sim/sh64/media/maddsw.cgs deleted file mode 100644 index 45a774ed2fc..00000000000 --- a/sim/testsuite/sim/sh64/media/maddsw.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for madds.w $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global maddsw -maddsw: - madds.w r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/maddw.cgs b/sim/testsuite/sim/sh64/media/maddw.cgs deleted file mode 100644 index b220ef4aee6..00000000000 --- a/sim/testsuite/sim/sh64/media/maddw.cgs +++ /dev/null @@ -1,29 +0,0 @@ -# sh testcase for madd.w $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -maddw: - # Load { 1 2 3 4 } into R0. - _packw 1, 2, 3, 4, r0 - - # Load { 3 4 5 6 } into R1. - _packw 3, 4, 5, 6, r1 - - # Add slices to produce { 4 6 8 10 }. - madd.w r0, r1, r2 - - _packw 4, 6, 8, 10, r3 - bne r2, r3, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/mcmpeqb.cgs b/sim/testsuite/sim/sh64/media/mcmpeqb.cgs deleted file mode 100644 index d7af6fa5f58..00000000000 --- a/sim/testsuite/sim/sh64/media/mcmpeqb.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mcmpeq.b $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mcmpeqb -mcmpeqb: - mcmpeq.b r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mcmpeql.cgs b/sim/testsuite/sim/sh64/media/mcmpeql.cgs deleted file mode 100644 index 2851e80fc5e..00000000000 --- a/sim/testsuite/sim/sh64/media/mcmpeql.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mcmpeq.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mcmpeql -mcmpeql: - mcmpeq.l r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mcmpeqw.cgs b/sim/testsuite/sim/sh64/media/mcmpeqw.cgs deleted file mode 100644 index 085df84eeb9..00000000000 --- a/sim/testsuite/sim/sh64/media/mcmpeqw.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mcmpeq.w $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mcmpeqw -mcmpeqw: - mcmpeq.w r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mcmpgtl.cgs b/sim/testsuite/sim/sh64/media/mcmpgtl.cgs deleted file mode 100644 index 2ace0480506..00000000000 --- a/sim/testsuite/sim/sh64/media/mcmpgtl.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mcmpgt.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mcmpgtl -mcmpgtl: - mcmpgt.l r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mcmpgtub.cgs b/sim/testsuite/sim/sh64/media/mcmpgtub.cgs deleted file mode 100644 index 540ce966092..00000000000 --- a/sim/testsuite/sim/sh64/media/mcmpgtub.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mcmpgt.ub $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mcmpgtub -mcmpgtub: - mcmpgt.ub r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mcmpgtw.cgs b/sim/testsuite/sim/sh64/media/mcmpgtw.cgs deleted file mode 100644 index 83274512d5e..00000000000 --- a/sim/testsuite/sim/sh64/media/mcmpgtw.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mcmpgt.w $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mcmpgtw -mcmpgtw: - mcmpgt.w r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mcmv.cgs b/sim/testsuite/sim/sh64/media/mcmv.cgs deleted file mode 100644 index c1f59aa4f88..00000000000 --- a/sim/testsuite/sim/sh64/media/mcmv.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mcmv $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mcmv -mcmv: - mcmv r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mcnvslw.cgs b/sim/testsuite/sim/sh64/media/mcnvslw.cgs deleted file mode 100644 index 005108b7669..00000000000 --- a/sim/testsuite/sim/sh64/media/mcnvslw.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mcnvs.lw $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mcnvslw -mcnvslw: - mcnvs.lw r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mcnvswb.cgs b/sim/testsuite/sim/sh64/media/mcnvswb.cgs deleted file mode 100644 index 0d25920f310..00000000000 --- a/sim/testsuite/sim/sh64/media/mcnvswb.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mcnvs.wb $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mcnvswb -mcnvswb: - mcnvs.wb r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mcnvswub.cgs b/sim/testsuite/sim/sh64/media/mcnvswub.cgs deleted file mode 100644 index 2fc74466dd0..00000000000 --- a/sim/testsuite/sim/sh64/media/mcnvswub.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mcnvs.wub $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mcnvswub -mcnvswub: - mcnvs.wub r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mextr1.cgs b/sim/testsuite/sim/sh64/media/mextr1.cgs deleted file mode 100644 index b2cb3c3ff29..00000000000 --- a/sim/testsuite/sim/sh64/media/mextr1.cgs +++ /dev/null @@ -1,67 +0,0 @@ -# sh testcase for mextr1 $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - # Put a distinguised bit pattern in R0. - movi 0x1020, r0 - shlli r0, 8, r0 - ori r0, 0x30, r0 - shlli r0, 8, r0 - ori r0, 0x40, r0 - shlli r0, 8, r0 - ori r0, 0x50, r0 - shlli r0, 8, r0 - ori r0, 0x60, r0 - shlli r0, 8, r0 - ori r0, 0x70, r0 - shlli r0, 8, r0 - ori r0, 0x80, r0 - - # Put another distinguished bit pattern in R1. - movi 0x1525, r1 - shlli r1, 8, r1 - ori r1, 0x35, r1 - shlli r1, 8, r1 - ori r1, 0x45, r1 - shlli r1, 8, r1 - ori r1, 0x55, r1 - shlli r1, 8, r1 - ori r1, 0x65, r1 - shlli r1, 8, r1 - ori r1, 0x75, r1 - shlli r1, 8, r1 - ori r1, 0x85, r1 - -mextr1: - mextr1 r0, r1, r2 - -check: - # Put the result in R3. - movi 0x2535, r3 - shlli r3, 8, r3 - ori r3, 0x45, r3 - shlli r3, 8, r3 - ori r3, 0x55, r3 - shlli r3, 8, r3 - ori r3, 0x65, r3 - shlli r3, 8, r3 - ori r3, 0x75, r3 - shlli r3, 8, r3 - ori r3, 0x85, r3 - shlli r3, 8, r3 - ori r3, 0x10, r3 - - pta wrong, tr0 - bne r2, r3, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/mextr2.cgs b/sim/testsuite/sim/sh64/media/mextr2.cgs deleted file mode 100644 index cf136be8176..00000000000 --- a/sim/testsuite/sim/sh64/media/mextr2.cgs +++ /dev/null @@ -1,67 +0,0 @@ -# sh testcase for mextr2 $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - # Put a distinguised bit pattern in R0. - movi 0x1020, r0 - shlli r0, 8, r0 - ori r0, 0x30, r0 - shlli r0, 8, r0 - ori r0, 0x40, r0 - shlli r0, 8, r0 - ori r0, 0x50, r0 - shlli r0, 8, r0 - ori r0, 0x60, r0 - shlli r0, 8, r0 - ori r0, 0x70, r0 - shlli r0, 8, r0 - ori r0, 0x80, r0 - - # Put another distinguished bit pattern in R1. - movi 0x1525, r1 - shlli r1, 8, r1 - ori r1, 0x35, r1 - shlli r1, 8, r1 - ori r1, 0x45, r1 - shlli r1, 8, r1 - ori r1, 0x55, r1 - shlli r1, 8, r1 - ori r1, 0x65, r1 - shlli r1, 8, r1 - ori r1, 0x75, r1 - shlli r1, 8, r1 - ori r1, 0x85, r1 - -mextr2: - mextr2 r0, r1, r2 - -check: - # Put the result in R3. - movi 0x3545, r3 - shlli r3, 8, r3 - ori r3, 0x55, r3 - shlli r3, 8, r3 - ori r3, 0x65, r3 - shlli r3, 8, r3 - ori r3, 0x75, r3 - shlli r3, 8, r3 - ori r3, 0x85, r3 - shlli r3, 8, r3 - ori r3, 0x10, r3 - shlli r3, 8, r3 - ori r3, 0x20, r3 - - pta wrong, tr0 - bne r2, r3, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/mextr3.cgs b/sim/testsuite/sim/sh64/media/mextr3.cgs deleted file mode 100644 index b8d60a447bc..00000000000 --- a/sim/testsuite/sim/sh64/media/mextr3.cgs +++ /dev/null @@ -1,67 +0,0 @@ -# sh testcase for mextr3 $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - # Put a distinguised bit pattern in R0. - movi 0x1020, r0 - shlli r0, 8, r0 - ori r0, 0x30, r0 - shlli r0, 8, r0 - ori r0, 0x40, r0 - shlli r0, 8, r0 - ori r0, 0x50, r0 - shlli r0, 8, r0 - ori r0, 0x60, r0 - shlli r0, 8, r0 - ori r0, 0x70, r0 - shlli r0, 8, r0 - ori r0, 0x80, r0 - - # Put another distinguished bit pattern in R1. - movi 0x1525, r1 - shlli r1, 8, r1 - ori r1, 0x35, r1 - shlli r1, 8, r1 - ori r1, 0x45, r1 - shlli r1, 8, r1 - ori r1, 0x55, r1 - shlli r1, 8, r1 - ori r1, 0x65, r1 - shlli r1, 8, r1 - ori r1, 0x75, r1 - shlli r1, 8, r1 - ori r1, 0x85, r1 - -mextr3: - mextr3 r0, r1, r2 - -check: - # Put the result in R3. - movi 0x4555, r3 - shlli r3, 8, r3 - ori r3, 0x65, r3 - shlli r3, 8, r3 - ori r3, 0x75, r3 - shlli r3, 8, r3 - ori r3, 0x85, r3 - shlli r3, 8, r3 - ori r3, 0x10, r3 - shlli r3, 8, r3 - ori r3, 0x20, r3 - shlli r3, 8, r3 - ori r3, 0x30, r3 - - pta wrong, tr0 - bne r2, r3, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/mextr4.cgs b/sim/testsuite/sim/sh64/media/mextr4.cgs deleted file mode 100644 index e9ebff9be7b..00000000000 --- a/sim/testsuite/sim/sh64/media/mextr4.cgs +++ /dev/null @@ -1,67 +0,0 @@ -# sh testcase for mextr4 $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - # Put a distinguised bit pattern in R0. - movi 0x1020, r0 - shlli r0, 8, r0 - ori r0, 0x30, r0 - shlli r0, 8, r0 - ori r0, 0x40, r0 - shlli r0, 8, r0 - ori r0, 0x50, r0 - shlli r0, 8, r0 - ori r0, 0x60, r0 - shlli r0, 8, r0 - ori r0, 0x70, r0 - shlli r0, 8, r0 - ori r0, 0x80, r0 - - # Put another distinguished bit pattern in R1. - movi 0x1525, r1 - shlli r1, 8, r1 - ori r1, 0x35, r1 - shlli r1, 8, r1 - ori r1, 0x45, r1 - shlli r1, 8, r1 - ori r1, 0x55, r1 - shlli r1, 8, r1 - ori r1, 0x65, r1 - shlli r1, 8, r1 - ori r1, 0x75, r1 - shlli r1, 8, r1 - ori r1, 0x85, r1 - -mextr4: - mextr4 r0, r1, r2 - -check: - # Put the result in R3. - movi 0x5565, r3 - shlli r3, 8, r3 - ori r3, 0x75, r3 - shlli r3, 8, r3 - ori r3, 0x85, r3 - shlli r3, 8, r3 - ori r3, 0x10, r3 - shlli r3, 8, r3 - ori r3, 0x20, r3 - shlli r3, 8, r3 - ori r3, 0x30, r3 - shlli r3, 8, r3 - ori r3, 0x40, r3 - - pta wrong, tr0 - bne r2, r3, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/mextr5.cgs b/sim/testsuite/sim/sh64/media/mextr5.cgs deleted file mode 100644 index c61a0c89f52..00000000000 --- a/sim/testsuite/sim/sh64/media/mextr5.cgs +++ /dev/null @@ -1,67 +0,0 @@ -# sh testcase for mextr5 $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - # Put a distinguised bit pattern in R0. - movi 0x1020, r0 - shlli r0, 8, r0 - ori r0, 0x30, r0 - shlli r0, 8, r0 - ori r0, 0x40, r0 - shlli r0, 8, r0 - ori r0, 0x50, r0 - shlli r0, 8, r0 - ori r0, 0x60, r0 - shlli r0, 8, r0 - ori r0, 0x70, r0 - shlli r0, 8, r0 - ori r0, 0x80, r0 - - # Put another distinguished bit pattern in R1. - movi 0x1525, r1 - shlli r1, 8, r1 - ori r1, 0x35, r1 - shlli r1, 8, r1 - ori r1, 0x45, r1 - shlli r1, 8, r1 - ori r1, 0x55, r1 - shlli r1, 8, r1 - ori r1, 0x65, r1 - shlli r1, 8, r1 - ori r1, 0x75, r1 - shlli r1, 8, r1 - ori r1, 0x85, r1 - -mextr5: - mextr5 r0, r1, r2 - -check: - # Put the result in R3. - movi 0x6575, r3 - shlli r3, 8, r3 - ori r3, 0x85, r3 - shlli r3, 8, r3 - ori r3, 0x10, r3 - shlli r3, 8, r3 - ori r3, 0x20, r3 - shlli r3, 8, r3 - ori r3, 0x30, r3 - shlli r3, 8, r3 - ori r3, 0x40, r3 - shlli r3, 8, r3 - ori r3, 0x50, r3 - - pta wrong, tr0 - bne r2, r3, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/mextr6.cgs b/sim/testsuite/sim/sh64/media/mextr6.cgs deleted file mode 100644 index 5c6c7f60c79..00000000000 --- a/sim/testsuite/sim/sh64/media/mextr6.cgs +++ /dev/null @@ -1,67 +0,0 @@ -# sh testcase for mextr6 $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - # Put a distinguised bit pattern in R0. - movi 0x1020, r0 - shlli r0, 8, r0 - ori r0, 0x30, r0 - shlli r0, 8, r0 - ori r0, 0x40, r0 - shlli r0, 8, r0 - ori r0, 0x50, r0 - shlli r0, 8, r0 - ori r0, 0x60, r0 - shlli r0, 8, r0 - ori r0, 0x70, r0 - shlli r0, 8, r0 - ori r0, 0x80, r0 - - # Put another distinguished bit pattern in R1. - movi 0x1525, r1 - shlli r1, 8, r1 - ori r1, 0x35, r1 - shlli r1, 8, r1 - ori r1, 0x45, r1 - shlli r1, 8, r1 - ori r1, 0x55, r1 - shlli r1, 8, r1 - ori r1, 0x65, r1 - shlli r1, 8, r1 - ori r1, 0x75, r1 - shlli r1, 8, r1 - ori r1, 0x85, r1 - -mextr6: - mextr6 r0, r1, r2 - -check: - # Put the result in R3. - movi 0x7585, r3 - shlli r3, 8, r3 - ori r3, 0x10, r3 - shlli r3, 8, r3 - ori r3, 0x20, r3 - shlli r3, 8, r3 - ori r3, 0x30, r3 - shlli r3, 8, r3 - ori r3, 0x40, r3 - shlli r3, 8, r3 - ori r3, 0x50, r3 - shlli r3, 8, r3 - ori r3, 0x60, r3 - - pta wrong, tr0 - bne r2, r3, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/mextr7.cgs b/sim/testsuite/sim/sh64/media/mextr7.cgs deleted file mode 100644 index e05ec7f9ab3..00000000000 --- a/sim/testsuite/sim/sh64/media/mextr7.cgs +++ /dev/null @@ -1,67 +0,0 @@ -# sh testcase for mextr7 $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - # Put a distinguised bit pattern in R0. - movi 0x1020, r0 - shlli r0, 8, r0 - ori r0, 0x30, r0 - shlli r0, 8, r0 - ori r0, 0x40, r0 - shlli r0, 8, r0 - ori r0, 0x50, r0 - shlli r0, 8, r0 - ori r0, 0x60, r0 - shlli r0, 8, r0 - ori r0, 0x70, r0 - shlli r0, 8, r0 - ori r0, 0x80, r0 - - # Put another distinguished bit pattern in R1. - movi 0x1525, r1 - shlli r1, 8, r1 - ori r1, 0x35, r1 - shlli r1, 8, r1 - ori r1, 0x45, r1 - shlli r1, 8, r1 - ori r1, 0x55, r1 - shlli r1, 8, r1 - ori r1, 0x65, r1 - shlli r1, 8, r1 - ori r1, 0x75, r1 - shlli r1, 8, r1 - ori r1, 0x85, r1 - -mextr7: - mextr7 r0, r1, r2 - -check: - # Put the result in R3. - movi 0x8510, r3 - shlli r3, 8, r3 - ori r3, 0x20, r3 - shlli r3, 8, r3 - ori r3, 0x30, r3 - shlli r3, 8, r3 - ori r3, 0x40, r3 - shlli r3, 8, r3 - ori r3, 0x50, r3 - shlli r3, 8, r3 - ori r3, 0x60, r3 - shlli r3, 8, r3 - ori r3, 0x70, r3 - - pta wrong, tr0 - bne r2, r3, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/mmacfxwl.cgs b/sim/testsuite/sim/sh64/media/mmacfxwl.cgs deleted file mode 100644 index dd2d9a41ae7..00000000000 --- a/sim/testsuite/sim/sh64/media/mmacfxwl.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mmacfx.wl $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mmacfxwl -mmacfxwl: - mmacfx.wl r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mmacnfx-wl.cgs b/sim/testsuite/sim/sh64/media/mmacnfx-wl.cgs deleted file mode 100644 index ba634d207a3..00000000000 --- a/sim/testsuite/sim/sh64/media/mmacnfx-wl.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mmacnfx.wl $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mmacnfx_wl -mmacnfx_wl: - mmacnfx.wl r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mmulfxl.cgs b/sim/testsuite/sim/sh64/media/mmulfxl.cgs deleted file mode 100644 index 7d2d1a63268..00000000000 --- a/sim/testsuite/sim/sh64/media/mmulfxl.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mmulfx.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mmulfxl -mmulfxl: - mmulfx.l r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mmulfxrpw.cgs b/sim/testsuite/sim/sh64/media/mmulfxrpw.cgs deleted file mode 100644 index 13fdcc71d0e..00000000000 --- a/sim/testsuite/sim/sh64/media/mmulfxrpw.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mmulfxrp.w $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mmulfxrpw -mmulfxrpw: - mmulfxrp.w r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mmulfxw.cgs b/sim/testsuite/sim/sh64/media/mmulfxw.cgs deleted file mode 100644 index e2a66a7c11d..00000000000 --- a/sim/testsuite/sim/sh64/media/mmulfxw.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mmulfx.w $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mmulfxw -mmulfxw: - mmulfx.w r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mmulhiwl.cgs b/sim/testsuite/sim/sh64/media/mmulhiwl.cgs deleted file mode 100644 index 1a41ac59286..00000000000 --- a/sim/testsuite/sim/sh64/media/mmulhiwl.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mmulhi.wl $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mmulhiwl -mmulhiwl: - mmulhi.wl r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mmull.cgs b/sim/testsuite/sim/sh64/media/mmull.cgs deleted file mode 100644 index b3ed9df3f35..00000000000 --- a/sim/testsuite/sim/sh64/media/mmull.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mmul.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mmull -mmull: - mmul.l r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mmullowl.cgs b/sim/testsuite/sim/sh64/media/mmullowl.cgs deleted file mode 100644 index b50ccfcb5dd..00000000000 --- a/sim/testsuite/sim/sh64/media/mmullowl.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mmullo.wl $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mmullowl -mmullowl: - mmullo.wl r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mmulsumwq.cgs b/sim/testsuite/sim/sh64/media/mmulsumwq.cgs deleted file mode 100644 index 344710b0e98..00000000000 --- a/sim/testsuite/sim/sh64/media/mmulsumwq.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mmulsum.wq $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mmulsumwq -mmulsumwq: - mmulsum.wq r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mmulw.cgs b/sim/testsuite/sim/sh64/media/mmulw.cgs deleted file mode 100644 index 675c620fadc..00000000000 --- a/sim/testsuite/sim/sh64/media/mmulw.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mmul.w $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mmulw -mmulw: - mmul.w r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/movi.cgs b/sim/testsuite/sim/sh64/media/movi.cgs deleted file mode 100644 index a01bcae84df..00000000000 --- a/sim/testsuite/sim/sh64/media/movi.cgs +++ /dev/null @@ -1,29 +0,0 @@ -# sh testcase for movi $imm16, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -movi0: - movi 0, r0 - bnei r0, 0, tr0 -movi1: - movi 1, r0 - bnei r0, 1, tr0 -movi2: - movi 23, r0 - bnei r0, 23, tr0 -movn: - movi -1, r0 - addi r0, 1, r0 - bnei r0, 0, tr0 - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/mpermw.cgs b/sim/testsuite/sim/sh64/media/mpermw.cgs deleted file mode 100644 index 3b6741e8107..00000000000 --- a/sim/testsuite/sim/sh64/media/mpermw.cgs +++ /dev/null @@ -1,51 +0,0 @@ -# sh testcase for mperm.w $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - movi 27, r1 - movi 0x1020, r0 - shlli r0, 8, r0 - ori r0, 0x30, r0 - shlli r0, 8, r0 - ori r0, 0x40, r0 - shlli r0, 8, r0 - ori r0, 0x50, r0 - shlli r0, 8, r0 - ori r0, 0x60, r0 - shlli r0, 8, r0 - ori r0, 0x70, r0 - shlli r0, 8, r0 - ori r0, 0x80, r0 - -mpermw: - mperm.w r0, r1, r2 - -check: - # Expect 0x7080506030401020. - movi 0x7080, r0 - shlli r0, 8, r0 - ori r0, 0x50, r0 - shlli r0, 8, r0 - ori r0, 0x60, r0 - shlli r0, 8, r0 - ori r0, 0x30, r0 - shlli r0, 8, r0 - ori r0, 0x40, r0 - shlli r0, 8, r0 - ori r0, 0x10, r0 - shlli r0, 8, r0 - ori r0, 0x20, r0 - - bne r0, r2, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/msadubq.cgs b/sim/testsuite/sim/sh64/media/msadubq.cgs deleted file mode 100644 index 4361883b870..00000000000 --- a/sim/testsuite/sim/sh64/media/msadubq.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for msad.ubq $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global msadubq -msadubq: - msad.ubq r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mshaldsl.cgs b/sim/testsuite/sim/sh64/media/mshaldsl.cgs deleted file mode 100644 index 1dd86ec6bb6..00000000000 --- a/sim/testsuite/sim/sh64/media/mshaldsl.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mshalds.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mshaldsl -mshaldsl: - mshalds.l r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mshaldsw.cgs b/sim/testsuite/sim/sh64/media/mshaldsw.cgs deleted file mode 100644 index 7ab6797e9a6..00000000000 --- a/sim/testsuite/sim/sh64/media/mshaldsw.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mshalds.w $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mshaldsw -mshaldsw: - mshalds.w r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mshardl.cgs b/sim/testsuite/sim/sh64/media/mshardl.cgs deleted file mode 100644 index 0dc102e337a..00000000000 --- a/sim/testsuite/sim/sh64/media/mshardl.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mshard.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mshardl -mshardl: - mshard.l r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mshardsq.cgs b/sim/testsuite/sim/sh64/media/mshardsq.cgs deleted file mode 100644 index 5f29afb8b1b..00000000000 --- a/sim/testsuite/sim/sh64/media/mshardsq.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mshards.q $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mshardsq -mshardsq: - mshards.q r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mshardw.cgs b/sim/testsuite/sim/sh64/media/mshardw.cgs deleted file mode 100644 index ecc7004febd..00000000000 --- a/sim/testsuite/sim/sh64/media/mshardw.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mshard.w $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mshardw -mshardw: - mshard.w r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mshfhib.cgs b/sim/testsuite/sim/sh64/media/mshfhib.cgs deleted file mode 100644 index b7b245e79ae..00000000000 --- a/sim/testsuite/sim/sh64/media/mshfhib.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mshfhi.b $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mshfhib -mshfhib: - mshfhi.b r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mshfhil.cgs b/sim/testsuite/sim/sh64/media/mshfhil.cgs deleted file mode 100644 index 2fab7ae1fd9..00000000000 --- a/sim/testsuite/sim/sh64/media/mshfhil.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mshfhi.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mshfhil -mshfhil: - mshfhi.l r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mshfhiw.cgs b/sim/testsuite/sim/sh64/media/mshfhiw.cgs deleted file mode 100644 index 03111413cf1..00000000000 --- a/sim/testsuite/sim/sh64/media/mshfhiw.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mshfhi.w $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mshfhiw -mshfhiw: - mshfhi.w r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mshflob.cgs b/sim/testsuite/sim/sh64/media/mshflob.cgs deleted file mode 100644 index 400e81a0598..00000000000 --- a/sim/testsuite/sim/sh64/media/mshflob.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mshflo.b $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mshflob -mshflob: - mshflo.b r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mshflol.cgs b/sim/testsuite/sim/sh64/media/mshflol.cgs deleted file mode 100644 index 2fbdf894e60..00000000000 --- a/sim/testsuite/sim/sh64/media/mshflol.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mshflo.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mshflol -mshflol: - mshflo.l r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mshflow.cgs b/sim/testsuite/sim/sh64/media/mshflow.cgs deleted file mode 100644 index 542eb042c52..00000000000 --- a/sim/testsuite/sim/sh64/media/mshflow.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mshflo.w $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mshflow -mshflow: - mshflo.w r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mshlldl.cgs b/sim/testsuite/sim/sh64/media/mshlldl.cgs deleted file mode 100644 index 2a17c33002e..00000000000 --- a/sim/testsuite/sim/sh64/media/mshlldl.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mshlld.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mshlldl -mshlldl: - mshlld.l r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mshlldw.cgs b/sim/testsuite/sim/sh64/media/mshlldw.cgs deleted file mode 100644 index e4afe3d732a..00000000000 --- a/sim/testsuite/sim/sh64/media/mshlldw.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mshlld.w $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mshlldw -mshlldw: - mshlld.w r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mshlrdl.cgs b/sim/testsuite/sim/sh64/media/mshlrdl.cgs deleted file mode 100644 index 89e70772b7f..00000000000 --- a/sim/testsuite/sim/sh64/media/mshlrdl.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mshlrd.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mshlrdl -mshlrdl: - mshlrd.l r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mshlrdw.cgs b/sim/testsuite/sim/sh64/media/mshlrdw.cgs deleted file mode 100644 index 4cbf2807f9c..00000000000 --- a/sim/testsuite/sim/sh64/media/mshlrdw.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for mshlrd.w $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mshlrdw -mshlrdw: - mshlrd.w r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/msubl.cgs b/sim/testsuite/sim/sh64/media/msubl.cgs deleted file mode 100644 index 87151fad728..00000000000 --- a/sim/testsuite/sim/sh64/media/msubl.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for msub.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global msubl -msubl: - msub.l r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/msubsl.cgs b/sim/testsuite/sim/sh64/media/msubsl.cgs deleted file mode 100644 index 014422ed8f3..00000000000 --- a/sim/testsuite/sim/sh64/media/msubsl.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for msubs.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global msubsl -msubsl: - msubs.l r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/msubsub.cgs b/sim/testsuite/sim/sh64/media/msubsub.cgs deleted file mode 100644 index c92c77ee72e..00000000000 --- a/sim/testsuite/sim/sh64/media/msubsub.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for msubs.ub $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global msubsub -msubsub: - msubs.ub r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/msubsw.cgs b/sim/testsuite/sim/sh64/media/msubsw.cgs deleted file mode 100644 index 83b76a1b4b3..00000000000 --- a/sim/testsuite/sim/sh64/media/msubsw.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for msubs.w $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global msubsw -msubsw: - msubs.w r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/msubw.cgs b/sim/testsuite/sim/sh64/media/msubw.cgs deleted file mode 100644 index 9d5e639f240..00000000000 --- a/sim/testsuite/sim/sh64/media/msubw.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for msub.w $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global msubw -msubw: - msub.w r0, r0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/mulsl.cgs b/sim/testsuite/sim/sh64/media/mulsl.cgs deleted file mode 100644 index d65c80cadf2..00000000000 --- a/sim/testsuite/sim/sh64/media/mulsl.cgs +++ /dev/null @@ -1,54 +0,0 @@ -# sh testcase for muls.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mulsl -init: - pta wrong, tr0 - -mulsl1: - movi 0, r0 - muls.l r0, r0, r1 - bnei r1, 0, tr0 - -mulsl2: - movi 0, r0 - movi 1, r1 - muls.l r0, r1, r2 - bnei r2, 0, tr0 - -mulsl3: - movi 1, r0 - movi 0, r1 - muls.l r0, r1, r2 - bnei r2, 0, tr0 - -mulsl4: - movi 1, r0 - movi 1, r1 - muls.l r0, r1, r2 - bnei r2, 1, tr0 - -mulsl5: - movi 2, r0 - movi 9, r1 - muls.l r0, r1, r2 - bnei r2, 18, tr0 - -mulsl6: - movi 2, r0 - movi -9, r1 - muls.l r0, r1, r2 - bnei r2, -18, tr0 - -okay: - pass - -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/media/mulul.cgs b/sim/testsuite/sim/sh64/media/mulul.cgs deleted file mode 100644 index b795cf79ec0..00000000000 --- a/sim/testsuite/sim/sh64/media/mulul.cgs +++ /dev/null @@ -1,54 +0,0 @@ -# sh testcase for mulu.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global mulul -init: - pta wrong, tr0 - -mulul1: - movi 0, r0 - mulu.l r0, r0, r1 - bnei r1, 0, tr0 - -mulul2: - movi 0, r0 - movi 1, r1 - mulu.l r0, r1, r2 - bnei r2, 0, tr0 - -mulul3: - movi 1, r0 - movi 0, r1 - mulu.l r0, r1, r2 - bnei r2, 0, tr0 - -mulul4: - movi 1, r0 - movi 1, r1 - mulu.l r0, r1, r2 - bnei r2, 1, tr0 - -mulul5: - movi 2, r0 - movi 9, r1 - mulu.l r0, r1, r2 - bnei r2, 18, tr0 - -mulul6: - movi 2, r0 - movi -9, r1 - mulu.l r0, r1, r2 - beqi r2, -18, tr0 - -okay: - pass - -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/media/nop.cgs b/sim/testsuite/sim/sh64/media/nop.cgs deleted file mode 100644 index a0e57530542..00000000000 --- a/sim/testsuite/sim/sh64/media/nop.cgs +++ /dev/null @@ -1,10 +0,0 @@ -# sh testcase for nop -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - nop - pass diff --git a/sim/testsuite/sim/sh64/media/nsb.cgs b/sim/testsuite/sim/sh64/media/nsb.cgs deleted file mode 100644 index 8b3cffef4a8..00000000000 --- a/sim/testsuite/sim/sh64/media/nsb.cgs +++ /dev/null @@ -1,66 +0,0 @@ -# sh testcase for nsb $rm, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -nsb0: - movi 0, r0 - nsb r0, r1 -check0: - movi 63, r4 - bne r1, r4, tr0 - -nsb1: - # set up a loop target reg. - pta again1, tr1 - # r4 holds the loop count. - movi 62, r4 - movi 1, r0 -again1: - nsb r0, r1 - bne r1, r4, tr0 - # okay? go around again. - shlli r0, 1, r0 - addi r4, -1, r4 - bnei r4, 0, tr1 - -nsb2: - # set up a loop target reg. - pta again2, tr1 - # r4 holds the loop count. - movi 63, r4 - movi -1, r0 -again2: - nsb r0, r1 - bne r1, r4, tr0 - # okay? go around again. - shlli r0, 1, r0 - addi r4, -1, r4 - bnei r4, 0, tr1 - -nsb3: - movi 1, r0 - shlli r0, 63, r0 - nsb r0, r1 -check3: - movi 0, r4 - bne r1, r4, tr0 - -nsb4: - movi 7, r0 - shlli r0, 61, r0 - nsb r0, r1 -check4: - movi 2, r4 - bne r1, r4, tr0 - -okay: - pass -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/ocbi.cgs b/sim/testsuite/sim/sh64/media/ocbi.cgs deleted file mode 100644 index b210216e3db..00000000000 --- a/sim/testsuite/sim/sh64/media/ocbi.cgs +++ /dev/null @@ -1,10 +0,0 @@ -# sh testcase for ocbi $rm, $disp6x32 -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - ocbi r0, 0 - pass diff --git a/sim/testsuite/sim/sh64/media/ocbp.cgs b/sim/testsuite/sim/sh64/media/ocbp.cgs deleted file mode 100644 index 9158c6f4518..00000000000 --- a/sim/testsuite/sim/sh64/media/ocbp.cgs +++ /dev/null @@ -1,10 +0,0 @@ -# sh testcase for ocbp $rm, $disp6x32 -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - ocbp r0, 0 - pass diff --git a/sim/testsuite/sim/sh64/media/ocbwb.cgs b/sim/testsuite/sim/sh64/media/ocbwb.cgs deleted file mode 100644 index 6addabcf461..00000000000 --- a/sim/testsuite/sim/sh64/media/ocbwb.cgs +++ /dev/null @@ -1,10 +0,0 @@ -# sh testcase for ocbwb $rm, $disp6x32 -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - ocbwb r0, 0 - pass diff --git a/sim/testsuite/sim/sh64/media/or.cgs b/sim/testsuite/sim/sh64/media/or.cgs deleted file mode 100644 index e06759225ba..00000000000 --- a/sim/testsuite/sim/sh64/media/or.cgs +++ /dev/null @@ -1,44 +0,0 @@ -# sh testcase for or $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -or1: - movi 0, r0 - or r0, r0, r1 - bnei r1, 0, tr0 - -or2: - movi 0, r0 - movi 1, r1 - or r0, r1, r2 - bnei r2, 1, tr0 - -or3: - movi 1, r0 - movi 0, r1 - or r0, r1, r2 - bnei r2, 1, tr0 - -or4: - movi 1, r0 - or r0, r0, r1 - bnei r1, 1, tr0 - -or5: - movi 1, r0 - shlli r0, 63, r0 - movi 1, r1 - or r0, r1, r2 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/ori.cgs b/sim/testsuite/sim/sh64/media/ori.cgs deleted file mode 100644 index 7b2554227da..00000000000 --- a/sim/testsuite/sim/sh64/media/ori.cgs +++ /dev/null @@ -1,41 +0,0 @@ -# sh testcase for ori $rm, $imm10, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -or1: - movi 0, r0 - ori r0, 0, r1 - bnei r1, 0, tr0 - -or2: - movi 0, r0 - ori r0, 1, r2 - bnei r2, 1, tr0 - -or3: - movi 1, r0 - ori r0, 0, r2 - bnei r2, 1, tr0 - -or4: - movi 1, r0 - ori r0, 1, r1 - bnei r1, 1, tr0 - -or5: - movi 1, r0 - shlli r0, 63, r0 - ori r0, 1, r2 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/prefi.cgs b/sim/testsuite/sim/sh64/media/prefi.cgs deleted file mode 100644 index 68d7bfe29a4..00000000000 --- a/sim/testsuite/sim/sh64/media/prefi.cgs +++ /dev/null @@ -1,10 +0,0 @@ -# sh testcase for prefi $rm, $disp6x32 -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - prefi r0, 0 - pass diff --git a/sim/testsuite/sim/sh64/media/pta.cgs b/sim/testsuite/sim/sh64/media/pta.cgs deleted file mode 100644 index 9f6484a8d4c..00000000000 --- a/sim/testsuite/sim/sh64/media/pta.cgs +++ /dev/null @@ -1,26 +0,0 @@ -# sh testcase for pta$likely $disp16, $tra -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -pta0: - pta foo, tr0 -pta1: - pta/l bar, tr1 -pta2: - pta/u baz, tr2 - movi 0, r0 - bnei r0, 1, tr2 - fail - -foo: -bar: -baz: - pass - fail - fail - fail - fail diff --git a/sim/testsuite/sim/sh64/media/ptabs.cgs b/sim/testsuite/sim/sh64/media/ptabs.cgs deleted file mode 100644 index 0c01f838eb8..00000000000 --- a/sim/testsuite/sim/sh64/media/ptabs.cgs +++ /dev/null @@ -1,25 +0,0 @@ -# sh testcase for ptabs$likely $rn, $tra -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global ptabs -ptabs: - movi 16, r0 - shlli r0, 8, r0 - # Add one to stay in SHmedia mode. - addi r0, 29, r0 - ptabs r0, tr0 - - # Now jump. - beqi r63, 0, tr0 - -wrong: - fail - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/ptb.cgs b/sim/testsuite/sim/sh64/media/ptb.cgs deleted file mode 100644 index 129d6260439..00000000000 --- a/sim/testsuite/sim/sh64/media/ptb.cgs +++ /dev/null @@ -1,29 +0,0 @@ -# sh testcase for ptb$likely $disp16, $tra -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -ptb0: - ptb foo, tr0 -ptb: - ptb/l bar, tr1 -ptb2: - ptb/u baz, tr2 - movi 0, r0 - bnei r0, 1, tr2 - fail - -.mode SHcompact - -foo: -bar: -baz: - trapa #253 - trapa #254 - trapa #254 - trapa #254 - trapa #254 diff --git a/sim/testsuite/sim/sh64/media/ptrel.cgs b/sim/testsuite/sim/sh64/media/ptrel.cgs deleted file mode 100644 index 7e5f19b1b9c..00000000000 --- a/sim/testsuite/sim/sh64/media/ptrel.cgs +++ /dev/null @@ -1,22 +0,0 @@ -# sh testcase for ptrel$likely $rn, $tra -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - # Add one to stay in SHmedia mode. - movi 53, r0 - ptrel r0, tr0 - movi 0, r0 - # Always branch. - bnei r0, 1, tr0 - fail - fail - fail - fail - fail - pass - fail - fail diff --git a/sim/testsuite/sim/sh64/media/putcfg.cgs b/sim/testsuite/sim/sh64/media/putcfg.cgs deleted file mode 100644 index 85385754a48..00000000000 --- a/sim/testsuite/sim/sh64/media/putcfg.cgs +++ /dev/null @@ -1,10 +0,0 @@ -# sh testcase for putcfg $rm, $disp6, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - putcfg r0, 0, r0 - pass diff --git a/sim/testsuite/sim/sh64/media/putcon.cgs b/sim/testsuite/sim/sh64/media/putcon.cgs deleted file mode 100644 index 39dfc036280..00000000000 --- a/sim/testsuite/sim/sh64/media/putcon.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# sh testcase for putcon $rm, $crj -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -putcon1: - movi 22, r0 - putcon r0, cr0 - getcon cr0, r1 - bne r0, r1, tr0 - -putcon2: - movi 12, r0 - shlli r0, 35, r0 - putcon r0, cr20 - getcon cr20, r20 - bne r0, r20, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/rte.cgs b/sim/testsuite/sim/sh64/media/rte.cgs deleted file mode 100644 index e80f08541cc..00000000000 --- a/sim/testsuite/sim/sh64/media/rte.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# sh testcase for rte -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - # Unimplemented. - rte - pass diff --git a/sim/testsuite/sim/sh64/media/shard.cgs b/sim/testsuite/sim/sh64/media/shard.cgs deleted file mode 100644 index 029e52902a2..00000000000 --- a/sim/testsuite/sim/sh64/media/shard.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# sh testcase for shard $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -shard1: - movi 128, r0 - movi 3, r1 - shard r0, r1, r2 - bnei r2, 16, tr0 - -shard2: - movi -4, r0 - movi 2, r1 - shard r0, r1, r2 - addi r2, 1, r2 - bnei r2, 0, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/shardl.cgs b/sim/testsuite/sim/sh64/media/shardl.cgs deleted file mode 100644 index d9acaa54f69..00000000000 --- a/sim/testsuite/sim/sh64/media/shardl.cgs +++ /dev/null @@ -1,45 +0,0 @@ -# sh testcase for shard.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -shardl1: - movi 0x1020, r0 - shlli r0, 8, r0 - ori r0, 0x30, r0 - shlli r0, 8, r0 - ori r0, 0x40, r0 - shlli r0, 8, r0 - ori r0, 0x50, r0 - shlli r0, 8, r0 - ori r0, 0x60, r0 - shlli r0, 8, r0 - ori r0, 0x70, r0 - shlli r0, 8, r0 - ori r0, 0x80, r0 - - movi 1, r1 - shard.l r0, r1, r0 - shard.l r0, r1, r0 - shard.l r0, r1, r0 - shard.l r0, r1, r0 - shard.l r0, r1, r0 - shard.l r0, r1, r0 - shard.l r0, r1, r0 - shard.l r0, r1, r0 - movi 20, r1 - shard.l r0, r1, r0 - bnei r0, 5, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/shari.cgs b/sim/testsuite/sim/sh64/media/shari.cgs deleted file mode 100644 index 3d3a650fb0c..00000000000 --- a/sim/testsuite/sim/sh64/media/shari.cgs +++ /dev/null @@ -1,28 +0,0 @@ -# sh testcase for shari $rm, $imm, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -shari1: - movi 128, r0 - shari r0, 3, r2 - bnei r2, 16, tr0 - -shari2: - movi -4, r0 - shari r0, 2, r2 - addi r2, 1, r2 - bnei r2, 0, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/sharil.cgs b/sim/testsuite/sim/sh64/media/sharil.cgs deleted file mode 100644 index be946e0c84d..00000000000 --- a/sim/testsuite/sim/sh64/media/sharil.cgs +++ /dev/null @@ -1,45 +0,0 @@ -# sh testcase for shari.l $rm, $imm6, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -sharil1: - movi 0x1020, r0 - shlli r0, 8, r0 - ori r0, 0x30, r0 - shlli r0, 8, r0 - ori r0, 0x40, r0 - shlli r0, 8, r0 - ori r0, 0x50, r0 - shlli r0, 8, r0 - ori r0, 0x60, r0 - shlli r0, 8, r0 - ori r0, 0x70, r0 - shlli r0, 8, r0 - ori r0, 0x80, r0 - - movi 1, r1 - shari.l r0, 1, r0 - shari.l r0, 1, r0 - shari.l r0, 1, r0 - shari.l r0, 1, r0 - shari.l r0, 1, r0 - shari.l r0, 1, r0 - shari.l r0, 1, r0 - shari.l r0, 1, r0 - shari.l r0, 20, r0 - bnei r0, 5, tr0 - -okay: - pass - -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/media/shlld.cgs b/sim/testsuite/sim/sh64/media/shlld.cgs deleted file mode 100644 index 05d2da4cd68..00000000000 --- a/sim/testsuite/sim/sh64/media/shlld.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# sh testcase for shlld $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -shlld1: - movi 1, r0 - movi 5, r1 - shlld r0, r1, r2 - movi 32, r7 - bne r2, r7, tr0 - -shlld2: - movi 2, r1 - shlld r2, r1, r3 - movi 128, r7 - bne r3, r7, tr0 - -shlld3: - movi 32, r1 - shlld r0, r1, r7 - shlld r7, r1, r2 - bnei r2, 0, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/shlldl.cgs b/sim/testsuite/sim/sh64/media/shlldl.cgs deleted file mode 100644 index 3d37f53a76b..00000000000 --- a/sim/testsuite/sim/sh64/media/shlldl.cgs +++ /dev/null @@ -1,34 +0,0 @@ -# sh testcase for shlld.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -shlldl1: - movi 1, r0 - shlli r0, 32, r0 - ori r0, 1, r0 - movi 1, r1 - shlli r1, 7, r1 - ori r1, 3, r1 - - shlld.l r0, r1, r2 - -check1: - bnei r2, 8, tr0 - -shlldl2: - movi 1, r0 - movi 31, r1 - shlld.l r0, r1, r2 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/shlli.cgs b/sim/testsuite/sim/sh64/media/shlli.cgs deleted file mode 100644 index 9ab331c0930..00000000000 --- a/sim/testsuite/sim/sh64/media/shlli.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# sh testcase for shlli $rm, $imm6, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -shlli: - movi 1, r0 - shlli r0, 3, r0 - bnei r0, 8, tr0 - -shlli2: - shlli r0, 3, r0 - -shlli3: - # Shift all bits out of sight. - shlli r0, 63, r0 - bnei r0, 0, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/shllil.cgs b/sim/testsuite/sim/sh64/media/shllil.cgs deleted file mode 100644 index 347acd64084..00000000000 --- a/sim/testsuite/sim/sh64/media/shllil.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for shlli.l $rm, $imm6, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global shllil -shllil: - shlli.l r0, 0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/shlrd.cgs b/sim/testsuite/sim/sh64/media/shlrd.cgs deleted file mode 100644 index 56f10bf1c0e..00000000000 --- a/sim/testsuite/sim/sh64/media/shlrd.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# sh testcase for shlrd $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -shlrd1: - movi 128, r0 - movi 3, r1 - shlrd r0, r1, r2 - bnei r2, 16, tr0 - -shlrd2: - movi -4, r0 - movi 2, r1 - shlrd r0, r1, r2 - addi r2, 1, r2 - beqi r2, 0, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/shlrdl.cgs b/sim/testsuite/sim/sh64/media/shlrdl.cgs deleted file mode 100644 index 32b20c0a3cd..00000000000 --- a/sim/testsuite/sim/sh64/media/shlrdl.cgs +++ /dev/null @@ -1,37 +0,0 @@ -# sh testcase for shlrd.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -shlrdl1: - movi 1, r0 - shlli r0, 32, r0 - ori r0, 8, r0 - movi 1, r1 - shlli r1, 7, r1 - ori r1, 3, r1 - - shlrd.l r0, r1, r2 - -check1: - bnei r2, 1, tr0 - -shlrdl2: - movi 1, r0 - shlli r0, 31, r0 - movi 31, r1 - shlld.l r0, r1, r2 - bnei r2, 0, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/shlri.cgs b/sim/testsuite/sim/sh64/media/shlri.cgs deleted file mode 100644 index 488cac9aec8..00000000000 --- a/sim/testsuite/sim/sh64/media/shlri.cgs +++ /dev/null @@ -1,28 +0,0 @@ -# sh testcase for shlri $rm, $imm, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -shlri1: - movi 128, r0 - shlri r0, 3, r2 - bnei r2, 16, tr0 - -shlri2: - movi -4, r0 - shlri r0, 2, r2 - addi r2, 1, r2 - beqi r2, 0, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/shlril.cgs b/sim/testsuite/sim/sh64/media/shlril.cgs deleted file mode 100644 index bb1b2a6eaf0..00000000000 --- a/sim/testsuite/sim/sh64/media/shlril.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for shlri.l $rm, $imm6, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global shlril -shlril: - shlri.l r0, 0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/shori.cgs b/sim/testsuite/sim/sh64/media/shori.cgs deleted file mode 100644 index 5f02b7d2c5f..00000000000 --- a/sim/testsuite/sim/sh64/media/shori.cgs +++ /dev/null @@ -1,35 +0,0 @@ -# sh testcase for shori $imm16, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -shori1: - movi 1, r0 - shori 7, r0 - # check it. - andi r0, 15, r7 - bnei r7, 7, tr0 - shlri r0, 16, r0 - bnei r0, 1, tr0 - -shori2: - # Test for zero extension bug reported by - # Alexandre Oliva . - movi 0, r0 - shori 65535, r0 - # check it. - movi 0xffff, r1 - bne r0, r1, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/sleep.cgs b/sim/testsuite/sim/sh64/media/sleep.cgs deleted file mode 100644 index b4c35ee8f96..00000000000 --- a/sim/testsuite/sim/sh64/media/sleep.cgs +++ /dev/null @@ -1,10 +0,0 @@ -# sh testcase for sleep -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - sleep - pass diff --git a/sim/testsuite/sim/sh64/media/stb.cgs b/sim/testsuite/sim/sh64/media/stb.cgs deleted file mode 100644 index 09de47b14a9..00000000000 --- a/sim/testsuite/sim/sh64/media/stb.cgs +++ /dev/null @@ -1,26 +0,0 @@ -# sh testcase for st.b $rm, $disp10, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - movi -1, r7 - xori r7, 13, r7 - movi 40, r0 - shlli r0, 8, r0 - -stb1: - st.b r0, 0, r7 - -stb2: - st.b r0, 1, r7 - -stb3: - st.b r0, -1, r7 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/sthil.cgs b/sim/testsuite/sim/sh64/media/sthil.cgs deleted file mode 100644 index cfee28444f8..00000000000 --- a/sim/testsuite/sim/sh64/media/sthil.cgs +++ /dev/null @@ -1,55 +0,0 @@ -# sh testcase for sthi.l $rm, $disp6, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - - movi 40, r0 - shlli r0, 8, r0 - - movi 0x1020, r1 - shlli r1, 8, r1 - addi r1, 0x30, r1 - shlli r1, 8, r1 - addi r1, 0x40, r1 - shlli r1, 8, r1 - addi r1, 0x50, r1 - shlli r1, 8, r1 - addi r1, 0x60, r1 - shlli r1, 8, r1 - addi r1, 0x70, r1 - shlli r1, 8, r1 - addi r1, 0x80, r1 - -sthil1: - sthi.l r0, 0, r1 - -sthil2: - sthi.l r0, 1, r1 - -sthil3: - sthi.l r0, 2, r1 - -sthil4: - sthi.l r0, 3, r1 - -sthil5: - sthi.l r0, -1, r1 - -sthil6: - sthi.l r0, -2, r1 - -sthil7: - sthi.l r0, -3, r1 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/sthiq.cgs b/sim/testsuite/sim/sh64/media/sthiq.cgs deleted file mode 100644 index 6310d43e5ad..00000000000 --- a/sim/testsuite/sim/sh64/media/sthiq.cgs +++ /dev/null @@ -1,79 +0,0 @@ -# sh testcase for sthi.q $rm, $disp6, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - - movi 40, r0 - shlli r0, 8, r0 - - movi 0x1020, r1 - shlli r1, 8, r1 - addi r1, 0x30, r1 - shlli r1, 8, r1 - addi r1, 0x40, r1 - shlli r1, 8, r1 - addi r1, 0x50, r1 - shlli r1, 8, r1 - addi r1, 0x60, r1 - shlli r1, 8, r1 - addi r1, 0x70, r1 - shlli r1, 8, r1 - addi r1, 0x80, r1 - -sthiq1: - sthi.q r0, 0, r1 - -sthiq2: - sthi.q r0, 1, r1 - -sthiq3: - sthi.q r0, 2, r1 - -sthiq4: - sthi.q r0, 3, r1 - -sthiq5: - sthi.q r0, 4, r1 - -sthiq6: - sthi.q r0, 5, r1 - -sthiq7: - sthi.q r0, 6, r1 - -sthiq8: - sthi.q r0, 7, r1 - -sthiq9: - sthi.q r0, -1, r1 - -sthiq10: - sthi.q r0, -2, r1 - -sthiq11: - sthi.q r0, -3, r1 - -sthiq12: - sthi.q r0, -4, r1 - -sthiq13: - sthi.q r0, -5, r1 - -sthiq14: - sthi.q r0, -6, r1 - -sthiq15: - sthi.q r0, -7, r1 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/stl.cgs b/sim/testsuite/sim/sh64/media/stl.cgs deleted file mode 100644 index 8737e354c5b..00000000000 --- a/sim/testsuite/sim/sh64/media/stl.cgs +++ /dev/null @@ -1,26 +0,0 @@ -# sh testcase for st.l $rm, $disp10, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - movi -1, r7 - xori r7, 13, r7 - movi 40, r0 - shlli r0, 8, r0 - -stl1: - st.l r0, 0, r7 - -stl2: - st.l r0, 4, r7 - -stl3: - st.l r0, -4, r7 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/stlol.cgs b/sim/testsuite/sim/sh64/media/stlol.cgs deleted file mode 100644 index f2d90552509..00000000000 --- a/sim/testsuite/sim/sh64/media/stlol.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for stlo.l $rm, $disp6, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global stlol -stlol: - stlo.l r0, 0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/stloq.cgs b/sim/testsuite/sim/sh64/media/stloq.cgs deleted file mode 100644 index 35c84c255cc..00000000000 --- a/sim/testsuite/sim/sh64/media/stloq.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# sh testcase for stlo.q $rm, $disp6, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - - .global stloq -stloq: - stlo.q r0, 0, r0 - - pass diff --git a/sim/testsuite/sim/sh64/media/stq.cgs b/sim/testsuite/sim/sh64/media/stq.cgs deleted file mode 100644 index e1af7956b84..00000000000 --- a/sim/testsuite/sim/sh64/media/stq.cgs +++ /dev/null @@ -1,26 +0,0 @@ -# sh testcase for st.q $rm, $disp10, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - movi -1, r7 - xori r7, 13, r7 - movi 40, r0 - shlli r0, 8, r0 - -stq1: - st.q r0, 0, r7 - -stq2: - st.q r0, 8, r7 - -stq3: - st.q r0, -8, r7 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/stw.cgs b/sim/testsuite/sim/sh64/media/stw.cgs deleted file mode 100644 index 2446aa62795..00000000000 --- a/sim/testsuite/sim/sh64/media/stw.cgs +++ /dev/null @@ -1,26 +0,0 @@ -# sh testcase for st.q $rm, $disp10, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - movi -1, r7 - xori r7, 13, r7 - movi 40, r0 - shlli r0, 8, r0 - -stw1: - st.w r0, 0, r7 - -stw2: - st.w r0, 2, r7 - -stw3: - st.w r0, -2, r7 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/stxb.cgs b/sim/testsuite/sim/sh64/media/stxb.cgs deleted file mode 100644 index 8ab2ae31d23..00000000000 --- a/sim/testsuite/sim/sh64/media/stxb.cgs +++ /dev/null @@ -1,29 +0,0 @@ -# sh testcase for stx.b $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - movi -1, r7 - xori r7, 13, r7 - movi 40, r0 - shlli r0, 8, r0 - -stxb1: - movi 0, r1 - stx.b r0, r1, r7 - -stxb2: - movi 1, r1 - stx.b r0, r1, r7 - -stxb3: - movi -1, r1 - stx.b r0, r1, r7 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/stxl.cgs b/sim/testsuite/sim/sh64/media/stxl.cgs deleted file mode 100644 index 8ed2e366ab3..00000000000 --- a/sim/testsuite/sim/sh64/media/stxl.cgs +++ /dev/null @@ -1,29 +0,0 @@ -# sh testcase for stx.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - movi -1, r7 - xori r7, 13, r7 - movi 40, r0 - shlli r0, 8, r0 - -stxl1: - movi 0, r1 - stx.l r0, r1, r7 - -stxl2: - movi 4, r1 - stx.l r0, r1, r7 - -stxl3: - movi -4, r1 - stx.l r0, r1, r7 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/stxq.cgs b/sim/testsuite/sim/sh64/media/stxq.cgs deleted file mode 100644 index 10759fd4414..00000000000 --- a/sim/testsuite/sim/sh64/media/stxq.cgs +++ /dev/null @@ -1,29 +0,0 @@ -# sh testcase for stx.q $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - movi -1, r7 - xori r7, 13, r7 - movi 40, r0 - shlli r0, 8, r0 - -stxq1: - movi 0, r1 - stx.q r0, r1, r7 - -stxq2: - movi 8, r1 - stx.q r0, r1, r7 - -stxq3: - movi -8, r1 - stx.q r0, r1, r7 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/stxw.cgs b/sim/testsuite/sim/sh64/media/stxw.cgs deleted file mode 100644 index d03981146a2..00000000000 --- a/sim/testsuite/sim/sh64/media/stxw.cgs +++ /dev/null @@ -1,29 +0,0 @@ -# sh testcase for stx.w $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - movi -1, r7 - xori r7, 13, r7 - movi 40, r0 - shlli r0, 8, r0 - -stxw1: - movi 0, r1 - stx.w r0, r1, r7 - -stxw2: - movi 2, r1 - stx.w r0, r1, r7 - -stxw3: - movi -2, r1 - stx.w r0, r1, r7 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/sub.cgs b/sim/testsuite/sim/sh64/media/sub.cgs deleted file mode 100644 index e5e7530100b..00000000000 --- a/sim/testsuite/sim/sh64/media/sub.cgs +++ /dev/null @@ -1,42 +0,0 @@ -# sh testcase for sub $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - movi 0, r0 - movi 1, r1 - -sub1: - # 0 - 0 = 0. - sub r0, r0, r2 - bnei r2, 0, tr0 - -sub2: - # 1 - 0 = 1. - sub r1, r0, r2 - bnei r2, 1, tr0 - -sub3: - # 0 - 1 = -1. - sub r0, r1, r2 - addi r2, 1, r2 - bnei r2, 0, tr0 - -sub4: - # 5 - 2 = 3. - movi 5, r0 - movi 2, r1 - sub r0, r1, r2 - bnei r2, 3, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/subl.cgs b/sim/testsuite/sim/sh64/media/subl.cgs deleted file mode 100644 index 98abe59f666..00000000000 --- a/sim/testsuite/sim/sh64/media/subl.cgs +++ /dev/null @@ -1,38 +0,0 @@ -# sh testcase for sub.l $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - -init: - pta wrong, tr0 - -subl1: - # Test that the top 32 bits are ignored. - movi 1, r0 - shlli r0, 32, r0 - ori r0, 7, r0 - - movi 1, r1 - shlli r1, 32, r1 - ori r1, 2, r1 - - sub.l r0, r1, r2 - bnei r2, 5, tr0 - -subl2: - # Test that 0 - 1 is sign extended. - movi 0, r0 - movi 1, r1 - sub.l r0, r1, r2 - addi r2, 1, r2 - bnei r2, 0, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/media/swapq.cgs b/sim/testsuite/sim/sh64/media/swapq.cgs deleted file mode 100644 index 6f168b1ff48..00000000000 --- a/sim/testsuite/sim/sh64/media/swapq.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# sh testcase for swap.q $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - movi 10, r0 - shlli r0, 8, r0 - ori r0, 20, r0 - shlli r0, 8, r0 - ori r0, 30, r0 - shlli r0, 8, r0 - ori r0, 40, r0 - shlli r0, 8, r0 - ori r0, 50, r0 - shlli r0, 8, r0 - ori r0, 60, r0 - shlli r0, 8, r0 - ori r0, 70, r0 - shlli r0, 8, r0 - ori r0, 80, r0 - - # Set up two address operands. - - movi 40, r1 - shlli r1, 8, r1 - movi 8, r2 - -swapq: - swap.q r1, r2, r0 - -okay: - pass diff --git a/sim/testsuite/sim/sh64/media/synci.cgs b/sim/testsuite/sim/sh64/media/synci.cgs deleted file mode 100644 index 65e06213a50..00000000000 --- a/sim/testsuite/sim/sh64/media/synci.cgs +++ /dev/null @@ -1,10 +0,0 @@ -# sh testcase for synci -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - synci - pass diff --git a/sim/testsuite/sim/sh64/media/synco.cgs b/sim/testsuite/sim/sh64/media/synco.cgs deleted file mode 100644 index 2db6df343d4..00000000000 --- a/sim/testsuite/sim/sh64/media/synco.cgs +++ /dev/null @@ -1,10 +0,0 @@ -# sh testcase for synco -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - synco - pass diff --git a/sim/testsuite/sim/sh64/media/testutils.inc b/sim/testsuite/sim/sh64/media/testutils.inc deleted file mode 100644 index d3b383a1efb..00000000000 --- a/sim/testsuite/sim/sh64/media/testutils.inc +++ /dev/null @@ -1,51 +0,0 @@ -# Support macros for the assembly test cases. - - .macro start - .text - .global start -start: - .endm - - .macro pass - movi 253, r0 - trapa r0 - .endm - - .macro fail - movi 254, r0 - trapa r0 - .endm - - .macro _packb v1 v2 v3 v4 v5 v6 v7 v8 reg - movi \v1, \reg - shlli \reg, 8, \reg - addi \reg, \v2, \reg - shlli \reg, 8, \reg - addi \reg, \v3, \reg - shlli \reg, 8, \reg - addi \reg, \v4, \reg - shlli \reg, 8, \reg - addi \reg, \v5, \reg - shlli \reg, 8, \reg - addi \reg, \v6, \reg - shlli \reg, 8, \reg - addi \reg, \v7, \reg - shlli \reg, 8, \reg - addi \reg, \v8, \reg - .endm - - .macro _packw v1 v2 v3 v4 reg - movi \v1, \reg - shlli \reg, 16, \reg - addi \reg, \v2, \reg - shlli \reg, 16, \reg - addi \reg, \v3, \reg - shlli \reg, 16, \reg - addi \reg, \v4, \reg - .endm - - .macro _packl v1 v2 reg - movi \v1, \reg - shlli \reg, 32, \reg - addi \reg, \v2, \reg - .endm diff --git a/sim/testsuite/sim/sh64/media/trapa.cgs b/sim/testsuite/sim/sh64/media/trapa.cgs deleted file mode 100644 index c961bac73ba..00000000000 --- a/sim/testsuite/sim/sh64/media/trapa.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# sh testcase for trapa $rm -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start - # This performs a trap to emit "pass". - movi 253, r0 - trapa r0 diff --git a/sim/testsuite/sim/sh64/media/xor.cgs b/sim/testsuite/sim/sh64/media/xor.cgs deleted file mode 100644 index 80278f0a3e0..00000000000 --- a/sim/testsuite/sim/sh64/media/xor.cgs +++ /dev/null @@ -1,54 +0,0 @@ -# sh testcase for xor $rm, $rn, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -xor1: - # 0 xor 0 = 0. - movi 0, r0 - movi 0, r1 - xor r0, r1, r2 - bnei r2, 0, tr0 - -xor2: - # 0 xor 1 = 1. - movi 0, r0 - movi 1, r1 - xor r0, r1, r2 - bnei r2, 1, tr0 - -xor3: - # 1 xor 0 = 1. - movi 1, r0 - movi 0, r1 - xor r0, r1, r2 - bnei r2, 1, tr0 - -xor4: - # 1 xor 1 = 0. - movi 1, r0 - movi 1, r1 - xor r0, r1, r2 - bnei r2, 0, tr0 - -xor5: - movi 1, r0 - shlli r0, 63, r0 - ori r0, 1, r0 - movi 3, r1 - xor r0, r1, r2 - andi r2, 255, r2 - bnei r2, 2, tr0 - -okay: - pass - -wrong: - fail - diff --git a/sim/testsuite/sim/sh64/media/xori.cgs b/sim/testsuite/sim/sh64/media/xori.cgs deleted file mode 100644 index 0d4d96a779d..00000000000 --- a/sim/testsuite/sim/sh64/media/xori.cgs +++ /dev/null @@ -1,48 +0,0 @@ -# sh testcase for xori $rm, $imm6, $rd -*- Asm -*- -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - - .include "media/testutils.inc" - - start -init: - pta wrong, tr0 - -xori1: - # 0 xor 0 = 0. - movi 0, r0 - xori r0, 0, r2 - bnei r2, 0, tr0 - -xori2: - # 0 xor 1 = 1. - movi 0, r0 - xori r0, 1, r2 - bnei r2, 1, tr0 - -xori3: - # 1 xor 0 = 1. - movi 1, r0 - xori r0, 0, r2 - bnei r2, 1, tr0 - -xori4: - # 1 xor 1 = 0. - movi 1, r0 - xori r0, 1, r2 - bnei r2, 0, tr0 - -xori5: - movi 1, r0 - shlli r0, 63, r0 - ori r0, 1, r0 - xori r0, 3, r2 - andi r2, 255, r2 - bnei r2, 2, tr0 - -okay: - pass - -wrong: - fail diff --git a/sim/testsuite/sim/sh64/misc/fr-dr.s b/sim/testsuite/sim/sh64/misc/fr-dr.s deleted file mode 100644 index 52f0e136638..00000000000 --- a/sim/testsuite/sim/sh64/misc/fr-dr.s +++ /dev/null @@ -1,22 +0,0 @@ -# sh testcase for floating point register shared state (see below). -# mach: all -# as: -isa=shmedia -# ld: -m shelf64 - -# (fr, dr, fp, fv amd mtrx provide different views of the same architecrual state). -# Hitachi SH-5 CPU volume 1, p. 15. - - .include "media/testutils.inc" - - start - - movi 42, r0 - fmov.ls r0, fr12 - # save this reg. - fmov.s fr12, fr14 - - movi 42, r0 - fmov.qd r0, dr12 - -okay: - pass