From: Dejan Jevtic <dejan.jevtic@valgrind.org>
Date: Fri, 20 Sep 2013 09:58:16 +0000 (+0000)
Subject: mips32/64: Save the value of FCSR register at the beginning and restore it
X-Git-Tag: svn/VALGRIND_3_9_0^2~23
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=ea947f20574a335576e3a77cfdcd6cda5c0a6a6a;p=thirdparty%2Fvalgrind.git

mips32/64: Save the value of FCSR register at the beginning and restore it
back at the end of dirty helper.


git-svn-id: svn://svn.valgrind.org/vex/trunk@2772
---

diff --git a/VEX/priv/guest_mips_helpers.c b/VEX/priv/guest_mips_helpers.c
index 8cb41a2c0c..df19d5f70e 100644
--- a/VEX/priv/guest_mips_helpers.c
+++ b/VEX/priv/guest_mips_helpers.c
@@ -1093,24 +1093,28 @@ ULong mips64_dirtyhelper_rdhwr ( ULong rt, ULong rd )
 #endif
 
 #define ASM_VOLATILE_ROUND32(fs, inst)                              \
-   __asm__ volatile("ctc1    %3,  $31"  "\n\t"                      \
+   __asm__ volatile("cfc1    $t0, $31"  "\n\t"                      \
+                    "ctc1    %3,  $31"  "\n\t"                      \
                     "mtc1    %1,  $f0"  "\n\t"                      \
                     "mtc1    %2,  $f1"  "\n\t"                      \
                     ""#inst" $f0, $f0"  "\n\t"                      \
                     "cfc1    %0,  $31"  "\n\t"                      \
+                    "ctc1    $t0, $31"  "\n\t"                      \
                     : "=r" (ret)                                    \
                     : "r" (addr[fs]), "r" (addr[fs+1]), "r" (fcsr)  \
-                    : "$f0", "$f1"                                  \
+                    : "t0", "$f0", "$f1"                            \
                    );
 
 #define ASM_VOLATILE_ROUND64(fs, inst)                              \
-   __asm__ volatile("ctc1     %2,  $31"  "\n\t"                     \
+   __asm__ volatile("cfc1     $t0, $31"  "\n\t"                     \
+                    "ctc1     %2,  $31"  "\n\t"                     \
                     "dmtc1    %1,  $f0"  "\n\t"                     \
                     ""#inst"  $f0, $f0"  "\n\t"                     \
                     "cfc1     %0,  $31"  "\n\t"                     \
+                    "ctc1     $t0, $31"  "\n\t"                     \
                     : "=r" (ret)                                    \
                     : "r" (addr[fs]), "r" (fcsr)                    \
-                    : "$f0"                                         \
+                    : "t0", "$f0"                                   \
                    );
 
 /* TODO: Add cases for all fpu instructions because all fpu instructions are