From: Bill Schmidt Date: Fri, 18 Apr 2014 13:31:57 +0000 (+0000) Subject: vsx.md (vsx_xxmrghw_): Adjust for little-endian. X-Git-Tag: releases/gcc-5.1.0~8040 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=ed79f4d0023ac6c7f26e3cc484f30b0327b763d1;p=thirdparty%2Fgcc.git vsx.md (vsx_xxmrghw_): Adjust for little-endian. [gcc] 2014-04-18 Bill Schmidt * config/rs6000/vsx.md (vsx_xxmrghw_): Adjust for little-endian. (vsx_xxmrglw_): Likewise. [gcc/testsuite] 2014-04-18 Bill Schmidt * gcc.dg/vmx/merge-vsx.c: Add V4SI and V4SF tests. * gcc.dg/vmx/merge-vsx-be-order.c: Likewise. From-SVN: r209516 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4c15285a30a1..b6ce19eeca8c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2014-04-18 Bill Schmidt + + * config/rs6000/vsx.md (vsx_xxmrghw_): Adjust for + little-endian. + (vsx_xxmrglw_): Likewise. + 2014-04-17 Michael Meissner PR target/60876 diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index d83cdc3df347..23d85ab0628f 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -1891,7 +1891,12 @@ (parallel [(const_int 0) (const_int 4) (const_int 1) (const_int 5)])))] "VECTOR_MEM_VSX_P (mode)" - "xxmrghw %x0,%x1,%x2" +{ + if (BYTES_BIG_ENDIAN) + return "xxmrghw %x0,%x1,%x2"; + else + return "xxmrglw %x0,%x2,%x1"; +} [(set_attr "type" "vecperm")]) (define_insn "vsx_xxmrglw_" @@ -1903,7 +1908,12 @@ (parallel [(const_int 2) (const_int 6) (const_int 3) (const_int 7)])))] "VECTOR_MEM_VSX_P (mode)" - "xxmrglw %x0,%x1,%x2" +{ + if (BYTES_BIG_ENDIAN) + return "xxmrglw %x0,%x1,%x2"; + else + return "xxmrghw %x0,%x2,%x1"; +} [(set_attr "type" "vecperm")]) ;; Shift left double by word immediate diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 52c063326efa..d1ad53cb3d1f 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2014-04-18 Bill Schmidt + + * gcc.dg/vmx/merge-vsx.c: Add V4SI and V4SF tests. + * gcc.dg/vmx/merge-vsx-be-order.c: Likewise. + 2014-04-17 Paolo Carlini PR c++/59200 diff --git a/gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c b/gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c index 440ac9a004d1..56e0b0e6c2e1 100644 --- a/gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c +++ b/gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c @@ -21,10 +21,19 @@ static void test() vector long long vlb = {0,1}; vector double vda = {-2.0,-1.0}; vector double vdb = {0.0,1.0}; + vector unsigned int vuia = {0,1,2,3}; + vector unsigned int vuib = {4,5,6,7}; + vector signed int vsia = {-4,-3,-2,-1}; + vector signed int vsib = {0,1,2,3}; + vector float vfa = {-4.0,-3.0,-2.0,-1.0}; + vector float vfb = {0.0,1.0,2.0,3.0}; /* Result vectors. */ vector long long vlh, vll; vector double vdh, vdl; + vector unsigned int vuih, vuil; + vector signed int vsih, vsil; + vector float vfh, vfl; /* Expected result vectors. */ #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ @@ -32,20 +41,44 @@ static void test() vector long long vlrl = {0,-2}; vector double vdrh = {1.0,-1.0}; vector double vdrl = {0.0,-2.0}; + vector unsigned int vuirh = {6,2,7,3}; + vector unsigned int vuirl = {4,0,5,1}; + vector signed int vsirh = {2,-2,3,-1}; + vector signed int vsirl = {0,-4,1,-3}; + vector float vfrh = {2.0,-2.0,3.0,-1.0}; + vector float vfrl = {0.0,-4.0,1.0,-3.0}; #else vector long long vlrh = {-2,0}; vector long long vlrl = {-1,1}; vector double vdrh = {-2.0,0.0}; vector double vdrl = {-1.0,1.0}; + vector unsigned int vuirh = {0,4,1,5}; + vector unsigned int vuirl = {2,6,3,7}; + vector signed int vsirh = {-4,0,-3,1}; + vector signed int vsirl = {-2,2,-1,3}; + vector float vfrh = {-4.0,0.0,-3.0,1.0}; + vector float vfrl = {-2.0,2.0,-1.0,3.0}; #endif vlh = vec_mergeh (vla, vlb); vll = vec_mergel (vla, vlb); vdh = vec_mergeh (vda, vdb); vdl = vec_mergel (vda, vdb); + vuih = vec_mergeh (vuia, vuib); + vuil = vec_mergel (vuia, vuib); + vsih = vec_mergeh (vsia, vsib); + vsil = vec_mergel (vsia, vsib); + vfh = vec_mergeh (vfa, vfb ); + vfl = vec_mergel (vfa, vfb ); check (vec_long_long_eq (vlh, vlrh), "vlh"); check (vec_long_long_eq (vll, vlrl), "vll"); check (vec_double_eq (vdh, vdrh), "vdh" ); check (vec_double_eq (vdl, vdrl), "vdl" ); + check (vec_all_eq (vuih, vuirh), "vuih"); + check (vec_all_eq (vuil, vuirl), "vuil"); + check (vec_all_eq (vsih, vsirh), "vsih"); + check (vec_all_eq (vsil, vsirl), "vsil"); + check (vec_all_eq (vfh, vfrh), "vfh"); + check (vec_all_eq (vfl, vfrl), "vfl"); } diff --git a/gcc/testsuite/gcc.dg/vmx/merge-vsx.c b/gcc/testsuite/gcc.dg/vmx/merge-vsx.c index 851f35bd3e80..40693e95b336 100644 --- a/gcc/testsuite/gcc.dg/vmx/merge-vsx.c +++ b/gcc/testsuite/gcc.dg/vmx/merge-vsx.c @@ -21,24 +21,51 @@ static void test() vector long long vlb = {0,1}; vector double vda = {-2.0,-1.0}; vector double vdb = {0.0,1.0}; + vector unsigned int vuia = {0,1,2,3}; + vector unsigned int vuib = {4,5,6,7}; + vector signed int vsia = {-4,-3,-2,-1}; + vector signed int vsib = {0,1,2,3}; + vector float vfa = {-4.0,-3.0,-2.0,-1.0}; + vector float vfb = {0.0,1.0,2.0,3.0}; /* Result vectors. */ vector long long vlh, vll; vector double vdh, vdl; + vector unsigned int vuih, vuil; + vector signed int vsih, vsil; + vector float vfh, vfl; /* Expected result vectors. */ vector long long vlrh = {-2,0}; vector long long vlrl = {-1,1}; vector double vdrh = {-2.0,0.0}; vector double vdrl = {-1.0,1.0}; + vector unsigned int vuirh = {0,4,1,5}; + vector unsigned int vuirl = {2,6,3,7}; + vector signed int vsirh = {-4,0,-3,1}; + vector signed int vsirl = {-2,2,-1,3}; + vector float vfrh = {-4.0,0.0,-3.0,1.0}; + vector float vfrl = {-2.0,2.0,-1.0,3.0}; vlh = vec_mergeh (vla, vlb); vll = vec_mergel (vla, vlb); vdh = vec_mergeh (vda, vdb); vdl = vec_mergel (vda, vdb); + vuih = vec_mergeh (vuia, vuib); + vuil = vec_mergel (vuia, vuib); + vsih = vec_mergeh (vsia, vsib); + vsil = vec_mergel (vsia, vsib); + vfh = vec_mergeh (vfa, vfb ); + vfl = vec_mergel (vfa, vfb ); check (vec_long_long_eq (vlh, vlrh), "vlh"); check (vec_long_long_eq (vll, vlrl), "vll"); check (vec_double_eq (vdh, vdrh), "vdh" ); check (vec_double_eq (vdl, vdrl), "vdl" ); + check (vec_all_eq (vuih, vuirh), "vuih"); + check (vec_all_eq (vuil, vuirl), "vuil"); + check (vec_all_eq (vsih, vsirh), "vsih"); + check (vec_all_eq (vsil, vsirl), "vsil"); + check (vec_all_eq (vfh, vfrh), "vfh"); + check (vec_all_eq (vfl, vfrl), "vfl"); }