From: Florian Krohm Date: Fri, 2 Jan 2015 17:32:21 +0000 (+0000) Subject: Change the IMark statement. The address is now type Addr and the X-Git-Tag: svn/VALGRIND_3_11_0^2~119 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=eeed23ac5a20e0cfdf4a7e737e5cf967698cc191;p=thirdparty%2Fvalgrind.git Change the IMark statement. The address is now type Addr and the length is unsigned. git-svn-id: svn://svn.valgrind.org/vex/trunk@3055 --- diff --git a/VEX/priv/host_amd64_defs.h b/VEX/priv/host_amd64_defs.h index 89332c6dab..73caf5cf3c 100644 --- a/VEX/priv/host_amd64_defs.h +++ b/VEX/priv/host_amd64_defs.h @@ -777,7 +777,7 @@ extern HInstrArray* iselSB_AMD64 ( const IRSB*, Int offs_Host_EvC_FailAddr, Bool chainingAllowed, Bool addProfInc, - Addr64 max_ga ); + Addr max_ga ); /* How big is an event check? This is kind of a kludge because it depends on the offsets of host_EvC_FAILADDR and host_EvC_COUNTER, diff --git a/VEX/priv/host_amd64_isel.c b/VEX/priv/host_amd64_isel.c index 4ccea9fdc2..f95ae283cb 100644 --- a/VEX/priv/host_amd64_isel.c +++ b/VEX/priv/host_amd64_isel.c @@ -4858,7 +4858,7 @@ HInstrArray* iselSB_AMD64 ( const IRSB* bb, Int offs_Host_EvC_FailAddr, Bool chainingAllowed, Bool addProfInc, - Addr64 max_ga ) + Addr max_ga ) { Int i, j; HReg hreg, hregHI; diff --git a/VEX/priv/host_arm64_defs.h b/VEX/priv/host_arm64_defs.h index 319fde50af..5905df6fcd 100644 --- a/VEX/priv/host_arm64_defs.h +++ b/VEX/priv/host_arm64_defs.h @@ -957,7 +957,7 @@ extern HInstrArray* iselSB_ARM64 ( const IRSB*, Int offs_Host_EvC_FailAddr, Bool chainingAllowed, Bool addProfInc, - Addr64 max_ga ); + Addr max_ga ); /* How big is an event check? This is kind of a kludge because it depends on the offsets of host_EvC_FAILADDR and diff --git a/VEX/priv/host_arm64_isel.c b/VEX/priv/host_arm64_isel.c index 06ba67240f..87cc6de4c9 100644 --- a/VEX/priv/host_arm64_isel.c +++ b/VEX/priv/host_arm64_isel.c @@ -3872,7 +3872,7 @@ HInstrArray* iselSB_ARM64 ( const IRSB* bb, Int offs_Host_EvC_FailAddr, Bool chainingAllowed, Bool addProfInc, - Addr64 max_ga ) + Addr max_ga ) { Int i, j; HReg hreg, hregHI; diff --git a/VEX/priv/host_arm_defs.h b/VEX/priv/host_arm_defs.h index 6d1a016342..384e4f5e36 100644 --- a/VEX/priv/host_arm_defs.h +++ b/VEX/priv/host_arm_defs.h @@ -1047,7 +1047,7 @@ extern HInstrArray* iselSB_ARM ( const IRSB*, Int offs_Host_EvC_FailAddr, Bool chainingAllowed, Bool addProfInc, - Addr64 max_ga ); + Addr max_ga ); /* How big is an event check? This is kind of a kludge because it depends on the offsets of host_EvC_FAILADDR and diff --git a/VEX/priv/host_arm_isel.c b/VEX/priv/host_arm_isel.c index 1a3ff07995..11a726a675 100644 --- a/VEX/priv/host_arm_isel.c +++ b/VEX/priv/host_arm_isel.c @@ -118,7 +118,7 @@ typedef UInt hwcaps; Bool chainingAllowed; - Addr64 max_ga; + Addr32 max_ga; /* These are modified as we go along. */ HInstrArray* code; @@ -6172,7 +6172,7 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt ) /* Skip the event check at the dst if this is a forwards edge. */ Bool toFastEP - = ((Addr32)stmt->Ist.Exit.dst->Ico.U32) > env->max_ga; + = stmt->Ist.Exit.dst->Ico.U32 > env->max_ga; if (0) vex_printf("%s", toFastEP ? "Y" : ","); addInstr(env, ARMInstr_XDirect(stmt->Ist.Exit.dst->Ico.U32, amR15T, cc, toFastEP)); @@ -6244,7 +6244,7 @@ static void iselNext ( ISelEnv* env, /* Skip the event check at the dst if this is a forwards edge. */ Bool toFastEP - = ((Addr64)cdst->Ico.U32) > env->max_ga; + = cdst->Ico.U32 > env->max_ga; if (0) vex_printf("%s", toFastEP ? "X" : "."); addInstr(env, ARMInstr_XDirect(cdst->Ico.U32, amR15T, ARMcc_AL, @@ -6320,7 +6320,7 @@ HInstrArray* iselSB_ARM ( const IRSB* bb, Int offs_Host_EvC_FailAddr, Bool chainingAllowed, Bool addProfInc, - Addr64 max_ga ) + Addr max_ga ) { Int i, j; HReg hreg, hregHI; diff --git a/VEX/priv/host_mips_defs.h b/VEX/priv/host_mips_defs.h index 9d67dee535..1e0abc8c3a 100644 --- a/VEX/priv/host_mips_defs.h +++ b/VEX/priv/host_mips_defs.h @@ -735,7 +735,7 @@ extern HInstrArray *iselSB_MIPS ( const IRSB*, Int offs_Host_EvC_FailAddr, Bool chainingAllowed, Bool addProfInc, - Addr64 max_ga ); + Addr max_ga ); /* How big is an event check? This is kind of a kludge because it depends on the offsets of host_EvC_FAILADDR and host_EvC_COUNTER, diff --git a/VEX/priv/host_mips_isel.c b/VEX/priv/host_mips_isel.c index ac8e6f9601..3df7d9bb76 100644 --- a/VEX/priv/host_mips_isel.c +++ b/VEX/priv/host_mips_isel.c @@ -4160,7 +4160,7 @@ HInstrArray *iselSB_MIPS ( const IRSB* bb, Int offs_Host_EvC_FailAddr, Bool chainingAllowed, Bool addProfInc, - Addr64 max_ga ) + Addr max_ga ) { Int i, j; HReg hreg, hregHI; diff --git a/VEX/priv/host_ppc_defs.h b/VEX/priv/host_ppc_defs.h index 565534f802..a9a9e23f67 100644 --- a/VEX/priv/host_ppc_defs.h +++ b/VEX/priv/host_ppc_defs.h @@ -1165,7 +1165,7 @@ extern HInstrArray* iselSB_PPC ( const IRSB*, Int offs_Host_EvC_FailAddr, Bool chainingAllowed, Bool addProfInc, - Addr64 max_ga ); + Addr max_ga ); /* How big is an event check? This is kind of a kludge because it depends on the offsets of host_EvC_FAILADDR and diff --git a/VEX/priv/host_ppc_isel.c b/VEX/priv/host_ppc_isel.c index 3c99a5bc1e..71c7b79b58 100644 --- a/VEX/priv/host_ppc_isel.c +++ b/VEX/priv/host_ppc_isel.c @@ -6101,7 +6101,7 @@ HInstrArray* iselSB_PPC ( const IRSB* bb, Int offs_Host_EvC_FailAddr, Bool chainingAllowed, Bool addProfInc, - Addr64 max_ga) + Addr max_ga) { Int i, j; @@ -6115,7 +6115,6 @@ HInstrArray* iselSB_PPC ( const IRSB* bb, vassert(arch_host == VexArchPPC32 || arch_host == VexArchPPC64); mode64 = arch_host == VexArchPPC64; - if (!mode64) vassert(max_ga <= 0xFFFFFFFFULL); /* do some sanity checks */ mask32 = VEX_HWCAPS_PPC32_F | VEX_HWCAPS_PPC32_V diff --git a/VEX/priv/host_s390_defs.h b/VEX/priv/host_s390_defs.h index f5385ca223..c91ac5e1c2 100644 --- a/VEX/priv/host_s390_defs.h +++ b/VEX/priv/host_s390_defs.h @@ -742,7 +742,7 @@ void getAllocableRegs_S390( Int *, HReg **, Bool ); void genSpill_S390 ( HInstr **, HInstr **, HReg , Int , Bool ); void genReload_S390 ( HInstr **, HInstr **, HReg , Int , Bool ); HInstrArray *iselSB_S390 ( const IRSB *, VexArch, const VexArchInfo *, - const VexAbiInfo *, Int, Int, Bool, Bool, Addr64); + const VexAbiInfo *, Int, Int, Bool, Bool, Addr); /* Return the number of bytes of code needed for an event check */ Int evCheckSzB_S390(VexEndness endness_host); diff --git a/VEX/priv/host_s390_isel.c b/VEX/priv/host_s390_isel.c index 9990ab1668..7204eeb1dc 100644 --- a/VEX/priv/host_s390_isel.c +++ b/VEX/priv/host_s390_isel.c @@ -4051,7 +4051,7 @@ HInstrArray * iselSB_S390(const IRSB *bb, VexArch arch_host, const VexArchInfo *archinfo_host, const VexAbiInfo *vbi, Int offset_host_evcheck_counter, Int offset_host_evcheck_fail_addr, Bool chaining_allowed, - Bool add_profinc, Addr64 max_ga) + Bool add_profinc, Addr max_ga) { UInt i, j; HReg hreg, hregHI; diff --git a/VEX/priv/host_x86_defs.h b/VEX/priv/host_x86_defs.h index c679bbe458..2d3341e24b 100644 --- a/VEX/priv/host_x86_defs.h +++ b/VEX/priv/host_x86_defs.h @@ -739,7 +739,7 @@ extern HInstrArray* iselSB_X86 ( const IRSB*, Int offs_Host_EvC_FailAddr, Bool chainingAllowed, Bool addProfInc, - Addr64 max_ga ); + Addr max_ga ); /* How big is an event check? This is kind of a kludge because it depends on the offsets of host_EvC_FAILADDR and host_EvC_COUNTER, diff --git a/VEX/priv/host_x86_isel.c b/VEX/priv/host_x86_isel.c index 900afd1e63..3711c9c132 100644 --- a/VEX/priv/host_x86_isel.c +++ b/VEX/priv/host_x86_isel.c @@ -181,7 +181,7 @@ typedef UInt hwcaps; Bool chainingAllowed; - Addr64 max_ga; + Addr32 max_ga; /* These are modified as we go along. */ HInstrArray* code; @@ -4333,7 +4333,7 @@ static void iselNext ( ISelEnv* env, /* Skip the event check at the dst if this is a forwards edge. */ Bool toFastEP - = ((Addr64)cdst->Ico.U32) > env->max_ga; + = ((Addr32)cdst->Ico.U32) > env->max_ga; if (0) vex_printf("%s", toFastEP ? "X" : "."); addInstr(env, X86Instr_XDirect(cdst->Ico.U32, amEIP, Xcc_ALWAYS, @@ -4417,7 +4417,7 @@ HInstrArray* iselSB_X86 ( const IRSB* bb, Int offs_Host_EvC_FailAddr, Bool chainingAllowed, Bool addProfInc, - Addr64 max_ga ) + Addr max_ga ) { Int i, j; HReg hreg, hregHI; @@ -4433,8 +4433,6 @@ HInstrArray* iselSB_X86 ( const IRSB* bb, | VEX_HWCAPS_X86_SSE2 | VEX_HWCAPS_X86_SSE3 | VEX_HWCAPS_X86_LZCNT))); - vassert(sizeof(max_ga) == 8); - vassert((max_ga >> 32) == 0); /* Check that the host's endianness is as expected. */ vassert(archinfo_host->endness == VexEndnessLE); diff --git a/VEX/priv/ir_defs.c b/VEX/priv/ir_defs.c index dc339552e2..9dbe2acab3 100644 --- a/VEX/priv/ir_defs.c +++ b/VEX/priv/ir_defs.c @@ -1532,7 +1532,7 @@ void ppIRStmt ( const IRStmt* s ) vex_printf("IR-NoOp"); break; case Ist_IMark: - vex_printf( "------ IMark(0x%llx, %d, %u) ------", + vex_printf( "------ IMark(0x%lx, %u, %u) ------", s->Ist.IMark.addr, s->Ist.IMark.len, (UInt)s->Ist.IMark.delta); break; @@ -2053,7 +2053,7 @@ IRStmt* IRStmt_NoOp ( void ) static_closure.tag = Ist_NoOp; return &static_closure; } -IRStmt* IRStmt_IMark ( Addr64 addr, Int len, UChar delta ) { +IRStmt* IRStmt_IMark ( Addr addr, UInt len, UChar delta ) { IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); s->tag = Ist_IMark; s->Ist.IMark.addr = addr; @@ -4149,7 +4149,7 @@ void tcStmt ( const IRSB* bb, const IRStmt* stmt, IRType gWordTy ) case Ist_IMark: /* Somewhat heuristic, but rule out totally implausible instruction sizes and deltas. */ - if (stmt->Ist.IMark.len < 0 || stmt->Ist.IMark.len > 20) + if (stmt->Ist.IMark.len > 20) sanityCheckFail(bb,stmt,"IRStmt.IMark.len: implausible"); if (stmt->Ist.IMark.delta > 1) sanityCheckFail(bb,stmt,"IRStmt.IMark.delta: implausible"); diff --git a/VEX/priv/ir_opt.c b/VEX/priv/ir_opt.c index d2ba8fd7c8..86bd6464bd 100644 --- a/VEX/priv/ir_opt.c +++ b/VEX/priv/ir_opt.c @@ -5619,8 +5619,8 @@ static Interval stmt_modifies_guest_state ( IRSB *bb, const IRStmt *st, } } -/* notstatic */ Addr64 ado_treebuild_BB ( IRSB* bb, - Bool (*preciseMemExnsFn)(Int,Int) ) +/* notstatic */ Addr ado_treebuild_BB ( IRSB* bb, + Bool (*preciseMemExnsFn)(Int,Int) ) { Int i, j, k, m; Bool stmtStores, invalidateMe; @@ -5630,7 +5630,7 @@ static Interval stmt_modifies_guest_state ( IRSB *bb, const IRStmt *st, ATmpInfo env[A_NENV]; Bool max_ga_known = False; - Addr64 max_ga = 0; + Addr max_ga = 0; Int n_tmps = bb->tyenv->types_used; UShort* uses = LibVEX_Alloc(n_tmps * sizeof(UShort)); @@ -5650,8 +5650,8 @@ static Interval stmt_modifies_guest_state ( IRSB *bb, const IRStmt *st, case Ist_NoOp: continue; case Ist_IMark: { - Int len = st->Ist.IMark.len; - Addr64 mga = st->Ist.IMark.addr + (len < 1 ? 1 : len) - 1; + UInt len = st->Ist.IMark.len; + Addr mga = st->Ist.IMark.addr + (len < 1 ? 1 : len) - 1; max_ga_known = True; if (mga > max_ga) max_ga = mga; @@ -5839,7 +5839,7 @@ static Interval stmt_modifies_guest_state ( IRSB *bb, const IRStmt *st, bb->next = atbSubst_Expr(env, bb->next); bb->stmts_used = j; - return max_ga_known ? max_ga : ~(Addr64)0; + return max_ga_known ? max_ga : ~(Addr)0; } diff --git a/VEX/priv/ir_opt.h b/VEX/priv/ir_opt.h index c797b7140d..07cee63b61 100644 --- a/VEX/priv/ir_opt.h +++ b/VEX/priv/ir_opt.h @@ -64,7 +64,7 @@ void do_deadcode_BB ( IRSB* bb ); the guest address of the highest addressed byte from any insn in this block, or Addr64_MAX if unknown (can that ever happen?) */ extern -Addr64 ado_treebuild_BB ( IRSB* bb, Bool (*preciseMemExnsFn)(Int,Int) ); +Addr ado_treebuild_BB ( IRSB* bb, Bool (*preciseMemExnsFn)(Int,Int) ); #endif /* ndef __VEX_IR_OPT_H */ diff --git a/VEX/priv/main_main.c b/VEX/priv/main_main.c index 08ee31eab4..f9adfaa409 100644 --- a/VEX/priv/main_main.c +++ b/VEX/priv/main_main.c @@ -223,7 +223,7 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta ) void (*ppReg) ( HReg ); HInstrArray* (*iselSB) ( const IRSB*, VexArch, const VexArchInfo*, const VexAbiInfo*, Int, Int, Bool, Bool, - Addr64 ); + Addr ); Int (*emit) ( /*MB_MOD*/Bool*, UChar*, Int, const HInstr*, Bool, VexEndness, const void*, const void*, const void*, @@ -244,7 +244,7 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta ) IRType guest_word_type; IRType host_word_type; Bool mode64, chainingAllowed; - Addr64 max_ga; + Addr max_ga; guest_layout = NULL; available_real_regs = NULL; diff --git a/VEX/pub/libvex_ir.h b/VEX/pub/libvex_ir.h index 82771768a6..3c998d04cc 100644 --- a/VEX/pub/libvex_ir.h +++ b/VEX/pub/libvex_ir.h @@ -2675,8 +2675,8 @@ typedef eg. ------ IMark(0x4000792, 5, 0) ------, */ struct { - Addr64 addr; /* instruction address */ - Int len; /* instruction length */ + Addr addr; /* instruction address */ + UInt len; /* instruction length */ UChar delta; /* addr = program counter as encoded in guest state - delta */ } IMark; @@ -2874,7 +2874,7 @@ typedef /* Statement constructors. */ extern IRStmt* IRStmt_NoOp ( void ); -extern IRStmt* IRStmt_IMark ( Addr64 addr, Int len, UChar delta ); +extern IRStmt* IRStmt_IMark ( Addr addr, UInt len, UChar delta ); extern IRStmt* IRStmt_AbiHint ( IRExpr* base, Int len, IRExpr* nia ); extern IRStmt* IRStmt_Put ( Int off, IRExpr* data ); extern IRStmt* IRStmt_PutI ( IRPutI* details );