From: Claudiu Zissulescu Date: Wed, 9 Jul 2025 11:46:38 +0000 (+0300) Subject: target-insns.def: (tag_memory) New pattern. X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=f04c6c499575ae1f51c7d26a57a3353ca71de311;p=thirdparty%2Fgcc.git target-insns.def: (tag_memory) New pattern. Add a new target instruction. Hardware-assisted sanitizers on architectures providing instructions to tag/untag memory can then make use of this new instruction pattern. For example, the memtag-stack sanitizer uses these instructions to tag and untag a memory granule. gcc/ * target-insns.def (tag_memory): New target instruction. * doc/md.texi (tag_memory): Add documentation. Signed-off-by: Claudiu Zissulescu --- diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 86ed4ffe1e8..79588762fd3 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -8679,6 +8679,11 @@ the values were equal. If this pattern is not defined, then a plain compare pattern and conditional branch pattern is used. +@cindex @code{tag_memory} instruction pattern +This pattern tags an object that begins at the address specified by +operand 0, has the byte size indicated by the operand 2, and uses the +tag from operand 1. + @cindex @code{clear_cache} instruction pattern @item @samp{clear_cache} This pattern, if defined, flushes the instruction cache for a region of diff --git a/gcc/target-insns.def b/gcc/target-insns.def index 59025a20bf7..16e1d8cf565 100644 --- a/gcc/target-insns.def +++ b/gcc/target-insns.def @@ -102,6 +102,7 @@ DEF_TARGET_INSN (stack_protect_combined_test, (rtx x0, rtx x1, rtx x2)) DEF_TARGET_INSN (stack_protect_test, (rtx x0, rtx x1, rtx x2)) DEF_TARGET_INSN (store_multiple, (rtx x0, rtx x1, rtx x2)) DEF_TARGET_INSN (tablejump, (rtx x0, rtx x1)) +DEF_TARGET_INSN (tag_memory, (rtx x0, rtx x1, rtx x2)) DEF_TARGET_INSN (trap, (void)) DEF_TARGET_INSN (unique, (void)) DEF_TARGET_INSN (untyped_call, (rtx x0, rtx x1, rtx x2))