From: Lad Prabhakar Date: Tue, 18 Jun 2024 17:48:29 +0000 (+0100) Subject: pinctrl: renesas: rzg2l: Adjust bit masks for PIN_CFG_VARIABLE to use BIT(62) X-Git-Tag: v6.11-rc1~88^2~10^2~15 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=f0cdf878a22b91141d6050deed0eac70ab982ebc;p=thirdparty%2Fkernel%2Fstable.git pinctrl: renesas: rzg2l: Adjust bit masks for PIN_CFG_VARIABLE to use BIT(62) Shift the bit masks for `PIN_CFG_PIN_MAP_MASK` and `PIN_CFG_PIN_REG_MASK`, to accommodate `PIN_CFG_VARIABLE` using `BIT(62)`. Previously, these bit masks were placed higher up in the bit range, which did not leave room for `PIN_CFG_VARIABLE` at `BIT(62)`. By adjusting these masks, we ensure that `PIN_CFG_VARIABLE` can occupy `BIT(62)` without any conflicts. The updated masks are now: - `PIN_CFG_PIN_MAP_MASK`: `GENMASK_ULL(61, 54)` (was `GENMASK_ULL(62, 55)`) - `PIN_CFG_PIN_REG_MASK`: `GENMASK_ULL(53, 46)` (was `GENMASK_ULL(54, 47)`) Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Tested-by: Claudiu Beznea Link: https://lore.kernel.org/r/20240618174831.415583-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index bfaeeb00ac4a1..b79dd1ea26163 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -87,8 +87,8 @@ PIN_CFG_FILNUM | \ PIN_CFG_FILCLKSEL) -#define PIN_CFG_PIN_MAP_MASK GENMASK_ULL(62, 55) -#define PIN_CFG_PIN_REG_MASK GENMASK_ULL(54, 47) +#define PIN_CFG_PIN_MAP_MASK GENMASK_ULL(61, 54) +#define PIN_CFG_PIN_REG_MASK GENMASK_ULL(53, 46) #define PIN_CFG_MASK GENMASK_ULL(31, 0) /*