From: Elena Zannoni Date: Sun, 3 Nov 2002 22:29:13 +0000 (+0000) Subject: merge from mainline X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=f21e0e2e8a4c2e7ec5b5af9a5fa7288c6f069d47;p=thirdparty%2Fbinutils-gdb.git merge from mainline --- diff --git a/gdb/doc/ChangeLog b/gdb/doc/ChangeLog index d8e4a1e27b9..d79ebdc17c3 100644 --- a/gdb/doc/ChangeLog +++ b/gdb/doc/ChangeLog @@ -8,6 +8,50 @@ * gdb.texinfo: Add chapter on interpreters. Refer the command-line option "-i"/"--interpreter" to this chapter. +2002-10-26 Andrew Cagney + + * gdbint.texinfo (Target Architecture Definition): Delete + definition of DO_REGISTERS_INFO. + +2002-10-18 Kevin Buettner + + * gdbint.texinfo (Address Classes): Fix problems with insertion + of ``{'' and ``}'' in example. + +2002-10-17 Kevin Buettner + + * gdbint.texinfo (Address Classes): New section. + (Target Conditionals): Document ADDRESS_CLASS_NAME_TO_TYPE_FLAGS, + ADDRESS_CLASS_NAME_TO_TYPE_FLAGS_P, ADDRESS_CLASS_TYPE_FLAGS, + ADDRESS_CLASS_TYPE_FLAGS_P, ADDRESS_CLASS_TYPE_FLAGS_TO_NAME, and + ADDRESS_CLASS_TYPE_FLAGS_TO_NAME_P. + +2002-10-11 Klee Dienes + + * gdb.texinfo (Registers): Mention vector registers as well as + floating registers in the documentation for 'info registers' and + 'info all-registers'. + +2002-10-11 Daniel Jacobowitz + + * gdbint.texinfo (CPLUS_MARKER): Remove item. + +2002-10-03 Jeff Johnston + + * gdbint.texinfo (Item Output Functions): Add new ui_out_field_fmt_int + interface definition. + +2002-10-03 Marko Mlinar + + * gdb.texinfo (Target Commands): Add or1k target specific + commands. + * gdb.texinfo (Contributors): Add myself to the contributors list. + +2002-10-01 Andrew Cagney + + * gdb.texinfo (Mode Options): Update --interpreter option. "mi2" + and "mi1" instead of "mi1" and "mi0". + 2002-09-29 Hans-Peter Nilsson * gdb.texinfo (Packets): Fix typos "alligned". diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index 16f459e8674..b967ca2a9cd 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -394,6 +394,7 @@ Michael Tiemann contributed SPARC support. Tim Tucker contributed support for the Gould NP1 and Gould Powernode. Pace Willison contributed Intel 386 support. Jay Vosburgh contributed Symmetry support. +Marko Mlinar contributed OpenRISC 1000 support. Andreas Schwab contributed M68K @sc{gnu}/Linux support. @@ -1128,6 +1129,13 @@ program or device. This option is meant to be set by programs which communicate with @value{GDBN} using it as a back end. @xref{Interpreters, , Command Interpreters}. +@samp{--interpreter=mi} (or @samp{--interpreter=mi2}) causes +@value{GDBN} to use the current @dfn{@sc{gdb/mi} interface} +(@pxref{GDB/MI, , The @sc{gdb/mi} Interface}). The previous @sc{gdb/mi} +interface, included in @value{GDBN} version 5.3, can be selected with +@samp{--interpreter=mi1}. Earlier @sc{gdb/mi} interfaces +are not supported. + @item -write @cindex @code{--write} Open the executable and core files for both reading and writing. This @@ -5550,13 +5558,13 @@ your machine. @kindex info registers @item info registers Print the names and values of all registers except floating-point -registers (in the selected stack frame). +and vector registers (in the selected stack frame). @kindex info all-registers @cindex floating point registers @item info all-registers Print the names and values of all registers, including floating-point -registers. +and vector registers (in the selected stack frame). @item info registers @var{regname} @dots{} Print the @dfn{relativized} value of each specified register @var{regname}. @@ -11644,6 +11652,7 @@ configurations. * M68K:: Motorola M68K @c OBSOLETE * M88K:: Motorola M88K * MIPS Embedded:: MIPS Embedded +* OpenRISC 1000:: OpenRisc 1000 * PA:: HP PA Embedded * PowerPC: PowerPC * SH:: Hitachi SH @@ -12232,6 +12241,130 @@ forever because it has no way of knowing how long the program is going to run before stopping. @end table +@node OpenRISC 1000 +@subsection OpenRISC 1000 +@cindex OpenRISC 1000 + +@cindex or1k boards +See OR1k Architecture document (@uref{www.opencores.org}) for more information +about platform and commands. + +@table @code + +@kindex target jtag +@item target jtag jtag://@var{host}:@var{port} + +Connects to remote JTAG server. +JTAG remote server can be either an or1ksim or JTAG server, +connected via parallel port to the board. + +Example: @code{target jtag jtag://localhost:9999} + +@kindex or1ksim +@item or1ksim @var{command} +If connected to @code{or1ksim} OpenRISC 1000 Architectural +Simulator, proprietary commands can be executed. + +@kindex info or1k spr +@item info or1k spr +Displays spr groups. + +@item info or1k spr @var{group} +@itemx info or1k spr @var{groupno} +Displays register names in selected group. + +@item info or1k spr @var{group} @var{register} +@itemx info or1k spr @var{register} +@itemx info or1k spr @var{groupno} @var{registerno} +@itemx info or1k spr @var{registerno} +Shows information about specified spr register. + +@kindex spr +@item spr @var{group} @var{register} @var{value} +@itemx spr @var{register @var{value}} +@itemx spr @var{groupno} @var{registerno @var{value}} +@itemx spr @var{registerno @var{value}} +Writes @var{value} to specified spr register. +@end table + +Some implementations of OpenRISC 1000 Architecture also have hardware trace. +It is very similar to @value{GDBN} trace, except it does not interfere with normal +program execution and is thus much faster. Hardware breakpoints/watchpoint +triggers can be set using: +@table @code +@item $LEA/$LDATA +Load effective address/data +@item $SEA/$SDATA +Store effective address/data +@item $AEA/$ADATA +Access effective address ($SEA or $LEA) or data ($SDATA/$LDATA) +@item $FETCH +Fetch data +@end table + +When triggered, it can capture low level data, like: @code{PC}, @code{LSEA}, +@code{LDATA}, @code{SDATA}, @code{READSPR}, @code{WRITESPR}, @code{INSTR}. + +@code{htrace} commands: +@cindex OpenRISC 1000 htrace +@table @code +@kindex hwatch +@item hwatch @var{conditional} +Set hardware watchpoint on combination of Load/Store Effecive Address(es) +or Data. For example: + +@code{hwatch ($LEA == my_var) && ($LDATA < 50) || ($SEA == my_var) && ($SDATA >= 50)} + +@code{hwatch ($LEA == my_var) && ($LDATA < 50) || ($SEA == my_var) && ($SDATA >= 50)} + +@kindex htrace info +@item htrace info +Display information about current HW trace configuration. + +@kindex htrace trigger +@item htrace trigger @var{conditional} +Set starting criteria for HW trace. + +@kindex htrace qualifier +@item htrace qualifier @var{conditional} +Set acquisition qualifier for HW trace. + +@kindex htrace stop +@item htrace stop @var{conditional} +Set HW trace stopping criteria. + +@kindex htrace record +@item htrace record @var{[data]*} +Selects the data to be recorded, when qualifier is met and HW trace was +triggered. + +@kindex htrace enable +@item htrace enable +@kindex htrace disable +@itemx htrace disable +Enables/disables the HW trace. + +@kindex htrace rewind +@item htrace rewind @var{[filename]} +Clears currently recorded trace data. + +If filename is specified, new trace file is made and any newly collected data +will be written there. + +@kindex htrace print +@item htrace print @var{[start [len]]} +Prints trace buffer, using current record configuration. + +@kindex htrace mode continuous +@item htrace mode continuous +Set continuous trace mode. + +@kindex htrace mode suspend +@item htrace mode suspend +Set suspend trace mode. + +@end table + @node PowerPC @subsection PowerPC diff --git a/gdb/doc/gdbint.texinfo b/gdb/doc/gdbint.texinfo index 1c3743bd08c..0cdbc053376 100644 --- a/gdb/doc/gdbint.texinfo +++ b/gdb/doc/gdbint.texinfo @@ -1011,6 +1011,13 @@ This function outputs a value of an @code{int} variable. It uses the the name of the field. @end deftypefun +@deftypefun void ui_out_field_fmt_int (struct ui_out *@var{uiout}, int @var{width}, enum ui_align @var{alignment}, const char *@var{fldname}, int @var{value}) +This function outputs a value of an @code{int} variable. It differs from +@code{ui_out_field_int} in that the caller specifies the desired @var{width} and @var{alignment} of the output. +@var{fldname} specifies +the name of the field. +@end deftypefun + @deftypefun void ui_out_field_core_addr (struct ui_out *@var{uiout}, const char *@var{fldname}, CORE_ADDR @var{address}) This function outputs an address. @end deftypefun @@ -2623,6 +2630,91 @@ This function may safely assume that @var{type} is either a pointer or a C@t{++} reference type. @end deftypefn +@section Address Classes +@cindex address classes +@cindex DW_AT_byte_size +@cindex DW_AT_address_class + +Sometimes information about different kinds of addresses is available +via the debug information. For example, some programming environments +define addresses of several different sizes. If the debug information +distinguishes these kinds of address classes through either the size +info (e.g, @code{DW_AT_byte_size} in @w{DWARF 2}) or through an explicit +address class attribute (e.g, @code{DW_AT_address_class} in @w{DWARF 2}), the +following macros should be defined in order to disambiguate these +types within @value{GDBN} as well as provide the added information to +a @value{GDBN} user when printing type expressions. + +@deftypefn {Target Macro} int ADDRESS_CLASS_TYPE_FLAGS (int @var{byte_size}, int @var{dwarf2_addr_class}) +Returns the type flags needed to construct a pointer type whose size +is @var{byte_size} and whose address class is @var{dwarf2_addr_class}. +This function is normally called from within a symbol reader. See +@file{dwarf2read.c}. +@end deftypefn + +@deftypefn {Target Macro} char *ADDRESS_CLASS_TYPE_FLAGS_TO_NAME (int @var{type_flags}) +Given the type flags representing an address class qualifier, return +its name. +@end deftypefn +@deftypefn {Target Macro} int ADDRESS_CLASS_NAME_to_TYPE_FLAGS (int @var{name}, int *var{type_flags_ptr}) +Given an address qualifier name, set the @code{int} refererenced by @var{type_flags_ptr} to the type flags +for that address class qualifier. +@end deftypefn + +Since the need for address classes is rather rare, none of +the address class macros defined by default. Predicate +macros are provided to detect when they are defined. + +Consider a hypothetical architecture in which addresses are normally +32-bits wide, but 16-bit addresses are also supported. Furthermore, +suppose that the @w{DWARF 2} information for this architecture simply +uses a @code{DW_AT_byte_size} value of 2 to indicate the use of one +of these "short" pointers. The following functions could be defined +to implement the address class macros: + +@smallexample +somearch_address_class_type_flags (int byte_size, + int dwarf2_addr_class) +@{ + if (byte_size == 2) + return TYPE_FLAG_ADDRESS_CLASS_1; + else + return 0; +@} + +static char * +somearch_address_class_type_flags_to_name (int type_flags) +@{ + if (type_flags & TYPE_FLAG_ADDRESS_CLASS_1) + return "short"; + else + return NULL; +@} + +int +somearch_address_class_name_to_type_flags (char *name, + int *type_flags_ptr) +@{ + if (strcmp (name, "short") == 0) + @{ + *type_flags_ptr = TYPE_FLAG_ADDRESS_CLASS_1; + return 1; + @} + else + return 0; +@} +@end smallexample + +The qualifier @code{@@short} is used in @value{GDBN}'s type expressions +to indicate the presence of one of these "short" pointers. E.g, if +the debug information indicates that @code{short_ptr_var} is one of these +short pointers, @value{GDBN} might show the following behavior: + +@smallexample +(gdb) ptype short_ptr_var +type = int * @@short +@end smallexample + @section Raw and Virtual Register Representations @cindex raw register representation @@ -2850,6 +2942,49 @@ boundaries, the processor masks out these bits to generate the actual address of the instruction. ADDR_BITS_REMOVE should filter out these bits with an expression such as @code{((addr) & ~3)}. +@item ADDRESS_CLASS_NAME_TO_TYPE_FLAGS (@var{name}, @var{type_flags_ptr}) +@findex ADDRESS_CLASS_NAME_TO_TYPE_FLAGS +If @var{name} is a valid address class qualifier name, set the @code{int} +referenced by @var{type_flags_ptr} to the mask representing the qualifier +and return 1. If @var{name} is not a valid address class qualifier name, +return 0. + +The value for @var{type_flags_ptr} should be one of +@code{TYPE_FLAG_ADDRESS_CLASS_1}, @code{TYPE_FLAG_ADDRESS_CLASS_2}, or +possibly some combination of these values or'd together. +@xref{Target Architecture Definition, , Address Classes}. + +@item ADDRESS_CLASS_NAME_TO_TYPE_FLAGS_P () +@findex ADDRESS_CLASS_NAME_TO_TYPE_FLAGS_P +Predicate which indicates whether @code{ADDRESS_CLASS_NAME_TO_TYPE_FLAGS} +has been defined. + +@item ADDRESS_CLASS_TYPE_FLAGS (@var{byte_size}, @var{dwarf2_addr_class}) +@findex ADDRESS_CLASS_TYPE_FLAGS (@var{byte_size}, @var{dwarf2_addr_class}) +Given a pointers byte size (as described by the debug information) and +the possible @code{DW_AT_address_class} value, return the type flags +used by @value{GDBN} to represent this address class. The value +returned should be one of @code{TYPE_FLAG_ADDRESS_CLASS_1}, +@code{TYPE_FLAG_ADDRESS_CLASS_2}, or possibly some combination of these +values or'd together. +@xref{Target Architecture Definition, , Address Classes}. + +@item ADDRESS_CLASS_TYPE_FLAGS_P () +@findex ADDRESS_CLASS_TYPE_FLAGS_P +Predicate which indicates whether @code{ADDRESS_CLASS_TYPE_FLAGS} has +been defined. + +@item ADDRESS_CLASS_TYPE_FLAGS_TO_NAME (@var{type_flags}) +@findex ADDRESS_CLASS_TYPE_FLAGS_TO_NAME +Return the name of the address class qualifier associated with the type +flags given by @var{type_flags}. + +@item ADDRESS_CLASS_TYPE_FLAGS_TO_NAME_P () +@findex ADDRESS_CLASS_TYPE_FLAGS_TO_NAME_P +Predicate which indicates whether @code{ADDRESS_CLASS_TYPE_FLAGS_TO_NAME} has +been defined. +@xref{Target Architecture Definition, , Address Classes}. + @item ADDRESS_TO_POINTER (@var{type}, @var{buf}, @var{addr}) @findex ADDRESS_TO_POINTER Store in @var{buf} a pointer of type @var{type} representing the address @@ -3062,13 +3197,6 @@ Return non-zero if register @var{regnum} can represent data values in a non-standard form. @xref{Target Architecture Definition, , Using Different Register and Memory Data Representations}. -@item CPLUS_MARKER -@findex CPLUS_MARKERz -Define this to expand into the character that G@t{++} uses to distinguish -compiler-generated identifiers from programmer-specified identifiers. -By default, this expands into @code{'$'}. Most System V targets should -define this to @code{'.'}. - @item DBX_PARM_SYMBOL_CLASS @findex DBX_PARM_SYMBOL_CLASS Hook for the @code{SYMBOL_CLASS} of a parameter when decoding DBX symbol @@ -3090,12 +3218,6 @@ Similarly, for hardware breakpoints. If defined, this should evaluate to 1 if @var{addr} is in a shared library in which breakpoints cannot be set and so should be disabled. -@item DO_REGISTERS_INFO -@findex DO_REGISTERS_INFO -If defined, use this to print the value of a register or all registers. - -This method is deprecated. - @item PRINT_FLOAT_INFO() @findex PRINT_FLOAT_INFO If defined, then the @samp{info float} command will print information about