From: Emre Yavuzalp Date: Tue, 7 Jul 2026 06:56:54 +0000 (+0300) Subject: mediatek: add UBI layout for TP-Link BE450 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=f23af0c8284208704bc222e972b0fc44175ae263;p=thirdparty%2Fopenwrt.git mediatek: add UBI layout for TP-Link BE450 Add an OpenWrt U-Boot ("UBI") layout variant for the TP-Link Archer BE450. It replaces the vendor bootloader and the stock dual-image layout with a single large UBI partition, extending the usable flash to around 95 MiB, and ships a current U-Boot with TFTP recovery. Hardware -------- SoC: MediaTek MT7988D (Filogic 880) Wi-Fi: MediaTek MT7992AV (BE7200, 2.4/5 GHz) Flash: 128 MiB SPI-NAND RAM: 512 MiB DDR4 Serial: 115200 8N1, header located next to the heatsink: heatsink | | | | | | +----+-----+------+-------+ +-----------------+ | | | TX | RX | GND | +3.3V | | power connector | +---+ +----+-----+------+-------+ +-----------------+ | Don't connect ----+ MAC addresses ------------- The label MAC (base) is stored in tp_data/default-mac and is written into the factory partition at offset 0x4 during installation: eth0 (LAN): base (factory 0x4) eth1 (WAN): base + 1 eth2 (LAN): base + 2 Wi-Fi: derived by mt76 from the factory EEPROM (2.4 GHz = base, 5 GHz = base with bit 0x10 set), matching the stock layout behaviour. Installation ------------ Requires a serial connection and a TFTP server. The device must be running the stock-layout OpenWrt (tplink_be450) build. 1. From the running stock-layout OpenWrt, back up the vendor bootloader and the calibration/MAC data. These cannot be recovered otherwise: cat /dev/mtd0 > /tmp/boot.bin cat /dev/mtd5 > /tmp/tp_data.bin scp /tmp/boot.bin /tmp/tp_data.bin user@pc:backup/ scp -r /tmp/tp_data user@pc:backup/ Store boot.bin, tp_data.bin and the tp_data file contents (MT7992_EEPROM.bin, default-mac) somewhere safe. 2. Boot the UBI-layout initramfs. Connect the PC to one of the LAN ports (LAN1-3) and serve the recovery image from a TFTP server on the PC at 192.168.1.2. Interrupt the vendor U-Boot on the serial console (Ctrl+C), then: setenv serverip 192.168.1.2 tftpboot 0x50000000 openwrt-mediatek-filogic-tplink_be450-ubi-initramfs-recovery.itb bootm 0x50000000 3. Copy the required files to the booted initramfs (192.168.1.1): scp -O MT7992_EEPROM.bin default-mac \ openwrt-mediatek-filogic-tplink_be450-ubi-bl31-uboot.fip \ openwrt-mediatek-filogic-tplink_be450-ubi-preloader.bin \ openwrt-mediatek-filogic-tplink_be450-ubi-squashfs-sysupgrade.itb \ root@192.168.1.1:/tmp 4. Build the factory image from the EEPROM and MAC data: cd /tmp dd if=/dev/zero bs=$((0x100000)) count=1 | tr '\000' '\377' > factory.bin dd if=MT7992_EEPROM.bin of=factory.bin bs=1 count=$((0x1e00)) conv=notrunc dd if=default-mac of=factory.bin bs=1 seek=4 conv=notrunc 5. Create the UBI volumes. Warning: this permanently erases the remaining vendor data, including tp_data - only proceed with the backups from step 1 stored safely: ubidetach -p /dev/mtd2 ubiformat /dev/mtd2 -y ubiattach -p /dev/mtd2 ubimkvol /dev/ubi0 -N fip -t static -s 2MiB ubiupdatevol /dev/ubi0_0 /tmp/openwrt-mediatek-filogic-tplink_be450-ubi-bl31-uboot.fip ubimkvol /dev/ubi0 -N ubootenv -s 0x1f000 ubimkvol /dev/ubi0 -N ubootenv2 -s 0x1f000 6. Write the factory data and the BL2 preloader. kmod-mtd-rw is required to lift the read-only protection of the bl2 partition; set up internet access first or upload the package manually: apk update && apk add kmod-mtd-rw insmod mtd-rw i_want_a_brick=1 mtd erase factory mtd write /tmp/factory.bin factory mtd erase bl2 mtd write /tmp/openwrt-mediatek-filogic-tplink_be450-ubi-preloader.bin bl2 7. Flash the system: sysupgrade -n /tmp/openwrt-mediatek-filogic-tplink_be450-ubi-squashfs-sysupgrade.itb Revert to stock firmware ------------------------ 1. From the UBI-layout OpenWrt, force-flash the stock-layout OpenWrt (tplink_be450) initramfs image; the board name differs, so sysupgrade must be forced: sysupgrade -F -n openwrt-mediatek-filogic-tplink_be450-initramfs-kernel.bin 2. After booting into that initramfs, set up network access, copy boot.bin and tp_data.bin from the backup to /tmp and restore the vendor bootloader and data: apk update && apk add kmod-mtd-rw insmod mtd-rw i_want_a_brick=1 mtd erase boot mtd write /tmp/boot.bin boot mtd erase ubi0 mtd erase ubi1 mtd erase userconfig mtd erase tp_data mtd write /tmp/tp_data.bin tp_data 3. Verify the tp_data restore before rebooting - without it the device has no ethernet: md5sum /tmp/tp_data.bin md5sum /dev/mtd5 If the checksums match, reboot. The vendor U-Boot web recovery comes up on 192.168.1.1; flash the TP-Link stock firmware from there. Signed-off-by: Emre Yavuzalp Link: https://github.com/openwrt/openwrt/pull/23211 Signed-off-by: Jonas Jelonek --- diff --git a/package/boot/uboot-tools/uboot-envtools/files/mediatek_filogic b/package/boot/uboot-tools/uboot-envtools/files/mediatek_filogic index b65fff07243..3571d0b75fb 100644 --- a/package/boot/uboot-tools/uboot-envtools/files/mediatek_filogic +++ b/package/boot/uboot-tools/uboot-envtools/files/mediatek_filogic @@ -54,6 +54,7 @@ qihoo,360t7-ubi|\ routerich,ax3000-ubootmod|\ routerich,be7200|\ snr,snr-cpe-ax2|\ +tplink,be450-ubi|\ tplink,tl-xdr4288|\ tplink,tl-xdr6086|\ tplink,tl-xdr6088|\ diff --git a/target/linux/mediatek/dts/mt7988d-tplink-be450-common.dtsi b/target/linux/mediatek/dts/mt7988d-tplink-be450-common.dtsi new file mode 100644 index 00000000000..bbf831ba390 --- /dev/null +++ b/target/linux/mediatek/dts/mt7988d-tplink-be450-common.dtsi @@ -0,0 +1,375 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) + +/dts-v1/; + +#include "mt7988a.dtsi" +#include +#include +#include +#include +#include + +/ { + aliases: aliases { + serial0 = &serial0; + led-boot = &led_status; + led-failsafe = &led_status; + led-running = &led_status; + led-upgrade = &led_status; + }; + + chosen: chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@40000000 { + reg = <0x0 0x40000000 0x0 0x20000000>; + device_type = "memory"; + }; + + cpus { + /delete-node/ cpu@3; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&button_pins>; + + reset { + label = "reset"; + linux,code = ; + gpios = <&pio 13 GPIO_ACTIVE_LOW>; + }; + + wps { + label = "wps"; + linux,code = ; + gpios = <&pio 14 GPIO_ACTIVE_LOW>; + }; + + wifi { + label = "wlan"; + linux,code = ; + gpios = <&pio 34 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + led-0 { + gpios = <&pio 21 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_WAN; + }; + + led-1 { + gpios = <&pio 28 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_WLAN_5GHZ; + }; + + led-2 { + gpios = <&pio 29 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_WLAN_2GHZ; + }; + + led_status: led-3 { + gpios = <&pio 30 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_STATUS; + panic-indicator; + }; + + led-4 { + gpios = <&pio 31 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_LAN; + }; + + led-5 { + gpios = <&pio 35 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_WPS; + }; + + led-6 { + gpios = <&pio 57 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_WAN; + }; + + led-7 { + gpios = <&pio 68 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_USB; + }; + }; +}; + +&cpu0 { + proc-supply = <&rt5190_buck3>; +}; + +&cpu1 { + proc-supply = <&rt5190_buck3>; +}; + +&cpu2 { + proc-supply = <&rt5190_buck3>; +}; + +&cci { + proc-supply = <&rt5190_buck3>; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_flash_pins>; + status = "okay"; + + spi_nand: spi_nand@0 { + compatible = "spi-nand"; + reg = <0>; + + spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>; + spi-cal-addrlen = <5>; + spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>; + spi-cal-datalen = <7>; + spi-cal-enable; + spi-cal-mode = "read-data"; + + spi-max-frequency = <52000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + + partitions: partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + }; + }; +}; + +ð { + pinctrl-names = "default"; + pinctrl-0 = <&mdio0_pins>; + status = "okay"; +}; + +&gmac0 { + status = "okay"; +}; + +&gmac1 { + phy-mode = "internal"; + phy-connection-type = "internal"; + phy = <&int_2p5g_phy>; + status = "okay"; +}; + +&gmac2 { + phy-mode = "usxgmii"; + phy-connection-type = "usxgmii"; + phy = <&phy0>; + status = "okay"; +}; + +&gsw_phy3 { + status = "disabled"; +}; + +&mdio_bus { + phy0: ethernet-phy@0 { + /* RTL8261N */ + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0>; + + reset-gpios = <&pio 3 GPIO_ACTIVE_LOW>; + reset-assert-us = <100000>; + reset-deassert-us = <221000>; + }; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; + + rt5190a_64: rt5190a@64 { + compatible = "richtek,rt5190a"; + reg = <0x64>; + /*interrupts-extended = <&gpio26 0 IRQ_TYPE_LEVEL_LOW>;*/ + vin2-supply = <&rt5190_buck1>; + vin3-supply = <&rt5190_buck1>; + vin4-supply = <&rt5190_buck1>; + + regulators { + rt5190_buck1: buck1 { + regulator-name = "rt5190a-buck1"; + regulator-min-microvolt = <5090000>; + regulator-max-microvolt = <5090000>; + regulator-allowed-modes = + ; + regulator-boot-on; + regulator-always-on; + }; + + buck2 { + regulator-name = "vcore"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1400000>; + regulator-boot-on; + regulator-always-on; + }; + + rt5190_buck3: buck3 { + regulator-name = "vproc"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1400000>; + regulator-boot-on; + }; + + buck4 { + regulator-name = "rt5190a-buck4"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-allowed-modes = + ; + regulator-boot-on; + regulator-always-on; + }; + + ldo { + regulator-name = "rt5190a-ldo"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; +}; + +&pcie0 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie0_1_pins>; + reset-gpios = <&pio 7 GPIO_ACTIVE_LOW>; + status = "okay"; + + pcie@0,0 { + reg = <0x0000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + }; + }; +}; + +&pio { + button_pins: button-pins { + pins = "GPIO_RESET", "GPIO_WPS", "SPI2_MISO"; + bias-disable; + }; + + mdio0_pins: mdio0-pins { + mux { + function = "eth"; + groups = "mdc_mdio0"; + }; + + conf { + groups = "mdc_mdio0"; + drive-strength = ; + }; + }; + + i2c0_pins: i2c0-pins-g0 { + mux { + function = "i2c"; + groups = "i2c0_1"; + }; + }; + + pcie0_1_pins: pcie0-pins-g1 { + mux { + function = "pcie"; + groups = "pcie_2l_0_pereset", "pcie_clk_req_n0_0"; + }; + }; + + spi0_flash_pins: spi0-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + }; + + enable-usb-power { + gpio-hog; + gpios = <32 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "USB power"; + }; +}; + +&switch { + status = "okay"; + + ports { + port@0 { + label = "lan3"; + }; + + port@1 { + label = "lan2"; + }; + + port@2 { + label = "lan1"; + }; + + port@3 { + status = "disabled"; + }; + }; +}; + +&ssusb1 { + status = "okay"; +}; + +&tphy { + status = "okay"; +}; + +&serial0 { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; diff --git a/target/linux/mediatek/dts/mt7988d-tplink-be450-ubi.dts b/target/linux/mediatek/dts/mt7988d-tplink-be450-ubi.dts new file mode 100644 index 00000000000..dda645c1f2a --- /dev/null +++ b/target/linux/mediatek/dts/mt7988d-tplink-be450-ubi.dts @@ -0,0 +1,107 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) + +#include "mt7988d-tplink-be450-common.dtsi" + +/ { + compatible = "tplink,be450-ubi", "mediatek,mt7988d"; + model = "TP-Link BE450 (UBI)"; +}; + +&aliases { + label-mac-device = &gmac0; +}; + +&chosen { + bootargs-append = " root=/dev/fit0 rootwait"; + rootdisk = <&ubi_fit>; +}; + +&gmac0 { + nvmem-cells = <&macaddr_factory_4 0>; + nvmem-cell-names = "mac-address"; +}; + +&gmac1 { + nvmem-cells = <&macaddr_factory_4 1>; + nvmem-cell-names = "mac-address"; +}; + +&gmac2 { + nvmem-cells = <&macaddr_factory_4 2>; + nvmem-cell-names = "mac-address"; +}; + +&pcie0 { + pcie@0,0 { + reg = <0x0000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + + wifi@0,0 { + reg = <0x0000 0 0 0 0>; + nvmem-cells = <&eeprom_factory_0>; + nvmem-cell-names = "eeprom"; + }; + }; +}; + +&partitions { + partition@0 { + label = "bl2"; + reg = <0x0 0x100000>; + read-only; + }; + + partition@100000 { + label = "factory"; + reg = <0x100000 0x100000>; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom_factory_0: eeprom@0 { + reg = <0x0 0x1e00>; + }; + + macaddr_factory_4: macaddr@4 { + compatible = "mac-base"; + reg = <0x4 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@200000 { + compatible = "linux,ubi"; + reg = <0x200000 0x7e00000>; + label = "ubi"; + + volumes { + ubi_fit: ubi-volume-fit { + volname = "fit"; + }; + + ubi_ubootenv: ubi-volume-ubootenv { + volname = "ubootenv"; + }; + + ubi_ubootenv2: ubi-volume-ubootenv2 { + volname = "ubootenv2"; + }; + }; + }; +}; + +&ubi_ubootenv { + nvmem-layout { + compatible = "u-boot,env-redundant-bool"; + }; +}; + +&ubi_ubootenv2 { + nvmem-layout { + compatible = "u-boot,env-redundant-bool"; + }; +}; diff --git a/target/linux/mediatek/dts/mt7988d-tplink-be450.dts b/target/linux/mediatek/dts/mt7988d-tplink-be450.dts index 8ba4e8faa93..36295f03aad 100644 --- a/target/linux/mediatek/dts/mt7988d-tplink-be450.dts +++ b/target/linux/mediatek/dts/mt7988d-tplink-be450.dts @@ -1,412 +1,44 @@ // SPDX-License-Identifier: (GPL-2.0 OR MIT) -/dts-v1/; - -#include "mt7988a.dtsi" -#include -#include -#include -#include -#include +#include "mt7988d-tplink-be450-common.dtsi" / { - model = "TP-Link BE450"; compatible = "tplink,be450", "mediatek,mt7988d"; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - aliases { - serial0 = &serial0; - led-boot = &led_status; - led-failsafe = &led_status; - led-running = &led_status; - led-upgrade = &led_status; - }; - - memory@40000000 { - reg = <0x0 0x40000000 0x0 0x20000000>; - device_type = "memory"; - }; - - cpus { - /delete-node/ cpu@3; - }; - - reg_1p8v: regulator-1p8v { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&button_pins>; - - reset { - label = "reset"; - linux,code = ; - gpios = <&pio 13 GPIO_ACTIVE_LOW>; - }; - - wps { - label = "wps"; - linux,code = ; - gpios = <&pio 14 GPIO_ACTIVE_LOW>; - }; - - wifi { - label = "wlan"; - linux,code = ; - gpios = <&pio 34 GPIO_ACTIVE_LOW>; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - - led-0 { - gpios = <&pio 21 GPIO_ACTIVE_HIGH>; - color = ; - function = LED_FUNCTION_WAN; - }; - - led-1 { - gpios = <&pio 28 GPIO_ACTIVE_LOW>; - color = ; - function = LED_FUNCTION_WLAN_5GHZ; - }; - - led-2 { - gpios = <&pio 29 GPIO_ACTIVE_HIGH>; - color = ; - function = LED_FUNCTION_WLAN_2GHZ; - }; - - led_status: led-3 { - gpios = <&pio 30 GPIO_ACTIVE_HIGH>; - color = ; - function = LED_FUNCTION_STATUS; - panic-indicator; - }; - - led-4 { - gpios = <&pio 31 GPIO_ACTIVE_HIGH>; - color = ; - function = LED_FUNCTION_LAN; - }; - - led-5 { - gpios = <&pio 35 GPIO_ACTIVE_LOW>; - color = ; - function = LED_FUNCTION_WPS; - }; - - led-6 { - gpios = <&pio 57 GPIO_ACTIVE_HIGH>; - color = ; - function = LED_FUNCTION_WAN; - }; - - led-7 { - gpios = <&pio 68 GPIO_ACTIVE_HIGH>; - color = ; - function = LED_FUNCTION_USB; - }; - }; -}; - -&cpu0 { - proc-supply = <&rt5190_buck3>; -}; - -&cpu1 { - proc-supply = <&rt5190_buck3>; -}; - -&cpu2 { - proc-supply = <&rt5190_buck3>; -}; - -&cci { - proc-supply = <&rt5190_buck3>; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spi0_flash_pins>; - status = "okay"; - - spi_nand: spi_nand@0 { - compatible = "spi-nand"; - reg = <0>; - - spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>; - spi-cal-addrlen = <5>; - spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>; - spi-cal-datalen = <7>; - spi-cal-enable; - spi-cal-mode = "read-data"; - - spi-max-frequency = <52000000>; - spi-rx-bus-width = <4>; - spi-tx-bus-width = <4>; - - partitions: partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "boot"; - reg = <0x0 0x200000>; - read-only; - }; - - partition@200000 { - label = "u-boot-env"; - reg = <0x200000 0x100000>; - }; - - partition@300000 { - label = "ubi0"; - reg = <0x300000 0x3200000>; - }; - - partition@3500000 { - label = "ubi1"; - reg = <0x3500000 0x3200000>; - read-only; - }; - - partition@6700000 { - label = "userconfig"; - reg = <0x6700000 0x800000>; - read-only; - }; - - partition@6f00000 { - label = "tp_data"; - reg = <0x6f00000 0x800000>; - read-only; - }; - }; - }; -}; - -ð { - pinctrl-names = "default"; - pinctrl-0 = <&mdio0_pins>; - status = "okay"; -}; - -&gmac0 { - status = "okay"; -}; - -&gmac1 { - phy-mode = "internal"; - phy-connection-type = "internal"; - phy = <&int_2p5g_phy>; - status = "okay"; -}; - -&gmac2 { - phy-mode = "usxgmii"; - phy-connection-type = "usxgmii"; - phy = <&phy0>; - status = "okay"; -}; - -&gsw_phy3 { - status = "disabled"; -}; - -&mdio_bus { - phy0: ethernet-phy@0 { - /* RTL8261N */ - compatible = "ethernet-phy-ieee802.3-c45"; - reg = <0>; - - reset-gpios = <&pio 3 GPIO_ACTIVE_LOW>; - reset-assert-us = <100000>; - reset-deassert-us = <221000>; - }; -}; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - status = "okay"; - - rt5190a_64: rt5190a@64 { - compatible = "richtek,rt5190a"; - reg = <0x64>; - /*interrupts-extended = <&gpio26 0 IRQ_TYPE_LEVEL_LOW>;*/ - vin2-supply = <&rt5190_buck1>; - vin3-supply = <&rt5190_buck1>; - vin4-supply = <&rt5190_buck1>; - - regulators { - rt5190_buck1: buck1 { - regulator-name = "rt5190a-buck1"; - regulator-min-microvolt = <5090000>; - regulator-max-microvolt = <5090000>; - regulator-allowed-modes = - ; - regulator-boot-on; - regulator-always-on; - }; - - buck2 { - regulator-name = "vcore"; - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <1400000>; - regulator-boot-on; - regulator-always-on; - }; - - rt5190_buck3: buck3 { - regulator-name = "vproc"; - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <1400000>; - regulator-boot-on; - }; - - buck4 { - regulator-name = "rt5190a-buck4"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - regulator-allowed-modes = - ; - regulator-boot-on; - regulator-always-on; - }; - - ldo { - regulator-name = "rt5190a-ldo"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-boot-on; - regulator-always-on; - }; - }; - }; -}; - -&pcie0 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie0_1_pins>; - reset-gpios = <&pio 7 GPIO_ACTIVE_LOW>; - status = "okay"; - - pcie@0,0 { - reg = <0x0000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - - wifi@0,0 { - compatible = "mediatek,mt76"; - reg = <0x0000 0 0 0 0>; - }; - }; + model = "TP-Link BE450"; }; -&pio { - button_pins: button-pins { - pins = "GPIO_RESET", "GPIO_WPS", "SPI2_MISO"; - bias-disable; +&partitions { + partition@0 { + label = "boot"; + reg = <0x0 0x200000>; + read-only; }; - mdio0_pins: mdio0-pins { - mux { - function = "eth"; - groups = "mdc_mdio0"; - }; - - conf { - groups = "mdc_mdio0"; - drive-strength = ; - }; + partition@200000 { + label = "u-boot-env"; + reg = <0x200000 0x100000>; }; - i2c0_pins: i2c0-pins-g0 { - mux { - function = "i2c"; - groups = "i2c0_1"; - }; + partition@300000 { + label = "ubi0"; + reg = <0x300000 0x3200000>; }; - pcie0_1_pins: pcie0-pins-g1 { - mux { - function = "pcie"; - groups = "pcie_2l_0_pereset", "pcie_clk_req_n0_0"; - }; + partition@3500000 { + label = "ubi1"; + reg = <0x3500000 0x3200000>; + read-only; }; - spi0_flash_pins: spi0-pins { - mux { - function = "spi"; - groups = "spi0", "spi0_wp_hold"; - }; + partition@6700000 { + label = "userconfig"; + reg = <0x6700000 0x800000>; + read-only; }; - enable-usb-power { - gpio-hog; - gpios = <32 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "USB power"; + partition@6f00000 { + label = "tp_data"; + reg = <0x6f00000 0x800000>; + read-only; }; }; - -&ssusb1 { - status = "okay"; -}; - -&switch { - status = "okay"; - - ports { - port@0 { - label = "lan3"; - }; - - port@1 { - label = "lan2"; - }; - - port@2 { - label = "lan1"; - }; - - port@3 { - status = "disabled"; - }; - }; -}; - -&tphy { - status = "okay"; -}; - -&serial0 { - status = "okay"; -}; - -&watchdog { - status = "okay"; -}; diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds b/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds index b8dc8428a5e..f99303bc3d7 100644 --- a/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds @@ -313,7 +313,8 @@ totolink,x6000r) tplink,archer-ax80-v1-eu) ucidef_set_led_netdev "lan" "LAN" "white:lan" "br-lan" "link tx rx" ;; -tplink,be450) +tplink,be450|\ +tplink,be450-ubi) ucidef_set_led_netdev "br-lan" "lan" "blue:lan" "br-lan" "link tx rx" ucidef_set_led_netdev "wlan2g" "WLAN2G" "blue:wlan-2ghz" "phy0.0-ap0" ucidef_set_led_netdev "wlan5g" "WLAN5G" "blue:wlan-5ghz" "phy0.1-ap0" diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network index bc2ad64b167..64dfb9a8aeb 100644 --- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network @@ -223,7 +223,8 @@ mediatek_setup_interfaces() tplink,archer-ax80-v1-eu) ucidef_set_interfaces_lan_wan "lan0 lan1 lan2 lan3" eth1 ;; - tplink,be450) + tplink,be450|\ + tplink,be450-ubi) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 eth2" eth1 ;; tplink,re6000xd) diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh index 2b954f85cc2..89c44cac768 100644 --- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh +++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh @@ -179,6 +179,7 @@ platform_do_upgrade() { routerich,ax3000-ubootmod|\ routerich,be7200|\ snr,snr-cpe-ax2|\ + tplink,be450-ubi|\ tplink,tl-xdr4288|\ tplink,tl-xdr6086|\ tplink,tl-xdr6088|\ @@ -417,6 +418,7 @@ platform_check_image() { qihoo,360t7|\ qihoo,360t7-ubi|\ routerich,ax3000-ubootmod|\ + tplink,be450-ubi|\ tplink,tl-xdr4288|\ tplink,tl-xdr6086|\ tplink,tl-xdr6088|\ diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk index b3eba574a3c..134d9c967ba 100644 --- a/target/linux/mediatek/image/filogic.mk +++ b/target/linux/mediatek/image/filogic.mk @@ -3197,6 +3197,36 @@ define Device/tplink_be450 endef TARGET_DEVICES += tplink_be450 +define Device/tplink_be450-ubi + DEVICE_VENDOR := TP-Link + DEVICE_MODEL := BE450 (UBI) + DEVICE_DTS := mt7988d-tplink-be450-ubi + DEVICE_DTS_DIR := ../dts + DEVICE_DTC_FLAGS := --pad 4096 + DEVICE_DTS_LOADADDR := 0x45f00000 + DEVICE_PACKAGES := kmod-mt7992-firmware kmod-usb3 \ + mt7988-2p5g-phy-firmware mt7988-wo-firmware \ + kmod-phy-realtek rtl826x-firmware + UBINIZE_OPTS := -E 5 + BLOCKSIZE := 128k + PAGESIZE := 2048 + KERNEL_IN_UBI := 1 + UBOOTENV_IN_UBI := 1 + IMAGES := sysupgrade.itb + KERNEL_INITRAMFS_SUFFIX := -recovery.itb + KERNEL := kernel-bin | gzip + KERNEL_INITRAMFS := kernel-bin | lzma | \ + fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | \ + pad-to 64k + IMAGE/sysupgrade.itb := append-kernel | \ + fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-with-rootfs | \ + pad-rootfs | append-metadata + ARTIFACTS := bl31-uboot.fip preloader.bin + ARTIFACT/bl31-uboot.fip := mt7988-bl31-uboot tplink_be450 + ARTIFACT/preloader.bin := mt7988-bl2 spim-nand-ubi-ddr4 +endef +TARGET_DEVICES += tplink_be450-ubi + define Device/tplink_eap683-lr DEVICE_VENDOR := TP-Link DEVICE_MODEL := EAP683-LR