From: Marc Olberding Date: Thu, 27 Nov 2025 00:43:07 +0000 (-0800) Subject: ARM: dts: aspeed: Add NVIDIA MSX4 HPM X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=f28674fab34f07fff9612c3f390d3699bfe8ed90;p=thirdparty%2Fkernel%2Flinux.git ARM: dts: aspeed: Add NVIDIA MSX4 HPM The NVIDIA MSX4 HPM (host platform module) is a reference board for managing up to 8 PCIe connected NVIDIA GPUs via ConnectX-8 (CX8) SuperNICs. The BMC manages all GPUs and CX8s for both telemetry and firmware update via MCTP over USB. The host CPUs are dual socket Intel Granite Rapids processors. For more detail on this architecture: https://developer.nvidia.com/blog/nvidia-connectx-8-supernics-advance-ai-platform-architecture-with-pcie-gen6-connectivity/ Signed-off-by: Marc Olberding Link: https://patch.msgid.link/20251126-msx1_devicetree-v5-2-e508d13e2dda@nvidia.com [arj: Reflow text to wrap at limit, whitespace, grammar] Signed-off-by: Andrew Jeffery --- diff --git a/arch/arm/boot/dts/aspeed/Makefile b/arch/arm/boot/dts/aspeed/Makefile index 9adf9278dc94f..ed25fec25fc4f 100644 --- a/arch/arm/boot/dts/aspeed/Makefile +++ b/arch/arm/boot/dts/aspeed/Makefile @@ -58,6 +58,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ aspeed-bmc-lenovo-hr855xg2.dtb \ aspeed-bmc-microsoft-olympus.dtb \ aspeed-bmc-nvidia-gb200nvl-bmc.dtb \ + aspeed-bmc-nvidia-msx4-bmc.dtb \ aspeed-bmc-opp-lanyang.dtb \ aspeed-bmc-opp-mowgli.dtb \ aspeed-bmc-opp-nicole.dtb \ diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts new file mode 100644 index 0000000000000..44f95a3986cb9 --- /dev/null +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts @@ -0,0 +1,246 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "aspeed-g6.dtsi" +#include +#include + +/ { + model = "AST2600 MSX4 BMC"; + compatible = "nvidia,msx4-bmc", "aspeed,ast2600"; + + aliases { + serial0 = &uart1; + serial1 = &uart2; + serial2 = &uart3; + serial3 = &uart4; + serial4 = &uart5; + }; + + chosen { + stdout-path = "uart5:115200n8"; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x80000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gfx_memory: framebuffer { + compatible = "shared-dma-pool"; + size = <0x01000000>; + alignment = <0x01000000>; + reusable; + }; + + video_engine_memory: jpegbuffer { + compatible = "shared-dma-pool"; + size = <0x02000000>; /* 32M */ + alignment = <0x01000000>; + reusable; + }; + }; +}; + +&ehci1 { + status = "okay"; +}; + +&fmc { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + label = "bmc"; + status = "okay"; + #include "openbmc-flash-layout-128.dtsi" + }; + + flash@1 { + compatible = "jedec,spi-nor"; + label = "alt-bmc"; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + status = "okay"; + }; +}; + +&gfx { + memory-region = <&gfx_memory>; + status = "okay"; +}; + +&gpio0 { + gpio-line-names = + /*A0-A7*/ "","","","","","","","", + /*B0-B7*/ "ASSERT_BMC_READY","","","","","","","", + /*C0-C7*/ "MON_PWR_GOOD","","","","","","","FP_ID_LED_N", + /*D0-D7*/ "","","","","","","","", + /*E0-E7*/ "","","","","","","","", + /*F0-F7*/ "","","","","","","","", + /*G0-G7*/ "","","FP_LED_STATUS_GREEN_N","FP_LED_STATUS_AMBER_N", + "","","","", + /*H0-H7*/ "","","","","","","","", + /*I0-I7*/ "","","","","","","","", + /*J0-J7*/ "","","","","","","","", + /*K0-K7*/ "","","","","","","","", + /*L0-L7*/ "","","","","","","","", + /*M0-M7*/ "","","","","","","","", + /*N0-N7*/ "","","","","","","","", + /*O0-O7*/ "","","","","","","","", + /*P0-P7*/ "MON_PWR_BTN_L","ASSERT_PWR_BTN_L","MON_RST_BTN_L", + "ASSERT_RST_BTN_L","","ASSERT_NMI_BTN_L","","", + /*Q0-Q7*/ "","","MEMORY_HOT_0","MEMORY_HOT_1","","","","", + /*R0-R7*/ "ID_BTN","","","","","VBAT_GPIO","","", + /*S0-S7*/ "","","RST_PCA_MUX","","","","","", + /*T0-T7*/ "","","","","","","","", + /*U0-U7*/ "","","","","","","","", + /*V0-V7*/ "","","","","","","","", + /*W0-W7*/ "","","","","","","","", + /*X0-X7*/ "","","","","","","","", + /*Y0-Y7*/ "","","","","","","","", + /*Z0-Z7*/ "","","","","","","",""; +}; + +&gpio1 { + gpio-line-names = + /*18A0-18A7*/ "","","","","","","","", + /*18B0-18B7*/ "","","","","","","","", + /*18C0-18C7*/ "","","","","","","","", + /*18D0-18D7*/ "","","","","","","","", + /*18E0-18E3*/ "","","BMC_INIT_DONE",""; +}; + +// Devices on these busses are available after POST +// however there isn't a great way to defer probing +// until that point today, as the BMC doesn't +// have direct control over when the host completes +// POST, especially from the kernel. +&i2c0 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; +}; + +&i2c3 { + status = "okay"; +}; + +&i2c4 { + status = "okay"; + + eeprom@51 { + compatible = "atmel,24c256"; + reg = <0x51>; + pagesize = <64>; + label = "sku"; + }; +}; + +&i2c5 { + status = "okay"; +}; + +&i2c6 { + status = "okay"; +}; + +&i2c7 { + status = "okay"; +}; + +&i2c8 { + status = "okay"; +}; + +&i2c9 { + status = "okay"; +}; + +&i2c10 { + status = "okay"; +}; + +&i2c11 { + status = "okay"; +}; + +&i2c12 { + status = "okay"; +}; + +&i2c13 { + status = "okay"; +}; + +&i2c15 { + status = "okay"; +}; + +&kcs1 { + aspeed,lpc-io-reg = <0xca0>; + status = "okay"; +}; + +&kcs2 { + aspeed,lpc-io-reg = <0xca8>; + status = "okay"; +}; + +&kcs3 { + aspeed,lpc-io-reg = <0xca2>; + status = "okay"; +}; + +&lpc_reset { + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&sgpiom0 { + ngpios = <80>; + status = "okay"; +}; + +&uart_routing { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&uart4 { + status = "okay"; +}; + +&uart5 { + status = "okay"; +}; + +&video { + memory-region = <&video_engine_memory>; + status = "okay"; +};