From: Florian Krohm Date: Wed, 31 Dec 2014 12:09:38 +0000 (+0000) Subject: It has long been assumed that host and guest architectures X-Git-Tag: svn/VALGRIND_3_11_0^2~124 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=f3cf0a5a6388741d7f6c1762dda299790c027532;p=thirdparty%2Fvalgrind.git It has long been assumed that host and guest architectures are the same - even though the initial design goal was likely different allowing a cross-valgrind of sorts. But as Julian put it: But it's been 12+ years and I've never once heard any mention of such a thing. So perhaps it's time to give up on that one. Now let's take advantage of this decision and tighten up the VEX API using Addr instead of Addr64. As a first step move the definition of Addr into VEX proper and change the chase_into_ok callback accordingly. git-svn-id: svn://svn.valgrind.org/vex/trunk@3050 --- diff --git a/VEX/priv/guest_amd64_defs.h b/VEX/priv/guest_amd64_defs.h index 5f95482dff..494f366e05 100644 --- a/VEX/priv/guest_amd64_defs.h +++ b/VEX/priv/guest_amd64_defs.h @@ -51,7 +51,7 @@ bb_to_IR.h. */ extern DisResult disInstr_AMD64 ( IRSB* irbb, - Bool (*resteerOkFn) ( void*, Addr64 ), + Bool (*resteerOkFn) ( void*, Addr ), Bool resteerCisOk, void* callback_opaque, const UChar* guest_code, diff --git a/VEX/priv/guest_amd64_toIR.c b/VEX/priv/guest_amd64_toIR.c index 7011668564..135ab18c3b 100644 --- a/VEX/priv/guest_amd64_toIR.c +++ b/VEX/priv/guest_amd64_toIR.c @@ -19329,7 +19329,7 @@ static Long dis_ESC_NONE ( /*MB_OUT*/DisResult* dres, /*MB_OUT*/Bool* expect_CAS, - Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ), + Bool (*resteerOkFn) ( /*opaque*/void*, Addr ), Bool resteerCisOk, void* callback_opaque, const VexArchInfo* archinfo, @@ -19745,7 +19745,7 @@ Long dis_ESC_NONE ( && vex_control.guest_chase_cond && (Addr64)d64 != (Addr64)guest_RIP_bbstart && jmpDelta < 0 - && resteerOkFn( callback_opaque, d64) ) { + && resteerOkFn( callback_opaque, (Addr64)d64) ) { /* Speculation: assume this backward branch is taken. So we need to emit a side-exit to the insn following this one, on the negation of the condition, and continue at the @@ -20834,7 +20834,7 @@ Long dis_ESC_NONE ( if (haveF2(pfx)) DIP("bnd ; "); /* MPX bnd prefix. */ d64 = (guest_RIP_bbstart+delta+sz) + getSDisp(sz,delta); delta += sz; - if (resteerOkFn(callback_opaque,d64)) { + if (resteerOkFn(callback_opaque, (Addr64)d64)) { dres->whatNext = Dis_ResteerU; dres->continueAt = d64; } else { @@ -20851,7 +20851,7 @@ Long dis_ESC_NONE ( if (haveF2(pfx)) DIP("bnd ; "); /* MPX bnd prefix. */ d64 = (guest_RIP_bbstart+delta+1) + getSDisp8(delta); delta++; - if (resteerOkFn(callback_opaque,d64)) { + if (resteerOkFn(callback_opaque, (Addr64)d64)) { dres->whatNext = Dis_ResteerU; dres->continueAt = d64; } else { @@ -21040,7 +21040,7 @@ static Long dis_ESC_0F ( /*MB_OUT*/DisResult* dres, /*MB_OUT*/Bool* expect_CAS, - Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ), + Bool (*resteerOkFn) ( /*opaque*/void*, Addr ), Bool resteerCisOk, void* callback_opaque, const VexArchInfo* archinfo, @@ -21287,7 +21287,7 @@ Long dis_ESC_0F ( && vex_control.guest_chase_cond && (Addr64)d64 != (Addr64)guest_RIP_bbstart && jmpDelta < 0 - && resteerOkFn( callback_opaque, d64) ) { + && resteerOkFn( callback_opaque, (Addr64)d64) ) { /* Speculation: assume this backward branch is taken. So we need to emit a side-exit to the insn following this one, on the negation of the condition, and continue at @@ -22006,7 +22006,7 @@ __attribute__((noinline)) static Long dis_ESC_0F38 ( /*MB_OUT*/DisResult* dres, - Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ), + Bool (*resteerOkFn) ( /*opaque*/void*, Addr ), Bool resteerCisOk, void* callback_opaque, const VexArchInfo* archinfo, @@ -22091,7 +22091,7 @@ __attribute__((noinline)) static Long dis_ESC_0F3A ( /*MB_OUT*/DisResult* dres, - Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ), + Bool (*resteerOkFn) ( /*opaque*/void*, Addr ), Bool resteerCisOk, void* callback_opaque, const VexArchInfo* archinfo, @@ -23394,7 +23394,7 @@ static Long dis_ESC_0F__VEX ( /*MB_OUT*/DisResult* dres, /*OUT*/ Bool* uses_vvvv, - Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ), + Bool (*resteerOkFn) ( /*opaque*/void*, Addr ), Bool resteerCisOk, void* callback_opaque, const VexArchInfo* archinfo, @@ -27396,7 +27396,7 @@ static Long dis_ESC_0F38__VEX ( /*MB_OUT*/DisResult* dres, /*OUT*/ Bool* uses_vvvv, - Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ), + Bool (*resteerOkFn) ( /*opaque*/void*, Addr ), Bool resteerCisOk, void* callback_opaque, const VexArchInfo* archinfo, @@ -29557,7 +29557,7 @@ static Long dis_ESC_0F3A__VEX ( /*MB_OUT*/DisResult* dres, /*OUT*/ Bool* uses_vvvv, - Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ), + Bool (*resteerOkFn) ( /*opaque*/void*, Addr ), Bool resteerCisOk, void* callback_opaque, const VexArchInfo* archinfo, @@ -31144,7 +31144,7 @@ Long dis_ESC_0F3A__VEX ( static DisResult disInstr_AMD64_WRK ( /*OUT*/Bool* expect_CAS, - Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ), + Bool (*resteerOkFn) ( /*opaque*/void*, Addr ), Bool resteerCisOk, void* callback_opaque, Long delta64, @@ -31779,7 +31779,7 @@ DisResult disInstr_AMD64_WRK ( is located in host memory at &guest_code[delta]. */ DisResult disInstr_AMD64 ( IRSB* irsb_IN, - Bool (*resteerOkFn) ( void*, Addr64 ), + Bool (*resteerOkFn) ( void*, Addr ), Bool resteerCisOk, void* callback_opaque, const UChar* guest_code_IN, diff --git a/VEX/priv/guest_arm64_defs.h b/VEX/priv/guest_arm64_defs.h index 3014bac23e..1b52aa787d 100644 --- a/VEX/priv/guest_arm64_defs.h +++ b/VEX/priv/guest_arm64_defs.h @@ -41,7 +41,7 @@ bb_to_IR.h. */ extern DisResult disInstr_ARM64 ( IRSB* irbb, - Bool (*resteerOkFn) ( void*, Addr64 ), + Bool (*resteerOkFn) ( void*, Addr ), Bool resteerCisOk, void* callback_opaque, const UChar* guest_code, diff --git a/VEX/priv/guest_arm64_toIR.c b/VEX/priv/guest_arm64_toIR.c index b8751ea596..6cc84726b6 100644 --- a/VEX/priv/guest_arm64_toIR.c +++ b/VEX/priv/guest_arm64_toIR.c @@ -12787,7 +12787,7 @@ Bool dis_ARM64_simd_and_fp(/*MB_OUT*/DisResult* dres, UInt insn) static Bool disInstr_ARM64_WRK ( /*MB_OUT*/DisResult* dres, - Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ), + Bool (*resteerOkFn) ( /*opaque*/void*, Addr ), Bool resteerCisOk, void* callback_opaque, const UChar* guest_instr, @@ -12966,7 +12966,7 @@ Bool disInstr_ARM64_WRK ( is located in host memory at &guest_code[delta]. */ DisResult disInstr_ARM64 ( IRSB* irsb_IN, - Bool (*resteerOkFn) ( void*, Addr64 ), + Bool (*resteerOkFn) ( void*, Addr ), Bool resteerCisOk, void* callback_opaque, const UChar* guest_code_IN, diff --git a/VEX/priv/guest_arm_defs.h b/VEX/priv/guest_arm_defs.h index b91af1d4e9..c03f2611ab 100644 --- a/VEX/priv/guest_arm_defs.h +++ b/VEX/priv/guest_arm_defs.h @@ -43,7 +43,7 @@ bb_to_IR.h. */ extern DisResult disInstr_ARM ( IRSB* irbb, - Bool (*resteerOkFn) ( void*, Addr64 ), + Bool (*resteerOkFn) ( void*, Addr ), Bool resteerCisOk, void* callback_opaque, const UChar* guest_code, diff --git a/VEX/priv/guest_arm_toIR.c b/VEX/priv/guest_arm_toIR.c index 5c63619c3c..1da4dddeba 100644 --- a/VEX/priv/guest_arm_toIR.c +++ b/VEX/priv/guest_arm_toIR.c @@ -14587,7 +14587,7 @@ static Bool decode_NV_instruction ( /*MOD*/DisResult* dres, static DisResult disInstr_ARM_WRK ( - Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ), + Bool (*resteerOkFn) ( /*opaque*/void*, Addr ), Bool resteerCisOk, void* callback_opaque, const UChar* guest_instr, @@ -15551,7 +15551,7 @@ DisResult disInstr_ARM_WRK ( if (condT == IRTemp_INVALID) { /* unconditional transfer to 'dst'. See if we can simply continue tracing at the destination. */ - if (resteerOkFn( callback_opaque, (Addr64)dst )) { + if (resteerOkFn( callback_opaque, dst )) { /* yes */ dres.whatNext = Dis_ResteerU; dres.continueAt = (Addr64)dst; @@ -15574,7 +15574,7 @@ DisResult disInstr_ARM_WRK ( && resteerCisOk && vex_control.guest_chase_cond && dst < guest_R15_curr_instr_notENC - && resteerOkFn( callback_opaque, (Addr64)(Addr32)dst) ) { + && resteerOkFn( callback_opaque, dst) ) { /* Speculation: assume this backward branch is taken. So we need to emit a side-exit to the insn following this one, on the negation of the condition, and continue at @@ -15594,8 +15594,7 @@ DisResult disInstr_ARM_WRK ( && vex_control.guest_chase_cond && dst >= guest_R15_curr_instr_notENC && resteerOkFn( callback_opaque, - (Addr64)(Addr32) - (guest_R15_curr_instr_notENC+4)) ) { + guest_R15_curr_instr_notENC+4) ) { /* Speculation: assume this forward branch is not taken. So we need to emit a side-exit to dst (the dest) and continue disassembling at the insn immediately @@ -17419,7 +17418,7 @@ static const UChar it_length_table[256]; /* fwds */ static DisResult disInstr_THUMB_WRK ( - Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ), + Bool (*resteerOkFn) ( /*opaque*/void*, Addr ), Bool resteerCisOk, void* callback_opaque, const UChar* guest_instr, @@ -22015,7 +22014,7 @@ static const UChar it_length_table[256] is located in host memory at &guest_code[delta]. */ DisResult disInstr_ARM ( IRSB* irsb_IN, - Bool (*resteerOkFn) ( void*, Addr64 ), + Bool (*resteerOkFn) ( void*, Addr ), Bool resteerCisOk, void* callback_opaque, const UChar* guest_code_IN, diff --git a/VEX/priv/guest_generic_bb_to_IR.c b/VEX/priv/guest_generic_bb_to_IR.c index d3c0ede540..cd17fda913 100644 --- a/VEX/priv/guest_generic_bb_to_IR.c +++ b/VEX/priv/guest_generic_bb_to_IR.c @@ -97,7 +97,7 @@ VEX_REGPARM(1) static ULong genericg_compute_checksum_8al_12 ( HWord first_w64 ); /* Small helpers */ -static Bool const_False ( void* callback_opaque, Addr64 a ) { +static Bool const_False ( void* callback_opaque, Addr a ) { return False; } @@ -185,7 +185,7 @@ IRSB* bb_to_IR ( /*IN*/ DisOneInstrFn dis_instr_fn, /*IN*/ const UChar* guest_code, /*IN*/ Addr64 guest_IP_bbstart, - /*IN*/ Bool (*chase_into_ok)(void*,Addr64), + /*IN*/ Bool (*chase_into_ok)(void*,Addr), /*IN*/ VexEndness host_endness, /*IN*/ Bool sigill_diag, /*IN*/ VexArch arch_guest, @@ -214,7 +214,7 @@ IRSB* bb_to_IR ( IRConst* guest_IP_bbstart_IRConst = NULL; Int n_cond_resteers_allowed = 2; - Bool (*resteerOKfn)(void*,Addr64) = NULL; + Bool (*resteerOKfn)(void*,Addr) = NULL; debug_print = toBool(vex_traceflags & VEX_TRACE_FE); diff --git a/VEX/priv/guest_generic_bb_to_IR.h b/VEX/priv/guest_generic_bb_to_IR.h index 93ad0f15dd..7bf65cf2af 100644 --- a/VEX/priv/guest_generic_bb_to_IR.h +++ b/VEX/priv/guest_generic_bb_to_IR.h @@ -124,7 +124,7 @@ typedef /* Return True iff resteering to the given addr is allowed (for branches/calls to destinations that are known at JIT-time) */ - /*IN*/ Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ), + /*IN*/ Bool (*resteerOkFn) ( /*opaque*/void*, Addr ), /* Should we speculatively resteer across conditional branches? (Experimental and not enabled by default). The strategy is @@ -175,7 +175,7 @@ IRSB* bb_to_IR ( /*IN*/ DisOneInstrFn dis_instr_fn, /*IN*/ const UChar* guest_code, /*IN*/ Addr64 guest_IP_bbstart, - /*IN*/ Bool (*chase_into_ok)(void*,Addr64), + /*IN*/ Bool (*chase_into_ok)(void*,Addr), /*IN*/ VexEndness host_endness, /*IN*/ Bool sigill_diag, /*IN*/ VexArch arch_guest, diff --git a/VEX/priv/guest_mips_defs.h b/VEX/priv/guest_mips_defs.h index 3a1ee94022..7cc2f885c9 100644 --- a/VEX/priv/guest_mips_defs.h +++ b/VEX/priv/guest_mips_defs.h @@ -42,7 +42,7 @@ /* Convert one MIPS insn to IR. See the type DisOneInstrFn in bb_to_IR.h. */ extern DisResult disInstr_MIPS ( IRSB* irbb, - Bool (*resteerOkFn) (void *, Addr64), + Bool (*resteerOkFn) (void *, Addr), Bool resteerCisOk, void* callback_opaque, const UChar* guest_code, diff --git a/VEX/priv/guest_mips_toIR.c b/VEX/priv/guest_mips_toIR.c index e40b7170e1..92c64af205 100644 --- a/VEX/priv/guest_mips_toIR.c +++ b/VEX/priv/guest_mips_toIR.c @@ -2064,7 +2064,7 @@ static Bool dis_instr_CCondFmt ( UInt cins ) /*--- Branch Instructions for mips64 ---*/ /*********************************************************/ static Bool dis_instr_branch ( UInt theInstr, DisResult * dres, - Bool(*resteerOkFn) (void *, Addr64), + Bool(*resteerOkFn) (void *, Addr), void *callback_opaque, IRStmt ** set ) { UInt jmpKind = 0; @@ -12008,7 +12008,7 @@ static UInt disDSPInstr_MIPS_WRK ( UInt cins ) here. */ static DisResult disInstr_MIPS_WRK ( Bool(*resteerOkFn) (/*opaque */void *, - Addr64), + Addr), Bool resteerCisOk, void* callback_opaque, Long delta64, @@ -17282,7 +17282,7 @@ static DisResult disInstr_MIPS_WRK ( Bool(*resteerOkFn) (/*opaque */void *, /* Disassemble a single instruction into IR. The instruction is located in host memory at &guest_code[delta]. */ DisResult disInstr_MIPS( IRSB* irsb_IN, - Bool (*resteerOkFn) ( void *, Addr64 ), + Bool (*resteerOkFn) ( void *, Addr ), Bool resteerCisOk, void* callback_opaque, const UChar* guest_code_IN, diff --git a/VEX/priv/guest_ppc_defs.h b/VEX/priv/guest_ppc_defs.h index b8798cf923..19cdcbe2ea 100644 --- a/VEX/priv/guest_ppc_defs.h +++ b/VEX/priv/guest_ppc_defs.h @@ -52,7 +52,7 @@ bb_to_IR.h. */ extern DisResult disInstr_PPC ( IRSB* irbb, - Bool (*resteerOkFn) ( void*, Addr64 ), + Bool (*resteerOkFn) ( void*, Addr ), Bool resteerCisOk, void* callback_opaque, const UChar* guest_code, diff --git a/VEX/priv/guest_ppc_toIR.c b/VEX/priv/guest_ppc_toIR.c index f4d0af3eb7..e603b6e10e 100644 --- a/VEX/priv/guest_ppc_toIR.c +++ b/VEX/priv/guest_ppc_toIR.c @@ -5686,7 +5686,7 @@ static IRExpr* /* :: Ity_I32 */ branch_cond_ok( UInt BO, UInt BI ) static Bool dis_branch ( UInt theInstr, const VexAbiInfo* vbi, /*OUT*/DisResult* dres, - Bool (*resteerOkFn)(void*,Addr64), + Bool (*resteerOkFn)(void*,Addr), void* callback_opaque ) { UChar opc1 = ifieldOPC(theInstr); @@ -18298,7 +18298,7 @@ static Bool dis_av_fp_convert ( UInt theInstr ) static Bool dis_transactional_memory ( UInt theInstr, UInt nextInstr, const VexAbiInfo* vbi, /*OUT*/DisResult* dres, - Bool (*resteerOkFn)(void*,Addr64), + Bool (*resteerOkFn)(void*,Addr), void* callback_opaque ) { UInt opc2 = IFIELD( theInstr, 1, 10 ); @@ -18701,7 +18701,7 @@ static UInt get_VSX60_opc2(UInt opc2_full) static DisResult disInstr_PPC_WRK ( - Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ), + Bool (*resteerOkFn) ( /*opaque*/void*, Addr ), Bool resteerCisOk, void* callback_opaque, Long delta64, @@ -20182,7 +20182,7 @@ DisResult disInstr_PPC_WRK ( is located in host memory at &guest_code[delta]. */ DisResult disInstr_PPC ( IRSB* irsb_IN, - Bool (*resteerOkFn) ( void*, Addr64 ), + Bool (*resteerOkFn) ( void*, Addr ), Bool resteerCisOk, void* callback_opaque, const UChar* guest_code_IN, diff --git a/VEX/priv/guest_s390_defs.h b/VEX/priv/guest_s390_defs.h index 3baececc55..de2cb6e6e7 100644 --- a/VEX/priv/guest_s390_defs.h +++ b/VEX/priv/guest_s390_defs.h @@ -41,7 +41,7 @@ /* Convert one s390 insn to IR. See the type DisOneInstrFn in bb_to_IR.h. */ DisResult disInstr_S390 ( IRSB* irbb, - Bool (*resteerOkFn) ( void*, Addr64 ), + Bool (*resteerOkFn) ( void*, Addr ), Bool resteerCisOk, void* callback_opaque, const UChar* guest_code, diff --git a/VEX/priv/guest_s390_toIR.c b/VEX/priv/guest_s390_toIR.c index 3c985ef6bb..98d78052ee 100644 --- a/VEX/priv/guest_s390_toIR.c +++ b/VEX/priv/guest_s390_toIR.c @@ -71,7 +71,7 @@ static Addr64 guest_IA_next_instr; static DisResult *dis_res; /* Resteer function and callback data */ -static Bool (*resteer_fn)(void *, Addr64); +static Bool (*resteer_fn)(void *, Addr); static void *resteer_data; /* Whether to print diagnostics for illegal instructions. */ @@ -16658,7 +16658,7 @@ disInstr_S390_WRK(const UChar *insn) DisResult disInstr_S390(IRSB *irsb_IN, - Bool (*resteerOkFn)(void *, Addr64), + Bool (*resteerOkFn)(void *, Addr), Bool resteerCisOk, void *callback_opaque, const UChar *guest_code, diff --git a/VEX/priv/guest_x86_defs.h b/VEX/priv/guest_x86_defs.h index e3c2eccc52..802b767b65 100644 --- a/VEX/priv/guest_x86_defs.h +++ b/VEX/priv/guest_x86_defs.h @@ -51,7 +51,7 @@ bb_to_IR.h. */ extern DisResult disInstr_X86 ( IRSB* irbb, - Bool (*resteerOkFn) ( void*, Addr64 ), + Bool (*resteerOkFn) ( void*, Addr ), Bool resteerCisOk, void* callback_opaque, const UChar* guest_code, diff --git a/VEX/priv/guest_x86_toIR.c b/VEX/priv/guest_x86_toIR.c index 12a96c95a2..893fcac719 100644 --- a/VEX/priv/guest_x86_toIR.c +++ b/VEX/priv/guest_x86_toIR.c @@ -8061,7 +8061,7 @@ static IRTemp math_BSWAP ( IRTemp t1, IRType ty ) static DisResult disInstr_X86_WRK ( /*OUT*/Bool* expect_CAS, - Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ), + Bool (*resteerOkFn) ( /*opaque*/void*, Addr ), Bool resteerCisOk, void* callback_opaque, Long delta64, @@ -13078,7 +13078,7 @@ DisResult disInstr_X86_WRK ( assign(t1, binop(Iop_Sub32, getIReg(4,R_ESP), mkU32(4))); putIReg(4, R_ESP, mkexpr(t1)); storeLE( mkexpr(t1), mkU32(guest_EIP_bbstart+delta)); - if (resteerOkFn( callback_opaque, (Addr64)(Addr32)d32 )) { + if (resteerOkFn( callback_opaque, (Addr32)d32 )) { /* follow into the call target. */ dres.whatNext = Dis_ResteerU; dres.continueAt = (Addr64)(Addr32)d32; @@ -13393,7 +13393,7 @@ DisResult disInstr_X86_WRK ( case 0xEB: /* Jb (jump, byte offset) */ d32 = (((Addr32)guest_EIP_bbstart)+delta+1) + getSDisp8(delta); delta++; - if (resteerOkFn( callback_opaque, (Addr64)(Addr32)d32) ) { + if (resteerOkFn( callback_opaque, (Addr32)d32) ) { dres.whatNext = Dis_ResteerU; dres.continueAt = (Addr64)(Addr32)d32; } else { @@ -13407,7 +13407,7 @@ DisResult disInstr_X86_WRK ( vassert(sz == 4); /* JRS added 2004 July 11 */ d32 = (((Addr32)guest_EIP_bbstart)+delta+sz) + getSDisp(sz,delta); delta += sz; - if (resteerOkFn( callback_opaque, (Addr64)(Addr32)d32) ) { + if (resteerOkFn( callback_opaque, (Addr32)d32) ) { dres.whatNext = Dis_ResteerU; dres.continueAt = (Addr64)(Addr32)d32; } else { @@ -13443,7 +13443,7 @@ DisResult disInstr_X86_WRK ( && vex_control.guest_chase_cond && (Addr32)d32 != (Addr32)guest_EIP_bbstart && jmpDelta < 0 - && resteerOkFn( callback_opaque, (Addr64)(Addr32)d32) ) { + && resteerOkFn( callback_opaque, (Addr32)d32) ) { /* Speculation: assume this backward branch is taken. So we need to emit a side-exit to the insn following this one, on the negation of the condition, and continue at the @@ -13465,7 +13465,7 @@ DisResult disInstr_X86_WRK ( && (Addr32)d32 != (Addr32)guest_EIP_bbstart && jmpDelta >= 0 && resteerOkFn( callback_opaque, - (Addr64)(Addr32)(guest_EIP_bbstart+delta)) ) { + (Addr32)(guest_EIP_bbstart+delta)) ) { /* Speculation: assume this forward branch is not taken. So we need to emit a side-exit to d32 (the dest) and continue disassembling at the insn immediately following this @@ -15007,7 +15007,7 @@ DisResult disInstr_X86_WRK ( && vex_control.guest_chase_cond && (Addr32)d32 != (Addr32)guest_EIP_bbstart && jmpDelta < 0 - && resteerOkFn( callback_opaque, (Addr64)(Addr32)d32) ) { + && resteerOkFn( callback_opaque, (Addr32)d32) ) { /* Speculation: assume this backward branch is taken. So we need to emit a side-exit to the insn following this one, on the negation of the condition, and continue at @@ -15030,7 +15030,7 @@ DisResult disInstr_X86_WRK ( && (Addr32)d32 != (Addr32)guest_EIP_bbstart && jmpDelta >= 0 && resteerOkFn( callback_opaque, - (Addr64)(Addr32)(guest_EIP_bbstart+delta)) ) { + (Addr32)(guest_EIP_bbstart+delta)) ) { /* Speculation: assume this forward branch is not taken. So we need to emit a side-exit to d32 (the dest) and continue disassembling at the insn immediately @@ -15408,7 +15408,7 @@ DisResult disInstr_X86_WRK ( is located in host memory at &guest_code[delta]. */ DisResult disInstr_X86 ( IRSB* irsb_IN, - Bool (*resteerOkFn) ( void*, Addr64 ), + Bool (*resteerOkFn) ( void*, Addr ), Bool resteerCisOk, void* callback_opaque, const UChar* guest_code_IN, diff --git a/VEX/priv/main_main.c b/VEX/priv/main_main.c index 7dc538e293..12f641d6b9 100644 --- a/VEX/priv/main_main.c +++ b/VEX/priv/main_main.c @@ -167,6 +167,8 @@ void LibVEX_Init ( vassert(sizeof(void*) == 4 || sizeof(void*) == 8); vassert(sizeof(void*) == sizeof(int*)); vassert(sizeof(void*) == sizeof(HWord)); + vassert(sizeof(void*) == sizeof(Addr)); + vassert(sizeof(unsigned long) == sizeof(SizeT)); vassert(VEX_HOST_WORDSIZE == sizeof(void*)); vassert(VEX_HOST_WORDSIZE == sizeof(HWord)); diff --git a/VEX/pub/libvex.h b/VEX/pub/libvex.h index bf8fad0284..3a5220c372 100644 --- a/VEX/pub/libvex.h +++ b/VEX/pub/libvex.h @@ -609,7 +609,7 @@ typedef /* Is it OK to chase into this guest address? May not be NULL. */ - Bool (*chase_into_ok) ( /*callback_opaque*/void*, Addr64 ); + Bool (*chase_into_ok) ( /*callback_opaque*/void*, Addr ); /* OUT: which bits of guest code actually got translated */ VexGuestExtents* guest_extents; diff --git a/VEX/pub/libvex_basictypes.h b/VEX/pub/libvex_basictypes.h index 68ba30aa3f..b62281ed80 100644 --- a/VEX/pub/libvex_basictypes.h +++ b/VEX/pub/libvex_basictypes.h @@ -132,6 +132,10 @@ static inline UInt toUInt ( Long x ) { typedef UInt Addr32; typedef ULong Addr64; +/* An address: 32-bit or 64-bit wide depending on host architecture */ +typedef unsigned long Addr; + + /* Something which has the same size as void* on the host. That is, it is 32 bits on a 32-bit host and 64 bits on a 64-bit host, and so it can safely be coerced to and from a pointer type on the host