From: Claudiu Beznea Date: Fri, 3 Apr 2026 14:13:38 +0000 (+0300) Subject: soc: renesas: r9a08g046-sysc: Move common code to a helper X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=f47cc240848124d739a6441df962cee7a0af6514;p=thirdparty%2Fkernel%2Flinux.git soc: renesas: r9a08g046-sysc: Move common code to a helper Move common code from rzg3l_regmap_{readable,writeable}_reg() to a helper and use it to avoid code duplication. Signed-off-by: Claudiu Beznea Reviewed-by: Geert Uytterhoeven Link: https://patch.msgid.link/20260403141341.2851926-3-claudiu.beznea.uj@bp.reneasas.com Signed-off-by: Geert Uytterhoeven --- diff --git a/drivers/soc/renesas/r9a08g046-sysc.c b/drivers/soc/renesas/r9a08g046-sysc.c index fd98df196d0a5..90db9d3835395 100644 --- a/drivers/soc/renesas/r9a08g046-sysc.c +++ b/drivers/soc/renesas/r9a08g046-sysc.c @@ -28,17 +28,14 @@ #define SYS_PWRRDY_N 0xd70 #define SYS_IPCONT_SEL_CLONECH 0xe2c -static bool rzg3l_regmap_readable_reg(struct device *dev, unsigned int reg) +static bool rzg3l_regmap_readable_writeable_reg(unsigned int reg) { switch (reg) { case SYS_XSPI_MAP_STAADD_CS0: case SYS_XSPI_MAP_ENDADD_CS0: case SYS_XSPI_MAP_STAADD_CS1: case SYS_XSPI_MAP_ENDADD_CS1: - case SYS_GETH0_CFG: - case SYS_GETH1_CFG: case SYS_PCIE_CFG: - case SYS_PCIE_MON: case SYS_PCIE_PHY: case SYS_I2C0_CFG: case SYS_I2C1_CFG: @@ -53,28 +50,26 @@ static bool rzg3l_regmap_readable_reg(struct device *dev, unsigned int reg) } } -static bool rzg3l_regmap_writeable_reg(struct device *dev, unsigned int reg) +static bool rzg3l_regmap_readable_reg(struct device *dev, unsigned int reg) { + if (rzg3l_regmap_readable_writeable_reg(reg)) + return true; + switch (reg) { - case SYS_XSPI_MAP_STAADD_CS0: - case SYS_XSPI_MAP_ENDADD_CS0: - case SYS_XSPI_MAP_STAADD_CS1: - case SYS_XSPI_MAP_ENDADD_CS1: - case SYS_PCIE_CFG: - case SYS_PCIE_PHY: - case SYS_I2C0_CFG: - case SYS_I2C1_CFG: - case SYS_I2C2_CFG: - case SYS_I2C3_CFG: - case SYS_I3C_CFG: - case SYS_PWRRDY_N: - case SYS_IPCONT_SEL_CLONECH: + case SYS_GETH0_CFG: + case SYS_GETH1_CFG: + case SYS_PCIE_MON: return true; default: return false; } } +static bool rzg3l_regmap_writeable_reg(struct device *dev, unsigned int reg) +{ + return rzg3l_regmap_readable_writeable_reg(reg); +} + static const struct rz_sysc_soc_id_init_data rzg3l_sysc_soc_id_init_data __initconst = { .family = "RZ/G3L", .id = 0x87d9447,