From: Julian Seward Date: Mon, 6 Feb 2006 04:20:51 +0000 (+0000) Subject: Regtest for a double -> unsigned int conversion that xlc generates X-Git-Tag: svn/VALGRIND_3_2_0~299 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=f553d268a71741a3b2b3ce068226eff0237affad;p=thirdparty%2Fvalgrind.git Regtest for a double -> unsigned int conversion that xlc generates inline, which requires observing rounding modes properly for fadd. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5612 --- diff --git a/none/tests/ppc32/Makefile.am b/none/tests/ppc32/Makefile.am index 56141d5613..3936f51935 100644 --- a/none/tests/ppc32/Makefile.am +++ b/none/tests/ppc32/Makefile.am @@ -8,10 +8,11 @@ EXTRA_DIST = $(noinst_SCRIPTS) \ jm-vmx.stderr.exp jm-vmx.stdout.exp jm-vmx.vgtest \ test_fx.stderr.exp test_fx.stdout.exp test_fx.vgtest \ test_gx.stderr.exp test_gx.stdout.exp test_gx.vgtest \ - testVMX.stderr.exp testVMX.stdout.exp testVMX.vgtest + testVMX.stderr.exp testVMX.stdout.exp testVMX.vgtest \ + xlc_dbl_u32.stderr.exp xlc_dbl_u32.stdout.exp xlc_dbl_u32.vgtest check_PROGRAMS = \ - lsw jm-insns test_fx test_gx testVMX + lsw jm-insns test_fx test_gx testVMX xlc_dbl_u32 AM_CFLAGS = $(WERROR) -Winline -Wall -Wshadow -g -I$(top_srcdir)/include \ @FLAG_M32@ diff --git a/none/tests/ppc32/xlc_dbl_u32.c b/none/tests/ppc32/xlc_dbl_u32.c new file mode 100644 index 0000000000..32a7b97e99 --- /dev/null +++ b/none/tests/ppc32/xlc_dbl_u32.c @@ -0,0 +1,62 @@ + +/* This is code generated by xlc -O3 for conversion of a double to an + unsigned 32-bit int, in a "floor" style. It relies on doing an + fadd with a non-standard rounding mode and so checks that V handles + the rounding mode correctly. r will be 1 if that is not so. */ + +#include + +extern unsigned int xlc_double_to_u32 ( double ); +asm("\n" +".text\n" +".global xlc_double_to_u32\n" +".type xlc_double_to_u32, @function\n" +"xlc_double_to_u32:\n" +" stwu %r1,-48(%r1)\n" +" addis %r4,%r0,.const_dr@ha\n" +" addis %r0,%r0,17376\n" +" fabs %f0,%f1\n" +" addi %r3,%r0,0\n" +" mffs %f3\n" +" mtfsb1 4*cr7+so\n" +" lfs %f2,.const_dr@l(%r4)\n" +" fcmpu 0,%f1,%f0\n" +" fadd %f0,%f0,%f2\n" +" mtfsf 255,%f3\n" +" stfd %f0,24(%r1)\n" +" bne- $+0x1c\n" +" lwz %r3,24(%r1)\n" +" subf %r0,%r3,%r0\n" +" srawi %r0,%r0,31\n" +" ori %r0,%r0,0x0000\n" +" lwz %r4,28(%r1)\n" +" or %r3,%r4,%r0\n" +" addi %r1,%r1,48\n" +" blr\n" +".size xlc_double_to_u32, . - xlc_double_to_u32\n" +" .long 0\n" +" .long 0x00000000\n" +" .long 0x00000000\n" +"\n" +" .section \".rodata\",\"a\"\n" +" .align 3\n" +" .type .const_dr,@object\n" +" .size .const_dr,20\n" +".const_dr:\n" +" .long 0x59804000\n" +" .long 0x49424d20\n" +" .long 0x3fe66666\n" +" .long 0x66666666\n" +" .long 0x25640a00\n" +); + +int main (int argc, char** argv) +{ + unsigned int r = xlc_double_to_u32 ( 0.7 ); + if (r == 0) + printf("pass\n"); + else + printf("fail\n"); + + return 0; +} diff --git a/none/tests/ppc32/xlc_dbl_u32.stderr.exp b/none/tests/ppc32/xlc_dbl_u32.stderr.exp new file mode 100644 index 0000000000..139597f9cb --- /dev/null +++ b/none/tests/ppc32/xlc_dbl_u32.stderr.exp @@ -0,0 +1,2 @@ + + diff --git a/none/tests/ppc32/xlc_dbl_u32.stdout.exp b/none/tests/ppc32/xlc_dbl_u32.stdout.exp new file mode 100644 index 0000000000..2ae28399f5 --- /dev/null +++ b/none/tests/ppc32/xlc_dbl_u32.stdout.exp @@ -0,0 +1 @@ +pass diff --git a/none/tests/ppc32/xlc_dbl_u32.vgtest b/none/tests/ppc32/xlc_dbl_u32.vgtest new file mode 100644 index 0000000000..482c01e27a --- /dev/null +++ b/none/tests/ppc32/xlc_dbl_u32.vgtest @@ -0,0 +1 @@ +prog: xlc_dbl_u32