From: Richard Earnshaw Date: Fri, 8 Dec 2023 16:04:17 +0000 (+0000) Subject: Revert "arm: vld1_types_x2 ACLE intrinsics" X-Git-Tag: basepoints/gcc-15~3810 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=f6d303dbb581af2d1d92a4df6ac9a4d57cb92942;p=thirdparty%2Fgcc.git Revert "arm: vld1_types_x2 ACLE intrinsics" This reverts commit 8fff3f065277f13176c320f22c4ed766a82c5d8e. --- diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h index 669b8fffb405..af1f747f2622 100644 --- a/gcc/config/arm/arm_neon.h +++ b/gcc/config/arm/arm_neon.h @@ -10307,15 +10307,6 @@ vld1_p64 (const poly64_t * __a) return (poly64x1_t) { *__a }; } -__extension__ extern __inline poly64x1x2_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_p64_x2 (const poly64_t * __a) -{ - union { poly64x1x2_t __i; __builtin_neon_ti __o; } __rv; - __rv.__o = __builtin_neon_vld1_x2di ((const __builtin_neon_di *) __a); - return __rv.__i; -} - #pragma GCC pop_options __extension__ extern __inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) @@ -10345,42 +10336,6 @@ vld1_s64 (const int64_t * __a) return (int64x1_t) { *__a }; } -__extension__ extern __inline int8x8x2_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_s8_x2 (const int8_t * __a) -{ - union { int8x8x2_t __i; __builtin_neon_ti __o; } __rv; - __rv.__o = __builtin_neon_vld1_x2v8qi ((const __builtin_neon_qi *) __a); - return __rv.__i; -} - -__extension__ extern __inline int16x4x2_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_s16_x2 (const int16_t * __a) -{ - union { int16x4x2_t __i; __builtin_neon_ti __o; } __rv; - __rv.__o = __builtin_neon_vld1_x2v4hi ((const __builtin_neon_hi *) __a); - return __rv.__i; -} - -__extension__ extern __inline int32x2x2_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_s32_x2 (const int32_t * __a) -{ - union { int32x2x2_t __i; __builtin_neon_ti __o; } __rv; - __rv.__o = __builtin_neon_vld1_x2v2si ((const __builtin_neon_si *) __a); - return __rv.__i; -} - -__extension__ extern __inline int64x1x2_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_s64_x2 (const int64_t * __a) -{ - union { int64x1x2_t __i; __builtin_neon_ti __o; } __rv; - __rv.__o = __builtin_neon_vld1_x2di ((const __builtin_neon_di *) __a); - return __rv.__i; -} - #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) __extension__ extern __inline float16x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) @@ -10397,26 +10352,6 @@ vld1_f32 (const float32_t * __a) return (float32x2_t)__builtin_neon_vld1v2sf ((const __builtin_neon_sf *) __a); } -#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) -__extension__ extern __inline float16x4x2_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_f16_x2 (const float16_t * __a) -{ - union { float16x4x2_t __i; __builtin_neon_ti __o; } __rv; - __rv.__o = __builtin_neon_vld1_x2v4hf (__a); - return __rv.__i; -} -#endif - -__extension__ extern __inline float32x2x2_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_f32_x2 (const float32_t * __a) -{ - union { float32x2x2_t __i; __builtin_neon_ti __o; } __rv; - __rv.__o = __builtin_neon_vld1_x2v2sf ((const __builtin_neon_sf *) __a); - return __rv.__i; -} - __extension__ extern __inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1_u8 (const uint8_t * __a) @@ -10445,42 +10380,6 @@ vld1_u64 (const uint64_t * __a) return (uint64x1_t) { *__a }; } -__extension__ extern __inline uint8x8x2_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_u8_x2 (const uint8_t * __a) -{ - union { uint8x8x2_t __i; __builtin_neon_ti __o; } __rv; - __rv.__o = __builtin_neon_vld1_x2v8qi ((const __builtin_neon_qi *) __a); - return __rv.__i; -} - -__extension__ extern __inline uint16x4x2_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_u16_x2 (const uint16_t * __a) -{ - union { uint16x4x2_t __i; __builtin_neon_ti __o; } __rv; - __rv.__o = __builtin_neon_vld1_x2v4hi ((const __builtin_neon_hi *) __a); - return __rv.__i; -} - -__extension__ extern __inline uint32x2x2_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_u32_x2 (const uint32_t * __a) -{ - union { uint32x2x2_t __i; __builtin_neon_ti __o; } __rv; - __rv.__o = __builtin_neon_vld1_x2v2si ((const __builtin_neon_si *) __a); - return __rv.__i; -} - -__extension__ extern __inline uint64x1x2_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_u64_x2 (const uint64_t * __a) -{ - union { uint64x1x2_t __i; __builtin_neon_ti __o; } __rv; - __rv.__o = __builtin_neon_vld1_x2di ((const __builtin_neon_di *) __a); - return __rv.__i; -} - __extension__ extern __inline poly8x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1_p8 (const poly8_t * __a) @@ -10495,24 +10394,6 @@ vld1_p16 (const poly16_t * __a) return (poly16x4_t)__builtin_neon_vld1v4hi ((const __builtin_neon_hi *) __a); } -__extension__ extern __inline poly8x8x2_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_p8_x2 (const poly8_t * __a) -{ - union { poly8x8x2_t __i; __builtin_neon_ti __o; } __rv; - __rv.__o = __builtin_neon_vld1_x2v8qi ((const __builtin_neon_qi *) __a); - return __rv.__i; -} - -__extension__ extern __inline poly16x4x2_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_p16_x2 (const poly16_t * __a) -{ - union { poly16x4x2_t __i; __builtin_neon_ti __o; } __rv; - __rv.__o = __builtin_neon_vld1_x2v4hi ((const __builtin_neon_hi *) __a); - return __rv.__i; -} - #pragma GCC push_options #pragma GCC target ("fpu=crypto-neon-fp-armv8") __extension__ extern __inline poly64x2_t @@ -10527,7 +10408,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_p64_x2 (const poly64_t * __a) { union { poly64x2x2_t __i; __builtin_neon_oi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x2v2di ((const __builtin_neon_di *) __a); + __rv.__o = __builtin_neon_vld1_x2v2di ((const __builtin_neon_di *) __a); return __rv.__i; } @@ -10583,7 +10464,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_s8_x2 (const int8_t * __a) { union { int8x16x2_t __i; __builtin_neon_oi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x2v16qi ((const __builtin_neon_qi *) __a); + __rv.__o = __builtin_neon_vld1_x2v16qi ((const __builtin_neon_qi *) __a); return __rv.__i; } @@ -10592,7 +10473,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_s16_x2 (const int16_t * __a) { union { int16x8x2_t __i; __builtin_neon_oi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x2v8hi ((const __builtin_neon_hi *) __a); + __rv.__o = __builtin_neon_vld1_x2v8hi ((const __builtin_neon_hi *) __a); return __rv.__i; } @@ -10601,7 +10482,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_s32_x2 (const int32_t * __a) { union { int32x4x2_t __i; __builtin_neon_oi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x2v4si ((const __builtin_neon_si *) __a); + __rv.__o = __builtin_neon_vld1_x2v4si ((const __builtin_neon_si *) __a); return __rv.__i; } @@ -10610,7 +10491,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_s64_x2 (const int64_t * __a) { union { int64x2x2_t __i; __builtin_neon_oi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x2v2di ((const __builtin_neon_di *) __a); + __rv.__o = __builtin_neon_vld1_x2v2di ((const __builtin_neon_di *) __a); return __rv.__i; } @@ -10708,7 +10589,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_f16_x2 (const float16_t * __a) { union { float16x8x2_t __i; __builtin_neon_oi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x2v8hf (__a); + __rv.__o = __builtin_neon_vld1_x2v8hf (__a); return __rv.__i; } #endif @@ -10718,7 +10599,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_f32_x2 (const float32_t * __a) { union { float32x4x2_t __i; __builtin_neon_oi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x2v4sf ((const __builtin_neon_sf *) __a); + __rv.__o = __builtin_neon_vld1_x2v4sf ((const __builtin_neon_sf *) __a); return __rv.__i; } @@ -10795,7 +10676,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_u8_x2 (const uint8_t * __a) { union { uint8x16x2_t __i; __builtin_neon_oi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x2v16qi ((const __builtin_neon_qi *) __a); + __rv.__o = __builtin_neon_vld1_x2v16qi ((const __builtin_neon_qi *) __a); return __rv.__i; } @@ -10804,7 +10685,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_u16_x2 (const uint16_t * __a) { union { uint16x8x2_t __i; __builtin_neon_oi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x2v8hi ((const __builtin_neon_hi *) __a); + __rv.__o = __builtin_neon_vld1_x2v8hi ((const __builtin_neon_hi *) __a); return __rv.__i; } @@ -10813,7 +10694,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_u32_x2 (const uint32_t * __a) { union { uint32x4x2_t __i; __builtin_neon_oi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x2v4si ((const __builtin_neon_si *) __a); + __rv.__o = __builtin_neon_vld1_x2v4si ((const __builtin_neon_si *) __a); return __rv.__i; } @@ -10822,7 +10703,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_u64_x2 (const uint64_t * __a) { union { uint64x2x2_t __i; __builtin_neon_oi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x2v2di ((const __builtin_neon_di *) __a); + __rv.__o = __builtin_neon_vld1_x2v2di ((const __builtin_neon_di *) __a); return __rv.__i; } @@ -10917,7 +10798,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_p8_x2 (const poly8_t * __a) { union { poly8x16x2_t __i; __builtin_neon_oi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x2v16qi ((const __builtin_neon_qi *) __a); + __rv.__o = __builtin_neon_vld1_x2v16qi ((const __builtin_neon_qi *) __a); return __rv.__i; } @@ -10926,7 +10807,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_p16_x2 (const poly16_t * __a) { union { poly16x8x2_t __i; __builtin_neon_oi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x2v8hi ((const __builtin_neon_hi *) __a); + __rv.__o = __builtin_neon_vld1_x2v8hi ((const __builtin_neon_hi *) __a); return __rv.__i; } @@ -20935,15 +20816,6 @@ vld1_bf16 (bfloat16_t const * __ptr) return __builtin_neon_vld1v4bf (__ptr); } -__extension__ extern __inline bfloat16x4x2_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_bf16_x2 (const bfloat16_t * __ptr) -{ - union { bfloat16x4x2_t __i; __builtin_neon_ti __o; } __rv; - __rv.__o = __builtin_neon_vld1_x2v4bf ((const __builtin_neon_bf *) __ptr); - return __rv.__i; -} - __extension__ extern __inline bfloat16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_bf16 (const bfloat16_t * __ptr) @@ -20956,7 +20828,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_bf16_x2 (const bfloat16_t * __ptr) { union { bfloat16x8x2_t __i; __builtin_neon_oi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x2v8bf ((const __builtin_neon_bf *) __ptr); + __rv.__o = __builtin_neon_vld1_x2v8bf ((const __builtin_neon_bf *) __ptr); return __rv.__i; } diff --git a/gcc/config/arm/arm_neon_builtins.def b/gcc/config/arm/arm_neon_builtins.def index 07750c03c087..55e097227485 100644 --- a/gcc/config/arm/arm_neon_builtins.def +++ b/gcc/config/arm/arm_neon_builtins.def @@ -301,8 +301,7 @@ VAR1 (TERNOP, vtbx4, v8qi) VAR13 (LOAD1, vld1, v8qi, v4hi, v4hf, v2si, v2sf, v16qi, v8hi, v8hf, v4si, v4sf, v2di, v4bf, v8bf) -VAR7 (LOAD1, vld1_x2, v8qi, v4hi, v2si, di, v4hf, v2sf, v4bf) -VAR7 (LOAD1, vld1q_x2, v16qi, v8hi, v4si, v2di, v8hf, v4sf, v8bf) +VAR7 (LOAD1, vld1_x2, v16qi, v8hi, v4si, v2di, v8hf, v4sf, v8bf) VAR7 (LOAD1, vld1_x3, v16qi, v8hi, v4si, v2di, v8hf, v4sf, v8bf) VAR7 (LOAD1, vld1_x4, v16qi, v8hi, v4si, v2di, v8hf, v4sf, v8bf) VAR12 (LOAD1LANE, vld1_lane, diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index 75add42777d8..e069ceb651c9 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -4957,11 +4957,11 @@ if (BYTES_BIG_ENDIAN) [(set_attr "type" "neon_load1_1reg")] ) -(define_insn "neon_vld1_x2" - [(set (match_operand:VMEMX2 0 "s_register_operand" "=w") - (unspec:VMEMX2 [(match_operand:VMEMX2 1 "neon_struct_operand" "Um") - (unspec:VDQX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VLD1))] +(define_insn "neon_vld1_x2" + [(set (match_operand:OI 0 "s_register_operand" "=w") + (unspec:OI [(match_operand:OI 1 "neon_struct_operand" "Um") + (unspec:VQXBF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] + UNSPEC_VLD1))] "TARGET_NEON" "vld1.\t%h0, %A1" [(set_attr "type" "neon_load1_2reg")] diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1_base_xN_1.c deleted file mode 100644 index 6b0e78d94d7c..000000000000 --- a/gcc/testsuite/gcc.target/arm/simd/vld1_base_xN_1.c +++ /dev/null @@ -1,66 +0,0 @@ -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -uint8x8x2_t test_vld1_u8_x2 (uint8_t * a) -{ - return vld1_u8_x2 (a); -} - -uint16x4x2_t test_vld1_u16_x2 (uint16_t * a) -{ - return vld1_u16_x2 (a); -} - -uint32x2x2_t test_vld1_u32_x2 (uint32_t * a) -{ - return vld1_u32_x2 (a); -} - -uint64x1x2_t test_vld1_u64_x2 (uint64_t * a) -{ - return vld1_u64_x2 (a); -} - -int8x8x2_t test_vld1_s8_x2 (int8_t * a) -{ - return vld1_s8_x2 (a); -} - -int16x4x2_t test_vld1_s16_x2 (int16_t * a) -{ - return vld1_s16_x2 (a); -} - -int32x2x2_t test_vld1_s32_x2 (int32_t * a) -{ - return vld1_s32_x2 (a); -} - -int64x1x2_t test_vld1_s64_x2 (int64_t * a) -{ - return vld1_s64_x2 (a); -} - -float32x2x2_t test_vld1_f32_x2 (float32_t * a) -{ - return vld1_f32_x2 (a); -} - -poly8x8x2_t test_vld1_p8_x2 (poly8_t * a) -{ - return vld1_p8_x2 (a); -} - -poly16x4x2_t test_vld1_p16_x2 (poly16_t * a) -{ - return vld1_p16_x2 (a); -} - -/* { dg-final { scan-assembler-times {vld1.8\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */ -/* { dg-final { scan-assembler-times {vld1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */ -/* { dg-final { scan-assembler-times {vld1.32\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */ -/* { dg-final { scan-assembler-times {vld1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 2 } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1_bf16_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1_bf16_xN_1.c deleted file mode 100644 index 3ec7a5e19864..000000000000 --- a/gcc/testsuite/gcc.target/arm/simd/vld1_bf16_xN_1.c +++ /dev/null @@ -1,13 +0,0 @@ -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_v8_2a_bf16_neon } */ - -#include "arm_neon.h" - -bfloat16x4x2_t test_vld1_bf16_x2 (bfloat16_t * a) -{ - return vld1_bf16_x2 (a); -} - -/* { dg-final { scan-assembler-times {vld1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 1 } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1_fp16_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1_fp16_xN_1.c deleted file mode 100644 index c0e5ea491424..000000000000 --- a/gcc/testsuite/gcc.target/arm/simd/vld1_fp16_xN_1.c +++ /dev/null @@ -1,13 +0,0 @@ -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_fp16_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon_fp16 } */ - -#include "arm_neon.h" - -float16x4x2_t test_vld1_f16_x2 (float16_t * a) -{ - return vld1_f16_x2 (a); -} - -/* { dg-final { scan-assembler-times {vld1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 1 } } */ diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1_p64_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1_p64_xN_1.c deleted file mode 100644 index 3ccea520ddc2..000000000000 --- a/gcc/testsuite/gcc.target/arm/simd/vld1_p64_xN_1.c +++ /dev/null @@ -1,13 +0,0 @@ -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -poly64x1x2_t test_vld1_p64_x2 (poly64_t * a) -{ - return vld1_p64_x2 (a); -} - -/* { dg-final { scan-assembler-times {vld1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 1 } } */