From: Julian Seward <jseward@acm.org>
Date: Wed, 3 Aug 2016 11:40:36 +0000 (+0000)
Subject: Add infrastructure for detection of 32-bit ARMv8 capable CPUs (Valgrind side).
X-Git-Tag: svn/VALGRIND_3_12_0~102
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=f8eca86bbf4f4847b3b8de4238efb1b6a56f3ee2;p=thirdparty%2Fvalgrind.git

Add infrastructure for detection of 32-bit ARMv8 capable CPUs (Valgrind side).


git-svn-id: svn://svn.valgrind.org/valgrind/trunk@15921
---

diff --git a/coregrind/m_initimg/initimg-linux.c b/coregrind/m_initimg/initimg-linux.c
index cb87c7e1c0..7abcea591f 100644
--- a/coregrind/m_initimg/initimg-linux.c
+++ b/coregrind/m_initimg/initimg-linux.c
@@ -691,8 +691,9 @@ Addr setup_client_stack( void*  init_sp,
                                "ARM has-neon from-auxv: %s\n",
                                has_neon ? "YES" : "NO");
               VG_(machine_arm_set_has_NEON)( has_neon );
-              #define VKI_HWCAP_TLS 32768
+#             define VKI_HWCAP_TLS 32768
               Bool has_tls = (auxv->u.a_val & VKI_HWCAP_TLS) > 0;
+#             undef VKI_HWCAP_TLS
               VG_(debugLog)(2, "initimg",
                                "ARM has-tls from-auxv: %s\n",
                                has_tls ? "YES" : "NO");
diff --git a/coregrind/m_machine.c b/coregrind/m_machine.c
index 34273d7a84..0384f873d0 100644
--- a/coregrind/m_machine.c
+++ b/coregrind/m_machine.c
@@ -1523,7 +1523,7 @@ Bool VG_(machine_get_hwcaps)( void )
      vki_sigaction_fromK_t saved_sigill_act, saved_sigfpe_act;
      vki_sigaction_toK_t     tmp_sigill_act,   tmp_sigfpe_act;
 
-     volatile Bool have_VFP, have_VFP2, have_VFP3, have_NEON;
+     volatile Bool have_VFP, have_VFP2, have_VFP3, have_NEON, have_V8;
      volatile Int archlevel;
      Int r;
 
@@ -1602,6 +1602,19 @@ Bool VG_(machine_get_hwcaps)( void )
         }
      }
 
+     /* ARMv8 insns */
+     have_V8 = True;
+     if (archlevel == 7) {
+        if (VG_MINIMAL_SETJMP(env_unsup_insn)) {
+           have_V8 = False;
+        } else {
+           __asm__ __volatile__(".word 0xF3044F54"); /* VMAXNM.F32 q2,q2,q2 */
+        }
+        if (have_V8 && have_NEON && have_VFP3) {
+           archlevel = 8;
+        }
+     }
+
      VG_(convert_sigaction_fromK_to_toK)(&saved_sigill_act, &tmp_sigill_act);
      VG_(convert_sigaction_fromK_to_toK)(&saved_sigfpe_act, &tmp_sigfpe_act);
      VG_(sigaction)(VKI_SIGILL, &tmp_sigill_act, NULL);