From: Sebastian Krzyszkowiak Date: Mon, 5 Jan 2026 20:39:41 +0000 (+0100) Subject: arm64: dts: imx8mq-librem5: Limit uSDHC2 frequency to 50MHz X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=f9774d6d4ba45cb345b17001861e5ecdf0b4c659;p=thirdparty%2Fkernel%2Flinux.git arm64: dts: imx8mq-librem5: Limit uSDHC2 frequency to 50MHz SparkLAN card has stability issues at 100MHz. It still appears to be able to max out its throughput this way, so limit the frequency to ensure stable operation. Signed-off-by: Sebastian Krzyszkowiak Reviewed-by: Peng Fan Signed-off-by: Shawn Guo --- diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi index 5e0bf127e7e5b..5bc9654cd436c 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi @@ -1424,7 +1424,7 @@ &usdhc2 { assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>; - assigned-clock-rates = <200000000>; + assigned-clock-rates = <50000000>; pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc2>; pinctrl-1 = <&pinctrl_usdhc2_100mhz>; @@ -1434,7 +1434,7 @@ mmc-pwrseq = <&usdhc2_pwrseq>; post-power-on-delay-ms = <20>; cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; - max-frequency = <100000000>; + max-frequency = <50000000>; disable-wp; cap-sdio-irq; keep-power-in-suspend;