From: Sasha Levin Date: Mon, 4 Dec 2023 19:51:05 +0000 (-0500) Subject: Drop iommu-vt-d-omit-devtlb-invalidation-requests-when-te.patch-28521 X-Git-Tag: v4.14.332~23^2~2 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=f9bb37823381d4e863fc33064067e9754c5bdbb7;p=thirdparty%2Fkernel%2Fstable-queue.git Drop iommu-vt-d-omit-devtlb-invalidation-requests-when-te.patch-28521 Signed-off-by: Sasha Levin --- diff --git a/queue-5.15/iommu-vt-d-omit-devtlb-invalidation-requests-when-te.patch-28521 b/queue-5.15/iommu-vt-d-omit-devtlb-invalidation-requests-when-te.patch-28521 deleted file mode 100644 index 2827a4ff3ff..00000000000 --- a/queue-5.15/iommu-vt-d-omit-devtlb-invalidation-requests-when-te.patch-28521 +++ /dev/null @@ -1,69 +0,0 @@ -From 14fb6de186bc26fde42e6f13e066dcad06086d2a Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Wed, 22 Nov 2023 11:26:03 +0800 -Subject: iommu/vt-d: Omit devTLB invalidation requests when TES=0 - -From: Lu Baolu - -[ Upstream commit 0f5432a9b839847dcfe9fa369d72e3d646102ddf ] - -The latest VT-d spec indicates that when remapping hardware is disabled -(TES=0 in Global Status Register), upstream ATS Invalidation Completion -requests are treated as UR (Unsupported Request). - -Consequently, the spec recommends in section 4.3 Handling of Device-TLB -Invalidations that software refrain from submitting any Device-TLB -invalidation requests when address remapping hardware is disabled. - -Verify address remapping hardware is enabled prior to submitting Device- -TLB invalidation requests. - -Fixes: 792fb43ce2c9 ("iommu/vt-d: Enable Intel IOMMU scalable mode by default") -Signed-off-by: Lu Baolu -Reviewed-by: Kevin Tian -Link: https://lore.kernel.org/r/20231114011036.70142-2-baolu.lu@linux.intel.com -Signed-off-by: Joerg Roedel -Signed-off-by: Sasha Levin ---- - drivers/iommu/intel/dmar.c | 18 ++++++++++++++++++ - 1 file changed, 18 insertions(+) - -diff --git a/drivers/iommu/intel/dmar.c b/drivers/iommu/intel/dmar.c -index 7c20083d4a798..0ad33d8d99d1f 100644 ---- a/drivers/iommu/intel/dmar.c -+++ b/drivers/iommu/intel/dmar.c -@@ -1518,6 +1518,15 @@ void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16 pfsid, - { - struct qi_desc desc; - -+ /* -+ * VT-d spec, section 4.3: -+ * -+ * Software is recommended to not submit any Device-TLB invalidation -+ * requests while address remapping hardware is disabled. -+ */ -+ if (!(iommu->gcmd & DMA_GCMD_TE)) -+ return; -+ - if (mask) { - addr |= (1ULL << (VTD_PAGE_SHIFT + mask - 1)) - 1; - desc.qw1 = QI_DEV_IOTLB_ADDR(addr) | QI_DEV_IOTLB_SIZE; -@@ -1583,6 +1592,15 @@ void qi_flush_dev_iotlb_pasid(struct intel_iommu *iommu, u16 sid, u16 pfsid, - unsigned long mask = 1UL << (VTD_PAGE_SHIFT + size_order - 1); - struct qi_desc desc = {.qw1 = 0, .qw2 = 0, .qw3 = 0}; - -+ /* -+ * VT-d spec, section 4.3: -+ * -+ * Software is recommended to not submit any Device-TLB invalidation -+ * requests while address remapping hardware is disabled. -+ */ -+ if (!(iommu->gcmd & DMA_GCMD_TE)) -+ return; -+ - desc.qw0 = QI_DEV_EIOTLB_PASID(pasid) | QI_DEV_EIOTLB_SID(sid) | - QI_DEV_EIOTLB_QDEP(qdep) | QI_DEIOTLB_TYPE | - QI_DEV_IOTLB_PFSID(pfsid); --- -2.42.0 - diff --git a/queue-5.15/series b/queue-5.15/series index 250db8d2482..9f5afa8885f 100644 --- a/queue-5.15/series +++ b/queue-5.15/series @@ -62,7 +62,6 @@ cpufreq-imx6q-don-t-disable-792-mhz-opp-unnecessaril.patch iommu-vt-d-omit-devtlb-invalidation-requests-when-te.patch iommu-vt-d-make-context-clearing-consistent-with-con.patch smb3-fix-touch-h-of-symlink.patch-27885 -iommu-vt-d-omit-devtlb-invalidation-requests-when-te.patch-28521 iommu-vt-d-make-context-clearing-consistent-with-con.patch-18873 mmc-core-add-helpers-mmc_regulator_enable-disable_vq.patch mmc-sdhci-sprd-fix-vqmmc-not-shutting-down-after-the.patch