From: Pan Li Date: Tue, 16 May 2023 06:42:18 +0000 (+0800) Subject: RISC-V: Adjust stdint.h to stdint-gcc.h for rvv tests X-Git-Tag: basepoints/gcc-15~9265 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=fa1c2ec1bb5e6363839dce55421cdc6c3dd19726;p=thirdparty%2Fgcc.git RISC-V: Adjust stdint.h to stdint-gcc.h for rvv tests This patch would like to align the stdint.h to the stdint-gcc.h for all the RVV test files. Aka: stdint.h => stdint-gcc.h Signed-off-by: Pan Li gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h: Replace stdint.h with stdint-gcc.h. * gcc.target/riscv/rvv/autovec/binop/shift-template.h: Ditto. * gcc.target/riscv/rvv/autovec/binop/vadd-template.h: Ditto. * gcc.target/riscv/rvv/autovec/binop/vand-template.h: Ditto. * gcc.target/riscv/rvv/autovec/binop/vdiv-template.h: Ditto. * gcc.target/riscv/rvv/autovec/binop/vmax-template.h: Ditto. * gcc.target/riscv/rvv/autovec/binop/vmin-template.h: Ditto. * gcc.target/riscv/rvv/autovec/binop/vmul-template.h: Ditto. * gcc.target/riscv/rvv/autovec/binop/vor-template.h: Ditto. * gcc.target/riscv/rvv/autovec/binop/vrem-template.h: Ditto. * gcc.target/riscv/rvv/autovec/binop/vsub-template.h: Ditto. * gcc.target/riscv/rvv/autovec/binop/vxor-template.h: Ditto. * gcc.target/riscv/rvv/autovec/series-1.c: Ditto. * gcc.target/riscv/rvv/autovec/vmv-imm-run.c: Ditto. * gcc.target/riscv/rvv/autovec/vmv-imm-template.h: Ditto. --- diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h index a0ddc00849da..8d1cefdca85a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h @@ -2,7 +2,7 @@ /* { dg-do run } */ /* { dg-additional-options "-std=c99 --param=riscv-autovec-preference=scalable -fno-vect-cost-model --save-temps" } */ -#include +#include #include #define SHIFTL(TYPE,VAL) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-template.h index 64e0a386b064..16ae48c8edec 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST1_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-template.h index 5ed79329138a..cd945d471d24 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vand-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vand-template.h index 7d02c83d1640..5cabe0730978 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vand-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vand-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vdiv-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vdiv-template.h index 7fbba7b41333..12a1de328744 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vdiv-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vdiv-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmax-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmax-template.h index df0f9f2aeebb..fc6a07e3ce9d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmax-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmax-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmin-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmin-template.h index 459f58ddec16..06f6b95461e2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmin-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmin-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-template.h index b029c06efd6e..37f77972101d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vor-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vor-template.h index 859ae67c5eee..e60146cc2328 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vor-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vor-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-template.h index 71eebc8b6450..d5ef40667ff8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-template.h index 0566f3dcbfbc..8c0a9c992171 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vxor-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vxor-template.h index 954a247f539c..370b242f1979 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vxor-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vxor-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/series-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/series-1.c index a01f6ce7411a..1c697228e9b3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/series-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/series-1.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-march=rv32gcv -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax --param riscv-autovec-lmul=m4" } */ -#include +#include #define NUM_ELEMS(TYPE) (64 / sizeof (TYPE)) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c index 309a296b686d..6764110d4613 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c @@ -3,7 +3,7 @@ #include "vmv-imm-template.h" -#include +#include #include #define SZ 512 diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-template.h index 93ba5204c2e9..855343d7e3e6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-template.h @@ -1,4 +1,4 @@ -#include +#include #include #define VMV_POS(TYPE,VAL) \