From: Ilya Leoshkevich Date: Mon, 23 Nov 2020 20:13:40 +0000 (+0100) Subject: IBM Z: Update autovec-*-quiet-uneq expectations X-Git-Tag: basepoints/gcc-12~2946 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=fbd4553d99bc918b645194da1dba9e8f5f1cdece;p=thirdparty%2Fgcc.git IBM Z: Update autovec-*-quiet-uneq expectations Commit 229752afe315 ("VEC_COND_EXPR optimizations") has improved code generation: we no longer need "vx x,x,-1", which turned out to be superfluous. Instead, we simply swap 0 and -1 arguments of the preceding "vsel". gcc/testsuite/ChangeLog: 2020-11-23 Ilya Leoshkevich * gcc.target/s390/zvector/autovec-double-quiet-uneq.c: Expect that "vx" is not emitted. * gcc.target/s390/zvector/autovec-float-quiet-uneq.c: Likewise. --- diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-uneq.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-uneq.c index 3d6da30beacd..7c9b20fd2e0f 100644 --- a/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-uneq.c +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-double-quiet-uneq.c @@ -5,6 +5,9 @@ AUTOVEC_DOUBLE (QUIET_UNEQ); +/* { dg-final { scan-assembler {\n\tvzero\t} } } */ +/* { dg-final { scan-assembler {\n\tvgmg\t} } } */ /* { dg-final { scan-assembler-times {\n\tvfchdb\t} 2 } } */ /* { dg-final { scan-assembler {\n\tvo\t} } } */ -/* { dg-final { scan-assembler {\n\tvx\t} } } */ +/* { dg-final { scan-assembler {\n\tvsel\t} } } */ +/* { dg-final { scan-assembler-not {\n\tvx\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-uneq.c b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-uneq.c index 1df53a99bc8c..5ab9337880d0 100644 --- a/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-uneq.c +++ b/gcc/testsuite/gcc.target/s390/zvector/autovec-float-quiet-uneq.c @@ -5,6 +5,9 @@ AUTOVEC_FLOAT (QUIET_UNEQ); +/* { dg-final { scan-assembler {\n\tvzero\t} } } */ +/* { dg-final { scan-assembler {\n\tvgmf\t} } } */ /* { dg-final { scan-assembler-times {\n\tvfchsb\t} 2 } } */ /* { dg-final { scan-assembler {\n\tvo\t} } } */ -/* { dg-final { scan-assembler {\n\tvx\t} } } */ +/* { dg-final { scan-assembler {\n\tvsel\t} } } */ +/* { dg-final { scan-assembler-not {\n\tvx\t} } } */