From: Pan Li <pan2.li@intel.com>
Date: Sun, 18 Jun 2023 23:36:41 +0000 (+0800)
Subject: RISC-V: Fix one typo for reduc expand GET_MODE_CLASS
X-Git-Tag: basepoints/gcc-15~8225
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=fcf4e50f852e6c3e7ce777573b282c26b85a7d77;p=thirdparty%2Fgcc.git

RISC-V: Fix one typo for reduc expand GET_MODE_CLASS

This patch would like to fix one typo when GET_MODE_CLASS by mode.

Signed-off-by: Pan Li <pan2.li@intel.com>

gcc/ChangeLog:

	* config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
---

diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc b/gcc/config/riscv/riscv-vector-builtins-bases.cc
index 53bd0ed2534c..b11b544291ad 100644
--- a/gcc/config/riscv/riscv-vector-builtins-bases.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc
@@ -1400,7 +1400,7 @@ public:
     machine_mode ret_mode = e.ret_mode ();
 
     /* TODO: we will use ret_mode after all types of PR110265 are addressed.  */
-    if ((GET_MODE_CLASS (MODE) == MODE_VECTOR_FLOAT)
+    if ((GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
        || GET_MODE_INNER (mode) != GET_MODE_INNER (ret_mode))
       return e.use_exact_insn (
 	code_for_pred_reduc (CODE, e.vector_mode (), e.vector_mode ()));