From: Jeff Law <jlaw@ventanamicro.com>
Date: Sun, 23 Jun 2024 14:26:25 +0000 (-0600)
Subject: [committed][RISC-V][PR target/114139] Verify we have a CONST_INT before extracting... 
X-Git-Tag: basepoints/gcc-16~7987
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=fd536b8412d4dae42aa04739c06f99a915be6261;p=thirdparty%2Fgcc.git

[committed][RISC-V][PR target/114139] Verify we have a CONST_INT before extracting INTVAL

Run-of-the-mill checking issue.  We had something like (plus (reg) (reg)) and
tried to extract INTVAL (XEXP (x, 1)) which of course blows up with checking
on.

Fixed thusly.   Tested on riscv32-elf in my tester.  riscv64-elf is in flight,
but won't finish for a while due to other tasks in flight.

	PR target/114139
gcc/
	* config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Verify object
	is a CONST_INT before looking at INTVAL.

gcc/testsuite/

	* gcc.target/riscv/pr114139.c: New test.
---

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index c17141d909a..5c758b95327 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -9242,6 +9242,7 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr)
 	  && XINT (SET_SRC (prev_set), 1) == UNSPEC_AUIPC
 	  && (GET_CODE (SET_SRC (curr_set)) == LO_SUM
 	      || (GET_CODE (SET_SRC (curr_set)) == PLUS
+		  && CONST_INT_P (XEXP (SET_SRC (curr_set), 1))
 		  && SMALL_OPERAND (INTVAL (XEXP (SET_SRC (curr_set), 1))))))
 
 	return true;
diff --git a/gcc/testsuite/gcc.target/riscv/pr114139.c b/gcc/testsuite/gcc.target/riscv/pr114139.c
new file mode 100644
index 00000000000..1d4eeb65f5c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr114139.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fpic -mexplicit-relocs -mcpu=sifive-p450" } */
+
+static void *p;
+extern void *a[];
+void
+baz (void)
+{
+  p = 0;
+}
+
+void bar (void);
+void
+foo (int i)
+{
+  bar ();
+  a[i] = p;
+}
+
+
+double *d;
+void
+foobar (int i)
+{
+  for (; i; ++i)
+    d[i] = 1;
+}