From: Peter Krempa <pkrempa@redhat.com>
Date: Thu, 13 Oct 2022 14:13:47 +0000 (+0200)
Subject: schema: domain: Allow interleaving of PCI controller config elements
X-Git-Tag: v8.10.0-rc1~284
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=fde40ee4f47287d2ce61449003a26495896c16e6;p=thirdparty%2Flibvirt.git

schema: domain: Allow interleaving of PCI controller config elements

The 'model' and 'target' element can be freely moved around.

Signed-off-by: Peter Krempa <pkrempa@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
---

diff --git a/src/conf/schemas/domaincommon.rng b/src/conf/schemas/domaincommon.rng
index 49a61d2748..ecc9cd41c4 100644
--- a/src/conf/schemas/domaincommon.rng
+++ b/src/conf/schemas/domaincommon.rng
@@ -2691,103 +2691,105 @@
             <attribute name="type">
               <value>pci</value>
             </attribute>
-            <optional>
-              <element name="model">
-                <attribute name="name">
-                  <choice>
-                    <!-- implementations of "pci-root" -->
-                    <value>spapr-pci-host-bridge</value>
-                    <!-- implementations of "pci-bridge" -->
-                    <value>pci-bridge</value>
-                    <!-- implementations of "dmi-to-pci-bridge" -->
-                    <value>i82801b11-bridge</value>
-                    <!-- implementations of "pcie-to-pci-bridge" -->
-                    <value>pcie-pci-bridge</value>
-                    <!-- implementations of "pcie-root-port" -->
-                    <value>ioh3420</value>
-                    <value>pcie-root-port</value>
-                    <!-- implementations of "pcie-switch-upstream-port" -->
-                    <value>x3130-upstream</value>
-                    <!-- implementations of "pcie-switch-downstream-port" -->
-                    <value>xio3130-downstream</value>
-                    <!-- implementations of "pci-expander-bus" -->
-                    <value>pxb</value>
-                    <!-- implementations of "pcie-expander-bus" -->
-                    <value>pxb-pcie</value>
-                  </choice>
-                </attribute>
-                <empty/>
-              </element>
-            </optional>
-            <optional>
-              <element name="target">
-                <optional>
-                  <attribute name="chassisNr">
-                    <ref name="uint8"/>
-                  </attribute>
-                </optional>
-                <optional>
-                  <attribute name="chassis">
-                    <ref name="uint8"/>
-                  </attribute>
-                </optional>
-                <optional>
-                  <attribute name="port">
-                    <ref name="uint8"/>
-                  </attribute>
-                </optional>
-                <optional>
-                  <attribute name="busNr">
-                    <ref name="uint8"/>
+            <interleave>
+              <optional>
+                <element name="model">
+                  <attribute name="name">
+                    <choice>
+                      <!-- implementations of "pci-root" -->
+                      <value>spapr-pci-host-bridge</value>
+                      <!-- implementations of "pci-bridge" -->
+                      <value>pci-bridge</value>
+                      <!-- implementations of "dmi-to-pci-bridge" -->
+                      <value>i82801b11-bridge</value>
+                      <!-- implementations of "pcie-to-pci-bridge" -->
+                      <value>pcie-pci-bridge</value>
+                      <!-- implementations of "pcie-root-port" -->
+                      <value>ioh3420</value>
+                      <value>pcie-root-port</value>
+                      <!-- implementations of "pcie-switch-upstream-port" -->
+                      <value>x3130-upstream</value>
+                      <!-- implementations of "pcie-switch-downstream-port" -->
+                      <value>xio3130-downstream</value>
+                      <!-- implementations of "pci-expander-bus" -->
+                      <value>pxb</value>
+                      <!-- implementations of "pcie-expander-bus" -->
+                      <value>pxb-pcie</value>
+                    </choice>
                   </attribute>
-                </optional>
-                <optional>
-                  <attribute name="index">
-                    <ref name="uint8"/>
+                  <empty/>
+                </element>
+              </optional>
+              <optional>
+                <element name="target">
+                  <optional>
+                    <attribute name="chassisNr">
+                      <ref name="uint8"/>
+                    </attribute>
+                  </optional>
+                  <optional>
+                    <attribute name="chassis">
+                      <ref name="uint8"/>
+                    </attribute>
+                  </optional>
+                  <optional>
+                    <attribute name="port">
+                      <ref name="uint8"/>
+                    </attribute>
+                  </optional>
+                  <optional>
+                    <attribute name="busNr">
+                      <ref name="uint8"/>
+                    </attribute>
+                  </optional>
+                  <optional>
+                    <attribute name="index">
+                      <ref name="uint8"/>
+                    </attribute>
+                  </optional>
+                  <optional>
+                    <attribute name="hotplug">
+                      <ref name="virOnOff"/>
+                    </attribute>
+                  </optional>
+                  <optional>
+                    <element name="node">
+                      <ref name="unsignedInt"/>
+                    </element>
+                  </optional>
+                </element>
+              </optional>
+              <!-- *-root controllers have an optional element "pcihole64"-->
+              <choice>
+                <group>
+                  <attribute name="model">
+                    <choice>
+                      <value>pci-root</value>
+                      <value>pcie-root</value>
+                    </choice>
                   </attribute>
-                </optional>
-                <optional>
-                  <attribute name="hotplug">
-                    <ref name="virOnOff"/>
+                  <optional>
+                    <element name="pcihole64">
+                      <ref name="scaledInteger"/>
+                    </element>
+                  </optional>
+                </group>
+                <group>
+                  <attribute name="model">
+                    <choice>
+                      <value>pci-bridge</value>
+                      <value>dmi-to-pci-bridge</value>
+                      <value>pcie-to-pci-bridge</value>
+                      <value>pcie-root-port</value>
+                      <value>pcie-switch-upstream-port</value>
+                      <value>pcie-switch-downstream-port</value>
+                      <value>pci-expander-bus</value>
+                      <value>pcie-expander-bus</value>
+                    </choice>
                   </attribute>
-                </optional>
-                <optional>
-                  <element name="node">
-                    <ref name="unsignedInt"/>
-                  </element>
-                </optional>
-              </element>
-            </optional>
-            <!-- *-root controllers have an optional element "pcihole64"-->
-            <choice>
-              <group>
-                <attribute name="model">
-                  <choice>
-                    <value>pci-root</value>
-                    <value>pcie-root</value>
-                  </choice>
-                </attribute>
-                <optional>
-                  <element name="pcihole64">
-                    <ref name="scaledInteger"/>
-                  </element>
-                </optional>
-              </group>
-              <group>
-                <attribute name="model">
-                  <choice>
-                    <value>pci-bridge</value>
-                    <value>dmi-to-pci-bridge</value>
-                    <value>pcie-to-pci-bridge</value>
-                    <value>pcie-root-port</value>
-                    <value>pcie-switch-upstream-port</value>
-                    <value>pcie-switch-downstream-port</value>
-                    <value>pci-expander-bus</value>
-                    <value>pcie-expander-bus</value>
-                  </choice>
-                </attribute>
-              </group>
-            </choice>
+                </group>
+              </choice>
+            </interleave>
           </group>
           <!-- virtio-serial has optional "ports" and "vectors" -->
           <group>