From: Shiji Yang Date: Tue, 6 Jan 2026 12:19:30 +0000 (+0800) Subject: mediatek: backport various pinctrl fixes X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=refs%2Fpull%2F21423%2Fhead;p=thirdparty%2Fopenwrt.git mediatek: backport various pinctrl fixes Backport patches from upstream linux and mtk-openwrt-feeds to fix MT7981 register offset issue and correct MT798x IES register config. Signed-off-by: Shiji Yang Link: https://github.com/openwrt/openwrt/pull/21423 Signed-off-by: Hauke Mehrtens --- diff --git a/target/linux/mediatek/patches-6.12/070-v7.0-pinctrl-mediatek-enable-ies_present-flag-for-MT798x.patch b/target/linux/mediatek/patches-6.12/070-v7.0-pinctrl-mediatek-enable-ies_present-flag-for-MT798x.patch new file mode 100644 index 00000000000..47263733ac9 --- /dev/null +++ b/target/linux/mediatek/patches-6.12/070-v7.0-pinctrl-mediatek-enable-ies_present-flag-for-MT798x.patch @@ -0,0 +1,59 @@ +From 6da9f0cc2717158857f8b8b9369523d0d6770c07 Mon Sep 17 00:00:00 2001 +From: Shiji Yang +Date: Sat, 17 Jan 2026 11:04:37 +0800 +Subject: [PATCH] pinctrl: mediatek: enable ies_present flag for MT798x + +The MT798x series SoCs have IES regiter definitions. I think we +must enable the ies_present flag to correctly configure the pin +input mode. + +Signed-off-by: Shiji Yang +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/mediatek/pinctrl-mt7981.c | 2 +- + drivers/pinctrl/mediatek/pinctrl-mt7986.c | 4 ++-- + drivers/pinctrl/mediatek/pinctrl-mt7988.c | 2 +- + 3 files changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/pinctrl/mediatek/pinctrl-mt7981.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt7981.c +@@ -1019,7 +1019,7 @@ static struct mtk_pin_soc mt7981_data = + .nfuncs = ARRAY_SIZE(mt7981_functions), + .eint_hw = &mt7981_eint_hw, + .gpio_m = 0, +- .ies_present = false, ++ .ies_present = true, + .base_names = mt7981_pinctrl_register_base_names, + .nbase_names = ARRAY_SIZE(mt7981_pinctrl_register_base_names), + .bias_disable_set = mtk_pinconf_bias_disable_set, +--- a/drivers/pinctrl/mediatek/pinctrl-mt7986.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt7986.c +@@ -919,7 +919,7 @@ static struct mtk_pin_soc mt7986a_data = + .nfuncs = ARRAY_SIZE(mt7986_functions), + .eint_hw = &mt7986a_eint_hw, + .gpio_m = 0, +- .ies_present = false, ++ .ies_present = true, + .base_names = mt7986_pinctrl_register_base_names, + .nbase_names = ARRAY_SIZE(mt7986_pinctrl_register_base_names), + .bias_disable_set = mtk_pinconf_bias_disable_set, +@@ -945,7 +945,7 @@ static struct mtk_pin_soc mt7986b_data = + .nfuncs = ARRAY_SIZE(mt7986_functions), + .eint_hw = &mt7986b_eint_hw, + .gpio_m = 0, +- .ies_present = false, ++ .ies_present = true, + .base_names = mt7986_pinctrl_register_base_names, + .nbase_names = ARRAY_SIZE(mt7986_pinctrl_register_base_names), + .bias_disable_set = mtk_pinconf_bias_disable_set, +--- a/drivers/pinctrl/mediatek/pinctrl-mt7988.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt7988.c +@@ -1515,7 +1515,7 @@ static const struct mtk_pin_soc mt7988_d + .nfuncs = ARRAY_SIZE(mt7988_functions), + .eint_hw = &mt7988_eint_hw, + .gpio_m = 0, +- .ies_present = false, ++ .ies_present = true, + .base_names = mt7988_pinctrl_register_base_names, + .nbase_names = ARRAY_SIZE(mt7988_pinctrl_register_base_names), + .bias_disable_set = mtk_pinconf_bias_disable_set, diff --git a/target/linux/mediatek/patches-6.12/119-pinctrl-mediatek-MT7981-some-register-map-fixes.patch b/target/linux/mediatek/patches-6.12/119-pinctrl-mediatek-MT7981-some-register-map-fixes.patch new file mode 100644 index 00000000000..fce45298aaa --- /dev/null +++ b/target/linux/mediatek/patches-6.12/119-pinctrl-mediatek-MT7981-some-register-map-fixes.patch @@ -0,0 +1,76 @@ +From 2b4d8df6054acb13cae20889c40102c93df2edd6 Mon Sep 17 00:00:00 2001 +From: developer +Date: Tue, 6 Jan 2026 19:52:11 +0800 +Subject: [PATCH] pinctrl: mediatek: MT7981: some register map fixes + +Fix mt7981 pinctrl setting mistake including: +1) Wrong pinctrl bits length +2) Wrong pinctrl register offset + +Link: https://git01.mediatek.com/plugins/gitiles/openwrt/feeds/mtk-openwrt-feeds/+/52579dd19e62df5aff784462e133e14bfe4a7726 +Signed-off-by: Shiji Yang +--- + drivers/pinctrl/mediatek/pinctrl-mt7981.c | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +--- a/drivers/pinctrl/mediatek/pinctrl-mt7981.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt7981.c +@@ -48,7 +48,7 @@ static const struct mtk_pin_field_calc m + + PIN_FIELD_BASE(9, 9, 5, 0x20, 0x10, 9, 1), + PIN_FIELD_BASE(10, 10, 5, 0x20, 0x10, 8, 1), +- PIN_FIELD_BASE(11, 11, 5, 0x40, 0x10, 10, 1), ++ PIN_FIELD_BASE(11, 11, 5, 0x20, 0x10, 10, 1), + PIN_FIELD_BASE(12, 12, 5, 0x20, 0x10, 7, 1), + PIN_FIELD_BASE(13, 13, 5, 0x20, 0x10, 11, 1), + +@@ -157,7 +157,7 @@ static const struct mtk_pin_field_calc m + PIN_FIELD_BASE(41, 41, 7, 0x70, 0x10, 0, 1), + PIN_FIELD_BASE(42, 42, 7, 0x70, 0x10, 9, 1), + PIN_FIELD_BASE(43, 43, 7, 0x70, 0x10, 7, 1), +- PIN_FIELD_BASE(44, 44, 7, 0x30, 0x10, 8, 1), ++ PIN_FIELD_BASE(44, 44, 7, 0x70, 0x10, 8, 1), + PIN_FIELD_BASE(45, 45, 7, 0x70, 0x10, 3, 1), + PIN_FIELD_BASE(46, 46, 7, 0x70, 0x10, 4, 1), + PIN_FIELD_BASE(47, 47, 7, 0x70, 0x10, 5, 1), +@@ -221,8 +221,8 @@ static const struct mtk_pin_field_calc m + + PIN_FIELD_BASE(2, 2, 5, 0x00, 0x10, 18, 3), + +- PIN_FIELD_BASE(3, 3, 4, 0x00, 0x10, 18, 1), +- PIN_FIELD_BASE(4, 4, 4, 0x00, 0x10, 6, 1), ++ PIN_FIELD_BASE(3, 3, 4, 0x00, 0x10, 18, 3), ++ PIN_FIELD_BASE(4, 4, 4, 0x00, 0x10, 6, 3), + PIN_FIELD_BASE(5, 5, 4, 0x00, 0x10, 3, 3), + PIN_FIELD_BASE(6, 6, 4, 0x00, 0x10, 9, 3), + PIN_FIELD_BASE(7, 7, 4, 0x00, 0x10, 0, 3), +@@ -230,9 +230,9 @@ static const struct mtk_pin_field_calc m + + PIN_FIELD_BASE(9, 9, 5, 0x00, 0x10, 27, 3), + PIN_FIELD_BASE(10, 10, 5, 0x00, 0x10, 24, 3), +- PIN_FIELD_BASE(11, 11, 5, 0x00, 0x10, 0, 3), ++ PIN_FIELD_BASE(11, 11, 5, 0x10, 0x10, 0, 3), + PIN_FIELD_BASE(12, 12, 5, 0x00, 0x10, 21, 3), +- PIN_FIELD_BASE(13, 13, 5, 0x00, 0x10, 3, 3), ++ PIN_FIELD_BASE(13, 13, 5, 0x10, 0x10, 3, 3), + + PIN_FIELD_BASE(14, 14, 4, 0x00, 0x10, 27, 3), + +@@ -244,7 +244,7 @@ static const struct mtk_pin_field_calc m + PIN_FIELD_BASE(20, 20, 2, 0x00, 0x10, 9, 3), + PIN_FIELD_BASE(21, 21, 2, 0x00, 0x10, 18, 3), + PIN_FIELD_BASE(22, 22, 2, 0x00, 0x10, 21, 3), +- PIN_FIELD_BASE(23, 23, 2, 0x00, 0x10, 0, 3), ++ PIN_FIELD_BASE(23, 23, 2, 0x10, 0x10, 0, 3), + PIN_FIELD_BASE(24, 24, 2, 0x00, 0x10, 27, 3), + PIN_FIELD_BASE(25, 25, 2, 0x00, 0x10, 24, 3), + +@@ -310,7 +310,7 @@ static const struct mtk_pin_field_calc m + PIN_FIELD_BASE(17, 17, 2, 0x30, 0x10, 5, 1), + PIN_FIELD_BASE(18, 18, 2, 0x30, 0x10, 4, 1), + PIN_FIELD_BASE(19, 19, 2, 0x30, 0x10, 2, 1), +- PIN_FIELD_BASE(20, 20, 2, 0x90, 0x10, 3, 1), ++ PIN_FIELD_BASE(20, 20, 2, 0x30, 0x10, 3, 1), + PIN_FIELD_BASE(21, 21, 2, 0x30, 0x10, 6, 1), + PIN_FIELD_BASE(22, 22, 2, 0x30, 0x10, 7, 1), + PIN_FIELD_BASE(23, 23, 2, 0x30, 0x10, 10, 1), diff --git a/target/linux/mediatek/patches-6.12/360-pinctrl-mediatek-add-mt7987-pinctrl-support.patch b/target/linux/mediatek/patches-6.12/360-pinctrl-mediatek-add-mt7987-pinctrl-support.patch index c22be8cd1d9..061a14c5f68 100644 --- a/target/linux/mediatek/patches-6.12/360-pinctrl-mediatek-add-mt7987-pinctrl-support.patch +++ b/target/linux/mediatek/patches-6.12/360-pinctrl-mediatek-add-mt7987-pinctrl-support.patch @@ -750,7 +750,7 @@ Signed-off-by: Daniel Golle + .nfuncs = ARRAY_SIZE(mt7987_functions), + .eint_hw = &mt7987_eint_hw, + .gpio_m = 0, -+ .ies_present = false, ++ .ies_present = true, + .base_names = mt7987_pinctrl_register_base_names, + .nbase_names = ARRAY_SIZE(mt7987_pinctrl_register_base_names), + .bias_disable_set = mtk_pinconf_bias_disable_set,