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4 years agoDaily bump.
GCC Administrator [Fri, 6 Nov 2020 00:17:08 +0000 (00:17 +0000)] 
Daily bump.

4 years agolibstdc++: Fix constraints on std::optional comparisons [PR 96269]
Jonathan Wakely [Thu, 5 Nov 2020 18:36:19 +0000 (18:36 +0000)] 
libstdc++: Fix constraints on std::optional comparisons [PR 96269]

The relational operators for std::optional were using the wrong types
in the declval expressions used to constrain them. Instead of using
const lvalues they were using non-const rvalues, which meant that a type
might satisfy the constraints but then give an error when the function
body was instantiated.

libstdc++-v3/ChangeLog:

PR libstdc++/96269
* include/std/optional (operator==, operator!=, operator<)
(operator>, operator<=, operator>=): Fix types used in
SFINAE constraints.
* testsuite/20_util/optional/relops/96269.cc: New test.

(cherry picked from commit cdd2d448d8200ed5ebcb232163954367b553291e)

4 years agolibstdc++: Use non-throwing increment in recursive_directory_iterator [PR 97731]
Jonathan Wakely [Thu, 5 Nov 2020 17:26:13 +0000 (17:26 +0000)] 
libstdc++: Use non-throwing increment in recursive_directory_iterator [PR 97731]

As described in the PR, the recursive_directory_iterator constructor
calls advance(ec), but ec is a pointer so it calls _Dir::advance(bool).
The intention was to either call advance() or advance(*ec) depending
whether the pointer is null or not.

This fixes the bug and renames the parameter to ecptr to make similar
mistakes less likely in future.

libstdc++-v3/ChangeLog:

PR libstdc++/97731
* src/filesystem/dir.cc (recursive_directory_iterator): Call the
right overload of _Dir::advance.
* testsuite/experimental/filesystem/iterators/97731.cc: New test.

(cherry picked from commit 2f93a2a03a343a29f614a530d7657f1ed6347ed5)

4 years agolibstdc++: Replace use of reserved name that clashes [PR 97362]
Jonathan Wakely [Sat, 10 Oct 2020 20:22:12 +0000 (21:22 +0100)] 
libstdc++: Replace use of reserved name that clashes [PR 97362]

The name __deref is defined as a macro by Windows headers.

This renames the __deref() helper function to __ref. It doesn't actually
dereference an iterator. it just has the same type as the iterator's
reference type.

libstdc++-v3/ChangeLog:

PR libstdc++/97362
* doc/html/manual/source_code_style.html: Regenerate.
* doc/xml/manual/appendix_contributing.xml: Add __deref to
BADNAMES.
* include/debug/functions.h (_Irreflexive_checker::__deref):
Rename to __ref.
* testsuite/17_intro/badnames.cc: Check __deref.

(cherry picked from commit 2137aa92412da363d52ef699987441be28b239d0)

4 years agoASAN: disable -Wno-stringop-overflow for 2 tests
Martin Liska [Tue, 13 Oct 2020 08:09:47 +0000 (10:09 +0200)] 
ASAN: disable -Wno-stringop-overflow for 2 tests

gcc/testsuite/ChangeLog:

PR middle-end/97392
* g++.dg/asan/asan_test.C: Disable -Wstringop-overflow.
* gcc.dg/asan/pr80166.c: Likewise.

(cherry picked from commit 8e0e9417ccda583a1bf05ff08e86fdffbec62b3e)

4 years agoDaily bump.
GCC Administrator [Thu, 5 Nov 2020 00:17:11 +0000 (00:17 +0000)] 
Daily bump.

4 years agolibstdc++: Document istreambuf_iterator base class change [PR 92285]
Jonathan Wakely [Wed, 4 Nov 2020 12:45:32 +0000 (12:45 +0000)] 
libstdc++: Document istreambuf_iterator base class change [PR 92285]

libstdc++-v3/ChangeLog:

PR libstdc++/92285
* doc/xml/manual/evolution.xml: Document change to base class.
* doc/html/manual/api.html: Regenerate.

(cherry picked from commit 3ef33e756a65484a17abb95ef0d4133f80c014b1)

4 years agolibstdc++: Update C++20 status documentation
Jonathan Wakely [Wed, 4 Nov 2020 12:53:29 +0000 (12:53 +0000)] 
libstdc++: Update C++20 status documentation

libstdc++-v3/ChangeLog:

* doc/xml/manual/evolution.xml: Document new C++20 headers.
* doc/html/*: Regenerate.

4 years agolibstdc++: Document API changes in GCC 10
Jonathan Wakely [Mon, 1 Jun 2020 15:43:01 +0000 (16:43 +0100)] 
libstdc++: Document API changes in GCC 10

* doc/xml/manual/evolution.xml: Document deprecation of
__is_nullptr_t and removal of std::allocator members.
* doc/html/manual/api.html: Regenerate.

(cherry picked from commit 258059d91bd0e27cc335312f4558e1b339a2e77d)

4 years agolibstdc++: Fix incorrect Docbook links
Jonathan Wakely [Mon, 1 Jun 2020 15:40:13 +0000 (16:40 +0100)] 
libstdc++: Fix incorrect Docbook links

The <xref> element creates the link text automatically from the link
target, rather than using the text node child of the element. This can
be changed by using an endterm attribute, but it's simpler to just use
the <link> element instead.

* doc/xml/manual/containers.xml: Replace <xref> with <link>.
* doc/xml/manual/evolution.xml: Likewise.
* doc/html/manual/api.html: Regenerate.
* doc/html/manual/containers.html: Regenerate.

(cherry picked from commit a1ffe9b6f4d0e2dd9493c5bd669fc5a2ea24a6f9)

4 years agoaarch64: Add vstN_lane_bf16 + vstNq_lane_bf16 intrinsics
Andrea Corallo [Thu, 8 Oct 2020 09:02:09 +0000 (11:02 +0200)] 
aarch64: Add vstN_lane_bf16 + vstNq_lane_bf16 intrinsics

gcc/ChangeLog

2020-10-19  Andrea Corallo  <andrea.corallo@arm.com>

* config/aarch64/arm_neon.h (__ST2_LANE_FUNC, __ST3_LANE_FUNC)
(__ST4_LANE_FUNC): Rename the macro generating the 'q' variants
into __ST2Q_LANE_FUNC, __ST2Q_LANE_FUNC, __ST2Q_LANE_FUNC so they
all can be undefed at the and of the file.
(vst2_lane_bf16, vst2q_lane_bf16, vst3_lane_bf16, vst3q_lane_bf16)
(vst4_lane_bf16, vst4q_lane_bf16): Add new intrinsics.

gcc/testsuite/ChangeLog

2020-10-19  Andrea Corallo  <andrea.corallo@arm.com>

* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
(hbfloat16_t): Define type.
(CHECK_FP): Make it working for bfloat types.
* gcc.target/aarch64/advsimd-intrinsics/bf16_vstN_lane_1.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/bf16_vstN_lane_2.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_bf16_indices_1.c:
Likewise.

4 years agoaarch64: Add bfloat16 vldN_lane_bf16 + vldNq_lane_bf16 intrisics
Andrea Corallo [Thu, 15 Oct 2020 08:16:18 +0000 (10:16 +0200)] 
aarch64: Add bfloat16 vldN_lane_bf16 + vldNq_lane_bf16 intrisics

gcc/ChangeLog

2020-10-15  Andrea Corallo  <andrea.corallo@arm.com>

* config/aarch64/arm_neon.h (__LD2_LANE_FUNC, __LD3_LANE_FUNC)
(__LD4_LANE_FUNC): Rename the macro geneating the 'q' variants
into __LD2Q_LANE_FUNC, __LD2Q_LANE_FUNC, __LD2Q_LANE_FUNC so they
all can be undefed at the and of the file.
(vld2_lane_bf16, vld2q_lane_bf16, vld3_lane_bf16, vld3q_lane_bf16)
(vld4_lane_bf16, vld4q_lane_bf16): Add new intrinsics.

gcc/testsuite/ChangeLog

2020-10-15  Andrea Corallo  <andrea.corallo@arm.com>

* gcc.target/aarch64/advsimd-intrinsics/bf16_vldN_lane_1.c: New
testcase.
* gcc.target/aarch64/advsimd-intrinsics/bf16_vldN_lane_2.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_bf16_indices_1.c:
Likewise.

4 years agoaarch64: Add vcopy(q)__lane(q)_bf16 intrinsics
Andrea Corallo [Thu, 8 Oct 2020 10:29:00 +0000 (12:29 +0200)] 
aarch64: Add vcopy(q)__lane(q)_bf16 intrinsics

gcc/ChangeLog

2020-10-20  Andrea Corallo  <andrea.corallo@arm.com>

* config/aarch64/arm_neon.h (vcopy_lane_bf16, vcopyq_lane_bf16)
(vcopyq_laneq_bf16, vcopy_laneq_bf16): New intrinsics.

gcc/testsuite/ChangeLog

2020-10-20  Andrea Corallo  <andrea.corallo@arm.com>

* gcc.target/aarch64/advsimd-intrinsics/bf16_vect_copy_lane_1.c:
New test.
* gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_2.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_2.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_2.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_2.c:
Likewise.

4 years agoDaily bump.
GCC Administrator [Wed, 4 Nov 2020 00:17:20 +0000 (00:17 +0000)] 
Daily bump.

4 years agoPR fortran/97491 - Wrong restriction for VALUE arguments of pure procedures
Harald Anlauf [Tue, 27 Oct 2020 19:25:23 +0000 (20:25 +0100)] 
PR fortran/97491 - Wrong restriction for VALUE arguments of pure procedures

A dummy argument with the VALUE attribute may be redefined in a PURE or
ELEMENTAL procedure.  Adjust the associated purity check.

gcc/fortran/ChangeLog:

* resolve.c (gfc_impure_variable): A dummy argument with the VALUE
attribute may be redefined without making a procedure impure.

gcc/testsuite/ChangeLog:

* gfortran.dg/value_8.f90: New test.

(cherry picked from commit a764c40079a493826a3678174f908941a383644e)

4 years ago[OpenACC] Use proper location to 'inform' of enclosing parent compute construct
Thomas Schwinge [Tue, 3 Nov 2020 21:06:29 +0000 (22:06 +0100)] 
[OpenACC] Use proper location to 'inform' of enclosing parent compute construct

Bug fix for recent commit beddd1762ad2bbe84dd776c54489153f83f21e56 "[OpenACC]
More precise diagnostics for 'gang', 'worker', 'vector' clauses with arguments
on 'loop' only allowed in 'kernels' regions":

> [...], and 'inform' at the location of the enclosing parent
> compute construct/[...].

Now really.

gcc/
* omp-low.c (scan_omp_for) <OpenACC>: Use proper location to
'inform' of enclosing parent compute construct.
gcc/testsuite/
* c-c++-common/goacc/pr92793-1.c: Extend.
* gfortran.dg/goacc/pr92793-1.f90: Likewise.

(cherry picked from commit fab72592d86d11b89a01f0f3c2c9c329d43466c1)

4 years agotestsuite/97688 - fix check_vect () with __AVX2__
Richard Biener [Tue, 3 Nov 2020 09:24:02 +0000 (10:24 +0100)] 
testsuite/97688 - fix check_vect () with __AVX2__

This fixes the cpuid check to always specify a subleaf zero
which is required to detect AVX2 and doesn't hurt for level one.
Without this fix we get zero runtime coverage when -mavx2 is
specified.

2020-11-03  Richard Biener  <rguenther@suse.de>

PR testsuite/97688
* gcc.dg/vect/tree-vect.h (check_vect): Fix the x86 cpuid
check to always specify subleaf zero.

(cherry picked from commit 8414529156e0bca37647c440c71beeca1d04ac86)

4 years ago[OpenACC] Enable inconsistent nested 'reduction' clauses checking for OpenACC 'kernels'
Thomas Schwinge [Thu, 22 Oct 2020 09:04:22 +0000 (11:04 +0200)] 
[OpenACC] Enable inconsistent nested 'reduction' clauses checking for OpenACC 'kernels'

gcc/
* omp-low.c (scan_omp_for) <OpenACC>: Move earlier inconsistent
nested 'reduction' clauses checking.
gcc/testsuite/
* c-c++-common/goacc/nested-reductions-1-kernels.c: Extend.
* c-c++-common/goacc/nested-reductions-2-kernels.c: Likewise.
* gfortran.dg/goacc/nested-reductions-1-kernels.f90: Likewise.
* gfortran.dg/goacc/nested-reductions-2-kernels.f90: Likewise.

(cherry picked from commit 64dc14b1a764bd3059170431c9b43c6192dbd48f)

4 years ago[OpenACC] Split up testcases for inconsistent nested 'reduction' clauses checking
Thomas Schwinge [Thu, 22 Oct 2020 07:45:31 +0000 (09:45 +0200)] 
[OpenACC] Split up testcases for inconsistent nested 'reduction' clauses checking

gcc/testsuite/
* c-c++-common/goacc/nested-reductions.c: Split file into...
* c-c++-common/goacc/nested-reductions-1-kernels.c: ... this...
* c-c++-common/goacc/nested-reductions-1-parallel.c: ..., this...
* c-c++-common/goacc/nested-reductions-1-routine.c: ..., and this.
* c-c++-common/goacc/nested-reductions-warn.c: Split file into...
* c-c++-common/goacc/nested-reductions-2-kernels.c: ... this...
* c-c++-common/goacc/nested-reductions-2-parallel.c: ..., this...
* c-c++-common/goacc/nested-reductions-2-routine.c: ..., and this.
* gfortran.dg/goacc/nested-reductions.f90: Split file into...
* gfortran.dg/goacc/nested-reductions-1-kernels.f90: ... this...
* gfortran.dg/goacc/nested-reductions-1-parallel.f90: ..., this...
* gfortran.dg/goacc/nested-reductions-1-routine.f90: ..., and
this.
* gfortran.dg/goacc/nested-reductions-warn.f90: Split file into...
* gfortran.dg/goacc/nested-reductions-2-kernels.f90: ... this...
* gfortran.dg/goacc/nested-reductions-2-parallel.f90: ..., this...
* gfortran.dg/goacc/nested-reductions-2-routine.f90: ..., and
this.

(cherry picked from commit fedf3e94efe774b8c0539d344130a7b25f50a881)

4 years ago[Fortran] More precise location information for OpenACC 'gang', 'worker', 'vector...
Thomas Schwinge [Tue, 27 Oct 2020 16:14:10 +0000 (17:14 +0100)] 
[Fortran] More precise location information for OpenACC 'gang', 'worker', 'vector' clauses with argument [PR92793]

gcc/fortran/
PR fortran/92793
* trans-openmp.c (gfc_trans_omp_clauses): More precise location
information for OpenACC 'gang', 'worker', 'vector' clauses with
argument.
gcc/testsuite/
PR fortran/92793
* gfortran.dg/goacc/pr92793-1.f90: Adjust.

(cherry picked from commit 41f7f6178e2d35288273656dc55dae8fcf3edeb5)

4 years ago[OpenACC] More precise diagnostics for 'gang', 'worker', 'vector' clauses with argume...
Thomas Schwinge [Tue, 27 Oct 2020 16:13:16 +0000 (17:13 +0100)] 
[OpenACC] More precise diagnostics for 'gang', 'worker', 'vector' clauses with arguments on 'loop' only allowed in 'kernels' regions

Instead of at the location of the 'loop' directive, 'error_at' the location of
the improper clause, and 'inform' at the location of the enclosing parent
compute construct/routine.

The Fortran testcases come with some XFAILing, to be resolved later.

gcc/
* omp-low.c (scan_omp_for) <OpenACC>: More precise diagnostics for
'gang', 'worker', 'vector' clauses with arguments only allowed in
'kernels' regions.
gcc/testsuite/
* c-c++-common/goacc/pr92793-1.c: Extend.
* gfortran.dg/goacc/pr92793-1.f90: Likewise.

(cherry picked from commit beddd1762ad2bbe84dd776c54489153f83f21e56)

4 years agoDaily bump.
GCC Administrator [Tue, 3 Nov 2020 00:16:59 +0000 (00:16 +0000)] 
Daily bump.

4 years agoDaily bump.
GCC Administrator [Mon, 2 Nov 2020 20:53:37 +0000 (20:53 +0000)] 
Daily bump.

4 years agoSimplify and enhance 'libgomp.oacc-c-c++-common/pr85486*.c' [PR85486]
Thomas Schwinge [Wed, 28 Oct 2020 09:56:20 +0000 (10:56 +0100)] 
Simplify and enhance 'libgomp.oacc-c-c++-common/pr85486*.c' [PR85486]

Avoid code duplication, and better test what we expect to happen.

libgomp/
PR target/85486
* testsuite/libgomp.oacc-c-c++-common/pr85486-2.c: Simplify and enhance.
* testsuite/libgomp.oacc-c-c++-common/pr85486-3.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/pr85486.c: Likewise.

(cherry picked from commit 79680c1d5cd3d89c2e7423e20dc8a6e1d6dc8151)

4 years agoFurther improve Fortran column location information [PR92793]
Thomas Schwinge [Fri, 30 Oct 2020 12:13:51 +0000 (13:13 +0100)] 
Further improve Fortran column location information [PR92793]

Building on top of commit 9c81750c5bedd7883182ee2684a012c6210ebe1d "Fortran] PR
92793 - fix column used for error diagnostic", there is another place where we
have to use 'gfc_get_location' returning column-corrected locations.

For example, this improves column location information for OMP constructs.

gcc/fortran/
PR fortran/92793
* trans.c (gfc_set_backend_locus): Use 'gfc_get_location'.
(gfc_restore_backend_locus): Adjust.
gcc/testsuite/
PR fortran/92793
* gfortran.dg/goacc/pr92793-1.f90: Adjust.

(cherry picked from commit 5677444f7e7ca15557030902c3d09dab4852fa90)

4 years agolibgomp testsuite: tell warning from error diagnostics, etc. [PR80219, PR85303]
Thomas Schwinge [Thu, 29 Oct 2020 09:29:19 +0000 (10:29 +0100)] 
libgomp testsuite: tell warning from error diagnostics, etc. [PR80219, PR85303]

This changes makes 'dg-warning', 'dg-error', 'dg-bogus', 'dg-message' behave as
expected, and also enables use of relative line numbers as well as 'dg-line'.

libgomp/
PR testsuite/80219
PR testsuite/85303
* testsuite/lib/libgomp.exp (libgomp_init): Set
'gcc_warning_prefix', 'gcc_error_prefix'.

(cherry picked from commit 528507fa0314c75d1105890e4781a475c8badd7c)

4 years agowide-int: Fix up set_bit_large
Jakub Jelinek [Wed, 28 Oct 2020 09:24:20 +0000 (10:24 +0100)] 
wide-int: Fix up set_bit_large

> >> wide_int new_lb = wi::set_bit (r.lower_bound (0), 127)
> >>
> >> and creates the value:
> >>
> >> p new_lb
> >> {<wide_int_storage> = {val = {-65535, -1, 0}, len = 2, precision = 128},
> >> static is_sign_extended = true}
> >
> > This is non-canonical and so invalid, if the low HWI has the MSB set
> > and the high HWI is -1, it should have been just
> > val = {-65535}, len = 1, precision = 128}
> >
> > I guess the bug is that wi::set_bit_large doesn't call canonize.
>
> Yeah, looks like a micro-optimisation gone wrong.

2020-10-28  Jakub Jelinek  <jakub@redhat.com>

* wide-int.cc (wi::set_bit_large): Call canonize unless setting
msb bit and clearing bits above it.

4 years agoc++: Tolerate empty initial args during normalization [PR97412]
Patrick Palka [Thu, 29 Oct 2020 18:02:59 +0000 (14:02 -0400)] 
c++: Tolerate empty initial args during normalization [PR97412]

When normalizing the constraint-expression of a nested-requirement, we
pass NULL_TREE as the initial template arguments for normalization, but
tsubst_argument_pack is not prepared to handle a NULL_TREE args vector.
This causes us to ICE when normalizing a variadic concept as part of a
nested-requirement.

This patch fixes the ICE by guarding the call to tsubst_template_args in
normalize_concept_check appropriately.  This will also enable us to
simplify many of the normalization routines to just pass NULL_TREE
(instead of a set of generic template arguments) as the initial template
arguments.

gcc/cp/ChangeLog:

PR c++/97412
* constraint.cc (normalize_concept_check): Don't call
tsubst_template_args when 'args' is NULL.

gcc/testsuite/ChangeLog:

PR c++/97412
* g++.dg/cpp2a/concepts-variadic2.C: New test.

(cherry picked from commit 5681668765e233735b4c5e6a305e73ae1f80a328)

4 years ago[OpenACC] Elaborate testcases that verify column location information [PR92793]
Thomas Schwinge [Thu, 29 Oct 2020 15:12:38 +0000 (16:12 +0100)] 
[OpenACC] Elaborate testcases that verify column location information [PR92793]

After PR92793 commit 9c81750c5bedd7883182ee2684a012c6210ebe1d "Fortran] PR
92793 - fix column used for error diagnostic", commit
d0d0ba20f2345023e9cec2419c9fb9e6cc7098c6 did "Add tests to verify OpenACC
clause locations", later fixed up in PR92901 commit
e6c90dba73291435c244decb9a89c47019cc5a45 to "Fix PR92901: Change test
expectation for C++ in OpenACC test clause-locations.c".

Now, add some more testing to verify/document the status quo.

gcc/testsuite/
PR fortran/92793
* c-c++-common/goacc/clause-locations.c: Rewrite into...
* c-c++-common/goacc/pr92793-1.c: ... this.
* gfortran.dg/goacc/clause-locations.f90: Rewrite into...
* gfortran.dg/goacc/pr92793-1.f90: ... this.

(cherry picked from commit fa410314ec94c9df2ad270c1917adc51f9147c2c)

4 years agoDaily bump.
GCC Administrator [Fri, 30 Oct 2020 00:17:00 +0000 (00:17 +0000)] 
Daily bump.

4 years agoLTO: get_section: add new argument
Martin Liska [Wed, 21 Oct 2020 09:11:03 +0000 (11:11 +0200)] 
LTO: get_section: add new argument

gcc/ChangeLog:

PR lto/97508
* langhooks.c (lhd_begin_section): Call get_section with
not_existing = true.
* output.h (get_section): Add new argument.
* varasm.c (get_section): Fail when NOT_EXISTING is true
and a section already exists.
* ipa-cp.c (ipcp_write_summary): Remove.
(ipcp_read_summary): Likewise.
* ipa-fnsummary.c (ipa_fn_summary_read): Always read jump
functions summary.
(ipa_fn_summary_write): Always stream it.

(cherry picked from commit 568de14d2e74cfdd600b8995ff6ac08c98ddef48)

4 years agolibstdc++: Fix memory issue in ranges::lexicographical_compare testcase
Patrick Palka [Thu, 29 Oct 2020 14:11:12 +0000 (10:11 -0400)] 
libstdc++: Fix memory issue in ranges::lexicographical_compare testcase

libstdc++-v3/ChangeLog:

* testsuite/25_algorithms/lexicographical_compare/constrained.cc:
(test03): Fix initializing the vector vy with the array y of size 4.

(cherry picked from commit 2e0216f9c4db8fde09706f57e6a6d80161c0da07)

4 years agoDaily bump.
GCC Administrator [Thu, 29 Oct 2020 00:17:28 +0000 (00:17 +0000)] 
Daily bump.

4 years agoc++: Check constraints before instantiation from mark_used [PR95132]
Patrick Palka [Wed, 28 Oct 2020 15:47:26 +0000 (11:47 -0400)] 
c++: Check constraints before instantiation from mark_used [PR95132]

This makes mark_used check constraints of a function _before_ calling
maybe_instantiate_decl, so that we don't try instantiating a function
(as part of return type deduction) with unsatisfied constraints.

gcc/cp/ChangeLog:

PR c++/95132
* decl2.c (mark_used): Move up the constraints_satisfied_p check
so that we check constraints before calling maybe_instantiate_decl.

gcc/testsuite/ChangeLog:

PR c++/95132
* g++.dg/cpp2a/concepts-fn7.C: New test.

(cherry picked from commit 9ccc3495766116ea4ae8e4cd8129beca60e30445)

4 years agolibstdc++: Apply proposed resolutions for LWG 3428, 3447
Patrick Palka [Fri, 23 Oct 2020 13:03:25 +0000 (09:03 -0400)] 
libstdc++: Apply proposed resolutions for LWG 3428, 3447

libstdc++-v3/ChangeLog:

* include/std/ranges (single_view::single_view): Mark the
in place constructor explicit as per LWG 3428.
(take_view): Remove the constraint on the deduction guide's
template parameter as per LWG 3447.

(cherry picked from commit 50106208ff65fe8076329169cd97460a03e27388)

4 years agotestsuite: add another test for the rotate vectorization miscompilation
Jakub Jelinek [Fri, 18 Sep 2020 13:05:53 +0000 (15:05 +0200)] 
testsuite: add another test for the rotate vectorization miscompilation

This time with short and char where the used mask used to be larger
than it should have been.

2020-09-18  Jakub Jelinek  <jakub@redhat.com>

PR tree-optimization/97081
* gcc.dg/vect/pr97081-2.c: New test.

(cherry picked from commit 3d3fe967b0961cb59f5df03ae2a55d83dc4bbd34)

4 years agotree-optimization/97081 - fix wrong-code with vectorized shift
Richard Biener [Fri, 18 Sep 2020 11:36:24 +0000 (13:36 +0200)] 
tree-optimization/97081 - fix wrong-code with vectorized shift

This corrects the mask for creation of x << s | x >> (-x & mask)
from a rotate x <<r s to use the precision of x.

2020-09-18  Richard Biener  <rguenther@suse.de>

PR tree-optimization/97081
* tree-vect-patterns.c (vect_recog_rotate_pattern): Use the
precision of the shifted operand to determine the mask.

* gcc.dg/vect/pr97081.c: New testcase.

(cherry picked from commit 9c9b88fdcff3520b2c4fb520c5d3b422eaa9a72f)

4 years agoDaily bump.
GCC Administrator [Wed, 28 Oct 2020 00:17:13 +0000 (00:17 +0000)] 
Daily bump.

4 years agoDaily bump.
GCC Administrator [Tue, 27 Oct 2020 00:17:02 +0000 (00:17 +0000)] 
Daily bump.

4 years agocplxlower: Avoid a transform when looking at a default definition
Martin Jambor [Mon, 19 Oct 2020 17:21:10 +0000 (19:21 +0200)] 
cplxlower: Avoid a transform when looking at a default definition

In PR 97456, IPA-SRA triggers a bug in tree-complex.c where it
converts:

 <bb 2>
   a$_M_value_21 = COMPLEX_EXPR <ISRA.18_10(D), ISRA.18_10(D)>;

(where ISRA.18 is IPA-SRA created PARM_DECL with DECL_IGNORED_P set,
which is why it only happens with IPA-SRA) into:

  <bb 2>
    a$_M_value_21 = COMPLEX_EXPR <a$_M_value$real_10(D), a$_M_value$real_10(D)>;

i.e. it replaces two uses of the parameter default-def with two
uninitialized default-defs of a new variable - all in hope to produce
code with better debug info.

This patch fixes it by avoiding the transform when the SSA_NAME to be
replaced is a default definition.

gcc/ChangeLog:

2020-10-19  Martin Jambor  <mjambor@suse.cz>

PR tree-optimization/97456
* tree-complex.c (set_component_ssa_name): Do not replace ignored decl
default definitions with new component vars.  Reorder if conditions.

gcc/testsuite/ChangeLog:

2020-10-19  Martin Jambor  <mjambor@suse.cz>

PR tree-optimization/97456
* gcc.dg/tree-ssa/pr97456.c: New test.

(cherry picked from commit 619f91eaa8c8a50f1f9d3e7b96ee837037f0e806)

4 years agoDaily bump.
GCC Administrator [Mon, 26 Oct 2020 00:16:57 +0000 (00:16 +0000)] 
Daily bump.

4 years agoDaily bump.
GCC Administrator [Sun, 25 Oct 2020 00:17:00 +0000 (00:17 +0000)] 
Daily bump.

4 years agoc++: Fix verify_ctor_sanity ICE [PR96241]
Marek Polacek [Thu, 15 Oct 2020 20:10:45 +0000 (16:10 -0400)] 
c++: Fix verify_ctor_sanity ICE [PR96241]

The code added in r10-6437 caused us to create a CONSTRUCTOR when we're
{}-initializing an aggregate.  Then we pass this new CONSTRUCTOR down to
cxx_eval_constant_expression which, if the CONSTRUCTOR isn't TREE_CONSTANT
or reduced_constant_expression_p, calls cxx_eval_bare_aggregate.  In
this case the CONSTRUCTOR wasn't reduced_constant_expression_p because
for r_c_e_p a CONST_DECL isn't good enough so it returns false.  So we
go to cxx_eval_bare_aggregate where we crash, because ctx->ctor wasn't
set up properly.  So my fix is to do so.  Since we're value-initializing,
I'm not setting CONSTRUCTOR_NO_CLEARING.  To avoid keeping a garbage
constructor around, I call free_constructor in case the evaluation did
not use it.

gcc/cp/ChangeLog:

PR c++/96241
* constexpr.c (cxx_eval_array_reference): Set up ctx->ctor if we
are initializing an aggregate.  Call free_constructor on the new
CONSTRUCTOR if it isn't returned from cxx_eval_constant_expression.

gcc/testsuite/ChangeLog:

PR c++/96241
* g++.dg/cpp0x/constexpr-96241.C: New test.
* g++.dg/cpp1y/constexpr-96241.C: New test.

(cherry picked from commit 0df73beea03f9dc124dc6e98ec4bdeacca7a2eea)

4 years agoDaily bump.
GCC Administrator [Sat, 24 Oct 2020 00:17:04 +0000 (00:17 +0000)] 
Daily bump.

4 years agoDaily bump.
GCC Administrator [Fri, 23 Oct 2020 00:17:08 +0000 (00:17 +0000)] 
Daily bump.

4 years agoPR fortran/95979 - ICE in get_kind, at fortran/simplify.c:129
Harald Anlauf [Fri, 16 Oct 2020 20:17:46 +0000 (22:17 +0200)] 
PR fortran/95979 - ICE in get_kind, at fortran/simplify.c:129

Simplification of the elemental intrinsic INDEX with constant array-valued
arguments failed with an ICE or did not reduce to a constant array, depending
also on the presence of the optional KIND argument.  Add a further attempt of
simplification in the case of elemental intrinsics, and make sure the KIND
argument is not removed prematurely during simplification of INDEX.

gcc/fortran/ChangeLog:

PR fortran/95979
* expr.c (gfc_check_init_expr): Fix check of return code from
gfc_intrinsic_func_interface.
* intrinsic.c (gfc_intrinsic_func_interface): Add further attempt
of simplification of elemental intrinsics with array arguments.
* iresolve.c (gfc_resolve_index_func): Keep optional KIND argument
for simplification of elemental use of INDEX.

gcc/testsuite/ChangeLog:

PR fortran/95979
* gfortran.dg/index_4.f90: New test.

(cherry picked from commit 02629b116eed7c6911ef0eb2ef97e1883e9fb1de)

4 years agoc++: Handle RANGE_EXPR index in init_subob_ctx [PR97328]
Patrick Palka [Thu, 22 Oct 2020 11:40:40 +0000 (07:40 -0400)] 
c++: Handle RANGE_EXPR index in init_subob_ctx [PR97328]

In the testcase below, we're ICEing during constexpr evaluation of the
CONSTRUCTOR {.data={{}, [1 ... 7]={}}} of type 'vector'.  The interesting
thing about this CONSTRUCTOR is that it has a RANGE_EXPR index for an
element initializer which doesn't satisfy reduced_constant_expression_p
(because the field 't' is uninitialized).

This is a problem because init_subob_ctx currently punts on setting up a
sub-aggregate initialization context when given a RANGE_EXPR index, so
we later trip over the asserts in verify_ctor_sanity when recursing into
cxx_eval_bare_aggregate on this element initializer.

Fix this by making init_subob_ctx set up an appropriate initialization
context when supplied a RANGE_EXPR index.

gcc/cp/ChangeLog:

PR c++/97328
* constexpr.c (init_subob_ctx): Don't punt on RANGE_EXPR
indexes, instead build a sub-aggregate initialization context
with no subobject.

gcc/testsuite/ChangeLog:

PR c++/97328
* g++.dg/cpp2a/constexpr-init19.C: New test.
* g++.dg/cpp2a/constexpr-init20.C: New test.

(cherry picked from commit 3d423c6f6a69d87ad52ba3af75f3debd8a8b8810)

4 years agoFix PR97439
Andreas Krebbel [Thu, 22 Oct 2020 10:24:22 +0000 (12:24 +0200)] 
Fix PR97439

decimal_real_maxval misses to set the sign flag in the REAL_VALUE_TYPE.

gcc/ChangeLog:

PR rtl-optimization/97439
* dfp.c (decimal_real_maxval): Set the sign flag in the
generated number.

gcc/testsuite/ChangeLog:

* gcc.dg/dfp/pr97439.c: New test.

(cherry picked from commit e3f25eac67aee77af0b2038cd4d6cbd36d7f1030)

4 years agoPR target/96759 - Handle global variable assignment from misaligned structure/PARALLE...
Kito Cheng [Wed, 2 Sep 2020 06:26:15 +0000 (14:26 +0800)] 
PR target/96759 - Handle global variable assignment from misaligned structure/PARALLEL return values.

In g:70cdb21e579191fe9f0f1d45e328908e59c0179e, DECL/global variable has handled
misaligned stores, but it didn't handle PARALLEL values, and I refer the
other part of this function, I found the PARALLEL need handled by
emit_group_* functions, so I add a check, and using emit_group_store if
storing a PARALLEL value, also checked this change didn't break the
testcase(gcc.target/arm/unaligned-argument-3.c) added by the orginal changes.

For riscv64 target, struct S {int a; double b;} will pack into a parallel
value to return and it has TImode when misaligned access is supported,
however TImode required 16-byte align, but it only 8-byte align, so it go to
the misaligned stores handling, then it will try to generate move
instruction from a PARALLEL value.

Tested on following target without introduced new reguression:
  - riscv32/riscv64 elf
  - x86_64-linux
  - arm-eabi

v2 changes:
  - Use maybe_emit_group_store instead of emit_group_store.
  - Remove push_temp_slots/pop_temp_slots, emit_group_store only require
    stack temp slot when dst is CONCAT or PARALLEL, however
    maybe_emit_group_store will always use REG for dst if needed.

gcc/ChangeLog:

PR target/96759
* expr.c (expand_assignment): Handle misaligned stores with PARALLEL
value.

gcc/testsuite/ChangeLog:

PR target/96759
* g++.target/riscv/pr96759.C: New.
* gcc.target/riscv/pr96759.c: New.

(cherry picked from commit 78fbe731a8822e819c4ca0e6d6f777c7a2f36bad)

4 years agoDaily bump.
GCC Administrator [Thu, 22 Oct 2020 08:29:05 +0000 (08:29 +0000)] 
Daily bump.

4 years agolibstdc++: Remove overzealous static_asserts from std::span
Patrick Palka [Tue, 22 Sep 2020 00:53:17 +0000 (20:53 -0400)] 
libstdc++: Remove overzealous static_asserts from std::span

For a span with statically empty extent, we currently model the
preconditions of front(), back(), and operator[] as if they are
mandates, by using a static_assert to verify that extent != 0.  This
causes us to reject valid programs that would instantiate these member
functions and at runtime never call them.

Since they are already followed by more general runtime asserts, this
patch just removes these static_asserts altogether,

libstdc++-v3/ChangeLog:

* include/std/span (span::front): Remove static_assert.
(span::back): Likewise.
(span::operator[]): Likewise.
* testsuite/23_containers/span/back_neg.cc: Rewrite to verify
that we check the preconditions of back() only when it's called.
* testsuite/23_containers/span/front_neg.cc: Likewise for
front().
* testsuite/23_containers/span/index_op_neg.cc: Likewise for
operator[].

(cherry picked from commit 37edf28c24b7bd198c27d266af9aefad417635fd)

4 years agoSimplify trivial VEC_COND_EXPR in expander.
liuhongt [Wed, 21 Oct 2020 05:05:16 +0000 (13:05 +0800)] 
Simplify trivial VEC_COND_EXPR in expander.

gcc/ChangeLog:

PR target/97506
* config/i386/i386-expand.c (ix86_expand_sse_movcc): Move
op_true to dest directly when op_true equals op_false.

gcc/testsuite/ChangeLog:

PR target/97506
* gcc.target/i386/pr97506.c: New test.

4 years agolibsanitizer: add test-case
Martin Liska [Wed, 21 Oct 2020 07:28:56 +0000 (09:28 +0200)] 
libsanitizer: add test-case

gcc/testsuite/ChangeLog:

PR sanitizer/97414
* g++.dg/asan/pr97414.C: New test.

(cherry picked from commit 6c5b08a2ca935c5db68e79d33e5c5b752252115c)

4 years agoASAN: Support detect_invalid_pointer_pairs=1 with detect_stack_use_after_return=1
Martin Liska [Fri, 16 Oct 2020 13:08:52 +0000 (15:08 +0200)] 
ASAN: Support detect_invalid_pointer_pairs=1 with detect_stack_use_after_return=1

Do not crash when AsanThread::GetStackVariableShadowStart does not find
a variable for a pointer on a shadow stack.

Cherry-pick from ad2be02a833e56f7fe280797280b219eb3312621.

Differential Revision: https://reviews.llvm.org/D89552

(cherry picked from commit b69f33f477b9ac38af3c39465600ae74a3554878)

4 years agolibstdc++: Apply proposed resolution for LWG 3450
Patrick Palka [Mon, 12 Oct 2020 17:46:24 +0000 (13:46 -0400)] 
libstdc++: Apply proposed resolution for LWG 3450

libstdc++-v3/ChangeLog:

* include/std/ranges (take_while_view::begin): Constrain the
const overload further as per LWG 3450.
(take_while_view::end): Likewise.
* testsuite/std/ranges/adaptors/take_while.cc: Add test for LWG
3450.

(cherry picked from commit c5aad5a41838dbfd29ff114692ff9533b52746b4)

4 years agolibstdc++: Fix division by zero in std::sample
Patrick Palka [Tue, 22 Sep 2020 00:48:23 +0000 (20:48 -0400)] 
libstdc++: Fix division by zero in std::sample

This fixes a division by zero in the selection-sampling std::__sample
overload when the input range is empty (and hence __unsampled_sz is 0).

libstdc++-v3/ChangeLog:

* include/bits/stl_algo.h (__sample): Exit early when the
input range is empty.
* testsuite/25_algorithms/sample/3.cc: New test.

(cherry picked from commit 813ad9c4dd5a779f12ad2abf710c6e75a3117ef0)

4 years agolibstdc++: Mark some more algorithms constexpr for C++20
Patrick Palka [Tue, 22 Sep 2020 00:48:17 +0000 (20:48 -0400)] 
libstdc++: Mark some more algorithms constexpr for C++20

As per P0202.

libstdc++-v3/ChangeLog:

* include/bits/stl_algo.h (for_each_n): Mark constexpr for C++20.
(search): Likewise for the overload that takes a searcher.
* testsuite/25_algorithms/for_each/constexpr.cc: Test constexpr
std::for_each_n.
* testsuite/25_algorithms/search/constexpr.cc: Test constexpr
std::search overload that takes a searcher.

(cherry picked from commit f017952d31ba8fa965106505bed5844cc1a63b4b)

4 years agolibstdc++: Implement remaining piece of LWG 3448
Patrick Palka [Thu, 27 Aug 2020 01:51:48 +0000 (21:51 -0400)] 
libstdc++: Implement remaining piece of LWG 3448

Almost all of the proposed resolution for LWG 3448 is already
implemented; the only part left is to adjust the return type of
transform_view::sentinel::operator-.

libstdc++-v3/ChangeLog:

PR libstdc++/95322
* include/std/ranges (transform_view::sentinel::__distance_from):
Give this a deduced return type.
(transform_view::sentinel::operator-): Adjust the return type so
that it's based on the constness of the iterator rather than
that of the sentinel.
* testsuite/std/ranges/adaptors/95322.cc: Refer to LWG 3488.

(cherry picked from commit 3ae0cd94abc15e33dc06ca7a5f76f14b1d74129f)

4 years agolibstdc++: elements_view's sentinel and iterator not comparable [LWG 3406]
Patrick Palka [Thu, 27 Aug 2020 01:52:58 +0000 (21:52 -0400)] 
libstdc++: elements_view's sentinel and iterator not comparable [LWG 3406]

This implements the proposed resolution for LWG 3406, and adds a
testcase for the example from P1994R1.

libstdc++-v3/ChangeLog:

* include/std/ranges (elements_view::begin): Adjust constraints.
(elements_view::end): Likewise.
(elements_view::_Sentinel::operator==): Templatize to take both
_Iterator<true> and _Iterator<false>.
(elements_view::_Sentinel::operator-): Likewise.
* testsuite/std/ranges/adaptors/elements.cc: Add testcase for
the example from P1994R1.
* testsuite/std/ranges/adaptors/lwg3406.cc: New test.

(cherry picked from commit 4be16d1c1cfa6d151d2853ce509c1a797189c9ad)

4 years agolibstdc++: Implement P1994R1 changes to ranges::elements_view
Patrick Palka [Thu, 27 Aug 2020 01:49:51 +0000 (21:49 -0400)] 
libstdc++: Implement P1994R1 changes to ranges::elements_view

The example from the paper doesn't compile without the proposed
resolution for LWG 3406, so we'll add a testcase for this once the
proposed resolution is implemented.

libstdc++-v3/ChangeLog:

* include/std/ranges (elements_view::end): Replace these two
overloads with four new overloads.
(elements_view::_Iterator::operator==): Remove.
(elements_view::_Iterator::operator-): Likewise.
(elements_view::_Sentinel): Define.

(cherry picked from commit 97ab5daa6c1186d3b10872cc1d5b05da247d102c)

4 years agoDaily bump.
GCC Administrator [Wed, 21 Oct 2020 00:17:09 +0000 (00:17 +0000)] 
Daily bump.

4 years agolibstdc++: Fix compatibility support in unique_ptr pretty printer
Jonathan Wakely [Mon, 10 Aug 2020 17:44:06 +0000 (18:44 +0100)] 
libstdc++: Fix compatibility support in unique_ptr pretty printer

The support for the old std::unique_ptr implementation was failing,
because it tried to work on a typedef instead of the underlying type.
The test supposed to verify the support worked wasn't using a typedef,
so didn't notice the problem.

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/printers.py (UniquePointerPrinter.__init__):
Use gdb.Type.strip_typedefs().
* testsuite/libstdc++-prettyprinters/compat.cc: Use a typedef in
the emulated old type.

(cherry picked from commit ed11f7e84bcae89f486f5023e566726a7faa7dd4)

4 years agolibstdc++: Implement LWG 3706 for COW strings
Jonathan Wakely [Wed, 14 Oct 2020 10:52:26 +0000 (11:52 +0100)] 
libstdc++: Implement LWG 3706 for COW strings

The basic_string deduction guides are defined for the old ABI, but the
tests are currently disabled. This is because a single case fails when
using the old ABI, which is just because LWG 3706 isn't implemented for
the old ABI. That can be done easily, and the tests can be enabled.

libstdc++-v3/ChangeLog:

* include/bits/basic_string.h [!_GLIBCXX_USE_CXX11_ABI]
(basic_string(const _CharT*, const _Alloc&)): Constrain to
require an allocator-like type to fix CTAD ambiguity (LWG 3706).
Define inline.
* include/bits/basic_string.tcc [!_GLIBCXX_USE_CXX11_ABI]
(basic_string(const _CharT*, const _Alloc&)): Remove non-inline
definition.
* testsuite/21_strings/basic_string/cons/char/deduction.cc:
Remove dg-skip-if.
* testsuite/21_strings/basic_string/cons/wchar_t/deduction.cc:
Likewise.

(cherry picked from commit dc38e255242192303ae463a913c060b426eb06c0)

4 years agolibstdc++: Enable tests that incorrectly require cxx11-abi
Jonathan Wakely [Wed, 14 Oct 2020 11:05:57 +0000 (12:05 +0100)] 
libstdc++: Enable tests that incorrectly require cxx11-abi

These tests were not being run when -D_GLIBCXX_USE_CXX11_ABI=0 was added
to the test flags, but they actually work OK with the old string.

libstdc++-v3/ChangeLog:

* testsuite/21_strings/basic_string/allocator/char/minimal.cc:
Do not require cxx11-abi effective target.
* testsuite/21_strings/basic_string/allocator/wchar_t/minimal.cc:
Likewise.
* testsuite/27_io/basic_fstream/cons/base.cc: Likewise.

(cherry picked from commit 5ae9ddd480f97ba16b9b9d11d333e1252b820166)

4 years agolibstdc++: Add C++11 member functions for ios::failure in old ABI
Jonathan Wakely [Thu, 8 Oct 2020 13:03:52 +0000 (14:03 +0100)] 
libstdc++: Add C++11 member functions for ios::failure in old ABI

The new constructors that C++11 added to std::ios_base::failure were
missing for the old ABI. This adds them, but just ignores the
std::error_code argument (because there's nowhere to store it).

This also adds a code() member, which should be provided by the
std::system_error base class, but that base class isn't present in the
old ABI.

This allows the old ios::failure to be used in code that expects the new
API, although with reduced functionality.

libstdc++-v3/ChangeLog:

* include/bits/ios_base.h (ios_base::failure): Add constructors
takeing error_code argument. Add code() member function.
* testsuite/27_io/ios_base/failure/cxx11.cc: Allow test to
run for the old ABI but do not check for derivation from
std::system_error.
* testsuite/27_io/ios_base/failure/error_code.cc: New test.

(cherry picked from commit f997b67550144c6c0562f94c9b9cb932125d0444)

4 years agolibstdc++: Fix doxygen comment for std::any_of
Nuno Lopes [Tue, 13 Oct 2020 19:21:55 +0000 (20:21 +0100)] 
libstdc++: Fix doxygen comment for std::any_of

libstdc++-v3/ChangeLog:

* include/bits/stl_algo.h (any_of): Fix incorrect description
in comment.

(cherry picked from commit 5204cc561a8d3c1a671969715ceb507ece8edef7)

4 years agolibstdc++: Fix documentation for return values of copy algos
Jonathan Wakely [Mon, 12 Oct 2020 17:14:01 +0000 (18:14 +0100)] 
libstdc++: Fix documentation for return values of copy algos

The doxygen comments for these algos all incorrectly claim to use
(first - last) as the difference from the start of the output range to
the return value. As reported on the mailing list by Johannes Choo, it
should be (last - first).

libstdc++-v3/ChangeLog:

* include/bits/stl_algobase.h (copy, move, copy_backward)
(move_backward): Fix documentation for returned iterator.

(cherry picked from commit ae3967caffea9c9b9f0f9dfe42a4f59e715e1a61)

4 years agolibstdc++: Fix misnamed configure option in manual
Jonathan Wakely [Thu, 24 Sep 2020 16:33:16 +0000 (17:33 +0100)] 
libstdc++: Fix misnamed configure option in manual

libstdc++-v3/ChangeLog:

* doc/xml/manual/configure.xml: Correct name of option.
* doc/html/*: Regenerate.

(cherry picked from commit 61f7995398a719f2ff91d07e8f8ed6d4413db697)

4 years agoc++: Fix last change.
Marek Polacek [Tue, 20 Oct 2020 16:33:39 +0000 (12:33 -0400)] 
c++: Fix last change.

gcc/cp/ChangeLog:

* pt.c (tsubst_copy_and_build): Use cxx2a.

4 years agoc++: Fix P0846 (ADL and function templates) in template [PR97010]
Marek Polacek [Thu, 10 Sep 2020 21:27:43 +0000 (17:27 -0400)] 
c++: Fix P0846 (ADL and function templates) in template [PR97010]

To quickly recap, P0846 says that a name is also considered to refer to
a template if it is an unqualified-id followed by a < and name lookup
finds either one or more functions or finds nothing.

In a template, when parsing a function call that has type-dependent
arguments, we can't perform ADL right away so we set KOENIG_LOOKUP_P in
the call to remember to do it when instantiating the call
(tsubst_copy_and_build/CALL_EXPR).  When the called function is a
function template, we represent the call with a TEMPLATE_ID_EXPR;
usually the operand is an OVERLOAD.

In the P0846 case though, the operand can be an IDENTIFIER_NODE, when
name lookup found nothing when parsing the template name.  But we
weren't handling this correctly in tsubst_copy_and_build.  First
we need to pass the FUNCTION_P argument from <case TEMPLATE_ID_EXPR> to
<case IDENTIFIER_NODE>, otherwise we give a bogus error.  And then in
<case CALL_EXPR> we need to perform ADL.  The rest of the changes is to
give better errors when ADL didn't find anything.

gcc/cp/ChangeLog:

PR c++/97010
* pt.c (tsubst_copy_and_build) <case TEMPLATE_ID_EXPR>: Call
tsubst_copy_and_build explicitly instead of using the RECUR macro.
Handle a TEMPLATE_ID_EXPR with an IDENTIFIER_NODE as its operand.
<case CALL_EXPR>: Perform ADL for a TEMPLATE_ID_EXPR with an
IDENTIFIER_NODE as its operand.

gcc/testsuite/ChangeLog:

PR c++/97010
* g++.dg/cpp2a/fn-template21.C: New test.
* g++.dg/cpp2a/fn-template22.C: New test.

(cherry picked from commit 635072248a426c933c74ef4431e82401249b6218)

4 years agoDaily bump.
GCC Administrator [Tue, 20 Oct 2020 00:17:02 +0000 (00:17 +0000)] 
Daily bump.

4 years agolibstdc++: Make std::assume_aligned a constexpr function [PR 97132]
Jonathan Wakely [Mon, 21 Sep 2020 13:28:58 +0000 (14:28 +0100)] 
libstdc++: Make std::assume_aligned a constexpr function [PR 97132]

The cast from void* to T* in std::assume_aligned is not valid in a
constexpr function. The optimization hint is redundant during constant
evaluation anyway (the compiler can see the object and knows its
alignment). Simply return the original pointer without applying the
__builtin_assume_aligned hint to it when doing constant evaluation.

libstdc++-v3/ChangeLog:

PR libstdc++/97132
* include/std/memory (assume_aligned): Do not use
__builtin_assume_aligned during constant evaluation.
* testsuite/20_util/assume_aligned/1.cc: Improve test.
* testsuite/20_util/assume_aligned/97132.cc: New test.

(cherry picked from commit f10ed928e2f8ecc2c859abff8f2f9296b11b8d95)

4 years agoPR libfortran/97063 - Wrong result for vector (step size is negative) * matrix
Harald Anlauf [Sun, 18 Oct 2020 18:15:26 +0000 (20:15 +0200)] 
PR libfortran/97063 - Wrong result for vector (step size is negative) * matrix

The MATMUL intrinsic provided a wrong result for rank-1 times rank-2 array
when a negative stride was used for addressing the elements of the rank-1
array, because a check on strides was erroneously placed before the check
on the rank.  Interchange order of checks.

libgfortran/ChangeLog:

* m4/matmul_internal.m4: Move check for rank-1 times rank-2 before
checks on strides for rank-2 times rank-2.
* generated/matmul_c10.c: Regenerated.
* generated/matmul_c16.c: Likewise.
* generated/matmul_c4.c: Likewise.
* generated/matmul_c8.c: Likewise.
* generated/matmul_i1.c: Likewise.
* generated/matmul_i16.c: Likewise.
* generated/matmul_i2.c: Likewise.
* generated/matmul_i4.c: Likewise.
* generated/matmul_i8.c: Likewise.
* generated/matmul_r10.c: Likewise.
* generated/matmul_r16.c: Likewise.
* generated/matmul_r4.c: Likewise.
* generated/matmul_r8.c: Likewise.
* generated/matmulavx128_c10.c: Likewise.
* generated/matmulavx128_c16.c: Likewise.
* generated/matmulavx128_c4.c: Likewise.
* generated/matmulavx128_c8.c: Likewise.
* generated/matmulavx128_i1.c: Likewise.
* generated/matmulavx128_i16.c: Likewise.
* generated/matmulavx128_i2.c: Likewise.
* generated/matmulavx128_i4.c: Likewise.
* generated/matmulavx128_i8.c: Likewise.
* generated/matmulavx128_r10.c: Likewise.
* generated/matmulavx128_r16.c: Likewise.
* generated/matmulavx128_r4.c: Likewise.
* generated/matmulavx128_r8.c: Likewise.

gcc/testsuite/ChangeLog:

* gfortran.dg/matmul_20.f90: New test.

(cherry picked from commit cd6cd6aed195b4ec7d652e8b41d60b60e174304e)

4 years agoarm: Fix the warning -mcpu=cortex-m55 conflicting with -march=armv8.1-m.main (pr97327).
Srinath Parvathaneni [Fri, 16 Oct 2020 13:53:28 +0000 (14:53 +0100)] 
arm: Fix the warning -mcpu=cortex-m55 conflicting with -march=armv8.1-m.main (pr97327).

This patch fixes (PR97327) the warning -mcpu=cortex-m55 conflicts with -march=armv8.1-m.main
for -mfloat-abi=soft by adding the isa_bit_mve_float to clearing FP bit list.

The following combination are fixed with this patch:
$ cat bug.c
int main(){
return 0;
}

$ arm-none-eabi-gcc -mcpu=cortex-m55 -mfloat-abi=soft bug.c -c
$ arm-none-eabi-gcc -mcpu=cortex-m55 -mfloat-abi=soft -march=armv8.1-m.main+mve bug.c -c

Before this patch for above combinations:
cc1: warning: switch '-mcpu=cortex-m55' conflicts with '-march=armv8.1-m.main' switch

After this patch for above combinations no warning/errors.

gcc/ChangeLog:

2020-10-16  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

PR target/97327
* config/arm/arm.c (fp_bitlist): Add isa_bit_mve_float to FP bits array.

gcc/testsuite/ChangeLog:

PR target/97327
* gcc.target/arm/mve/intrinsics/pr97327.c: New test.

(cherry picked from commit 90042c43a92c452a5f9f3afbfcdad511ea09a54f)

4 years agoDaily bump.
GCC Administrator [Mon, 19 Oct 2020 00:16:58 +0000 (00:16 +0000)] 
Daily bump.

4 years agoDaily bump.
GCC Administrator [Sun, 18 Oct 2020 00:16:55 +0000 (00:16 +0000)] 
Daily bump.

4 years agoDaily bump.
GCC Administrator [Sat, 17 Oct 2020 00:17:06 +0000 (00:17 +0000)] 
Daily bump.

4 years agoarm: [MVE] Add missing __arm_vcvtnq_u32_f32 intrinsic (PR 96914)
Christophe Lyon [Mon, 5 Oct 2020 09:52:59 +0000 (09:52 +0000)] 
arm: [MVE] Add missing __arm_vcvtnq_u32_f32 intrinsic (PR 96914)

__arm_vcvtnq_u32_f32 was missing from arm_mve.h, although the s32_f32 and
[su]16_f16 versions were present.

This patch adds the missing version and testcase, which are
cut-and-paste from the other versions.

2020-10-08  Christophe Lyon  <christophe.lyon@linaro.org>

gcc/
PR target/96914
* config/arm/arm_mve.h (__arm_vcvtnq_u32_f32): New.

gcc/testsuite/
PR target/96914
* gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c: New test.

(cherry picked from commit 5a448362da6133c3b16ffdb0c795b657af7fa5a4)

4 years agoarm: [MVE] Remove illegal intrinsics (PR target/96914)
Christophe Lyon [Tue, 6 Oct 2020 07:36:31 +0000 (07:36 +0000)] 
arm: [MVE] Remove illegal intrinsics (PR target/96914)

A few MVE intrinsics had an unsigned variant implement while they are
supported by the hardware.  This patch removes them:
__arm_vqrdmlashq_n_u8
__arm_vqrdmlahq_n_u8
__arm_vqdmlahq_n_u8
__arm_vqrdmlashq_n_u16
__arm_vqrdmlahq_n_u16
__arm_vqdmlahq_n_u16
__arm_vqrdmlashq_n_u32
__arm_vqrdmlahq_n_u32
__arm_vqdmlahq_n_u32
__arm_vmlaldavaxq_p_u32
__arm_vmlaldavaxq_p_u16

2020-10-08  Christophe Lyon  <christophe.lyon@linaro.org>

gcc/
PR target/96914
* config/arm/arm_mve.h (vqrdmlashq_n_u8, vqrdmlashq_n_u16)
(vqrdmlashq_n_u32, vqrdmlahq_n_u8, vqrdmlahq_n_u16)
(vqrdmlahq_n_u32, vqdmlahq_n_u8, vqdmlahq_n_u16, vqdmlahq_n_u32)
(vmlaldavaxq_p_u16, vmlaldavaxq_p_u32): Remove.
* config/arm/arm_mve_builtins.def (vqrdmlashq_n_u, vqrdmlahq_n_u)
(vqdmlahq_n_u, vmlaldavaxq_p_u): Remove.
* config/arm/unspecs.md (VQDMLAHQ_N_U, VQRDMLAHQ_N_U)
(VQRDMLASHQ_N_U)
(VMLALDAVAXQ_P_U): Remove unspecs.
* config/arm/iterators.md (VQDMLAHQ_N_U, VQRDMLAHQ_N_U)
(VQRDMLASHQ_N_U, VMLALDAVAXQ_P_U): Remove attributes.
(VQDMLAHQ_N, VQRDMLAHQ_N, VQRDMLASHQ_N, VMLALDAVAXQ_P): Remove
unsigned variants from iterators.
* config/arm/mve.md (mve_vqdmlahq_n_<supf><mode>)
(mve_vqrdmlahq_n_<supf><mode>)
(mve_vqrdmlashq_n_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>):
Update comment.

gcc/testsuite/
PR target/96914
* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_u16.c: Remove.
* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_u32.c: Remove.
* gcc.target/arm/mve/intrinsics/vqdmlahq_n_u16.c: Remove.
* gcc.target/arm/mve/intrinsics/vqdmlahq_n_u32.c: Remove.
* gcc.target/arm/mve/intrinsics/vqdmlahq_n_u8.c: Remove.
* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u16.c: Remove.
* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u32.c: Remove.
* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u8.c: Remove.
* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u16.c: Remove.
* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u32.c: Remove.
* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u8.c: Remove.

(cherry picked from commit 237f12da4124b91503646b099a8282aa6b251ef9)

4 years agoarm: [MVE[ Add vqdmlashq intrinsics (PR target/96914)
Christophe Lyon [Mon, 5 Oct 2020 13:11:07 +0000 (13:11 +0000)] 
arm: [MVE[ Add vqdmlashq intrinsics (PR target/96914)

This patch adds:
vqdmlashq_m_n_s16
vqdmlashq_m_n_s32
vqdmlashq_m_n_s8
vqdmlashq_n_s16
vqdmlashq_n_s32
vqdmlashq_n_s8

2020-10-08  Christophe Lyon  <christophe.lyon@linaro.org>

gcc/
PR target/96914
* config/arm/arm_mve.h (vqdmlashq, vqdmlashq_m): Define.
* config/arm/arm_mve_builtins.def (vqdmlashq_n_s)
(vqdmlashq_m_n_s,): New.
* config/arm/unspecs.md (VQDMLASHQ_N_S, VQDMLASHQ_M_N_S): New
unspecs.
* config/arm/iterators.md (VQDMLASHQ_N_S, VQDMLASHQ_M_N_S): New
attributes.
(VQDMLASHQ_N): New iterator.
* config/arm/mve.md (mve_vqdmlashq_n_, mve_vqdmlashq_m_n_s): New
patterns.

gcc/testsuite/
PR target/96914
* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c: New test.
* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c: New test.
* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c: New test.
* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c: New test.
* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c: New test.
* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c: New test.

(cherry picked from commit afb198ee3729c29c8e681aedc656f55f4afe4053)

4 years agoRestrict PR middle-end/95886 x86 test to !ia32
H.J. Lu [Fri, 24 Jul 2020 02:14:06 +0000 (19:14 -0700)] 
Restrict PR middle-end/95886 x86 test to !ia32

Since gcc.target/i386/memcpy-pr95886.c requires 64-bit register, restrict
it to !ia32.

PR middle-end/95886
* gcc.target/i386/memcpy-pr95886.c: Restrict test to !ia32.

(cherry picked from commit b0e5ec934e7a7473275326e2aee58eaf252cdff1)

4 years agoRestrict test to LP64.
Martin Sebor [Thu, 23 Jul 2020 20:08:22 +0000 (14:08 -0600)] 
Restrict test to LP64.

gcc/testsuite/ChangeLog:

PR testsuite/95886
* gcc.target/i386/memcpy-pr95886.c: Restrict test to LP64.

(cherry picked from commit 8598657c607500512075f6c4ee3b10460c94903d)

4 years agocombine: Fix up simplify_shift_const_1 for nested ROTATEs [PR97386]
Jakub Jelinek [Tue, 13 Oct 2020 17:13:26 +0000 (19:13 +0200)] 
combine: Fix up simplify_shift_const_1 for nested ROTATEs [PR97386]

The following testcases are miscompiled (the first one since my improvements
to rotate discovery on GIMPLE, the other one for many years) because
combiner optimizes nested ROTATEs with narrowing SUBREG in between (i.e.
the outer rotate is performed in shorter precision than the inner one) to
just one ROTATE of the rotated constant.  While that (under certain
conditions) can work for shifts, it can't work for rotates where we can only
do that with rotates of the same precision.

2020-10-13  Jakub Jelinek  <jakub@redhat.com>

PR rtl-optimization/97386
* combine.c (simplify_shift_const_1): Don't optimize nested ROTATEs if
they have different modes.

* gcc.c-torture/execute/pr97386-1.c: New test.
* gcc.c-torture/execute/pr97386-2.c: New test.

(cherry picked from commit f76949cee9560d04d5417481dbcda5ca089c9ebc)

4 years agoopenmp: Set cfun->calls_alloca when needed in OpenMP outlined regions [PR97294]
Jakub Jelinek [Thu, 8 Oct 2020 09:10:34 +0000 (11:10 +0200)] 
openmp: Set cfun->calls_alloca when needed in OpenMP outlined regions [PR97294]

The following testcase FAILs, because we don't mark the child OpenMP function
as cfun->calls_alloca when it does call alloca.  When optimizing, during DCE we
reset those flags and recompute them again, but with -O0 DCE is not performed.

Fixed by calling notice_special_calls when moving insns to the child function.

cfun->calls_alloca is normally set during gimplification and most of the
alloca calls omp-low.c does go through the gimplifier, but one spot didn't
and built the gcall directly, so that one needs to set calls_alloca too.

2020-10-08  Jakub Jelinek  <jakub@redhat.com>

PR sanitizer/97294
* tree-cfg.c (move_block_to_fn): Call notice_special_calls on
call stmts being moved into dest_cfun.
* omp-low.c (lower_rec_input_clauses): Set cfun->calls_alloca when
adding __builtin_alloca_with_align call without gimplification.

* gcc.dg/asan/pr97294.c: New test.

(cherry picked from commit 273b30c8e93f043f65a04e0ff2ec305b311e98fa)

4 years agosupport TARGET_MEM_REF in C/C++ error pretty-printing [PR97197]
Jakub Jelinek [Mon, 5 Oct 2020 16:33:17 +0000 (18:33 +0200)] 
support TARGET_MEM_REF in C/C++ error pretty-printing [PR97197]

> See my comment above for Martins attempts to improve things.  I don't
> really want to try decide what to do with those late diagnostic IL
> printing but my commit was blamed for showing target-mem-ref unsupported.
>
> I don't have much time to spend to think what to best print and what not,
> but yes, printing only the MEM_REF part is certainly imprecise.

Here is an updated version of the patch that prints TARGET_MEM_REF the way
it should be printed - as C representation of what it actually means.
Of course it would be better to have the original expressions, but with the
late diagnostics we no longer have them.

2020-10-05  Richard Biener  <rguenther@suse.de>
    Jakub Jelinek  <jakub@redhat.com>

PR c++/97197
gcc/cp/
* error.c (dump_expr): Handle TARGET_MEM_REF.
gcc/c-family/
* c-pretty-print.c: Include langhooks.h.
(c_pretty_printer::postfix_expression): Handle TARGET_MEM_REF as
expression.
(c_pretty_printer::expression): Handle TARGET_MEM_REF as
unary_expression.
(c_pretty_printer::unary_expression): Handle TARGET_MEM_REF.

(cherry picked from commit ac1c65ad1a16d83ec63674efa07c00b062562f15)

4 years agoarm: Fix wrong code generated for mve scatter store with writeback intrinsics with...
Srinath Parvathaneni [Fri, 16 Oct 2020 10:40:25 +0000 (11:40 +0100)] 
arm: Fix wrong code generated for mve scatter store with writeback intrinsics with -O2 (PR97271).

This patch fixes (PR97271) the wrong code-gen for mve scatter store with writeback intrinsics with -O2.

$cat bug.c
void
foo (uint32x4_t * addr, const int offset, int32x4_t value)
{
  vstrwq_scatter_base_wb_s32 (addr, 8, value);
}

$ arm-none-eabi-gcc  bug.c -S -O2 -march=armv8.1-m.main+mve -mfloat-abi=hard -o -
Without this patch:
...
foo:
vldrw.32 q3, [r0]
vstrw.u32       q0, [q3, #8]!  ---> (A)
vldr.64 d4, .L3
vldr.64 d5, .L3+8
vldrw.32 q3, [r0]
vstrw.u32       q2, [q3, #8]!  ---> (B)
bx      lr
...

With this patch:
...
foo:
vldrw.32 q3, [r0]
vstrw.u32       q0, [q3, #8]!  --> (C)
vstrw.32 q3, [r0]
bx      lr
...

Without this patch 2 vstrw assembly instructions (A and B) are generated for vstrwq_scatter_base_wb_s32
intrinsic where as fix generates only one vstrw assembly instruction (C).

gcc/ChangeLog:

2020-10-06  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

PR target/97291
* config/arm/arm-builtins.c (arm_strsbwbs_qualifiers): Modify array.
(arm_strsbwbu_qualifiers): Likewise.
(arm_strsbwbs_p_qualifiers): Likewise.
(arm_strsbwbu_p_qualifiers): Likewise.
* config/arm/arm_mve.h (__arm_vstrdq_scatter_base_wb_s64): Modify
function definition.
(__arm_vstrdq_scatter_base_wb_u64): Likewise.
(__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
(__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
(__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
(__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
(__arm_vstrwq_scatter_base_wb_s32): Likewise.
(__arm_vstrwq_scatter_base_wb_u32): Likewise.
(__arm_vstrwq_scatter_base_wb_f32): Likewise.
(__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
* config/arm/arm_mve_builtins.def (vstrwq_scatter_base_wb_add_u): Remove
expansion for the builtin.
(vstrwq_scatter_base_wb_add_s): Likewise.
(vstrwq_scatter_base_wb_add_f): Likewise.
(vstrdq_scatter_base_wb_add_u): Likewise.
(vstrdq_scatter_base_wb_add_s): Likewise.
(vstrwq_scatter_base_wb_p_add_u): Likewise.
(vstrwq_scatter_base_wb_p_add_s): Likewise.
(vstrwq_scatter_base_wb_p_add_f): Likewise.
(vstrdq_scatter_base_wb_p_add_u): Likewise.
(vstrdq_scatter_base_wb_p_add_s): Likewise.
* config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Remove
expand.
(mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
(mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Rename pattern to ...
(mve_vstrwq_scatter_base_wb_<supf>v4si): This.
(mve_vstrwq_scatter_base_wb_p_<supf>v4si): Remove expand.
(mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
(mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Rename pattern to ...
(mve_vstrwq_scatter_base_wb_p_<supf>v4si): This.
(mve_vstrwq_scatter_base_wb_fv4sf): Remove expand.
(mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
(mve_vstrwq_scatter_base_wb_fv4sf_insn): Rename pattern to ...
(mve_vstrwq_scatter_base_wb_fv4sf): This.
(mve_vstrwq_scatter_base_wb_p_fv4sf): Remove expand.
(mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
(mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Rename pattern to ...
(mve_vstrwq_scatter_base_wb_p_fv4sf): This.
(mve_vstrdq_scatter_base_wb_<supf>v2di): Remove expand.
(mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
(mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Rename pattern to ...
(mve_vstrdq_scatter_base_wb_<supf>v2di): This.
(mve_vstrdq_scatter_base_wb_p_<supf>v2di): Remove expand.
(mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
(mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Rename pattern to ...
(mve_vstrdq_scatter_base_wb_p_<supf>v2di): This.

gcc/testsuite/ChangeLog:

PR target/97291
* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c: Modify.
* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c: Likewise.

(cherry picked from commit 377535881166969dba43794f298170978d797ef6)

4 years agoarm: Add +nomve and +nomve.fp options to -mcpu=cortex-m55
Joe Ramsay [Tue, 6 Oct 2020 06:33:52 +0000 (07:33 +0100)] 
arm: Add +nomve and +nomve.fp options to -mcpu=cortex-m55

This patch rearranges feature bits for MVE and FP to implement the
following flags for -mcpu=cortex-m55.

  - +nomve:    equivalent to armv8.1-m.main+fp.dp+dsp.
  - +nomve.fp: equivalent to armv8.1-m.main+mve+fp.dp (+dsp is implied by +mve).
  - +nofp:     equivalent to armv8.1-m.main+mve (+dsp is implied by +mve).
  - +nodsp:    equivalent to armv8.1-m.main+fp.dp.

Combinations of the above:

  - +nomve+nofp: equivalent to armv8.1-m.main+dsp.
  - +nodsp+nofp: equivalent to armv8.1-m.main.

Due to MVE and FP sharing vfp_base, some new syntax was required in the CPU
description to implement the concept of 'implied bits'. These are non-named
features added to the ISA late, depending on whether one or more features which
depend on them are present. This means vfp_base can be present when only one of
MVE and FP is removed, but absent when both are removed.

gcc/ChangeLog:

2020-07-31  Joe Ramsay  <joe.ramsay@arm.com>

* config/arm/arm-cpus.in:
(ALL_FPU_INTERNAL): Remove vfp_base.
(VFPv2): Remove vfp_base.
(MVE): Remove vfp_base.
(vfp_base): Redefine as implied bit dependent on MVE or FP
(cortex-m55): Add flags to disable MVE, MVE FP, FP and DSP extensions.
* config/arm/arm.c (arm_configure_build_target): Add implied bits to ISA.
* config/arm/parsecpu.awk:
(gen_isa): Print implied bits and their dependencies to ISA header.
(gen_data): Add parsing for implied feature bits.

gcc/testsuite/ChangeLog:

* gcc.target/arm/cortex-m55-nodsp-flag-hard.c: New test.
* gcc.target/arm/cortex-m55-nodsp-flag-softfp.c: New test.
* gcc.target/arm/cortex-m55-nodsp-nofp-flag-softfp.c: New test.
* gcc.target/arm/cortex-m55-nofp-flag-hard.c: New test.
* gcc.target/arm/cortex-m55-nofp-flag-softfp.c: New test.
* gcc.target/arm/cortex-m55-nofp-nomve-flag-softfp.c: New test.
* gcc.target/arm/cortex-m55-nomve-flag-hard.c: New test.
* gcc.target/arm/cortex-m55-nomve-flag-softfp.c: New test.
* gcc.target/arm/cortex-m55-nomve.fp-flag-hard.c: New test.
* gcc.target/arm/cortex-m55-nomve.fp-flag-softfp.c: New test.
* gcc.target/arm/multilib.exp: Add tests for -mcpu=cortex-m55.

(cherry picked from commit 3e8fb15a8cfd0e62dd474af9f536863392ed7572)

4 years agoipa-prop: Fix multiple-target speculation resolution
Martin Jambor [Wed, 7 Oct 2020 12:12:49 +0000 (14:12 +0200)] 
ipa-prop: Fix multiple-target speculation resolution

As the FIXME which this patch removes states, the current code does
not work when a call with multiple speculative targets gets resolved
through parameter tracking during inlining - it feeds the inliner an
edge it has already dealt with.  The patch makes the code which should
prevent it aware of the possibility that that speculation can have
more than one target now.

gcc/ChangeLog:

2020-09-30  Martin Jambor  <mjambor@suse.cz>

PR ipa/96394
* ipa-prop.c (update_indirect_edges_after_inlining): Do not add
resolved speculation edges to vector of new direct edges even in
presence of multiple speculative direct edges for a single call.

gcc/testsuite/ChangeLog:

2020-09-30  Martin Jambor  <mjambor@suse.cz>

PR ipa/96394
* gcc.dg/tree-prof/pr96394.c: New test.

(cherry picked from commit e089e43365f7f2a90979e2316aea25d44823f5a3)

4 years agoIPA: compare VRP types.
Martin Liska [Thu, 15 Oct 2020 12:57:31 +0000 (14:57 +0200)] 
IPA: compare VRP types.

gcc/ChangeLog:

PR ipa/97404
* ipa-prop.c (struct ipa_vr_ggc_hash_traits):
Compare types of VRP as we can merge ranges of different types.

gcc/testsuite/ChangeLog:

PR ipa/97404
* gcc.c-torture/execute/pr97404.c: New test.

(cherry picked from commit a86623902767122c71c7229150a8b8a79cbb3673)

4 years agoDaily bump.
GCC Administrator [Fri, 16 Oct 2020 00:17:05 +0000 (00:17 +0000)] 
Daily bump.

4 years agolibstdc++: Fix typos in copyright notice
Jonathan Wakely [Thu, 15 Oct 2020 18:19:15 +0000 (19:19 +0100)] 
libstdc++: Fix typos in copyright notice

It looks like I did a s/a/__a/ substition in one of these headers, and
then copied it to the other one.

libstdc++-v3/ChangeLog:

* include/std/concepts: Fix typos in copyright notice.
* include/std/ranges: Likewise.

(cherry picked from commit 7dbf96e2a2a673d78a23da9155c0b4c4c36621c7)

4 years agolibstdc++: Fix markup in C++20 status table
Jonathan Wakely [Thu, 15 Oct 2020 18:24:01 +0000 (19:24 +0100)] 
libstdc++: Fix markup in C++20 status table

* doc/xml/manual/status_cxx2020.xml: Remove red background for
completed feature.
* doc/html/manual/status.html: Regenerate.

4 years agoMIPS/libphobos: Fix switchcontext.S assembly for MIPS I ISA
Maciej W. Rozycki [Mon, 12 Oct 2020 18:09:13 +0000 (19:09 +0100)] 
MIPS/libphobos: Fix switchcontext.S assembly for MIPS I ISA

Correct MIPS I assembly build errors in switchcontext.S:

.../libphobos/libdruntime/config/mips/switchcontext.S: Assembler messages:
.../libphobos/libdruntime/config/mips/switchcontext.S:50: Error: opcode not supported on this processor: mips1 (mips1) `sdc1 $f20,(0*8-((6*8+4+(-6*8+4&7))))($sp)'

etc., due to the use of the MIPS II LDC1 and SDC1 hardware instructions
for FP register load and store operations.  Instead use the L.D and S.D
generic assembly instructions, which are strict aliases for the LDC1 and
SDC1 instructions respectively and produce identical machine code where
the assembly for the MIPS II or a higher ISA has been requested, however
they become assembly macros and expand to compatible sequences of LWC1
and SWC1 hardware instructions where the assembly for the MIPS I ISA is
in effect.

libphobos/
* libdruntime/config/mips/switchcontext.S [__mips_hard_float]:
Use L.D and S.D generic assembly instructions rather than LDC1
and SDC1 MIPS II hardware instructions.

(cherry picked from commit 6f0a4ae1274cc41ee9d9a142af5e51e416a2c08d)

4 years agoIPA: fix profile handling in IRA
Martin Liska [Tue, 13 Oct 2020 14:44:47 +0000 (16:44 +0200)] 
IPA: fix profile handling in IRA

gcc/ChangeLog:

PR ipa/97295
* profile-count.c (profile_count::to_frequency): Move part of
gcc_assert to STATIC_ASSERT.
* regs.h (REG_FREQ_FROM_BB): Do not use count.to_frequency for
a function that does not have count_max initialized.

(cherry picked from commit 508e2d88a4c512e8b8685cf5ba201ad48e6bb58d)

4 years agoDaily bump.
GCC Administrator [Thu, 15 Oct 2020 00:17:10 +0000 (00:17 +0000)] 
Daily bump.

4 years agoDaily bump.
GCC Administrator [Wed, 14 Oct 2020 00:17:00 +0000 (00:17 +0000)] 
Daily bump.

4 years agolibstdc++: Make ranges::construct_at constexpr-friendly [PR95788]
Patrick Palka [Thu, 8 Oct 2020 22:10:05 +0000 (18:10 -0400)] 
libstdc++: Make ranges::construct_at constexpr-friendly [PR95788]

This rewrites ranges::construct_at in terms of std::construct_at so
that we can piggyback on the compiler's existing support for
intercepting placement new within std::construct_at during constexpr
evaluation, instead of having to additionally teach the compiler about
ranges::construct_at.

While we're making changes to ranges::construct_at, this patch also
declares it conditionally noexcept and qualifies the calls to declval in
its requires-clause.

libstdc++-v3/ChangeLog:

PR libstdc++/95788
* include/bits/ranges_uninitialized.h:
(__construct_at_fn::operator()): Rewrite in terms of
std::construct_at.  Declare it conditionally noexcept.  Qualify
calls to declval in its requires-clause.
* testsuite/20_util/specialized_algorithms/construct_at/95788.cc:
New test.

(cherry picked from commit 9158a4d2a6cd58d6bb591d5ce64e766b399e4aef)

4 years agoc++: Set the constraints of a class type sooner [PR96229]
Patrick Palka [Thu, 8 Oct 2020 04:05:36 +0000 (00:05 -0400)] 
c++: Set the constraints of a class type sooner [PR96229]

In the testcase below, during processing (at parse time) of Y's base
class X<Y>, convert_template_argument calls is_compatible_template_arg
to check if the template argument Y is no more constrained than the
parameter P.  But at this point we haven't yet set Y's constraints, so
get_normalized_constraints_from_decl yields NULL_TREE as the normal form
and caches this result into the normalized_map.

We set Y's constraints later in cp_parser_class_specifier_1 but the
stale normal form in the normalized_map remains.  This ultimately causes
us to miss the constraint failure for Y<Z> because according to the
cached normal form, Y is not constrained.

This patch fixes this issue by moving up the call to
associate_classtype_constraints so that we set constraints before we
start processing a class's bases.

gcc/cp/ChangeLog:

PR c++/96229
* parser.c (cp_parser_class_specifier_1): Move call to
associate_classtype_constraints from here to ...
(cp_parser_class_head): ... here.
* pt.c (is_compatible_template_arg): Correct documentation to
say "argument is _no_ more constrained than the parameter".

gcc/testsuite/ChangeLog:

PR c++/96229
* g++.dg/cpp2a/concepts-class2.C: New test.

(cherry picked from commit 6b1b5c255f859e75a2d74ae58a011e846d87a277)

4 years agoAArch64: Add Neoverse N2 tuning model
Kyrylo Tkachov [Thu, 8 Oct 2020 14:36:25 +0000 (15:36 +0100)] 
AArch64: Add Neoverse N2 tuning model

This is the GCC 10 version of the Neoverse N2 tuning struct patch.
It's more or less identical.

Bootstrapped and tested on the branch.

gcc/
* config/aarch64/aarch64.c (neoversen2_tunings): Define.
* config/aarch64/aarch64-cores.def (neoverse-n2): Use it.

4 years agoarm: Fix ICEs in no-literal-pool.c on MVE [PR97251]
Alex Coplan [Wed, 30 Sep 2020 08:02:47 +0000 (09:02 +0100)] 
arm: Fix ICEs in no-literal-pool.c on MVE [PR97251]

This patch fixes ICEs when compiling
gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool.c with
-mfp16-format=ieee -mfloat-abi=hard -march=armv8.1-m.main+mve
-mpure-code.

The existing conditions in the movsf/movdf expanders (as well as the
no_literal_pool patterns) were too restrictive, requiring
TARGET_HARD_FLOAT instead of TARGET_VFP_BASE, which caused unrecognised
insns when compiling this testcase with integer MVE and -mpure-code.

gcc/ChangeLog:

PR target/97251
* config/arm/arm.md (movsf): Relax TARGET_HARD_FLOAT to
TARGET_VFP_BASE.
(movdf): Likewise.
* config/arm/vfp.md (no_literal_pool_df_immediate): Likewise.
(no_literal_pool_sf_immediate): Likewise.

(cherry picked from commit f63023fafbbc13545fef67e6b32a55b48a945fcf)