]> git.ipfire.org Git - thirdparty/kernel/stable.git/log
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2 weeks agoMerge tag 'socfpga_dts_updates_for_v6.17' of https://git.kernel.org/pub/scm/linux...
Arnd Bergmann [Tue, 22 Jul 2025 19:39:34 +0000 (21:39 +0200)] 
Merge tag 'socfpga_dts_updates_for_v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt

SoCFPGA DTS updates for v6.17
- Fix dt_binding_check warnings
- agilex - f2s-free-clk
- stratix10 - rstmgr
- swvp - remove phy-addr, cpu1-start-addr and altr,modrst-offset

* tag 'socfpga_dts_updates_for_v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: altera: socfpga_stratix10: update internal oscillators
  arm64: dts: socfpga: swvp: remove phy-addr in the GMAC node
  arm64: dts: socfpga: swvp: remove cpu1-start-addr
  arm64: dts: socfpga: swvp: remove altr,modrst-offset
  arm64: dts: socfpga: stratix10: fix dtbs_check for rstmgr
  arm64: dts: socfpga: agilex: fix dtbs_check warning for f2s-free-clk

Link: https://lore.kernel.org/r/20250712123248.16981-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'tegra-for-6.17-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Tue, 22 Jul 2025 19:38:44 +0000 (21:38 +0200)] 
Merge tag 'tegra-for-6.17-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

arm64: tegra: Changes for v6.17-rc1

Add support for the Tegra264 SoC and the corresponding engineering
reference hardware (P3971-0089+P3834-0008).

* tag 'tegra-for-6.17-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Add p3971-0089+p3834-0008 support
  arm64: tegra: Add memory controller on Tegra264
  arm64: tegra: Add Tegra264 support

Link: https://lore.kernel.org/r/20250711220943.2389322-7-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'tegra-for-6.17-arm-dt' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Tue, 22 Jul 2025 19:37:39 +0000 (21:37 +0200)] 
Merge tag 'tegra-for-6.17-arm-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

ARM: tegra: Device tree changes for v6.17-rc1

Add support for two Tegra30 ASUS devices and enable the embedded
controller on Pegatron Chagall.

* tag 'tegra-for-6.17-arm-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: chagall: Add embedded controller node
  ARM: tegra: Add device-tree for Asus Portable AiO P1801-T
  ARM: tegra: Add device-tree for ASUS VivoTab RT TF600T

Link: https://lore.kernel.org/r/20250711220943.2389322-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'tegra-for-6.17-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Tue, 22 Jul 2025 19:36:28 +0000 (21:36 +0200)] 
Merge tag 'tegra-for-6.17-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

dt-bindings: Updates for v6.17-rc1

Add Tegra264 compatible strings for some core components and extend
bindings where necessary to accomodate the new hardware generation. Also
document some new platforms, for both old and new chips.

* tag 'tegra-for-6.17-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: arm: tegra: Add Asus Portable AiO P1801-T
  dt-bindings: arm: tegra: Add Asus VivoTab RT TF600T
  dt-bindings: Add Tegra264 clock and reset definitions
  dt-bindings: tegra: Document P3971-0089+P3834-0008 Platform
  dt-bindings: rtc: tegra: Document Tegra264 RTC
  dt-bindings: dma: Add Tegra264 compatible string
  dt-bindings: misc: Document Tegra264 APBMISC compatible
  dt-bindings: firmware: Document Tegra264 BPMP
  dt-bindings: mailbox: tegra-hsp: Properly sort compatible string list
  dt-bindings: mailbox: tegra-hsp: Bump number of shared interrupts
  dt-bindings: tegra: pmc: Add Tegra264 compatible
  dt-bindings: memory: tegra: Add Tegra264 support

Link: https://lore.kernel.org/r/20250711220943.2389322-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'mtk-dts64-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Mon, 21 Jul 2025 15:07:30 +0000 (17:07 +0200)] 
Merge tag 'mtk-dts64-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt

MediaTek ARM64 DeviceTree updates for v6.17

This adds new machines and improves support for already supported
MediaTek SoCs.

In particular:
 - New machine: MT8186 Steelix Squirtle Chromebook
 - Steelix-Voltorb's two dts are merged in one

...and improvements for already supported SoCs and machines:
 - Added reserved memory for AFE DMA for MT8173/83/86/92,
   aligning audio related memory allocation between all of
   the Chromebook SoCs
 - Added second source components for Steelix, and marked the
   multiple trackpads for Asurada as such
 - MediaTek Genio 1200: Enabled support for the Audio DSP and sound
 - MediaTek Genio 510/700/1200: Added support for the PMIC Keys
 - MediaTek MT7988: Added Cache Coherent Interconnect for CPU DVFS
 - MT7988A-BananaPi-R4: Enabled CCI, added GPIO LEDs
 - Airoha EN7581: Added ethernet nodes to Evaluation Board

* tag 'mtk-dts64-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
  arm64: dts: mediatek: mt8395-genio-1200-evk: Add MT6359 PMIC key support
  arm64: dts: mediatek: mt8390-genio-common: Add Home MT6359 PMIC key support
  arm64: dts: mediatek: mt7988a-bpi-r4: add gpio leds
  arm64: dts: mediatek: mt7988a-bpi-r4: drop unused pins
  arm64: dts: mediatek: mt7988a-bpi-r4: add proc-supply for cci
  arm64: dts: mediatek: mt7988: add cci node
  dt-bindings: interconnect: add mt7988-cci compatible
  arm64: dts: airoha: en7581: Add ethernet nodes to EN7581 SoC evaluation board
  arm64: dts: mediatek: mt8192-asurada-spherion: Mark trackpads as fail-needs-probe
  arm64: dts: mediatek: mt8186: Add Squirtle Chromebooks
  arm64: dts: mediatek: mt8186: Merge Voltorb device trees
  arm64: dts: mediatek: mt8186-steelix: Mark second source components for probing
  dt-bindings: arm: mediatek: Add MT8186 Squirtle Chromebooks
  dt-bindings: arm: mediatek: Merge MT8186 Voltorb entries
  arm64: dts: mediatek: mt8395-genio-1200-evk: Enable Audio DSP and sound card
  arm64: dts: mediatek: mt8192-asurada: Reserve memory for audio frontend
  arm64: dts: mediatek: mt8186-corsola: Reserve memory for audio frontend
  arm64: dts: mediatek: mt8183-kukui: Reserve memory for audio frontend
  arm64: dts: mediatek: mt8173: Reserve memory for audio frontend

Link: https://lore.kernel.org/r/20250711083656.33538-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'mtk-dts32-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Mon, 21 Jul 2025 15:06:24 +0000 (17:06 +0200)] 
Merge tag 'mtk-dts32-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt

MediaTek mach ARM32 updates

This adds support for the MediaTek MT6572 SoC, found in various
old smartphones and tablets from various manufacturers.

In particular, this adds a board_dt_compat entry for this SoC
and its SMP bring up sequence to enable secondary cores.

* tag 'mtk-dts32-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
  ARM: dts: mediatek: add basic support for Lenovo A369i board
  ARM: dts: mediatek: add basic support for JTY D101 board
  ARM: dts: mediatek: add basic support for MT6572 SoC
  dt-bindings: arm: mediatek: add boards based on the MT6572 SoC
  dt-bindings: vendor-prefixes: add JTY
  dt-bindings: watchdog: mediatek,mtk-wdt: add MT6572
  dt-bindings: interrupt-controller: mediatek,mt6577-sysirq: add MT6572

Link: https://lore.kernel.org/r/20250711083656.33538-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'omap-for-v6.17/dt-signed' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Mon, 21 Jul 2025 15:05:46 +0000 (17:05 +0200)] 
Merge tag 'omap-for-v6.17/dt-signed' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap into soc/dt

arm: dts: OMAP updates for v6.17
- new board support: Seeed BeagleBone Green Eco
- misc. fixups / cleanups

* tag 'omap-for-v6.17/dt-signed' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap:
  arm: dts: ti: omap: Fixup pinheader typo
  ARM: dts: am335x-pdu001: Fix RS-485 transceiver switching
  arm: dts: omap: Add support for BeagleBone Green Eco board
  dt-bindings: omap: Add Seeed BeagleBone Green Eco
  arm: dts: omap: am335x-bone-common: Rename tps to generic pmic node
  Revert "ARM: dts: Update pcie ranges for dra7"
  ARM: dts: omap: am335x: Use non-deprecated rts-gpios

Link: https://lore.kernel.org/r/7h7c0gxczy.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'stm32-dt-for-v6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Mon, 21 Jul 2025 15:04:38 +0000 (17:04 +0200)] 
Merge tag 'stm32-dt-for-v6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt

STM32 DT for v6.17, round 1

Highlights:
----------

- MPU:
  - STM32MP13:
    -Add Ethernet MAC adress efuse support.

  - STMP32MP15:
    - Add stm32mp157f-DK2 board support. This board embedds the same
      conectivity devices, DDR ... than stm32mp157c-dk2.
      However there are two differences: STM32MP157F SoC which allows
      overdrive OPP and the SCMI support for system features like
      clocks and regulators.

  - STM32MP25:
    - Fix tick timer for low power use cases.
    - Add timer support.

* tag 'stm32-dt-for-v6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  arm64: dts: st: remove empty line in stm32mp251.dtsi
  arm64: dts: st: fix timer used for ticks
  arm64: defconfig: Enable STM32 Octo Memory Manager and OcstoSPI driver
  ARM: dts: stm32: add stm32mp157f-dk2 board support
  dt-bindings: arm: stm32: add STM32MP157F-DK2 board compatible
  ARM: dts: stm32: optee async notif interrupt for MP15 scmi variants
  ARM: dts: stm32: use internal regulators bindings for MP15 scmi variants
  dt-bindings: regulator: Add STM32MP15 SCMI regulator identifiers
  ARM: dts: stm32: use 'typec' generic name for stusb1600 on stm32mp15xx-dkx
  ARM: dts: stm32: fullfill diversity with OPP for STM32M15xF SOCs
  ARM: dts: stm32: add system-clock-direction-out on stm32mp15xx-dkx
  arm64: defconfig: enable STM32 timers drivers
  arm64: dts: st: add timer nodes on stm32mp257f-ev1
  arm64: dts: st: add timer pins for stm32mp257f-ev1
  arm64: dts: st: add timer nodes on stm32mp251
  ARM: dts: stm32: Add nvmem-cells to ethernet nodes for constant mac-addresses

Link: https://lore.kernel.org/r/b3e3363b-1ea5-457c-b244-2cbe26f7d6e4@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'v6.17-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Mon, 21 Jul 2025 15:03:14 +0000 (17:03 +0200)] 
Merge tag 'v6.17-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt

New boards: ROC-RK3588S-PC, Luckfox Omni3576, Radxa Rock 5T,
Sakura Pi RK3308B - all of them have the used soc in their name.

New overlays: RockPro64 screen, optional Sige5 Wifi/BT module,
ethernet-switch addon for Jaguar.

Added peripherals on rk3528 (spi, power-domain controller, gpu)
and sdio controller on rk3576.

DSI display support for the Gameforce-ACE handheld, a fix for the
cover-detection (closed/open) on the PineNote, camera support for
the Haikou Video Demo overlay on PX30 Ringneck as well as a number
of other newly enabled peripherals on a number of boards.

* tag 'v6.17-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (40 commits)
  arm64: dts: rockchip: Enable eMMC HS200 mode on Radxa E20C
  arm64: dts: rockchip: Add bluetooth support to ArmSoM Sige7
  arm64: dts: rockchip: enable PCIe on ROCK 4D
  arm64: dts: rockchip: Enable HDMI receiver on CM3588
  arm64: dts: rockchip: Add HDMI PHY PLL clock source to VOP2 on rk3576
  arm64: dts: rockchip: Enable HDMI PHY clk provider on rk3576
  arm64: dts: rockchip: add DTs for Firefly ROC-RK3588S-PC
  dt-bindings: arm: rockchip: Add Firefly ROC-RK3588S-PC
  arm64: dts: rockchip: Enable GPU on Radxa E20C
  arm64: dts: rockchip: Add GPU node for RK3528
  arm64: dts: rockchip: support camera module on Haikou Video Demo on PX30 Ringneck
  arm64: dts: rockchip: add label to first port of ISP on px30
  arm64: dts: rockchip: fix endpoint dtc warning for PX30 ISP
  arm64: dts: rockchip: Add power controller for RK3528
  arm64: dts: rockchip: enable USB on Sige5
  arm64: dts: rockchip: add overlay for the WiFi/BT module on Sige5 v1.2
  arm64: dts: rockchip: add version-independent WiFi/BT nodes on Sige5
  arm64: dts: rockchip: add SDIO controller on RK3576
  arm64: dts: rockchip: Enable gpu on rk3576-evb1-v10
  arm64: dts: rockchip: Update the PinePhone Pro panel description
  ...

Link: https://lore.kernel.org/r/15465458.uLZWGnKmhe@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoarm64: dts: nuvoton: npcm8xx: Drop the GIC "ppi-partitions" node
Rob Herring (Arm) [Thu, 10 Jul 2025 03:09:38 +0000 (12:39 +0930)] 
arm64: dts: nuvoton: npcm8xx: Drop the GIC "ppi-partitions" node

The Arm GIC "ppi-partitions" node is only relevant to GICv3 and makes no
sense for GICv2 implementations which the GIC-400 is. PPIs in GICv2 have
no CPU affinity.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20250609203721.2852879-1-robh@kernel.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/r/20250710-nuvoton-arm64-dt-v1-1-ec7db96ea507@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'aspeed-6.17-devicetree-1' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Mon, 21 Jul 2025 15:01:43 +0000 (17:01 +0200)] 
Merge tag 'aspeed-6.17-devicetree-1' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt

ASPEED devicetree updates for 6.17

Removed platforms:

- IBM's Swift BMC

New platforms:

- Meta's Santabarbara

  Santabarbara is a compute node with an accelerator module

- NVIDIA's GB200NVL BMC

  NVIDIA GB200 NVL72 connects 36 Grace CPUs and 72 Blackwell GPUs in an NVIDIA
  NVLink-connected, liquid-cooled, rack-scale design.

Updated BMC platforms:

- Bletchley (Meta): GPIO hog names, remove ethernet-phy node, USB PD negotiation
- Catalina (Meta): Various sensors added, MCTP support for NIC management
- Harma (Meta): Various sensors added
- System1 (IBM): IPMB and various GPIO-related updates
- Yosemite4 (Meta): GPIO names for UART mux select lines

The System1 series includes a devicetree binding patch for IPMI IPMB devices.

* tag 'aspeed-6.17-devicetree-1' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux: (34 commits)
  ARM: dts: aspeed: yosemite4: add gpio name for uart mux sel
  ARM: dts: aspeed: santabarbara: Add Meta Santabarbara BMC
  dt-bindings: arm: aspeed: add Meta Santabarbara board
  ARM: dts: aspeed: bletchley: enable USB PD negotiation
  ARM: dts: aspeed: lanyang: Fix 'lable' typo in LED nodes
  ARM: dts: aspeed: harma: add mmc health
  ARM: dts: aspeed: Harma: revise gpio bride pin for battery
  ARM: dts: aspeed: harma: add ADC128D818 for voltage monitoring
  ARM: dts: aspeed: harma: add fan board I/O expander
  ARM: dts: aspeed: harma: add E1.S power monitor
  ARM: dts: aspeed: catalina: Enable MCTP for frontend NIC management
  ARM: dts: aspeed: Add device tree for Nvidia's GB200NVL BMC
  dt-bindings: arm: aspeed: add Nvidia's GB200NVL BMC
  ARM: dts: aspeed: catalina: Enable MCTP support for NIC management
  ARM: dts: aspeed: catalina: Update CBC FRU EEPROM I2C bus and address
  ARM: dts: aspeed: catalina: Enable multi-master on additional I2C buses
  ARM: dts: aspeed: catalina: Remove INA238 and INA230 nodes
  ARM: dts: aspeed: catalina: Add second source HSC node support
  ARM: dts: aspeed: catalina: Add second source fan controller support
  ARM: dts: aspeed: catalina: Add fan controller support
  ...

Link: https://lore.kernel.org/r/36d50489cac1fbae01ec699b742f6c6c459a01cb.camel@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'renesas-dts-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Mon, 21 Jul 2025 15:00:32 +0000 (17:00 +0200)] 
Merge tag 'renesas-dts-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.17 (take two)

  - Add support for the Renesas Gray Hawk Single board with R-Car
    V4M-7 (R8A779H2),
  - Add eMMC and microSD expansion board support for the RZ/V2H and
    RZ/V2N EVK development boards,
  - Add GPIO keys and Ethernet support for the RZ/G3E SoM and SMARC
    Carrier-II EVK development board,
  - Add QSPI FLASH support for the RZ/V2H and RZ/V2N SoCs and their EVK
    development boards,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable serial NOR FLASH
  arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable serial NOR FLASH
  arm64: dts: renesas: r9a09g057: Add XSPI node
  arm64: dts: renesas: r9a09g056: Add XSPI node
  arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Fix pinctrl node name for GBETH1
  arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Fix pinctrl node name for GBETH1
  arm64: dts: renesas: r8a779g3-sparrow-hawk-fan-pwm: Add missing install target
  arm64: dts: renesas: rzg3e-smarc-som: Enable eth{0-1} (GBETH) interfaces
  arm64: dts: renesas: r9a09g047e57-smarc: Add gpio keys
  arm64: dts: renesas: Add CN15 eMMC and SD overlays for RZ/V2H and RZ/V2N EVKs
  arm64: dts: renesas: r8a779h2: Add Gray Hawk Single support
  arm64: dts: renesas: Add Renesas R8A779H2 SoC support
  arm64: dts: renesas: Factor out Gray Hawk Single board support
  dt-bindings: clock: renesas,r9a09g056/57-cpg: Add XSPI core clock

Link: https://lore.kernel.org/r/cover.1752090401.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'renesas-dt-bindings-for-v6.17-tag2' of https://git.kernel.org/pub/scm...
Arnd Bergmann [Mon, 21 Jul 2025 15:00:03 +0000 (17:00 +0200)] 
Merge tag 'renesas-dt-bindings-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DT binding updates for v6.17 (take two)

  - Document support for the Renesas Gray Hawk Single board with R-Car
    V4M-7 (R8A779H2).

* tag 'renesas-dt-bindings-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  dt-bindings: soc: renesas: Document R-Car V4M-7 Gray Hawk Single

Link: https://lore.kernel.org/r/cover.1752090400.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'samsung-dt64-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Mon, 21 Jul 2025 14:59:37 +0000 (16:59 +0200)] 
Merge tag 'samsung-dt64-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt

Samsung DTS ARM64 changes for v6.17

1. New SoC - Exynos2200 SoC - with basic nodes, pin controllers,
   clock controllers and initial USB support.  Add board using it:
   Samsung Galaxy S22+ (SM-S906B), called G0S.

2. ExynosAutov920: Add CMU_HSI2 clock controller, remaining SPI nodes

3. Google GS101:
   - Prepare to switching to architected timer, instead of Exynos MCT as
     the primary one.
   - Add secondary Maxim MAX77759 PMIC to Pixel boards, managing USB Type-C and
     charger.
   - Add incomplete description of the primary Samsung S2MPG10 PMIC.
     Several bits, like regulators, are still missing, though.
   - Add also secondary reboot-mode, via MAX77759 NVMEM.
   - Switch the primary (SoC) reboot handler to Google specific
     google,gs101-reboot which gives additional GS101 features (cold and
     warm reboots).
     This change will affect other users of this DTS, but to our
     knowledge there is only Android, from which this change originates.

4. Exynos7870:
   - Fix speed problems in USB gadget mode.
   - Correct memory map to avoid crashes due to secure world.

* tag 'samsung-dt64-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos7870-j6lte: reduce memory ranges to base amount
  arm64: dts: exynos7870-on7xelte: reduce memory ranges to base amount
  arm64: dts: exynos7870: add quirk to disable USB2 LPM in gadget mode
  arm64: dts: exynos: gs101: switch to gs101 specific reboot
  arm64: dts: exynos: gs101-pixel-common: add main PMIC node
  arm64: dts: exynos: gs101: ufs: add dma-coherent property
  arm64: dts: exynos: gs101: add dm-verity-device-corrupted syscon-reboot-mode
  arm64: dts: exynos: gs101-pixel-common: add nvmem-reboot-mode
  arm64: dts: exynos: gs101-pixel-common: add Maxim MAX77759 PMIC
  arm64: dts: exynos5433: Align i2c-gpio node names with dtschema
  arm64: dts: exynos: gs101: Add 'local-timer-stop' to cpuidle nodes
  arm64: dts: exynosautov920: Add DT node for all SPI ports
  arm64: dts: exynosautov920: add CMU_HSI2 clock DT nodes
  MAINTAINERS: add entry for Samsung Exynos2200 SoC
  arm64: dts: exynos: add initial support for Samsung Galaxy S22+
  arm64: dts: exynos: add initial support for exynos2200 SoC
  dt-bindings: arm: samsung: document g0s board binding

Link: https://lore.kernel.org/r/20250709191523.171359-6-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'samsung-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk...
Arnd Bergmann [Mon, 21 Jul 2025 14:59:03 +0000 (16:59 +0200)] 
Merge tag 'samsung-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt

Samsung DTS ARM changes for v6.17

Just few cleanups based on dtbs_check.

* tag 'samsung-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: s5pv210: Align i2c-gpio node names with dtschema
  ARM: dts: exynos: Align i2c-gpio node names with dtschema

Link: https://lore.kernel.org/r/20250709191523.171359-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'dt-vt8500-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk...
Arnd Bergmann [Mon, 21 Jul 2025 14:58:30 +0000 (16:58 +0200)] 
Merge tag 'dt-vt8500-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt

VT8500 DTS ARM changes for v6.17

1. Several dtbs_check cleanups.
2. Add missing cache topology - L2 cache controller on WM8850/WM895.

* tag 'dt-vt8500-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
  ARM: dts: vt8500: Add L2 cache controller on WM8850/WM8950
  ARM: dts: vt8500: Fix the unit address of the VT8500 LCD controller
  ARM: dts: vt8500: Use generic node name for the SD/MMC controller
  ARM: dts: vt8500: Move memory nodes to board dts and fix addr/size
  ARM: dts: vt8500: Add node address and reg in CPU nodes

Link: https://lore.kernel.org/r/20250709184800.168462-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 weeks agoarm64: dts: altera: socfpga_stratix10: update internal oscillators
Matthew Gerlach [Wed, 25 Jun 2025 15:14:42 +0000 (08:14 -0700)] 
arm64: dts: altera: socfpga_stratix10: update internal oscillators

Add the clock-frequency property to the cb_intosc_ls_clk and
cb_intosc_hs_div2_clk device tree nodes.

The f2s_free_clk is implemented by custom logic in the FPGA; so it
should be disabled in the dtsi by default and enabled by a
dts for a specific FPGA design on a specific board.

Signed-off-by: Matthew Gerlach <matthew.gerlach@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
4 weeks agoarm64: dts: socfpga: swvp: remove phy-addr in the GMAC node
Dinh Nguyen [Sun, 22 Jun 2025 11:52:49 +0000 (06:52 -0500)] 
arm64: dts: socfpga: swvp: remove phy-addr in the GMAC node

This addresses this warning:
socfpga_stratix10_swvp.dtb: ethernet@ff800000 (altr,socfpga-stmmac-a10-s10):
'phy-addr' does not match any of the regexes: '^pinctrl-[0-9]+$'

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
4 weeks agoarm64: dts: socfpga: swvp: remove cpu1-start-addr
Dinh Nguyen [Thu, 5 Jun 2025 18:19:20 +0000 (13:19 -0500)] 
arm64: dts: socfpga: swvp: remove cpu1-start-addr

The cpu1-start-addr property is only applicable to 32-bit SoCFPGA
platforms.

Removing this property will take care of warnings like this:
socfpga_stratix10_swvp.dtb: sysmgr@ffd12000: cpu1-start-addr:
False schema does not allow 4291846704

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
4 weeks agoarm64: dts: socfpga: swvp: remove altr,modrst-offset
Dinh Nguyen [Wed, 4 Jun 2025 20:18:07 +0000 (15:18 -0500)] 
arm64: dts: socfpga: swvp: remove altr,modrst-offset

'altr,modrst-offset' property is not applicable for arm64 SoCFPGA
platforms.

This will fix this dtbs_check warning:

socfpga_stratix10_swvp.dtb:
rstmgr@ffd11000: altr,modrst-offset: False schema does not allow 32

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
4 weeks agoarm64: dts: socfpga: stratix10: fix dtbs_check for rstmgr
Dinh Nguyen [Wed, 4 Jun 2025 19:49:55 +0000 (14:49 -0500)] 
arm64: dts: socfpga: stratix10: fix dtbs_check for rstmgr

Add the default "altr,rst-mgr" to the rstmgr node on Stratix10.

This fixes this warning:

arch/arm64/boot/dts/altera:33:10
rstmgr@ffd11000 (altr,stratix10-rst-mgr): compatible: 'oneOf' conditional
failed, one must be fixed:

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
4 weeks agoarm64: dts: socfpga: agilex: fix dtbs_check warning for f2s-free-clk
Dinh Nguyen [Wed, 4 Jun 2025 18:44:08 +0000 (13:44 -0500)] 
arm64: dts: socfpga: agilex: fix dtbs_check warning for f2s-free-clk

The f2s-free-clk requires a clock-frequency value. We put in an
arbitrary value of 100 MHz for a constant. The true clock frequency
would get generated in an FPGA design and the bootloader will populated
in actual hardware designs.

This fixes warning like this:

arch/arm64/boot/dts/intel:34:8
      4  f2s-free-clk (fixed-clock): 'clock-frequency' is a required property

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
4 weeks agoARM: tegra: chagall: Add embedded controller node
Svyatoslav Ryhel [Tue, 29 Apr 2025 06:18:02 +0000 (09:18 +0300)] 
ARM: tegra: chagall: Add embedded controller node

Add embedded controller node to Pegatron Chagall device-tree.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Link: https://lore.kernel.org/r/20250429061803.9581-5-clamor95@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agoARM: tegra: Add device-tree for Asus Portable AiO P1801-T
Svyatoslav Ryhel [Mon, 16 Jun 2025 07:39:47 +0000 (10:39 +0300)] 
ARM: tegra: Add device-tree for Asus Portable AiO P1801-T

Add a device-tree for the Asus Portable AiO P1801-T, which is a NVIDIA
Tegra30-based 2-in-1 detachable tablet, originally running Android.

The tablet was also sold together with a PC docking station as the
Transformer AiO P1801.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # P1801-T with dock
Co-developed-by: Maxim Schwalm <maxim.schwalm@gmail.com>
Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Link: https://lore.kernel.org/r/20250616073947.13675-3-clamor95@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agodt-bindings: arm: tegra: Add Asus Portable AiO P1801-T
Maxim Schwalm [Mon, 16 Jun 2025 07:39:46 +0000 (10:39 +0300)] 
dt-bindings: arm: tegra: Add Asus Portable AiO P1801-T

Add a compatible for the Asus Portable AiO P1801-T.

Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250616073947.13675-2-clamor95@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agoarm64: tegra: Add p3971-0089+p3834-0008 support
Thierry Reding [Wed, 9 Jul 2025 23:13:59 +0000 (01:13 +0200)] 
arm64: tegra: Add p3971-0089+p3834-0008 support

The P3971-0089+P3834-0008 is an engineering reference platform for the
Tegra264 SoC.

Link: https://lore.kernel.org/r/20250709231401.3767130-3-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agoarm64: tegra: Add memory controller on Tegra264
Thierry Reding [Wed, 9 Jul 2025 23:14:00 +0000 (01:14 +0200)] 
arm64: tegra: Add memory controller on Tegra264

Link: https://lore.kernel.org/r/20250709231401.3767130-4-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agoarm64: tegra: Add Tegra264 support
Thierry Reding [Wed, 9 Jul 2025 23:13:58 +0000 (01:13 +0200)] 
arm64: tegra: Add Tegra264 support

Add basic support for the Tegra264 SoC, sufficient for booting into an
initial ramdisk.

Link: https://lore.kernel.org/r/20250709231401.3767130-2-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agoMerge branch 'for-6.17/dt-bindings' into for-6.17/arm64/dt
Thierry Reding [Fri, 11 Jul 2025 14:50:17 +0000 (16:50 +0200)] 
Merge branch 'for-6.17/dt-bindings' into for-6.17/arm64/dt

4 weeks agodt-bindings: arm: tegra: Add Asus VivoTab RT TF600T
Maxim Schwalm [Tue, 17 Jun 2025 07:03:19 +0000 (10:03 +0300)] 
dt-bindings: arm: tegra: Add Asus VivoTab RT TF600T

Add a compatible for the Asus VivoTab RT TF600T.

Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250617070320.9153-2-clamor95@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agodt-bindings: Add Tegra264 clock and reset definitions
Thierry Reding [Tue, 8 Jul 2025 08:28:11 +0000 (10:28 +0200)] 
dt-bindings: Add Tegra264 clock and reset definitions

The BPMP firmware on Tegra264 defines a set of IDs for clock and reset
resources. These are not enumerations but provided by hardware, and 0 is
a reserved value, hence the numbering starts at 1.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agodt-bindings: tegra: Document P3971-0089+P3834-0008 Platform
Thierry Reding [Wed, 7 May 2025 14:37:57 +0000 (16:37 +0200)] 
dt-bindings: tegra: Document P3971-0089+P3834-0008 Platform

This is an engineering reference platform for the Tegra264 SoC.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250507143802.1230919-4-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agodt-bindings: rtc: tegra: Document Tegra264 RTC
Thierry Reding [Wed, 7 May 2025 14:37:56 +0000 (16:37 +0200)] 
dt-bindings: rtc: tegra: Document Tegra264 RTC

Add the compatible string for the RTC block found on the Tegra264 SoC.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250507143802.1230919-3-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agodt-bindings: dma: Add Tegra264 compatible string
Thierry Reding [Wed, 7 May 2025 14:37:55 +0000 (16:37 +0200)] 
dt-bindings: dma: Add Tegra264 compatible string

Document the compatible string used for the GPCDMA controller on
Tegra264.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250507143802.1230919-2-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agodt-bindings: misc: Document Tegra264 APBMISC compatible
Thierry Reding [Tue, 6 May 2025 13:31:12 +0000 (15:31 +0200)] 
dt-bindings: misc: Document Tegra264 APBMISC compatible

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506133118.1011777-6-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agodt-bindings: firmware: Document Tegra264 BPMP
Thierry Reding [Tue, 6 May 2025 13:31:11 +0000 (15:31 +0200)] 
dt-bindings: firmware: Document Tegra264 BPMP

While the BPMP found on Tegra264 is similar to the versions found on
previous chips and should be backwards-compatible, some changes could
eventually be needed. Anticipate such changes and introduce a chip-
specific compatible string.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506133118.1011777-5-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agodt-bindings: mailbox: tegra-hsp: Properly sort compatible string list
Thierry Reding [Tue, 6 May 2025 13:31:10 +0000 (15:31 +0200)] 
dt-bindings: mailbox: tegra-hsp: Properly sort compatible string list

Device tree maintainers prefer all single entry cases to be grouped
under an enum. Furthermore, alphanumeric ordering is easier for the
majority of people to understand than ordering by release, which is
quirky.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506133118.1011777-4-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agodt-bindings: mailbox: tegra-hsp: Bump number of shared interrupts
Thierry Reding [Tue, 6 May 2025 13:31:09 +0000 (15:31 +0200)] 
dt-bindings: mailbox: tegra-hsp: Bump number of shared interrupts

It turns out that some instances of the HSP block on Tegra264 can have
up to 16 shared interrupts, so bump the maximum number of allowed
interrupts.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506133118.1011777-3-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agodt-bindings: memory: tegra: Add Tegra264 support
Sumit Gupta [Wed, 9 Jul 2025 22:21:46 +0000 (00:21 +0200)] 
dt-bindings: memory: tegra: Add Tegra264 support

Add bindings for the Memory Controller (MC) and External Memory
Controller (EMC) found on the Tegra264 SoC. Tegra264 SoC has a different
number of interrupt lines for MC sub-units: UCF_SOC, hub, hub common,
syncpoint and MC channel. The total number of interrupt lines is eight.
Update maxItems for MC interrupts accordingly.

This also adds a header containing the memory client ID definitions that
are used by the interconnects property in DT and the tegra_mc_client
table in the MC driver. These IDs are defined by the hardware, so the
numbering doesn't start at 0 and contains holes. Also added are the
stream IDs for various hardware blocks found on Tegra264. These are
allocated as blocks of 256 IDs and each block can be subdivided for
additional fine-grained isolation if needed.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
[treding@nvidia.com: add SMMU stream IDs, squash patches]
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250709222147.3758356-2-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agodt-bindings: tegra: pmc: Add Tegra264 compatible
Thierry Reding [Tue, 6 May 2025 13:31:08 +0000 (15:31 +0200)] 
dt-bindings: tegra: pmc: Add Tegra264 compatible

The PMC found on Tegra264 is similar to the version in earlier chips but
some of the register offsets and bitfields differ, so add a specific
compatible string for this new generation.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506133118.1011777-2-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agoARM: dts: mediatek: add basic support for Lenovo A369i board
Max Shevchenko [Wed, 2 Jul 2025 10:50:48 +0000 (13:50 +0300)] 
ARM: dts: mediatek: add basic support for Lenovo A369i board

This smartphone uses a MediaTek MT6572 system-on-chip with 512MB of RAM.
It can currently boot into initramfs with a working UART and
Simple Framebuffer using already initialized panel by the bootloader.

Signed-off-by: Max Shevchenko <wctrl@proton.me>
Link: https://lore.kernel.org/r/20250702-mt6572-v4-11-bde75b7ed445@proton.me
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
4 weeks agoARM: dts: mediatek: add basic support for JTY D101 board
Max Shevchenko [Wed, 2 Jul 2025 10:50:47 +0000 (13:50 +0300)] 
ARM: dts: mediatek: add basic support for JTY D101 board

This tablet uses a MediaTek MT6572 system-on-chip with 1GB of RAM.
It can currently boot into initramfs with a working UART and
Simple Framebuffer using already initialized panel by the bootloader.

Signed-off-by: Max Shevchenko <wctrl@proton.me>
Link: https://lore.kernel.org/r/20250702-mt6572-v4-10-bde75b7ed445@proton.me
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
4 weeks agoARM: dts: mediatek: add basic support for MT6572 SoC
Max Shevchenko [Wed, 2 Jul 2025 10:50:46 +0000 (13:50 +0300)] 
ARM: dts: mediatek: add basic support for MT6572 SoC

Add basic support for the MediaTek MT6572 SoC.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Max Shevchenko <wctrl@proton.me>
Link: https://lore.kernel.org/r/20250702-mt6572-v4-9-bde75b7ed445@proton.me
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
4 weeks agodt-bindings: arm: mediatek: add boards based on the MT6572 SoC
Max Shevchenko [Wed, 2 Jul 2025 10:50:43 +0000 (13:50 +0300)] 
dt-bindings: arm: mediatek: add boards based on the MT6572 SoC

Add entries for the JTY D101 tablet and the Lenovo A369i smartphone.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Max Shevchenko <wctrl@proton.me>
Link: https://lore.kernel.org/r/20250702-mt6572-v4-6-bde75b7ed445@proton.me
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
4 weeks agodt-bindings: vendor-prefixes: add JTY
Max Shevchenko [Wed, 2 Jul 2025 10:50:42 +0000 (13:50 +0300)] 
dt-bindings: vendor-prefixes: add JTY

JTY produced low-cost Android tablets based on various
MediaTek MT65xx SoCs.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Max Shevchenko <wctrl@proton.me>
Link: https://lore.kernel.org/r/20250702-mt6572-v4-5-bde75b7ed445@proton.me
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
4 weeks agodt-bindings: watchdog: mediatek,mtk-wdt: add MT6572
Max Shevchenko [Wed, 2 Jul 2025 10:50:41 +0000 (13:50 +0300)] 
dt-bindings: watchdog: mediatek,mtk-wdt: add MT6572

Add a compatible string for watchdog on the MT6572 SoC.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Max Shevchenko <wctrl@proton.me>
Link: https://lore.kernel.org/r/20250702-mt6572-v4-4-bde75b7ed445@proton.me
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
4 weeks agodt-bindings: interrupt-controller: mediatek,mt6577-sysirq: add MT6572
Max Shevchenko [Wed, 2 Jul 2025 10:50:39 +0000 (13:50 +0300)] 
dt-bindings: interrupt-controller: mediatek,mt6577-sysirq: add MT6572

Add a compatible string for sysirq on the MT6572 SoC.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Max Shevchenko <wctrl@proton.me>
Link: https://lore.kernel.org/r/20250702-mt6572-v4-2-bde75b7ed445@proton.me
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
4 weeks agoarm64: dts: st: remove empty line in stm32mp251.dtsi
Patrick Delaunay [Thu, 15 May 2025 13:12:40 +0000 (15:12 +0200)] 
arm64: dts: st: remove empty line in stm32mp251.dtsi

Remove unnecessary empty line in stm32mp251.dtsi

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250515151238.2.Ia426b4ef1d1200247a950ef9abd54a94dc520acb@changeid
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
4 weeks agoarm64: dts: st: fix timer used for ticks
Patrick Delaunay [Thu, 15 May 2025 13:12:39 +0000 (15:12 +0200)] 
arm64: dts: st: fix timer used for ticks

Remove always-on on generic ARM timer as the clock source provided by
STGEN is deactivated in low power mode, STOP1 by example.

Fixes: 5d30d03aaf78 ("arm64: dts: st: introduce stm32mp25 SoCs family")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250515151238.1.I85271ddb811a7cf73532fec90de7281cb24ce260@changeid
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
4 weeks agoARM: tegra: Add device-tree for ASUS VivoTab RT TF600T
Svyatoslav Ryhel [Tue, 17 Jun 2025 07:03:20 +0000 (10:03 +0300)] 
ARM: tegra: Add device-tree for ASUS VivoTab RT TF600T

Add device-tree for ASUS VivoTab RT TF600T, which is NVIDIA Tegra30-based
tablet device with Windows RT.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Link: https://lore.kernel.org/r/20250617070320.9153-3-clamor95@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agoarm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable serial NOR FLASH
Lad Prabhakar [Fri, 4 Jul 2025 14:08:23 +0000 (15:08 +0100)] 
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable serial NOR FLASH

Enable MT25QU512ABB8E12 FLASH connected to XSPI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250704140823.163572-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 weeks agoarm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable serial NOR FLASH
Lad Prabhakar [Fri, 4 Jul 2025 14:08:22 +0000 (15:08 +0100)] 
arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable serial NOR FLASH

Enable MT25QU512ABB8E12 FLASH connected to XSPI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250704140823.163572-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 weeks agoarm64: dts: renesas: r9a09g057: Add XSPI node
Lad Prabhakar [Fri, 4 Jul 2025 14:08:21 +0000 (15:08 +0100)] 
arm64: dts: renesas: r9a09g057: Add XSPI node

Add XSPI node to RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250704140823.163572-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 weeks agoarm64: dts: renesas: r9a09g056: Add XSPI node
Lad Prabhakar [Fri, 4 Jul 2025 14:08:20 +0000 (15:08 +0100)] 
arm64: dts: renesas: r9a09g056: Add XSPI node

Add XSPI node to RZ/V2N ("R9A09G056") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250704140823.163572-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 weeks agoMerge tag 'renesas-r9a09g057-dt-binding-defs-tag4' into renesas-dts-for-v6.17
Geert Uytterhoeven [Tue, 8 Jul 2025 10:06:13 +0000 (12:06 +0200)] 
Merge tag 'renesas-r9a09g057-dt-binding-defs-tag4' into renesas-dts-for-v6.17

Renesas RZ/V2N and RZ/V2H XSPI Clock DT Binding Definitions

Expanded Serial Peripheral Interface (XSPI) clock DT binding definitions
for the Renesas RZ/V2N (R9A09G056) and RZ/V2H (R9A09G057) SoCs, shared
by driver and DT source files.

4 weeks agoarm64: dts: renesas: r9a09g056n48-rzv2n-evk: Fix pinctrl node name for GBETH1
Lad Prabhakar [Thu, 3 Jul 2025 23:55:44 +0000 (00:55 +0100)] 
arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Fix pinctrl node name for GBETH1

Rename the GBETH1 pinctrl node from "eth0" to "eth1" to avoid duplicate
node names in the DT and correctly reflect the label "eth1_pins".

Fixes: f111192baa80 ("arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable GBETH")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250703235544.715433-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 weeks agoarm64: dts: renesas: r9a09g057h44-rzv2h-evk: Fix pinctrl node name for GBETH1
Lad Prabhakar [Thu, 3 Jul 2025 23:55:43 +0000 (00:55 +0100)] 
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Fix pinctrl node name for GBETH1

Rename the GBETH1 pinctrl node from "eth0" to "eth1" to avoid duplicate
node names in the DT and correctly reflect the label "eth1_pins".

Fixes: 802292ee27a7 ("arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable GBETH")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250703235544.715433-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 weeks agoarm64: dts: renesas: r8a779g3-sparrow-hawk-fan-pwm: Add missing install target
Niklas Söderlund [Tue, 1 Jul 2025 11:26:08 +0000 (13:26 +0200)] 
arm64: dts: renesas: r8a779g3-sparrow-hawk-fan-pwm: Add missing install target

The target to consider the dtbo file for installation is missing, add
it.

Fixes: a719915e76f2 ("arm64: dts: renesas: r8a779g3: Add Retronix R-Car V4H Sparrow Hawk board support")
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Link: https://lore.kernel.org/20250701112612.3957799-2-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 weeks agoarm64: dts: renesas: rzg3e-smarc-som: Enable eth{0-1} (GBETH) interfaces
John Madieu [Wed, 2 Jul 2025 00:57:06 +0000 (02:57 +0200)] 
arm64: dts: renesas: rzg3e-smarc-som: Enable eth{0-1} (GBETH) interfaces

Enable the Gigabit Ethernet Interfaces (GBETH) populated on the RZ/G3E SMARC EVK

Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250702005706.1200059-5-john.madieu.xa@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 weeks agoarm64: dts: renesas: r9a09g047e57-smarc: Add gpio keys
Biju Das [Wed, 2 Jul 2025 09:27:53 +0000 (10:27 +0100)] 
arm64: dts: renesas: r9a09g047e57-smarc: Add gpio keys

RZ/G3E SMARC EVK  has 3 user buttons called USER_SW1, USER_SW2 and
USER_SW3 and SLEEP button with NMI support. Add a DT node in device tree
to instantiate the gpio-keys driver for these buttons.

The system can enter into STR state by pressing the sleep button and
wakeup from STR is done by pressing power button. The USER_SW{1,2,3}
configured as wakeup-source, so it can wakeup the system during s2idle.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250702092755.70847-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 weeks agoarm: dts: ti: omap: Fixup pinheader typo
Albin Törnqvist [Tue, 24 Jun 2025 11:48:39 +0000 (13:48 +0200)] 
arm: dts: ti: omap: Fixup pinheader typo

This commit fixes a typo introduced in commit
ee368a10d0df ("ARM: dts: am335x-boneblack.dts: unique gpio-line-names").
gpio0_7 is located on the P9 header on the BBB.
This was verified with a BeagleBone Black by toggling the pin and
checking with a multimeter that it corresponds to pin 42 on the P9
header.

Signed-off-by: Albin Törnqvist <albin.tornqvist@codiax.se>
Link: https://lore.kernel.org/r/20250624114839.1465115-2-albin.tornqvist@codiax.se
Fixes: ee368a10d0df ("ARM: dts: am335x-boneblack.dts: unique gpio-line-names")
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
4 weeks agoARM: dts: am335x-pdu001: Fix RS-485 transceiver switching
Felix Brack [Thu, 29 May 2025 13:53:24 +0000 (15:53 +0200)] 
ARM: dts: am335x-pdu001: Fix RS-485 transceiver switching

The wiring of the RS-485 transceiver of UART0 of the PDU-001 board
allows sending or receiving date exclusively. In other words: no
character transmitted will ever be received.
Hence the tx-filter counter in the OMAP serial driver can't work
correctly as it relies on receiving the transmitted characters.
This in turn will prevent reception of data unless we disable the
tx-filter counter.
This patch disables the tx-filter counter by enabling the DTS setting
rs485-rx-during-tx. This might sound like the opposite to be done but
it uses the enabling of rs485-rx-during-tx not for receiving the data
transmitted but for disabling the tx-fiter counter.

Tested-by: Felix Brack <fb@ltec.ch>
Signed-off-by: Felix Brack <fb@ltec.ch>
Link: https://lore.kernel.org/r/20250529135324.182868-1-fb@ltec.ch
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
4 weeks agoarm64: dts: mediatek: mt8395-genio-1200-evk: Add MT6359 PMIC key support
Louis-Alexis Eyraud [Thu, 3 Jul 2025 15:41:05 +0000 (17:41 +0200)] 
arm64: dts: mediatek: mt8395-genio-1200-evk: Add MT6359 PMIC key support

Add in mt8395-genio-1200-evk devicetree file a sub node in pmic for
the mt6359-keys compatible to add the Power and Home MT6359 PMIC keys
support.

Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
Link: https://lore.kernel.org/r/20250703-add-mt6359-pmic-keys-support-v1-3-21a4d2774e34@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
4 weeks agoarm64: dts: mediatek: mt8390-genio-common: Add Home MT6359 PMIC key support
Louis-Alexis Eyraud [Thu, 3 Jul 2025 15:41:04 +0000 (17:41 +0200)] 
arm64: dts: mediatek: mt8390-genio-common: Add Home MT6359 PMIC key support

Add in mt8390-genio-common dtsi file the support of Home MT6359 PMIC
key.

Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
Link: https://lore.kernel.org/r/20250703-add-mt6359-pmic-keys-support-v1-2-21a4d2774e34@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
4 weeks agoarm64: dts: mediatek: mt7988a-bpi-r4: add gpio leds
Frank Wunderlich [Sun, 6 Jul 2025 13:22:08 +0000 (15:22 +0200)] 
arm64: dts: mediatek: mt7988a-bpi-r4: add gpio leds

Bananapi R4 has a green and a blue led which can be switched by gpio.
Green led is for running state so default on.

Green led also shares pin with eeprom writeprotect where led off allows
writing to eeprom.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250706132213.20412-14-linux@fw-web.de
[Angelo: Fixed missing dt-bindings/leds/common.h header inclusion]
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
4 weeks agoarm64: dts: mediatek: mt7988a-bpi-r4: drop unused pins
Frank Wunderlich [Sun, 6 Jul 2025 13:22:07 +0000 (15:22 +0200)] 
arm64: dts: mediatek: mt7988a-bpi-r4: drop unused pins

Pins were moved from SoC dtsi to Board level dtsi without cleaning up
to needed ones. Drop the unused pins now.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250706132213.20412-13-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
4 weeks agoarm64: dts: mediatek: mt7988a-bpi-r4: add proc-supply for cci
Frank Wunderlich [Sun, 6 Jul 2025 13:22:06 +0000 (15:22 +0200)] 
arm64: dts: mediatek: mt7988a-bpi-r4: add proc-supply for cci

CCI requires proc-supply. Add it on board level.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250706132213.20412-12-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
4 weeks agoarm64: dts: mediatek: mt7988: add cci node
Frank Wunderlich [Sun, 6 Jul 2025 13:22:03 +0000 (15:22 +0200)] 
arm64: dts: mediatek: mt7988: add cci node

Add cci devicetree node for cpu frequency scaling.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250706132213.20412-9-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
4 weeks agodt-bindings: interconnect: add mt7988-cci compatible
Frank Wunderlich [Sun, 6 Jul 2025 13:22:02 +0000 (15:22 +0200)] 
dt-bindings: interconnect: add mt7988-cci compatible

Add compatible for Mediatek MT7988 SoC with mediatek,mt8183-cci fallback
which is taken by driver.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Georgi Djakov <djakov@kernel.org>
Link: https://lore.kernel.org/r/20250706132213.20412-8-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
4 weeks agoarm64: dts: airoha: en7581: Add ethernet nodes to EN7581 SoC evaluation board
Lorenzo Bianconi [Tue, 20 May 2025 13:41:35 +0000 (15:41 +0200)] 
arm64: dts: airoha: en7581: Add ethernet nodes to EN7581 SoC evaluation board

Introduce ethernet controller nodes to EN7581 SoC and EN7581 evaluation
board.

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/r/20250520-en7581-net-v1-1-5317f8e829ad@kernel.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
4 weeks agoarm64: dts: mediatek: mt8192-asurada-spherion: Mark trackpads as fail-needs-probe
Laura Nao [Tue, 18 Mar 2025 10:22:59 +0000 (11:22 +0100)] 
arm64: dts: mediatek: mt8192-asurada-spherion: Mark trackpads as fail-needs-probe

Different Spherion variants use different trackpads on the same I2C2
bus. Instead of enabling all of them by default, mark them as
"fail-needs-probe" and let the implementation determine which one is
actually present.

Additionally, move the trackpad pinctrl entry back to the individual
trackpad nodes.

Signed-off-by: Laura Nao <laura.nao@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250318102259.189289-3-laura.nao@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
4 weeks agoarm64: dts: mediatek: mt8186: Add Squirtle Chromebooks
Chen-Yu Tsai [Tue, 17 Jun 2025 08:20:03 +0000 (16:20 +0800)] 
arm64: dts: mediatek: mt8186: Add Squirtle Chromebooks

Add a device tree for the MT8186 based Squirtle Chromebooks, also known
as the Acer Chromebook Spin 311 (R724T). The device is a 2-in-1
convertible.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20250617082004.1653492-7-wenst@chromium.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
4 weeks agoarm64: dts: mediatek: mt8186: Merge Voltorb device trees
Chen-Yu Tsai [Tue, 17 Jun 2025 08:20:02 +0000 (16:20 +0800)] 
arm64: dts: mediatek: mt8186: Merge Voltorb device trees

There are only two different SKUs of Voltorb, and the only difference
between them is whether a touchscreen is present or not. This can be
detected by a simple I2C transfer to the address, instead of having
separate device trees.

Merge the two device trees together and simplify the compatible string
list. The dtsi is still kept separate since there is an incoming device
that shares the same design, but with slightly difference components.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20250617082004.1653492-6-wenst@chromium.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
4 weeks agoarm64: dts: mediatek: mt8186-steelix: Mark second source components for probing
Chen-Yu Tsai [Tue, 17 Jun 2025 08:20:01 +0000 (16:20 +0800)] 
arm64: dts: mediatek: mt8186-steelix: Mark second source components for probing

Steelix design has two possible trackpad component sources. Currently
they are all marked as available, along with having workarounds for
shared pinctrl muxing and GPIOs.

Instead, mark them all as "fail-needs-probe" and have the implementation
try to probe which one is present.

Also remove the shared resource workaround by moving the pinctrl entry
for the trackpad interrupt line back into the individual trackpad nodes.

Cc: stable+noautosel@kernel.org # Needs accompanying new driver to work
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20250617082004.1653492-5-wenst@chromium.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
4 weeks agodt-bindings: arm: mediatek: Add MT8186 Squirtle Chromebooks
Chen-Yu Tsai [Tue, 17 Jun 2025 08:20:00 +0000 (16:20 +0800)] 
dt-bindings: arm: mediatek: Add MT8186 Squirtle Chromebooks

Add an entry for the MT8186 based Squirtle Chromebooks, also known as the
Acer Chromebook Spin 311 (R724T). The device is a 2-in-1 convertible.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Benson Leung <bleung@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20250617082004.1653492-4-wenst@chromium.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
4 weeks agodt-bindings: arm: mediatek: Merge MT8186 Voltorb entries
Chen-Yu Tsai [Tue, 17 Jun 2025 08:19:59 +0000 (16:19 +0800)] 
dt-bindings: arm: mediatek: Merge MT8186 Voltorb entries

There are only two different SKUs of Voltorb, and the only difference
between them is whether a touchscreen is present or not. This can be
detected by a simple I2C transfer to the address, instead of having
separate compatible strings and device trees.

Drop the SKU-specific compatible strings and just keep the generic
"google,voltorb" one.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Benson Leung <bleung@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20250617082004.1653492-3-wenst@chromium.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
5 weeks agoarm64: dts: exynos7870-j6lte: reduce memory ranges to base amount
Kaustabh Chakraborty [Thu, 26 Jun 2025 07:32:58 +0000 (13:02 +0530)] 
arm64: dts: exynos7870-j6lte: reduce memory ranges to base amount

The device is available in multiple variants with differing RAM
capacities. The memory range defined in the 0x80000000 bank exceeds the
address range of the memory controller, which eventually leads to ARM
SError crashes. Reduce the bank size to a value which is available to
all devices.

The bootloader must be responsible for identifying the RAM capacity and
editing the memory node accordingly.

Fixes: d6f3a7f91fdb ("arm64: dts: exynos: add initial devicetree support for exynos7870")
Cc: stable@vger.kernel.org # v6.16
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Link: https://lore.kernel.org/r/20250626-exynos7870-dts-fixes-v1-3-349987874d9a@disroot.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
5 weeks agoarm64: dts: exynos7870-on7xelte: reduce memory ranges to base amount
Kaustabh Chakraborty [Thu, 26 Jun 2025 07:32:57 +0000 (13:02 +0530)] 
arm64: dts: exynos7870-on7xelte: reduce memory ranges to base amount

The device is available in multiple variants with differing RAM
capacities. The memory range defined in the 0x80000000 bank exceeds the
address range of the memory controller, which eventually leads to ARM
SError crashes. Reduce the bank size to a value which is available to
all devices.

The bootloader must be responsible for identifying the RAM capacity and
editing the memory node accordingly.

Fixes: d6f3a7f91fdb ("arm64: dts: exynos: add initial devicetree support for exynos7870")
Cc: stable@vger.kernel.org # v6.16
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Link: https://lore.kernel.org/r/20250626-exynos7870-dts-fixes-v1-2-349987874d9a@disroot.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
5 weeks agoarm64: dts: exynos7870: add quirk to disable USB2 LPM in gadget mode
Kaustabh Chakraborty [Thu, 26 Jun 2025 07:32:56 +0000 (13:02 +0530)] 
arm64: dts: exynos7870: add quirk to disable USB2 LPM in gadget mode

In gadget mode, USB connections are sluggish. The device won't send
packets to the host unless the host sends packets to the device. For
instance, SSH-ing through the USB network would apparently not work
unless you're flood-pinging the device's IP.

Add the property snps,usb2-gadget-lpm-disable to the dwc3 node, which
seems to solve this issue.

Fixes: d6f3a7f91fdb ("arm64: dts: exynos: add initial devicetree support for exynos7870")
Cc: stable@vger.kernel.org # v6.16
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Link: https://lore.kernel.org/r/20250626-exynos7870-dts-fixes-v1-1-349987874d9a@disroot.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
5 weeks agoarm64: defconfig: Enable STM32 Octo Memory Manager and OcstoSPI driver
Patrice Chotard [Mon, 30 Jun 2025 08:44:53 +0000 (10:44 +0200)] 
arm64: defconfig: Enable STM32 Octo Memory Manager and OcstoSPI driver

Enable STM32 OctoSPI driver.
Enable STM32 Octo Memory Manager (OMM) driver which is needed
for OSPI usage on STM32MP257F-EV1 board.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Link: https://lore.kernel.org/r/20250630-upstream_omm_ospi_defconfig-v11-1-6e934fabe698@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoARM: dts: stm32: add stm32mp157f-dk2 board support
Amelie Delaunay [Tue, 3 Jun 2025 09:02:13 +0000 (11:02 +0200)] 
ARM: dts: stm32: add stm32mp157f-dk2 board support

STM32MP157F-DK2 board embeds a STM32MP157F SoC. This SoC contains the same
level of feature than a STM32MP157C SOC but A7 clock frequency can reach
800MHz, hence the inclusion of the newly introduced stm32mp15xf.dtsi.

As for other latest STM32 MPU families, STM32MP157F-DK2 relies on OP-TEE
SCMI services for SoC clock and reset controllers resources, and for PMIC,
now under OP-TEE control. That's why stm32mp157f-dk2-scmi.dtsi is
introduced, to move all clocks, resets and regulators to SCMI-based ones.

To "disable" SCMI, just need to comment stm32mp157f-dk2-scmi.dtsi inclusion
and to replace &scmi_v3v3 with &v3v3, then to disable arm_wdt and to enable
i2c4 and its subnodes for PMIC support by Linux. Reconfigure usbotg for
dual role with type-C support if needed.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-7-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agodt-bindings: arm: stm32: add STM32MP157F-DK2 board compatible
Himanshu Bhavani [Tue, 3 Jun 2025 09:02:12 +0000 (11:02 +0200)] 
dt-bindings: arm: stm32: add STM32MP157F-DK2 board compatible

Add the "st,stm32mp157f-dk2" compatible string to the STM32 SoC
bindings. The MP157F is functionally similar to the MP157C.

Signed-off-by: Himanshu Bhavani <himanshu.bhavani@siliconsignals.io>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-6-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoARM: dts: stm32: optee async notif interrupt for MP15 scmi variants
Etienne Carriere [Tue, 3 Jun 2025 09:02:11 +0000 (11:02 +0200)] 
ARM: dts: stm32: optee async notif interrupt for MP15 scmi variants

Define the interrupt used by OP-TEE async notif on stm32mp15 scmi based
platforms.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-5-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoARM: dts: stm32: use internal regulators bindings for MP15 scmi variants
Amelie Delaunay [Tue, 3 Jun 2025 09:02:10 +0000 (11:02 +0200)] 
ARM: dts: stm32: use internal regulators bindings for MP15 scmi variants

Use the SCMI voltage domain bindings for internal regulators on stm32mp15.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-4-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agodt-bindings: regulator: Add STM32MP15 SCMI regulator identifiers
Etienne Carriere [Tue, 3 Jun 2025 09:02:09 +0000 (11:02 +0200)] 
dt-bindings: regulator: Add STM32MP15 SCMI regulator identifiers

These bindings will be used for the SCMI voltage domain.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-3-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoARM: dts: stm32: use 'typec' generic name for stusb1600 on stm32mp15xx-dkx
Amelie Delaunay [Tue, 3 Jun 2025 09:02:08 +0000 (11:02 +0200)] 
ARM: dts: stm32: use 'typec' generic name for stusb1600 on stm32mp15xx-dkx

Adopt generic node name 'typec' for stusb1600, which is the USB Type-C
controller on stm32mp157x Discovery Kits.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-2-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoARM: dts: stm32: fullfill diversity with OPP for STM32M15xF SOCs
Alexandre Torgue [Tue, 3 Jun 2025 09:02:07 +0000 (11:02 +0200)] 
ARM: dts: stm32: fullfill diversity with OPP for STM32M15xF SOCs

This commit creates new file to manage security features and supported OPP
on STM32MP15xF SOCs. On STM32MP15xY, "Y" gives information:
 -Y = A means no cryp IP and no secure boot + A7-CPU@650MHz.
 -Y = C means cryp IP + optee + secure boot + A7-CPU@650MHz.
 -Y = D means no cryp IP and no secure boot + A7-CPU@800MHz.
 -Y = F means cryp IP + optee + secure boot + A7-CPU@800MHz.

It fullfills the initial STM32MP15x SoC diversity introduced by
commit 0eda69b6c5f9 ("ARM: dts: stm32: Manage security diversity
for STM32M15x SOCs").

Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-1-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoARM: dts: stm32: add system-clock-direction-out on stm32mp15xx-dkx
Olivier Moysan [Wed, 21 May 2025 15:04:18 +0000 (17:04 +0200)] 
ARM: dts: stm32: add system-clock-direction-out on stm32mp15xx-dkx

The commit 5725bce709db
("ASoC: simple-card-utils: Unify clock direction by clk_direction")
corrupts the audio on STM32MP15 DK sound cards.
The parent clock is not correctly set, because set_sai_ck_rate() is not
executed in stm32_sai_set_sysclk() callback.
This occurs because set_sysclk() is called with the wrong direction,
SND_SOC_CLOCK_IN instead of SND_SOC_CLOCK_OUT.

Add system-clock-direction-out property in SAI2A endpoint node of
STM32MP15XX-DKX device tree, to specify the MCLK clock direction.

Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Link: https://lore.kernel.org/r/20250521150418.488152-1-olivier.moysan@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoarm64: defconfig: enable STM32 timers drivers
Fabrice Gasnier [Fri, 10 Jan 2025 09:19:19 +0000 (10:19 +0100)] 
arm64: defconfig: enable STM32 timers drivers

Enable the STM32 timer drivers: MFD, counter, PWM and trigger as module.
These drivers can be used on STM32MP25.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20250110091922.980627-6-fabrice.gasnier@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoarm64: dts: st: add timer nodes on stm32mp257f-ev1
Fabrice Gasnier [Fri, 10 Jan 2025 09:19:22 +0000 (10:19 +0100)] 
arm64: dts: st: add timer nodes on stm32mp257f-ev1

Configure timer nodes on stm32mp257f-ev1:
- Timer3 CH2 is available on mikroBUS connector for PWM
- timer8 CH1, timer8 CH4, timer10 CH1 and timer12 CH2 are available
  on EXPANSION connector.
Timers are kept disabled by default, so the pins can be used for any
other purpose (and the timers can be assigned to any of the processors).
Arbitrary choice is to use all these timers as PWM (or counter on
internal clock signal), except for timer10 that is configured with
CH1 as an input (for capture).

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20250110091922.980627-9-fabrice.gasnier@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoarm64: dts: st: add timer pins for stm32mp257f-ev1
Fabrice Gasnier [Fri, 10 Jan 2025 09:19:21 +0000 (10:19 +0100)] 
arm64: dts: st: add timer pins for stm32mp257f-ev1

Add timer pins available on stm32mp257f-ev1, configured for PWM:
- timer3 CH2 is available on mikroBUS connector
- timer8 CH1, timer8 CH4, timer10 CH1 and timer12 CH2 are available
  on EXPANSION connector
Arbitrary define all these pins to be used as PWM (output) channels,
except for timer10 CH1, to be used as counter input.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20250110091922.980627-8-fabrice.gasnier@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoarm64: dts: st: add timer nodes on stm32mp251
Fabrice Gasnier [Fri, 10 Jan 2025 09:19:20 +0000 (10:19 +0100)] 
arm64: dts: st: add timer nodes on stm32mp251

Add timers support on STM32MP25 SoC. Use dedicated compatible to handle
new features and instances introduced with this SoC. STM32MP25 SoC has
various timer flavours, each group has its own specific feature list:
- Advanced-control timers (TIM1/TIM8/TIM20)
- General-purpose timers (TIM2/TIM3/TIM4/TIM5)
- Basic timers (TIM6/TIM7)
- General-purpose timers (TIM10/TIM11/TIM12/TIM13/TIM14)
- General purpose timers (TIM15/TIM16/TIM17)

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20250110091922.980627-7-fabrice.gasnier@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoARM: dts: stm32: Add nvmem-cells to ethernet nodes for constant mac-addresses
Uwe Kleine-König [Fri, 28 Mar 2025 17:14:05 +0000 (18:14 +0100)] 
ARM: dts: stm32: Add nvmem-cells to ethernet nodes for constant mac-addresses

The efuse device tree description already has the two labels pointing to
the efuse nodes that specify the mac-addresses to be used. Wire them up
to the ethernet nodes. This is enough to make barebox pick the right
mac-addresses and pass them to Linux.

Suggested-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Link: https://lore.kernel.org/r/20250328171406.3307778-2-u.kleine-koenig@baylibre.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 weeks agoARM: dts: aspeed: yosemite4: add gpio name for uart mux sel
Marshall Zhan [Mon, 30 Jun 2025 07:31:37 +0000 (15:31 +0800)] 
ARM: dts: aspeed: yosemite4: add gpio name for uart mux sel

Add gpio line name to support multiplexed console

Signed-off-by: Marshall Zhan <marshall_zhan@wiwynn.com>
Link: https://patch.msgid.link/20250630073138.3315947-1-marshall_zhan@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5 weeks agoARM: dts: aspeed: santabarbara: Add Meta Santabarbara BMC
Fred Chen [Wed, 25 Jun 2025 07:38:38 +0000 (15:38 +0800)] 
ARM: dts: aspeed: santabarbara: Add Meta Santabarbara BMC

Add linux device tree entry related to the Meta (Facebook) compute node
system using an AST2600 BMC.

This node is named "Santabarbara". It is a compute node with accelerator
module. The system monitors voltage and temperature for the CPU, switch,
and NIC components on the motherboard and switch board.

Signed-off-by: Fred Chen <fredchen.openbmc@gmail.com>
Link: https://patch.msgid.link/20250625073847.4054971-3-fredchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5 weeks agodt-bindings: arm: aspeed: add Meta Santabarbara board
Fred Chen [Wed, 25 Jun 2025 07:38:37 +0000 (15:38 +0800)] 
dt-bindings: arm: aspeed: add Meta Santabarbara board

Document the new compatibles used on Facebook Santabarbara.

Signed-off-by: Fred Chen <fredchen.openbmc@gmail.com>
Link: https://patch.msgid.link/20250625073847.4054971-2-fredchen.openbmc@gmail.com
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5 weeks agoARM: dts: aspeed: bletchley: enable USB PD negotiation
Cosmo Chou [Sun, 22 Jun 2025 03:42:47 +0000 (11:42 +0800)] 
ARM: dts: aspeed: bletchley: enable USB PD negotiation

- Enable USB Power Delivery with revision 2.0 for all sleds
- Configure dual power/data roles with sink preference

Signed-off-by: Cosmo Chou <chou.cosmo@gmail.com>
Link: https://patch.msgid.link/20250622034247.3985727-1-chou.cosmo@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5 weeks agoARM: dts: aspeed: lanyang: Fix 'lable' typo in LED nodes
Ankit Chauhan [Thu, 12 Jun 2025 07:50:57 +0000 (13:20 +0530)] 
ARM: dts: aspeed: lanyang: Fix 'lable' typo in LED nodes

Fix an obvious spelling error in the DTS file for the Lanyang BMC
("lable" -> "label"). This was reported by bugzilla a few years ago
but never got fixed.

Reported-by: Jens Schleusener <Jens.Schleusener@fossies.org>
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=205891
Signed-off-by: Ankit Chauhan <ankitchauhan2065@gmail.com>
Link: https://patch.msgid.link/20250612075057.80433-1-ankitchauhan2065@gmail.com
[arj: Replace U+2192 with '->']
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5 weeks agoARM: dts: aspeed: harma: add mmc health
Peter Yin [Wed, 11 Jun 2025 08:05:14 +0000 (16:05 +0800)] 
ARM: dts: aspeed: harma: add mmc health

Add a GPIO expander node at address 0x13 on i2c11 bus
to monitor MMC health status via a dedicated GPIO line.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://patch.msgid.link/20250611080514.3123335-6-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5 weeks agoARM: dts: aspeed: Harma: revise gpio bride pin for battery
Peter Yin [Wed, 11 Jun 2025 08:05:13 +0000 (16:05 +0800)] 
ARM: dts: aspeed: Harma: revise gpio bride pin for battery

Update the GPIO bridge pin configuration for the battery circuit
on the Harma platform to reflect the correct hardware design.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://patch.msgid.link/20250611080514.3123335-5-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>