David Malcolm [Wed, 21 Jun 2017 16:11:36 +0000 (16:11 +0000)]
C++: Add fix-it hints for -Wold-style-cast
gcc/cp/ChangeLog:
* parser.c (get_cast_suggestion): New function.
(maybe_add_cast_fixit): New function.
(cp_parser_cast_expression): Capture the location of the closing
parenthesis. Call maybe_add_cast_fixit when emitting warnings
about old-style casts.
gcc/testsuite/ChangeLog:
* g++.dg/other/old-style-cast-fixits.C: New test case.
Andrew Pinski [Wed, 21 Jun 2017 15:58:12 +0000 (15:58 +0000)]
aarch64-cost-tables.h (thunderx_extra_costs): Increment Arith_shift and Arith_shift_reg by 1.
2017-06-21 Andrew Pinski <apinski@cavium.com>
* config/aarch64/aarch64-cost-tables.h (thunderx_extra_costs):
Increment Arith_shift and Arith_shift_reg by 1.
* config/aarch64/aarch64-tuning-flags.def (cheap_shift_extend):
New tuning flag.
* config/aarch64/aarch64.c (thunderx_tunings): Enable
AARCH64_EXTRA_TUNE_CHEAP_SHIFT_EXTEND.
(aarch64_strip_extend): Add new argument and test for it.
(aarch64_cheap_mult_shift_p): New function.
(aarch64_rtx_mult_cost): Call aarch64_cheap_mult_shift_p and don't
add a cost if it is true.
Update calls to aarch64_strip_extend.
(aarch64_rtx_costs): Update calls to aarch64_strip_extend.
Andrew Pinski [Wed, 21 Jun 2017 15:35:14 +0000 (15:35 +0000)]
aarch64-cores.def (thunderxt88p1): Use thunderxt88 tunings.
2017-06-21 Andrew Pinski <apinski@cavium.com>
* config/aarch64/aarch64-cores.def (thunderxt88p1): Use thunderxt88
tunings.
(thunderxt88): Likewise.
* config/aarch64/aarch64.c (thunderxt88_prefetch_tune): New variable.
(thunderx_prefetch_tune): New variable.
(thunderx2t99_prefetch_tune): Update for the correct values.
(thunderxt88_tunings): New variable.
(thunderx_tunings): Use thunderx_prefetch_tune instead of
generic_prefetch_tune.
(thunderx2t99_tunings): Use AUTOPREFETCHER_WEAK.
Kyrylo Tkachov [Wed, 21 Jun 2017 15:26:21 +0000 (15:26 +0000)]
[AArch64] Fix atomic_cmp_exchange_zero_reg_1.c with +lse
* config/aarch64/atomics.md (aarch64_compare_and_swap<mode>_lse,
SHORT): Relax operand 3 to aarch64_reg_or_zero and constraint to Z.
(aarch64_compare_and_swap<mode>_lse, GPI): Likewise.
(aarch64_atomic_cas<mode>, SHORT): Likewise for operand 2.
(aarch64_atomic_cas<mode>, GPI): Likewise.
Martin Liska [Wed, 21 Jun 2017 12:52:14 +0000 (14:52 +0200)]
Rework cold and hot label attributes in predict.c.
2017-06-21 Martin Liska <mliska@suse.cz>
* gimplify.c (gimplify_label_expr): Insert GIMPLE_PREDICT
statements on cold and hot labels.
* predict.c (tree_estimate_probability_bb): Remove the
prediction from this place.
2017-06-21 Martin Liska <mliska@suse.cz>
Martin Liska [Wed, 21 Jun 2017 12:51:46 +0000 (14:51 +0200)]
Make early return predictor more precise.
2017-06-21 Martin Liska <mliska@suse.cz>
PR tree-optimization/79489
* gimplify.c (maybe_add_early_return_predict_stmt): New
function.
(gimplify_return_expr): Call the function.
* predict.c (tree_estimate_probability_bb): Remove handling
of early return.
* predict.def: Update comment about early return predictor.
* gimple-predict.h (is_gimple_predict): New function.
* predict.def: Change default value of early return to 66.
* tree-tailcall.c (find_tail_calls): Skip GIMPLE_PREDICT
statements.
* passes.def: Put pass_strip_predict_hints to the beginning of
IPA passes.
DWARF: make it possible to emit debug info for declarations only
The DWARF back-end used to systematically ignore file-scope function and
variable declarations. While this is justified in language like C/C++,
where such declarations can appear in several translation units and thus
bloat uselessly the debug info, this behavior is counter-productive in
languages with a well-defined module system. Specifically, it prevents
the description of imported entities, that belong to foreign languages,
making them unavailable from debuggers.
Take for instance:
package C_Binding is
function My_C_Function (I : Integer) return Integer;
pragma Import (C, My_C_Function, "my_c_function");
end C_Binding;
This makes available for Ada programs the C function "my_c_function"
under the following name: C_Binding.My_C_Function. When GCC compiles
it, though, it is represented as a FUNCTION_DECL node with DECL_EXTERNAL
set and a null DECL_INITIAL, which used to be discarded unconditionally
in the DWARF back-end.
This patch moves such filter from the DWARF back-end to the relevant
callers: passes.c:rest_of_decl_compilation and
godump.c:go_early_global_decl. It also This patch also updates the Ada
front-end to call debug hooks for functions such as in the above
example, so that we do generate debugging information for them.
gcc/
* dwarf2out.c (gen_decl_die): Remove the guard to skip file-scope
FUNCTION_DECL declarations.
(dwarf2out_early_global_decl): Remove the guard to skip FUNCTION_DECL
declarations.
(dwaf2out_decl): Likewise.
* godump.c (go_early_global_decl): Skip call to the real debug hook
for FUNCTION_DECL declarations.
* passes.c (rest_of_decl_compilation): Skip call to the
early_global_decl debug hook for FUNCTION_DECL declarations, unless
-fdump-go-spec is passed.
gcc/ada/
* gcc-interface/ada-tree.h (DECL_FUNCTION_IS_DEF): Update copyright
notice. New macro.
* gcc-interface/trans.c (Subprogram_Body_to_gnu): Tag the subprogram
as a definition.
(Compilation_Unit_to_gnu): Tag the elaboration procedure as a
definition.
* gcc-interface/decl.c (gnat_to_gnu_entity): Tag declarations of
imported subprograms for the current compilation unit as
definitions. Disable debug info for references to variables.
* gcc-interface/gigi.h (create_subprog_decl): Update declaration.
* gcc-interface/utils.c (gnat_pushdecl): Add external DECLs that are
not built-in functions to their binding scope.
(create_subprog_decl): Add a DEFINITION parameter. If it is true, tag
the function as a definition. Update all callers.
(gnat_write_global_declarations): Emit debug info for imported
functions. Filter out external variables for which debug info
is disabled.
gcc/testsuite/
* gnat.dg/debug11_pkg.adb, gnat.dg/debug11_pkg.ads,
gnat.dg/debug11_pkg2.ads: New testcase.
Marc Glisse [Wed, 21 Jun 2017 11:20:41 +0000 (13:20 +0200)]
[i386] __builtin_ia32_stmxcsr could be pure
2017-06-21 Marc Glisse <marc.glisse@inria.fr>
gcc/
* config/i386/i386.c (struct builtin_isa): New field pure_p.
Reorder for compactness.
(def_builtin, def_builtin2, ix86_add_new_builtins): Handle pure_p.
(def_builtin_pure, def_builtin_pure2): New functions.
(ix86_init_mmx_sse_builtins) [__builtin_ia32_stmxcsr]: Mark as pure.
gcc/testsuite/
* gcc.target/i386/getround.c: New file.
Jakub Jelinek [Wed, 21 Jun 2017 10:59:12 +0000 (12:59 +0200)]
line-map.c (location_adhoc_data_update): Perform addition in uintptr_t type rather than char * type.
* line-map.c (location_adhoc_data_update): Perform addition in
uintptr_t type rather than char * type. Read *data using
ptrdiff_t type instead of int64_t.
(get_combined_adhoc_loc): Change offset type to ptrdiff_t from
int64_t.
Wilco Dijkstra [Wed, 21 Jun 2017 10:48:51 +0000 (10:48 +0000)]
Emit SIMD moves as mov
SIMD moves are currently emitted as ORR. Change this to use the MOV
pseudo instruction just like integer moves (the ARM-ARM states MOV is the
preferred disassembly), improving readability of -S output.
gcc/
* config/aarch64/aarch64.md (movti_aarch64):
Emit mov rather than orr.
(movtf_aarch64): Likewise.
* config/aarch64/aarch64-simd.md (aarch64_simd_mov):
Emit mov rather than orr.
Wilco Dijkstra [Wed, 21 Jun 2017 10:46:02 +0000 (10:46 +0000)]
Improve dup pattern
Improve the dup pattern to prefer vector registers. When doing a dup
after a load, the register allocator thinks the costs are identical
and chooses an integer load. However a dup from an integer register
includes an int->fp transfer which is not modelled. Adding a '?' to
the integer variant means the cost is increased slightly so we prefer
using a vector register. This improves the following example:
Wilco Dijkstra [Wed, 21 Jun 2017 10:40:21 +0000 (10:40 +0000)]
Mark symbols as constant
Aarch64_legitimate_constant_p currently returns false for symbols,
eventhough they are always valid constants. This means LOSYM isn't
CSEd correctly. If we return true CSE works better, resulting in
smaller/faster code (0.3% smaller code on SPEC2006). Avoid this
for TLS symbols since their sequence is complex.
gcc/
* config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
Return true for non-tls symbols.
James Greenhalgh [Wed, 21 Jun 2017 09:58:57 +0000 (09:58 +0000)]
[Patch AArch64] Add initial tuning support for Cortex-A55 and Cortex-A75
This patch adds support for the ARM Cortex-A75 and
Cortex-A55 processors through the -mcpu/-mtune values cortex-a55 and
cortex-a75, and an ARM DynamIQ big.LITTLE configuration of these two
processors through the -mcpu/-mtune value cortex-a75.cortex-a55
The ARM Cortex-A75 is ARM's latest and highest performance applications
processor. For the initial tuning provided in this patch, I have chosen to
share the tuning structure with its predecessor, the Cortex-A73.
The ARM Cortex-A55 delivers the best combination of power efficiency
and performance in its class. For the initial tuning provided in this patch,
I have chosen to share the tuning structure with its predecessor, the
Cortex-A53.
Both Cortex-A55 and Cortex-A75 support ARMv8-A with the ARM8.1-A and
ARMv8.2-A extensions, along with the cryptography extension, and
the RCPC extensions from ARMv8.3-A. This is reflected in the patch,
-mcpu=cortex-a75 is treated as equivalent to passing -mtune=cortex-a75
-march=armv8.2-a+rcpc .
2017-06-21 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/aarch64-cores.def (cortex-a55): New.
(cortex-a75): Likewise.
(cortex-a75.cortex-a55): Likewise.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi (-mtune): Document new values for -mtune.
Tom de Vries [Wed, 21 Jun 2017 09:10:16 +0000 (09:10 +0000)]
Add dg-add-options feature stack_size
2017-06-21 Tom de Vries <tom@codesourcery.com>
* doc/sourcebuild.texi (Add Options, Features for dg-add-options): Add
stack_size feature.
(Effective-Target Keywords, Other attributes): Suggest using
dg-add-options stack_size feature to get stack limit in stack_size
effective target documentation.
Richard Biener [Wed, 21 Jun 2017 07:01:34 +0000 (07:01 +0000)]
re PR gcov-profile/81080 (target libgcov not built with large file support)
2017-06-21 Richard Biener <rguenther@suse.de>
PR gcov-profile/81080
* configure.ac: Add AC_SYS_LARGEFILE.
* libgcov.h: Include auto-target.h before tsystem.h to pick
up _FILE_OFFSET_BITS which might differ for multilibs.
* config.in: Regenerate.
* configure: Likewise.
Julian Brown [Wed, 21 Jun 2017 05:36:03 +0000 (05:36 +0000)]
* config/aarch64/aarch64-simd.md (aarch64_crypto_pmulldi)
(aarch64_crypto_pmullv2di): Change type attribute to crypto_pmull.
* config/aarch64/thunderx2t99.md (thunderx2t99_pmull): New
reservation.
* config/arm/cortex-a57.md (cortex_a57_neon_type): Add crypto_pmull to
attribute type list for neon_multiply.
* config/arm/crypto.md (crypto_vmullp64): Change type to crypto_pmull.
* config/arm/types.md (crypto_pmull): Add.
* config/arm/xgene1.md (xgene1_neon_pmull): Add crypto_pmull to
attribute type list.
Nathan Sidwell [Tue, 20 Jun 2017 12:53:11 +0000 (12:53 +0000)]
PR c++/67074 - namespace aliases
PR c++/67074 - namespace aliases
* decl.c (duplicate_decls): Don't error here on mismatched
namespace alias.
* name-lookup.c (name_lookup::add_value): Matching namespaces are
not ambiguous.
(diagnose_name_conflict): Namespaces are never redeclarations.
(update_binding): An alias can match a real namespace.
David Malcolm [Tue, 20 Jun 2017 10:40:38 +0000 (10:40 +0000)]
Prevent fix-it hints from affecting more than one line
Attempts to apply a removal or replacement fix-it hint to a source
range that covers multiple lines currently lead to nonsensical
results from the printing code in diagnostic-show-locus.c.
We were already filtering them out in edit-context.c (leading
to -fdiagnostics-generate-patch not generating any output for
the whole TU).
Reject attempts to add such fix-it hints within rich_location,
fixing the diagnostic-show-locus.c issue.
gcc/ChangeLog:
* diagnostic-show-locus.c
(selftest::test_fixit_deletion_affecting_newline): New function.
(selftest::diagnostic_show_locus_c_tests): Call it.
libcpp/ChangeLog:
* include/line-map.h (class rich_location): Document that attempts
to delete or replace a range *affecting* multiple lines will fail.
* line-map.c (rich_location::maybe_add_fixit): Implement this
restriction.
Michael Meissner [Tue, 20 Jun 2017 06:26:27 +0000 (06:26 +0000)]
re PR target/79799 (Improve vec_insert of float on Power9)
[gcc]
2017-06-20 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/79799
* config/rs6000/rs6000.c (rs6000_expand_vector_init): Add support
for doing vector set of SFmode on ISA 3.0.
* config/rs6000/vsx.md (vsx_set_v4sf_p9): Likewise.
(vsx_set_v4sf_p9_zero): Special case setting 0.0f to a V4SF
element.
(vsx_insert_extract_v4sf_p9): Add an optimization for inserting a
SFmode value into a V4SF variable that was extracted from another
V4SF variable without converting the element to double precision
and back to single precision vector format.
(vsx_insert_extract_v4sf_p9_2): Likewise.
[gcc/testsuite]
2017-06-20 Michael Meissner <meissner@linux.vnet.ibm.com>
Nathan Sidwell [Mon, 19 Jun 2017 19:11:31 +0000 (19:11 +0000)]
re PR c++/81124 (internal compiler error: in operator*, at cp/cp-tree.h:726)
PR c++/81124
PR c++/79766
* name-lookup.c (set_decl_namespace): Don't follow using
directives and ignore using decls. Only check overly-explicit
scope after discovering decl.
Jakub Jelinek [Mon, 19 Jun 2017 15:28:42 +0000 (17:28 +0200)]
re PR sanitizer/81125 (-fsanitize=undefined ICE)
PR sanitizer/81125
* ubsan.h (enum ubsan_encode_value_phase): New.
(ubsan_encode_value): Change second argument to
enum ubsan_encode_value_phase with default value of
UBSAN_ENCODE_VALUE_GENERIC.
* ubsan.c (ubsan_encode_value): Change second argument to
enum ubsan_encode_value_phase PHASE from bool IN_EXPAND_P,
adjust uses, for UBSAN_ENCODE_VALUE_GENERIC use just
create_tmp_var_raw instead of create_tmp_var and use a
TARGET_EXPR.
(ubsan_expand_bounds_ifn, ubsan_build_overflow_builtin,
instrument_bool_enum_load, ubsan_instrument_float_cast): Adjust
ubsan_encode_value callers.
Jakub Jelinek [Mon, 19 Jun 2017 15:27:40 +0000 (17:27 +0200)]
re PR sanitizer/81111 (Cannot build libstdc++ with -fsanitize=undefined)
PR sanitizer/81111
* ubsan.c (ubsan_encode_value): If current_function_decl is NULL,
use create_tmp_var_raw instead of create_tmp_var, mark it addressable
just by setting TREE_ADDRESSABLE on the result and use a TARGET_EXPR.
* tree-ssa-sccvn.c (mprts_hook_cnt): New global.
(vn_lookup_simplify_result): Allow only mprts_hook_cnt succesful
simplified lookups, then reset mprts_hook.
(vn_nary_build_or_lookup_1): Set mprts_hook_cnt to 9 before
simplifying.
(try_to_simplify): Likewise.
Martin Liska [Mon, 19 Jun 2017 13:12:51 +0000 (15:12 +0200)]
Fix multi-versioning issues (PR ipa/80732).
2017-06-19 Martin Liska <mliska@suse.cz>
PR ipa/80732
* attribs.c (make_dispatcher_decl): Do not append '.ifunc'
to dispatcher function name.
* multiple_target.c (replace_function_decl): New function.
(create_dispatcher_calls): Redirect both edges and references.
2017-06-19 Martin Liska <mliska@suse.cz>
Richard Biener [Mon, 19 Jun 2017 07:26:50 +0000 (07:26 +0000)]
tree-ssa-loop-niter.h (estimate_numbers_of_iterations): Take struct function as arg.
2017-06-19 Richard Biener <rguenther@suse.de>
* tree-ssa-loop-niter.h (estimate_numbers_of_iterations): Take
struct function as arg.
(estimate_numbers_of_iterations): Export overload with loop arg.
(free_numbers_of_iterations_estimates_loop): Use an overload of
free_numbers_of_iterations_estimates instead.
* tree-cfg.c (remove_bb): Adjust.
* tree-cfgcleanup.c (remove_forwarder_block_with_phi): Likewise.
* tree-parloops.c (gen_parallel_loop): Likewise.
* tree-ssa-loop-ivcanon.c (canonicalize_induction_variables):
Likewise.
(tree_unroll_loops_completely): Likewise.
* tree-ssa-loop-niter.c (estimate_numbers_of_iterations_loop):
Use an overload instead and export.
(estimated_loop_iterations): Adjust.
(max_loop_iterations): Likewise.
(likely_max_loop_iterations): Likewise.
(estimate_numbers_of_iterations): Take struct function as arg
and adjust.
(loop_exits_before_overflow): Adjust.
(free_numbers_of_iterations_estimates_loop): Use an overload.
* tree-vect-loop.c (vect_analyze_loop_form): Adjust.
* tree-vectorizer.c (vect_free_loop_info_assumptions): Likewise.
Jason Merrill [Sat, 17 Jun 2017 02:28:25 +0000 (22:28 -0400)]
PR c++/81045 - Wrong type-dependence with auto return type.
* pt.c (type_dependent_expression_p): An undeduced auto outside the
template isn't dependent.
* call.c (build_over_call): Instantiate undeduced auto even in a
template.
Carl Love [Fri, 16 Jun 2017 22:34:28 +0000 (22:34 +0000)]
rs6000-c.c (altivec_overloaded_builtins): Add definitions for vec_float, vec_float2, vec_floato, vec_floate built-ins.
gcc/ChangeLog:
2017-06-16 Carl Love <cel@us.ibm.com>
* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
definitions for vec_float, vec_float2, vec_floato,
vec_floate built-ins.
* config/rs6000/vsx.md (define_c_enum "unspec"): Add RTL code
for instructions vsx_xvcvsxws vsx_xvcvuxwsp, float2, floato and
floate.
* config/rs6000/rs6000-builtin.def (FLOAT2_V2DI, FLOATE_V2DF,
FLOATE_2DI, FLOATO_V2DF, FLOATEE_V2DI, XVCVSXWSP_V4SF,
UNS_FLOATO_V2DI, UNS_FLOATE_V2DI): Add definitions.
* config/altivec.md (define_insn "p8_vmrgew_<mode>",
define_mode_attr VF_sxddp): Add V4SF type to p8_vmrgew.
* config/rs6000/altivec.h (vec_float, vec_float2, vec_floate,
vec_floato): Add builtin defines.
* doc/extend.texi (vec_float, vec_float2, vec_floate, vec_floato):
Update the built-in documentation file for the new built-in
functions.
gcc/testsuite/ChangeLog:
2017-06-16 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/builtins-3-runnable.c (test_result_sp,
main): Add runnable tests and test checker for vec_float,
vec_float2, vec_floate and vec_floato builtins.
Richard Earnshaw [Fri, 16 Jun 2017 21:07:20 +0000 (21:07 +0000)]
[arm] Fix various tests
The neon-thumb2-move.c test was overriding the options that had been
detected as being necessary to enable Neon. The result was that the
combination of the test's options and those auto-detected were not
compatible with neon leading to a test failure. The correct fix here
is to stick with the options that dg-add-options arm_neon has worked
out.
The thumb2-slow-flash-data tests were relying (incorrectly) on a
particular FPU being enabled by default. These tests are fixed by
adding +fp to the architecture selected.
* gcc.target/arm/neon-thumb2-move.c (dg-options): Don't override
the architecture options added by dg-add-options arm_neon.
* gcc.target/arm/thumb2-slow-flash-data-2.c (dg-opitions): Add +fp
to the architecture.
* gcc.target/arm/thumb3-slow-flash-data-3.c (dg-opitions): Likewise.
* gcc.target/arm/thumb4-slow-flash-data-3.c (dg-opitions): Likewise.
* gcc.target/arm/thumb5-slow-flash-data-3.c (dg-opitions): Likewise.
Richard Earnshaw [Fri, 16 Jun 2017 21:07:11 +0000 (21:07 +0000)]
[arm] Mark -marm and -mthumb as being inverse options
-marm and -mthumb are opposites: one cancels out the other. This patch
marks them as such so that the driver will eliminate all but the last
option on the command line. This aids multilib selection which otherwise
can get confused if both are present.
* config/arm/arm.opt (marm): Mark as the negative of of -mthumb.
(mthumb): Mark as the negative of -marm.
Richard Earnshaw [Fri, 16 Jun 2017 21:07:03 +0000 (21:07 +0000)]
[arm][doc] Document changes to -mcpu, -mtune and -mfpu.
This patch adds the remainder of the main documentation changes. It
adds the changes for -mcpu, -mtune and -mfpu. I've chosen to document
the extension options under -mcpu rather than under -mtune because,
while they are permitted with -mtune, they do not affect the behaviour
of the tuning done by the compiler.
I've also inverted the sense of the table (making the primary index
the extension name and then listing the CPU names to which it applies.
This is because the extensions are much more orthoganal in meaning
here and having a primary entry via the CPU name would lead to
enormous duplication.
Finally, it adds the relevant changes to -mfpu. I haven't stated yet
that any setting of -mfpu other than 'auto' is deprecated, but that is
certainly the long-term goal of this patch series.
* doc/invoke.texi (ARM Options, -mcpu): Document supported
extension options.
(ARM Options, -mtune): Document that this accepts the same
extension options as -mcpu.
(ARM Options, -mfpu): Document addition of -mfpu=auto.
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