Suhaas Joshi [Tue, 27 Jan 2026 08:16:43 +0000 (13:46 +0530)]
arm: dts: k3-binman: Use configs for ATF/OPTEE addresses
Instead of hard-coding ATF and OPTEE addresses in firewall configuration
templates, use K3_*_LOAD_ADDR. Doing so ensures that if someone moves
ATF/OPTEE regions, the change gets picked up by binman without
explicitly having to modify dts files.
Signed-off-by: Suhaas Joshi <s-joshi@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Tom Rini [Tue, 27 Jan 2026 15:29:03 +0000 (09:29 -0600)]
Revert a number of incorrect commits
As part of debugging the appended device tree failure, I inadvertently
committed some changes as I was debugging to master, and not a private
branch, and pushed them as part of the release.
Tom Rini [Mon, 26 Jan 2026 16:28:32 +0000 (10:28 -0600)]
arm: spl: Correct alignment of .rel.dyn section
With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c") we now require the correct, 8 byte alignment
of a device tree in order to work with it ourselves. This has exposed a
number of issues. In the case of using arch/arm/cpu/u-boot-spl.lds for
an xPL phase and having the BSS be overlayed with the dynamic
relocations sections (here, .rel.dyn) we had missed adding the comment
about our asm memset requirements. Then, when adjusting ALIGN statements
we later missed this one. In turn, when we use objcopy to create our
binary image we end up in the situation where
where the BSS must start out 8 byte aligned as
well as end 8 byte aligned because for appended device tree the
requirement is that the whole BSS (which we add as padding to the
binary) must be 8 byte aligned. Otherwise we end up with the situation
where __bss_end (where we look for the device tree at run time) is
aligned but the size of the BSS we add
Fixes: 7828a1eeb2a1 ("arm: remove redundant section alignments") Fixes: 52caad0d14a3 ("ARM: Align image end to 8 bytes to fit DT alignment") Reported-by: Fabio Estevam <festevam@gmail.com> Tested-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
--- Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org> Cc: Marek Vasut <marek.vasut@mailbox.org>
Tom Rini [Mon, 26 Jan 2026 15:09:16 +0000 (09:09 -0600)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Some improvements for some boards' DRAM setup, to allow boards with
"odd" DRAM sizes (1.5GB or 3GB), and to support the T113-s4 with double
the co-packaged DRAM. Support for a new board (X96Q TV box), and a fix
for the DT name prefix. Also we support the new AXP318W PMIC, which is
used on new boards with the A733 SoC. There are some preliminary support
patches for this SoC, but they are not quite ready yet - though maybe I
push some uncontroversial ones a bit later still.
J. Neuschäfer [Tue, 20 Jan 2026 15:20:38 +0000 (16:20 +0100)]
board: sunxi: Add X96Q support
The X96Q is a set-top box with an H313 SoC, AXP305 PMIC, 1 or 2 GiB RAM,
8 or 16 GiB eMMC flash, 2x USB A, Micro-SD, HDMI, Ethernet, audio/video
output, and infrared input.
This commit adds a defconfig and some documentation. The devicetree is
already in dts/upstream.
The CONFIG_DRAM_SUNXI_* settings are chosen such that the register
values in the DRAM PHY's MMIO space are as close as possible to those
observed when booting with the preinstalled vendor U-Boot. The DRAM
clock frequency of 600 MHz was reported in the vendor U-Boot's output.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Yixun Lan [Tue, 13 Jan 2026 04:01:55 +0000 (12:01 +0800)]
power: regulator: add AXP318W support
The PMIC is also known as AXP819 in vendor pmu code
For DCDC6, 8, 9, the underlying hardware support more than two levels
voltage step tuning, but for now only first two levels are implemented
in this driver, hence highest voltage will be limited at seccond level.
It actual meets board requirement in current design, and we've verified
it in Radxa Cubie A7A board.
Following are detail explanation of voltage tuning stpes for those DCDCs:
DCDC | voltage range | units | steps | implemented
6 | 0.5 - 1.2 | 10 mV | 71 | Y
. | 1.22 - 1.54 | 20 mV | 17 | Y
. | 1.8 - 2.4 | 20 mV | 31 | N
. | 2.44 - 2.76 | 40 mV | 9 | N
--------------------------------------------------
8/9 | 0.5 - 1.2 | 10 mV | 71 | Y
. | 1.22 - 1.84 | 20 mV | 32 | Y
. | 1.9 - 3.4 | 100mV | 16 | N
Signed-off-by: Yixun Lan <dlan@gentoo.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Bohdan Chubuk [Sun, 23 Nov 2025 20:43:46 +0000 (22:43 +0200)]
sunxi: avoid double vendor prefix when CONFIG_OF_UPSTREAM is enabled
When CONFIG_OF_UPSTREAM is enabled, the device tree name provided by SPL
already includes the vendor directory (e.g., "allwinner/board-name").
The existing logic in misc_init_r() unconditionally prepends "allwinner/"
for ARM64 builds, resulting in an incorrect path like
"allwinner/allwinner/board-name.dtb".
This patch modifies the logic to only prepend the vendor prefix if
CONFIG_OF_UPSTREAM is NOT enabled. This ensures compatibility with both
legacy builds and the new upstream devicetree structure.
Signed-off-by: Bohdan Chubuk <chbgdn@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Tue, 21 Oct 2025 23:53:34 +0000 (00:53 +0100)]
sunxi: dram: detect non-power-of-2 sized DRAM chips
Some boards feature an "odd" DRAM size, where the total RAM is 1.5GB or
3GB. Our existing DRAM size detection routines can only detect power-of-2
sized configuration, and on those boards the DRAM size is overestimated,
so this typically breaks the boot quite early.
There doesn't seem to be an easy explicit way to detect those odd-sized
chips, but we can test whether the later part of the memory behaves like
memory, by verifying that a written pattern can be read back.
Experiments show that there is no aliasing effect here, as all locations
in the unimplemented range always return some fixed pattern, and cannot
be changed.
Also so far all those boards use a factor of 3 of some lower power-of-2
number, or 3/4th of some higher number. The size detection routine
discovers the higher number, so we can check for some memory cells beyond
75% of the detected size to be legit.
Add a routine the inverts all bits at a given location in memory, and
reads that back to prove that the new value was stored.
Then test the memory cell at exactly 3/4th of the detected size, and cap
the size of the memory to 75% when this test fails. For good measure
also make sure that memory just below the assumed memory end really
works.
This enables boards which ship with such odd memory sizes.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Lukas Schmid [Sun, 26 Oct 2025 11:41:17 +0000 (12:41 +0100)]
sunxi: extend R528/T113-s3/D1(s) DRAM initialisation
The T113-s4 SoC is using the same die as the T113-s3, but comes with
256MiB of co-packaged DRAM. Besides the doubled size, the DRAM chip
seems to be connected slightly differently, which requires to use a
different pin remapping.
Extend the DRAM initialisation code to add support for the T113-S4 aka
T113M4020DC0 by checking the SoC's CHIPID, which is stored in the first
word of the SID efuses.
Signed-off-by: Lukas Schmid <lukas.schmid@netcube.li> Tested-by: John Watts <contact@jookia.org> Reviewed-by: John Watts <contact@jookia.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The 9FGV0441 PCIe clock generator can operate in autonomous mode, which
is the default mode. U-Boot currently does not have a driver for this
PCIe clock generator, but Linux 6.17 DT does describe the clock generator
in Sparrow Hawk board DT and this DT is included in U-Boot since commit eea470fd7f6a ("Subtree merge tag 'v6.17-dts' of dts repo [1] into dts/upstream").
Reinstate basic PCIe clock description which matches the behavior of
Linux DT before Linux 6.17.y release in in U-Boot DT extras to allow
PCIe to be used on Sparrow Hawk board in U-Boot until the 9FGV0441
driver gets implemented or ported from Linux.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
When aborting a Transfer Descriptor (TD), the xHCI driver updates the
device dequeue pointer by converting the virtual enqueue TRB pointer
into a DMA address.
Previously, the code OR-ed the ring's Dequeue Cycle State (DCS) bit into
the virtual TRB pointer before passing it to xhci_trb_virt_to_dma().
This produced an unaligned virtual address (e.g. ending in 0x...1).
Inside xhci_trb_virt_to_dma(), the offset calculation:
segment_offset = trb - seg->trbs;
operated on this unaligned pointer, resulting in an incorrect TRB index.
In wraparound cases, this caused the bounds check to fail and the
function to return 0.
As a result, a SET_DEQ_PTR command was issued with a DMA address of 0x0,
leading to controller hangs and transfer timeouts, most commonly when
aborting TDs near the end of a ring segment (e.g. index 63).
Fix this by translating the aligned virtual TRB pointer to a DMA address
first, and only then applying the DCS bit to the resulting physical
address.
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org> Signed-off-by: ANANDHAKRISHNAN S <anandhakrishnan.s@dicortech.com>
Greg Malysa [Thu, 22 Jan 2026 09:28:53 +0000 (04:28 -0500)]
scripts/dtc: Fix pkg-config behavior under sysroot
When building with a toolchain that uses a modified sysroot (such as a
Yocto-generated SDK) that does not include libyaml, on a host that does
have libyaml, building dtc will fail with errors like:
HOSTLD scripts/dtc/dtc
/usr/lib/gcc/x86_64-pc-linux-gnu/14/../../../../x86_64-pc-linux-gnu/bin/ld:
scripts/dtc/yamltree.o: in function `yaml_propval_int':
yamltree.c:(.text+0x167): undefined reference to
`yaml_sequence_start_event_initialize'
/usr/lib/gcc/x86_64-pc-linux-gnu/14/../../../../x86_64-pc-linux-gnu/bin/ld:
yamltree.c:(.text+0x172): undefined reference to `yaml_emitter_emit'
/usr/lib/gcc/x86_64-pc-linux-gnu/14/../../../../x86_64-pc-linux-gnu/bin/ld:
yamltree.c:(.text+0x1e8): undefined reference to
`yaml_scalar_event_initialize'
/usr/lib/gcc/x86_64-pc-linux-gnu/14/../../../../x86_64-pc-linux-gnu/bin/ld:
yamltree.c:(.text+0x1f5): undefined reference to `yaml_emitter_emit'
(... rest of errors truncated ...)
This happens because the test looks for the file in the default path but
uses pkg-config, which is affected by changing sysroot, to determine the
correct linker arguments. This does not happen when building entirely
within yocto, as pseudo will intercept and rewrite the file path when
trying to test for /usr/include/yaml.h to match the sysroot and thus
generate consistent behavior.
This commit adds the PKG_CONFIG_SYSROOT_DIR prefix to the file path
in order to test against the same conditions that are used to resolve
the build flags for libyaml.
In linux commit ef8795f3f1c ("dt-bindings: kbuild: Use DTB files for
validation"), including yaml is disabled again anyway because of other
problems that it causes, so this problem can also be addressed by
partially backporting that commit instead and simply disabling the yaml
support.
Fixes: 0535e46d55d7 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c") Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Tom Rini [Fri, 23 Jan 2026 20:21:28 +0000 (14:21 -0600)]
Merge patch series "sc5xx: Add complete board support for all ADI SC5xx boards"
Greg Malysa <malysagreg@gmail.com> says:
This series adds the final pieces to enable mainline U-Boot to build and
boot all Analog Devices SC5xx SoCs and supports the associated carrier
board options. At this point it should be viable for new users for these
platforms to start with the latest version of U-Boot rather than our
vendor fork, however some features (such as OSPI support and falcon
boot) remain unavailable until we are able to unify our implementations
with the mainline implementations.
Greg Malysa [Thu, 11 Dec 2025 08:04:01 +0000 (03:04 -0500)]
board: adi: Add support for SC598
This adds support for the Analog Devices SC598-SOM and configurations
for using it with both the SOMCRR-EZKIT and SOMCRR-EZLITE. This adds
dtsis for both Rev D (including older revisions) and Rev E SOMs, which
are not compatible due to BOM changes. Although no new Rev D SOMs are
produced as of 2025, many are in circulation, so the RevD dtsi is
included to facilitate use for existing customers.
Greg Malysa [Thu, 11 Dec 2025 08:03:57 +0000 (03:03 -0500)]
board: adi: Add SOMCRR infrastructure
This adds infrastructure and shared library code for building targets
that use the ADI SOMCRR-EZKIT and SOMCRR-EZLITE carrier boards. These
are not used directly as board targets in their own right.
Greg Malysa [Thu, 11 Dec 2025 08:03:56 +0000 (03:03 -0500)]
docker: add Analog Devices tools to docker image
The boot ROM on Analog Devices ADSP-SC5xx SoCs requires code packaged
in the LDR format. Normally this is available as part of
our yocto-derived toolchain but, it is not a part of any other pre-made
toolchain anymore, so it is otherwise unavailable in the docker image
for CI. This patch adds a source build from the ADI maintained github
repository. In the future, a package available for install via apt will
be available, but currently there is no arm64 build upstream, so we must
build from source for the time being to support CI on both amd64 and
arm64 runners. The same ldr tool is used for arm and arm64 for all of
our boards with names adjusted to match the expected $(CROSS_COMPILE)
for these boards.
Utsav Agarwal [Thu, 11 Dec 2025 08:03:55 +0000 (03:03 -0500)]
mach-sc5xx: Add preliminary support for binman
Binman is optionally supported for Analog Devices sc5xx SoCs if Yocto is
not being used to create and assemble system images. The spl LDR is
generated locally but other artifacts such as kernel FIT image and root
file system are built externally and must be supplied to binman if used.
Binman is enabled by selecting the SC5XX_USE_BINMAN config symbol and
the image structure is included in the shared sc5xx device tree.
Greg Malysa [Thu, 11 Dec 2025 08:03:54 +0000 (03:03 -0500)]
mach-sc5xx: Kconfig: Make EZKIT and EZLITE carriers mutually exclusive
Support for the SOM-CRR variants introduces library level changes that
are not modelled in the device tree. As a result they cannot both be
selected at the same time, so this updates the dependency in Kconfig to
prevent them from being enabled together.
Reported-by: Philip Molloy <Philip.Molloy@analog.com> Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Greg Malysa [Thu, 11 Dec 2025 08:03:53 +0000 (03:03 -0500)]
mach-sc5xx: Rename SC_BOOT_MODE
The symbol SC_BOOT_MODE was named incorrectly and inconsistently with
its usage. The selected boot mode is set only by hardware and cannot be
adjusted through software (apart from the use of FORCE_BMODE to instruct
the boot rom to ignore the hardware setting when loading uboot proper,
but this cannot change how SPL is loaded).
This symbol actually controlled the BCODE (easily confused with BMODE,
shorthand for boot mode), so this renames it to SC_BCODE and updates the
help text to reflect its actual usage: the BCODE is an SoC- and boot
mode-specific setting that affects how the boot rom configures QSPI or
OSPI in order to read an LDR file from the associated peripheral.
Reported-by: Philip Molloy <Philip.Molloy@analog.com> Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Utsav Agarwal [Thu, 11 Dec 2025 08:03:52 +0000 (03:03 -0500)]
mach-sc5xx: Introduce Kconfig symbols for image addresses
Add Kconfig symbols to parameterize the SPI flash layout used in a
default-ish configuration. This adds more flexibility to the default ADI
environment, enabling customers with boards based on but not identical
to an ezkit to reuse more of the infrastructure. Furthermore it allows
for yocto (the expected default) or binman (to be introduced in this
series) to configure or use the flash layout based on a single
definition of all of the parameters when creating an image.
- mmc: Fix sdhci-cadence6 license
- mmc: Fix sd_get_capabilities retry logic
- mmc: use max-frequency from device tree
- Clean up regulator and build fix
Yanir Levin [Thu, 22 Jan 2026 02:32:06 +0000 (10:32 +0800)]
mmc: Fix retry logic in sd_get_capabilities
In sd_get_capabilities an ACMD is sent (SD_CMD_APP_SEND_SCR),
which requires sending APP_CMD (MMC_CMD_APP_CMD) before.
Currently, the ACMD is retried on error, however APP_CMD isn't.
In this case, when the ACMD fails and it is tried again,
the retry attempts will not be handled as ACMD, which is wrong.
The fix performs the retry attempts on the sequence of
APP_CMD and the ACMD together.
Signed-off-by: Yanir Levin <yanir.levin@tandemg.com> Reviewed-by: Eran Moshe <emoshe@gsitechnology.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tanmay Kathpalia [Fri, 16 Jan 2026 12:50:31 +0000 (04:50 -0800)]
mmc: mmc-uclass: Use max-frequency from device tree with driver default fallback
Use dev_read_u32_default() instead of dev_read_u32() to read the
"max-frequency" property from device tree. This preserves the driver-set
cfg->f_max value when the optional "max-frequency" property is not
present, ensuring the controller's default frequency is used as fallback
rather than being overwritten.
Suggested-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Julien Stephan [Thu, 15 Jan 2026 14:30:45 +0000 (15:30 +0100)]
power: regulator: common: fix compilation issue
If CONFIG_DM_GPIO is not enabled, compilation fails with the following
errors:
aarch64-none-linux-gnu-ld: drivers/power/regulator/regulator_common.o: in function `regulator_common_of_to_plat':
<...>/u-boot/drivers/power/regulator/regulator_common.c:30: undefined reference to `gpio_request_by_name'
aarch64-none-linux-gnu-ld: drivers/power/regulator/regulator_common.o: in function `regulator_common_get_enable':
<...>/u-boot/drivers/power/regulator/regulator_common.c:57: undefined reference to `dm_gpio_get_value'
aarch64-none-linux-gnu-ld: drivers/power/regulator/regulator_common.o: in function `regulator_common_set_enable':
<...>/u-boot/drivers/power/regulator/regulator_common.c:92: undefined reference to `dm_gpio_set_value'
make: *** [Makefile:2029: u-boot] Error 139
Since the enable gpio is optional we can conditionally skip these calls.
Reviewed-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Julien Stephan <jstephan@baylibre.com> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Julien Stephan [Thu, 15 Jan 2026 14:30:44 +0000 (15:30 +0100)]
power: regulator: common: use dm_gpio_is_valid helper
Use dm_gpio_is_valid() helper function instead of manually checking the
gpio.
Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Julien Stephan <jstephan@baylibre.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Drop the ftrace like debug() that checkpatch --strict complains about:
WARNING: Unnecessary ftrace-like logging - prefer using ftrace
Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Julien Stephan <jstephan@baylibre.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
David Lechner [Wed, 14 Jan 2026 22:58:57 +0000 (16:58 -0600)]
clk: mtk: use IS_ERR_VALUE() to check rate return values
Replace casting with long to IS_ERR_VALUE() macro to check for error
return values from rate calculation functions. This is the recommended
way to check the return value from clock rate functions.
Signed-off-by: David Lechner <dlechner@baylibre.com>
David Lechner [Wed, 14 Jan 2026 22:37:19 +0000 (16:37 -0600)]
pinctrl: mediatek: fix failing to get syscon
Replace uclass_get_device_by_ofnode() with syscon_regmap_lookup_by_phandle()
to get the "mediatek,pctl-regmap" syscon device.
Depending on probe order, uclass_get_device_by_ofnode() may fail, but
syscon_regmap_lookup_by_phandle() has logic in it to handle that case
correctly.
The previous implementation could read more than one syscon if the
"mediatek,pctl-regmap" property had more than one phandle, but the one
board with a devicetree that does that is not supported in U-Boot yet,
so we can save that for later (it may never be needed).
Fixes: 424ceba18bfb ("pinctrl: mediatek: support mediatek,pctl-regmap property") Signed-off-by: David Lechner <dlechner@baylibre.com>
David Lechner [Wed, 14 Jan 2026 22:24:14 +0000 (16:24 -0600)]
clk: mediatek: fix mux clocks with mapped parent IDs
Pass the unmapped parent ID when setting parent for mux clocks.
For technical reasons, some Mediatek clock driver have a mapping between
the clock IDs used in the devicetree and ID used in the generic clock
framework.
The mtk_clk_mux_set_parent() function is comparing the passed mapped
parent ID against the unmapped IDs in the chip-specific data structures.
Before this change, we were passing the mapped parent ID. When there is
a mapping, this resulted in buggy behavior (usually just incorrectly
failing to find a match and returning an error). We need to pass the
unmapped ID of the parent clock instead for the matching to work
correctly.
Since the reverse lookup is a bit verbose, a helper function is added to
keep the code clean.
David Lechner [Wed, 14 Jan 2026 01:48:31 +0000 (19:48 -0600)]
pinctrl: mediatek: ignored error return from pupd/r1/r0
Ignore the error return value from mtk_pinconf_bias_set_pupd_r1_r0().
The PUPD/R1/R0 registers only include a small subset of the pins, so
it is normal for this function to return an error for most pins.
Therefore, this error should not be propagated.
This fixes not all pins in a pinmux group being configured in some
cases because the propagated error caused the configuration loop to
exit early.
The rest of the function is refactored to return early on errors to
improve readability.
Signed-off-by: David Lechner <dlechner@baylibre.com>
David Lechner [Tue, 13 Jan 2026 23:25:52 +0000 (17:25 -0600)]
pinctrl: mediatek: set array size for reg_cals
Set the size of the reg_cals arrays to PINCTRL_PIN_REG_MAX to in all
affected mediatek pinctrl drivers. This is needed to avoid potential
out-of-bounds accesses when they is used in mtk_hw_pin_field_get().
All array members need to be initialized since the code loops from 0
to PINCTRL_PIN_REG_MAX - 1. mt7622_reg_cals was already defined this
way, but the others were not.
Signed-off-by: David Lechner <dlechner@baylibre.com>
Tom Rini [Wed, 21 Jan 2026 19:25:45 +0000 (13:25 -0600)]
Merge patch series "clk: clk-uclass: debug message improvements"
David Lechner <dlechner@baylibre.com> says:
I needed to debug some clock issues and found some places where pointer
addresses were being printed when names were available. The addresses
are not very helpful, but the names are. So here a couple of patches to
improve that.
David Lechner [Thu, 8 Jan 2026 18:05:55 +0000 (12:05 -0600)]
clk: clk-uclass: used dev name in debug message
Consistently use the device name in debug messages. The clk-uclass file
previously had a mix of printing the dev pointer and the device name.
Changing all to use the device name makes the debug messages more
useful.
Signed-off-by: David Lechner <dlechner@baylibre.com>
Tom Rini [Thu, 15 Jan 2026 21:27:22 +0000 (15:27 -0600)]
arm: Remove remainder of ARCH_ORION5X
With commit 5663b137e682 ("arm: Remove edminiv2 board") the last
ARCH_ORION5X platform was removed. Remove the rest of the architecture
code which is now unused.
Reviewed-by: Tony Dinh <mibodhi@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Wadim Egorov [Wed, 14 Jan 2026 09:03:51 +0000 (10:03 +0100)]
board: phytec: Add PHYTEC mailing list to MAINTAINERS entries
PHYTEC maintains an actively monitored mailing list for upstream
activities: upstream@lists.phytec.de. Add it to the MAINTAINERS
entries for PHYTEC boards we actively develop and contribute to.
Daniel Schultz [Tue, 13 Jan 2026 05:35:31 +0000 (06:35 +0100)]
configs: phycore_am62ax_r5_ethboot_defconfig: Drop NET_RANDOM_ETHADDR
BOOTP does not support dynamic lease expiration. Using random MAC
addresses on R5 network boot binaries would result in continuously
allocated IPs without proper release.
Since only one interface is enabled for network boot, rely on the
MAC address provided by the efuses instead.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Daniel Schultz [Tue, 13 Jan 2026 05:35:30 +0000 (06:35 +0100)]
configs: phycore_am62x_r5_ethboot_defconfig: Drop NET_RANDOM_ETHADDR
BOOTP does not support dynamic lease expiration. Using random MAC
addresses on R5 network boot binaries would result in continuously
allocated IPs without proper release.
Since only one interface is enabled for network boot, rely on the
MAC address provided by the efuses instead.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Tom Rini [Tue, 20 Jan 2026 16:19:48 +0000 (10:19 -0600)]
Merge patch series "Update linker scripts to ensure appended device tree is correctly aligned"
Tom Rini <trini@konsulko.com> says:
This series builds on top of what Beleswar Padhi did in [1]. While
there's still discussion about the mkimage related parts, the linker
portion appears to the reliable path forward. An alternative that I had
mentioned before, and was part of previous discussions on this topic[2]
is in the end I believe not reliable enough. While we can take an output
file and pad it to where we think it needs to be, ultimately the linker
needs to place the symbol where we want it and if that isn't where we
pad to, we have a different problem. So what this series does (but each
commit message elaborates on the arch-specific linker scripts being
inconsistent) is make sure the linker script will place the required
symbol at 8-byte alignment, and then also use an ASSERT to fail the
build if this would not be true due to some unforseen event.
Tom Rini [Thu, 15 Jan 2026 22:19:40 +0000 (16:19 -0600)]
x86: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d75 ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Rewrite the '.rel.dyn' (u-boot.lds) to follow modern practices, and
include the 8-byte alignment at the end of the section.
- Expands the '.dynamic' section (u-boot-64.lds) to be more readable
when adding a second statement to the section.
- Aligns the final section before _end (for U-Boot) or _image_binary_end
or __bss_end (for xPL phases) by 8-bytes by adding '. = ALIGN(8);' to
the final section before the symbol or changing an existing ALIGN(4)
statement.
- Ensure that we do have alignment by adding an ASSERT so that when not
aligned we fail to link (and explain why).
Tom Rini [Thu, 15 Jan 2026 22:19:39 +0000 (16:19 -0600)]
sandbox: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d75 ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _image_binary_end (for xPL phases) by
8-bytes by adding '. = ALIGN(8);' to the final section before the
symbol.
- Ensure that we do have alignment by adding an ASSERT so that when not
aligned we fail to link (and explain why).
Tom Rini [Thu, 15 Jan 2026 22:19:38 +0000 (16:19 -0600)]
riscv: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d75 ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _end (for U-Boot) or _image_binary_end
(for xPL phases) by 8-bytes by adding '. = ALIGN(8);' to the final
section before the symbol.
- Remove a now-spurious '. = ALIGN(x);' statement that was intended to
provide the above alignments.
- Ensure that we do have alignment by adding an ASSERT so that when not
aligned we fail to link (and explain why).
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 15 Jan 2026 22:19:37 +0000 (16:19 -0600)]
powerpc: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d75 ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _end by 8-bytes by adding '. =
ALIGN(8);' or changing an existing ALIGN(4) statement.
- Ensure that we do have alignment by adding an ASSERT so that when not
aligned we fail to link (and explain why).
Tom Rini [Thu, 15 Jan 2026 22:19:36 +0000 (16:19 -0600)]
nios2: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d75 ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _end 8-bytes by adding '. = ALIGN(8);'
to the final section before the symbol.
- Remove a now-spurious '. = ALIGN(x);' statement that was intended to
provide the above alignments.
- Ensure that we do have alignment by adding an ASSERT so that when not
aligned we fail to link (and explain why).
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 15 Jan 2026 22:19:35 +0000 (16:19 -0600)]
mips: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d75 ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _end (for U-Boot) or _image_binary_end
(for xPL phases) by 8-bytes by adding '. = ALIGN(8);' to the final
section before the symbol. For SPL we need this in two places to cover
all build configurations.
- Remove now-spurious '. = ALIGN(x);' statements that were intended to
provide the above alignments.
- Ensure that we do have alignment by adding an ASSERT so that when not
aligned we fail to link (and explain why).
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 15 Jan 2026 22:19:34 +0000 (16:19 -0600)]
microblaze: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d75 ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _end (for U-Boot) or _image_binary_end
(for xPL phases) by 8-bytes by adjusting the ALIGN(4) statement to be
ALIGN(8) in the final section before the symbol.
- Ensure that we do have alignment by adding an ASSERT so that when not
aligned we fail to link (and explain why).
Tested-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 15 Jan 2026 22:19:33 +0000 (16:19 -0600)]
m68k: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d75 ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Remove part of what Marek Vasut did in commit 9ed99e2eeadb ("m68k:
Assure end of U-Boot is at 8-byte aligned offset") as we now better
understand what can trigger failure and check for it.
- Rewrite the '.dynsym' section to follow modern practices, and include
the 8-byte alignment at the end of the section.
- Ensure that we do have alignment by adding an ASSERT so that when not
aligned we fail to link (and explain why).
Tom Rini [Thu, 15 Jan 2026 22:19:32 +0000 (16:19 -0600)]
arm: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d75 ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Expands some linker sections to be more readable when adding a second
statement to the section.
- Aligns the final section before _end (for U-Boot) or
_image_binary_end or __bss_end (for xPL phases) by 8-bytes by adding
'. = ALIGN(8);' to the final section before the symbol.
- Ensure that we do have alignment by adding an ASSERT so that when not
aligned we fail to link (and explain why).
- Remove now-spurious '. = ALIGN(x);' statements that were intended to
provide the above alignments.
Tested-by: Michal Simek <michal.simek@amd.com> # Zynq Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
[trini: Also update arch/arm/cpu/armv8/u-boot.lds as Ilas requested] Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 15 Jan 2026 22:19:31 +0000 (16:19 -0600)]
Makefile: Have binary_size_check report only first match of _image_binary_end
If we have ASSERT macros that validate the position of
_image_binary_end, our awk expression will report a string that causes
the rest of our check to fail with garbage values. Have it exit after
the first match to fix this.
Beleswar Padhi [Mon, 12 Jan 2026 10:11:02 +0000 (15:41 +0530)]
ARM: OMAP2+: Pad SPL binary to 8-byte alignment before DTB
The OMAP2 SPL linker script (also used for K3 platforms) currently uses
a 4-byte alignment directive after the __u_boot_list section. This
alignment directive only advances the location counter without padding
the actual binary output.
When objcopy extracts u-boot-spl-nodtb.bin, it includes only actual
data, stopping at the last byte of __u_boot_list (e.g., 0x41c359fc),
not an aligned address (e.g., 0x41c35a00). So, when the FIT image
containing device trees is concatenated to the SPL binary, it gets
appended at this unaligned file size, causing libfdt validation failure.
To fix this, move the alignment directive into the __u_boot_list section
itself and make it 8-byte aligned as per DT spec. This forces the linker
to include padding as part of the section data, ensuring objcopy
includes the padding bytes in the binary and the appended FIT image
starts at an 8-byte aligned boundary.
Reported-by: Anshul Dalal <anshuld@ti.com> Closes: https://lore.kernel.org/u-boot/DFJ950O0QM0D.380U0N16ZO19E@ti.com Fixes: 0535e46d55d7 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c") Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
* Update StarFive JH7110 common description
* Add TI AM62D documentation
* Update urllib3 version for building
* Update links to doc/develop/falcon.rst
* Describe QEMU networking
* kdoc: handle the obsolescensce of docutils.ErrorString()
* Fix typo "addtional" -> "additional" in pflash section.
UEFI:
* Fix boot failure from FIT with compressed EFI binary
Others:
* cmd/meminfo: Correct displaying addresses above 4 GiB
* test:
- Consider configuration in meminfo test
- Consider initf_malloc is only traced with EARLY_TRACE
- Clean up test_trace.py code
E Shattow [Sun, 21 Dec 2025 11:36:04 +0000 (03:36 -0800)]
doc: board: starfive: update jh7110 common description
Updates to the JH7110 common description:
- add detailed overview of JH-7110 SoC and boot process
- revise descriptions of deprecated StarFive loader modes
- refresh build directions grouped with SPL debug advice
- reduce usage instructions into common methods shared by supported boards
- cite starfive_visionfive2 board maintainer description of StarFive loader
- cite published datasheets for ambient operating temperature data
Redundant/deprecated sections of each board doc are dropped accordingly:
- deepcomputing fml13v01
- milk-v mars
- pine64 star64 (also add inclusion of JH7110 common description)
- visionfive2
Robert Marko [Tue, 13 Jan 2026 11:07:38 +0000 (12:07 +0100)]
tools: amlimage: include <inttypes.h>
PRIuN, PRIxN, etc macros are defined in <inttypes.h>, without it being
included errors like:
tools/amlimage.c:124:38: error: expected ‘)’ before ‘PRIu8’
tools/amlimage.c:126:31: error: expected ‘)’ before ‘PRIu32’
Can be hit depending on the host compiler and HOSTCFLAGS.
Fixes: 18c1654567dc ("tools: mkimage: Add Amlogic Boot Image type") Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Ferass El Hafidi <funderscore@postmarketos.org>
Revert "arm: dts: an7581: set r_smpl for MMC in U-Boot"
On my AN7581 board, the same change in the Airoha ATF-2.10 source code
causes instability in eMMC reading. After the patch, in about 9 of 10
cases, ATF BL2 is unable to read FIP image from the eMMC flash. Thus
BL31 and U-Boot are unable to start.
Lets revert commit 7cb79f8d3d55 ("arm: dts: an7581: set r_smpl for MMC
in U-Boot") until the issue will be investigated.
Masahisa Kojima [Wed, 7 Jan 2026 00:35:31 +0000 (09:35 +0900)]
bootm: fix boot failure from compressed image for IH_OS_EFI
The bootm command can handle the compressed image, but current
code fails to boot from it.
## Loading kernel (any) from FIT Image at a8000000 ...
<snip>
Compression: gzip compressed
Data Start: 0xa80000d4
Data Size: 10114520 Bytes = 9.6 MiB
Architecture: AArch64
OS: EFI Firmware
Load Address: 0x90000000
<snip>
Uncompressing Kernel Image to 90000000
## Transferring control to EFI (at address a80000d4) ...
Booting <NULL>
Not a PE-COFF file
Loading image failed
To take care of the compressed image, the load address needs
to be passed instead of the original compressed image address.
Signed-off-by: Masahisa Kojima <kojima.masahisa@socionext.com> Tested-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
J. Neuschäfer [Thu, 1 Jan 2026 14:31:06 +0000 (15:31 +0100)]
docs: kdoc: handle the obsolescensce of docutils.ErrorString()
The ErrorString() and SafeString() docutils functions were helpers meant to
ease the handling of encodings during the Python 3 transition. There is no
real need for them after Python 3.6, and docutils 0.22 removes them,
breaking the docs build
Handle this by just injecting our own one-liner version of ErrorString(),
and removing the sole SafeString() call entirely.
Reported-by: Zhixu Liu <zhixu.liu@gmail.com> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Upstream: https://git.kernel.org/linus/00d95fcc4dee66dfb6980de6f2973b32f973a1eb
[j.ne: Adapted from Linux to U-Boot] Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
- Fix interrupt storms in Linux on the imx93_frdm board.
- Defconfig update for tqma6 board.
- Miscellaneous cleanups/improvements for imx93_evk.
- Allow booting from both USB controlles on i.MX6 DHSOM.
- Handle third MAC address for SMARC i.MX95
Max Merchel [Fri, 16 Jan 2026 10:53:37 +0000 (11:53 +0100)]
configs: tqma6: mba6: add and use defconfigs with general configurations
Add a common, MMC and SPI defconfigs with the general configurations
and use them in the variant-specific defconfigs.
while at it:
- set BOOTCOMMAND to mmcboot as it is used on majority of other TQ modules
as the default
- remove DEFAULT_FDT_FILE - The kernel device tree is set at runtime.
- remove CONFIG_CMD_EXT4_WRITE - EXT4 with default features cannot be
written from U-Boot.
- add CONFIG_FDT_FIXUP_PARTITIONS - This is needed to propagate MTD
partition setup via devicetree to linux.
Signed-off-by: Paul Gerber <Paul.Gerber@ew.tq-group.com> Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
- add BUTTON support
- add gpio LED support
- enable CMD_TEMPERATURE to get query temperature in console
- remove Variants that are Kconfig default
- USB ethernet port is not in use by default, remove ethprime
Signed-off-by: Paul Gerber <Paul.Gerber@tq-group.com> Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
Milan P. Stanić [Mon, 12 Jan 2026 18:12:37 +0000 (19:12 +0100)]
tools: fix format string in tools/imx8image.c
on 32bit systems with musl libc compiler emits
warning: format '%lx' expects argument of type 'long unsigned int', but argument 3 has type 'size_t' {aka 'unsigned int'} [-Wformat=]
to fix this use format length modifier 'z' (size_t) instead of 'l'
Signed-off-by: Milan P. Stanić <mps@arvanta.net> Reviewed-by: Tom Rini <trini@konsulko.com>
Peng Fan [Thu, 8 Jan 2026 11:06:58 +0000 (19:06 +0800)]
imx93_qsb: Invoke the ELE voltage APIs when adjust VDD_SOC voltage
SPL will adjust VDD_SOC to OD voltage, because some PMIC uses
0.8V as default for VDD_SOC. So need to call the voltage change
APIs to avoid ELE Glitch Detection triggered reset.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Thu, 8 Jan 2026 11:06:57 +0000 (19:06 +0800)]
imx93_evk: Invoke the ELE voltage APIs when adjust VDD_SOC voltage
SPL will adjust VDD_SOC to OD voltage, because some PMIC uses
0.8V as default for VDD_SOC. So need to call the voltage change
APIs to avoid ELE Glitch Detection triggered reset.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Thu, 8 Jan 2026 11:06:56 +0000 (19:06 +0800)]
misc: ele_api: Add Voltage change start and finish APIs
On GDET enabled part, need to call voltage change start and finish
APIs when adjust the voltage more than 100mv. Otherwise GDET will be
triggered and system is reset
Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
projects / thirdparty / u-boot.git / log
