linux-unwind.h (pa32_read_access_ok): New function.
* config/pa/linux-unwind.h (pa32_read_access_ok): New function.
(pa32_fallback_frame_state): Use pa32_read_access_ok to check if
memory read accesses are ok.
Bill Schmidt [Mon, 13 Oct 2014 02:35:03 +0000 (02:35 +0000)]
backport: rs6000-c.c (altivec_resolve_overloaded_builtin): Issue a warning message when vec_lvsl or vec_lvsr is used with a little endian...
[gcc]
2014-10-12 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline r215880
2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
Issue a warning message when vec_lvsl or vec_lvsr is used with a
little endian target.
Backport from mainline r215882
2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* altivec.md (altivec_lvsl): New define_expand.
(altivec_lvsl_direct): Rename define_insn from altivec_lvsl.
(altivec_lvsr): New define_expand.
(altivec_lvsr_direct): Rename define_insn from altivec_lvsr.
* rs6000.c (rs6000_expand_builtin): Change to use
altivec_lvs[lr]_direct; remove commented-out code.
[gcc/testsuite]
2014-10-12 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline r215880
2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* g++.dg/ext/altivec-2.C: Compile with -Wno-deprecated to avoid
failing with the new warning message.
* gcc.dg/vmx/3c-01a.c: Likewise.
* gcc.dg/vmx/ops-long-1.c: Likewise.
* gcc.dg/vmx/ops.c: Likewise.
* gcc.target/powerpc/altivec-20.c: Likewise.
* gcc.target/powerpc/altivec-6.c: Likewise.
* gcc.target/powerpc/altivec-vec-merge.c: Likewise.
* gcc.target/powerpc/vsx-builtin-8.c: Likewise.
* gcc.target/powerpc/warn-lvsl-lvsr.c: New test.
Backport from mainline r215882
2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/lvsl-lvsr.c: New test.
Backport from mainline r216017
2014-10-08 Pat Haugen <pthaugen@us.ibm.com>
Bill Schmidt [Mon, 13 Oct 2014 01:42:03 +0000 (01:42 +0000)]
backport: lex.c (search_line_fast): Add new version to be used for Power8 and later targets when Altivec is enabled.
2014-10-12 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline r215873
2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* lex.c (search_line_fast): Add new version to be used for Power8
and later targets when Altivec is enabled. Restrict the existing
Altivec version to big-endian systems so that lvsr is not used on
little endian, where it is deprecated. Remove LE-specific code
from the now-BE-only version.
Uros Bizjak [Thu, 9 Oct 2014 09:05:37 +0000 (11:05 +0200)]
backport: re PR rtl-optimization/57003 (gcc breaks -O2 optimization with Wine(64) - links/info/bisect of commits included)
Backport from mainline
2014-10-09 Uros Bizjak <ubizjak@gmail.com>
PR rtl-optimization/57003
* regcprop.c (copyprop_hardreg_forward_1): If ksvd.ignore_set_reg,
also check CALL_INSN_FUNCTION_USAGE for clobbers again after
killing regs_invalidated_by_call.
Jakub Jelinek [Thu, 25 Sep 2014 08:19:14 +0000 (10:19 +0200)]
re PR tree-optimization/63341 (Vectorization miscompilation with -mcpu=power7)
PR tree-optimization/63341
* tree-vectorizer.h (vect_create_data_ref_ptr,
vect_create_addr_base_for_vector_ref): Add another tree argument
defaulting to NULL_TREE.
* tree-vect-data-refs.c (vect_create_data_ref_ptr): Add byte_offset
argument, pass it down to vect_create_addr_base_for_vector_ref.
(vect_create_addr_base_for_vector_ref): Add byte_offset argument,
add that to base_offset too if non-NULL.
* tree-vect-stmts.c (vectorizable_load): Add byte_offset variable,
for dr_explicit_realign_optimized set it to vector byte size
- 1 instead of setting offset, pass byte_offset down to
vect_create_data_ref_ptr.
* gcc.dg/vect/pr63341-1.c: New test.
* gcc.dg/vect/pr63341-2.c: New test.
Michael Meissner [Tue, 23 Sep 2014 17:32:37 +0000 (17:32 +0000)]
rs6000.md (f32_vsx): New mode attributes to refine the constraints used on 32/64-bit floating point...
2014-09-23 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.md (f32_vsx): New mode attributes to
refine the constraints used on 32/64-bit floating point moves.
(f32_av): Likewise.
(f64_vsx): Likewise.
(f64_dm): Likewise.
(f64_av): Likewise.
(BOOL_REGS_OUTPUT): Use wt constraint for TImode instead of wa.
(BOOL_REGS_OP1): Likewise.
(BOOL_REGS_OP2): Likewise.
(BOOL_REGS_UNARY): Likewise.
(mov<mode>_hardfloat, SFmode/SDmode): Tighten down constraints for
32/64-bit floating point moves. Do not use wa, instead use ww/ws
for moves involving VSX registers. Do not use constraints that
target VSX registers for decimal types.
(mov<mode>_hardfloat32, DFmode/DDmode): Likewise.
(mov<mode>_hardfloat64, DFmode/DDmode): Likewise.
Michael Meissner [Tue, 23 Sep 2014 17:31:26 +0000 (17:31 +0000)]
rs6000.md (f32_vsx): New mode attributes to refine the constraints used on 32/64-bit floating point...
2014-09-23 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.md (f32_vsx): New mode attributes to
refine the constraints used on 32/64-bit floating point moves.
(f32_av): Likewise.
(f64_vsx): Likewise.
(f64_dm): Likewise.
(f64_av): Likewise.
(BOOL_REGS_OUTPUT): Use wt constraint for TImode instead of wa.
(BOOL_REGS_OP1): Likewise.
(BOOL_REGS_OP2): Likewise.
(BOOL_REGS_UNARY): Likewise.
(mov<mode>_hardfloat, SFmode/SDmode): Tighten down constraints for
32/64-bit floating point moves. Do not use wa, instead use ww/ws
for moves involving VSX registers. Do not use constraints that
target VSX registers for decimal types.
(mov<mode>_hardfloat32, DFmode/DDmode): Likewise.
(mov<mode>_hardfloat64, DFmode/DDmode): Likewise.
Michael Meissner [Fri, 19 Sep 2014 22:14:58 +0000 (22:14 +0000)]
backport: predicates.md (fusion_gpr_mem_load): Move testing for base_reg_operand to be common between LO_SUM and PLUS.
2014-09-19 Michael Meissner <meissner@linux.vnet.ibm.com>
Back port from trunk:
2014-09-19 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/predicates.md (fusion_gpr_mem_load): Move testing
for base_reg_operand to be common between LO_SUM and PLUS.
(fusion_gpr_mem_combo): New predicate to match a fused address
that combines the addis and memory offset address.
* config/rs6000/rs6000.c (fusion_gpr_load_p): Change calling
signature to pass each argument separately, rather than
using an operands array. Rewrite the insns found by peephole2 to
be a single insn, rather than hoping the insns will still be
together when the peephole pass is done. Drop being called via a
normal peephole.
(emit_fusion_gpr_load): Change calling signature to be called from
the fusion_gpr_load_<mode> insns with a combined memory address
instead of the peephole pass passing the addis and offset
separately.
* config/rs6000/rs6000.md (UNSPEC_FUSION_GPR): New unspec for GPR
fusion.
(power8 fusion peephole): Drop support for doing power8 via a
normal peephole that was created by the peephole2 pass.
(power8 fusion peephole2): Create a new insn with the fused
address, so that the fused operation is kept together after
register allocation is done.
(fusion_gpr_load_<mode>): Likewise.
Joseph Myers [Thu, 18 Sep 2014 12:04:43 +0000 (13:04 +0100)]
Fix i386 FP_TRAPPING_EXCEPTIONS.
The i386 sfp-machine.h defines FP_TRAPPING_EXCEPTIONS in a way that is
always wrong: it treats a set bit as indicating the exception is
trapping, when actually a set bit (both for 387 and SSE floating
point) indicates it is masked, and a clear bit indicates it is
trapping. This patch fixes this bug.
Bootstrapped with no regressions on x86_64-unknown-linux-gnu.
libgcc:
* config/i386/sfp-machine.h (FP_TRAPPING_EXCEPTIONS): Treat clear
bits not set bits as indicating trapping exceptions.
gcc/testsuite:
* gcc.dg/torture/float128-exact-underflow.c: New test.
Jakub Jelinek [Wed, 17 Sep 2014 19:08:06 +0000 (21:08 +0200)]
re PR debug/63284 (-fcompare-debug issue due to redirection to __builtin_unreachable ())
PR debug/63284
* tree-cfgcleanup.c (fixup_noreturn_call): Don't split block
if there are only debug stmts after the noreturn call, instead
remove the debug stmts.
Michael Meissner [Wed, 10 Sep 2014 23:20:48 +0000 (23:20 +0000)]
vsx.md (vsx_fmav4sf4): Use correct constraints for V2DF, V4SF, DF, and DI modes.
2014-09-10 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/vsx.md (vsx_fmav4sf4): Use correct constraints for
V2DF, V4SF, DF, and DI modes.
(vsx_fmav2df2): Likewise.
(vsx_float_fix_<mode>2): Likewise.
(vsx_reduc_<VEC_reduc_name>_v2df_scalar): Likewise.
Richard Biener [Tue, 9 Sep 2014 14:45:57 +0000 (14:45 +0000)]
backport: re PR tree-optimization/61452 (hang at -O1 and -Os on x86_64-linux-gnu)
2014-09-09 Richard Biener <rguenther@suse.de>
Backport from mainline
2014-06-11 Richard Biener <rguenther@suse.de>
PR tree-optimization/61452
* tree-ssa-sccvn.c (visit_phi): Remove pointless setting of
expr and has_constants in case we found a leader.
(simplify_binary_expression): Always valueize operands first.
(simplify_unary_expression): Likewise.
Richard Biener [Tue, 9 Sep 2014 13:17:51 +0000 (13:17 +0000)]
backport: [multiple changes]
2014-09-09 Richard Biener <rguenther@suse.de>
Backport from mainline
2014-05-05 Richard Biener <rguenther@suse.de>
PR middle-end/61010
* fold-const.c (fold_binary_loc): Consistently avoid
canonicalizing X & CST away from a CST that is the mask
of a mode.
* gcc.dg/torture/pr61010.c: New testcase.
2014-05-28 Richard Biener <rguenther@suse.de>
PR middle-end/61045
* fold-const.c (fold_comparison): When folding
X +- C1 CMP Y +- C2 to X CMP Y +- C2 +- C1 also ensure
the sign of the remaining constant operand stays the same.
* gcc.dg/pr61045.c: New testcase.
2014-08-11 Richard Biener <rguenther@suse.de>
PR tree-optimization/62075
* tree-vect-slp.c (vect_detect_hybrid_slp_stmts): Properly
handle uses in patterns.
* tree-vect-patterns.c (vect_recog_dot_prod_pattern): Fix a bug
when checking the dot production pattern. The type of rhs operand
of multiply is now checked correctly.
* gcc.dg/vect/pr63189.c: New test.
* gcc.dg/vect/pr60196-1.c: New test.
* gcc.dg/vect/pr60196-2.c: New test.
Backported from mainline
2013-09-17 Cong Hou <congh@google.com>
* gcc.dg/vect/vect-reduc-dot-s16c.c: Add a test case with dot product
on two arrays with short and int types. This should not be recognized
as a dot product pattern.