David Lechner [Tue, 1 Jul 2025 21:37:59 +0000 (16:37 -0500)]
iio: adc: ad_sigma_delta: add SPI offload support
Add SPI offload support to the ad_sigma_delta module.
When the SPI controller has SPI offload capabilities, the module will
now use that for buffered reads instead of the RDY interrupt trigger.
Drivers that use the ad_sigma_delta module will have to opt into this
by setting supports_spi_offload since each driver will likely need
additional changes before SPI offload can be used. This will allow us
to gradually enable SPI offload support for each driver.
David Lechner [Tue, 1 Jul 2025 21:37:56 +0000 (16:37 -0500)]
iio: adc: ad_sigma_delta: use spi_optimize_message()
Use spi_optimize_message() to improve the performance of buffered reads.
By setting up the SPI message and pre-optimizing it in the buffer
postenable callback, we can reduce overhead during each sample read.
A rough estimate shows that this reduced the CPU usage of the interrupt
handler thread from 22% to 16% using an EVAL-AD4112ARDZ board on a
DE10-Nano (measuring a single channel at the default 6.2 kHz sample
rate).
David Lechner [Tue, 1 Jul 2025 21:37:54 +0000 (16:37 -0500)]
iio: adc: ad_sigma_delta: audit included headers
Drop linux/iio/sysfs.h since it is unused and replace linux/kernel.h
with more explicit headers. There are a couple of other headers added
weren't covered by kernel.h, like linux/gpio/consumer.h that are added
since the module makes use of those APIs as well.
David Lechner [Tue, 1 Jul 2025 21:37:53 +0000 (16:37 -0500)]
iio: adc: ad_sigma_delta: use BITS_TO_BYTES() macro
Use the BITS_TO_BYTES() macro instead of dividing by 8 to convert bits
to bytes.
This makes it more obvious what unit conversion is taking place.
In one instance, we also avoid the temporary assignment to a variable
as it was confusing that reg_size was being used with two different
units (bits and bytes).
scan_type is factored out to reduce line wrapping.
David Lechner [Tue, 1 Jul 2025 21:37:51 +0000 (16:37 -0500)]
iio: adc: ad_sigma_delta: use u8 instead of uint8_t
Replace uint8_t with u8 in the ad_sigma_delta driver.
Technically, uint8_t comes from the C standard library, while u8 is a
Linux kernel type. Since we don't use the C standard library in the
kernel, we should use the kernel types instead.
There is also one instance where int64_t is replaced with s64.
iio: imu: inv_mpu6050: Replace scnprintf with sysfs_emit
Documentation/filesystems/sysfs.rst mentions that show() should only
use sysfs_emit() or sysfs_emit_at() when formating the value to be
returned to user space. So replace scnprintf() with sysfs_emit().
Signed-off-by: Chelsy Ratnawat <chelsyratnawat2001@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com> Link: https://patch.msgid.link/20250701154720.54276-1-chelsyratnawat2001@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
David Lechner [Sat, 28 Jun 2025 18:15:10 +0000 (13:15 -0500)]
iio: pressure: dlhl60d: Use separate structures rather than an array for chip info
Change the dlhl60d driver to use individual chip info structures instead
of an array. This reduces the verbosity of the code. Also, the data is
now const as it should have been in the first place.
David Lechner [Sat, 28 Jun 2025 17:52:30 +0000 (12:52 -0500)]
iio: light: cm3232: move calibscale to struct cm3232_chip
Move the calibscale field from struct cm3232_als_info to struct
cm3232_chip. The chip info struct is supposed to be const while the
driver data struct should contain mutable fields. Since calibscale
is a mutable field, it should be in the driver data struct.
David Lechner [Sat, 28 Jun 2025 17:27:46 +0000 (12:27 -0500)]
iio: imu: adis16400: Use separate structures rather than an array for chip info
Change the adis16400 driver to use individual chip info structures
instead of an array. This reduces the verbosity of the code. Also, the
data is now const as it should have been in the first place.
Ad7768-1 has a different -3db frequency multiplier depending on
the filter type configured. The cutoff frequency also varies according
to the current ODR.
Add a readonly low pass -3dB frequency cutoff attribute to clarify to
the user which bandwidth is being allowed depending on the filter
configurations.
David Lechner [Sat, 28 Jun 2025 16:16:51 +0000 (11:16 -0500)]
iio: adc: ad7124: Use separate structures rather than array for chip info
Change the ad7124 driver to use individual chip info structures instead
of an array. This reduces the verbosity of the code. Also, the data is
now const as it should have been in the first place.
Allow clocks property to fix below CHECK_DTB warning:
arch/arm/boot/dts/nxp/lpc/lpc3250-ea3250.dtb: adc@40048000 (nxp,lpc3220-adc): 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+'
David Lechner [Fri, 20 Jun 2025 14:30:46 +0000 (09:30 -0500)]
iio: adc: ad7173: simplify clock enable/disable
Use devm_clk_get_enabled() instead of devm_clk_get(),
clk_prepare_enable(), devm_add_action_or_reset() to simplify the
code as it effectively does the same thing.
We can also drop ext_clk from struct ad7173_state since it is not used
anywhere else.
Andy Shevchenko [Mon, 16 Jun 2025 09:03:21 +0000 (12:03 +0300)]
iio: imu: inv_icm42600: Convert to uXX and sXX integer types
The driver code is full of intXX_t and uintXX_t types which is
not the pattern we use in the IIO subsystem. Switch the driver
to use kernel internal types for that. No functional changes.
David Lechner [Wed, 11 Jun 2025 22:39:13 +0000 (17:39 -0500)]
iio: light: veml6030: use = { } instead of memset()
Use { } instead of memset() to zero-initialize stack memory to simplify
the code.
Signed-off-by: David Lechner <dlechner@baylibre.com> Tested-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Reviewed-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20250611-iio-zero-init-stack-with-instead-of-memset-v1-21-ebb2d0a24302@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Lothar Rubusch [Tue, 10 Jun 2025 21:59:25 +0000 (21:59 +0000)]
iio: accel: adxl345: simplify measure enable
Simplify the function to enable or disable measurement. Replace the
separate decision logic and call to regmap_update_bits() by a single
call to regmap_assign_bits() taking a boolean argument directly.
This is a refactoring change and should not impact functionality.
David Lechner [Wed, 11 Jun 2025 21:33:02 +0000 (16:33 -0500)]
iio: amplifiers: ada4250: don't fail on bad chip ID
Only print an information message instead of error message and failing
to probe the device if the chip ID is not recognized. Experience shows
that this can be fragile and some devices may not return the expected
chip ID even though the driver is still able to work with them.
Nattan Ferreira [Wed, 11 Jun 2025 17:42:53 +0000 (14:42 -0300)]
iio: light: apds9306: Refactor threshold get/set functions to use helper
Refactor the apds9306_event_thresh_get() and apds9306_event_thresh_set()
functions to use a helper function (apds9306_get_thresh_reg()) for
obtaining the correct register based on the direction of the event. This
improves code readability and maintains consistency in accessing
threshold registers.
Signed-off-by: Nattan Ferreira <nattanferreira58@gmail.com> Co-developed-by: Lucas Antonio <lucasantonio.santos@usp.br> Signed-off-by: Lucas Antonio <lucasantonio.santos@usp.br> Acked-by: Subhajit Ghosh <subhajit.ghosh@tweaklogic.com> Link: https://patch.msgid.link/20250611174253.16578-1-nattanferreira58@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Jonathan Santos [Wed, 11 Jun 2025 11:51:50 +0000 (08:51 -0300)]
iio: adc: ad7768-1: add filter type and oversampling ratio attributes
Separate filter type and decimation rate from the sampling frequency
attribute. The new filter type attribute enables sinc3, sinc3+rej60
and wideband filters, which were previously unavailable.
Previously, combining decimation and MCLK divider in the sampling
frequency obscured performance trade-offs. Lower MCLK divider
settings increase power usage, while lower decimation rates reduce
precision by decreasing averaging. By creating an oversampling
attribute, which controls the decimation, users gain finer control
over performance.
The addition of those attributes allows a wider range of sampling
frequencies and more access to the device features. Sampling frequency
table is updated after every digital filter parameter change.
Changes in the sampling frequency are not allowed anymore while in
buffered mode.
Reviewed-by: David Lechner <dlechner@baylibre.com> Co-developed-by: Pop Paul <paul.pop@analog.com> Signed-off-by: Pop Paul <paul.pop@analog.com> Signed-off-by: Jonathan Santos <Jonathan.Santos@analog.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/cd3b60c44847d5c35cecc4385bbda6533be6825e.1749569957.git.Jonathan.Santos@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Jonathan Santos [Wed, 11 Jun 2025 11:51:23 +0000 (08:51 -0300)]
iio: adc: ad7768-1: add support for Synchronization over SPI
The synchronization method using GPIO requires the generated pulse to be
truly synchronous with the base MCLK signal. When it is not possible to
do that in hardware, the datasheet recommends using synchronization over
SPI, where the generated pulse is already synchronous with MCLK. This
requires the SYNC_OUT pin to be connected to the SYNC_IN pin.
Use trigger-sources property to enable device synchronization over SPI
and multi-device synchronization while replacing sync-in-gpios property.
Jonathan Santos [Wed, 11 Jun 2025 11:51:11 +0000 (08:51 -0300)]
iio: adc: ad7768-1: add multiple scan types to support 16-bits mode
When the device is configured to decimation x8, only possible in the
sinc5 filter, output data is reduced to 16 bits in order to support
1 MHz of sampling frequency due to clock limitation.
Use multiple scan types feature to enable the driver to switch
scan type at runtime, making it possible to support both 24-bit and
16-bit resolution.
Sergiu Cuciurean [Wed, 11 Jun 2025 11:50:56 +0000 (08:50 -0300)]
iio: adc: ad7768-1: Add GPIO controller support
The AD7768-1 has the ability to control other local hardware (such as gain
stages),to power down other blocks in the signal chain, or read local
status signals over the SPI interface.
Add direct mode conditional locks in the GPIO callbacks to prevent register
access when the device is in buffered mode.
This change exports the AD7768-1's four GPIOs and makes them accessible
at an upper layer.
Reviewed-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Sergiu Cuciurean <sergiu.cuciurean@analog.com> Co-developed-by: Jonathan Santos <Jonathan.Santos@analog.com> Signed-off-by: Jonathan Santos <Jonathan.Santos@analog.com> Link: https://patch.msgid.link/8abca580f43cb31d7088d07a7414b5f7efe91ead.1749569957.git.Jonathan.Santos@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
In addition to GPIO synchronization, The AD7768-1 also supports
synchronization over SPI, which use is recommended when the GPIO
cannot provide a pulse synchronous with the base MCLK signal. It
consists of looping back the SYNC_OUT to the SYNC_IN pin and send
a command via SPI to trigger the synchronization.
Introduce the 'trigger-sources' property to enable SPI-based
synchronization via SYNC_OUT pin, along with additional optional
entries for GPIO3 and DRDY pins.
Also create #trigger-source-cells property to differentiate the trigger
sources provided by the ADC. To improve readability, create a
adi,ad7768-1.h header with the macros for the cell values.
While at it, add description to the interrupts property.
irq_domain_create_simple() takes fwnode as the first argument. It can be
extracted from the struct device using dev_fwnode() helper instead of
using of_node with of_fwnode_handle().
chuguangqing [Wed, 11 Jun 2025 08:58:38 +0000 (16:58 +0800)]
iio: light: opt4060: convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.
chuguangqing [Wed, 11 Jun 2025 08:58:37 +0000 (16:58 +0800)]
iio: light: ltr501: convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.
chuguangqing [Wed, 11 Jun 2025 08:58:36 +0000 (16:58 +0800)]
iio: light: isl29028: convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.
chuguangqing [Wed, 11 Jun 2025 08:58:35 +0000 (16:58 +0800)]
iio: imu: bno055: convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.
chuguangqing [Wed, 11 Jun 2025 08:58:34 +0000 (16:58 +0800)]
iio: imu: icm42600: convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.
chuguangqing [Wed, 11 Jun 2025 08:58:33 +0000 (16:58 +0800)]
iio: health: afe4404: convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.
chuguangqing [Wed, 11 Jun 2025 08:58:32 +0000 (16:58 +0800)]
iio: health: afe4403: convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.
projects / thirdparty / kernel / stable.git / log
