Eric Botcazou [Wed, 26 Oct 2011 20:45:09 +0000 (20:45 +0000)]
decl.c (gnat_to_gnu_entity): Try to make a packable type for fields of union types as well.
* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Record_Subtype>: Try to
make a packable type for fields of union types as well.
<is_type>: Use RECORD_OR_UNION_TYPE_P predicate.
(gnat_to_gnu_component_type): Try to make a packable type for fields
of union types as well.
(make_packable_type): Use RECORD_OR_UNION_TYPE_P predicate.
(maybe_pad_type): Try to make a packable type for fields of union types
as well.
(gnat_to_gnu_field): Likewise.
(is_variable_size): Use RECORD_OR_UNION_TYPE_P predicate.
(set_rm_size): Likewise.
(rm_size): Likewise.
* gcc-interface/misc.c (gnat_type_max_size): Likewise.
* gcc-interface/trans.c (add_decl_expr): Likewise.
* gcc-interface/utils.c (finish_record_type): Likewise.
* gcc-interface/utils2.c (build_simple_component_ref): Likewise.
Eric Botcazou [Wed, 26 Oct 2011 13:54:13 +0000 (13:54 +0000)]
reload.c (reload_inner_reg_of_subreg): Change type of return value and type of OUTPUT parameter to bool and adjust.
* reload.c (reload_inner_reg_of_subreg): Change type of return value
and type of OUTPUT parameter to bool and adjust. Document MODE and
OUTPUT parameters. Use HARD_REGISTER_P. Reorder final condition
and improve associated comment.
(push_reload): Clarify and update comments about reloading of subregs.
Adjust calls to reload_inner_reg_of_subreg. Compute the class upfront
for the reloading of subregs in the out case as well.
Jeff Law [Wed, 26 Oct 2011 13:26:50 +0000 (07:26 -0600)]
invoke.texi (sink-frequency-threshold): Document.
* doc/invoke.texi (sink-frequency-threshold): Document.
* tree-ssa-sink.c: Include params.h.
(select_best_block): New function.
(statement_sink_location): Use it.
* params.def (SINK_FREQUENCY_THRESHOLD): New PARAM.
Iain Sandoe [Wed, 26 Oct 2011 12:37:59 +0000 (12:37 +0000)]
re PR target/48108 (lto should be containerized in a single mach-o section on darwin)
gcc:
PR target/48108
* config/darwin.c (top level): Amend comments concerning LTO output.
(lto_section_num): New variable. (darwin_lto_section_e): New GTY.
(LTO_SECTS_SECTION, LTO_INDEX_SECTION): New.
(LTO_NAMES_SECTION): Rename.
(darwin_asm_named_section): Record LTO section counts and switches
in a vec of darwin_lto_section_e.
(darwin_file_start): Remove unused code.
(darwin_file_end): Put an LTO section termination label. Handle
output of the wrapped LTO sections, index and names table.
libiberty:
PR target/48108
* simple-object-mach-o.c (GNU_WRAPPER_SECTS, GNU_WRAPPER_INDEX,
GNU_WRAPPER_NAMES): New macros.
(simple_object_mach_o_segment): Handle wrapper scheme.
(simple_object_mach_o_write_section_header): Allow the segment name
to be supplied.
(simple_object_mach_o_write_segment): Handle wrapper scheme. Ensure
that the top-level segment name in the load command is empty.
(simple_object_mach_o_write_to_file): Determine the number of
sections during segment output, use that in writing the header.
* config/rs6000/rs6000.c (rs6000_make_savres_rtx): Delete unneeded
declaration.
(rs6000_emit_stack_reset): Only return insn emitted when it adjusts sp.
(rs6000_make_savres_rtx): Rename to rs6000_emit_savres_rtx. Use
simple_return in pattern, emit instruction, and set jump_label.
(rs6000_emit_prologue): Update for rs6000_emit_savres_rtx. Use
simple_return rather than return.
(emit_cfa_restores): New function.
(rs6000_emit_epilogue): Emit cfa_restores when flag_shrink_wrap.
Add missing cfa_restores for SAVE_WORLD. Add missing LR cfa_restore
when using out-of-line gpr restore. Add missing LR and FP regs
cfa_restores for out-of-line fpr restore. Consolidate code setting
up cfa_restores. Formatting. Use LR_REGNO define.
(rs6000_output_mi_thunk): Use simple_return rather than return.
* config/rs6000/rs6000.md (sibcall*, sibcall_value*): Likewise.
(return_internal*): Likewise.
(any_return, return_pred, return_str): New iterators.
(return, conditional return insns): Provide both return and
simple_return variants.
* config/rs6000/rs6000.h (EARLY_R12, LATE_R12): Define.
(REG_ALLOC_ORDER): Move r12 before call-saved regs when FIXED_R13.
Move r11 and r0 later to suit shrink-wrapping.
Jakub Jelinek [Wed, 26 Oct 2011 09:46:45 +0000 (11:46 +0200)]
i386.md (UNSPEC_VSIBADDR): New.
* config/i386/i386.md (UNSPEC_VSIBADDR): New.
* config/i386/predicates.md (vsib_address_operand,
vsib_mem_operator): New predicates.
* config/i386/i386.c (ix86_print_operand_address): Handle
UNSPEC_VSIBADDR addresses.
* config/i386/sse.md (avx2_gathersi<mode>, avx2_gatherdi<mode>,
avx2_gatherdi<mode>256): Adjust expanders to use MEM with
UNSPEC_VSIBADDR address.
(*avx2_gathersi<mode>, *avx2_gatherdi<mode>, *avx2_gatherdi<mode>256):
Adjust insns to use MEM with UNSPEC_VSIBADDR address.
* gcc.target/i386/avx2-i32gatherd-1.c: Adjust scan-assembler regex
to work also with -masm=intel and additionally test the xmm vs. ymm
register type combination on mask/dest and in vsib.
* gcc.target/i386/avx2-i32gatherd256-1.c: Likewise.
* gcc.target/i386/avx2-i32gatherd256-3.c: Likewise.
* gcc.target/i386/avx2-i32gatherd-3.c: Likewise.
* gcc.target/i386/avx2-i32gatherpd-1.c: Likewise.
* gcc.target/i386/avx2-i32gatherpd256-1.c: Likewise.
* gcc.target/i386/avx2-i32gatherpd256-3.c: Likewise.
* gcc.target/i386/avx2-i32gatherpd-3.c: Likewise.
* gcc.target/i386/avx2-i32gatherps-1.c: Likewise.
* gcc.target/i386/avx2-i32gatherps256-1.c: Likewise.
* gcc.target/i386/avx2-i32gatherps256-3.c: Likewise.
* gcc.target/i386/avx2-i32gatherps-3.c: Likewise.
* gcc.target/i386/avx2-i32gatherq-1.c: Likewise.
* gcc.target/i386/avx2-i32gatherq256-1.c: Likewise.
* gcc.target/i386/avx2-i32gatherq256-3.c: Likewise.
* gcc.target/i386/avx2-i32gatherq-3.c: Likewise.
* gcc.target/i386/avx2-i64gatherd-1.c: Likewise.
* gcc.target/i386/avx2-i64gatherd256-1.c: Likewise.
* gcc.target/i386/avx2-i64gatherd256-3.c: Likewise.
* gcc.target/i386/avx2-i64gatherd-3.c: Likewise.
* gcc.target/i386/avx2-i64gatherpd-1.c: Likewise.
* gcc.target/i386/avx2-i64gatherpd256-1.c: Likewise.
* gcc.target/i386/avx2-i64gatherpd256-3.c: Likewise.
* gcc.target/i386/avx2-i64gatherpd-3.c: Likewise.
* gcc.target/i386/avx2-i64gatherps-1.c: Likewise.
* gcc.target/i386/avx2-i64gatherps256-1.c: Likewise.
* gcc.target/i386/avx2-i64gatherps256-3.c: Likewise.
* gcc.target/i386/avx2-i64gatherps-3.c: Likewise.
* gcc.target/i386/avx2-i64gatherq-1.c: Likewise.
* gcc.target/i386/avx2-i64gatherq256-1.c: Likewise.
* gcc.target/i386/avx2-i64gatherq256-3.c: Likewise.
* gcc.target/i386/avx2-i64gatherq-3.c: Likewise.
Tom de Vries [Wed, 26 Oct 2011 09:33:49 +0000 (09:33 +0000)]
re PR tree-optimization/50763 (ICE: verify_gimple failed: missing PHI def with -ftree-tail-merge)
2011-10-26 Tom de Vries <tom@codesourcery.com>
PR tree-optimization/50763
* tree-ssa-tail-merge.c (replace_block_by): Update vops if phi_vuse1 or
phi_vuse2 is NULL_TREE only if bb1 dominates or is dominated by bb2.
Richard Guenther [Wed, 26 Oct 2011 09:30:29 +0000 (09:30 +0000)]
re PR driver/41844 (lto1: warning: unknown register name: line-length-none)
2011-10-26 Richard Guenther <rguenther@suse.de>
PR lto/41844
* Makefile.in (lto-wrapper): Depend on and link against
opts-common.o.
(lto-wrapper.o): Depend on $(OPTS_H) and $(OPTIONS_H).
* lto-wrapper.c (get_options_from_collect_gcc_options): New function.
(run_gcc): Use it. Filter out language specific options.
These can be generated by vec_perm_const now. We could keep the
patterns around, as technically it may be less work, but this
exercises a code path needed by less primary platforms.
rs6000: Remove some vec_extract_even/odd expanders.
The ones that expand to VPERM can be handled by generic code.
The even v4si and v4sf expanders remain until vector.md can be
updated to not invoke them directly.
The can_vec_perm_p interface changed to use a C integer array. This
allows easy re-use from the rtl level and the gimple level within
the vectorizer. It allows both to determine if a given permutation
is (un-)supported without having to create tree/rtl garbage.
The expand_vec_perm interface changed to use rtl. This allows easy
re-use from the rtl level, so that expand_vec_perm can be used in the
fallback implementation of other optabs.
* target.def (vec_perm_const_ok): Change parameters to mode and
array of indicies.
* doc/tm.texi: Rebuild.
* config/i386/i386.c (ix86_vectorize_vec_perm_const_ok): Change
parameters to mode and array of indicies.
* expr.c (expand_expr_real_2) [VEC_PERM_EXPR]: Expand operands here.
* optabs.c (can_vec_perm_p): Rename from can_vec_perm_expr_p.
Change parameters to mode and array of indicies.
(expand_vec_perm_1): Rename from expand_vec_perm_expr_1.
(expand_vec_perm): Rename from expand_vec_perm_expr. Change
parameters to mode and rtx inputs. Try lowering to QImode
vec_perm_const before trying fully variable permutation.
* optabs.h: Update decls.
* tree-vect-generic.c (lower_vec_perm): Extract array of indices from
VECTOR_CST to pass to can_vec_perm_p.
* tree-vect-slp.c (vect_get_mask_element): Change mask parameter type
from int pointer to unsigned char pointer.
(vect_transform_slp_perm_load): Update for change to can_vec_perm_p.
* tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
Jonathan Wakely [Tue, 25 Oct 2011 20:56:43 +0000 (20:56 +0000)]
re PR libstdc++/50862 (deadlock in std::condition_variable_any)
PR libstdc++/50862
* include/std/condition_variable (condition_variable_any::wait): Fix
deadlock and ensure _Lock::lock() is called on exit.
(condition_variable_any::native_handle): Remove, as per LWG 1500.
* testsuite/30_threads/condition_variable_any/50862.cc: New.
Jason Merrill [Tue, 25 Oct 2011 18:24:28 +0000 (14:24 -0400)]
re PR c++/50866 (ICE in verify_gimple_stmt, at tree-cfg.c:4175)
PR c++/50866
PR c++/41449
* semantics.c (maybe_cleanup_point_expr_void): No longer static.
* typeck2.c (split_nonconstant_init_1): Use it.
* cp-tree.h: Declare it.
* decl.c (wrap_cleanups_r): Stop at CLEANUP_POINT_EXPR.
Dodji Seketeli [Tue, 25 Oct 2011 08:58:54 +0000 (08:58 +0000)]
Support expansion of reserved locations wrapped in virtual locations
libcpp/
* include/line-map.h (linemap_expand_location): Take a line table
parameter. Update comment.
(linemap_resolve_location): Update comment.
(linemap_expand_location_full): Remove.
* line-map.c (linemap_resolve_location): Handle reserved
locations; return a NULL map in those cases.
(linemap_expand_location): If location is reserved, return a
zeroed expanded location. Update comment. Take a line table to
assert that the function takes non-virtual locations only.
(linemap_expand_location_full): remove.
(linemap_dump_location): Handle the fact that
linemap_resolve_location can return NULL line maps when the
location resolves to a reserved location.
gcc/
* input.c (expand_location): Rewrite using
linemap_resolve_location and linemap_expand_location. Add a
comment.
Jakub Jelinek [Tue, 25 Oct 2011 08:02:08 +0000 (10:02 +0200)]
re PR tree-optimization/50596 (Problems in vectorization of condition expression)
PR tree-optimization/50596
* tree-vect-stmts.c (vect_mark_relevant): Only use
FOR_EACH_IMM_USE_FAST if lhs is SSA_NAME.
(vectorizable_store): If is_pattern_stmt_p look through
VIEW_CONVERT_EXPR on lhs.
* tree-vect-patterns.c (check_bool_pattern, adjust_bool_pattern):
Use unsigned type instead of signed.
(vect_recog_bool_pattern): Optimize also stores into bool memory in
addition to casts from bool to integral types.
(vect_mark_pattern_stmts): If pattern_stmt already has vinfo
created, don't create it again.
Jonathan Wakely [Mon, 24 Oct 2011 23:26:25 +0000 (23:26 +0000)]
re PR libstdc++/49894 ([C++0x] Uniform initialization in constructor)
PR libstdc++/49894
* include/std/mutex (__mutex_base,__recursive_mutex_base): Define new
base classes to manage construction/destruction of native mutexes,
using NSDMI when INIT macros are defined.
(mutex,recursive_mutex,timed_mutex,recursive_timed_mutex): Derive from
new base classes.
* include/std/condition_variable (condition_variable): Use NSDMI when
INIT macro is defined. Use noexcept.
* src/condition_variable.cc (condition_variable): Explicitly-default
constructor/destructor when using NSDMI. Use noexcept.
(condition_variable_any): Likewise.
David S. Miller [Mon, 24 Oct 2011 21:53:38 +0000 (21:53 +0000)]
Consolidate some sparc insn patterns using "enabled".
* config/sparc/sparc.md (cpu_feature, enabled): New attributes.
(*movsi_insn_novis3, *movsi_insn_vis3): Consolidate into one pattern
called *movsi_insn.
(*movdi_insn_sp32_v9_novis3, *movdi_insn_sp32_v9_vis3): Consolidate
into *movdi_insn_sp32.
(*movdi_insn_sp64_novis3, *movdi_insn_sp64_vis3): Consolidate into
one pattern called *movdi_insn_sp64.
(*movsf_insn_novis3, *movsf_insn_vis3, *movsf_insn_no_fpu):
Consolidate into one pattern called *movsf_insn.
(*movdf_insn_sp32_no_fpu, *movdf_insn_sp32_v9_novis3,
*movdf_insn_sp32_v9_vis3, *movdf_insn_sp32_v9_no_fpu): Consolidate
into *movdf_insn_sp32.
(*movdf_insn_sp64_novis3, *movdf_insn_sp64_vis3,
*movdf_insn_sp64_no_fpu): Consolidate into one pattern called
*movdf_insn_sp64.
(*zero_extendsidi2_insn_sp64_novis3,
*zero_extendsidi2_insn_sp64_vis3): Consolidate into one pattern
called *zero_extendsidi2_insn_sp64.
(*sign_extendsidi2_insn_novis3, *sign_extendsidi2_insn_vis3):
Consolidate into one pattern named *sign_extendsidi2_insn.
(*mov<VM32:mode>_insn_novis3, *mov<VM32:mode>_insn_vis3):
Consolidate into one pattern named *mov<VM32:mode>_insn.
(*mov<VM64:mode>_insn_sp64_novis3,
*mov<VM64:mode>_insn_sp64_novis3): Consolidate into one pattern
named *mov<VM64:mode>_insn_sp64.
(*mov<VM64:mode>_insn_sp32_novis3,
*mov<VM64:mode>_insn_sp32_vis3): Consolidate into one pattern
named *mov<VM64:mode>_insn_sp32.
Andreas Krebbel [Mon, 24 Oct 2011 20:14:35 +0000 (20:14 +0000)]
tree-ssa-strlen.c (get_string_length): Change assertion to STPCPY.
2011-10-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* tree-ssa-strlen.c (get_string_length): Change assertion to STPCPY.
(zero_length_string): Change assertion to accept strinfo without
length but with stmt instead.
Set the endptr pointer also if starting a new chain.
(adjust_related_strinfos): Ignore strinfos marked for delayed
length computation.
(handle_builtin_strcpy): Mark earlier strinfo elements also for
delayed length computation.
2011-10-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gcc.dg/strlenopt-22.c: New testcase.
* gcc.dg/strlenopt-4.c: Change scan value for s390(x).
Georg-Johann Lay [Mon, 24 Oct 2011 14:49:47 +0000 (14:49 +0000)]
re PR target/50820 ([avr] Use EIND consistently)
PR target/50820
Port from 4.6 branch r180379
* doc/invoke.texi (AVR Options): New subsubsection to explain EIND
handling and indirect jump/calls on devices > 128k.
Anatoly Sokolov [Mon, 24 Oct 2011 14:45:51 +0000 (18:45 +0400)]
re PR target/49824 ([avr] Missing documentation for OS_task and OS_main attributes)
PR target/49824
* doc/extend.texi (Declaring Attributes of Functions):
Document OS_main and OS_task attributes.
(Specifying Attributes of Variables): Move up
subsection "AVR Variable Attributes" as of alphabetical order.
* gnat_rm.texi Add an entry for restriction No_Finalization.
2011-10-24 Ed Schonberg <schonberg@adacore.com>
* sem_ch12.adb (Insert_Freeze_Node_For_Instance): If the
current instance is within the one that contains the generic,
the freeze node for the current one must appear in the current
declarative part. Ditto if the current instance is within another
package instance. In both of these cases the freeze node of the
previous instance is not relevant.
2011-10-24 Gary Dismukes <dismukes@adacore.com>
* switch-m.adb (Normalize_Compiler_Switches): Add recognition
of AAMP-specific switches -univ and -aamp_target.
2011-10-24 Robert Dewar <dewar@adacore.com>
* a-tienau.adb (Put): Deal properly with limited line length.
Arnaud Charlet [Mon, 24 Oct 2011 09:51:42 +0000 (11:51 +0200)]
[multiple changes]
2011-10-24 Ed Schonberg <schonberg@adacore.com>
* sem_ch12.adb (Earlier): make available globally. If both
nodes have the same sloc, the freeze node that does not come
from source is the later one.
(True_Parent): Make available globally.
(Previous_Instance): Subsidiary of
Insert_Freeze_Node_For_Instance, to check whether the generic
parent of the current instance is declared within a previous
instance in the same unit or declarative part, in which case the
freeze nodes of both instances must appear in order to prevent
elaboration problems in gigi.
* sem_ch12.adb (Insert_Freeze_Node_For_Instance): A stub is a
freeze point, and the freeze node of a preceding instantiation
must be inserted before it.
2011-10-24 Robert Dewar <dewar@adacore.com>
* checks.ads, checks.adb: Add handling of Synchronization_Check
* debug.adb: Add doc for -gnatd.d and -gnatd.e (disable/enable
atomic sync).
* exp_ch2.adb (Expand_Entity_Reference): Set Atomic_Sync_Required
flag Minor code reorganization.
* opt.ads (Warn_On_Atomic_Synchronization): New switch.
* par-prag.adb: Add dummy entries for pragma
Disable/Enable_Atomic_Synchronization.
* sem_prag.adb (Process_Suppress_Unsuppress): Handle
case of Atomic_Synchronization specially (not suppressed
by All_Checks, cannot be set from Source).
(Pragma Disable/Enable_Atomic_Synchronization): Add processing.
* sinfo.ads, sinfo.adb: Add Atomic_Sync_Required flag
* snames.ads-tmpl: Add entry for Atomic_Synchronization Add
entry for pragma Disable/Enable_Atomic_Synchronization
* switch-c.adb: The -gnatp switch does not disable
Atomic_Synchronization Add -gnatep switch to disable
Atomic_Synchronization.
* types.ads: Add entry for Synchronization_Check
* usage.adb: Add line for -gnated switch
* warnsw.adb: Settings for Warn_On_Atomic_Synchronization
Georg-Johann Lay [Mon, 24 Oct 2011 09:39:09 +0000 (09:39 +0000)]
avr.c: Break long lines.
* config/avr/avr.c: Break long lines.
Define target hooks on the fly if applicable.
(TARGET_ASM_FUNCTION_RODATA_SECTION): Remove first definition
overridden later.
(targetm): Move definition to end of file.
(avr_can_eliminate): Make static on the fly.
(avr_frame_pointer_required_p): Ditto.
(avr_hard_regno_scratch_ok): Ditto.
(avr_builtin_setjmp_frame_value): Make static on the fly.
Indent according to coding rules.
(avr_case_values_threshold): Ditto.
(avr_attribute_table): Move down.
Arnaud Charlet [Mon, 24 Oct 2011 09:28:21 +0000 (11:28 +0200)]
[multiple changes]
2011-10-24 Emmanuel Briot <briot@adacore.com>
* prj-proc.adb (Process_Expression_Variable_Decl): No special
handling for Project_Path unless it is an attribute.
2011-10-24 Javier Miranda <miranda@adacore.com>
* sem_ch12.adb (Check_Hidden_Primitives): New subprogram.
(Install_Hidden_Primitives): New subprogram.
(Restore_Hidden_Primitives): New subprogram.
(Analyze_Formal_Package_Declaration,
Analyze_Package_Instantiation, Analyze_Subprogram_Instantiation):
Invoke Check_Hidden_Primitives after every call to
Analyze_Associations, and invoke Restore_Hidden_Primitives to
restore their visibility after processing the instantiation.
(Instantiate_Package_Body): Install visible primitives before
analyzing the instantiation and uninstall them to restore their
visibility when the instantiation has been analyzed.
* sem_util.ads, sem_util.adb (Add_Suffix): New subprogram
(Remove_Suffix): New subprogram
* sem_ch3.adb (Derive_Subprogram): When handling
a derived subprogram for the instantiation of a formal derived
tagged type, inherit the dispatching attributes from the actual
subprogram (not from the parent type).
* exp_ch3.adb (Build_Assignment): Add local constant N_Loc and
update its uses.
(Build_Discriminant_Assignments): Add local variable D_Loc and update
its uses.
(Build_Init_Statements): Add local variables Comp_Loc, Decl_Loc and
Var_Loc and update their uses.
(Build_Record_Init_Proc): Code reformatting.
(Increment_Counter): Add formal parameter Loc.
(Make_Counter): Add formal parameter Loc.
2011-10-24 Eric Botcazou <ebotcazou@adacore.com>
* sem_disp.adb (Covers_Some_Interface): Fix typo.
2011-10-24 Matthew Heaney <heaney@adacore.com>
* a-cuprqu.adb, a-cbprqu.adb (Dequeue_Only_High_Priority):
Predicate had wrong sense.
2011-10-24 Yannick Moy <moy@adacore.com>
* sem_ch13.adb (Analyze_Aspect_Specifications/Aspect_Test_Case):
Translate arguments in positional notation into pragma argument
association arguments for the generated pragma.
2011-10-24 Arnaud Charlet <charlet@adacore.com>
* exp_ch5.adb: Fix minor typo.
2011-10-24 Ed Schonberg <schonberg@adacore.com>
* sem_ch3.adb (Is_Visible_Component): Refine predicate for
the case of a component reference in an instance body, when the
enclosing type is private.
* s-finmas.adb (Attach): Synchronize and call the unprotected version.
(Attach_Unprotected): New routine.
(Delete_Finalize_Address): Removed.
(Delete_Finalize_Address_Unprotected): New routine.
(Detach): Synchronize and call the unprotected version.
(Detach_Unprotected): Remove locking.
(Finalize): Add various comment on synchronization. Lock the critical
region and call the unprotected versions of routines.
(Finalize_Address): Removed.
(Finalize_Address_Unprotected): New routine.
(Set_Finalize_Address): Synchronize and call
the unprotected version.
(Set_Finalize_Address_Unprotected): New routine.
(Set_Heterogeneous_Finalize_Address): Removed.
(Set_Heterogeneous_Finalize_Address_Unprotected): New routine.
(Set_Is_Heterogeneous): Add comment on synchronization and
locking.
* s-finmas.ads: Flag Finalization_Started is no longer atomic
because synchronization uses task locking / unlocking.
(Attach): Add comment on usage.
(Attach_Unprotected): New routine.
(Delete_Finalize_Address): Renamed to
Delete_Finalize_Address_Unprotected.
(Detach): Add comment on usage.
(Detach_Unprotected): New routine.
(Finalize_Address): Renamed to Finalize_Address_Unprotected.
(Set_Finalize_Address): Add comment on usage.
(Set_Finalize_Address_Unprotected): New routine.
(Set_Heterogeneous_Finalize_Address): Renamed to
Set_Heterogeneous_Finalize_Address_Unprotected.
* s-stposu.adb (Allocate_Any_Controlled): Add local variable
Allocation_Locked. Add various comments on synchronization. Lock
the critical region and call the unprotected version of
routines.
(Deallocate_Any_Controlled): Add various comments on
synchronization. Lock the critical region and call the unprotected
version of routines.
2011-10-24 Ed Schonberg <schonberg@adacore.com>
* sem_ch3.adb (Set_Fixed_Range): The bounds of a fixed point type
are universal and must carry the corresponding type.
* sem_eval.adb (Check_Non_Static_Context): If the type of the
expression is universal real, as may be the case for a fixed point
expression with constant operands in the context of a conversion,
there is nothing to check.
* s-finmas.adb: Minor reformatting
David S. Miller [Mon, 24 Oct 2011 04:15:46 +0000 (04:15 +0000)]
Fix sol2 sparc -mv8 regression.
* config/sparc/sparc.c (sparc_option_override): Remove -mv8plus
cpu adjustment.
* config/sparc/linux64.h (CC1_SPEC): When defaulting to 64-bit,
append -mcpu=v9 when -mv8plus is given.
David S. Miller [Mon, 24 Oct 2011 03:51:47 +0000 (03:51 +0000)]
Add support for sparc VIS3 fp<-->int moves.
* config/sparc/sparc.h (SECONDARY_MEMORY_NEEDED): We can move
between float and non-float regs when VIS3.
* config/sparc/sparc.c (eligible_for_restore_insn): We can't
use a restore when the source is a float register.
(sparc_split_regreg_legitimate): When VIS3 allow moves between
float and integer regs.
(sparc_register_move_cost): Adjust to account for VIS3 moves.
(sparc_preferred_reload_class): On 32-bit with VIS3 when moving an
integer reg to a class containing EXTRA_FP_REGS, constrain to
FP_REGS.
(sparc_secondary_reload): On 32-bit with VIS3 when moving between
float and integer regs we sometimes need a FP_REGS class
intermediate move to satisfy the reload. When this happens
specify an extra cost of 2.
(*movsi_insn): Rename to have "_novis3" suffix and add !VIS3
guard.
(*movdi_insn_sp32_v9): Likewise.
(*movdi_insn_sp64): Likewise.
(*movsf_insn): Likewise.
(*movdf_insn_sp32_v9): Likewise.
(*movdf_insn_sp64): Likewise.
(*zero_extendsidi2_insn_sp64): Likewise.
(*sign_extendsidi2_insn): Likewise.
(*movsi_insn_vis3): New insn.
(*movdi_insn_sp32_v9_vis3): New insn.
(*movdi_insn_sp64_vis3): New insn.
(*movsf_insn_vis3): New insn.
(*movdf_insn_sp32_v9_vis3): New insn.
(*movdf_insn_sp64_vis3): New insn.
(*zero_extendsidi2_insn_sp64_vis3): New insn.
(*sign_extendsidi2_insn_vis3): New insn.
(TFmode reg/reg split): Make sure both REG operands are float.
(*mov<VM32:mode>_insn): Add "_novis3" suffix and !VIS3 guard. Remove
easy constant to integer reg alternatives.
(*mov<VM64:mode>_insn_sp64): Likewise.
(*mov<VM64:mode>_insn_sp32_novis3): Likewise.
(*mov<VM32:mode>_insn_vis3): New insn.
(*mov<VM64:mode>_insn_sp64_vis3): New insn.
(*mov<VM64:mode>_insn_sp32_vis3): New insn.
(VM64 reg<-->reg split): New spliiter for 32-bit.