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4 weeks agoada: Update the message for -gnatwx switch
Viljar Indus [Thu, 5 Jun 2025 12:06:26 +0000 (15:06 +0300)] 
ada: Update the message for -gnatwx switch

Some messages triggered by this switch did not have the
gnatwx tag and were not treated as a continuation of the same
error message.

gcc/ada/ChangeLog:

* freeze.adb (Freeze_Profile): Improve -gnatwx message.

4 weeks agoada: Remove suspicious entries generated by -gnatR for generic formal types
Eric Botcazou [Mon, 10 Nov 2025 11:44:47 +0000 (12:44 +0100)] 
ada: Remove suspicious entries generated by -gnatR for generic formal types

Generic formal type parameters may have an unspecified layout when they are
processed for the -gnatR output, so it's better to skip them entirely.

The change also reverts an earlier change that would output "??" for an
unknown alignment on a type, which is inconsistent and undocumented.

gcc/ada/ChangeLog:

* repinfo.adb (List_Location): Do not output the final comma.
(List_Common_Type_Info): Adjust to above change.  Do not output
"??" for an unknown alignment.
(List_Entities): Do not output generic types.
(List_Object_Info): Adjust to above change.
(List_Subprogram_Info): Likewise.

4 weeks agoada: Ensure a limited type is marking the packing as used
Viljar Indus [Thu, 16 Jan 2025 19:40:54 +0000 (21:40 +0200)] 
ada: Ensure a limited type is marking the packing as used

gcc/ada/ChangeLog:

* sem_ch4.adb (Analyze_Call): ensure we generate a reference to the
non limited view of the return type to avoid scenarios where
the with-ed unit is not considered referenced.

4 weeks agoipa: Remove LTO requirement for builtin callback carriers.
Josef Melcr [Thu, 20 Nov 2025 22:57:57 +0000 (23:57 +0100)] 
ipa: Remove LTO requirement for builtin callback carriers.

Due to the if statement in ipa_compute_jump_functions_for_bb, callback
edges were never constructed for builtin functions unless LTO was
enabled.  This patch corrects this behavior, allowing GCC to optimize
callbacks more broadly.  It also extends our testing capabilities.

gcc/ChangeLog:

* attr-callback.cc (callback_edge_callee_has_attr): New
function.
* attr-callback.h (callback_edge_callee_has_attr): New function
decl.
* ipa-prop.cc (ipa_compute_jump_functions_for_bb): Don't skip
callback carriers when calculating jump functions.

libgomp/ChangeLog:

* testsuite/libgomp.c/ipcp-cb-spec1.c: Remove LTO requirement.
* testsuite/libgomp.c/ipcp-cb-spec2.c: Likewise.
* testsuite/libgomp.c/ipcp-cb1.c: Likewise.

Signed-off-by: Josef Melcr <josef.melcr@suse.com>
4 weeks agoipa: Rewrite callback_edge_useful_p heuristic.
Josef Melcr [Thu, 20 Nov 2025 22:46:38 +0000 (23:46 +0100)] 
ipa: Rewrite callback_edge_useful_p heuristic.

This function is used to determine whether a callback edge should be
kept or not.  It was supposed to capture the idea that a callback edge
has been redirected at some point, however, it only considered
redirecting to some clone.  However, an edge may not always be
redirected to a clone.  For example, common function bodies produced by
icf are not clones.  This version of this function should cover all
cases, at least for the time being.

gcc/ChangeLog:

PR ipa/122768
* attr-callback.cc (callback_edge_useful_p): Rewrite the
heuristic, now consider clones as well as icf bodies.

Signed-off-by: Josef Melcr <josef.melcr@suse.com>
4 weeks agoLoongArch: Add more numbers supported for {x}vldi
Deng Jianbo [Mon, 17 Nov 2025 07:28:19 +0000 (15:28 +0800)] 
LoongArch: Add more numbers supported for {x}vldi

When the most significant bit of the 13 bit immediate value in LoongArch
{x}vldi isntruction is set 1, it can generate different numbers based on
the algorithm.  This patch adds to support these numbers to be
generated by {x}vldi instruction.

gcc/ChangeLog:

* config/loongarch/constraints.md: Update constraint YI to support
more numbers.
* config/loongarch/loongarch-protos.h
(loongarch_const_vector_vrepli): Rename.
(loongarch_const_vector_vldi): Ditto.
* config/loongarch/loongarch.cc (VLDI_NEG_MASK): New macro.
(loongarch_parse_vldi_const): New function to check if numbers can
be generated by {x}vldi instruction.
(loongarch_const_vector_vrepli): Rename.
(loongarch_const_vector_vldi): Use above function.
(loongarch_const_insns): Call renamed function.
(loongarch_split_vector_move_p): Ditto.
(loongarch_output_move): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-builtin.c: Replace xvrepli
with xvldi.
* gcc.target/loongarch/vector/lasx/lasx-vec-init-2.c: Fix test.
* gcc.target/loongarch/vector/lsx/lsx-builtin.c: Repalce vrepli with
vldi.
* gcc.target/loongarch/vrepli.c: Ditto.
* gcc.target/loongarch/vector/lasx/lasx-xvldi-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vldi-2.c: New test.

4 weeks agoLoongArch: Fix operands[2] predicate of lsx_vreplvei_mirror.
zhaozhou [Fri, 14 Nov 2025 03:09:13 +0000 (11:09 +0800)] 
LoongArch: Fix operands[2] predicate of lsx_vreplvei_mirror.

UNSPEC_LSX_VREPLVEI_MIRROR describes the mirroring operation that copies
the lower 64 bits of a 128-bit register to the upper 64 bits. So in any
mode, the value range of op2 can only be 0 or 1 for the vreplvei.d insn.

gcc/ChangeLog:

* config/loongarch/lsx.md: Fix predicate.

4 weeks agoDaily bump.
GCC Administrator [Fri, 21 Nov 2025 00:16:54 +0000 (00:16 +0000)] 
Daily bump.

4 weeks agoImprove PHI analyzer performance
Andrew MacLeod [Thu, 20 Nov 2025 17:10:25 +0000 (12:10 -0500)] 
Improve PHI analyzer performance

Only do iterative analysis if it might be worthwhile.

PR tree-optimization/121345
gcc/
* gimple-range-phi.cc (phi_group::calculate_using_modifier): Restore
performance loss by being more selective when iterating.

4 weeks agolibstdc++: [_GLIBCXX_DEBUG] Fix std::erase_if behavior for __gnu_debug::vector
François Dumont [Thu, 20 Nov 2025 06:01:53 +0000 (07:01 +0100)] 
libstdc++: [_GLIBCXX_DEBUG] Fix std::erase_if behavior for __gnu_debug::vector

When using directly __gnu_debug::vector the std::erase_if is called with a
reference to the std::vector base class and so is missing the invalidation
of the iterators implied by this operation.

To fix this provide a std::erase_if overload dedicated to __gnu_debug::vector.
Doing so we can cleanup the implementation dedicated to std::vector from any
_GLIBCXX_DEBUG consideration.

libstdc++-v3/ChangeLog:

* include/debug/vector (std::erase_if, std::erase): New overloads for
std::__debug::vector instances.
* include/std/vector (std::erase_if, std::erase): Make overloads specific
to normal std::vector implementation.
* testsuite/23_containers/vector/debug/erase.cc: New test case.
* testsuite/23_containers/vector/debug/invalidation/erase.cc: New test case.

4 weeks agoMAINTAINERS: Add myself in forge integration maintainers
Claudio Bantaloukas [Thu, 20 Nov 2025 16:34:27 +0000 (16:34 +0000)] 
MAINTAINERS: Add myself in forge integration maintainers

ChangeLog:

* MAINTAINERS:  Add myself in forge integration maintainers

4 weeks agolibstdc++: Prepare mdspan-related code for submdspan.
Luc Grosheintz [Tue, 18 Nov 2025 14:24:52 +0000 (15:24 +0100)] 
libstdc++: Prepare mdspan-related code for submdspan.

The changes needed for submdspan are:

  * In submdspan related code the user-defined integer-like
    types need to be copy- and move-constructable.

  * The traits for writing tests that work with both left- and right,
    possibly padded, layouts will also be useful for submdspan.
    Therefore, this code is moved up and generalized.

  * Move __offset further up in <mdspan> and fix some formatting
    mistakes.

libstdc++-v3/ChangeLog:

* include/std/mdspan: Improve formatting and placement.
* testsuite/23_containers/mdspan/int_like.h: Optionally,
add move- and copy-ctors.
* testsuite/23_containers/mdspan/layouts/padded_traits.h: Move to...
* testsuite/23_containers/mdspan/layout_traits.h: ...here.
* testsuite/23_containers/mdspan/layouts/ctors.cc: Fix include.
* testsuite/23_containers/mdspan/layouts/mapping.cc: Ditto.
* testsuite/23_containers/mdspan/layouts/padded.cc: Ditto.
* testsuite/23_containers/mdspan/layouts/padded_neg.cc: Ditto.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
Signed-off-by: Luc Grosheintz <luc.grosheintz@gmail.com>
4 weeks agolibstdc++: Add constexpr to operator delete in 18_support/headers/new/synopsis.cc
Jonathan Wakely [Thu, 20 Nov 2025 16:13:14 +0000 (16:13 +0000)] 
libstdc++: Add constexpr to operator delete in 18_support/headers/new/synopsis.cc

r16-5411-g5294e0a0b40674 made the "placement delete" functions noexcept,
so adjust the header synopsis test.

libstdc++-v3/ChangeLog:

* testsuite/18_support/headers/new/synopsis.cc: Add constexpr to
placement delete for C++26 and up.

4 weeks agoRISC-V: Add RTL pass to combine cm.popret with zero return value
Kito Cheng [Wed, 5 Nov 2025 09:55:39 +0000 (17:55 +0800)] 
RISC-V: Add RTL pass to combine cm.popret with zero return value

This patch implements a new RTL pass that combines "li a0, 0" and
"cm.popret" into a single "cm.popretz" instruction for the Zcmp
extension.

This optimization cannot be done during prologue/epilogue expansion
because it would cause shrink-wrapping to generate incorrect code as
documented in PR113715. The dedicated RTL pass runs after shrink-wrap
but before branch shortening, safely performing this combination.

Changes since v2:
- Apply Jeff's comment
  - Use CONST0_RTX rather than const0_rtx, this make this pass able to
    handle (const_double:SF 0.0) as well.
- Adding test case for float/double zero return value.
Changes since v1:
- Tweak the testcase.

gcc/ChangeLog:

* config/riscv/riscv-opt-popretz.cc: New file.
* config/riscv/riscv-passes.def: Insert pass_combine_popretz before
pass_shorten_branches.
* config/riscv/riscv-protos.h (make_pass_combine_popretz): New
declaration.
* config/riscv/t-riscv: Add riscv-opt-popretz.o build rule.
* config.gcc (riscv*): Add riscv-opt-popretz.o to extra_objs.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/pr113715.c: New test.
* gcc.target/riscv/rv32e_zcmp.c: Update expected output for
test_popretz.
* gcc.target/riscv/rv32i_zcmp.c: Likewise.

4 weeks ago[PATCH v1] RISC-V: Fix missed zero extend for unsigned scalar SAT_TRUNC [PR122692]
Pan Li [Thu, 20 Nov 2025 15:16:10 +0000 (08:16 -0700)] 
[PATCH v1] RISC-V: Fix missed zero extend for unsigned scalar SAT_TRUNC [PR122692]

When the input of the scalar unsigned SAT_TRUNC is not Xmode,
the rtx need to zero extend to Xmode before the underlying
code gen.  Most of other SAT_* code gen has leveraged
the API riscv_extend_to_xmode_reg but still have the ustrunc
missed.  Then results in the failures mentioned in PR.

The below test suites are passed for this patch series.
* The rv64gcv fully regression test.

PR target/122692

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_expand_ustrunc): Leverage
riscv_extend_to_xmode_reg to take care of src rtx.

gcc/testsuite/ChangeLog:

* g++.target/riscv/pr122692-run-1.C: New test.
* g++.target/riscv/pr122692-run-2.C: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
4 weeks agomiddle-end: add target hook for isel
Tamar Christina [Thu, 20 Nov 2025 14:14:59 +0000 (14:14 +0000)] 
middle-end: add target hook for isel

This adds a new target hook to gimple-sel to allow targets to
do target specific massaging of the gimple IL to prepare for
expand.

Tejas will be sending up part 2 of this soon to help convert
SVE packed boolean VEC_COND_EXPR into something that we can
handle more efficiently if expanded in a different order.

We also want to use this to e.g. for Adv. SIMD prefer avoiding
!= vector compare expressions because the ISA doesn't have
this instruction and so we expand to == + ~ but changing the
expression from a MIN to MAX only for VECTOR_BOOLEAN_TYPE_P
and flipping the operands we can expand more efficient.

These are the kind of things we want to use the hook for,
not generic changes that apply to all target.

gcc/ChangeLog:

* target.def (instruction_selection): New.
* doc/tm.texi.in: Document it.
* doc/tm.texi: Regenerate
* gimple-isel.cc (pass_gimple_isel::execute): Use it.
* targhooks.cc (default_instruction_selection): New.
* targhooks.h (default_instruction_selection): New.

4 weeks agoipa: Add early return when the hashed edge is a callback-carrying edge.
Josef Melcr [Thu, 20 Nov 2025 12:32:45 +0000 (13:32 +0100)] 
ipa: Add early return when the hashed edge is a callback-carrying edge.

The inclusion of this early return statement has been discussed before,
it was ultimately left out of the original patch, but it turns out to be
necessary.

When a callback edge is being created, it is first created by
symbol_table::create_edge, which is where it is added to the call site
hash.  However, its callback flag is not set at that point, so the early
return for callback edges doesn't affect it.  This causes the wrong edge
to be hashed, ultimately leading to segfaults and ICEs. This happens
many times in the testsuite, the one I noticed first was
libgomp.fortran/simd7.f90.

gcc/ChangeLog:

PR ipa/122358
* cgraph.cc (cgraph_add_edge_to_call_site_hash): Add an early
return when the hashed edge is a callback-carrying edge.

Signed-off-by: Josef Melcr <josef.melcr@suse.com>
4 weeks agoMAINTAINERS: Update my email address.
Josef Melcr [Thu, 20 Nov 2025 12:37:13 +0000 (13:37 +0100)] 
MAINTAINERS: Update my email address.

ChangeLog:

* MAINTAINERS: Update my email address.

Signed-off-by: Josef Melcr <josef.melcr@suse.com>
4 weeks agogcc/doc: Fix usages of @itemize with named items in Regs and Memory
Arsen Arsenović [Thu, 20 Nov 2025 11:17:38 +0000 (12:17 +0100)] 
gcc/doc: Fix usages of @itemize with named items in Regs and Memory

The old usage lead to makeinfo emitting text like "pseudo registers This
is the most common case. Most subregs have pseudo regs as their first
operand." when, clearly, "pseudo registers" was intended to be the name
of an item, and the rest of the paragraph a description.  This is
because @itemize was used, which does not support "naming" items.

Now, the paragraph used as an example above looks like this:

  pseudo registers
       This is the most common case.  Most ‘subreg’s have pseudo
       ‘reg’s as their first operand.

gcc/ChangeLog:

* doc/rtl.texi (Regs and Memory): Use @table instead of @itemize
for lists with named items.

4 weeks agoMAINTAINERS: update my email
Arsen Arsenović [Thu, 20 Nov 2025 10:52:14 +0000 (11:52 +0100)] 
MAINTAINERS: update my email

ChangeLog:

* MAINTAINERS: Update my email.

4 weeks agogcc: check if target install name equals the full driver name
Xinhui Yang [Tue, 11 Nov 2025 02:19:35 +0000 (10:19 +0800)] 
gcc: check if target install name equals the full driver name

When a major version program suffix is specified, along with
--with-gcc-major-version-only, GCC tries to install $TRIPLE-gcc-tmp into
the destination BINDIR and link it to TRIPLE-gcc-SUFFIX. However this
executable is installed in the previous step, thus leaving the gcc-tmp
unmodified.

This is because when --program-suffix=15 (any major version) and
--with-gcc-major-version-only, $(version) will be the major version
number, thus making FULL_DRIVER_NAME and GCC_TARGET_INSTALL_NAME
identical to each other. We check if these two is identical and skip the
latter step if they are.

gcc/
PR bootstrap/105664
* Makefile.in (install-driver): detect name collision when
installing the driver program.

Signed-off-by: Xinhui Yang <cyan@cyano.uk>
4 weeks agoSwitch from USE_GAS/GLD to HAVE_GNU_AS/LD
Rainer Orth [Thu, 20 Nov 2025 09:34:13 +0000 (10:34 +0100)] 
Switch from USE_GAS/GLD to HAVE_GNU_AS/LD

We currently have two ways to distinguish GNU and non-GNU assemblers and
linkers:

* USE_GAS and USE_GLD, defined via gcc/config/usegas.h and usegld.h
  which are included via config.gcc

* HAVE_GNU_AS and HAVE_GNU_LD, determined from gcc/configure.ac

This is confusing and leads to weird mistakes like combining both into
an undefined USE_GNU_LD.  Since both are based on the same info ($gas
resp. $gnu_ld in gcc/configure.ac), it seems best to standardise on one
of them.  Since the USE_* form is almost exclusively used in
Solaris-specific contexts, it's clearer to use the HAVE_GNU_* forms
instead.

This is what this patch does.

Most of the changes are either Solaris-specific or border on obvious.

Outside of Solaris code, there are only two cases:

* gcc/config/ia64/hpux.h has one macro guarded by !USE_GAS.  This wasn't
  defined before since the configuration for this target doesn't include
  usegas.h.  However, the code is still needed, so the HAVE_GNU_AS form is
  now used.

* Uses of usegas.h in various powerpc*-*-* configurations in
  gcc/config.gcc.  Those make no difference since USE_GAS isn't used in any
  of the affected files.

Bootstrapped without regressions on i386-pc-solaris2.11 and
sparc-sun-solaris2.11 (as/ld, gas/ld, and gas/gld configurations).

2025-11-18  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

gcc:
* config/i386/sol2.h: Replace USE_GAS by HAVE_GNU_AS.
Replace USE_GLD by HAVE_GNU_LD.
* config/sol2.h: Likewise.
* config/sparc/sol2.h: Likewise.
* config/i386/i386.cc (i386_solaris_elf_named_section)
[TARGET_SOLARIS]: Replace USE_GAS by HAVE_GNU_AS.
* config/ia64/hpux.h: Likewise.

* config.gcc: Remove usegas.h, usegld.h.
* config/usegas.h: Remove.
* config/usegld.h: Remove

gcc/go:
* gospec.cc (lang_specific_driver) [TARGET_SOLARIS]: Replace
USE_GLD by HAVE_GNU_LD.

4 weeks agodriver: Simplify LINK_ARCH*_SPEC on Solaris
Rainer Orth [Thu, 20 Nov 2025 09:31:56 +0000 (10:31 +0100)] 
driver: Simplify LINK_ARCH*_SPEC on Solaris

The various LINK_ARCH*_SPECs proved to be way more complex than
necessary:

* All uses of -YP,* can just go: they match the Solaris and GNU ld
  defaults.  In addition, the /usr/lib/libp entries are now superfluous:
  they only contain compatiblity symlinks to their counterparts in
  /usr/lib.  The %R parts are superceded by the -z sysroot/--sysroot
  options.

* With those options gone, LINK_ARCH{32,64}_SPEC_BASE are now identical
  and can be merged.

* It's no longer necessary to use arch-specific versions of the Solaris
  ld map.below4G linker map: with the new v2 mapfile syntax a single
  file can be used for all of SPARC, and x86, 32 and 64-bit.

* Similarly, with LINK_ARCH{32,64,DEFAULT}_SPEC being identical, a
  common LINK_ARCH_SPEC can be used with the single difference (erroring
  out on the non-default multilib in non-multilib configurations,
  e.g. -m64 for -m32-only configs) moved to a separate
  LINK_ARCH_ERROR_SPEC.

Bootstrapped without regressions on {i386,amd64}-pc-solaris2.11,
sparc{,v9}-sun-solaris2.11 with as/ld, gas/ld, and gas/gld plus
--disable-multilib builds of those.

2025-11-17  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

gcc:
* config/sol2.h (LINK_ARCH32_SPEC_BASE): Don't provide -YP
defaults.  Rename to ...
(LINK_ARCH_SPEC_BASE): ... this.
(LINK_ARCH32_SPEC): Remove.
(LINK_ARCH64_SPEC_BASE): Remove.
(LINK_ARCH64_SPEC): Rename to ...
(LINK_ARCH_SPEC_1): ... this.
[!USE_GLD]: Simplify map.below4G use.
(LINK_ARCH_ERROR_SPEC): New macro.
(LINK_ARCH32_SPEC): Remove.
(LINK_ARCH_DEFAULT_SPEC): Remove.
(LINK_ARCH_SPEC): Simplify using LINK_ARCH_ERROR_SPEC,
LINK_ARCH_SPEC_1.
(SUBTARGET_EXTRA_SPECS): Remove link_arch32, link_arch64
link_arch_default.

4 weeks agoLoongArch: NFC: Drop loongarch_expand_vec_perm
Xi Ruoyao [Sun, 16 Nov 2025 12:25:58 +0000 (20:25 +0800)] 
LoongArch: NFC: Drop loongarch_expand_vec_perm

This function is just a boring large switch-case which can be replaced
completely with a simple RTL templete in the .md file.

gcc/

* config/loongarch/lsx.md (vec_perm<mode>): Expand directly with
RTL template.
* config/loongarch/loongarch-protos.h
(loongarch_expand_vec_perm): Delete.
* config/loongarch/loongarch.cc (loongarch_expand_vec_perm):
Delete.

4 weeks agoLoongArch: NFC: Simplify logic of vec_perm{v32qi,v16hi}
Xi Ruoyao [Sun, 16 Nov 2025 11:57:35 +0000 (19:57 +0800)] 
LoongArch: NFC: Simplify logic of vec_perm{v32qi,v16hi}

De-duplicate the login by introducing gen_lasx_xvpermi_d (mode, ...)
with "@".  Also remove the merge_two label: we should really not (ab)use
goto when avoiding it is trivial.

Link: https://dl.acm.org/doi/10.5555/1241515.1241518
gcc/

* config/loongarch/lasx.md (lasx_xvpermi_d): Add "@".
* config/loongarch/loongarch.cc (loongarch_expand_vec_perm_1):
Use gen_lasx_xvpermi_d instead of
gen_lasx_xvpermi_d_{v32qi,v16hi} to deduplicate the logic.  Do
structrual programming instead of goto and label.

4 weeks agoLoongArch: Micro-optimize the blend step for vec_perm<LASX>
Xi Ruoyao [Sun, 16 Nov 2025 11:38:02 +0000 (19:38 +0800)] 
LoongArch: Micro-optimize the blend step for vec_perm<LASX>

Clamp the selector using the actual number of elements 2w instead of the
fixed value 0x1f.  So we can simply compare the clamped selector and w
to generate the mask for blending.

gcc/

* config/loongarch/loongarch.cc (loongarch_expand_vec_perm_1):
Clamp the selector using the twice of actual number of elements.
Compare the clamped selector with the element number to get the
blending mask.

4 weeks agoLoongArch: NFC: Move [x]vshuf.* to simd.md
Xi Ruoyao [Sun, 16 Nov 2025 09:43:22 +0000 (17:43 +0800)] 
LoongArch: NFC: Move [x]vshuf.* to simd.md

Prepare to get rid of some long switch-case constructs.

gcc/

* config/loongarch/lasx.md (lasx_xvshuf_b): Remove.
(lasx_xvshuf_<lasxfmt_f): Remove.
(unspec): Remove UNSPEC_LASX_XVSHUF and UNSPEC_LASX_XVSHUF_B.
* config/loongarch/lsx.md (lsx_vshuf_b): Remove.
(lsx_vshuf_<lasxfmt_f): Remove.
(unspec): Remove UNSPEC_LSX_VSHUF and UNSPEC_LSX_VSHUF_B.
* config/loongarch/simd.md (unspec): Add UNSPEC_SIMD_VSHUF.
(@simd_vshuf): New define_insn.
(<simd_isa>_<x>vshuf_<simdfmt><_f>): New define_expand.
* config/loongarch/loongarch.cc
(loongarch_try_expand_lsx_vshuf_const): Call gen_simd_vshuf
instead of gen_lasx_xvshuf and gen_lasx_xvshuf_b.
(loongarch_expand_vec_perm_const): Likewise.

4 weeks agoLoongArch: NFC: Simplify vec_permv8sf logic
Xi Ruoyao [Sun, 16 Nov 2025 09:04:13 +0000 (17:04 +0800)] 
LoongArch: NFC: Simplify vec_permv8sf logic

gcc/

* config/loongarch/lasx.md (lasx_xvperm_<lasxfmt_f_wd>): Add
"@" for gen_lasx_xvperm helper.
* config/loongarch/loongarch.cc (loongarch_expand_vec_perm_1):
Call gen_lasx_xvperm to unify V8SF and V8SI handling.

4 weeks agoLoongArch: Avoid memory load when use xvperm.w for vec_permv4di
Xi Ruoyao [Sun, 16 Nov 2025 08:57:18 +0000 (16:57 +0800)] 
LoongArch: Avoid memory load when use xvperm.w for vec_permv4di

gcc/

* config/loongarch/loongarch.cc (loongarch_expand_vec_perm_1):
Use lasx_xvpackev_h (mask * 2, mask * 2 + 1) to "expand" the
V4DI selector to V8SI.

4 weeks agoLoongArch: Fix wrong code from loongarch_expand_vec_perm_1 [PR 122695]
Xi Ruoyao [Sat, 15 Nov 2025 16:30:43 +0000 (00:30 +0800)] 
LoongArch: Fix wrong code from loongarch_expand_vec_perm_1 [PR 122695]

PR target/122695

gcc/

* config/loongarch/loongarch.cc (loongarch_expand_vec_perm_1):
Simplify and fix the logic preventing the xvshuf.* unpredictable
behavior.

gcc/testsuite/

* gcc.target/loongarch/pr122695-1.c: New test.
* gcc.target/loongarch/pr122695-2.c: New test.

4 weeks agoc++: Fix error recovery ICE in tsubst_baselink [PR120876]
Jakub Jelinek [Thu, 20 Nov 2025 07:19:32 +0000 (08:19 +0100)] 
c++: Fix error recovery ICE in tsubst_baselink [PR120876]

The following testcase ICEs since r12-6080.  The problem is that
lookup_fnfields can return NULL_TREE on failure, but the maybe_incomplete
handling was added before the if (!baselink) handling and assumes that
baselink is non-NULL (and BASELINK).

The following patch reorders the if (maybe_incomplete) handling with
if (!baselink).

2025-11-20  Jakub Jelinek  <jakub@redhat.com>

PR c++/120876
* pt.cc (tsubst_baselink): Move maybe_incomplete handling after
!baselink handling.

* g++.dg/parse/crash81.C: New test.

4 weeks agoc++: Fix error recovery for enums with bad underlying type [PR122540]
Jakub Jelinek [Thu, 20 Nov 2025 06:59:13 +0000 (07:59 +0100)] 
c++: Fix error recovery for enums with bad underlying type [PR122540]

The r16-4698 patch to use fold_convert in finish_enum_value_list instead
of copy_node + set TREE_TYPE caused UB in the compiler as detected e.g.
by valgrind on the g++.dg/parse/pr96442.C g++.dg/cpp0x/auto9.C testcases.
If underlying type is valid, start_enum does:
      else if (CP_INTEGRAL_TYPE_P (underlying_type))
        {
          copy_type_enum (enumtype, underlying_type);
          ENUM_UNDERLYING_TYPE (enumtype) = underlying_type;
        }
and the copy_type_enum ensures the ENUMERAL_TYPE has the same
TYPE_PRECISION, TYPE_SIZE etc.  But if the underlying type is erroneous,
it errors and for error recovery sets
ENUM_UNDERLYING_TYPE (enumtype) = integer_type_node;
This means TYPE_PRECISION on the ENUMERAL_TYPE remains 0, TYPE_SIZE NULL
etc. and then later on when we try to fold_convert the enumerator values
to that type, we invoke UB in the wide_int code because it really doesn't
like casts to 0 precision integral types.

The following patch fixes it by calling also copy_type_enum from
integer_type_node when we set such underlying type.

2025-11-20  Jakub Jelinek  <jakub@redhat.com>

PR c++/122540
* decl.cc (start_enum): When setting ENUM_UNDERLYING_TYPE
to integer_type_node during error recovery, also call copy_type_enum.

4 weeks agoDaily bump.
GCC Administrator [Thu, 20 Nov 2025 00:19:40 +0000 (00:19 +0000)] 
Daily bump.

4 weeks agolibstdc++: Update GCC 16.1 library versions in docs
Jonathan Wakely [Wed, 19 Nov 2025 21:49:35 +0000 (21:49 +0000)] 
libstdc++: Update GCC 16.1 library versions in docs

libstdc++-v3/ChangeLog:

* doc/xml/manual/abi.xml: Add versions for GCC 16.
* doc/html/manual/abi.html: Regenerate.

4 weeks agolibstdc++: Update GCC 15.1 library versions in docs [PR122743]
Jonathan Wakely [Wed, 19 Nov 2025 21:49:35 +0000 (21:49 +0000)] 
libstdc++: Update GCC 15.1 library versions in docs [PR122743]

libstdc++-v3/ChangeLog:

PR libstdc++/122743
* doc/xml/manual/abi.xml: Add versions for GCC 15.
* doc/html/manual/abi.html: Regenerate.

4 weeks agolibstdc++: Remove vertical whitespace from code listings in manual
Jonathan Wakely [Wed, 19 Nov 2025 09:43:10 +0000 (09:43 +0000)] 
libstdc++: Remove vertical whitespace from code listings in manual

This removes unnecessary whitespace following <pre> blocks in the HTML
output.

libstdc++-v3/ChangeLog:

* doc/xml/faq.xml: Remove unwanted whitespace inside
programlisting elements.
* doc/xml/manual/allocator.xml: Likewise.
* doc/xml/manual/auto_ptr.xml: Likewise.
* doc/xml/manual/backwards_compatibility.xml: Likewise.
* doc/xml/manual/build_hacking.xml: Likewise.
* doc/xml/manual/containers.xml: Likewise.
* doc/xml/manual/diagnostics.xml: Likewise.
* doc/xml/manual/extensions.xml: Likewise.
* doc/xml/manual/intro.xml: Likewise.
* doc/xml/manual/io.xml: Likewise.
* doc/xml/manual/iterators.xml: Likewise.
* doc/xml/manual/numerics.xml: Likewise.
* doc/xml/manual/policy_data_structures.xml: Likewise.
* doc/xml/manual/strings.xml: Likewise.
* doc/xml/manual/support.xml: Likewise.
* doc/xml/manual/test.xml: Likewise.
* doc/xml/manual/using.xml: Likewise.
* doc/xml/manual/utilities.xml: Likewise.
* doc/html/*: Regenerate.

4 weeks agoAvoid recursion with SCEV
Andrew MacLeod [Wed, 19 Nov 2025 16:31:16 +0000 (11:31 -0500)] 
Avoid recursion with SCEV

Ranger should not invoke SCEV if its already in the middle of a SCEV call.

PR tree-optimization/122756
gcc/
* gimple-range-fold.cc (range_of_ssa_name_with_loop_info): Do
not invoke SCEV if already in a SCEV call.

gcc/testsuite/
* gcc.dg/pr122756.c: New.

4 weeks agoc++: fix ICE when comparing targs [PR119580]
Marek Polacek [Tue, 18 Nov 2025 20:23:20 +0000 (15:23 -0500)] 
c++: fix ICE when comparing targs [PR119580]

In r10-7816, cp_tree_equal/TEMPLATE_ID_EXPR was changed to use
comp_template_args to compare the targs.  This makes sense, but
comp_template_args won't deal with an error_mark_node.  We created
a BASELINK for S::foo<T::value_type>, but since value_type couldn't
be looked up, we ended up with an error_mark_node instead of a TREE_VEC
of arguments for the TEMPLATE_ID_EXPR in the BASELINK.

It seems reasonable not to create such a TEMPLATE_ID_EXPR by checking
the result of tsubst_template_args like we do in so many other places.
This changes the diagnostic in three tests, but it's only the followup
error message after complaining about the type/value mismatch.

PR c++/119580

gcc/cp/ChangeLog:

* pt.cc (tsubst_baselink): Return error_mark_node if
tsubst_template_args returned error_mark_node.

gcc/testsuite/ChangeLog:

* g++.dg/template/crash106.C: Adjust expected diagnostics.
* g++.dg/template/crash112.C: Likewise.
* g++.dg/template/dependent-args1.C: Likewise.
* g++.dg/cpp0x/pr119580.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
4 weeks agoFix common.opt.urls: include -fuse-ld=wild
Martin Liska [Wed, 19 Nov 2025 17:39:34 +0000 (18:39 +0100)] 
Fix common.opt.urls: include -fuse-ld=wild

gcc/ChangeLog:

* common.opt.urls: Include -fuse-ld=wild

Signed-off-by: Martin Liška <martin.liska@hey.com>
4 weeks agogimple: fix strlen+more for references
Andrew Pinski [Wed, 19 Nov 2025 02:16:02 +0000 (18:16 -0800)] 
gimple: fix strlen+more for references

I found that the strlen pass ignores stores via references.
This shows up with C++ code more than C.
A simple:
```
int g(void)
{
  std::string a="a";
  return __builtin_strlen(a.c_str());
}
```
Should be optimized to just `return 1` but does not
currently due to use of references.
The problem in the code is direct comparison with POINTER_TYPE instead
of using POINTER_TYPE_P.
This fixes the cases I found all related to strings passes. All of them
were added by Martin Sebor which makes me think this was an oversight on his
part.

Bootstrapped and tested on x86_64-linux-gnu.

PR tree-optimization/122754
gcc/ChangeLog:

* gimple-fold.cc (get_range_strlen_tree): Use POINTER_TYPE_P instead
of direct comparing to POINTER_TYPE.
* gimple-ssa-sprintf.cc (format_integer): Likewise.
* gimple-ssa-warn-access.cc (maybe_warn_nonstring_arg): Likewise.
* gimple-ssa-warn-restrict.cc (pass_wrestrict::check_call): Likewise.
* tree-ssa-strlen.cc (maybe_set_strlen_range): Likewise.
(is_strlen_related_p): Likewise.
(strlen_pass::handle_assign): Likewise.

gcc/testsuite/ChangeLog:

* g++.dg/tree-ssa/string-strlen-1.C: New test.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
4 weeks agolibstdc++: store the length after the store of the null character
Andrew Pinski [Tue, 18 Nov 2025 20:57:24 +0000 (12:57 -0800)] 
libstdc++: store the length after the store of the null character

This improves the code generation slightly for std::string because of
aliasing. In many cases the length will be read again and the store of
the null character will cause the length to be re-read due to aliasing
requirements of the char type. So swapping around the stores will allow
the length not to have to be reloaded from memory and will allow
for more optimizations.

Bootstrapped and tested on x86_64-linux-gnu.

libstdc++-v3/ChangeLog:

* include/bits/basic_string.h (basic_string::M_set_length): Swap
around the order of traits_type::assign and _M_length so that
_M_length is at the end.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
4 weeks agodce: Use FOR_EACH_IMM_USE_FAST instead of FOR_EACH_IMM_USE_STMT in simple_dce_from_wo...
Andrew Pinski [Fri, 14 Nov 2025 01:27:06 +0000 (17:27 -0800)] 
dce: Use FOR_EACH_IMM_USE_FAST instead of FOR_EACH_IMM_USE_STMT in simple_dce_from_worklist

When I wrote this code I forgot about FOR_EACH_IMM_USE_FAST. Since this code does not change
any of the uses inside of the loop using FOR_EACH_IMM_USE_FAST will be slightly faster.

Bootstrapped and tested on x86_64-linux-gnu.

gcc/ChangeLog:

* tree-ssa-dce.cc (simple_dce_from_worklist): Use FOR_EACH_IMM_USE_FAST instead of
FOR_EACH_IMM_USE_STMT.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
4 weeks agoaarch64: Fix ICE when laying out arguments of size 0 [PR 122763]
Alfie Richards [Wed, 19 Nov 2025 11:47:09 +0000 (11:47 +0000)] 
aarch64: Fix ICE when laying out arguments of size 0 [PR 122763]

When laying out arguments of size 0, previously would return the next argument
passing register, without checking that there was a next one.

This was fine for AAPCS as it used R0-R7 for argument passing and R9 would be
occasionally be assigned, but never used.

However, with the introduction of preserve_none PCS there is no obvious "next
register" to use as aaaa dummy value, and so when laying out in the
"next register" when there were no more, an assert triggered an ICE.

This patch fixes this ICE by instead using NULL_RTX for arguments of size 0.

PR target/122763

gcc/ChangeLog:

* config/aarch64/aarch64.cc (aarch64_layout_arg): Return NULL_RTX for
arguments of size 0.
(aarch64_function_arg_advance): Remove assert.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/pr122763.c: New test.

4 weeks agodocs: aarch64: Minor grammar fix for preserve_none.
Alfie Richards [Tue, 18 Nov 2025 15:36:26 +0000 (15:36 +0000)] 
docs: aarch64: Minor grammar fix for preserve_none.

gcc/ChangeLog:

* doc/extend.texi (preserve_none): Minor grammar fix.

4 weeks agoc++: current inst name lookup within noexcept-spec [PR122668]
Patrick Palka [Wed, 19 Nov 2025 16:10:38 +0000 (11:10 -0500)] 
c++: current inst name lookup within noexcept-spec [PR122668]

Since we don't implement deferred noexcept-spec parsing of a friend
declaration, the r15-2117 change diagnosing name lookup failure for the
current instantiation ahead of time needs to be suppressed in this case.

PR c++/122668
PR c++/114764

gcc/cp/ChangeLog:

* pt.cc (dependentish_scope_p): Return true for the current
instantiation from within an immediately parsed noexcept-spec.

gcc/testsuite/ChangeLog:

* g++.dg/cpp0x/noexcept91.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
4 weeks agoregenerate configure files
Martin Liska [Wed, 19 Nov 2025 15:45:42 +0000 (16:45 +0100)] 
regenerate configure files

libstdc++-v3/ChangeLog:

* configure: Regenerate.

Signed-off-by: Martin Liška <martin.liska@hey.com>
4 weeks agosupport Wild linker
Martin Liska [Sun, 2 Nov 2025 08:47:34 +0000 (09:47 +0100)] 
support Wild linker

gcc/ChangeLog:

* collect2.cc (main): Add wild linker to -fuse-ld.
* common.opt: Likewise.
* configure: Regenerate.
* configure.ac: Add detection for wild linker.
* doc/invoke.texi: Document -fuse-ld=wild.
* gcc.cc (driver_handle_option): Support -fuse-ld=wild.
* opts.cc (common_handle_option): Likewise.

libatomic/ChangeLog:

* acinclude.m4: Add detection for wild linker.
* configure: Regenerate.

libgomp/ChangeLog:

* acinclude.m4:: Add detection for wild linker.
* configure: Regenerate.

libitm/ChangeLog:

* acinclude.m4:: Add detection for wild linker.
* configure: Regenerate.

libstdc++-v3/ChangeLog:

* acinclude.m4:: Add detection for wild linker.
* configure: Regenerate.

Signed-off-by: Martin Liška <martin.liska@hey.com>
4 weeks ago[MAINTANERS] Add myself to MAINTAINERS file
Martin Liska [Wed, 19 Nov 2025 15:02:04 +0000 (16:02 +0100)] 
[MAINTANERS] Add myself to MAINTAINERS file

Signed-off-by: Martin Liška <martin.liska@hey.com>
ChangeLog:

* MAINTAINERS: Add myself to write after approval (DSO).

4 weeks agolibstdc++: Make <mdspan> compatible with clang.
Luc Grosheintz [Wed, 19 Nov 2025 13:52:04 +0000 (14:52 +0100)] 
libstdc++: Make <mdspan> compatible with clang.

These three changes are needed to make <mdspan> compatible with Clang:

  - the type alias _Storage must occur before its first use.

  - the friend declarations of function must match exactly, including
  noexcept and constexpr.

  - the 'template' in typename T::template type<double>.

libstdc++-v3/ChangeLog:

* include/std/mdspan (extents::_Storage): Move type alias before
its first use.
(__mdspan::__static_extents): Add missing noexcept and constexpr
to friend declaration in extents.
(__mdspan::__dynamic_extents): Ditto.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
Signed-off-by: Luc Grosheintz <luc.grosheintz@gmail.com>
4 weeks agoAArch64: expand extractions of Adv.SIMD registers from SVE as separate insn.
Tamar Christina [Wed, 19 Nov 2025 14:27:55 +0000 (14:27 +0000)] 
AArch64: expand extractions of Adv.SIMD registers from SVE as separate insn.

For this example using the Adv.SIMD/SVE Bridge

#include <arm_neon.h>
#include <arm_neon_sve_bridge.h>
#include <stdint.h>

svint16_t sub_neon_i16_sve_bridged(svint8_t a, svint8_t b) {
    return svset_neonq_s16(svundef_s16(),
            vsubq_s16(vmovl_high_s8(svget_neonq(a)),
                      vmovl_high_s8(svget_neonq(b))));
}

we generate:

sub_neon_i16_sve_bridged(__SVInt8_t, __SVInt8_t):
        sxtl2   v0.8h, v0.16b
        ssubw2  v0.8h, v0.8h, v1.16b
        ret

instead of just

sub_neon_i16_sve_bridged(__SVInt8_t, __SVInt8_t):
        ssubl2  v0.8h, v0.16b, v1.16b
        ret

Commit g:abf865732a7313cf79ffa325faed3467ed28d8b8 added a framework to fold
uses of instrinsics combined with lo/hi extractions into the appropriate low
or highpart instructions.

However this doesn't trigger because the Adv.SIMD from SVE extraction code for

vmovl_high_s8(svget_neonq(a))

does not have one argument as constant and only supports folding 2 insn, not 3
into 1.

The above in RTL generates

(insn 7 4 8 2 (set (reg:V8QI 103 [ _6 ])
        (vec_select:V8QI (subreg:V16QI (reg/v:VNx16QI 109 [ a ]) 0)
            (parallel:V16QI [
                    (const_int 8 [0x8])
                    (const_int 9 [0x9])
                    (const_int 10 [0xa])
                    (const_int 11 [0xb])
                    (const_int 12 [0xc])
                    (const_int 13 [0xd])
                    (const_int 14 [0xe])
                    (const_int 15 [0xf])
                ]))) "":3174:43 -1
     (nil))

Since the SVE and the Adv. SIMD modes are tieable this is a valid instruction to
make, however it's suboptimal in that we can't fold this into the existing
instruction patterns.  Eventually early-ra will split off the SVE reg from the
patterns but by then we're passed combine and insn foldings so we miss all the
optimizations.

This patch introduces vec_extract optabs for 128-bit and 64-bit Adv.SIMD vector
extraction from SVE registers and emits an explicit separate instruction for the
subregs.  This then gives combine and rtl folding the opportunity to form the
combined instructions and if not we arrive at the same RTL after early-ra.

gcc/ChangeLog:

* config/aarch64/aarch64-sve.md (vec_extract<mode><v128>,
vec_extract<mode><v64>): New.
* config/aarch64/iterators.md (V64, v64): New.
* config/aarch64/predicates.md (const0_to_1_operand): New.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/simd/fold_to_highpart_6.c: Update codegen.
* gcc.target/aarch64/sve/fold_to_highpart_1.c: New test.
* gcc.target/aarch64/sve/fold_to_highpart_2.c: New test.

4 weeks ago[RISC-V] Fix trivial bootstrap failure on RISC-V
Jeff Law [Wed, 19 Nov 2025 13:34:33 +0000 (06:34 -0700)] 
[RISC-V] Fix trivial bootstrap failure on RISC-V

Trivial bootstrap fix for the RISC-V port where a recent change introduced a
signed vs unsigned warning.

gcc/
* config/riscv/riscv-string.cc (riscv_expand_block_move_scalar):
Fix signed vs unsigned warning.

4 weeks agoFix dr_chain memleak in vectorizable_load
Richard Biener [Wed, 19 Nov 2025 10:27:43 +0000 (11:27 +0100)] 
Fix dr_chain memleak in vectorizable_load

Figured while running a leak check on some new SLP code.

* tree-vect-stmts.cc (vectorizable_load): Make dr_chain
an auto_vec, move down to where we use it to avoid creating
it twice.

4 weeks agotree-optimization/122722 - better SLP reduction group discovery
Richard Biener [Tue, 18 Nov 2025 14:20:44 +0000 (15:20 +0100)] 
tree-optimization/122722 - better SLP reduction group discovery

The following improves the all-or-nothing discovery of reduction
groups to consider sub-groups by trying toplevel "matches" candidates
for this.  For simplicity and to limit compile-time failed sub-group
matches are not decomposed further, only the originally failed part
is tried again to discover more sub-groups.  Any remaining fails
get picked up by the current single-reduction handling.

PR tree-optimization/122722
* tree-vect-slp.cc (vect_analyze_slp_reductions): New
function, split out from vect_analyze_slp.  Try SLP
sub-groups.
(vect_analyze_slp_reduction_group): New helper.

* gcc.dg/vect/slp-reduc-14.c: New testcase.

4 weeks agotestsuite: Add testcase for already fixed PR [PR121519]
Jakub Jelinek [Wed, 19 Nov 2025 12:41:59 +0000 (13:41 +0100)] 
testsuite: Add testcase for already fixed PR [PR121519]

This PR has been fixed by r16-4253 PR121206 fix.

2025-11-19  Jakub Jelinek  <jakub@redhat.com>

PR tree-optimization/121519
* gcc.dg/pr121519.c: Add testcase for already fixed PR.

4 weeks agoarm: testsuite: fix vgetq_lane tests for c++
Christophe Lyon [Mon, 17 Nov 2025 11:05:10 +0000 (11:05 +0000)] 
arm: testsuite: fix vgetq_lane tests for c++

Surpringly these tests were lacking the extern "C" that other MVE
intrinsics have, making them fail when tested in C++ mode.

While fixing that:
- remove useless dg-skip-if
- remove hardcoded -mfloat-abi=hard from s64 and u64 versions
- add check-function-bodies to s64 and u64 versions, such that these
  tests no longer appear as duplicates.

gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vgetq_lane_f16.c: Add missing
extern "C". Remove dg-skip-if.
* gcc.target/arm/mve/intrinsics/vgetq_lane_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_s64.c: Likewise. Add
check-function-bodies.
* gcc.target/arm/mve/intrinsics/vgetq_lane_u64.c: Likewise.

4 weeks agotree-optimization/122747 - fix masking of loops with conditional reduction ops
Richard Biener [Wed, 19 Nov 2025 09:33:05 +0000 (10:33 +0100)] 
tree-optimization/122747 - fix masking of loops with conditional reduction ops

The following amends the earlier fix in r16-5372-gfacb92812a4ec5 to
also cover the case we're not doing the merge to a single cycle
but go via vectorizable_call.

PR tree-optimization/122747
* tree-vect-stmts.cc (vectorizable_call): Handle reduction
operations that are already conditional.

* gcc.target/i386/vect-epilogues-10.c: New testcase.

4 weeks agotree-ssanames: Fix pasto in get_known_nonzero_bits function comment
Jakub Jelinek [Wed, 19 Nov 2025 10:52:16 +0000 (11:52 +0100)] 
tree-ssanames: Fix pasto in get_known_nonzero_bits function comment

get_known_nonzero_bits_1 function comment a few lines earlier says
correctly it returns 0 for unknown (unlike get_nonzero_bits{,_1}
which return -1 for unknown).

2025-11-19  Jakub Jelinek  <jakub@redhat.com>

* tree-ssanames.cc (get_known_nonzero_bits): Fix a pasto in
function comment, this function returns 0 if unknown rather
than -1.

4 weeks agoc++, libstdc++: Implement CWG1670 and LWG4468
Jakub Jelinek [Wed, 19 Nov 2025 10:02:13 +0000 (11:02 +0100)] 
c++, libstdc++: Implement CWG1670 and LWG4468

The following patch attempts to implement CWG1670 and related LWG4468.

2025-11-19  Jakub Jelinek  <jakub@redhat.com>

gcc/cp/
* parser.cc (cp_parser_conversion_type_id): Implement C++ DR1670
- auto as conversion-type-id.  Pedwarn on conversion operators
with placeholder return type.
gcc/testsuite/
* g++.dg/DRs/dr1670-1.C: New test.
* g++.dg/DRs/dr1670-2.C: New test.
* g++.dg/DRs/dr1670-3.C: New test.
* g++.dg/modules/auto-1_a.H: Use dg-options instead of
dg-additional-options.
* g++.dg/modules/auto-1_b.C: Likewise.
* g++.dg/cpp1y/auto-fn12.C: Likewise.
* g++.dg/cpp1y/auto-fn13.C: Add empty dg-options.
* g++.dg/cpp1y/auto-fn22.C: Likewise.
* g++.dg/cpp1y/constexpr-assert2.C: Likewise.
* g++.dg/cpp1y/auto-fn44.C: Add dg-options -Wpedantic and expect
further warnings.
* g++.dg/cpp1y/auto-fn50.C: Likewise.
* g++.dg/cpp0x/auto9.C: Expect two errors always rather than just
for C++11.
libstdc++-v3/
* include/std/type_traits (constant_wrapper conversion operator):
Use decltype(value) instead of decltype(auto).  Resolves LWG4468.

4 weeks agolibstdc++: Implement proposed resolution of LWG4477 [PR122671]
Jakub Jelinek [Wed, 19 Nov 2025 08:38:17 +0000 (09:38 +0100)] 
libstdc++: Implement proposed resolution of LWG4477 [PR122671]

This patch implements the proposed resolution of
https://cplusplus.github.io/LWG/issue4477
The PR complains that one can't successfully throw from constructor
in placement new in a constant expression and catch that exception
later on.  The problem is while P2747R2 made placement ::operator new
and ::operator new[] constexpr, when the ctor throws it invokes also
these weird placement ::operator delete and ::operator delete[]
which intentionally perform no action, and those weren't constexpr,
so constant expression evaluation failed.

2025-11-19  Jakub Jelinek  <jakub@redhat.com>

PR libstdc++/122671
* libsupc++/new (::operator delete, ::operator delete[]): Implement
proposed LWG4477 resolution.  Use _GLIBCXX_PLACEMENT_CONSTEXPR for
placement operator deletes.

* g++.dg/cpp26/constexpr-eh17.C: New test.

4 weeks agotree-ssa-live: Fix .DEFERRED_INIT handling [PR122184]
Jakub Jelinek [Wed, 19 Nov 2025 08:36:51 +0000 (09:36 +0100)] 
tree-ssa-live: Fix .DEFERRED_INIT handling [PR122184]

remove_unused_locals ignores clobbers in the initial phase (and
some debug stmts) and this has been copied for .DEFERRED_INIT
as well:
          if (gimple_clobber_p (stmt))
            {
              have_local_clobbers = true;
              continue;
            }

          if (gimple_call_internal_p (stmt, IFN_DEFERRED_INIT))
            {
              have_local_clobbers = true;
              continue;
            }
This is so that the second phase can then drop clobbers that
clobber unused local vars and ditto for .DEFERRED_INIT.
Except, for clobbers it does
                /* Remove clobbers referencing unused vars, or clobbers
                   with MEM_REF lhs referencing uninitialized pointers.  */
                if ((VAR_P (base) && !is_used_p (base))
                    || (TREE_CODE (lhs) == MEM_REF
                        && TREE_CODE (TREE_OPERAND (lhs, 0)) == SSA_NAME
                        && SSA_NAME_IS_DEFAULT_DEF (TREE_OPERAND (lhs, 0))
                        && (TREE_CODE (SSA_NAME_VAR (TREE_OPERAND (lhs, 0)))
                            != PARM_DECL)))
so handles both the var = {CLOBBER}; case where var is unused local,
or *SSA_NAME = {CLOBBER} where SSA_NAME is default definition of
non-PARM_DECL, but for .DEFERRED_INIT it doesn't:
                if (DECL_P (base) && !is_used_p (base))
On the following case, we have *SSA_NAME(D) = .DEFERRED_INIT (...);
and because of the former we don't mark the SSA_NAME as used and
because of the latter we keep the .DEFERRED_INIT call, so the SSA_NAME
is freed and later on we ICE because the SSA_NAME in the freelist doesn't
have SSA_NAME_DEF_STMT.

The following patch fixes it by handling .DEFERRED_INIT like clobbers
and dropping them also when it has a MEM_REF with default definition
of SSA_NAME for non-PARM_DECL on the lhs.

2025-11-19  Jakub Jelinek  <jakub@redhat.com>

PR tree-optimization/122184
* tree-ssa-live.cc (remove_unused_locals): Drop .DEFERRED_INIT
calls with MEM_REF lhs based on uninitialized SSA_NAME.

* g++.dg/opt/pr122184-1.C: New test.
* g++.dg/opt/pr122184-2.C: New test.

4 weeks agobuild: Define DISABLE_MULTILIB if --disable-multilib
Rainer Orth [Wed, 19 Nov 2025 08:24:14 +0000 (09:24 +0100)] 
build: Define DISABLE_MULTILIB if --disable-multilib

When building trunk on Solaris with --disable-multilib, I noticed that
the non-default multilib wasn't rejected any longer, leading to
unexpected link failures.  I could trace this to DISABLE_MULTILIB no
longer being defined in multilib.h.  The problem ist that
gcc/genmultilib has been changed in

Author: Terry Guo <terry.guo@arm.com>
Date:   Sun Jan 13 10:12:07 2013 +0000

    Makefile.in (s-mlib): New argument MULTILIB_REUSE.

This patch factored out the code that sets disable_multilib and controls
emission of that macro into a separate generated script (tmpmultilib3),
but genmultilib itself continues to check $disable_multilib that isn't
ever set there.

Fixed by checking enable_multilib instead which is set from the
corresponding genmultilib argument.  DISABLE_MULTILIB is only referenced
in gcc/config/sol2.h, so no other port should be affected.

Bootstrapped without regressions on i386-pc-solaris2.11 and
sparc-sun-solaris2.11 and verifying that the non-default multilibs are
now rejected again as expected.

2025-11-18  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

gcc:
* genmultilib: Check $enable_multilib to define DISABLE_MULTILIB.

4 weeks agoFix typo in sol2.h
Rainer Orth [Wed, 19 Nov 2025 08:19:10 +0000 (09:19 +0100)] 
Fix typo in sol2.h

I noticed that gcc/config/sol2.h uses USE_GNU_LD as a guard in one
place only.  This is a cross of USE_GLD and HAVE_GNU_LD which doesn't
exist so the gld variant is never used.

This went unnoticed since the wrong versions of LD_WHOLE_ARCHIVE_OPTION
and LD_NO_WHOLE_ARCHIVE_OPTION are only ever used in LIBASAN_EARLY_SPEC
and only effective when -static-libasan is used.  gld would only warn
about the unsupported -z options here.

The issue wasn't noticed before since the only testcase using
-static-libasan isn't run on Solaris, which this patch also corrects.

Bootstrapped without regressions on i386-pc-solaris2.11 and
sparc-sun-solaris2.11 (both as/ld and gas/gld).

2025-11-18  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

gcc:
* config/sol2.h: Check USE_GLD instead of USE_GNU_LD.

gcc/testsuite:
* c-c++-common/asan/pr59063-2.c: Enable on Solaris.

4 weeks agors6000: Do not reorder operands for vec_pack_to_short_fp32 based on endianness
Avinash Jayakar [Wed, 19 Nov 2025 05:10:45 +0000 (10:40 +0530)] 
rs6000: Do not reorder operands for vec_pack_to_short_fp32 based on endianness

The patterns for altivec_vpku<VI_char>um take care of the order of
operands for the vpkuwum instruction, and therefore it is not needed in
the define_expand pattern "convert_4f32_8f16".

2025-11-18  Avinash Jayakar  <avinashd@linux.ibm.com>

gcc/ChangeLog:
PR target/119130
* config/rs6000/altivec.md (convert_4f32_8f16): Use same operand
order for both endian format.

gcc/testsuite/ChangeLog:
PR target/119130
* gcc.target/powerpc/builtins-1-p9-runnable.c: Use same expected
results for both endian format.

4 weeks agoFortran: Fix testcases from [PR32365]
Jerry DeLisle [Wed, 19 Nov 2025 03:40:07 +0000 (19:40 -0800)] 
Fortran: Fix testcases from [PR32365]

PR fortran/32365

gcc/testsuite/ChangeLog:

* gfortran.dg/goacc/routine-1.f90: Adjust dg-error format.
* gfortran.dg/goacc/routine-2.f90: Adjust dg-error format.
* gfortran.dg/gomp/declare-variant-17.f90: Adjust dg-error format.
* gfortran.dg/gomp/order-2.f90: Adjust dg-error format.
* gfortran.dg/gomp/pr78026.f03: Adjust dg-error format.
* gfortran.dg/gomp/requires-4.f90: Adjust dg-error format.
* gfortran.dg/gomp/requires-6.f90: Adjust dg-error format.

4 weeks agoi386: Add AVX10.1, AVX10.2, APX_F and MOVRS to Nova Lake
Haochen Jiang [Tue, 18 Nov 2025 07:05:15 +0000 (15:05 +0800)] 
i386: Add AVX10.1, AVX10.2, APX_F and MOVRS to Nova Lake

Nova Lake will enable AVX10.1, AVX10.2, APX_F and MOVRS according to the
latest documentation.

Due to PTA_XXX would not maintain imply relationships, we need to add
all PTA_AVX512XXX which AVX10 enabled to enable AVX10.1 ISAs. It is not
a redundant addition in i386.h.

gcc/ChangeLog:

* common/config/i386/i386-common.cc: Adjust to P_PROC_AVX10_1.
* config/i386/driver-i386.cc (host_detect_local_cpu):
Move Nova Lake to under AVX512 part.
* config/i386/i386.h (PTA_NOVALAKE): Add AVX10.1, AVX10.2,
APX_F and MOVRS.
* config/i386/x86-tune-sched.cc (ix86_issue_rate): Set to 8.
* config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Add Nova
Lake.
* doc/invoke.texi: Adjust documentation.

4 weeks agoDaily bump.
GCC Administrator [Wed, 19 Nov 2025 00:19:58 +0000 (00:19 +0000)] 
Daily bump.

4 weeks agolibgomp.texi: Update MASTER/MASKED entry in the libgomp ABI section
Tobias Burnus [Tue, 18 Nov 2025 22:10:21 +0000 (23:10 +0100)] 
libgomp.texi: Update MASTER/MASKED entry in the libgomp ABI section

libgomp/
* libgomp.texi (The libgomp ABI): Update MASTER section by
also covering MASKED.

4 weeks agocobol: Correct Makefile.am from 809b32660990867052132c706a9c9fdef1766e8f
James K. Lowden [Tue, 18 Nov 2025 17:26:12 +0000 (12:26 -0500)] 
cobol: Correct Makefile.am from 809b32660990867052132c706a9c9fdef1766e8f

Update lagging libgcobol/Makefile.am to match libgcobol/Makefile.in.

libgcobol/ChangeLog:
PR cobol/122702
* Makefile.am: Include posix/udf/posix-open.cbl.

4 weeks agoRISC-V: Add flag to adjust mem inlining threshold
Edwin Lu [Fri, 7 Nov 2025 18:49:33 +0000 (10:49 -0800)] 
RISC-V: Add flag to adjust mem inlining threshold

Add param flags to adjust the memcpy/memove/memset inlining threshold.
The threshold can be updated with --param=<routine>-size-threshold=

Default is currently set for disabled.

gcc/ChangeLog:

* config/riscv/riscv-string.cc (riscv_expand_block_move_scalar):
Add length check.
(expand_block_move): Ditto.
(expand_vec_setmem): Ditto.
* config/riscv/riscv.opt: Add param flags.

Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
4 weeks agolibstdc++: shared_mutex: Respond consistently to errors and deadlock
Mike Crowe [Tue, 18 Nov 2025 13:06:53 +0000 (13:06 +0000)] 
libstdc++: shared_mutex: Respond consistently to errors and deadlock

Make the shared_mutex::try_lock(), shared_timed_mutex::try_lock_until()
and shared_timed_mutex::try_lock_shared_until() all handle errors from
pthread functions consistently by returning false to indicate that the
lock could not be taken. If _GLIBCXX_ASSERTIONS is defined then
unexpected errors, such as EDEADLK and EINVAL will cause an assertion
failure. If _GLIBCXX_ASSERTIONS is not defined then these functions no
longer ever return true incorrectly indicating that they have taken the
lock.

This removes the previous behaviour of looping on EDEADLK in
try_lock_shared_until() and no longer returns true on EINVAL in all of
these functions. (In theory at least it should not be possible to
trigger EINVAL since 5dba17a3e709859968f939354e6e5e8d796012d3.)

Unfortunately my reading of POSIX is that pthread_rwlock_clockrdlock[1],
pthread_rwlock_timedrdlock pthread_rwlock_clockwrlock[2] and
pthread_rwlock_timedwrlock are allowed to deadlock rather than return
EDEADLK when trying to take a lock a second time from the same
thread. This means that the deadlock tests cannot be enabled by
default. I believe that the tests do work with glibc (2.31 & 2.36) and
with the __shared_mutex_cv implementation though.

[1] https://pubs.opengroup.org/onlinepubs/9799919799/functions/pthread_rwlock_clockrdlock.html
[2] https://pubs.opengroup.org/onlinepubs/9799919799/functions/pthread_rwlock_clockwrlock.html

libstdc++-v3/ChangeLog:

* include/std/shared_mutex (try_lock, try_lock_until)
(try_lock_shared_until): Respond consistently to errors and
deadlocks.
* testsuite/30_threads/shared_timed_mutex/try_lock_until/116586.cc:
Test deadlock behaviour if possible.

Signed-off-by: Mike Crowe <mac@mcrowe.com>
4 weeks agoc++: Handle absolute path for CMI output directory [PR122677]
Jonathan Wakely [Tue, 18 Nov 2025 13:19:53 +0000 (13:19 +0000)] 
c++: Handle absolute path for CMI output directory [PR122677]

When trying to create each directory component of an absolute path, the
first call to mkdir uses a path of "" which gives an ENOENT error. This
causes the create_dirs function to return without creating anything.

This commit skips past the leading slashes of an absolute path, so that
the first call to mkdir is for an actual directory name, not an empty
string.

gcc/cp/ChangeLog:

PR c++/122677
* module.cc (create_dirs): Skip past any leading slashes.

4 weeks agoarm: [MVE intrinsics] remove __ARM_mve_typeid and __ARM_mve_coerce in arm_mve.h
Christophe Lyon [Fri, 19 Sep 2025 13:39:55 +0000 (13:39 +0000)] 
arm: [MVE intrinsics] remove __ARM_mve_typeid and __ARM_mve_coerce in arm_mve.h

These helpers are not needed anymore, so remove them.

gcc/ChangeLog:

* config/arm/arm_mve.h (__ARM_mve_typeid): Delete.
(__ARM_mve_coerce): Delete.
(__ARM_mve_coerce_i_scalar): Delete.
(__ARM_mve_coerce_s8_ptr): Delete.
(__ARM_mve_coerce_u8_ptr): Delete.
(__ARM_mve_coerce_s16_ptr): Delete.
(__ARM_mve_coerce_u16_ptr): Delete.
(__ARM_mve_coerce_s32_ptr): Delete.
(__ARM_mve_coerce_u32_ptr): Delete.
(__ARM_mve_coerce_s64_ptr): Delete.
(__ARM_mve_coerce_u64_ptr): Delete.
(__ARM_mve_coerce_f_scalar): Delete.
(__ARM_mve_coerce_f16_ptr): Delete.
(__ARM_mve_coerce_f32_ptr): Delete.

4 weeks agoarm: [MVE intrinsics] rework vuninitialized
Christophe Lyon [Fri, 19 Sep 2025 12:20:27 +0000 (12:20 +0000)] 
arm: [MVE intrinsics] rework vuninitialized

Implement vuninitialized using the new MVE builtins framework.

This patch is a bit more intrusive than other similar patches because
the two vuninitialized variants use different signatures.

To handle this situation, the patch makes the inherent shape derive
from overloaded_base instead of nonoverloaded_base, and adds a new
parameter to add_unique_function so that we can choose between adding
only the nonoverloaded version, only the overloaded ones, or both (the
default).

The patch introduces pop_and_resolve_to, which pops an argument (the
only one in this case), and calls resolve_to, like many other shapes:
this is because the overloaded version takes an argument (used to
resolve which nonoverloaded version to call), which is not present in
the nonoverloaded version prototype.

gcc/ChangeLog:
* config/arm/arm-mve-builtins-shapes.cc (build_one): Add
which_overload parameter.
(inherent): Derive from overloaded_base<0>.  Add support for
overloaded version.
* config/arm/arm-mve-builtins-shapes.h (inherent): Update comment.
* config/arm/arm-mve-builtins.cc (add_unique_function): Add
support for new which_overload parameter.
(pop_and_resolve_to): New.
* config/arm/arm-mve-builtins.h (NONOVERLOADED_FORM)
(OVERLOADED_FORM): New.
(add_unique_function): Update prototype.
(pop_and_resolve_to): New prototype.
* config/arm/arm_mve.h (vuninitializedq): Delete.
(vuninitializedq_u8): Delete.
(vuninitializedq_u16): Delete.
(vuninitializedq_u32): Delete.
(vuninitializedq_u64): Delete.
(vuninitializedq_s8): Delete.
(vuninitializedq_s16): Delete.
(vuninitializedq_s32): Delete.
(vuninitializedq_s64): Delete.
(vuninitializedq_f16): Delete.
(vuninitializedq_f32): Delete.
(__arm_vuninitializedq): Delete.

4 weeks agoarm: [MVE intrinsics] rework vgetq_lane vsetq_lane
Christophe Lyon [Tue, 19 Aug 2025 21:21:59 +0000 (21:21 +0000)] 
arm: [MVE intrinsics] rework vgetq_lane vsetq_lane

Implement vgetq_lane and vsetq_lane using the new MVE builtins
framework.

Although MVE intrinsics are not supported in big-endian mode, we keep
the code to convert lane indices into GCC's vector indices, so that
it's already in place in case we want to support big-endian in the
future.

The patch adds new tests, to check that we emit an error when the lane
number is not in the expected range.

gcc/ChangeLog:

* config/arm/arm-mve-builtins-base.cc (class
mve_function_vset_vget_lane): New.
(vgetq_lane, vsetq_lane): New.
* config/arm/arm-mve-builtins-base.def (vgetq_lane, vsetq_lane):
New.
* config/arm/arm-mve-builtins-base.h (vgetq_lane, vsetq_lane):
New.

* config/arm/arm-mve-builtins-shapes.cc (struct getq_lane)
(setq_lane): New.
* config/arm/arm-mve-builtins-shapes.h (getq_lane, setq_lane):
New.
* config/arm/arm_mve.h (vsetq_lane): Delete.
(vgetq_lane): Delete.
(vsetq_lane_f16): Delete.
(vsetq_lane_f32): Delete.
(vsetq_lane_s16): Delete.
(vsetq_lane_s32): Delete.
(vsetq_lane_s8): Delete.
(vsetq_lane_s64): Delete.
(vsetq_lane_u8): Delete.
(vsetq_lane_u16): Delete.
(vsetq_lane_u32): Delete.
(vsetq_lane_u64): Delete.
(vgetq_lane_f16): Delete.
(vgetq_lane_f32): Delete.
(vgetq_lane_s16): Delete.
(vgetq_lane_s32): Delete.
(vgetq_lane_s8): Delete.
(vgetq_lane_s64): Delete.
(vgetq_lane_u8): Delete.
(vgetq_lane_u16): Delete.
(vgetq_lane_u32): Delete.
(vgetq_lane_u64): Delete.
(__ARM_NUM_LANES): Delete.
(__ARM_LANEQ): Delete.
(__ARM_CHECK_LANEQ): Delete.
(__arm_vsetq_lane_s16): Delete.
(__arm_vsetq_lane_s32): Delete.
(__arm_vsetq_lane_s8): Delete.
(__arm_vsetq_lane_s64): Delete.
(__arm_vsetq_lane_u8): Delete.
(__arm_vsetq_lane_u16): Delete.
(__arm_vsetq_lane_u32): Delete.
(__arm_vsetq_lane_u64): Delete.
(__arm_vgetq_lane_s16): Delete.
(__arm_vgetq_lane_s32): Delete.
(__arm_vgetq_lane_s8): Delete.
(__arm_vgetq_lane_s64): Delete.
(__arm_vgetq_lane_u8): Delete.
(__arm_vgetq_lane_u16): Delete.
(__arm_vgetq_lane_u32): Delete.
(__arm_vgetq_lane_u64): Delete.
(__arm_vsetq_lane_f16): Delete.
(__arm_vsetq_lane_f32): Delete.
(__arm_vgetq_lane_f16): Delete.
(__arm_vgetq_lane_f32): Delete.
(__arm_vsetq_lane): Delete.
(__arm_vgetq_lane): Delete.
* config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Add '@'
prefix.
(mve_vec_set<mode>_internal): Likewise.

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vsetq_lane_f16_bounds.c: New test.
* gcc.target/arm/mve/intrinsics/vsetq_lane_f32_bounds.c: New test.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s16_bounds.c: New test.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s32_bounds.c: New test.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s64_bounds.c: New test.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s8_bounds.c: New test.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u16_bounds.c: New test.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u32_bounds.c: New test.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u64_bounds.c: New test.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u8_bounds.c: New test.

4 weeks agoarm: doc: Update documentation on half-precision support
Christophe Lyon [Tue, 18 Nov 2025 16:25:40 +0000 (16:25 +0000)] 
arm: doc: Update documentation on half-precision support

The previous patch makes __fp16 always available on arm (using
-mfp16-format is no longer needed), so the documentation needs an
update.

In the process, clarify the peculiarities of __fp16 on arm, and
reorder information to make it easier to understand.

gcc/ChangeLog:
* doc/extend.texi (Half-precision Floating-point): __fp16 is now
always available on arm.  Move x86 paragraph closer to the rest of
the x86 information, and make it use present tense.

4 weeks agoarm: [MVE intrinsics] Avoid warnings when floating-point is not supported [PR 117814]
Christophe Lyon [Thu, 18 Sep 2025 23:16:32 +0000 (23:16 +0000)] 
arm: [MVE intrinsics] Avoid warnings when floating-point is not supported [PR 117814]

If the target does not support floating-point, we register FP vector
types as 'void' (see register_vector_type).

This leads to warnings about 'pure attribute on function returning
void' when we declare the various load intrinsics because their
call_properties say CP_READ_MEMORY (thus giving them the 'pure'
attribute), but their return type is void.  This happens for instance
in gcc.target/arm/pr112337.c, depending on how GCC is built (I didn't
notice the warnings because arm_mve.h is considered as a system
include in my environment, and the warning is not emitted, but CI
reported it).

To avoid such warnings, declare floating-point scalar and vector types
even if the target does not have an FPU.

Note that since an FPU can be activated via #pragma GCC target
("arch=armv8.1-m.main+mve.fp" for instance), it means that such types
cannot appear and disappear withing a single TU, they have to be
available in all contexts.  This implies a noteworthy change for
__fp16: it not longer depends on using -mfp16-format=ieee or
alternative.  Also note that if the target ISA has the fp16 bit set,
we already silently activate -mfp16-format=ieee (with an error if
-mfp16-format=alternative was supplied).  The patch now enforces
-mfp16-format=none if the option was used.

In arm-mve-builtins.cc (register_builtin_types, register_vector_type,
register_builtin_tuple_types), this means simply removing the early
exits.  However, for this to work, we need to update
arm_vector_mode_supported_p, so that vector floating-point types are
always defined, and __fp16 must always be registered by
arm_init_fp16_builtins (as it is the base type for vectors of
float16_t.  Another side effect is that the declaration of float16_t
and float32_t typedefs is now unconditional.

The new tests verify that:
- we emit an error if the code tries to use floating-point intrinsics
  and the target does not have the floating-point extension
- we emit the expected code when activating the floating-point
  expected via a pragma
- we emit the expected code when the target supports floating-point
  (no pragma needed)
- we apply -mfp16-format=none where we used to default to ieee

An update is needed in g++.target/arm/mve/general-c++/nomve_fp_1.c,
because the error message now correctly uses float16x8_t instead of
void as return type.

The patch removes gcc.target/arm/fp16-compile-none-1.c which tests
that using __fp16 produces an error with -mfp16-format=none, since it
is no longer the case.

gcc/ChangeLog:

PR target/117814
* config/arm/arm-builtins.cc (arm_init_fp16_builtins): Always
register __fp16 type.
* config/arm/arm-mve-builtins.cc (register_builtin_tuple_types):
Remove special handling when TARGET_HAVE_MVE_FLOAT is false.
(register_vector_type): Likewise.
(register_builtin_tuple_types): Likewise.
* config/arm/arm-opts.h (arm_fp16_format_type): Add
ARM_FP16_FORMAT_DEFAULT.
* config/arm/arm.cc (arm_vector_mode_supported_p): Accept
floating-point vector modes even if TARGET_HAVE_MVE_FLOAT is
false.
(arm_option_reconfigure_globals): Apply ARM_FP16_FORMAT_NONE if
requested.
* config/arm/arm.opt (mfp16-format): Default to
ARM_FP16_FORMAT_DEFAULT.
* config/arm/arm_mve_types.h (float16_t, float32_t): Define
unconditionally.
* doc/sourcebuild.texi (ARM-specific attributes): Document
arm_v8_1m_mve_nofp_ok.

gcc/testsuite/ChangeLog:

PR target/117814
* gcc.target/arm/mve/intrinsics/pr117814-f16.c: New test.
* gcc.target/arm/mve/intrinsics/pr117814-2-f16.c: New test.
* gcc.target/arm/mve/intrinsics/pr117814-3-f16.c: New test.
* gcc.target/arm/mve/intrinsics/pr117814-4-f16.c: New test.
* gcc.target/arm/mve/intrinsics/pr117814-f32.c: New test.
* gcc.target/arm/mve/intrinsics/pr117814-2-f32.c: New test.
* gcc.target/arm/mve/intrinsics/pr117814-3-f32.c: New test.
* gcc.target/arm/fp16-compile-none-1.c: Delete.
* g++.target/arm/mve/general-c++/nomve_fp_1.c: Fix expected error
message.
* lib/target-supports.exp
(check_effective_target_arm_v8_1m_mve_nofp_ok_nocache): New.
(check_effective_target_arm_v8_1m_mve_nofp_ok): New.
(add_options_for_arm_v8_1m_mve_nofp): New.

4 weeks agofortran: Enforce spec statement ordering [PR32365]
Jerry DeLisle [Tue, 18 Nov 2025 02:55:03 +0000 (18:55 -0800)] 
fortran: Enforce spec statement ordering [PR32365]

PR fortran/32365

gcc/fortran/ChangeLog:

* parse.cc (parse_executable): Reject declaration/OpenMP
specification statements seen after executable code
unconditionally, keeping the legacy DATA diagnostic as
a warning.

gcc/testsuite/ChangeLog:

* gfortran.dg/common_22.f90: Update.
* gfortran.dg/common_24.f: Update.
* gfortran.dg/goacc/routine-1.f90: Update.
* gfortran.dg/goacc/routine-2.f90: Update.
* gfortran.dg/gomp/declare-variant-17.f90: Update.
* gfortran.dg/gomp/interop-1.f90: Update.
* gfortran.dg/gomp/order-2.f90: Update.
* gfortran.dg/gomp/pr78026.f03: Update.
* gfortran.dg/gomp/requires-4.f90: Update.
* gfortran.dg/gomp/requires-6.f90: Update.
* gfortran.dg/pr61669.f90: Update.
* gfortran.dg/spec_statement_in_exec.f90: New test exercises
data/common/namelist/OpenMP directives with -fopenmp.

Signed-off-by: Christopher Albert <albert@tugraz.at>
4 weeks agotestsuite: Require target int32 for pr116815.c test
Uros Bizjak [Tue, 18 Nov 2025 16:26:17 +0000 (17:26 +0100)] 
testsuite: Require target int32 for pr116815.c test

gcc/testsuite/ChangeLog:

* gcc.dg/pr116815.c: Require target int32.

4 weeks agoada: Reserve Is_Constructor for Ada constructors
Denis Mazzucato [Thu, 30 Oct 2025 11:54:55 +0000 (12:54 +0100)] 
ada: Reserve Is_Constructor for Ada constructors

gcc/ada/ChangeLog:

* gcc-interface/decl.cc
(is_cplusplus_method,gnat_to_gnu_param,gnat_to_gnu_subprog_type):
Adjust Is_Constructor/Is_CPP_Constructor after renaming.

4 weeks agoada: Fix assertion failure on prefixed call with access to class-wide interface
Eric Botcazou [Sun, 9 Nov 2025 10:01:29 +0000 (11:01 +0100)] 
ada: Fix assertion failure on prefixed call with access to class-wide interface

The assertion failure shows that the 'Access reference implicitly introduced
for calls written in object notation whose controlling first parameter is an
access to class-wide interface is not later expanded in the cases where the
pointer to the interface needs to be retrieved.

gcc/ada/ChangeLog:

PR ada/34290
* sem_ch4.adb (Try_Object_Operation.Complete_Object_Operation): Call
Preserve_Comes_From_Source to preserve the flag on nodes.  Relocate
the Obj node consistently.  Preserve the Comes_From_Source flag for
the case of an implicit 'Access reference and post the local errors
on the rewritten prefix consistently.
* sem_util.adb (Is_Aliased_View): Also return true for a generalized
reference to the result of a function call.

4 weeks agoada: Enforce checks on access to interface type conversions
Javier Miranda [Thu, 2 Oct 2025 06:41:32 +0000 (06:41 +0000)] 
ada: Enforce checks on access to interface type conversions

The patch enforces checks on access to interface type conversions
internally generated by the frontend to displace the pointer to
a tagged type object (pointer named "this" in the C++ terminology)
from a dispatch table to a another dispatch table.

gcc/ada/ChangeLog:

* exp_util.ads (Flag_Interface_Pointer_Displacement): New subprogram.
* exp_util.adb (Flag_Interface_Pointer_Displacement): Ditto.
* exp_attr.adb (Add_Implicit_Interface_Type_Conversion): Flag type
conversions internally added to displace the pointer to the object.
(Expand_N_Attribute_Reference): Ditto.
* exp_ch4.adb (Displace_Allocator_Pointer): Ditto.
* exp_ch6.adb (Expand_Simple_Function_Return): Ditto.
(Make_Build_In_Place_Call_In_Allocator): Ditto.
(Make_CPP_Constructor_Call_In_Allocator): Ditto.
* exp_disp.adb (Expand_Interface_Actuals): Ditto.
* exp_intr.adb (Expand_Dispatching_Constructor_Call): Ditto.
* sem_ch6.adb (Analyze_Function_Return): Ditto.
* sem_disp.adb (Propagate_Tag): Ditto.
* sem_res.adb (Resolve_Actuals): Ditto.
(Valid_Conversion): Rely on the new flag to handle the type conversion
as a conversion added to displace the pointer to the object. Factorize
code handling general and anonymous access types.
* sem_type.adb (Interface_Present_In_Ancestor): For concurrent types
add missing handling of class-wide types. Noticed working on this
issue.
* sinfo.ads (Is_Interface_Pointer_Displacement): Document this new flag.
* gen_il-fields.ads (Is_Interface_Pointer_Displacement): New flag.
* gen_il-gen-gen_nodes.adb (Is_Interface_Pointer_Displacement): New
flag on N_Type_Conversion nodes.
* gen_il-internals.adb (Image): Add Is_Interface_Pointer_Displacement
flag image.

4 weeks agoada: Small cleanup in analysis of package instantiation
Eric Botcazou [Fri, 7 Nov 2025 11:32:11 +0000 (12:32 +0100)] 
ada: Small cleanup in analysis of package instantiation

This cleans up some ancient code computing whether the instantiation of the
body is needed and moves remnants to the Needs_Body_Instantiated predicate.

gcc/ada/ChangeLog:

* sem_ch12.adb (Analyze_Package_Instantiation): Streamline and move
code clearing Needs_Body after it is computed to ...
(Needs_Body_Instantiated): ...here.  Chain if-then constructs.

4 weeks agoada: Fix small typo in comment
Eric Botcazou [Fri, 7 Nov 2025 11:31:10 +0000 (12:31 +0100)] 
ada: Fix small typo in comment

gcc/ada/ChangeLog:

* sem_type.adb (Last_Overloaded): Fix typo.

4 weeks agoada: Fix bogus error about null exclusion for designated type with multiple views
Eric Botcazou [Fri, 7 Nov 2025 12:10:00 +0000 (13:10 +0100)] 
ada: Fix bogus error about null exclusion for designated type with multiple views

It comes from the new legality check retroactively introduced by AI12-0289,
but the implementation is fooled by the presence of both an incomplete and
a partial view for a tagged type.

gcc/ada/ChangeLog:

PR ada/111433
* sem_util.ads (Incomplete_Or_Partial_View): Add Partial_Only formal
parameter.
* sem_util.adb (Incomplete_Or_Partial_View): Likewise.  Do not look
for an incomplete view if it is set to True.
* sem_ch6.adb (Check_Conformance.Null_Exclusions_Match): Pass True
for Partial_Only in the call to Incomplete_Or_Partial_View.

4 weeks agoada: Update baselining disclaimer.
Tonu Naks [Fri, 7 Nov 2025 13:20:32 +0000 (13:20 +0000)] 
ada: Update baselining disclaimer.

gcc/ada/ChangeLog:

* doc/gnat_rm/obsolescent_features.rst: update PolyOrb reference
* gnat_rm.texi: Regenerate.
* gnat_ugn.texi: Regenerate.

4 weeks agoada: Improve diagnostic when an incorrect left bracket is found
Denis Mazzucato [Wed, 29 Oct 2025 16:43:29 +0000 (17:43 +0100)] 
ada: Improve diagnostic when an incorrect left bracket is found

This patch improves the generic error message of a missing binary operator when
an incorrect left bracket is found.

gcc/ada/ChangeLog:

* par-ch4.adb (P_Simple_Expression): Improve diagnostic.

4 weeks agoada: Add rule check for call arguments
Viljar Indus [Wed, 10 Sep 2025 09:47:19 +0000 (12:47 +0300)] 
ada: Add rule check for call arguments

Implement SPARK RM 6.9(18).

If an assignment to a part of a ghost variable occurs in a ghost entity,
then the variable should be assertion-level-dependent on this entity.
[This includes both assignment statements and passing a ghost variable as an
out or in out mode actual parameter.]

gcc/ada/ChangeLog:

* ghost.adb (Check_Procedure_Call_Levels): New function for
implementing the check.
* ghost.ads (Check_Procedure_Call_Levels): Likewise.
* sem_ch6.adb (Analyze_Procedure_Call): Check the levels after
the call has been resolved and the previous ghost region has
been restored.

4 weeks agoada: Reserve Is_Constructor for Ada constructors
Denis Mazzucato [Thu, 30 Oct 2025 11:56:58 +0000 (12:56 +0100)] 
ada: Reserve Is_Constructor for Ada constructors

This patch renames old Is_Constructor to a new Is_CPP_Constructor and reserves
Is_Constructor for Ada constructors.

gcc/ada/ChangeLog:

* sem_util.adb (Is_Constructor_Procedure): Replace by Is_Constructor.
* sem_util.ads: Likewise.
* sem_ch6.adb (Analyze_Direct_Attribute_Definition): Set Is_Constructor.
* einfo.ads: Use Is_Constructor for Ada constructors, and
Is_CPP_Constructor for CPP constructors.
* exp_ch6.adb: Likewise.
* exp_disp.adb: Likewise.
* freeze.adb: Likewise.
* gen_il-fields.ads: Likewise.
* gen_il-gen-gen_entities.adb: Likewise.
* gen_il-internals.adb: Likewise.
* par-ch6.adb: Likewise.
* sem_prag.adb: Likewise.
* treepr.adb: Likewise.

4 weeks agoada: Avoid duplicate streaming and Put_Image subprograms (part2).
Steve Baird [Tue, 4 Nov 2025 23:01:14 +0000 (15:01 -0800)] 
ada: Avoid duplicate streaming and Put_Image subprograms (part2).

Follow up fixes for earlier changes made for this issue.

gcc/ada/ChangeLog:

* exp_attr.adb (Expand_N_Attribute_Reference): Ensure that
Build_Record_Or_Elementary_Input_Function and
Build_Record_Or_Elementary_Output_Procedure are only called
from within an instance of Build_And_Insert_Type_Attr_Subp.
In particular, the results returned by those 2 functions should
not be passed directly to Insert_Action. This is needed to
ensure that the newly-built subprogram is inserted at the correct
point in the tree.

4 weeks agoada: Improve warning on abstract equality
Bob Duff [Wed, 5 Nov 2025 14:14:35 +0000 (09:14 -0500)] 
ada: Improve warning on abstract equality

In many cases, we warn if an abstract equality function
is called implicitly. In the case of record equality,
this patch adds a mention of the particular component_declaration
for which an abstract "=" is invoked; otherwise it is hard to
understand the warning for record types with many components.

gcc/ada/ChangeLog:

* exp_ch4.adb (Warn_On_Abstract_Equality_For_Component):
Add additional information in the record-component case.

4 weeks agoada: Update implementation for ghost entities inside ignored regions
Viljar Indus [Mon, 3 Nov 2025 11:10:32 +0000 (13:10 +0200)] 
ada: Update implementation for ghost entities inside ignored regions

gcc/ada/ChangeLog:

* ghost.adb (Check_Valid_Ghost_Policy): Remove function.
(Ghost_Policy_In_Effect): Force the ghost policy to be always be
ignore inside ignored regions.
(Mark_And_Set_Ghost_Declaration): Likewise.

4 weeks agoada: Don't generate function that violates No_Dynamic_Sized_Objects restriction
Steve Baird [Thu, 30 Oct 2025 21:40:06 +0000 (14:40 -0700)] 
ada: Don't generate function that violates No_Dynamic_Sized_Objects restriction

In some cases, the compiler implicitly generates a hash function for an
enumeration type. If a No_Dynamic_Sized_Objects restriction is in effect then
that hash function violates the restriction, resulting in a compilation
failure. Therefore, do not generate the hash function in that case.

gcc/ada/ChangeLog:

* exp_imgv.adb (Build_Enumeration_Image_Tables): If a
No_Dynamic_Sized_Objects restriction is in effect, then choose a large
value for Threshold so that no Lit_Hash function is generated.

4 weeks agoada: Fix mistake in recent patch
Ronan Desplanques [Tue, 4 Nov 2025 16:23:13 +0000 (17:23 +0100)] 
ada: Fix mistake in recent patch

A recent patch removed the wrong record definition in
s-taspri__mingw.ads, this patch fixes that mistake.

gcc/ada/ChangeLog:

* libgnarl/s-taspri__mingw.ads (Suspension_Object): Remove.
(Private_Data): Revert unintentional removal.

4 weeks agoada: Add ATC to suspension objects
Ronan Desplanques [Fri, 31 Oct 2025 15:23:44 +0000 (16:23 +0100)] 
ada: Add ATC to suspension objects

This patch makes suspension objects receptive to asynchronous transfers
of control, i.e. aborts. It also replaces the multiple platform-dependent
implementations of suspension objects with a single implementation
relying on the existing abstractions RTS_Lock, Sleep and Wakeup.

gcc/ada/ChangeLog:

* libgnarl/a-sytaco.ads (Suspension_Object): Change components.
* libgnarl/a-sytaco.adb (Initialize, Finalize, Current_State,
Set_False, Set_True, Suspend_Until_True): New cross-platform version.
* libgnarl/s-taskin.ads (Task_States): New task state.
* libgnarl/s-tasini.adb (Locked_Abort_To_Level): Adapt to new state.
* libgnarl/s-taprop.ads (Is_Task_Context): New function Spec.
(Initialize, Finalize, Current_State, Set_False, Set_True,
Suspend_Until_True): Remove.
* libgnarl/s-taprop__dummy.adb (Is_Task_Context): New body.
(Initialize, Finalize, Current_State, Set_False, Set_True,
Suspend_Until_True): Remove.
* libgnarl/s-taprop__linux.adb (Is_Task_Context): New body.
(Initialize, Finalize, Current_State, Set_False, Set_True,
Suspend_Until_True): Remove.
* libgnarl/s-taprop__mingw.adb (Is_Task_Context): New body.
(Initialize, Finalize, Current_State, Set_False, Set_True,
Suspend_Until_True): Remove.
* libgnarl/s-taprop__posix.adb (Is_Task_Context): New body.
(Initialize, Finalize, Current_State, Set_False, Set_True,
Suspend_Until_True): Remove.
* libgnarl/s-taprop__qnx.adb (Is_Task_Context): New body.
(Initialize, Finalize, Current_State, Set_False, Set_True,
Suspend_Until_True): Remove.
* libgnarl/s-taprop__rtems.adb (Is_Task_Context): New body.
(Initialize, Finalize, Current_State, Set_False, Set_True,
Suspend_Until_True): Remove.
* libgnarl/s-taprop__solaris.adb (Is_Task_Context): New body.
(Initialize, Finalize, Current_State, Set_False, Set_True,
Suspend_Until_True): Remove.
* libgnarl/s-taprop__vxworks.adb (Is_Task_Context): Remove spec.
(Initialize, Finalize, Current_State, Set_False, Set_True,
Suspend_Until_True): Remove.
* libgnarl/s-taspri__dummy.ads (Suspension_Object): Remove.
* libgnarl/s-taspri__lynxos.ads (Suspension_Object): Remove.
* libgnarl/s-taspri__mingw.ads (Suspension_Object): Remove.
* libgnarl/s-taspri__posix-noaltstack.ads (Suspension_Object):
Remove.
* libgnarl/s-taspri__posix.ads (Suspension_Object): Remove.
* libgnarl/s-taspri__solaris.ads (Suspension_Object): Remove.
* libgnarl/s-taspri__vxworks.ads (Suspension_Object): Remove.

4 weeks agoada: Use Finalizable for suspension objects
Ronan Desplanques [Mon, 3 Nov 2025 11:44:49 +0000 (12:44 +0100)] 
ada: Use Finalizable for suspension objects

The only reason Suspension_Object was a tagged type before this patch was
to have finalization. This patch makes it use the Finalizable aspect,
which is more lightweight.

gcc/ada/ChangeLog:

* libgnarl/a-sytaco.ads (Suspension_Object): Use Finalizable aspect.

4 weeks agotree-optimization/122736 - OMP SIMD call mask recording
Richard Biener [Tue, 18 Nov 2025 10:30:26 +0000 (11:30 +0100)] 
tree-optimization/122736 - OMP SIMD call mask recording

When recording the mask for loop masking of OMP SIMD calls we
currently fail to provide the correct vector type and number of
copies in all cases.  The following tries to correct this.

PR tree-optimization/122736
* tree-vect-stmts.cc (vectorizable_simd_clone_call): Compute
num_mask_args for all mask modes.  Pass the mask vector
type to vect_record_loop_mask and adjust ncopies according
to the number of mask arguments.

* gcc.target/i386/vect-pr122736.c: New testcase.

4 weeks ago[RISC-V] Add cpu and tuning structures for spacemit-x60 design
Austin Law [Tue, 18 Nov 2025 13:51:12 +0000 (06:51 -0700)] 
[RISC-V] Add cpu and tuning structures for spacemit-x60 design

Per the discussion a couple weeks ago in the patchwork call, I'm submitting the
spacemit-x60 basic core and tuning info on Austin's behalf.

I know everyone would like to have performance data, but with 8%+ run to run
variation with the same binary and ~10hr cycle times for spec2017 (integer ref
only), getting data with any degree of confidence is exceedingly hard when the
improvements are expected to be in the low single digits.  It just takes so
many runs to get a reasonable confidence interval.

This also does not include the vector pipeline model.  I think we know how we
want to model it, but it's not really started yet.  Per our discussion this
(and further twiddles to the tuning/pipeline model) can be made during
stage3/stage4 given the low risk of breaking anything.

We're also likely going to want to make adjustments to the vector cost
structure.  Right now it's using the generic cost structure.  Overall it looks
like the spacemit-x60 has better than expected segment support, but worse than
expected stride support.  So the trick of using strides to avoid the permute in
SATD likely isn't viable (setting aside the unaligned vector element issues).

Anyway, the goal is to get the basics in place so that the -mcpu/-mtune options
work and we can iterate on finer details.

I'll wait for pre-commit CI to do its thing.  There's no rush to commit, just
to get it submitted.  I have no plans to work in Pago Pago tonight to
get anything else submitted before the stage1 close deadline.

* config/riscv/riscv-cores.def: Add RISCV_TUNE and RISCV_CORE entries
for the spacemit-x60 design.
* config/riscv/riscv-opts.h (riscv_microarchitecture_type): Add entry
for spacemit-x60 design.
* config/riscv/riscv.cc (spacemit_x60_tune_info): New tune structure
for the spacemit-x60 design.
* config/riscv/riscv.md (tune): Add spacemit_x60.
Include spacemit-x60.md.
* config/riscv/spacemit-x60.md: New file
* doc/riscv-mtune.texi: Regenerate.
* doc/riscv-mcpu.texi: Regenerate.

4 weeks agotree-optimization/122723 - masking of .COND_ADD reductions
Richard Biener [Tue, 18 Nov 2025 08:59:54 +0000 (09:59 +0100)] 
tree-optimization/122723 - masking of .COND_ADD reductions

The following fixes loop masking of .COND_ADD reductions when
we decide to reduce multiple lanes to one, thus go through
vect_transform_reduction.  The first issue is in
vect_reduction_update_partial_vector_usage which does not handle
incoming .COND_ADD well and fails to compute 'cond_fn' in this
case, disabling masking.  The second issue is that
vect_transform_reduction does not implement the masked but
not mask-by-cond case for any .COND_* operation.  The following
should fix both.

The testcases verify runtime in vect.exp and vectorization support
in the i386 target section for the combinations of -O3, -Ofast
plus masked vs. non-masked epilogues.

PR tree-optimization/122723
* tree-vect-loop.cc (vect_reduction_update_partial_vector_usage):
Handle incoming .COND_* operation.
(vect_transform_reduction): Likewise.  Handle .COND_*
operation when not using COND_EXPR masking in a masked loop.

* gcc.dg/vect/vect-reduc-cond-add-1.c: New generic functional
testcase.
* gcc.target/i386/vect-epilogues-6.c: New testcase.
* gcc.target/i386/vect-epilogues-7.c: Likewise.
* gcc.target/i386/vect-epilogues-8.c: Likewise.
* gcc.target/i386/vect-epilogues-9.c: Likewise.

4 weeks agotree-optimization/122723 - fix multi-step mask conversion
Richard Biener [Tue, 18 Nov 2025 07:12:33 +0000 (08:12 +0100)] 
tree-optimization/122723 - fix multi-step mask conversion

The following fixes the logic in multi-step mask conversions with
respect to the case where we need to resort to the sbool variant
of the unpack optabs.  We were testing a wrong condition on when
that would apply in the multi-step case.

PR tree-optimization/122723
* tree-vect-stmts.cc (supportable_widening_operation):
Correct optab to query in the multi-step case when it is
supposed to hit the sbool case.

4 weeks agolibstdc++: Fix construction function_ref from nontype<&S::x> and reference_wrapper...
Tomasz Kamiński [Fri, 24 Oct 2025 14:45:59 +0000 (16:45 +0200)] 
libstdc++: Fix construction function_ref from nontype<&S::x> and reference_wrapper [PR121858]

To reduce instantiation count, function_ref(nontype<&S::x>, r) previously
reused the invoker from function_ref(nontype<&S::x>, &r). This assumed r was
always a reference to S or a derived class. However, this constructor is also
valid for lvalues (but not rvalues) of reference_wrapper specializations.

This patch fixes this by limiting above optimization only to situations,
when argument is not specialization of reference_wrapper. This is achieved
bu comparing __inv_unwrap<_Td>::type with _Td. We use __inv_unwrap because
unwrap_reference_t does not handle cv-qualified types.

PR libstdc++/121858

libstdc++-v3/ChangeLog:

* include/bits/funcref_impl.h
(function_ref::function_ref(nontype<__fn>, _Up&&)): Handle.
reference_wrapper.
* testsuite/20_util/function_ref/call.cc: Call and update
test05(). Add new test06() for reference_wrapper.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
Signed-off-by: Tomasz Kamiński <tkaminsk@redhat.com>