hjl [Sun, 5 Aug 2018 12:46:13 +0000 (12:46 +0000)]
i386: Set cfun->machine->max_used_stack_alignment if needed
cfun->machine->max_used_stack_alignment is used to decide how stack frame
should be aligned. This is independent of any psABIs nor 32-bit vs 64-bit.
It is always safe to compute max_used_stack_alignment. We compute it only
if 128-bit aligned load/store may be generated on misaligned stack slot
which will lead to segfault.
gcc/
PR target/86386
* config/i386/i386.c (ix86_finalize_stack_frame_flags): Set
cfun->machine->max_used_stack_alignment if needed.
gcc/testsuite/
PR target/86386
* gcc.target/i386/pr86386.c: New file.
vries [Sat, 4 Aug 2018 20:07:22 +0000 (20:07 +0000)]
[libgomp, nvptx, --without-cuda-driver] Don't use system cuda driver
Using libgomp configure option --with-cuda-driver=<dir> we can indicate what
cuda driver to use to build the libgomp nvptx plugin. Without such an option,
the system cuda driver is used, if available. If not availabe, a dlopen
interface is used instead.
However, when we use --without-cuda-driver (or the equivalent
--with-cuda-driver=no) the system cuda driver is still used if available.
This patch fixes that, making sure that --without-cuda-driver selects the dlopen
interface.
Build on x86_64 with nvptx accelerator and tested libgomp testsuite, with and
without option --without-cuda-driver.
2018-08-04 Tom de Vries <tdevries@suse.de>
* plugin/configfrag.ac: For --without-cuda-driver, set
CUDA_DRIVER_INCLUDE and CUDA_DRIVER_LIB to no. Handle
CUDA_DRIVER_INCLUDE == no and CUDA_DRIVER_LIB == no.
* configure: Regenerate.
dmalcolm [Fri, 3 Aug 2018 18:38:13 +0000 (18:38 +0000)]
Add fix-it hint for missing return statement in assignment operators (PR c++/85523)
gcc/cp/ChangeLog:
PR c++/85523
* decl.c: Include "gcc-rich-location.h".
(add_return_star_this_fixit): New function.
(finish_function): When warning about missing return statements in
functions returning non-void, add a "return *this;" fix-it hint for
assignment operators.
jsm28 [Fri, 3 Aug 2018 15:25:35 +0000 (15:25 +0000)]
Avoid infinite loop with duplicate anonymous union fields (PR c/86690).
If a struct contains an anonymous union and both have a field with the
same name, detect_field_duplicates_hash() will replace one of them
with NULL. If compilation doesn't stop immediately, it may later call
lookup_field() on the union, which falsely assumes the union's
LANG_SPECIFIC array is sorted, and may loop indefinitely because of
this.
2018-08-03 Bogdan Harjoc <harjoc@gmail.com>
PR c/86690
gcc/c:
* c-typeck.c (lookup_field): Do not use TYPE_LANG_SPECIFIC after
errors.
gcc/testsuite:
* gcc.dg/union-duplicate-field.c: New test.
rsandifo [Fri, 3 Aug 2018 12:56:55 +0000 (12:56 +0000)]
Handle SLP of call pattern statements
We couldn't vectorise:
for (int j = 0; j < n; ++j)
{
for (int i = 0; i < 16; ++i)
a[i] = (b[i] + c[i]) >> 1;
a += step;
b += step;
c += step;
}
at -O3 because cunrolli unrolled the inner loop and SLP couldn't handle
AVG_FLOOR patterns (see also PR86504). The problem was some overly
strict checking of pattern statements compared to normal statements
in vect_get_and_check_slp_defs:
switch (gimple_code (def_stmt))
{
case GIMPLE_PHI:
case GIMPLE_ASSIGN:
break;
The easy fix would have been to add GIMPLE_CALL to the switch,
but I don't think the switch is doing anything useful. We only create
pattern statements that the rest of the vectoriser can handle, and the
other checks in this function and elsewhere check whether SLP is possible.
I'm also not sure why:
if (!first && !oprnd_info->first_pattern
/* Allow different pattern state for the defs of the
first stmt in reduction chains. */
&& (oprnd_info->first_dt != vect_reduction_def
is necessary. All that should matter is that the statements in the
node are "similar enough". It turned out to be quite hard to find a
convincing example that used a mixture of pattern and non-pattern
statements, so bb-slp-pow-1.c is the best I could come up with.
But it does show that the combination of "xi * xi" statements and
"pow (xj, 2) -> xj * xj" patterns are handled correctly.
The patch therefore just removes the whole if block.
The loop also needed commutative swapping to be extended to at least
AVG_FLOOR.
This gives +3.9% on 525.x264_r at -O3.
2018-08-03 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* internal-fn.h (first_commutative_argument): Declare.
* internal-fn.c (first_commutative_argument): New function.
* tree-vect-slp.c (vect_get_and_check_slp_defs): Remove extra
restrictions for pattern statements. Use first_commutative_argument
to look for commutative operands in calls to internal functions.
gcc/testsuite/
* gcc.dg/vect/bb-slp-over-widen-1.c: Expect AVG_FLOOR to be used
on vect_avg_qi targets.
* gcc.dg/vect/bb-slp-over-widen-2.c: Likewise.
* gcc.dg/vect/bb-slp-pow-1.c: New test.
* gcc.dg/vect/vect-avg-15.c: Likewise.
redi [Fri, 3 Aug 2018 12:53:34 +0000 (12:53 +0000)]
Add workaround for non-unique errno values on AIX
* src/c++11/system_error.cc
(system_error_category::default_error_condition): Add workaround for
ENOTEMPTY and EEXIST having the same value on AIX.
* testsuite/19_diagnostics/error_category/system_category.cc: Add
extra testcases for EDOM, EILSEQ, ERANGE, EEXIST and ENOTEMPTY.
vries [Fri, 3 Aug 2018 11:21:09 +0000 (11:21 +0000)]
[c++] Don't emit exception tables for UI_NONE
If a target does not support exceptions, it can indicate this by returning
UI_NONE in TARGET_EXCEPT_UNWIND_INFO. Currently the compiler still emits
exception tables for such a target.
This patch makes sure that no exception tables are emitted if the target does
not support exceptions. This allows us to remove a workaround in
TARGET_ASM_BYTE_OP in the nvptx port.
Build on x86_64 with nvptx accelerator, and tested libgomp.
Build and reg-tested on x86_64.
2018-08-03 Tom de Vries <tdevries@suse.de>
* common/config/nvptx/nvptx-common.c (nvptx_except_unwind_info): Return
UI_NONE.
* config/nvptx/nvptx.c (TARGET_ASM_BYTE_OP): Remove define.
* except.c (output_function_exception_table): Do early exit if
targetm_common.except_unwind_info (&global_options) == UI_NONE.
siddhesh [Fri, 3 Aug 2018 01:51:42 +0000 (01:51 +0000)]
[aarch64] Fix falkor pipeline description for dup<q>
There was a typo in the pipeline description where DUP was assigned to
the vector pipes for quad mode ops when it really only uses the VTOG
pipes. Fixing this does not show any noticeable difference in
performance (there's a very small bump of 1.7% in x264 but that's
about it) in my tests but is the more precise description of operations
for falkor.
* config/aarch64/falkor.md (falkor_am_1_vxvy_vxvy): Move
neon_dup_q to...
(falkor_am_1_gtov_gtov): ... a new insn reservation.
dmalcolm [Thu, 2 Aug 2018 20:07:28 +0000 (20:07 +0000)]
Fix memory leak of pretty_printer prefixes
We were rather sloppy about handling the ownership of prefixes for
pretty_printer, and this lead to a memory leak for any time a
diagnostic_show_locus call emits multiple line spans.
This showed up in "make selftest-valgrind" as:
3,976 bytes in 28 blocks are definitely lost in loss record 632 of 669
at 0x4A0645D: malloc (in /usr/lib64/valgrind/vgpreload_memcheck-amd64-linux.so)
by 0x1F08227: xmalloc (xmalloc.c:147)
by 0x1F083E6: xvasprintf (xvasprintf.c:58)
by 0x1E7EC7D: build_message_string(char const*, ...) (diagnostic.c:78)
by 0x1E7F438: diagnostic_get_location_text(diagnostic_context*, expanded_location) (diagnostic.c:328)
by 0x1E7FD54: default_diagnostic_start_span_fn(diagnostic_context*, expanded_location) (diagnostic.c:626)
by 0x1EB3508: selftest::test_diagnostic_context::start_span_cb(diagnostic_context*, expanded_location) (selftest-diagnostic.c:57)
by 0x1E89215: diagnostic_show_locus(diagnostic_context*, rich_location*, diagnostic_t) (diagnostic-show-locus.c:1992)
by 0x1E8ECAD: selftest::test_fixit_insert_containing_newline_2(selftest::line_table_case const&) (diagnostic-show-locus.c:3044)
by 0x1EB0606: selftest::for_each_line_table_case(void (*)(selftest::line_table_case const&)) (input.c:3525)
by 0x1E8F3F5: selftest::diagnostic_show_locus_c_tests() (diagnostic-show-locus.c:3164)
by 0x1E010BF: selftest::run_tests() (selftest-run-tests.c:88)
4,004 bytes in 28 blocks are definitely lost in loss record 633 of 669
at 0x4A0645D: malloc (in /usr/lib64/valgrind/vgpreload_memcheck-amd64-linux.so)
by 0x1F08227: xmalloc (xmalloc.c:147)
by 0x1F083E6: xvasprintf (xvasprintf.c:58)
by 0x1E7EC7D: build_message_string(char const*, ...) (diagnostic.c:78)
by 0x1E7F438: diagnostic_get_location_text(diagnostic_context*, expanded_location) (diagnostic.c:328)
by 0x1E7FD54: default_diagnostic_start_span_fn(diagnostic_context*, expanded_location) (diagnostic.c:626)
by 0x1EB3508: selftest::test_diagnostic_context::start_span_cb(diagnostic_context*, expanded_location) (selftest-diagnostic.c:57)
by 0x1E89215: diagnostic_show_locus(diagnostic_context*, rich_location*, diagnostic_t) (diagnostic-show-locus.c:1992)
by 0x1E8B373: selftest::test_diagnostic_show_locus_fixit_lines(selftest::line_table_case const&) (diagnostic-show-locus.c:2500)
by 0x1EB0606: selftest::for_each_line_table_case(void (*)(selftest::line_table_case const&)) (input.c:3525)
by 0x1E8F3B9: selftest::diagnostic_show_locus_c_tests() (diagnostic-show-locus.c:3159)
by 0x1E010BF: selftest::run_tests() (selftest-run-tests.c:88)
This patch fixes the leaks by ensuring that the pretty_printer "owns"
the prefix if it's non-NULL, freeing it in the dtor and in pp_set_prefix.
gcc/cp/ChangeLog:
* error.c (cxx_print_error_function): Duplicate "file" before
passing it to pp_set_prefix.
(cp_print_error_function): Use pp_take_prefix when saving the
existing prefix.
gcc/ChangeLog:
* diagnostic-show-locus.c (diagnostic_show_locus): Use
pp_take_prefix when saving the existing prefix.
* diagnostic.c (diagnostic_append_note): Likewise.
* langhooks.c (lhd_print_error_function): Likewise.
* pretty-print.c (pp_set_prefix): Drop the "const" from "prefix"
param's type. Free the existing prefix.
(pp_take_prefix): New function.
(pretty_printer::pretty_printer): Drop the prefix parameter.
Rename the length parameter to match the comment.
(pretty_printer::~pretty_printer): Free the prefix.
* pretty-print.h (pretty_printer::pretty_printer): Drop the prefix
parameter.
(struct pretty_printer): Drop the "const" from "prefix" field's
type and clarify memory management.
(pp_set_prefix): Drop the "const" from the 2nd param.
(pp_take_prefix): New decl.
acsawdey [Thu, 2 Aug 2018 18:11:54 +0000 (18:11 +0000)]
2018-07-31 Aaron Sawdey <acsawdey@linux.ibm.com>
* config/rs6000/rs6000-string.c (select_block_compare_mode): Move test
for word_mode_ok here instead of passing as argument.
(expand_block_compare): Change select_block_compare_mode() call.
(expand_strncmp_gpr_sequence): New function.
(expand_strn_compare): Make use of expand_strncmp_gpr_sequence.
vries [Thu, 2 Aug 2018 15:59:01 +0000 (15:59 +0000)]
[nvptx] Ignore c++ exceptions
The nvptx port can't support exceptions using sjlj, because ptx does not
support sjlj. However, default_except_unwind_info still returns UI_SJLJ, even
even if we configure with --disable-sjlj-exceptions, because UI_SJLJ is the
fallback option.
The reason default_except_unwind_info doesn't return UI_DWARF2 is because
DWARF2_UNWIND_INFO is not defined in defaults.h, because
INCOMING_RETURN_ADDR_RTX is not defined, because there's no ptx equivalent.
Testcase libgomp.c++/for-15.C currently doesn't compile unless fno-exceptions
is added because:
- it tries to generate sjlj exception handling code, and
- it tries to generate exception tables using label-addressed .byte sequence.
Ptx doesn't support generating random data at a label, nor being able to
load/write data relative to a label.
This patch fixes the first problem by using UI_TARGET for nvptx.
The second problem is worked around by generating all .byte sequences commented
out. It would be better to have a narrower workaround, and define
TARGET_ASM_BYTE_OP to "error: .byte unsupported " or some such.
This patch does not enable exceptions for nvptx, it merely allows c++ programs
to run correctly if they do no use exception handling.
Build and reg-tested on x86_64 with nvptx accelerator.
2018-08-02 Tom de Vries <tdevries@suse.de>
PR target/86660
* common/config/nvptx/nvptx-common.c (nvptx_except_unwind_info): New
function. Return UI_TARGET unconditionally.
(TARGET_EXCEPT_UNWIND_INFO): Redefine to nvptx_except_unwind_info.
* config/nvptx/nvptx.c (TARGET_ASM_BYTE_OP): Emit commented out '.byte'.
rguenth [Thu, 2 Aug 2018 13:19:50 +0000 (13:19 +0000)]
2018-08-02 Richard Biener <rguenther@suse.de>
PR tree-optimization/86816
* tree-ssa-tail-merge.c (tail_merge_valueize): New function
which checks for value availability before querying it.
(gvn_uses_equal): Use it.
(same_succ_hash): Likewise.
(gimple_equal_p): Likewise.
rsandifo [Thu, 2 Aug 2018 10:59:35 +0000 (10:59 +0000)]
[gen/AArch64] Generate helpers for substituting iterator values into pattern names
Given a pattern like:
(define_insn "aarch64_frecpe<mode>" ...)
the SVE ACLE implementation wants to generate the pattern for a
particular (non-constant) mode. This patch automatically generates
helpers to do that, specifically:
// Return CODE_FOR_nothing on failure.
insn_code maybe_code_for_aarch64_frecpe (machine_mode);
// Assert that the code exists.
insn_code code_for_aarch64_frecpe (machine_mode);
// Return NULL_RTX on failure.
rtx maybe_gen_aarch64_frecpe (machine_mode, rtx, rtx);
// Assert that generation succeeds.
rtx gen_aarch64_frecpe (machine_mode, rtx, rtx);
Many patterns don't have sensible names when all <...>s are removed.
E.g. "<optab><mode>2" would give a base name "2". The new functions
therefore require explicit opt-in, which should also help to reduce
code bloat.
The (arbitrary) opt-in syntax I went for was to prefix the pattern
name with '@', similarly to the existing '*' marker.
The patch also makes config/aarch64 use the new routines in cases where
they obviously apply. This was mostly straight-forward, but it seemed
odd that we defined:
aarch64_reload_movcp<...><P:mode>
but then only used it with DImode, never SImode. If we should be
using Pmode instead of DImode, then that's a simple change,
but should probably be a separate patch.
2018-08-02 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* doc/md.texi: Expand the documentation of instruction names
to mention port-local uses. Document '@' in pattern names.
* read-md.h (overloaded_instance, overloaded_name): New structs.
(mapping): Declare.
(md_reader::handle_overloaded_name): New member function.
(md_reader::get_overloads): Likewise.
(md_reader::m_first_overload): New member variable.
(md_reader::m_next_overload_ptr): Likewise.
(md_reader::m_overloads_htab): Likewise.
* read-md.c (md_reader::md_reader): Initialize m_first_overload,
m_next_overload_ptr and m_overloads_htab.
* read-rtl.c (iterator_group): Add "type" and "get_c_token" fields.
(get_mode_token, get_code_token, get_int_token): New functions.
(map_attr_string): Add an optional argument that passes back
the associated iterator.
(overloaded_name_hash, overloaded_name_eq_p, named_rtx_p):
(md_reader::handle_overloaded_name, add_overload_instance): New
functions.
(apply_iterators): Handle '@' names. Report an error if '@'
is used without iterators.
(initialize_iterators): Initialize the new iterator_group fields.
* genopinit.c (handle_overloaded_code_for)
(handle_overloaded_gen): New functions.
(main): Use them to print declarations of maybe_code_for_* and
maybe_gen_* functions, and inline definitions of code_for_* and gen_*.
* genemit.c (print_overload_arguments, print_overload_test)
(handle_overloaded_code_for, handle_overloaded_gen): New functions.
(main): Use it to print definitions of maybe_code_for_* and
maybe_gen_* functions.
* config/aarch64/aarch64.c (aarch64_split_128bit_move): Use
gen_aarch64_mov{low,high}_di and gen_aarch64_movdi_{low,high}
instead of explicit mode checks.
(aarch64_split_simd_combine): Likewise gen_aarch64_simd_combine.
(aarch64_split_simd_move): Likewise gen_aarch64_split_simd_mov.
(aarch64_emit_load_exclusive): Likewise gen_aarch64_load_exclusive.
(aarch64_emit_store_exclusive): Likewise gen_aarch64_store_exclusive.
(aarch64_expand_compare_and_swap): Likewise
gen_aarch64_compare_and_swap and gen_aarch64_compare_and_swap_lse
(aarch64_gen_atomic_cas): Likewise gen_aarch64_atomic_cas.
(aarch64_emit_atomic_swap): Likewise gen_aarch64_atomic_swp.
(aarch64_constant_pool_reload_icode): Delete.
(aarch64_secondary_reload): Use code_for_aarch64_reload_movcp
instead of aarch64_constant_pool_reload_icode. Use
code_for_aarch64_reload_mov instead of explicit mode checks.
(rsqrte_type, get_rsqrte_type, rsqrts_type, get_rsqrts_type): Delete.
(aarch64_emit_approx_sqrt): Use gen_aarch64_rsqrte instead of
get_rsqrte_type and gen_aarch64_rsqrts instead of gen_rqrts_type.
(recpe_type, get_recpe_type, recps_type, get_recps_type): Delete.
(aarch64_emit_approx_div): Use gen_aarch64_frecpe instead of
get_recpe_type and gen_aarch64_frecps instead of get_recps_type.
(aarch64_atomic_load_op_code): Delete.
(aarch64_emit_atomic_load_op): Likewise.
(aarch64_gen_atomic_ldop): Use UNSPECV_ATOMIC_* instead of
aarch64_atomic_load_op_code. Use gen_aarch64_atomic_load
instead of aarch64_emit_atomic_load_op.
* config/aarch64/aarch64.md (aarch64_reload_movcp<GPF_TF:mode><P:mode>)
(aarch64_reload_movcp<VALL:mode><P:mode>, aarch64_reload_mov<mode>)
(aarch64_movdi_<mode>low, aarch64_movdi_<mode>high)
(aarch64_mov<mode>high_di, aarch64_mov<mode>low_di): Add a '@'
character before the pattern name.
* config/aarch64/aarch64-simd.md (aarch64_split_simd_mov<mode>)
(aarch64_rsqrte<mode>, aarch64_rsqrts<mode>)
(aarch64_simd_combine<mode>, aarch64_frecpe<mode>)
(aarch64_frecps<mode>): Likewise.
* config/aarch64/atomics.md (atomic_compare_and_swap<mode>)
(aarch64_compare_and_swap<mode>, aarch64_compare_and_swap<mode>_lse)
(aarch64_load_exclusive<mode>, aarch64_store_exclusive<mode>)
(aarch64_atomic_swp<mode>, aarch64_atomic_cas<mode>)
(aarch64_atomic_load<atomic_ldop><mode>): Likewise.
2018-08-02 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/aarch64.c (aarch64_float_const_representable_p):
Allow HFmode constants if TARGET_FP_F16INST.
gcc/testsuite/
* gcc.target/aarch64/f16_mov_immediate_1.c: Expect fmov immediate
to be used.
* gcc.target/aarch64/f16_mov_immediate_2.c: Likewise.
* gcc.target/aarch64/f16_mov_immediate_3.c: Force +nofp16.
* gcc.target/aarch64/sve/single_1.c: Except fmov immediate to be used
for .h.
* gcc.target/aarch64/sve/single_2.c: Likewise.
* gcc.target/aarch64/sve/single_3.c: Likewise.
* gcc.target/aarch64/sve/single_4.c: Likewise.
thopre01 [Thu, 2 Aug 2018 09:07:17 +0000 (09:07 +0000)]
[ARM] Fix PR85434: spilling of stack protector guard's address on ARM
In case of high register pressure in PIC mode, address of the stack
protector's guard can be spilled on ARM targets as shown in PR85434,
thus allowing an attacker to control what the canary would be compared
against. This is also known as CVE-2018-12886. ARM does lack
stack_protect_set and stack_protect_test insn patterns, defining them
does not help as the address is expanded regularly and the patterns
only deal with the copy and test of the guard with the canary.
This problem does not occur for x86 targets because the PIC access and
the test can be done in the same instruction. Aarch64 is exempt too
because PIC access insn pattern are mov of UNSPEC which prevents it from
the second access in the epilogue being CSEd in cse_local pass with the
first access in the prologue.
The approach followed here is to create new "combined" set and test
standard pattern names that take the unexpanded guard and do the set or
test. This allows the target to use an opaque pattern (eg. using UNSPEC)
to hide the individual instructions being generated to the compiler and
split the pattern into generic load, compare and branch instruction
after register allocator, therefore avoiding any spilling. This is here
implemented for the ARM targets. For targets not implementing these new
standard pattern names, the existing stack_protect_set and
stack_protect_test pattern names are used.
To be able to split PIC access after register allocation, the functions
had to be augmented to force a new PIC register load and to control
which register it loads into. This is because sharing the PIC register
between prologue and epilogue could lead to spilling due to CSE again
which an attacker could use to control what the canary gets compared
against.
2018-08-02 Thomas Preud'homme <thomas.preudhomme@linaro.org>
gcc/
PR target/85434
* target-insns.def (stack_protect_combined_set): Define new standard
pattern name.
(stack_protect_combined_test): Likewise.
* cfgexpand.c (stack_protect_prologue): Try new
stack_protect_combined_set pattern first.
* function.c (stack_protect_epilogue): Try new
stack_protect_combined_test pattern first.
* config/arm/arm.c (require_pic_register): Add pic_reg and compute_now
parameters to control which register to use as PIC register and force
reloading PIC register respectively. Insert in the stream of insns if
possible.
(legitimize_pic_address): Expose above new parameters in prototype and
adapt recursive calls accordingly.
(arm_legitimize_address): Adapt to new legitimize_pic_address
prototype.
(thumb_legitimize_address): Likewise.
(arm_emit_call_insn): Adapt to new require_pic_register prototype.
* config/arm/arm-protos.h (legitimize_pic_address): Adapt to prototype
change.
* config/arm/arm.md (movsi expander): Adapt to legitimize_pic_address
prototype change.
(stack_protect_combined_set): New insn_and_split pattern.
(stack_protect_set): New insn pattern.
(stack_protect_combined_test): New insn_and_split pattern.
(stack_protect_test): New insn pattern.
* config/arm/unspecs.md (UNSPEC_SP_SET): New unspec.
(UNSPEC_SP_TEST): Likewise.
* doc/md.texi (stack_protect_combined_set): Document new standard
pattern name.
(stack_protect_set): Clarify that the operand for guard's address is
legal.
(stack_protect_combined_test): Document new standard pattern name.
(stack_protect_test): Clarify that the operand for guard's address is
legal.
gcc/testsuite/
PR target/85434
* gcc.target/arm/pr85434.c: New test.
PR tree-optimization/86650
* c-objc-common.c (c_tree_printer): Move usage of EXPR_LOCATION (t)
and TREE_BLOCK (t) from within percent_K_format to this callsite.
gcc/c-family/ChangeLog:
PR tree-optimization/86650
* c-family/c-format.c (gcc_tdiag_char_table): Update comment for "%G".
(gcc_cdiag_char_table, gcc_cxxdiag_char_table): Same.
(init_dynamic_diag_info): Update from "gcall *" to "gimple *".
* c-format.h (T89_G): Update to be "gimple *" rather than
"gcall *".
(local_gcall_ptr_node): Rename...
(local_gimple_ptr_node): ...to this.
gcc/cp/ChangeLog:
PR tree-optimization/86650
* error.c (cp_printer): Move usage of EXPR_LOCATION (t) and
TREE_BLOCK (t) from within percent_K_format to this callsite.
gcc/ChangeLog:
PR tree-optimization/86650
* gimple-pretty-print.c (percent_G_format): Accept a "gimple *"
rather than a "gcall *". Directly pass the data of interest
to percent_K_format, rather than building a temporary CALL_EXPR
to hold it.
* gimple-fold.c (gimple_fold_builtin_strncpy): Adjust.
(gimple_fold_builtin_strncat): Adjust.
* gimple-ssa-warn-restrict.h (check_bounds_or_overlap): Replace
gcall* argument with gimple*.
* gimple-ssa-warn-restrict.c (check_call): Same.
(wrestrict_dom_walker::before_dom_children): Same.
(builtin_access::builtin_access): Same.
(check_bounds_or_overlap): Same
(maybe_diag_overlap): Same.
(maybe_diag_offset_bounds): Same.
* tree-diagnostic.c (default_tree_printer): Move usage of
EXPR_LOCATION (t) and TREE_BLOCK (t) from within percent_K_format
to this callsite.
* tree-pretty-print.c (percent_K_format): Add argument.
* tree-pretty-print.h: Add argument.
* tree-ssa-ccp.c (pass_post_ipa_warn::execute): Adjust.
* tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Adjust.
(maybe_diag_stxncpy_trunc): Same.
(handle_builtin_stxncpy): Same.
(handle_builtin_strcat): Same.
ian [Wed, 1 Aug 2018 21:55:05 +0000 (21:55 +0000)]
* xcoff.c (struct xcoff_line, struct xcoff_line_vector): Remove.
(struct xcoff_func, struct xcoff_func_vector): New structs.
(xcoff_syminfo): Drop leading dot from symbol name.
(xcoff_line_compare, xcoff_line_search): Remove.
(xcoff_func_compare, xcoff_func_search): New static functions.
(xcoff_lookup_pc): Search function table.
(xcoff_add_line, xcoff_process_linenos): Remove.
(xcoff_initialize_fileline): Build function table.
redi [Wed, 1 Aug 2018 19:52:46 +0000 (19:52 +0000)]
Add -D_GLIBCXX_ASSERTIONS to DEBUG_FLAGS
Enable assertions in the extra debug library built when
--enable-libstdcxx-debug is used. Replace some Debug Mode assertions
in src/c++11/futex.cc with __glibcxx_assert, because the library will
never be built with Debug Mode.
* configure: Regenerate.
* configure.ac: Add -D_GLIBCXX_ASSERTIONS to default DEBUG_FLAGS.
* src/c++11/futex.cc: Use __glibcxx_assert instead of
_GLIBCXX_DEBUG_ASSERT.
mpolacek [Wed, 1 Aug 2018 17:17:29 +0000 (17:17 +0000)]
Cherry-pick compiler-rt revision 318044 and 319180.
[PowerPC][tsan] Update tsan to handle changed memory layouts in newer kernels
In more recent Linux kernels with 47 bit VMAs the layout of virtual memory
for powerpc64 changed causing the thread sanitizer to not work properly. This
patch adds support for 47 bit VMA kernels for powerpc64.
Tested on several 4.x and 3.x kernel releases.
Regtested/bootstrapped on ppc64le-linux with kernel 4.14; applying to
trunk/8.3.
rsandifo [Wed, 1 Aug 2018 16:03:13 +0000 (16:03 +0000)]
[AArch64] Update expected output for sve/var_stride_[24].c
After Segher's recent combine change, these tests now use a single
instruction to do the "and" and "lsl 10". This is a good thing,
so the patch updates the expected output accordingly.
2018-08-01 Richard Sandiford <richard.sandiford@arm.com>
gcc/testsuite/
* gcc.target/aarch64/sve/var_stride_2.c: Update expected form
of range check.
* gcc.target/aarch64/sve/var_stride_4.c: Likewise.
rsandifo [Wed, 1 Aug 2018 15:46:12 +0000 (15:46 +0000)]
Fold pointer range checks with equal spans
When checking whether vectorised accesses at A and B are independent,
the vectoriser falls back to tests of the form:
A + size <= B || B + size <= A
But in the common case that "size" is just the constant size of a vector
(or a small multiple), it would be more efficient to do:
(size_t) (A + (size - 1) - B) > (size - 1) * 2
This patch adds folds to do that. E.g. before the patch, the alias
checks for:
for (int j = 0; j < n; ++j)
{
for (int i = 0; i < 16; ++i)
a[i] = (b[i] + c[i]) >> 1;
a += step;
b += step;
c += step;
}
were:
add x7, x1, 15
add x5, x0, 15
cmp x0, x7
add x7, x2, 15
ccmp x1, x5, 2, ls
cset w8, hi
cmp x0, x7
ccmp x2, x5, 2, ls
cset w4, hi
tst w8, w4
while after the patch they're:
add x0, x0, 15
sub x6, x0, x1
sub x5, x0, x2
cmp x6, 30
ccmp x5, 30, 0, hi
The old scheme needs:
[A] one addition per vector pointer
[B] two comparisons and one IOR per range check
The new one needs:
[C] less than one addition per vector pointer
[C] one subtraction and one comparison per range check
The range checks are then ANDed together, with the same number of
ANDs either way.
With conditional comparisons (such as on AArch64), we're able to remove
the IOR between comparisons in the old scheme, but then need an explicit
AND or branch when combining the range checks, as the example above shows.
With the new scheme we can instead use conditional comparisons for
the AND chain.
So even with conditional comparisons, the new scheme should in practice
be a win in almost all cases. Without conditional comparisons, the new
scheme removes at least one operation from [A] and one operation per
range check from [B], so should always give fewer operations overall.
2018-07-20 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* match.pd: Optimise pointer range checks.
gcc/testsuite/
* gcc.dg/pointer-range-check-1.c: New test.
* gcc.dg/pointer-range-check-2.c: Likewise.
But the existing implementation uses chrono::system_clock. Now that
wait_until has potentially-different behaviour for chrono::steady_clock,
let's at least try to wait using the correct clock.
2018-08-01 Mike Crowe <mac@mcrowe.com>
* include/std/condition_variable (wait_for): Use steady_clock.
redi [Wed, 1 Aug 2018 15:39:45 +0000 (15:39 +0000)]
Report early wakeup of condition_variable::wait_until as no_timeout
As currently implemented, condition_variable always ultimately waits
against std::chrono::system_clock. This clock can be changed in arbitrary
ways by the user which may result in us waking up too early or too late
when measured against the caller-supplied clock.
We can't (yet) do much about waking up too late (PR 41861), but
if we wake up too early we must return cv_status::no_timeout to indicate a
spurious wakeup rather than incorrectly returning cv_status::timeout.
2018-08-01 Mike Crowe <mac@mcrowe.com>
* include/std/condition_variable (wait_until): Only report timeout
if we really have timed out when measured against the
caller-supplied clock.
* testsuite/30_threads/condition_variable/members/2.cc: Add test
case to confirm above behaviour.
rsandifo [Wed, 1 Aug 2018 15:29:36 +0000 (15:29 +0000)]
Fix remove_stmt in vectorizable_simd_clone_call (PR 86758)
vectorizable_simd_clone_call was trying to remove a pattern statement
instead of the original statement, Fixes existing tests
gcc.dg/pr84452.c and gcc.target/i386/pr84309.c on x86.
2018-08-01 Richard Sandiford <richard.sandiford@arm.com>
rsandifo [Wed, 1 Aug 2018 15:14:56 +0000 (15:14 +0000)]
[07/11] Use single basic block array in loop_vec_info
_loop_vec_info::_loop_vec_info used get_loop_array to get the
order of the blocks when creating stmt_vec_infos, but then used
dfs_enumerate_from to get the order of the blocks that the rest
of the vectoriser uses. We should be able to use that order
for creating stmt_vec_infos too.
2018-08-01 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Use the
result of dfs_enumerate_from when constructing stmt_vec_infos,
instead of additionally calling get_loop_body.
rsandifo [Wed, 1 Aug 2018 15:14:48 +0000 (15:14 +0000)]
[06/11] Handle VMAT_INVARIANT separately
Invariant loads were handled as a variation on the code for contiguous
loads. We detected whether they were invariant or not as a byproduct of
creating the vector pointer ivs: vect_create_data_ref_ptr passed back an
inv_p to say whether the pointer was invariant.
But vectorised invariant loads just keep the original scalar load,
so this meant that detecting invariant loads had the side-effect of
creating an unwanted vector pointer iv. The placement of the code
also meant that we'd create a vector load and then not use the result.
In principle this is wrong code, since there's no guarantee that there's
a vector's worth of accessible data at that address, but we rely on DCE
to get rid of the load before any harm is done.
E.g., for an invariant load in an inner loop (which seems like the more
common use case for this code), we'd create:
This patch moves the handling to its own block and makes
vect_create_data_ref_ptr assert (when creating a full iv) that the
address isn't invariant.
The ncopies handling is unfortunate, but a preexisting issue.
Richi's suggestion of using a vector of vector statements would
let us reuse one statement for all copies.
2018-08-01 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* tree-vectorizer.h (vect_create_data_ref_ptr): Remove inv_p
parameter.
* tree-vect-data-refs.c (vect_create_data_ref_ptr): Likewise.
When creating an iv, assert that the step is not known to be zero.
(vect_setup_realignment): Update call accordingly.
* tree-vect-stmts.c (vectorizable_store): Likewise.
(vectorizable_load): Likewise. Handle VMAT_INVARIANT separately.
rsandifo [Wed, 1 Aug 2018 15:14:42 +0000 (15:14 +0000)]
[05/11] Add a vect_stmt_to_vectorize helper function
This patch adds a helper that does the opposite of vect_orig_stmt:
go from the original scalar statement to the statement that should
actually be vectorised.
The use in the last two hunks of vectorizable_reduction are because
reduc_stmt_info (first hunk) and stmt_info (second hunk) are already
pattern statements if appropriate.
2018-08-01 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* tree-vectorizer.h (vect_stmt_to_vectorize): New function.
* tree-vect-loop.c (vect_update_vf_for_slp): Use it.
(vectorizable_reduction): Likewise.
* tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
(vect_detect_hybrid_slp_stmts): Likewise.
* tree-vect-stmts.c (vect_is_simple_use): Likewise.
rsandifo [Wed, 1 Aug 2018 14:58:47 +0000 (14:58 +0000)]
[01/11] Schedule SLP earlier
vect_transform_loop used to call vect_schedule_slp lazily when it
came across the first SLP statement, but it seems easier to do it
before the main loop.
2018-07-30 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* tree-vect-loop.c (vect_transform_loop_stmt): Remove slp_scheduled
argument.
(vect_transform_loop): Update calls accordingly. Schedule SLP
instances before the main loop, if any exist.
rsandifo [Wed, 1 Aug 2018 14:40:35 +0000 (14:40 +0000)]
Fix over-widening handling of COND_EXPRs (PR 86749)
This PR is a wrong-code bug caused by the over-widening support.
The minimum input precisions for a COND_EXPR are supposed to apply
only to the "then" and "else" values, but here we were applying
them to the operands of a nested COND_EXPR comparison instead.
2018-08-01 Richard Sandiford <richard.sandiford@arm.com>
gcc/
PR tree-optimization/86749
* tree-vect-patterns.c (vect_determine_min_output_precision_1):
If the lhs is used in a COND_EXPR, check that it is being used
as the "then" or "else" value.
gcc/testsuite/
PR tree-optimization/86749
* gcc.dg/vect/pr86749.c: New test.
redi [Wed, 1 Aug 2018 13:57:05 +0000 (13:57 +0000)]
PR libstdc++/60555 std::system_category() should recognise POSIX errno values
PR libstdc++/60555
* src/c++11/system_error.cc
(system_error_category::default_error_condition): New override to
check for POSIX errno values.
* testsuite/19_diagnostics/error_category/generic_category.cc: New
* testsuite/19_diagnostics/error_category/system_category.cc: New
test.
vries [Wed, 1 Aug 2018 13:20:22 +0000 (13:20 +0000)]
[libgomp, nvptx] Add cuda-lib.def
2018-08-01 Tom de Vries <tdevries@suse.de>
* plugin/cuda-lib.def: New file. Factor out of ...
* plugin/plugin-nvptx.c (CUDA_CALLS): ... here.
(struct cuda_lib_s, init_cuda_lib): Include cuda-lib.def instead of
using CUDA_CALLS.
marxin [Wed, 1 Aug 2018 10:50:48 +0000 (10:50 +0000)]
Improve dumping of value profiling transformations.
2018-08-01 Martin Liska <mliska@suse.cz>
* value-prof.c (gimple_divmod_fixed_value_transform): Unify
format how successful transformation is dumped.
(gimple_mod_pow2_value_transform): Likewise.
(gimple_mod_subtract_transform): Likewise.
(gimple_stringops_transform): Likewise.
2018-08-01 Martin Liska <mliska@suse.cz>
sudi [Wed, 1 Aug 2018 10:10:28 +0000 (10:10 +0000)]
[PATCH][AArch64] Stop redundant zero-extension after UMOV when in DI mode
This patch extends the aarch64_get_lane_zero_extendsi instruction
definition to also cover DI mode. This prevents a redundant AND
instruction from being generated due to the pattern failing to be matched.
Committed on behalf of Sam Tebbs.
gcc/
2018-08-01 Sam Tebbs <sam.tebbs@arm.com>
* config/aarch64/aarch64-simd.md
(*aarch64_get_lane_zero_extendsi<mode>): Rename to...
(*aarch64_get_lane_zero_extend<GPI:mode><VDQQH:mode>): ... This and
use GPI iterator instead of SI mode.
gcc/testsuite
2018-08-01 Sam Tebbs <sam.tebbs@arm.com>
* gcc.target/aarch64/extract_zero_extend.c: New file.
jakub [Wed, 1 Aug 2018 09:10:31 +0000 (09:10 +0000)]
PR c/85704
* c-typeck.c (init_field_decl_cmp): New function.
(output_pending_init_elements): Use it for field comparisons
instead of pure bit_position comparisons.
rearnsha [Wed, 1 Aug 2018 08:16:48 +0000 (08:16 +0000)]
rs6000 - add speculation_barrier pattern
This patch reworks the existing rs6000_speculation_barrier pattern to
work with the new __builtin_sepculation_safe_value() intrinsic. The
change is trivial as it simply requires renaming the existing speculation
barrier pattern.
So the total patch is to delete 14 characters!
* config/rs6000/rs6000.md (speculation_barrier): Renamed from
rs6000_speculation_barrier.
* config/rs6000/rs6000.c (rs6000_expand_builtin): Adjust for
new barrier pattern name.
rearnsha [Wed, 1 Aug 2018 08:16:38 +0000 (08:16 +0000)]
x86 - add speculation_barrier pattern
This patch adds a speculation barrier for x86, based on my
understanding of the required mitigation for that CPU, which is to use
an lfence instruction.
This patch needs some review by an x86 expert and if adjustments are
needed, I'd appreciate it if they could be picked up by the port
maintainer. This is supposed to serve as an example of how to deploy
the new __builtin_speculation_safe_value() intrinsic on this
architecture.
* config/i386/i386.md (unspecv): Add UNSPECV_SPECULATION_BARRIER.
(speculation_barrier): New insn.
PR libstdc++/86751 default assignment operators for std::pair
The solution for PR 77537 causes ambiguities due to the extra copy
assignment operator taking a __nonesuch_no_braces parameter. By making
the base class non-assignable we don't need the extra deleted overload
in std::pair. The copy assignment operator will be implicitly deleted
(and the move assignment operator not declared) as needed. Without the
additional user-provided operator in std::pair the ambiguity is avoided.
PR libstdc++/86751
* include/bits/stl_pair.h (__pair_base): New class with deleted copy
assignment operator.
(pair): Derive from __pair_base.
(pair::operator=): Remove deleted overload.
* python/libstdcxx/v6/printers.py (StdPairPrinter): New pretty printer
so that new base class isn't shown in GDB.
* testsuite/20_util/pair/86751.cc: New test.
* testsuite/20_util/pair/ref_assign.cc: New test.
Don't unconditionally define feature test macros in <version>
The macro definitions in <version> should depend on the same
preprocessor conditions as the original macros in other headers.
Otherwise <version> can define macros that imply the availability of
features that are not actually defined.
This fix is incomplete, as __cpp_lib_filesystem should depend on whether
libstdc++fs.a is supported, and several macros should only be defined
when _GLIBCXX_HOSTED is defined. Also, the feature test macros should
define their value as type long, but most are type int.
* include/bits/c++config (_GLIBCXX_HAVE_BUILTIN_HAS_UNIQ_OBJ_REP)
(_GLIBCXX_HAVE_BUILTIN_IS_AGGREGATE): Move definitions here.
(_GLIBCXX_HAVE_BUILTIN_LAUNDER): Likewise. Use !__is_identifier
instead of __has_builtin.
* include/std/type_traits (_GLIBCXX_HAVE_BUILTIN_HAS_UNIQ_OBJ_REP)
(_GLIBCXX_HAVE_BUILTIN_IS_AGGREGATE): Remove definitions from here.
* include/std/version [!_GLIBCXX_HAS_GTHREADS]
(__cpp_lib_shared_timed_mutex, __cpp_lib_scoped_lock)
(__cpp_lib_shared_mutex): Don't define when Gthreads not in use.
[!_GLIBCXX_HAVE_BUILTIN_HAS_UNIQ_OBJ_REP]
(__cpp_lib_has_unique_object_representations): Don't define when
builtin not available.
[!_GLIBCXX_HAVE_BUILTIN_IS_AGGREGATE] (__cpp_lib_is_aggregate):
Likewise.
[!_GLIBCXX_HAVE_BUILTIN_LAUNDER] (__cpp_lib_launder): Likewise.
* libsupc++/new (_GLIBCXX_HAVE_BUILTIN_LAUNDER): Remove definition
from here.
projects / thirdparty / gcc.git / log
