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2 weeks agoMerge tag 'hisi-drivers-for-6.17' of https://github.com/hisilicon/linux-hisi into...
Arnd Bergmann [Tue, 22 Jul 2025 20:54:08 +0000 (22:54 +0200)] 
Merge tag 'hisi-drivers-for-6.17' of https://github.com/hisilicon/linux-hisi into soc/drivers

HiSilicon driver updates for v6.17

- Print the hardware ID instead of the index in the HCCS driver

* tag 'hisi-drivers-for-6.17' of https://github.com/hisilicon/linux-hisi:
  soc: hisilicon: kunpeng_hccs: Fix incorrect log information

Link: https://lore.kernel.org/r/6879FFED.1050002@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'qcom-drivers-for-6.17-2' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Tue, 22 Jul 2025 20:53:09 +0000 (22:53 +0200)] 
Merge tag 'qcom-drivers-for-6.17-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers

More Qualcomm driver updates for v6.17

Fix race condition during SCM driver initialization, in relation to
tzmem and waitqueue irq handling,

Make the rpmh RSC driver support version 4 of the IP block.

Add SM7635 family and related PMICs to the socinfo driver. Also add
support for retrieving the bootloader build details.

* tag 'qcom-drivers-for-6.17-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  dt-bindings: soc: qcom: qcom,pmic-glink: document Milos compatible
  dt-bindings: soc: qcom,aoss-qmp: document the Milos Always-On Subsystem side channel
  dt-bindings: firmware: qcom,scm: document Milos SCM Firmware Interface
  soc: qcom: socinfo: Add support to retrieve APPSBL build details
  soc: qcom: pmic_glink: fix OF node leak
  soc: qcom: spmi-pmic: add more PMIC SUBTYPE IDs
  soc: qcom: socinfo: Add PM7550 & PMIV0108 PMICs
  soc: qcom: socinfo: Add SoC IDs for SM7635 family
  dt-bindings: arm: qcom,ids: Add SoC IDs for SM7635 family
  firmware: qcom: scm: request the waitqueue irq *after* initializing SCM
  firmware: qcom: scm: initialize tzmem before marking SCM as available
  firmware: qcom: scm: take struct device as argument in SHM bridge enable
  firmware: qcom: scm: remove unused arguments from SHM bridge routines
  soc: qcom: rpmh-rsc: Add RSC version 4 support

Link: https://lore.kernel.org/r/20250720030743.285440-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'qcom-drivers-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Tue, 22 Jul 2025 20:47:47 +0000 (22:47 +0200)] 
Merge tag 'qcom-drivers-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers

Qualcomm driver updates for v6.17

Perform input validation in the MDT loader, as this was not properly
done in the non-remoteproc cases.

Fix endian issues in the QMI encoder/decoder.

Support reading DDR statistic using the Qualcomm stats driver.

Add support for reading TME firmware details to the socinfo driver.

Document the Kryo 470 CPU, and add SM7150 to the DCC to DeviceTree
bindings.

* tag 'qcom-drivers-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: mdt_loader: Fix error return values in mdt_header_valid()
  dt-bindings: sram: qcom,imem: Add a number of missing compatibles
  dt-bindings: arm: cpus: Add Kryo 470 CPUs
  dt-bindings: sram: qcom,imem: Add the SM7150 compatible
  dt-bindings: soc: qcom: aoss-qmp: Add the SM7150 compatible
  dt-bindings: soc: qcom,dcc: Add the SM7150 compatible
  soc: qcom: socinfo: Add support to retrieve TME build details
  soc: qcom: fix endianness for QMI header
  soc: qcom: QMI encoding/decoding for big endian
  dt-bindings: soc: qcom: add qcom,qcs615-imem compatible
  soc: qcom: qcom_stats: Add QMP support for syncing ddr stats
  soc: qcom: qcom_stats: Add support to read DDR statistic
  soc: qcom: mdt_loader: Actually use the e_phoff
  soc: qcom: mdt_loader: Rename mdt_phdr_valid()
  soc: qcom: mdt_loader: Ensure we don't read past the ELF header

Link: https://lore.kernel.org/r/20250715021454.14516-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'memory-controller-drv-6.17' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Tue, 22 Jul 2025 20:46:59 +0000 (22:46 +0200)] 
Merge tag 'memory-controller-drv-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers

Memory controller drivers for v6.17

1. Several cleanups: Use dev_fwnode() in OMAP GPMX, convert
   arm,pl172.txt DT bindings to DT schema, use
   syscon_regmap_lookup_by_phandle_args() wrapper, correct kerneldoc.

2. Mediatek MT8186 SMI: Extend hardware bandwidth limits to fix VENC
   hardware during stress testing.

3. Broadcom brcmstb_memc: Add additional fallback compatible and
   simplify device driver matching.  The change comes from Broadcom
   SoC maintainer (Florian Fainelli), thus its ABI impact is
   acknowledged.

* tag 'memory-controller-drv-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  dt-bindings: memory: renesas,rzg3e-xspi: Document RZ/V2H(P) and RZ/V2N support
  memory: brcmstb_memc: Simplify compatible matching
  dt-bindings: memory-controller: Define fallback compatible
  memory: omap-gpmx: Use dev_fwnode()
  memory: mtk-smi: Add ostd setting for mt8186
  dt-bindings: memory-controllers: convert arm,pl172.txt to yaml format
  memory: stm32_omm: Use syscon_regmap_lookup_by_phandle_args
  memory: emif: Add missing kerneldoc for lpmode

Link: https://lore.kernel.org/r/20250715095315.59299-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'imx-drivers-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/shawn...
Arnd Bergmann [Tue, 22 Jul 2025 20:45:32 +0000 (22:45 +0200)] 
Merge tag 'imx-drivers-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/drivers

i.MX drivers changes for 6.17:

- A couple of MAINTAINERS updates
- A new bus driver for i.MX AIPSTZ bridge and a follow-up fix from
  Laurentiu Mihalcea

* tag 'imx-drivers-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  bus: imx-aipstz: allow creating pdevs for child buses
  MAINTAINERS: Update i.MX entry
  bus: add driver for IMX AIPSTZ bridge
  MAINTAINERS: add NXP S32G RTC driver

Link: https://lore.kernel.org/r/20250713055441.221235-1-shawnguo2@yeah.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'tegra-for-6.17-memory' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Tue, 22 Jul 2025 20:44:35 +0000 (22:44 +0200)] 
Merge tag 'tegra-for-6.17-memory' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers

memory: tegra: Updates for v6.17-rc1

Enable support for the memory and external memory controllers found on
Tegra264.

* tag 'tegra-for-6.17-memory' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  memory: tegra: Add Tegra264 MC and EMC support
  dt-bindings: memory: tegra: Add Tegra264 support

Link: https://lore.kernel.org/r/20250711220943.2389322-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'tegra-for-6.17-firmware' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Tue, 22 Jul 2025 20:43:50 +0000 (22:43 +0200)] 
Merge tag 'tegra-for-6.17-firmware' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers

firmware: tegra: Updates for v6.17-rc1

Add Tegra264 support for the BPMP, fix some dependency issues and clean
up some code using new OF helpers.

* tag 'tegra-for-6.17-firmware' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  firmware: tegra: bpmp: Fix build failure for tegra264-only config
  firmware: tegra: bpmp: Use of_reserved_mem_region_to_resource() for "memory-region"
  firmware: tegra: bpmp: Add support on Tegra264
  firmware: tegra: Fix IVC dependency problems

Link: https://lore.kernel.org/r/20250711220943.2389322-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agobus: del unnecessary init var
Li Jun [Wed, 4 Jun 2025 08:17:12 +0000 (16:17 +0800)] 
bus: del unnecessary init var

The compiler generates initialization instructions,
which consume additional CPU cycles. the
sysc_clockdomain_init should assign a value
to 'error' before it is read.so the var don't need init
to 0.

Signed-off-by: Li Jun <lijun01@kylinos.cn>
Link: https://lore.kernel.org/r/20250604081712.119523-1-lijun01@kylinos.cn
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'tegra-for-6.17-soc' of https://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Mon, 21 Jul 2025 16:18:07 +0000 (18:18 +0200)] 
Merge tag 'tegra-for-6.17-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers

soc/tegra: Updates for v6.17-rc1

The bulk of this is the addition of Tegra264 support for various low-
level components. This also adds fabric descriptors for the new Tegra254
and Tegra264 chips.

* tag 'tegra-for-6.17-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: cbb: Add support for CBB fabrics in Tegra254
  soc/tegra: cbb: Add support for CBB fabrics in Tegra264
  soc/tegra: cbb: Support HW lookup to get timed out target address
  soc/tegra: cbb: Improve handling for per SoC fabric data
  soc/tegra: cbb: Make error interrupt enable and status per SoC
  soc/tegra: cbb: Change master/slave to initiator/target
  soc/tegra: cbb: Clear ERR_FORCE register with ERR_STATUS
  soc/tegra: Add Tegra264 APBMISC compatible string
  soc/tegra: pmc: Add Tegra264 support
  soc/tegra: Enable support for Tegra264

Link: https://lore.kernel.org/r/20250711220943.2389322-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agosoc: fsl: qe: convert set_multiple() to returning an integer
Bartosz Golaszewski [Mon, 21 Jul 2025 13:15:11 +0000 (15:15 +0200)] 
soc: fsl: qe: convert set_multiple() to returning an integer

The conversion to using the new GPIO line setter callbacks missed the
set_multiple() in this file. Convert it to using the new callback.

Fixes: 52ccf19527fd ("soc: fsl: qe: use new GPIO line value setter callbacks")
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2 weeks agopinctrl: rp1: use new GPIO line value setter callbacks
Bartosz Golaszewski [Sat, 19 Jul 2025 15:58:25 +0000 (17:58 +0200)] 
pinctrl: rp1: use new GPIO line value setter callbacks

struct gpio_chip now has callbacks for setting line values that return
an integer, allowing to indicate failures. Convert the driver to using
them.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andrea della Porta <andrea.porta@suse.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'arm-soc/for-6.17/drivers' of https://github.com/Broadcom/stblinux into...
Arnd Bergmann [Mon, 21 Jul 2025 14:56:47 +0000 (16:56 +0200)] 
Merge tag 'arm-soc/for-6.17/drivers' of https://github.com/Broadcom/stblinux into soc/drivers

This pull request contains Broadcom SoCs drivers updates for 6.17,
please pull the following:

- Andrea adds the RP1 clock, pinctrl/pinconf/gpio and misc driver to
  bind them all

* tag 'arm-soc/for-6.17/drivers' of https://github.com/Broadcom/stblinux:
  pinctrl: rp1: Implement RaspberryPi RP1 pinmux/pinconf support
  misc: rp1: RaspberryPi RP1 misc driver
  pinctrl: rp1: Implement RaspberryPi RP1 gpio support
  clk: rp1: Add support for clocks provided by RP1
  dt-bindings: clock: Add RaspberryPi RP1 clock bindings

Link: https://lore.kernel.org/r/20250630190216.1518354-4-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'arm-soc/for-6.17/maintainers' of https://github.com/Broadcom/stblinux...
Arnd Bergmann [Mon, 21 Jul 2025 14:56:11 +0000 (16:56 +0200)] 
Merge tag 'arm-soc/for-6.17/maintainers' of https://github.com/Broadcom/stblinux into soc/drivers

This pull request contains MAINTAINERS file updates for 6.17, please
pull the following:

- Andrea adds the RP1 entry for all of the drivers pertaining to that
  chip

* tag 'arm-soc/for-6.17/maintainers' of https://github.com/Broadcom/stblinux:
  MAINTAINERS: add Raspberry Pi RP1 section

Link: https://lore.kernel.org/r/20250630190216.1518354-5-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'mtk-soc-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Mon, 21 Jul 2025 14:49:43 +0000 (16:49 +0200)] 
Merge tag 'mtk-soc-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/drivers

MediaTek soc driver updates for v6.17

This adds a single cleanup commit for the mtk-mutex driver,
clarifying the usage of the MUTEX_MOD1, MUTEX_MOD2 registers
for applying display controller sub-component mute settings
on all MediaTek SoCs.

* tag 'mtk-soc-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
  soc: mediatek: mtk-mutex: Fix confusing usage of MUTEX_MOD2

Link: https://lore.kernel.org/r/20250711083656.33538-4-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'reset-for-v6.17' of https://git.pengutronix.de/git/pza/linux into soc...
Arnd Bergmann [Mon, 21 Jul 2025 14:48:32 +0000 (16:48 +0200)] 
Merge tag 'reset-for-v6.17' of https://git.pengutronix.de/git/pza/linux into soc/drivers

Reset controller updates for v6.17

* Support reset controllers on Kendryte K230 and SOPHGO CV1800B.
* Add RZ/V2N USB2PHY reset controller bindings
* Use auxiliary device creation helpers in reset-mpfs.
* Convert nxp,lcp1850-rgu and snps,dw-reset binding docs to DT schema.
* Enable reset-brcmstb(-rescal) on BCM2712.
* Fix a typo in the T-HEAD TH1520 Kconfig option

* tag 'reset-for-v6.17' of https://git.pengutronix.de/git/pza/linux:
  dt-bindings: reset: Convert snps,dw-reset to DT schema
  reset: brcmstb: Enable reset drivers for ARCH_BCM2835
  reset: simple: add support for Sophgo CV1800B
  dt-bindings: reset: sophgo: Add CV1800B support
  reset: mpfs: use the auxiliary device creation
  dt-bindings: reset: renesas,rzv2h-usb2phy: Document RZ/V2N SoC support
  dt-bindings: reset: convert nxp,lpc1850-rgu.txt to yaml format
  reset: thead: Fix TH1520 typo
  reset: canaan: add reset driver for Kendryte K230
  dt-bindings: reset: add support for canaan,k230-rst

Link: https://lore.kernel.org/r/20250710152513.1346298-1-p.zabel@pengutronix.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'soc_fsl-6.17-1' of https://github.com/chleroy/linux into soc/drivers
Arnd Bergmann [Mon, 21 Jul 2025 14:45:32 +0000 (16:45 +0200)] 
Merge tag 'soc_fsl-6.17-1' of https://github.com/chleroy/linux into soc/drivers

FSL SOC Changes for 6.17:
- Use dev_fwnode() instead of of_fwnode_handle()
- Use new GPIO line value setter callbacks

* tag 'soc_fsl-6.17-1' of https://github.com/chleroy/linux:
  soc: Use dev_fwnode()
  soc: fsl: qe: use new GPIO line value setter callbacks

Link: https://lore.kernel.org/r/c947d537-cae5-44f0-abd8-0c558bac46d2@csgroup.eu
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'aspeed-6.17-drivers-1' of https://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Mon, 21 Jul 2025 14:44:48 +0000 (16:44 +0200)] 
Merge tag 'aspeed-6.17-drivers-1' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/drivers

ASPEED SoC driver updates for 6.17

The ASPEED LPC snoop driver was recently the cause of some concern. In addition
to the initial fixes, the channel configuration paths are refactored to improve
robustness against errors.

* tag 'aspeed-6.17-drivers-1' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux:
  soc: aspeed: lpc-snoop: Lift channel config to const structs
  soc: aspeed: lpc-snoop: Consolidate channel initialisation
  soc: aspeed: lpc-snoop: Use dev_err_probe() where possible
  soc: aspeed: lpc-snoop: Switch to devm_clk_get_enabled()
  soc: aspeed: lpc-snoop: Rearrange channel paths
  soc: aspeed: lpc-snoop: Rename 'channel' to 'index' in channel paths
  soc: aspeed: lpc-snoop: Constrain parameters in channel paths
  soc: aspeed: lpc-snoop: Ensure model_data is valid
  soc: aspeed: lpc-snoop: Don't disable channels that aren't enabled
  soc: aspeed: lpc-snoop: Cleanup resources in stack-order

Link: https://lore.kernel.org/r/9123f151280e52c63dcb645cb07d4eee3462c067.camel@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'renesas-drivers-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux...
Arnd Bergmann [Mon, 21 Jul 2025 14:44:01 +0000 (16:44 +0200)] 
Merge tag 'renesas-drivers-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/drivers

Renesas driver updates for v6.17 (take two)

  - Sort Renesas Kconfig symbols.

* tag 'renesas-drivers-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: Sort Renesas Kconfig configs

Link: https://lore.kernel.org/r/cover.1752090398.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'scmi-updates-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Mon, 21 Jul 2025 14:41:37 +0000 (16:41 +0200)] 
Merge tag 'scmi-updates-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers

Arm SCMI updates for v6.17

1. A fix is introduced to correct turbo frequency marking for 64-bit
   devices with sustained frequencies over 4GHz, ensuring accurate turbo
   frequency identification.

2. Debug capabilities are being improved by introducing in-flight transfer
   tracking using debug counters, which help diagnose transfer congestion
   and behavior. Additional tracepoints are added to log in-flight counts
   at transfer begin and end, offering better runtime insight. The debug
   counters now support decrement operations using a newly added
   scmi_dec_count helper, making counter tracking symmetric and more robust.

3. A race condition in suspend-resume logic is being resolved by ensuring
   SCMI_SYSPOWER_IDLE state is set early during resume, improving suspend
   reliability under certain conditions. New suspend and resume operations
   are added to the scmi_bus_type to enable finer power management control
   for SCMI-based devices.

4. Finally enhancements are also made to avoid registering notifiers for
   events that a platform does not support, reducing unnecessary overhead
   by checking for unsupported event types during protocolinitialization.

* tag 'scmi-updates-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  firmware: arm_scmi: Convert to SYSTEM_SLEEP_PM_OPS
  firmware: arm_scmi: Avoid notifier registration for unsupported events
  firmware: arm_scmi: power_control: Ensure SCMI_SYSPOWER_IDLE is set early during resume
  firmware: arm_scmi: Add power management operations to SCMI bus
  include: trace:  Add tracepoint support for inflight xfer count
  firmware: arm_scmi: Track number of inflight SCMI transfers
  firmware: arm_scmi: Add support for debug counter decrement
  firmware: arm_scmi: Fix up turbo frequencies selection

Link: https://lore.kernel.org/r/20250709122907.1171913-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 weeks agoMerge tag 'smccc-updates-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Mon, 21 Jul 2025 14:40:13 +0000 (16:40 +0200)] 
Merge tag 'smccc-updates-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers

firmware: smccc: Update for v6.17

Just a single update extending arm_smccc_hypervisor_has_uuid() to
support both SMC and HVC conduits, enabling UUID retrieval when Linux
runs as the root partition under Microsoft Hypervisor (MSHV), where
SMC is used. It leverages arm_smccc_1_1_invoke() to dynamically select
the appropriate conduit, enhancing compatibility beyond just HVC.

* tag 'smccc-updates-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  firmware: smccc: Support both smc and hvc conduits for getting hyp UUID

Link: https://lore.kernel.org/r/20250709122615.1171419-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 weeks agosoc: hisilicon: kunpeng_hccs: Fix incorrect log information
Huisong Li [Fri, 11 Jul 2025 06:37:06 +0000 (14:37 +0800)] 
soc: hisilicon: kunpeng_hccs: Fix incorrect log information

The hccs_get_all_spec_port_idle_sta() will tell user which port
is busy when firmware doesn't allow to decrease HCCS lane number.
However, the current log prints the index of die and port instead
of the hardware ID user perceived.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
3 weeks agodt-bindings: soc: qcom: qcom,pmic-glink: document Milos compatible
Luca Weiss [Sun, 13 Jul 2025 08:05:33 +0000 (10:05 +0200)] 
dt-bindings: soc: qcom: qcom,pmic-glink: document Milos compatible

Document the Milos compatible used to describe the pmic glink on this
SoC.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250713-sm7635-fp6-initial-v2-11-e8f9a789505b@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
3 weeks agodt-bindings: soc: qcom,aoss-qmp: document the Milos Always-On Subsystem side channel
Luca Weiss [Sun, 13 Jul 2025 08:05:29 +0000 (10:05 +0200)] 
dt-bindings: soc: qcom,aoss-qmp: document the Milos Always-On Subsystem side channel

Document the Always-On Subsystem side channel on the Milos SoC.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250713-sm7635-fp6-initial-v2-7-e8f9a789505b@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
3 weeks agodt-bindings: firmware: qcom,scm: document Milos SCM Firmware Interface
Luca Weiss [Sun, 13 Jul 2025 08:05:26 +0000 (10:05 +0200)] 
dt-bindings: firmware: qcom,scm: document Milos SCM Firmware Interface

Document the SCM Firmware Interface on the Milos SoC.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250713-sm7635-fp6-initial-v2-4-e8f9a789505b@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
3 weeks agosoc: qcom: socinfo: Add support to retrieve APPSBL build details
Kathiravan Thirumoorthy [Fri, 11 Jul 2025 11:03:06 +0000 (16:33 +0530)] 
soc: qcom: socinfo: Add support to retrieve APPSBL build details

Add support to retrieve APPS (Application Processor Subsystem) Bootloader
image details from SMEM.

Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250711-appsbl_crm_version-v1-1-48b49b1dfdcf@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
3 weeks agosoc: qcom: pmic_glink: fix OF node leak
Johan Hovold [Tue, 8 Jul 2025 08:57:17 +0000 (10:57 +0200)] 
soc: qcom: pmic_glink: fix OF node leak

Make sure to drop the OF node reference taken when registering the
auxiliary devices when the devices are later released.

Fixes: 58ef4ece1e41 ("soc: qcom: pmic_glink: Introduce base PMIC GLINK driver")
Cc: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
Signed-off-by: Johan Hovold <johan@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250708085717.15922-1-johan@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
3 weeks agosoc: qcom: spmi-pmic: add more PMIC SUBTYPE IDs
Rakesh Kota [Fri, 4 Jul 2025 11:30:36 +0000 (17:00 +0530)] 
soc: qcom: spmi-pmic: add more PMIC SUBTYPE IDs

Add the PMM8650AU and PMM8650AU_PSAIL PMIC SUBTYPE IDs and
These PMICs are used by the qcs8300 and qcs9100 platforms.

Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250704113036.1627695-1-rakesh.kota@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
3 weeks agosoc: qcom: socinfo: Add PM7550 & PMIV0108 PMICs
Luca Weiss [Wed, 25 Jun 2025 09:11:46 +0000 (11:11 +0200)] 
soc: qcom: socinfo: Add PM7550 & PMIV0108 PMICs

Add the PM7550 and PMIV0108 to the pmic_models array.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250625-sm7635-socinfo-v1-3-be09d5c697b8@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
3 weeks agosoc: qcom: socinfo: Add SoC IDs for SM7635 family
Luca Weiss [Wed, 25 Jun 2025 09:11:45 +0000 (11:11 +0200)] 
soc: qcom: socinfo: Add SoC IDs for SM7635 family

Add the entries for the 'volcano' family, namely SM7635, SM6650,
SM6650P, QCM6690 and QCS6690.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250625-sm7635-socinfo-v1-2-be09d5c697b8@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
3 weeks agodt-bindings: arm: qcom,ids: Add SoC IDs for SM7635 family
Luca Weiss [Wed, 25 Jun 2025 09:11:44 +0000 (11:11 +0200)] 
dt-bindings: arm: qcom,ids: Add SoC IDs for SM7635 family

Add the SoC IDs of the 'volcano' family, namely SM7635, SM6650, SM6650P,
QCM6690 and QCS6690.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20250625-sm7635-socinfo-v1-1-be09d5c697b8@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
3 weeks agofirmware: qcom: scm: request the waitqueue irq *after* initializing SCM
Bartosz Golaszewski [Mon, 30 Jun 2025 12:12:05 +0000 (14:12 +0200)] 
firmware: qcom: scm: request the waitqueue irq *after* initializing SCM

There's a subtle race in the SCM driver: we assign the __scm pointer
before requesting the waitqueue interrupt. Assigning __scm marks the SCM
API as ready to accept calls. It's possible that a user makes a call
right after we set __scm and the firmware raises an interrupt before the
driver's ready to service it. Move the __scm assignment after we request
the interrupt.

This has the added benefit of allowing us to drop the goto label.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20250630-qcom-scm-race-v2-4-fa3851c98611@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
3 weeks agofirmware: qcom: scm: initialize tzmem before marking SCM as available
Bartosz Golaszewski [Mon, 30 Jun 2025 12:12:04 +0000 (14:12 +0200)] 
firmware: qcom: scm: initialize tzmem before marking SCM as available

Now that qcom_scm_shm_bridge_enable() uses the struct device passed to
it as argument to make the QCOM_SCM_MP_SHM_BRIDGE_ENABLE SCM call, we
can move the TZMem initialization before the assignment of the __scm
pointer in the SCM driver (which marks SCM as ready to users) thus
fixing the potential race between consumer calls and the memory pool
initialization.

Reported-by: Johan Hovold <johan+linaro@kernel.org>
Closes: https://lore.kernel.org/all/20250120151000.13870-1-johan+linaro@kernel.org/
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20250630-qcom-scm-race-v2-3-fa3851c98611@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
3 weeks agofirmware: qcom: scm: take struct device as argument in SHM bridge enable
Bartosz Golaszewski [Mon, 30 Jun 2025 12:12:03 +0000 (14:12 +0200)] 
firmware: qcom: scm: take struct device as argument in SHM bridge enable

qcom_scm_shm_bridge_enable() is used early in the SCM initialization
routine. It makes an SCM call and so expects the internal __scm pointer
in the SCM driver to be assigned. For this reason the tzmem memory pool
is allocated *after* this pointer is assigned. However, this can lead to
a crash if another consumer of the SCM API makes a call using the memory
pool between the assignment of the __scm pointer and the initialization
of the tzmem memory pool.

As qcom_scm_shm_bridge_enable() is a special case, not meant to be
called by ordinary users, pull it into the local SCM header. Make it
take struct device as argument. This is the device that will be used to
make the SCM call as opposed to the global __scm pointer. This will
allow us to move the tzmem initialization *before* the __scm assignment
in the core SCM driver.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250630-qcom-scm-race-v2-2-fa3851c98611@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
3 weeks agofirmware: qcom: scm: remove unused arguments from SHM bridge routines
Bartosz Golaszewski [Mon, 30 Jun 2025 12:12:02 +0000 (14:12 +0200)] 
firmware: qcom: scm: remove unused arguments from SHM bridge routines

qcom_scm_shm_bridge_create() and qcom_scm_shm_bridge_delete() take
struct device as argument but don't use it. Remove it from these
functions' prototypes.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20250630-qcom-scm-race-v2-1-fa3851c98611@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
3 weeks agosoc: qcom: rpmh-rsc: Add RSC version 4 support
Maulik Shah [Mon, 23 Jun 2025 05:49:43 +0000 (11:19 +0530)] 
soc: qcom: rpmh-rsc: Add RSC version 4 support

Register offsets for v3 and v4 versions are backward compatible. Assign v3
offsets for v4 and all higher versions to avoid end up using v2 offsets.

Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250623-rsc_v4-v1-1-275b27bc5e3c@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
4 weeks agomemory: tegra: Add Tegra264 MC and EMC support
Sumit Gupta [Wed, 9 Jul 2025 22:21:47 +0000 (00:21 +0200)] 
memory: tegra: Add Tegra264 MC and EMC support

Add support to enable Memory Controller (MC) and External Memory
Controller (EMC) drivers for Tegra264. The nodes for MC and EMC are
mostly the same as Tegra234 but differ in number of channels and
interrupt numbers.

The patch also adds the bandwidth manager definitions required for
Tegra264 and uses them to populate the memory client table. All of
these are needed to properly enable memory interconnect (ICC) support.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250709222147.3758356-3-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agoMerge branch 'for-6.17/dt-bindings' into for-6.17/memory
Thierry Reding [Fri, 11 Jul 2025 14:49:21 +0000 (16:49 +0200)] 
Merge branch 'for-6.17/dt-bindings' into for-6.17/memory

4 weeks agodt-bindings: memory: tegra: Add Tegra264 support
Sumit Gupta [Wed, 9 Jul 2025 22:21:46 +0000 (00:21 +0200)] 
dt-bindings: memory: tegra: Add Tegra264 support

Add bindings for the Memory Controller (MC) and External Memory
Controller (EMC) found on the Tegra264 SoC. Tegra264 SoC has a different
number of interrupt lines for MC sub-units: UCF_SOC, hub, hub common,
syncpoint and MC channel. The total number of interrupt lines is eight.
Update maxItems for MC interrupts accordingly.

This also adds a header containing the memory client ID definitions that
are used by the interconnects property in DT and the tegra_mc_client
table in the MC driver. These IDs are defined by the hardware, so the
numbering doesn't start at 0 and contains holes. Also added are the
stream IDs for various hardware blocks found on Tegra264. These are
allocated as blocks of 256 IDs and each block can be subdivided for
additional fine-grained isolation if needed.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
[treding@nvidia.com: add SMMU stream IDs, squash patches]
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250709222147.3758356-2-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agofirmware: tegra: bpmp: Fix build failure for tegra264-only config
Arnd Bergmann [Fri, 11 Jul 2025 08:24:03 +0000 (10:24 +0200)] 
firmware: tegra: bpmp: Fix build failure for tegra264-only config

The definition of tegra186_bpmp_ops was not updated in sync with the use
in bpmp.c:

drivers/firmware/tegra/bpmp.c:856:17: error: 'tegra186_bpmp_ops' undeclared here (not in a function); did you mean 'tegra_bpmp_ops'?
  856 |         .ops = &tegra186_bpmp_ops,
aarch64-linux-ld: drivers/firmware/tegra/bpmp.o:(.rodata+0x2f0): undefined reference to `tegra186_bpmp_ops'

Update the Makefile as needed.

There is really no need to hide the declaration based on the configuration,
so just expose it unconditionally so it never has to be updated again
for the next SoC.

Fixes: 94bce2cf7cf6 ("firmware: tegra: bpmp: Add support on Tegra264")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20250711082409.1398497-1-arnd@kernel.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agobus: imx-aipstz: allow creating pdevs for child buses
Laurentiu Mihalcea [Mon, 7 Jul 2025 23:46:27 +0000 (19:46 -0400)] 
bus: imx-aipstz: allow creating pdevs for child buses

devm_of_platform_populate() passes a NULL as the bus OF match table
to the underlying of_platform_populate(), meaning child bus devices
of the AIPSTZ bridge will not have its children devices created. Since
some SoCs (e.g. i.MX8MP) use this particular setup (e.g. SPBA bus, which
is a child of AIPSTZ5 and has multiple child nodes), the driver needs to
support it.

Therefore, replace devm_of_platform_populate() with of_platform_populate()
and pass a reference to the bus OF match table to it. For now, the only
possible child buses are simple buses.

Since the usage of devres is dropped, the complementary operation of
of_platform_populate() needs to be called during the driver's removal.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Fixes: 796cba2dd4d9 ("bus: add driver for IMX AIPSTZ bridge")
Reported-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Closes: https://lore.kernel.org/lkml/5029548.31r3eYUQgx@steina-w/#t
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 weeks agodt-bindings: memory: renesas,rzg3e-xspi: Document RZ/V2H(P) and RZ/V2N support
Lad Prabhakar [Tue, 24 Jun 2025 17:16:05 +0000 (18:16 +0100)] 
dt-bindings: memory: renesas,rzg3e-xspi: Document RZ/V2H(P) and RZ/V2N support

Document support for the Expanded Serial Peripheral Interface (xSPI)
controller found on the Renesas RZ/V2H(P) (R9A09G057) and RZ/V2N
(R9A09G056) SoCs.

The xSPI hardware block on these SoCs is functionally identical to the
one on the RZ/G3E (R9A09G047) SoC. Therefore, the existing driver can be
reused without modification by using `renesas,r9a09g047-xspi` as a
fallback compatible.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250624171605.469724-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
4 weeks agosoc/tegra: cbb: Add support for CBB fabrics in Tegra254
Sumit Gupta [Thu, 3 Jul 2025 10:38:29 +0000 (16:08 +0530)] 
soc/tegra: cbb: Add support for CBB fabrics in Tegra254

Add support for CBB 2.0 based fabrics in Tegra254 SoC using ACPI.
Fabrics reporting errors are: C2C, GPU and Display_Cluster. Tegra254
uses a hardware based lookup to get target node address, so the
target_map tables for each fabric are no longer needed.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agosoc/tegra: cbb: Add support for CBB fabrics in Tegra264
Sumit Gupta [Thu, 3 Jul 2025 10:38:28 +0000 (16:08 +0530)] 
soc/tegra: cbb: Add support for CBB fabrics in Tegra264

Add support for CBB 2.0 based fabrics in Tegra264 SoC using DT. Fabrics
reporting errors are: SYSTEM, TOP0, UPHY0 and VISION.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agosoc/tegra: cbb: Support HW lookup to get timed out target address
Sumit Gupta [Thu, 3 Jul 2025 10:38:26 +0000 (16:08 +0530)] 
soc/tegra: cbb: Support HW lookup to get timed out target address

Add support for hardware based lookup to get the address of the timed
out target node. This features is added in upcoming SoCs and avoids the
need for creating per fabric target_map tables in the driver.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agosoc/tegra: cbb: Improve handling for per SoC fabric data
Sumit Gupta [Thu, 3 Jul 2025 10:38:25 +0000 (16:08 +0530)] 
soc/tegra: cbb: Improve handling for per SoC fabric data

Improve handling for the per SoC fabrics and targets.
The below changes make them more flexible and ready for future SoC's.
- Added SoC prefix to Fabric_ID enums.
- Rename *lookup_target_timeout() to *sw_lookup_target_timeout() to
  make it separate from HW based lookup function to be added later.
- Moved target_map within fabric_lookup table to make it easy to
  check whether SW vs HW lookup is supported and handle accordingly.
- Slight improvements to some error prints.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agosoc/tegra: cbb: Make error interrupt enable and status per SoC
Sumit Gupta [Thu, 3 Jul 2025 10:38:24 +0000 (16:08 +0530)] 
soc/tegra: cbb: Make error interrupt enable and status per SoC

Make the error interrupt enable and error status fields as per SoC. Both
of these fields can change for different SoC's. Moving them to per SoC
data helps to set or clear the required bits only for a SoC.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agosoc/tegra: cbb: Change master/slave to initiator/target
Sumit Gupta [Thu, 3 Jul 2025 10:38:23 +0000 (16:08 +0530)] 
soc/tegra: cbb: Change master/slave to initiator/target

Change usage of 'Master/Slave' to 'Initiator/Target' as per the new
convention.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agosoc/tegra: cbb: Clear ERR_FORCE register with ERR_STATUS
Sumit Gupta [Thu, 3 Jul 2025 10:38:22 +0000 (16:08 +0530)] 
soc/tegra: cbb: Clear ERR_FORCE register with ERR_STATUS

When error is injected with the ERR_FORCE register, then this register
is not auto cleared on clearing the ERR_STATUS register. This causes
repeated interrupts on error injection. To fix, set the ERR_FORCE to
zero along with clearing the ERR_STATUS register after handling error.

Fixes: fc2f151d2314 ("soc/tegra: cbb: Add driver for Tegra234 CBB 2.0")
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agofirmware: tegra: bpmp: Use of_reserved_mem_region_to_resource() for "memory-region"
Rob Herring (Arm) [Thu, 3 Jul 2025 18:34:34 +0000 (13:34 -0500)] 
firmware: tegra: bpmp: Use of_reserved_mem_region_to_resource() for "memory-region"

Use the newly added of_reserved_mem_region_to_resource() function to
handle "memory-region" properties.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250703183434.2073375-1-robh@kernel.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agofirmware: arm_scmi: Convert to SYSTEM_SLEEP_PM_OPS
Arnd Bergmann [Wed, 9 Jul 2025 07:01:01 +0000 (09:01 +0200)] 
firmware: arm_scmi: Convert to SYSTEM_SLEEP_PM_OPS

The old SET_SYSTEM_SLEEP_PM_OPS() macro leads to a warning about an
unused function:

  |  drivers/firmware/arm_scmi/scmi_power_control.c:363:12: error:
  |  'scmi_system_power_resume' defined but not used [-Werror=unused-function]
  |         static int scmi_system_power_resume(struct device *dev)

The proper way to do this these days is to use SYSTEM_SLEEP_PM_OPS()
and pm_sleep_ptr().

Fixes: 9a0658d3991e ("firmware: arm_scmi: power_control: Ensure SCMI_SYSPOWER_IDLE is set early during resume")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
Message-Id: <20250709070107.1388512-1-arnd@kernel.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
4 weeks agofirmware: arm_scmi: Avoid notifier registration for unsupported events
Cristian Marussi [Mon, 7 Jul 2025 14:42:20 +0000 (15:42 +0100)] 
firmware: arm_scmi: Avoid notifier registration for unsupported events

Some platforms may be configured to not support notification events from
certain sources. This scenario is already handled gracefully by avoiding
any attempt to send a notification enable request for those sources, as
such requests would inevitably fail.

However, in a more extreme case, a platform might not support even a
single source for a given event type. In this situation, allowing
notifier registration is meaningless. Attempting to register a notifier
would serve no purpose and only result in unnecessary overhead.

To address this, we now detect such conditions during the protocol
initialization. When identified, we flag the unsupported event types and
reject any subsequent notifier registration attempts for them with
-ENOTSUPP. This early rejection avoids redundant processing and
simplifies runtime logic.

Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
Message-Id: <20250707144220.485365-1-cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
4 weeks agosoc: renesas: Sort Renesas Kconfig configs
Kuninori Morimoto [Fri, 27 Jun 2025 04:41:20 +0000 (04:41 +0000)] 
soc: renesas: Sort Renesas Kconfig configs

Renesas Kconfig is using "SoC serial number" for CONFIG symbol, but is
using "SoC chip name" for menu description. Because of it, it looks
random order when we run "make menuconfig".

commit 6d5aded8d57fc ("soc: renesas: Sort driver description title")
sorted Renesas Kconfig by menu description title order, but it makes
confusable to add new config.

Let's unify "ARMxx Platform support for ${CHIP_NUMBER} (${CHIP_NAME}),
and sort it again.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/877c0xhk3z.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 weeks agosoc: Use dev_fwnode()
Jiri Slaby (SUSE) [Wed, 11 Jun 2025 10:43:47 +0000 (12:43 +0200)] 
soc: Use dev_fwnode()

irq_domain_create_simple() takes fwnode as the first argument. It can be
extracted from the struct device using dev_fwnode() helper instead of
using of_node with of_fwnode_handle().

So use the dev_fwnode() helper.

Signed-off-by: Jiri Slaby (SUSE) <jirislaby@kernel.org>
Cc: Qiang Zhao <qiang.zhao@nxp.com>
Cc: Christophe Leroy <christophe.leroy@csgroup.eu>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/linuxppc-dev/20250611104348.192092-19-jirislaby@kernel.org/
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
4 weeks agoMAINTAINERS: Update i.MX entry
Peng Fan [Mon, 7 Jul 2025 06:37:53 +0000 (14:37 +0800)] 
MAINTAINERS: Update i.MX entry

Add two patterns:
 - Documentation/devicetree/bindings/firmware/fsl*
 - Documentation/devicetree/bindings/firmware/nxp*

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 weeks agosoc: fsl: qe: use new GPIO line value setter callbacks
Bartosz Golaszewski [Tue, 10 Jun 2025 12:38:50 +0000 (14:38 +0200)] 
soc: fsl: qe: use new GPIO line value setter callbacks

struct gpio_chip now has callbacks for setting line values that return
an integer, allowing to indicate failures. Convert the driver to using
them.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20250610-gpiochip-set-rv-soc-v1-1-1a0c36c9deed@linaro.org
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
4 weeks agosoc: aspeed: lpc-snoop: Lift channel config to const structs
Andrew Jeffery [Mon, 16 Jun 2025 13:13:47 +0000 (22:43 +0930)] 
soc: aspeed: lpc-snoop: Lift channel config to const structs

The shifts and masks for each channel are defined by hardware and
are not something that changes at runtime. Accordingly, describe the
information in an array of const structs and associate elements with
each channel instance, removing the need for the switch and handling of
its default case.

Link: https://patch.msgid.link/20250616-aspeed-lpc-snoop-fixes-v2-10-3cdd59c934d3@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
4 weeks agosoc: aspeed: lpc-snoop: Consolidate channel initialisation
Andrew Jeffery [Mon, 16 Jun 2025 13:13:46 +0000 (22:43 +0930)] 
soc: aspeed: lpc-snoop: Consolidate channel initialisation

Previously, channel initialisation was a bit perilous with respect to
resource cleanup in error paths. While the implementation had issues,
it at least made an effort to eliminate some of its problems by first
testing whether any channels were enabled, and bailing out if not.

Having improved the robustness of resource handling in probe() we can
now rearrange the initial channel test to be located with the subsequent
test, and rework the unrolled conditional logic to use a loop for an
improvement in readability.

Link: https://patch.msgid.link/20250616-aspeed-lpc-snoop-fixes-v2-9-3cdd59c934d3@codeconstruct.com.au
Acked-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
4 weeks agosoc: aspeed: lpc-snoop: Use dev_err_probe() where possible
Andrew Jeffery [Mon, 16 Jun 2025 13:13:45 +0000 (22:43 +0930)] 
soc: aspeed: lpc-snoop: Use dev_err_probe() where possible

Exploit that it returns the provided error to eliminate some lines, and
return the actual error involved rather than -ENODEV.

Link: https://patch.msgid.link/20250616-aspeed-lpc-snoop-fixes-v2-8-3cdd59c934d3@codeconstruct.com.au
Acked-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
4 weeks agosoc: aspeed: lpc-snoop: Switch to devm_clk_get_enabled()
Andrew Jeffery [Mon, 16 Jun 2025 13:13:44 +0000 (22:43 +0930)] 
soc: aspeed: lpc-snoop: Switch to devm_clk_get_enabled()

Simplify clock handling as done in other drivers.

Link: https://patch.msgid.link/20250616-aspeed-lpc-snoop-fixes-v2-7-3cdd59c934d3@codeconstruct.com.au
Acked-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
4 weeks agosoc: aspeed: lpc-snoop: Rearrange channel paths
Andrew Jeffery [Mon, 16 Jun 2025 13:13:43 +0000 (22:43 +0930)] 
soc: aspeed: lpc-snoop: Rearrange channel paths

Order assignments such that tests for conditions not involving resource
acquisition are ordered before those testing acquired resources, and
order managed resource acquisition before unmanaged where possible. This
way we minimise the amount of manual cleanup required.

In the process, improve readability of the code by introducing a channel
pointer that takes the place of the repeated object lookups.

Acked-by: Jean Delvare <jdelvare@suse.de>
Link: https://patch.msgid.link/20250616-aspeed-lpc-snoop-fixes-v2-6-3cdd59c934d3@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
4 weeks agosoc: aspeed: lpc-snoop: Rename 'channel' to 'index' in channel paths
Andrew Jeffery [Mon, 16 Jun 2025 13:13:42 +0000 (22:43 +0930)] 
soc: aspeed: lpc-snoop: Rename 'channel' to 'index' in channel paths

We'll introduce another 'channel' variable shortly

Acked-by: Jean Delvare <jdelvare@suse.de>
Link: https://patch.msgid.link/20250616-aspeed-lpc-snoop-fixes-v2-5-3cdd59c934d3@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
4 weeks agosoc: aspeed: lpc-snoop: Constrain parameters in channel paths
Andrew Jeffery [Mon, 16 Jun 2025 13:13:41 +0000 (22:43 +0930)] 
soc: aspeed: lpc-snoop: Constrain parameters in channel paths

Ensure pointers and the channel index are valid before use.

Link: https://patch.msgid.link/20250616-aspeed-lpc-snoop-fixes-v2-4-3cdd59c934d3@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
4 weeks agosoc: aspeed: lpc-snoop: Ensure model_data is valid
Andrew Jeffery [Mon, 16 Jun 2025 13:13:40 +0000 (22:43 +0930)] 
soc: aspeed: lpc-snoop: Ensure model_data is valid

of_device_get_match_data() can return NULL, though shouldn't in current
circumstances. Regardless, initialise model_data closer to use so it's
clear we need to test for validity prior to dereferencing.

Acked-by: Jean Delvare <jdelvare@suse.de>
Link: https://patch.msgid.link/20250616-aspeed-lpc-snoop-fixes-v2-3-3cdd59c934d3@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
4 weeks agofirmware: arm_scmi: power_control: Ensure SCMI_SYSPOWER_IDLE is set early during...
Peng Fan [Fri, 4 Jul 2025 03:09:36 +0000 (11:09 +0800)] 
firmware: arm_scmi: power_control: Ensure SCMI_SYSPOWER_IDLE is set early during resume

Fix a race condition where a second suspend notification from another
SCMI agent wakes the system before SCMI_SYSPOWER_IDLE is set, leading
to ignored suspend requests. This is due to interrupts triggering early
execution of `scmi_userspace_notifier()` before the SCMI state is updated.

To resolve this, set SCMI_SYSPOWER_IDLE earlier in the device resume
path, prior to `thaw_processes()`. This ensures the SCMI state is
correct when the notifier runs, allowing the system to suspend again
as expected.

On some platforms using SCMI, SCP cannot distinguish between CPU idle
and suspend since both result in cluster power-off. By explicitly setting
the idle state early, the Linux SCMI agent can correctly re-suspend in
response to external notifications.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Message-Id: <20250704-scmi-pm-v2-2-9316cec2f9cc@nxp.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
4 weeks agofirmware: arm_scmi: Add power management operations to SCMI bus
Peng Fan [Fri, 4 Jul 2025 03:09:35 +0000 (11:09 +0800)] 
firmware: arm_scmi: Add power management operations to SCMI bus

Introduce suspend and resume power management callbacks for `scmi_bus_type`,
modeled after `platform_pm_ops`. This enables SCMI devices on the bus to
implement their own suspend and resume behavior, allowing for more
fine-grained power control at the device level.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Message-Id: <20250704-scmi-pm-v2-1-9316cec2f9cc@nxp.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
4 weeks agofirmware: tegra: bpmp: Add support on Tegra264
Thierry Reding [Tue, 6 May 2025 13:31:17 +0000 (15:31 +0200)] 
firmware: tegra: bpmp: Add support on Tegra264

Support for Tegra264 depends on the Tegra186 support, so make sure the
latter is enabled.

Link: https://lore.kernel.org/r/20250506133118.1011777-11-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agofirmware: tegra: Fix IVC dependency problems
Thierry Reding [Tue, 6 May 2025 13:31:16 +0000 (15:31 +0200)] 
firmware: tegra: Fix IVC dependency problems

The IVC code is library code that other drivers need to select if they
need that library. However, if the symbol is user-selectable this can
lead to conflicts.

Fix this by making the symbol only selectable for COMPILE_TEST and add
a select TEGRA_IVC to TEGRA_BPMP, which is currently the only user.

Link: https://lore.kernel.org/r/20250506133118.1011777-10-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agosoc/tegra: Add Tegra264 APBMISC compatible string
Thierry Reding [Tue, 6 May 2025 13:31:15 +0000 (15:31 +0200)] 
soc/tegra: Add Tegra264 APBMISC compatible string

Link: https://lore.kernel.org/r/20250506133118.1011777-9-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agosoc/tegra: pmc: Add Tegra264 support
Thierry Reding [Tue, 6 May 2025 13:31:14 +0000 (15:31 +0200)] 
soc/tegra: pmc: Add Tegra264 support

The PMC block on Tegra264 has undergone a few small changes since it's
Tegra234 predecessor. Match on the new compatible string to select the
updated SoC-specific data.

Link: https://lore.kernel.org/r/20250506133118.1011777-8-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 weeks agosoc/tegra: Enable support for Tegra264
Thierry Reding [Tue, 6 May 2025 13:31:13 +0000 (15:31 +0200)] 
soc/tegra: Enable support for Tegra264

Tegra264 is the successor to Tegra234, with various improvements and new
hardware.

Link: https://lore.kernel.org/r/20250506133118.1011777-7-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
5 weeks agoMerge tag 'renesas-drivers-for-v6.17-tag1' of https://git.kernel.org/pub/scm/linux...
Arnd Bergmann [Fri, 4 Jul 2025 07:44:54 +0000 (09:44 +0200)] 
Merge tag 'renesas-drivers-for-v6.17-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/drivers

Renesas driver updates for v6.17

  - Initial support for the Renesas RZ/T2H (R9A09G077) and RZ/N2H
    (R9A09G087) SoCs,
  - Convert the RZ/V2M External Power Sequence Controller (PWC) driver
    to the new GPIO line value setter callbacks.

* tag 'renesas-drivers-for-v6.17-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: pwc-rzv2m: Use new GPIO line value setter callbacks
  soc: renesas: Add RZ/N2H (R9A09G087) config option
  soc: renesas: Add RZ/T2H (R9A09G077) config option

Link: https://lore.kernel.org/r/cover.1751026661.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
5 weeks agoinclude: trace: Add tracepoint support for inflight xfer count
Philip Radford [Mon, 30 Jun 2025 10:55:43 +0000 (10:55 +0000)] 
include: trace:  Add tracepoint support for inflight xfer count

Enhance the existing SCMI transfer tracepoints by including the current
in-flight transfer count in `scmi_xfer_begin` and `scmi_xfer_end`.

Introduce a new helper `scmi_inflight_count()` to retrieve the active
transfer count from the SCMI debug counters when debug is enabled.

This trace data is useful for visualizing transfer activity over time
and identifying congestion or unexpected behavior in SCMI messaging.

Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Philip Radford <philip.radford@arm.com>
Message-Id: <20250630105544.531723-4-philip.radford@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
5 weeks agofirmware: arm_scmi: Track number of inflight SCMI transfers
Philip Radford [Mon, 30 Jun 2025 10:55:42 +0000 (10:55 +0000)] 
firmware: arm_scmi: Track number of inflight SCMI transfers

Add a new debug counter, `XFERS_INFLIGHT`, to track the number of
currently active in-flight SCMI message transfers. This helps in
understanding system behavior and diagnosing potential issues with
pending or stuck messages.

The counter is incremented when a transfer is registered as in-flight,
and decremented when it completes and is released.

It is automatically added to debugfs for visibility through SCMI debugfs.

Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Philip Radford <philip.radford@arm.com>
Message-Id: <20250630105544.531723-3-philip.radford@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
5 weeks agofirmware: arm_scmi: Add support for debug counter decrement
Philip Radford [Mon, 30 Jun 2025 10:55:41 +0000 (10:55 +0000)] 
firmware: arm_scmi: Add support for debug counter decrement

Introduce a new `scmi_dec_count` helper to complement the existing
`scmi_inc_count`, allowing controlled decrement of SCMI debug counters.

This provides symmetry in debug counter management and enables
accurate tracking of counters that may both increase and decrease,
such as those used for in-flight message tracking.

Only active when CONFIG_ARM_SCMI_DEBUG_COUNTERS is enabled.

Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Philip Radford <philip.radford@arm.com>
Message-Id: <20250630105544.531723-2-philip.radford@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
5 weeks agodt-bindings: reset: Convert snps,dw-reset to DT schema
Rob Herring (Arm) [Wed, 2 Jul 2025 22:26:08 +0000 (17:26 -0500)] 
dt-bindings: reset: Convert snps,dw-reset to DT schema

Convert the Synopsys Designware Reset Controller binding to schema. It
is a straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250702222609.2760718-1-robh@kernel.org
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
5 weeks agosoc: aspeed: lpc-snoop: Don't disable channels that aren't enabled
Andrew Jeffery [Mon, 16 Jun 2025 13:13:39 +0000 (22:43 +0930)] 
soc: aspeed: lpc-snoop: Don't disable channels that aren't enabled

Mitigate e.g. the following:

    # echo 1e789080.lpc-snoop > /sys/bus/platform/drivers/aspeed-lpc-snoop/unbind
    ...
    [  120.363594] Unable to handle kernel NULL pointer dereference at virtual address 00000004 when write
    [  120.373866] [00000004] *pgd=00000000
    [  120.377910] Internal error: Oops: 805 [#1] SMP ARM
    [  120.383306] CPU: 1 UID: 0 PID: 315 Comm: sh Not tainted 6.15.0-rc1-00009-g926217bc7d7d-dirty #20 NONE
    ...
    [  120.679543] Call trace:
    [  120.679559]  misc_deregister from aspeed_lpc_snoop_remove+0x84/0xac
    [  120.692462]  aspeed_lpc_snoop_remove from platform_remove+0x28/0x38
    [  120.700996]  platform_remove from device_release_driver_internal+0x188/0x200
    ...

Fixes: 9f4f9ae81d0a ("drivers/misc: add Aspeed LPC snoop driver")
Cc: stable@vger.kernel.org
Cc: Jean Delvare <jdelvare@suse.de>
Acked-by: Jean Delvare <jdelvare@suse.de>
Link: https://patch.msgid.link/20250616-aspeed-lpc-snoop-fixes-v2-2-3cdd59c934d3@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5 weeks agosoc: aspeed: lpc-snoop: Cleanup resources in stack-order
Andrew Jeffery [Mon, 16 Jun 2025 13:13:38 +0000 (22:43 +0930)] 
soc: aspeed: lpc-snoop: Cleanup resources in stack-order

Free the kfifo after unregistering the miscdev in
aspeed_lpc_disable_snoop() as the kfifo is initialised before the
miscdev in aspeed_lpc_enable_snoop().

Fixes: 3772e5da4454 ("drivers/misc: Aspeed LPC snoop output using misc chardev")
Cc: stable@vger.kernel.org
Cc: Jean Delvare <jdelvare@suse.de>
Acked-by: Jean Delvare <jdelvare@suse.de>
Link: https://patch.msgid.link/20250616-aspeed-lpc-snoop-fixes-v2-1-3cdd59c934d3@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5 weeks agobus: add driver for IMX AIPSTZ bridge
Laurentiu Mihalcea [Tue, 10 Jun 2025 16:01:49 +0000 (12:01 -0400)] 
bus: add driver for IMX AIPSTZ bridge

The secure AHB to IP Slave (AIPSTZ) bus bridge provides access control
configurations meant to restrict access to certain peripherals.
Some of the configurations include:

1) Marking masters as trusted for R/W. Based on this
(and the configuration of the accessed peripheral), the bridge
may choose to abort the R/W transactions issued by certain
masters.

2) Allowing/disallowing write accesses to peripherals.

Add driver for this IP. Since there's currently no framework for
access controllers (and since there's currently no need for having
flexibility w.r.t the configurations) all this driver does is it
applies a relaxed, "default" configuration, in which all masters
are trusted for R/W.

Note that some instances of this IP (e.g: AIPSTZ5 on i.MX8MP) may be tied
to a power domain and may lose their configuration when the domain is
powered off. This is why the configuration has to be restored when the
domain is powered on.

Co-developed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
5 weeks agoreset: brcmstb: Enable reset drivers for ARCH_BCM2835
Peter Robinson [Mon, 30 Jun 2025 17:52:58 +0000 (18:52 +0100)] 
reset: brcmstb: Enable reset drivers for ARCH_BCM2835

The BRCMSTB and BRCMSTB_RESCAL reset drivers are also
used in the BCM2712, AKA the RPi5. The RPi platforms
have typically used the ARCH_BCM2835, and the PCIe
support for this SoC can use this config which depends
on these drivers so enable building them when just that
arch option is enabled to ensure the platform works as
expected.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://lore.kernel.org/r/20250630175301.846082-1-pbrobinson@gmail.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
5 weeks agoMAINTAINERS: add NXP S32G RTC driver
Ciprian Marian Costea [Mon, 26 May 2025 16:32:59 +0000 (19:32 +0300)] 
MAINTAINERS: add NXP S32G RTC driver

Add the NXP S32G RTC driver as maintained so further patches on this
driver can be reviewed under this architecture.

Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
6 weeks agoreset: simple: add support for Sophgo CV1800B
Inochi Amaoto [Tue, 17 Jun 2025 07:01:40 +0000 (15:01 +0800)] 
reset: simple: add support for Sophgo CV1800B

Reuse reset-simple driver for the Sophgo CV1800B reset generator.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Link: https://lore.kernel.org/r/20250617070144.1149926-3-inochiama@gmail.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
6 weeks agodt-bindings: reset: sophgo: Add CV1800B support
Inochi Amaoto [Tue, 17 Jun 2025 07:01:39 +0000 (15:01 +0800)] 
dt-bindings: reset: sophgo: Add CV1800B support

Add bindings for the reset generator on the SOPHGO CV1800B
RISC-V SoC.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250617070144.1149926-2-inochiama@gmail.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
6 weeks agoreset: mpfs: use the auxiliary device creation
Jerome Brunet [Wed, 11 Jun 2025 10:06:04 +0000 (12:06 +0200)] 
reset: mpfs: use the auxiliary device creation

The auxiliary device creation of this driver is simple enough to
use the available auxiliary device creation helper.

Use it and remove some boilerplate code.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20250611-rst-mpfs-aux-v1-1-c86534b473c3@baylibre.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
6 weeks agodt-bindings: reset: renesas,rzv2h-usb2phy: Document RZ/V2N SoC support
Lad Prabhakar [Wed, 28 May 2025 13:30:31 +0000 (14:30 +0100)] 
dt-bindings: reset: renesas,rzv2h-usb2phy: Document RZ/V2N SoC support

Document support for the USB2PHY reset controller found on the Renesas
RZ/V2N (R9A09G056) SoC. The reset controller IP is functionally identical
to that on the RZ/V2H(P) SoC, so no driver changes are needed. The existing
`renesas,r9a09g057-usb2phy-reset` compatible will be used as a fallback
for the RZ/V2N SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250528133031.167647-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
6 weeks agodt-bindings: reset: convert nxp,lpc1850-rgu.txt to yaml format
Frank Li [Mon, 2 Jun 2025 14:40:45 +0000 (10:40 -0400)] 
dt-bindings: reset: convert nxp,lpc1850-rgu.txt to yaml format

Convert nxp,lpc1850-rgu.txt to yaml format.

Additional changes:
- remove label in example.
- remove reset consumer in example.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250602144046.943982-1-Frank.Li@nxp.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
6 weeks agoreset: thead: Fix TH1520 typo
Drew Fustini [Sun, 1 Jun 2025 18:08:26 +0000 (11:08 -0700)] 
reset: thead: Fix TH1520 typo

Fix trivial typo in the Kconfig entry for RESET_TH1520.

Fixes: 4a65326311ab ("reset: thead: Add TH1520 reset controller driver")
Signed-off-by: Drew Fustini <drew@pdp7.com>
Link: https://lore.kernel.org/r/20250601181000.166088-1-drew@pdp7.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
6 weeks agoreset: canaan: add reset driver for Kendryte K230
Junhui Liu [Fri, 13 Jun 2025 08:49:24 +0000 (16:49 +0800)] 
reset: canaan: add reset driver for Kendryte K230

Add support for the resets on Canaan Kendryte K230 SoC. The driver
support CPU0, CPU1, L2 cache flush, hardware auto clear and software
clear resets.

Tested-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Link: https://lore.kernel.org/r/20250613-k230-reset-v4-2-e5266d2be440@pigmoral.tech
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
6 weeks agodt-bindings: reset: add support for canaan,k230-rst
Junhui Liu [Fri, 13 Jun 2025 08:49:23 +0000 (16:49 +0800)] 
dt-bindings: reset: add support for canaan,k230-rst

Introduces a reset controller driver for the Kendryte K230 SoC,
resposible for managing the reset functionality of the CPUs and
various sub-modules.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Link: https://lore.kernel.org/r/20250613-k230-reset-v4-1-e5266d2be440@pigmoral.tech
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
6 weeks agomemory: brcmstb_memc: Simplify compatible matching
Florian Fainelli [Mon, 9 Jun 2025 21:23:56 +0000 (14:23 -0700)] 
memory: brcmstb_memc: Simplify compatible matching

Now that a "brcm,brcmstb-memc-ddr-rev-b.2.x" fallback compatible string
has been defined, we can greatly simplify the matching within the driver
to only look for that compatible string and nothing else.

The fallback "brcm,brcmstb-memc-ddr" is also updated to assume the V21
register layout since that is the most common nowadays.

Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://lore.kernel.org/r/20250609212356.2264244-3-florian.fainelli@broadcom.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
6 weeks agodt-bindings: memory-controller: Define fallback compatible
Florian Fainelli [Mon, 9 Jun 2025 21:23:55 +0000 (14:23 -0700)] 
dt-bindings: memory-controller: Define fallback compatible

All of the DDR controllers beyond revision b.2.1 have had a consistent
layout, therefore define a "brcm,brcmstb-memc-ddr-rev-b.2.1" fallback
compatible string to match them all rather than having to continuously
add to the list.

Link: https://lore.kernel.org/all/20241217194439.929040-2-florian.fainelli@broadcom.com/
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250609212356.2264244-2-florian.fainelli@broadcom.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
6 weeks agosoc: qcom: mdt_loader: Fix error return values in mdt_header_valid()
Dan Carpenter [Wed, 25 Jun 2025 15:22:41 +0000 (10:22 -0500)] 
soc: qcom: mdt_loader: Fix error return values in mdt_header_valid()

This function is supposed to return true for valid headers and false for
invalid.  In a couple places it returns -EINVAL instead which means the
invalid headers are counted as true.  Change it to return false.

Fixes: 9f9967fed9d0 ("soc: qcom: mdt_loader: Ensure we don't read past the ELF header")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/db57c01c-bdcc-4a0f-95db-b0f2784ea91f@sabinyo.mountain
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
6 weeks agopinctrl: rp1: Implement RaspberryPi RP1 pinmux/pinconf support
Andrea della Porta [Tue, 24 Jun 2025 15:36:22 +0000 (17:36 +0200)] 
pinctrl: rp1: Implement RaspberryPi RP1 pinmux/pinconf support

The current implementation for the pin controller peripheral
on the RP1 chipset supports gpio functionality and just the
basic configuration of pin hw capabilities.

Add support for selecting the pin alternate function (pinmux)
and full configuration of the pin (pinconf).

Related pins are also gathered into groups.

Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/all/8c282b89b1aa8b9e3c00f6bd3980332c47d82df7.1750778806.git.andrea.porta@suse.com/
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
6 weeks agosoc: mediatek: mtk-mutex: Fix confusing usage of MUTEX_MOD2
Jason-JH Lin [Tue, 24 Jun 2025 10:39:03 +0000 (18:39 +0800)] 
soc: mediatek: mtk-mutex: Fix confusing usage of MUTEX_MOD2

The usage of MUTEX_MOD1 and MUTEX_MOD2 for calculating mod settings
over 32 has been confusing. To improve consistency and clarity, these
defines need to fit into the same MUTEX_MOD define as possible.

However, MUTEX_MOD1 cannot be directly used for all SoCs because,
for example, the mod1 register (0x34) of MT2712 is not adjacent to
its mod0 register (0x2c). To address this, a `mutex_mod1_reg` field
is introduced in the mutex driver data structure. This allows all
SoCs to use a unified MUTEX_MOD to determine their register offsets.

With this change, the separate usage of MUTEX_MOD1 and MUTEX_MOD2 is
eliminated, simplifying the logic for obtaining offsets and mod IDs.

Signed-off-by: Jason-JH Lin <jason-jh.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250624103928.408194-1-jason-jh.lin@mediatek.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
6 weeks agofirmware: arm_scmi: Fix up turbo frequencies selection
Sibi Sankar [Wed, 14 May 2025 21:47:19 +0000 (03:17 +0530)] 
firmware: arm_scmi: Fix up turbo frequencies selection

Sustained frequency when greater than or equal to 4Ghz on 64-bit devices
currently result in marking all frequencies as turbo. Address the turbo
frequency selection bug by fixing the truncation.

Fixes: a897575e79d7 ("firmware: arm_scmi: Add support for marking certain frequencies as turbo")
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Message-Id: <20250514214719.203607-1-quic_sibis@quicinc.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
6 weeks agoLinux 6.16-rc3 v6.16-rc3
Linus Torvalds [Sun, 22 Jun 2025 20:30:08 +0000 (13:30 -0700)] 
Linux 6.16-rc3

6 weeks agoMerge tag 'i2c-for-6.16-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa...
Linus Torvalds [Sun, 22 Jun 2025 17:50:36 +0000 (10:50 -0700)] 
Merge tag 'i2c-for-6.16-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Pull i2c fixes from Wolfram Sang:

 - subsystem: convert drivers to use recent callbacks of struct
   i2c_algorithm A typical after-rc1 cleanup, which I couldn't send in
   time for rc2

 - tegra: fix YAML conversion of device tree bindings

 - k1: re-add a check which got lost during upstreaming

* tag 'i2c-for-6.16-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
  i2c: k1: check for transfer error
  i2c: use inclusive callbacks in struct i2c_algorithm
  dt-bindings: i2c: nvidia,tegra20-i2c: Specify the required properties

6 weeks agoMerge tag 'x86_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 22 Jun 2025 17:30:44 +0000 (10:30 -0700)] 
Merge tag 'x86_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 fixes from Borislav Petkov:

 - Make sure the array tracking which kernel text positions need to be
   alternatives-patched doesn't get mishandled by out-of-order
   modifications, leading to it overflowing and causing page faults when
   patching

 - Avoid an infinite loop when early code does a ranged TLB invalidation
   before the broadcast TLB invalidation count of how many pages it can
   flush, has been read from CPUID

 - Fix a CONFIG_MODULES typo

 - Disable broadcast TLB invalidation when PTI is enabled to avoid an
   overflow of the bitmap tracking dynamic ASIDs which need to be
   flushed when the kernel switches between the user and kernel address
   space

 - Handle the case of a CPU going offline and thus reporting zeroes when
   reading top-level events in the resctrl code

* tag 'x86_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/alternatives: Fix int3 handling failure from broken text_poke array
  x86/mm: Fix early boot use of INVPLGB
  x86/its: Fix an ifdef typo in its_alloc()
  x86/mm: Disable INVLPGB when PTI is enabled
  x86,fs/resctrl: Remove inappropriate references to cacheinfo in the resctrl subsystem

6 weeks agoMerge tag 'irq_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 22 Jun 2025 17:17:51 +0000 (10:17 -0700)] 
Merge tag 'irq_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull irq fixes from Borislav Petkov:

 - Fix missing prototypes warnings

 - Properly initialize work context when allocating it

 - Remove a method tracking when managed interrupts are suspended during
   hotplug, in favor of the code using a IRQ disable depth tracking now,
   and have interrupts get properly enabled again on restore

 - Make sure multiple CPUs getting hotplugged don't cause wrong tracking
   of the managed IRQ disable depth

* tag 'irq_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  irqchip/ath79-misc: Fix missing prototypes warnings
  genirq/irq_sim: Initialize work context pointers properly
  genirq/cpuhotplug: Restore affinity even for suspended IRQ
  genirq/cpuhotplug: Rebalance managed interrupts across multi-CPU hotplug

6 weeks agoMerge tag 'perf_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 22 Jun 2025 17:11:45 +0000 (10:11 -0700)] 
Merge tag 'perf_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull perf fixes from Borislav Petkov:

 - Avoid a crash on a heterogeneous machine where not all cores support
   the same hw events features

 - Avoid a deadlock when throttling events

 - Document the perf event states more

 - Make sure a number of perf paths switching off or rescheduling events
   call perf_cgroup_event_disable()

 - Make sure perf does task sampling before its userspace mapping is
   torn down, and not after

* tag 'perf_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  perf/x86/intel: Fix crash in icl_update_topdown_event()
  perf: Fix the throttle error of some clock events
  perf: Add comment to enum perf_event_state
  perf/core: Fix WARN in perf_cgroup_switch()
  perf: Fix dangling cgroup pointer in cpuctx
  perf: Fix cgroup state vs ERROR
  perf: Fix sample vs do_exit()

6 weeks agoMerge tag 'locking_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 22 Jun 2025 17:09:23 +0000 (10:09 -0700)] 
Merge tag 'locking_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull locking fixes from Borislav Petkov:

 - Make sure the switch to the global hash is requested always under a
   lock so that two threads requesting that simultaneously cannot get to
   inconsistent state

 - Reject negative NUMA nodes earlier in the futex NUMA interface
   handling code

 - Selftests fixes

* tag 'locking_urgent_for_v6.16_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  futex: Verify under the lock if hash can be replaced
  futex: Handle invalid node numbers supplied by user
  selftests/futex: Set the home_node in futex_numa_mpol
  selftests/futex: getopt() requires int as return value.