Tomasz Kamiński [Mon, 17 Mar 2025 13:30:35 +0000 (14:30 +0100)]
libstdc++: Add P1206R7 from_range members to unordered sets [PR111055]
This is another piece of P1206R7, adding new members to std::unordered_set
and std::unordered_multiset.
PR libstdc++/111055
libstdc++-v3/ChangeLog:
* include/bits/hashtable.h (_M_rehash_insert)
(_M_insert_range_multi): Extracted rehashing for range insertion
to separate function.
* include/bits/unordered_set.h (unordered_set): Define from_range
constructors and insert_range member.
(unordered_multiset) Likewise.
* testsuite/23_containers/unordered_multiset/cons/from_range.cc:
New test.
* testsuite/23_containers/unordered_multiset/modifiers/insert_range.cc:
New test.
* testsuite/23_containers/unordered_set/cons/from_range.cc:
New test.
* testsuite/23_containers/unordered_set/modifiers/insert_range.cc:
New test.
Reviewed-by: Jonathan Wakely <jwakely@redhat.com> Signed-off-by: Tomasz Kamiński <tkaminsk@redhat.com>
Jakub Jelinek [Tue, 18 Mar 2025 13:57:41 +0000 (14:57 +0100)]
lra: Handle SUBREG in lra_rtx_hash [PR119307]
The following testcase ICEs starting with r15-3213 in
decompose_normal_address and starting with r15-3288 ICEs
in lra_rtx_hash, which since r8-5466 can't handle SUBREG
(previously SUBREG was "ei" and lra_rtx_hash can handle
that through
val += lra_rtx_hash (XEXP (x, i));
for e and
val += XINT (x, i);
for i, now it is "ep" where p stands for poly_uint16).
The following patch fixes it by handling SUBREG directly, a variant
could be instead add
case 'p':
for (int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
val += SUBREG_BYTE (x).coeffs[i];
break;
if you prefer that more (p is used solely for SUBREG and e.g. rtx_equal_p
has
case 'p':
if (maybe_ne (SUBREG_BYTE (x), SUBREG_BYTE (y)))
return false;
break;
). Given the above rtx_equal_p snippet and that lra_rtx_hash
is solely used in invariant_hash (and recursion) and invariant_eq_p
uses rtx_equal_p we'll never consider different SUBREGs of the same thing
as the same invariant.
Jose E. Marchesi [Mon, 17 Mar 2025 11:47:40 +0000 (12:47 +0100)]
libiberty: add ldirname function
This patch adds a function ldirname to libiberty. It is implemented
in terms of lbasename. Basically, given a given pathname, the dirname
part is what is not the basename minus the last directory separator
separating the dirname with the basename.
include/ChangeLog
* libiberty.h (ldirname): New function declaration.
(dos_ldirname): Likewise.
(unix_ldirname): Likewise.
Richard Biener [Wed, 5 Mar 2025 13:24:50 +0000 (14:24 +0100)]
debug/101533 - ICE with variant typedef DIE generation
There's a sanity check in gen_type_die_with_usage that trips
unnecessarily for a case where the relevant DIE has already been
generated successfully in other ways. The following keys the
existing TREE_ASM_WRITTEN check on the correct object, honoring
this and does nothing instead of ICEing for the testcase at hand.
PR debug/101533
* dwarf2out.cc (gen_type_die_with_usage): When we have
output the typedef already do nothing for a typedef variant.
Do not set TREE_ASM_WRITTEN on the type.
Jeff Law [Tue, 18 Mar 2025 03:58:03 +0000 (21:58 -0600)]
[RISC-V] Fix another unreported code quality regression
So here's the other case I was just looking at. This is a slightly modified
version of some code from 500.perlbench which shows another nop logical
operation:
> void frob (void);
> typedef struct av AV;
> typedef unsigned int U32;
> struct av
> {
> void *dummy;
> U32 sv_refcnt;
> U32 sv_flags;
> };
> void
> Perl_save_ary (AV *const oav)
> {
> AV *av;
> unsigned int x1 = oav->sv_flags;
> unsigned int x2 = x1 & 3221225472;
> if (x2 == 2147483648)
> frob ();
> }
https://godbolt.org/z/941vqfGE6
It's not as obvious, but this is probably a regression as well. I would expect
the gcc-14 code to execute in 1c faster than the current trunk code on a
superscalar design:
gcc-14: trunk:
lw a5,12(a0) lw a5,12(a0)
li a3,-1073741824 li a3,-2
li a4,-2147483648
and a5,a5,a3 srai a4,a5,30
beq a5,a4,.L4 andi a4,a4,-1
beq a4,a3,.L4
Essentially the "li" instrutions can execute in parallel with the lw. But the
rest of the sequence has data dependencies forcing the instructions to execute
serially. Thus that extra andi extends the critical path by 1c.
Removing the useless andi should make the two sequences perform the same and
reduces the codesize.
Much like the prior case we walk backwards using -fdump-rtl-all -dp to find the
andi:
andi a4,a4,-1 # 26 [c=4 l=4] *anddi3/1
The UID is 26. And just like the prior case it first shows up in the .split2
dump:
Splitting with gen_split_77 (riscv.md:3184)
scanning new insn with uid = 25.
scanning new insn with uid = 26.
scanning new insn with uid = 27.
scanning new insn with uid = 28.
deleting insn with uid = 12.
deleting insn with uid = 12.
Note how those instructions have many low bits as zeros and that the constants
likely require some kind of constant synthesis. We can conceptually do an
arithmetic right shift of a5 and both constants and get the same result, likely
making the constants easier to synthesize.
And that's precisely what this pattern is designed to do:
> (define_insn_and_split "*branch<ANYI:mode>_shiftedarith_<optab>_shifted"
> [(set (pc)
> (if_then_else (any_eq
> (and:ANYI (match_operand:ANYI 1 "register_operand" "r")
> (match_operand 2 "shifted_const_arith_operand" "i"))
> (match_operand 3 "shifted_const_arith_operand" "i"))
> (label_ref (match_operand 0 "" ""))
> (pc)))
> (clobber (match_scratch:X 4 "=&r"))
> (clobber (match_scratch:X 5 "=&r"))]
> "!SMALL_OPERAND (INTVAL (operands[2]))
> && !SMALL_OPERAND (INTVAL (operands[3]))
> && SMALL_AFTER_COMMON_TRAILING_SHIFT (INTVAL (operands[2]),
> INTVAL (operands[3]))"
> "#"
> "&& reload_completed"
> [(set (match_dup 4) (ashiftrt:X (match_dup 1) (match_dup 7)))
> (set (match_dup 4) (and:X (match_dup 4) (match_dup 8)))
> (set (match_dup 5) (match_dup 9))
> (set (pc) (if_then_else (any_eq (match_dup 4) (match_dup 5))
> (label_ref (match_dup 0)) (pc)))]
> {
> HOST_WIDE_INT mask1 = INTVAL (operands[2]);
> HOST_WIDE_INT mask2 = INTVAL (operands[3]);
> int trailing_shift = COMMON_TRAILING_ZEROS (mask1, mask2);
>
> operands[7] = GEN_INT (trailing_shift);
> operands[8] = GEN_INT (mask1 >> trailing_shift);
> operands[9] = GEN_INT (mask2 >> trailing_shift);
> }
It finds the number of low bits in both that must be zero. In this case it's
30 bits. So it shifts the register right by 30 bits. Then constructs the two
new constants, one of which is -1 after shifting. And we emit (set (match_dup
4) (and (match_dup 4) (const_int -1))
And since this splits after register allocation nothing eliminates the useless
and dest,src,-1 and boom we have a regression.
The fix this time is a bit different. I really don't want to open code the new
RTL. So instead I create a new operand for the source of the AND statement.
If the constant is going to be -1 then that operand has the same value as the
destination operand (ie, a nop move). Otherwise it is the appropriate AND
expression.
The nop-move will get eliminated thus resolving the regression.
I suspect some of the other patterns in riscv.md are subject to similar issues,
though I haven't seem them trigger, so I'm leaving them alone for now.
This has been tested in my tester and it'll obviously go through the upstream
CI flow before I push it to the trunk.
gcc/
* config/riscv/riscv.md (equality shifted-arith splitter): Do not
create op AND -1 as it won't be cleaned up post-reload.
gcc/testsuite
* gcc.target/riscv/redundant-andi-2.c: New test.
Andrew Pinski [Tue, 18 Mar 2025 01:16:56 +0000 (18:16 -0700)]
Fix r15-8073 (Pass -macos_version_min to the linker)
With r15-8073-g952e17223d3a98, gcc_cv_ld64_macosx_version_min is being
used for the replacement and being set in a few locations but
gcc_cv_ld64_macos_version_min is set in others.
Since the auto-host.h variable is named LD64_HAS_MACOS_VERSION_MIN,
I changed over to remove the x from the name.
Committed as obvious after a quick test to make sure LD64_HAS_MACOS_VERSION_MIN
was not set to empty.
Jeff Law [Mon, 17 Mar 2025 23:29:42 +0000 (17:29 -0600)]
[RISC-V] Fix unreported code quality regression with single bit manipulations
I was reviewing some code recently and spotted an oddity. In a few places we
were emitting andi dst,src,-1 and in others [x]ori dst,src,0. Those are
obviously nops and we should get rid of them.
Most of these are coming from a split part of a couple define_insn_and_split
patterns added back in late 2022, so this is an unreported 13, 14 & 15 code
quality regression (verified on godbolt, https://godbolt.org/z/EPszox5Kd).
Essentially the split part is matching over-aggressively and splitting what
should be a trivial bitmanip insn such as bset, bclr or binv into a nop logical
with a bit twiddle.
Since the split portions trigger post-reload nothing comes along to remove the
nop logical operations.
The fix is trivial. Just refine the condition. I considered refining the
operand predicates too. Both are valid approaches. I noticed the formatting
was goofy, so fixed that while I was in there.
I'm aware of one other similar case, but I haven't concluded if it's a
regression or not.
Tested in my tester. Waiting for pre-commit CI to do its thing.
Jeff
gcc/
* config/riscv/bitmanip.md (*<or_optab>i<mode>_extrabit): Reject cases
where we only need to twiddle one bit. Fix formatting.
(*andi<mode>extrabit): Likewise.
gcc/testsuite/
* gcc.target/riscv/redundant-andi.c: New test.
* gcc.target/riscv/redundant-ori.c: Likewise
[PR119285][IRA]: Use an additional way of reg equiv invariant substitution correctness
Patch for PR114991 resulted in 5% decrease of SPEC2017 lbm performance
on Zen2 and Zen4. For one RTL insn of lbm, LRA with PR114991 patch
can not confirm that the equivalence insertion will create a valid RTL
insn. This resulted in that the pseudo equiv was assumed costly and
pseudo was assigned to hard reg (caller saved as the pseudo lives
through calls) and some other pseudos did not get hard regs as it was
before PR114991 patch. The insn in question is `pseudo1 = pseduo2 +
pseudo3` where pseudo2 has equiv `hard_reg + const`. The old code
recognized the insn after equiv substitution as LEA. The new code
failed. The patch here makes to use two ways for equiv subsbtitution
correctness, the old one and new one (mostly for memory addresses
where the old code fails to find the substitution correctness). So
given patch fixes lbm performance degradation and actually makes GCC
to generate the same code as it was before PR114991 patch.
gcc/ChangeLog:
PR rtl-optimization/119285
* ira-costs.cc (equiv_can_be_consumed_p): Use 2 ways for
recognizing a valid insn after equiv insertion.
Michael Matz [Wed, 13 Nov 2024 15:04:06 +0000 (16:04 +0100)]
rs6000: Add -msplit-patch-nops (PR112980)
as the bug report details some uses of -fpatchable-function-entry
aren't happy with the "before" NOPs being inserted between global and
local entry point on powerpc. We want the before NOPs be in front
of the global entry point. That means that the patching NOPs aren't
consecutive for dual entry point functions, but for these usecases
that's not the problem. But let us support both under the control
of a new target option: -msplit-patch-nops.
gcc/
PR target/112980
* config/rs6000/rs6000.opt (msplit-patch-nops): New option.
* doc/invoke.texi (RS/6000 and PowerPC Options): Document it.
* config/rs6000/rs6000.h (machine_function.stop_patch_area_print):
New member.
* config/rs6000/rs6000.cc (rs6000_print_patchable_function_entry):
Emit split nops under control of that one.
* config/rs6000/rs6000-logue.cc (rs6000_output_function_prologue):
Add handling of split patch nops.
Muhammad Mahad [Fri, 19 Jul 2024 13:42:03 +0000 (13:42 +0000)]
gccrs: [E0576] Associated `item` not found in given `type`
gcc/rust/ChangeLog:
* typecheck/rust-hir-type-check-type.cc (TypeCheckType::visit):
Add rich error message and error code similiar to rustc with
associaed type and trait name
gcc/testsuite/ChangeLog:
* rust/compile/unknown-associated-item.rs: New test.
Signed-off-by: Muhammad Mahad <mahadtxt@gmail.com>
Antonio Gomes [Sun, 14 Jul 2024 04:45:24 +0000 (01:45 -0300)]
gccrs: Improve error messages for operator expressions
gcc/rust/ChangeLog:
* hir/tree/rust-hir-expr.h: Add new get_operator_str method in
ArithmeticOrLogicalExpr and CompoundAssignmentExpr
* hir/tree/rust-hir.cc: Likewise
* typecheck/rust-hir-type-check-expr.cc: Improve error message for
operator expressions to display the correct operator symbol
gcc/testsuite/ChangeLog:
* rust/compile/shadow1.rs: Fix test for new error message
Signed-off-by: Antonio Gomes <antoniospg100@gmail.com>
Kushal Pal [Fri, 28 Jun 2024 06:25:52 +0000 (06:25 +0000)]
gccrs: Introduce new class to handle borrow errors
gcc/rust/ChangeLog:
* Make-lang.in: Compile new file.
* checks/errors/borrowck/rust-borrow-checker.cc (BorrowChecker::go):
Use new class to report errors.
* checks/errors/borrowck/rust-borrow-checker-diagnostics.cc: New file.
* checks/errors/borrowck/rust-borrow-checker-diagnostics.h:
New file, adds new class.
Signed-off-by: Kushal Pal <kushalpal109@gmail.com>
Kushal Pal [Wed, 5 Jun 2024 11:09:10 +0000 (11:09 +0000)]
gccrs: Added FFIVector to get Polonius output on C++ side
gcc/rust/ChangeLog:
* Make-lang.in: Compile new file, rust-polonius.cc
* checks/errors/borrowck/ffi-polonius/src/gccrs_ffi.rs: Opaque
type to represent FFIVector from C++.
* checks/errors/borrowck/ffi-polonius/src/gccrs_ffi_generated.rs:
Change types of fields in Output.
* checks/errors/borrowck/ffi-polonius/src/lib.rs: Added helper
functions to contruct Polonius output on C++ side,
used helpers to contruct Polonius output on C++ side.
* checks/errors/borrowck/polonius/rust-polonius-ffi.h (make_vector):
FFIVector is a wrapper around std::vector for transfering data
from Rust to C++.
(struct Output): Use pointers to FFIVector instead of bool to
store Polonius output data.
* checks/errors/borrowck/polonius/rust-polonius.h (FFIVector__new):
Helper function.
(FFIVector__new_vec_pair): Likewise.
(FFIVector__new_vec_triple): Likewise.
(FFIVector__push): Likewise.
(FFIVector__push_vec_pair): Likewise.
(FFIVector__push_vec_triple): Likewise.
* checks/errors/borrowck/rust-borrow-checker.cc (BorrowChecker::go):
Convert FFIVector to std::vector representation for easier
navigation.
* checks/errors/borrowck/polonius/rust-polonius.cc: New file,
implementation of helper functions.
Signed-off-by: Kushal Pal <kushalpal109@gmail.com>
badumbatish [Sun, 30 Jun 2024 00:12:33 +0000 (17:12 -0700)]
gccrs: Store parse result of parse_format_string(s)
gcc/rust/ChangeLog:
* ast/rust-expr.h (struct TupleTemplateStr):
Store parse result of parse_format_string(s)
* expand/rust-macro-builtins-asm.cc (parse_format_strings):
Likewise
* rust/compile/inline_asm_illegal_options.rs: new test
* rust/compile/inline_asm_illegal_operands.rs: New test.
This is expected to fail but we couldn't resolve parse_expr()'s
general functionality yet
Arthur Cohen [Fri, 14 Jun 2024 14:45:34 +0000 (16:45 +0200)]
gccrs: expand: Keep track of semicoloned builtin macros
This is quite a rough fix (like a lot of the macro expansion code...) but
it allows built-in macros to be treated as statements. I *think* asm!()
might be the only one where it really matters, but also doing something
like
{
line!();
}
will now work, whereas before the macro invocation would not get expanded
properly and would be ignored.
jjasmine [Wed, 5 Jun 2024 06:14:19 +0000 (23:14 -0700)]
gccrs: Successful parse of in and inout, albeit with str
gcc/rust/ChangeLog:
* expand/rust-macro-builtins-asm.cc (parse_reg_operand):
Successful parse of in and inout, albeit with str
(check_identifier): Likewise.
(parse_asm_arg): Likewise.
* expand/rust-macro-builtins-asm.h (parse_format_string): Likewise.
gcc/testsuite/ChangeLog:
* rust/compile/inline_asm_parse_operand.rs: New test.
jjasmine [Fri, 31 May 2024 09:06:18 +0000 (02:06 -0700)]
gccrs: Slim down the test cases
gcc/testsuite/ChangeLog:
* rust/compile/inline_asm_faulty_clobber.rs: compress
the test
* rust/compile/inline_asm_nop.rs: compress
the test
* rust/compile/inline_asm_faulty_clobber_1.rs: Removed.
* rust/compile/inline_asm_faulty_clobber_2.rs: Removed.
* rust/compile/inline_asm_nop_2.rs: Removed.
jjasmine [Tue, 28 May 2024 08:21:07 +0000 (01:21 -0700)]
gccrs: Working towards parse_reg and parse_reg_operand
gcc/rust/ChangeLog:
* expand/rust-macro-builtins-asm.cc (parse_reg):
Working towards parse_reg and parse_reg_operand
(parse_reg_operand):
Working towards parse_reg and parse_reg_operand
(parse_asm_arg):
Add todo about errors
* expand/rust-macro-builtins-asm.h (parse_global_asm):
remove dead code.
(parse_nonglobal_asm):
remove dead code.
jjasmine [Tue, 28 May 2024 07:17:33 +0000 (00:17 -0700)]
gccrs: Renamed parseAsmArg to conform to other function names
gcc/rust/ChangeLog:
* expand/rust-macro-builtins-asm.cc (parseAsmArg):
Renamed parseAsmArg to conform to other function names
(parse_asm_arg): Likewise.
(parse_asm): Likewise.
* expand/rust-macro-builtins-asm.h (parseAsmArg): Likewise.
(parse_asm_arg): Likewise.
jjasmine [Wed, 22 May 2024 02:45:35 +0000 (19:45 -0700)]
gccrs: Added faulty tests for inline asm cloberring
gcc/testsuite/ChangeLog:
* rust/compile/inline_asm_faulty_clobber.rs: New test.
* rust/compile/inline_asm_faulty_clobber_1.rs: New test.
* rust/compile/inline_asm_faulty_clobber_2.rs: New test.
jjasmine [Tue, 21 May 2024 07:31:57 +0000 (00:31 -0700)]
gccrs: First draft of parse_option finished
Finish up on parse_option, formatted parse_clobber_abi
gcc/rust/ChangeLog:
* expand/rust-macro-builtins-asm.cc (parse_clobber_abi): format
(check_and_set): helper function, is try_set_option equivalent
(parse_options): new function
* expand/rust-macro-builtins-asm.h (enum InlineAsmOptions):
removed
(check_and_set): decl of helper function
This syntax is experimental and shall be explicitely enabled in the crate
attributes as it cannot be used in stable rust.
gcc/rust/ChangeLog:
* checks/errors/rust-feature-gate.cc (FeatureGate::visit): Gate the
excluded pattern.
* checks/errors/rust-feature-gate.h: Update the function prototype
and delete two empty implementations in order to use default visitor
behavior.
* checks/errors/rust-feature.cc (Feature::create): Add the new
exclusive range pattern feature gate.
* checks/errors/rust-feature.h: Add new feature enum variant for
exclusive range patterns.
* parse/rust-parse-impl.h (Parser::parse_pattern_no_alt): Forward the
token location to the AST.
(Parser::parse_ident_leading_pattern): Likewise.
Exclusive range pattern were not handled by the parser as this an
experimental feature.
gcc/rust/ChangeLog:
* ast/rust-pattern.cc (tokenid_to_rangekind): Add a new function to
get a range kind from the current token type.
(RangePattern::as_string): Change the string representation for range
pattern in order to handle excluded ranges.
* ast/rust-pattern.h (enum class): Add new enum class to differentiate
range kinds.
(tokenid_to_rangekind): New prototype for a function that converts a
token id to it's corresponding range kind.
(class RangePattern): Change the class to accept a range kind instead
of an ellipsis boolean.
* hir/rust-ast-lower-pattern.cc (ASTLoweringPattern::visit): Abort
when an excluded pattern has been found as we do not handle their
lowering yet.
* parse/rust-parse-impl.h (Parser::parse_literal_or_range_pattern):
Parse excluded range patterns.
(Parser::parse_pattern_no_alt): Likewise.
(Parser::parse_ident_leading_pattern): Likewise.
gccrs: Add some test for raw_ref_op to prevent regressions
Add a test for the feature gate, as well as some test to ensure the raw
keyword stays weak. Also add some tests to check whether the raw_ref_op
syntax is parsed correctly.
gcc/testsuite/ChangeLog:
* rust/compile/not_raw_ref_op.rs: New test.
* rust/compile/raw_ref_op.rs: New test.
* rust/compile/raw_ref_op_feature_gate.rs: New test.
* rust/compile/raw_ref_op_invalid.rs: New test.
The raw ref operator is an unstable feature required to obtain a pointer
to unaligned adresses (mainly unaligned struct fields) without UB.
gcc/rust/ChangeLog:
* ast/rust-ast-builder.cc (Builder::ref): Adapt constructor to the new
API.
* ast/rust-ast-collector.cc (TokenCollector::visit): Emit a raw weak
keyword when required.
* ast/rust-ast.cc (BorrowExpr::as_string): Change as_string
representation to handle raw ref operator.
* ast/rust-expr.h (class BorrowExpr): Add raw discriminant.
* expand/rust-macro-builtins-include.cc: Adapt constructor to the new
API.
* parse/rust-parse-impl.h: Handle the raw weak keyword.