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4 weeks agolibstdc++: store the length after the store of the null character
Andrew Pinski [Tue, 18 Nov 2025 20:57:24 +0000 (12:57 -0800)] 
libstdc++: store the length after the store of the null character

This improves the code generation slightly for std::string because of
aliasing. In many cases the length will be read again and the store of
the null character will cause the length to be re-read due to aliasing
requirements of the char type. So swapping around the stores will allow
the length not to have to be reloaded from memory and will allow
for more optimizations.

Bootstrapped and tested on x86_64-linux-gnu.

libstdc++-v3/ChangeLog:

* include/bits/basic_string.h (basic_string::M_set_length): Swap
around the order of traits_type::assign and _M_length so that
_M_length is at the end.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
4 weeks agodce: Use FOR_EACH_IMM_USE_FAST instead of FOR_EACH_IMM_USE_STMT in simple_dce_from_wo...
Andrew Pinski [Fri, 14 Nov 2025 01:27:06 +0000 (17:27 -0800)] 
dce: Use FOR_EACH_IMM_USE_FAST instead of FOR_EACH_IMM_USE_STMT in simple_dce_from_worklist

When I wrote this code I forgot about FOR_EACH_IMM_USE_FAST. Since this code does not change
any of the uses inside of the loop using FOR_EACH_IMM_USE_FAST will be slightly faster.

Bootstrapped and tested on x86_64-linux-gnu.

gcc/ChangeLog:

* tree-ssa-dce.cc (simple_dce_from_worklist): Use FOR_EACH_IMM_USE_FAST instead of
FOR_EACH_IMM_USE_STMT.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
4 weeks agoaarch64: Fix ICE when laying out arguments of size 0 [PR 122763]
Alfie Richards [Wed, 19 Nov 2025 11:47:09 +0000 (11:47 +0000)] 
aarch64: Fix ICE when laying out arguments of size 0 [PR 122763]

When laying out arguments of size 0, previously would return the next argument
passing register, without checking that there was a next one.

This was fine for AAPCS as it used R0-R7 for argument passing and R9 would be
occasionally be assigned, but never used.

However, with the introduction of preserve_none PCS there is no obvious "next
register" to use as aaaa dummy value, and so when laying out in the
"next register" when there were no more, an assert triggered an ICE.

This patch fixes this ICE by instead using NULL_RTX for arguments of size 0.

PR target/122763

gcc/ChangeLog:

* config/aarch64/aarch64.cc (aarch64_layout_arg): Return NULL_RTX for
arguments of size 0.
(aarch64_function_arg_advance): Remove assert.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/pr122763.c: New test.

4 weeks agodocs: aarch64: Minor grammar fix for preserve_none.
Alfie Richards [Tue, 18 Nov 2025 15:36:26 +0000 (15:36 +0000)] 
docs: aarch64: Minor grammar fix for preserve_none.

gcc/ChangeLog:

* doc/extend.texi (preserve_none): Minor grammar fix.

4 weeks agoc++: current inst name lookup within noexcept-spec [PR122668]
Patrick Palka [Wed, 19 Nov 2025 16:10:38 +0000 (11:10 -0500)] 
c++: current inst name lookup within noexcept-spec [PR122668]

Since we don't implement deferred noexcept-spec parsing of a friend
declaration, the r15-2117 change diagnosing name lookup failure for the
current instantiation ahead of time needs to be suppressed in this case.

PR c++/122668
PR c++/114764

gcc/cp/ChangeLog:

* pt.cc (dependentish_scope_p): Return true for the current
instantiation from within an immediately parsed noexcept-spec.

gcc/testsuite/ChangeLog:

* g++.dg/cpp0x/noexcept91.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
4 weeks agoregenerate configure files
Martin Liska [Wed, 19 Nov 2025 15:45:42 +0000 (16:45 +0100)] 
regenerate configure files

libstdc++-v3/ChangeLog:

* configure: Regenerate.

Signed-off-by: Martin Liška <martin.liska@hey.com>
4 weeks agosupport Wild linker
Martin Liska [Sun, 2 Nov 2025 08:47:34 +0000 (09:47 +0100)] 
support Wild linker

gcc/ChangeLog:

* collect2.cc (main): Add wild linker to -fuse-ld.
* common.opt: Likewise.
* configure: Regenerate.
* configure.ac: Add detection for wild linker.
* doc/invoke.texi: Document -fuse-ld=wild.
* gcc.cc (driver_handle_option): Support -fuse-ld=wild.
* opts.cc (common_handle_option): Likewise.

libatomic/ChangeLog:

* acinclude.m4: Add detection for wild linker.
* configure: Regenerate.

libgomp/ChangeLog:

* acinclude.m4:: Add detection for wild linker.
* configure: Regenerate.

libitm/ChangeLog:

* acinclude.m4:: Add detection for wild linker.
* configure: Regenerate.

libstdc++-v3/ChangeLog:

* acinclude.m4:: Add detection for wild linker.
* configure: Regenerate.

Signed-off-by: Martin Liška <martin.liska@hey.com>
4 weeks ago[MAINTANERS] Add myself to MAINTAINERS file
Martin Liska [Wed, 19 Nov 2025 15:02:04 +0000 (16:02 +0100)] 
[MAINTANERS] Add myself to MAINTAINERS file

Signed-off-by: Martin Liška <martin.liska@hey.com>
ChangeLog:

* MAINTAINERS: Add myself to write after approval (DSO).

4 weeks agolibstdc++: Make <mdspan> compatible with clang.
Luc Grosheintz [Wed, 19 Nov 2025 13:52:04 +0000 (14:52 +0100)] 
libstdc++: Make <mdspan> compatible with clang.

These three changes are needed to make <mdspan> compatible with Clang:

  - the type alias _Storage must occur before its first use.

  - the friend declarations of function must match exactly, including
  noexcept and constexpr.

  - the 'template' in typename T::template type<double>.

libstdc++-v3/ChangeLog:

* include/std/mdspan (extents::_Storage): Move type alias before
its first use.
(__mdspan::__static_extents): Add missing noexcept and constexpr
to friend declaration in extents.
(__mdspan::__dynamic_extents): Ditto.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
Signed-off-by: Luc Grosheintz <luc.grosheintz@gmail.com>
4 weeks agoAArch64: expand extractions of Adv.SIMD registers from SVE as separate insn.
Tamar Christina [Wed, 19 Nov 2025 14:27:55 +0000 (14:27 +0000)] 
AArch64: expand extractions of Adv.SIMD registers from SVE as separate insn.

For this example using the Adv.SIMD/SVE Bridge

#include <arm_neon.h>
#include <arm_neon_sve_bridge.h>
#include <stdint.h>

svint16_t sub_neon_i16_sve_bridged(svint8_t a, svint8_t b) {
    return svset_neonq_s16(svundef_s16(),
            vsubq_s16(vmovl_high_s8(svget_neonq(a)),
                      vmovl_high_s8(svget_neonq(b))));
}

we generate:

sub_neon_i16_sve_bridged(__SVInt8_t, __SVInt8_t):
        sxtl2   v0.8h, v0.16b
        ssubw2  v0.8h, v0.8h, v1.16b
        ret

instead of just

sub_neon_i16_sve_bridged(__SVInt8_t, __SVInt8_t):
        ssubl2  v0.8h, v0.16b, v1.16b
        ret

Commit g:abf865732a7313cf79ffa325faed3467ed28d8b8 added a framework to fold
uses of instrinsics combined with lo/hi extractions into the appropriate low
or highpart instructions.

However this doesn't trigger because the Adv.SIMD from SVE extraction code for

vmovl_high_s8(svget_neonq(a))

does not have one argument as constant and only supports folding 2 insn, not 3
into 1.

The above in RTL generates

(insn 7 4 8 2 (set (reg:V8QI 103 [ _6 ])
        (vec_select:V8QI (subreg:V16QI (reg/v:VNx16QI 109 [ a ]) 0)
            (parallel:V16QI [
                    (const_int 8 [0x8])
                    (const_int 9 [0x9])
                    (const_int 10 [0xa])
                    (const_int 11 [0xb])
                    (const_int 12 [0xc])
                    (const_int 13 [0xd])
                    (const_int 14 [0xe])
                    (const_int 15 [0xf])
                ]))) "":3174:43 -1
     (nil))

Since the SVE and the Adv. SIMD modes are tieable this is a valid instruction to
make, however it's suboptimal in that we can't fold this into the existing
instruction patterns.  Eventually early-ra will split off the SVE reg from the
patterns but by then we're passed combine and insn foldings so we miss all the
optimizations.

This patch introduces vec_extract optabs for 128-bit and 64-bit Adv.SIMD vector
extraction from SVE registers and emits an explicit separate instruction for the
subregs.  This then gives combine and rtl folding the opportunity to form the
combined instructions and if not we arrive at the same RTL after early-ra.

gcc/ChangeLog:

* config/aarch64/aarch64-sve.md (vec_extract<mode><v128>,
vec_extract<mode><v64>): New.
* config/aarch64/iterators.md (V64, v64): New.
* config/aarch64/predicates.md (const0_to_1_operand): New.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/simd/fold_to_highpart_6.c: Update codegen.
* gcc.target/aarch64/sve/fold_to_highpart_1.c: New test.
* gcc.target/aarch64/sve/fold_to_highpart_2.c: New test.

4 weeks ago[RISC-V] Fix trivial bootstrap failure on RISC-V
Jeff Law [Wed, 19 Nov 2025 13:34:33 +0000 (06:34 -0700)] 
[RISC-V] Fix trivial bootstrap failure on RISC-V

Trivial bootstrap fix for the RISC-V port where a recent change introduced a
signed vs unsigned warning.

gcc/
* config/riscv/riscv-string.cc (riscv_expand_block_move_scalar):
Fix signed vs unsigned warning.

4 weeks agoFix dr_chain memleak in vectorizable_load
Richard Biener [Wed, 19 Nov 2025 10:27:43 +0000 (11:27 +0100)] 
Fix dr_chain memleak in vectorizable_load

Figured while running a leak check on some new SLP code.

* tree-vect-stmts.cc (vectorizable_load): Make dr_chain
an auto_vec, move down to where we use it to avoid creating
it twice.

4 weeks agotree-optimization/122722 - better SLP reduction group discovery
Richard Biener [Tue, 18 Nov 2025 14:20:44 +0000 (15:20 +0100)] 
tree-optimization/122722 - better SLP reduction group discovery

The following improves the all-or-nothing discovery of reduction
groups to consider sub-groups by trying toplevel "matches" candidates
for this.  For simplicity and to limit compile-time failed sub-group
matches are not decomposed further, only the originally failed part
is tried again to discover more sub-groups.  Any remaining fails
get picked up by the current single-reduction handling.

PR tree-optimization/122722
* tree-vect-slp.cc (vect_analyze_slp_reductions): New
function, split out from vect_analyze_slp.  Try SLP
sub-groups.
(vect_analyze_slp_reduction_group): New helper.

* gcc.dg/vect/slp-reduc-14.c: New testcase.

4 weeks agotestsuite: Add testcase for already fixed PR [PR121519]
Jakub Jelinek [Wed, 19 Nov 2025 12:41:59 +0000 (13:41 +0100)] 
testsuite: Add testcase for already fixed PR [PR121519]

This PR has been fixed by r16-4253 PR121206 fix.

2025-11-19  Jakub Jelinek  <jakub@redhat.com>

PR tree-optimization/121519
* gcc.dg/pr121519.c: Add testcase for already fixed PR.

4 weeks agoarm: testsuite: fix vgetq_lane tests for c++
Christophe Lyon [Mon, 17 Nov 2025 11:05:10 +0000 (11:05 +0000)] 
arm: testsuite: fix vgetq_lane tests for c++

Surpringly these tests were lacking the extern "C" that other MVE
intrinsics have, making them fail when tested in C++ mode.

While fixing that:
- remove useless dg-skip-if
- remove hardcoded -mfloat-abi=hard from s64 and u64 versions
- add check-function-bodies to s64 and u64 versions, such that these
  tests no longer appear as duplicates.

gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vgetq_lane_f16.c: Add missing
extern "C". Remove dg-skip-if.
* gcc.target/arm/mve/intrinsics/vgetq_lane_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_s64.c: Likewise. Add
check-function-bodies.
* gcc.target/arm/mve/intrinsics/vgetq_lane_u64.c: Likewise.

4 weeks agotree-optimization/122747 - fix masking of loops with conditional reduction ops
Richard Biener [Wed, 19 Nov 2025 09:33:05 +0000 (10:33 +0100)] 
tree-optimization/122747 - fix masking of loops with conditional reduction ops

The following amends the earlier fix in r16-5372-gfacb92812a4ec5 to
also cover the case we're not doing the merge to a single cycle
but go via vectorizable_call.

PR tree-optimization/122747
* tree-vect-stmts.cc (vectorizable_call): Handle reduction
operations that are already conditional.

* gcc.target/i386/vect-epilogues-10.c: New testcase.

4 weeks agotree-ssanames: Fix pasto in get_known_nonzero_bits function comment
Jakub Jelinek [Wed, 19 Nov 2025 10:52:16 +0000 (11:52 +0100)] 
tree-ssanames: Fix pasto in get_known_nonzero_bits function comment

get_known_nonzero_bits_1 function comment a few lines earlier says
correctly it returns 0 for unknown (unlike get_nonzero_bits{,_1}
which return -1 for unknown).

2025-11-19  Jakub Jelinek  <jakub@redhat.com>

* tree-ssanames.cc (get_known_nonzero_bits): Fix a pasto in
function comment, this function returns 0 if unknown rather
than -1.

4 weeks agoc++, libstdc++: Implement CWG1670 and LWG4468
Jakub Jelinek [Wed, 19 Nov 2025 10:02:13 +0000 (11:02 +0100)] 
c++, libstdc++: Implement CWG1670 and LWG4468

The following patch attempts to implement CWG1670 and related LWG4468.

2025-11-19  Jakub Jelinek  <jakub@redhat.com>

gcc/cp/
* parser.cc (cp_parser_conversion_type_id): Implement C++ DR1670
- auto as conversion-type-id.  Pedwarn on conversion operators
with placeholder return type.
gcc/testsuite/
* g++.dg/DRs/dr1670-1.C: New test.
* g++.dg/DRs/dr1670-2.C: New test.
* g++.dg/DRs/dr1670-3.C: New test.
* g++.dg/modules/auto-1_a.H: Use dg-options instead of
dg-additional-options.
* g++.dg/modules/auto-1_b.C: Likewise.
* g++.dg/cpp1y/auto-fn12.C: Likewise.
* g++.dg/cpp1y/auto-fn13.C: Add empty dg-options.
* g++.dg/cpp1y/auto-fn22.C: Likewise.
* g++.dg/cpp1y/constexpr-assert2.C: Likewise.
* g++.dg/cpp1y/auto-fn44.C: Add dg-options -Wpedantic and expect
further warnings.
* g++.dg/cpp1y/auto-fn50.C: Likewise.
* g++.dg/cpp0x/auto9.C: Expect two errors always rather than just
for C++11.
libstdc++-v3/
* include/std/type_traits (constant_wrapper conversion operator):
Use decltype(value) instead of decltype(auto).  Resolves LWG4468.

4 weeks agolibstdc++: Implement proposed resolution of LWG4477 [PR122671]
Jakub Jelinek [Wed, 19 Nov 2025 08:38:17 +0000 (09:38 +0100)] 
libstdc++: Implement proposed resolution of LWG4477 [PR122671]

This patch implements the proposed resolution of
https://cplusplus.github.io/LWG/issue4477
The PR complains that one can't successfully throw from constructor
in placement new in a constant expression and catch that exception
later on.  The problem is while P2747R2 made placement ::operator new
and ::operator new[] constexpr, when the ctor throws it invokes also
these weird placement ::operator delete and ::operator delete[]
which intentionally perform no action, and those weren't constexpr,
so constant expression evaluation failed.

2025-11-19  Jakub Jelinek  <jakub@redhat.com>

PR libstdc++/122671
* libsupc++/new (::operator delete, ::operator delete[]): Implement
proposed LWG4477 resolution.  Use _GLIBCXX_PLACEMENT_CONSTEXPR for
placement operator deletes.

* g++.dg/cpp26/constexpr-eh17.C: New test.

4 weeks agotree-ssa-live: Fix .DEFERRED_INIT handling [PR122184]
Jakub Jelinek [Wed, 19 Nov 2025 08:36:51 +0000 (09:36 +0100)] 
tree-ssa-live: Fix .DEFERRED_INIT handling [PR122184]

remove_unused_locals ignores clobbers in the initial phase (and
some debug stmts) and this has been copied for .DEFERRED_INIT
as well:
          if (gimple_clobber_p (stmt))
            {
              have_local_clobbers = true;
              continue;
            }

          if (gimple_call_internal_p (stmt, IFN_DEFERRED_INIT))
            {
              have_local_clobbers = true;
              continue;
            }
This is so that the second phase can then drop clobbers that
clobber unused local vars and ditto for .DEFERRED_INIT.
Except, for clobbers it does
                /* Remove clobbers referencing unused vars, or clobbers
                   with MEM_REF lhs referencing uninitialized pointers.  */
                if ((VAR_P (base) && !is_used_p (base))
                    || (TREE_CODE (lhs) == MEM_REF
                        && TREE_CODE (TREE_OPERAND (lhs, 0)) == SSA_NAME
                        && SSA_NAME_IS_DEFAULT_DEF (TREE_OPERAND (lhs, 0))
                        && (TREE_CODE (SSA_NAME_VAR (TREE_OPERAND (lhs, 0)))
                            != PARM_DECL)))
so handles both the var = {CLOBBER}; case where var is unused local,
or *SSA_NAME = {CLOBBER} where SSA_NAME is default definition of
non-PARM_DECL, but for .DEFERRED_INIT it doesn't:
                if (DECL_P (base) && !is_used_p (base))
On the following case, we have *SSA_NAME(D) = .DEFERRED_INIT (...);
and because of the former we don't mark the SSA_NAME as used and
because of the latter we keep the .DEFERRED_INIT call, so the SSA_NAME
is freed and later on we ICE because the SSA_NAME in the freelist doesn't
have SSA_NAME_DEF_STMT.

The following patch fixes it by handling .DEFERRED_INIT like clobbers
and dropping them also when it has a MEM_REF with default definition
of SSA_NAME for non-PARM_DECL on the lhs.

2025-11-19  Jakub Jelinek  <jakub@redhat.com>

PR tree-optimization/122184
* tree-ssa-live.cc (remove_unused_locals): Drop .DEFERRED_INIT
calls with MEM_REF lhs based on uninitialized SSA_NAME.

* g++.dg/opt/pr122184-1.C: New test.
* g++.dg/opt/pr122184-2.C: New test.

4 weeks agobuild: Define DISABLE_MULTILIB if --disable-multilib
Rainer Orth [Wed, 19 Nov 2025 08:24:14 +0000 (09:24 +0100)] 
build: Define DISABLE_MULTILIB if --disable-multilib

When building trunk on Solaris with --disable-multilib, I noticed that
the non-default multilib wasn't rejected any longer, leading to
unexpected link failures.  I could trace this to DISABLE_MULTILIB no
longer being defined in multilib.h.  The problem ist that
gcc/genmultilib has been changed in

Author: Terry Guo <terry.guo@arm.com>
Date:   Sun Jan 13 10:12:07 2013 +0000

    Makefile.in (s-mlib): New argument MULTILIB_REUSE.

This patch factored out the code that sets disable_multilib and controls
emission of that macro into a separate generated script (tmpmultilib3),
but genmultilib itself continues to check $disable_multilib that isn't
ever set there.

Fixed by checking enable_multilib instead which is set from the
corresponding genmultilib argument.  DISABLE_MULTILIB is only referenced
in gcc/config/sol2.h, so no other port should be affected.

Bootstrapped without regressions on i386-pc-solaris2.11 and
sparc-sun-solaris2.11 and verifying that the non-default multilibs are
now rejected again as expected.

2025-11-18  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

gcc:
* genmultilib: Check $enable_multilib to define DISABLE_MULTILIB.

4 weeks agoFix typo in sol2.h
Rainer Orth [Wed, 19 Nov 2025 08:19:10 +0000 (09:19 +0100)] 
Fix typo in sol2.h

I noticed that gcc/config/sol2.h uses USE_GNU_LD as a guard in one
place only.  This is a cross of USE_GLD and HAVE_GNU_LD which doesn't
exist so the gld variant is never used.

This went unnoticed since the wrong versions of LD_WHOLE_ARCHIVE_OPTION
and LD_NO_WHOLE_ARCHIVE_OPTION are only ever used in LIBASAN_EARLY_SPEC
and only effective when -static-libasan is used.  gld would only warn
about the unsupported -z options here.

The issue wasn't noticed before since the only testcase using
-static-libasan isn't run on Solaris, which this patch also corrects.

Bootstrapped without regressions on i386-pc-solaris2.11 and
sparc-sun-solaris2.11 (both as/ld and gas/gld).

2025-11-18  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

gcc:
* config/sol2.h: Check USE_GLD instead of USE_GNU_LD.

gcc/testsuite:
* c-c++-common/asan/pr59063-2.c: Enable on Solaris.

4 weeks agors6000: Do not reorder operands for vec_pack_to_short_fp32 based on endianness
Avinash Jayakar [Wed, 19 Nov 2025 05:10:45 +0000 (10:40 +0530)] 
rs6000: Do not reorder operands for vec_pack_to_short_fp32 based on endianness

The patterns for altivec_vpku<VI_char>um take care of the order of
operands for the vpkuwum instruction, and therefore it is not needed in
the define_expand pattern "convert_4f32_8f16".

2025-11-18  Avinash Jayakar  <avinashd@linux.ibm.com>

gcc/ChangeLog:
PR target/119130
* config/rs6000/altivec.md (convert_4f32_8f16): Use same operand
order for both endian format.

gcc/testsuite/ChangeLog:
PR target/119130
* gcc.target/powerpc/builtins-1-p9-runnable.c: Use same expected
results for both endian format.

4 weeks agoFortran: Fix testcases from [PR32365]
Jerry DeLisle [Wed, 19 Nov 2025 03:40:07 +0000 (19:40 -0800)] 
Fortran: Fix testcases from [PR32365]

PR fortran/32365

gcc/testsuite/ChangeLog:

* gfortran.dg/goacc/routine-1.f90: Adjust dg-error format.
* gfortran.dg/goacc/routine-2.f90: Adjust dg-error format.
* gfortran.dg/gomp/declare-variant-17.f90: Adjust dg-error format.
* gfortran.dg/gomp/order-2.f90: Adjust dg-error format.
* gfortran.dg/gomp/pr78026.f03: Adjust dg-error format.
* gfortran.dg/gomp/requires-4.f90: Adjust dg-error format.
* gfortran.dg/gomp/requires-6.f90: Adjust dg-error format.

4 weeks agoi386: Add AVX10.1, AVX10.2, APX_F and MOVRS to Nova Lake
Haochen Jiang [Tue, 18 Nov 2025 07:05:15 +0000 (15:05 +0800)] 
i386: Add AVX10.1, AVX10.2, APX_F and MOVRS to Nova Lake

Nova Lake will enable AVX10.1, AVX10.2, APX_F and MOVRS according to the
latest documentation.

Due to PTA_XXX would not maintain imply relationships, we need to add
all PTA_AVX512XXX which AVX10 enabled to enable AVX10.1 ISAs. It is not
a redundant addition in i386.h.

gcc/ChangeLog:

* common/config/i386/i386-common.cc: Adjust to P_PROC_AVX10_1.
* config/i386/driver-i386.cc (host_detect_local_cpu):
Move Nova Lake to under AVX512 part.
* config/i386/i386.h (PTA_NOVALAKE): Add AVX10.1, AVX10.2,
APX_F and MOVRS.
* config/i386/x86-tune-sched.cc (ix86_issue_rate): Set to 8.
* config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Add Nova
Lake.
* doc/invoke.texi: Adjust documentation.

4 weeks agoDaily bump.
GCC Administrator [Wed, 19 Nov 2025 00:19:58 +0000 (00:19 +0000)] 
Daily bump.

4 weeks agolibgomp.texi: Update MASTER/MASKED entry in the libgomp ABI section
Tobias Burnus [Tue, 18 Nov 2025 22:10:21 +0000 (23:10 +0100)] 
libgomp.texi: Update MASTER/MASKED entry in the libgomp ABI section

libgomp/
* libgomp.texi (The libgomp ABI): Update MASTER section by
also covering MASKED.

4 weeks agocobol: Correct Makefile.am from 809b32660990867052132c706a9c9fdef1766e8f
James K. Lowden [Tue, 18 Nov 2025 17:26:12 +0000 (12:26 -0500)] 
cobol: Correct Makefile.am from 809b32660990867052132c706a9c9fdef1766e8f

Update lagging libgcobol/Makefile.am to match libgcobol/Makefile.in.

libgcobol/ChangeLog:
PR cobol/122702
* Makefile.am: Include posix/udf/posix-open.cbl.

4 weeks agoRISC-V: Add flag to adjust mem inlining threshold
Edwin Lu [Fri, 7 Nov 2025 18:49:33 +0000 (10:49 -0800)] 
RISC-V: Add flag to adjust mem inlining threshold

Add param flags to adjust the memcpy/memove/memset inlining threshold.
The threshold can be updated with --param=<routine>-size-threshold=

Default is currently set for disabled.

gcc/ChangeLog:

* config/riscv/riscv-string.cc (riscv_expand_block_move_scalar):
Add length check.
(expand_block_move): Ditto.
(expand_vec_setmem): Ditto.
* config/riscv/riscv.opt: Add param flags.

Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
4 weeks agolibstdc++: shared_mutex: Respond consistently to errors and deadlock
Mike Crowe [Tue, 18 Nov 2025 13:06:53 +0000 (13:06 +0000)] 
libstdc++: shared_mutex: Respond consistently to errors and deadlock

Make the shared_mutex::try_lock(), shared_timed_mutex::try_lock_until()
and shared_timed_mutex::try_lock_shared_until() all handle errors from
pthread functions consistently by returning false to indicate that the
lock could not be taken. If _GLIBCXX_ASSERTIONS is defined then
unexpected errors, such as EDEADLK and EINVAL will cause an assertion
failure. If _GLIBCXX_ASSERTIONS is not defined then these functions no
longer ever return true incorrectly indicating that they have taken the
lock.

This removes the previous behaviour of looping on EDEADLK in
try_lock_shared_until() and no longer returns true on EINVAL in all of
these functions. (In theory at least it should not be possible to
trigger EINVAL since 5dba17a3e709859968f939354e6e5e8d796012d3.)

Unfortunately my reading of POSIX is that pthread_rwlock_clockrdlock[1],
pthread_rwlock_timedrdlock pthread_rwlock_clockwrlock[2] and
pthread_rwlock_timedwrlock are allowed to deadlock rather than return
EDEADLK when trying to take a lock a second time from the same
thread. This means that the deadlock tests cannot be enabled by
default. I believe that the tests do work with glibc (2.31 & 2.36) and
with the __shared_mutex_cv implementation though.

[1] https://pubs.opengroup.org/onlinepubs/9799919799/functions/pthread_rwlock_clockrdlock.html
[2] https://pubs.opengroup.org/onlinepubs/9799919799/functions/pthread_rwlock_clockwrlock.html

libstdc++-v3/ChangeLog:

* include/std/shared_mutex (try_lock, try_lock_until)
(try_lock_shared_until): Respond consistently to errors and
deadlocks.
* testsuite/30_threads/shared_timed_mutex/try_lock_until/116586.cc:
Test deadlock behaviour if possible.

Signed-off-by: Mike Crowe <mac@mcrowe.com>
4 weeks agoc++: Handle absolute path for CMI output directory [PR122677]
Jonathan Wakely [Tue, 18 Nov 2025 13:19:53 +0000 (13:19 +0000)] 
c++: Handle absolute path for CMI output directory [PR122677]

When trying to create each directory component of an absolute path, the
first call to mkdir uses a path of "" which gives an ENOENT error. This
causes the create_dirs function to return without creating anything.

This commit skips past the leading slashes of an absolute path, so that
the first call to mkdir is for an actual directory name, not an empty
string.

gcc/cp/ChangeLog:

PR c++/122677
* module.cc (create_dirs): Skip past any leading slashes.

4 weeks agoarm: [MVE intrinsics] remove __ARM_mve_typeid and __ARM_mve_coerce in arm_mve.h
Christophe Lyon [Fri, 19 Sep 2025 13:39:55 +0000 (13:39 +0000)] 
arm: [MVE intrinsics] remove __ARM_mve_typeid and __ARM_mve_coerce in arm_mve.h

These helpers are not needed anymore, so remove them.

gcc/ChangeLog:

* config/arm/arm_mve.h (__ARM_mve_typeid): Delete.
(__ARM_mve_coerce): Delete.
(__ARM_mve_coerce_i_scalar): Delete.
(__ARM_mve_coerce_s8_ptr): Delete.
(__ARM_mve_coerce_u8_ptr): Delete.
(__ARM_mve_coerce_s16_ptr): Delete.
(__ARM_mve_coerce_u16_ptr): Delete.
(__ARM_mve_coerce_s32_ptr): Delete.
(__ARM_mve_coerce_u32_ptr): Delete.
(__ARM_mve_coerce_s64_ptr): Delete.
(__ARM_mve_coerce_u64_ptr): Delete.
(__ARM_mve_coerce_f_scalar): Delete.
(__ARM_mve_coerce_f16_ptr): Delete.
(__ARM_mve_coerce_f32_ptr): Delete.

4 weeks agoarm: [MVE intrinsics] rework vuninitialized
Christophe Lyon [Fri, 19 Sep 2025 12:20:27 +0000 (12:20 +0000)] 
arm: [MVE intrinsics] rework vuninitialized

Implement vuninitialized using the new MVE builtins framework.

This patch is a bit more intrusive than other similar patches because
the two vuninitialized variants use different signatures.

To handle this situation, the patch makes the inherent shape derive
from overloaded_base instead of nonoverloaded_base, and adds a new
parameter to add_unique_function so that we can choose between adding
only the nonoverloaded version, only the overloaded ones, or both (the
default).

The patch introduces pop_and_resolve_to, which pops an argument (the
only one in this case), and calls resolve_to, like many other shapes:
this is because the overloaded version takes an argument (used to
resolve which nonoverloaded version to call), which is not present in
the nonoverloaded version prototype.

gcc/ChangeLog:
* config/arm/arm-mve-builtins-shapes.cc (build_one): Add
which_overload parameter.
(inherent): Derive from overloaded_base<0>.  Add support for
overloaded version.
* config/arm/arm-mve-builtins-shapes.h (inherent): Update comment.
* config/arm/arm-mve-builtins.cc (add_unique_function): Add
support for new which_overload parameter.
(pop_and_resolve_to): New.
* config/arm/arm-mve-builtins.h (NONOVERLOADED_FORM)
(OVERLOADED_FORM): New.
(add_unique_function): Update prototype.
(pop_and_resolve_to): New prototype.
* config/arm/arm_mve.h (vuninitializedq): Delete.
(vuninitializedq_u8): Delete.
(vuninitializedq_u16): Delete.
(vuninitializedq_u32): Delete.
(vuninitializedq_u64): Delete.
(vuninitializedq_s8): Delete.
(vuninitializedq_s16): Delete.
(vuninitializedq_s32): Delete.
(vuninitializedq_s64): Delete.
(vuninitializedq_f16): Delete.
(vuninitializedq_f32): Delete.
(__arm_vuninitializedq): Delete.

4 weeks agoarm: [MVE intrinsics] rework vgetq_lane vsetq_lane
Christophe Lyon [Tue, 19 Aug 2025 21:21:59 +0000 (21:21 +0000)] 
arm: [MVE intrinsics] rework vgetq_lane vsetq_lane

Implement vgetq_lane and vsetq_lane using the new MVE builtins
framework.

Although MVE intrinsics are not supported in big-endian mode, we keep
the code to convert lane indices into GCC's vector indices, so that
it's already in place in case we want to support big-endian in the
future.

The patch adds new tests, to check that we emit an error when the lane
number is not in the expected range.

gcc/ChangeLog:

* config/arm/arm-mve-builtins-base.cc (class
mve_function_vset_vget_lane): New.
(vgetq_lane, vsetq_lane): New.
* config/arm/arm-mve-builtins-base.def (vgetq_lane, vsetq_lane):
New.
* config/arm/arm-mve-builtins-base.h (vgetq_lane, vsetq_lane):
New.

* config/arm/arm-mve-builtins-shapes.cc (struct getq_lane)
(setq_lane): New.
* config/arm/arm-mve-builtins-shapes.h (getq_lane, setq_lane):
New.
* config/arm/arm_mve.h (vsetq_lane): Delete.
(vgetq_lane): Delete.
(vsetq_lane_f16): Delete.
(vsetq_lane_f32): Delete.
(vsetq_lane_s16): Delete.
(vsetq_lane_s32): Delete.
(vsetq_lane_s8): Delete.
(vsetq_lane_s64): Delete.
(vsetq_lane_u8): Delete.
(vsetq_lane_u16): Delete.
(vsetq_lane_u32): Delete.
(vsetq_lane_u64): Delete.
(vgetq_lane_f16): Delete.
(vgetq_lane_f32): Delete.
(vgetq_lane_s16): Delete.
(vgetq_lane_s32): Delete.
(vgetq_lane_s8): Delete.
(vgetq_lane_s64): Delete.
(vgetq_lane_u8): Delete.
(vgetq_lane_u16): Delete.
(vgetq_lane_u32): Delete.
(vgetq_lane_u64): Delete.
(__ARM_NUM_LANES): Delete.
(__ARM_LANEQ): Delete.
(__ARM_CHECK_LANEQ): Delete.
(__arm_vsetq_lane_s16): Delete.
(__arm_vsetq_lane_s32): Delete.
(__arm_vsetq_lane_s8): Delete.
(__arm_vsetq_lane_s64): Delete.
(__arm_vsetq_lane_u8): Delete.
(__arm_vsetq_lane_u16): Delete.
(__arm_vsetq_lane_u32): Delete.
(__arm_vsetq_lane_u64): Delete.
(__arm_vgetq_lane_s16): Delete.
(__arm_vgetq_lane_s32): Delete.
(__arm_vgetq_lane_s8): Delete.
(__arm_vgetq_lane_s64): Delete.
(__arm_vgetq_lane_u8): Delete.
(__arm_vgetq_lane_u16): Delete.
(__arm_vgetq_lane_u32): Delete.
(__arm_vgetq_lane_u64): Delete.
(__arm_vsetq_lane_f16): Delete.
(__arm_vsetq_lane_f32): Delete.
(__arm_vgetq_lane_f16): Delete.
(__arm_vgetq_lane_f32): Delete.
(__arm_vsetq_lane): Delete.
(__arm_vgetq_lane): Delete.
* config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Add '@'
prefix.
(mve_vec_set<mode>_internal): Likewise.

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vsetq_lane_f16_bounds.c: New test.
* gcc.target/arm/mve/intrinsics/vsetq_lane_f32_bounds.c: New test.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s16_bounds.c: New test.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s32_bounds.c: New test.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s64_bounds.c: New test.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s8_bounds.c: New test.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u16_bounds.c: New test.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u32_bounds.c: New test.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u64_bounds.c: New test.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u8_bounds.c: New test.

4 weeks agoarm: doc: Update documentation on half-precision support
Christophe Lyon [Tue, 18 Nov 2025 16:25:40 +0000 (16:25 +0000)] 
arm: doc: Update documentation on half-precision support

The previous patch makes __fp16 always available on arm (using
-mfp16-format is no longer needed), so the documentation needs an
update.

In the process, clarify the peculiarities of __fp16 on arm, and
reorder information to make it easier to understand.

gcc/ChangeLog:
* doc/extend.texi (Half-precision Floating-point): __fp16 is now
always available on arm.  Move x86 paragraph closer to the rest of
the x86 information, and make it use present tense.

4 weeks agoarm: [MVE intrinsics] Avoid warnings when floating-point is not supported [PR 117814]
Christophe Lyon [Thu, 18 Sep 2025 23:16:32 +0000 (23:16 +0000)] 
arm: [MVE intrinsics] Avoid warnings when floating-point is not supported [PR 117814]

If the target does not support floating-point, we register FP vector
types as 'void' (see register_vector_type).

This leads to warnings about 'pure attribute on function returning
void' when we declare the various load intrinsics because their
call_properties say CP_READ_MEMORY (thus giving them the 'pure'
attribute), but their return type is void.  This happens for instance
in gcc.target/arm/pr112337.c, depending on how GCC is built (I didn't
notice the warnings because arm_mve.h is considered as a system
include in my environment, and the warning is not emitted, but CI
reported it).

To avoid such warnings, declare floating-point scalar and vector types
even if the target does not have an FPU.

Note that since an FPU can be activated via #pragma GCC target
("arch=armv8.1-m.main+mve.fp" for instance), it means that such types
cannot appear and disappear withing a single TU, they have to be
available in all contexts.  This implies a noteworthy change for
__fp16: it not longer depends on using -mfp16-format=ieee or
alternative.  Also note that if the target ISA has the fp16 bit set,
we already silently activate -mfp16-format=ieee (with an error if
-mfp16-format=alternative was supplied).  The patch now enforces
-mfp16-format=none if the option was used.

In arm-mve-builtins.cc (register_builtin_types, register_vector_type,
register_builtin_tuple_types), this means simply removing the early
exits.  However, for this to work, we need to update
arm_vector_mode_supported_p, so that vector floating-point types are
always defined, and __fp16 must always be registered by
arm_init_fp16_builtins (as it is the base type for vectors of
float16_t.  Another side effect is that the declaration of float16_t
and float32_t typedefs is now unconditional.

The new tests verify that:
- we emit an error if the code tries to use floating-point intrinsics
  and the target does not have the floating-point extension
- we emit the expected code when activating the floating-point
  expected via a pragma
- we emit the expected code when the target supports floating-point
  (no pragma needed)
- we apply -mfp16-format=none where we used to default to ieee

An update is needed in g++.target/arm/mve/general-c++/nomve_fp_1.c,
because the error message now correctly uses float16x8_t instead of
void as return type.

The patch removes gcc.target/arm/fp16-compile-none-1.c which tests
that using __fp16 produces an error with -mfp16-format=none, since it
is no longer the case.

gcc/ChangeLog:

PR target/117814
* config/arm/arm-builtins.cc (arm_init_fp16_builtins): Always
register __fp16 type.
* config/arm/arm-mve-builtins.cc (register_builtin_tuple_types):
Remove special handling when TARGET_HAVE_MVE_FLOAT is false.
(register_vector_type): Likewise.
(register_builtin_tuple_types): Likewise.
* config/arm/arm-opts.h (arm_fp16_format_type): Add
ARM_FP16_FORMAT_DEFAULT.
* config/arm/arm.cc (arm_vector_mode_supported_p): Accept
floating-point vector modes even if TARGET_HAVE_MVE_FLOAT is
false.
(arm_option_reconfigure_globals): Apply ARM_FP16_FORMAT_NONE if
requested.
* config/arm/arm.opt (mfp16-format): Default to
ARM_FP16_FORMAT_DEFAULT.
* config/arm/arm_mve_types.h (float16_t, float32_t): Define
unconditionally.
* doc/sourcebuild.texi (ARM-specific attributes): Document
arm_v8_1m_mve_nofp_ok.

gcc/testsuite/ChangeLog:

PR target/117814
* gcc.target/arm/mve/intrinsics/pr117814-f16.c: New test.
* gcc.target/arm/mve/intrinsics/pr117814-2-f16.c: New test.
* gcc.target/arm/mve/intrinsics/pr117814-3-f16.c: New test.
* gcc.target/arm/mve/intrinsics/pr117814-4-f16.c: New test.
* gcc.target/arm/mve/intrinsics/pr117814-f32.c: New test.
* gcc.target/arm/mve/intrinsics/pr117814-2-f32.c: New test.
* gcc.target/arm/mve/intrinsics/pr117814-3-f32.c: New test.
* gcc.target/arm/fp16-compile-none-1.c: Delete.
* g++.target/arm/mve/general-c++/nomve_fp_1.c: Fix expected error
message.
* lib/target-supports.exp
(check_effective_target_arm_v8_1m_mve_nofp_ok_nocache): New.
(check_effective_target_arm_v8_1m_mve_nofp_ok): New.
(add_options_for_arm_v8_1m_mve_nofp): New.

4 weeks agofortran: Enforce spec statement ordering [PR32365]
Jerry DeLisle [Tue, 18 Nov 2025 02:55:03 +0000 (18:55 -0800)] 
fortran: Enforce spec statement ordering [PR32365]

PR fortran/32365

gcc/fortran/ChangeLog:

* parse.cc (parse_executable): Reject declaration/OpenMP
specification statements seen after executable code
unconditionally, keeping the legacy DATA diagnostic as
a warning.

gcc/testsuite/ChangeLog:

* gfortran.dg/common_22.f90: Update.
* gfortran.dg/common_24.f: Update.
* gfortran.dg/goacc/routine-1.f90: Update.
* gfortran.dg/goacc/routine-2.f90: Update.
* gfortran.dg/gomp/declare-variant-17.f90: Update.
* gfortran.dg/gomp/interop-1.f90: Update.
* gfortran.dg/gomp/order-2.f90: Update.
* gfortran.dg/gomp/pr78026.f03: Update.
* gfortran.dg/gomp/requires-4.f90: Update.
* gfortran.dg/gomp/requires-6.f90: Update.
* gfortran.dg/pr61669.f90: Update.
* gfortran.dg/spec_statement_in_exec.f90: New test exercises
data/common/namelist/OpenMP directives with -fopenmp.

Signed-off-by: Christopher Albert <albert@tugraz.at>
4 weeks agotestsuite: Require target int32 for pr116815.c test
Uros Bizjak [Tue, 18 Nov 2025 16:26:17 +0000 (17:26 +0100)] 
testsuite: Require target int32 for pr116815.c test

gcc/testsuite/ChangeLog:

* gcc.dg/pr116815.c: Require target int32.

4 weeks agoada: Reserve Is_Constructor for Ada constructors
Denis Mazzucato [Thu, 30 Oct 2025 11:54:55 +0000 (12:54 +0100)] 
ada: Reserve Is_Constructor for Ada constructors

gcc/ada/ChangeLog:

* gcc-interface/decl.cc
(is_cplusplus_method,gnat_to_gnu_param,gnat_to_gnu_subprog_type):
Adjust Is_Constructor/Is_CPP_Constructor after renaming.

4 weeks agoada: Fix assertion failure on prefixed call with access to class-wide interface
Eric Botcazou [Sun, 9 Nov 2025 10:01:29 +0000 (11:01 +0100)] 
ada: Fix assertion failure on prefixed call with access to class-wide interface

The assertion failure shows that the 'Access reference implicitly introduced
for calls written in object notation whose controlling first parameter is an
access to class-wide interface is not later expanded in the cases where the
pointer to the interface needs to be retrieved.

gcc/ada/ChangeLog:

PR ada/34290
* sem_ch4.adb (Try_Object_Operation.Complete_Object_Operation): Call
Preserve_Comes_From_Source to preserve the flag on nodes.  Relocate
the Obj node consistently.  Preserve the Comes_From_Source flag for
the case of an implicit 'Access reference and post the local errors
on the rewritten prefix consistently.
* sem_util.adb (Is_Aliased_View): Also return true for a generalized
reference to the result of a function call.

4 weeks agoada: Enforce checks on access to interface type conversions
Javier Miranda [Thu, 2 Oct 2025 06:41:32 +0000 (06:41 +0000)] 
ada: Enforce checks on access to interface type conversions

The patch enforces checks on access to interface type conversions
internally generated by the frontend to displace the pointer to
a tagged type object (pointer named "this" in the C++ terminology)
from a dispatch table to a another dispatch table.

gcc/ada/ChangeLog:

* exp_util.ads (Flag_Interface_Pointer_Displacement): New subprogram.
* exp_util.adb (Flag_Interface_Pointer_Displacement): Ditto.
* exp_attr.adb (Add_Implicit_Interface_Type_Conversion): Flag type
conversions internally added to displace the pointer to the object.
(Expand_N_Attribute_Reference): Ditto.
* exp_ch4.adb (Displace_Allocator_Pointer): Ditto.
* exp_ch6.adb (Expand_Simple_Function_Return): Ditto.
(Make_Build_In_Place_Call_In_Allocator): Ditto.
(Make_CPP_Constructor_Call_In_Allocator): Ditto.
* exp_disp.adb (Expand_Interface_Actuals): Ditto.
* exp_intr.adb (Expand_Dispatching_Constructor_Call): Ditto.
* sem_ch6.adb (Analyze_Function_Return): Ditto.
* sem_disp.adb (Propagate_Tag): Ditto.
* sem_res.adb (Resolve_Actuals): Ditto.
(Valid_Conversion): Rely on the new flag to handle the type conversion
as a conversion added to displace the pointer to the object. Factorize
code handling general and anonymous access types.
* sem_type.adb (Interface_Present_In_Ancestor): For concurrent types
add missing handling of class-wide types. Noticed working on this
issue.
* sinfo.ads (Is_Interface_Pointer_Displacement): Document this new flag.
* gen_il-fields.ads (Is_Interface_Pointer_Displacement): New flag.
* gen_il-gen-gen_nodes.adb (Is_Interface_Pointer_Displacement): New
flag on N_Type_Conversion nodes.
* gen_il-internals.adb (Image): Add Is_Interface_Pointer_Displacement
flag image.

4 weeks agoada: Small cleanup in analysis of package instantiation
Eric Botcazou [Fri, 7 Nov 2025 11:32:11 +0000 (12:32 +0100)] 
ada: Small cleanup in analysis of package instantiation

This cleans up some ancient code computing whether the instantiation of the
body is needed and moves remnants to the Needs_Body_Instantiated predicate.

gcc/ada/ChangeLog:

* sem_ch12.adb (Analyze_Package_Instantiation): Streamline and move
code clearing Needs_Body after it is computed to ...
(Needs_Body_Instantiated): ...here.  Chain if-then constructs.

4 weeks agoada: Fix small typo in comment
Eric Botcazou [Fri, 7 Nov 2025 11:31:10 +0000 (12:31 +0100)] 
ada: Fix small typo in comment

gcc/ada/ChangeLog:

* sem_type.adb (Last_Overloaded): Fix typo.

4 weeks agoada: Fix bogus error about null exclusion for designated type with multiple views
Eric Botcazou [Fri, 7 Nov 2025 12:10:00 +0000 (13:10 +0100)] 
ada: Fix bogus error about null exclusion for designated type with multiple views

It comes from the new legality check retroactively introduced by AI12-0289,
but the implementation is fooled by the presence of both an incomplete and
a partial view for a tagged type.

gcc/ada/ChangeLog:

PR ada/111433
* sem_util.ads (Incomplete_Or_Partial_View): Add Partial_Only formal
parameter.
* sem_util.adb (Incomplete_Or_Partial_View): Likewise.  Do not look
for an incomplete view if it is set to True.
* sem_ch6.adb (Check_Conformance.Null_Exclusions_Match): Pass True
for Partial_Only in the call to Incomplete_Or_Partial_View.

4 weeks agoada: Update baselining disclaimer.
Tonu Naks [Fri, 7 Nov 2025 13:20:32 +0000 (13:20 +0000)] 
ada: Update baselining disclaimer.

gcc/ada/ChangeLog:

* doc/gnat_rm/obsolescent_features.rst: update PolyOrb reference
* gnat_rm.texi: Regenerate.
* gnat_ugn.texi: Regenerate.

4 weeks agoada: Improve diagnostic when an incorrect left bracket is found
Denis Mazzucato [Wed, 29 Oct 2025 16:43:29 +0000 (17:43 +0100)] 
ada: Improve diagnostic when an incorrect left bracket is found

This patch improves the generic error message of a missing binary operator when
an incorrect left bracket is found.

gcc/ada/ChangeLog:

* par-ch4.adb (P_Simple_Expression): Improve diagnostic.

4 weeks agoada: Add rule check for call arguments
Viljar Indus [Wed, 10 Sep 2025 09:47:19 +0000 (12:47 +0300)] 
ada: Add rule check for call arguments

Implement SPARK RM 6.9(18).

If an assignment to a part of a ghost variable occurs in a ghost entity,
then the variable should be assertion-level-dependent on this entity.
[This includes both assignment statements and passing a ghost variable as an
out or in out mode actual parameter.]

gcc/ada/ChangeLog:

* ghost.adb (Check_Procedure_Call_Levels): New function for
implementing the check.
* ghost.ads (Check_Procedure_Call_Levels): Likewise.
* sem_ch6.adb (Analyze_Procedure_Call): Check the levels after
the call has been resolved and the previous ghost region has
been restored.

4 weeks agoada: Reserve Is_Constructor for Ada constructors
Denis Mazzucato [Thu, 30 Oct 2025 11:56:58 +0000 (12:56 +0100)] 
ada: Reserve Is_Constructor for Ada constructors

This patch renames old Is_Constructor to a new Is_CPP_Constructor and reserves
Is_Constructor for Ada constructors.

gcc/ada/ChangeLog:

* sem_util.adb (Is_Constructor_Procedure): Replace by Is_Constructor.
* sem_util.ads: Likewise.
* sem_ch6.adb (Analyze_Direct_Attribute_Definition): Set Is_Constructor.
* einfo.ads: Use Is_Constructor for Ada constructors, and
Is_CPP_Constructor for CPP constructors.
* exp_ch6.adb: Likewise.
* exp_disp.adb: Likewise.
* freeze.adb: Likewise.
* gen_il-fields.ads: Likewise.
* gen_il-gen-gen_entities.adb: Likewise.
* gen_il-internals.adb: Likewise.
* par-ch6.adb: Likewise.
* sem_prag.adb: Likewise.
* treepr.adb: Likewise.

4 weeks agoada: Avoid duplicate streaming and Put_Image subprograms (part2).
Steve Baird [Tue, 4 Nov 2025 23:01:14 +0000 (15:01 -0800)] 
ada: Avoid duplicate streaming and Put_Image subprograms (part2).

Follow up fixes for earlier changes made for this issue.

gcc/ada/ChangeLog:

* exp_attr.adb (Expand_N_Attribute_Reference): Ensure that
Build_Record_Or_Elementary_Input_Function and
Build_Record_Or_Elementary_Output_Procedure are only called
from within an instance of Build_And_Insert_Type_Attr_Subp.
In particular, the results returned by those 2 functions should
not be passed directly to Insert_Action. This is needed to
ensure that the newly-built subprogram is inserted at the correct
point in the tree.

4 weeks agoada: Improve warning on abstract equality
Bob Duff [Wed, 5 Nov 2025 14:14:35 +0000 (09:14 -0500)] 
ada: Improve warning on abstract equality

In many cases, we warn if an abstract equality function
is called implicitly. In the case of record equality,
this patch adds a mention of the particular component_declaration
for which an abstract "=" is invoked; otherwise it is hard to
understand the warning for record types with many components.

gcc/ada/ChangeLog:

* exp_ch4.adb (Warn_On_Abstract_Equality_For_Component):
Add additional information in the record-component case.

4 weeks agoada: Update implementation for ghost entities inside ignored regions
Viljar Indus [Mon, 3 Nov 2025 11:10:32 +0000 (13:10 +0200)] 
ada: Update implementation for ghost entities inside ignored regions

gcc/ada/ChangeLog:

* ghost.adb (Check_Valid_Ghost_Policy): Remove function.
(Ghost_Policy_In_Effect): Force the ghost policy to be always be
ignore inside ignored regions.
(Mark_And_Set_Ghost_Declaration): Likewise.

4 weeks agoada: Don't generate function that violates No_Dynamic_Sized_Objects restriction
Steve Baird [Thu, 30 Oct 2025 21:40:06 +0000 (14:40 -0700)] 
ada: Don't generate function that violates No_Dynamic_Sized_Objects restriction

In some cases, the compiler implicitly generates a hash function for an
enumeration type. If a No_Dynamic_Sized_Objects restriction is in effect then
that hash function violates the restriction, resulting in a compilation
failure. Therefore, do not generate the hash function in that case.

gcc/ada/ChangeLog:

* exp_imgv.adb (Build_Enumeration_Image_Tables): If a
No_Dynamic_Sized_Objects restriction is in effect, then choose a large
value for Threshold so that no Lit_Hash function is generated.

4 weeks agoada: Fix mistake in recent patch
Ronan Desplanques [Tue, 4 Nov 2025 16:23:13 +0000 (17:23 +0100)] 
ada: Fix mistake in recent patch

A recent patch removed the wrong record definition in
s-taspri__mingw.ads, this patch fixes that mistake.

gcc/ada/ChangeLog:

* libgnarl/s-taspri__mingw.ads (Suspension_Object): Remove.
(Private_Data): Revert unintentional removal.

4 weeks agoada: Add ATC to suspension objects
Ronan Desplanques [Fri, 31 Oct 2025 15:23:44 +0000 (16:23 +0100)] 
ada: Add ATC to suspension objects

This patch makes suspension objects receptive to asynchronous transfers
of control, i.e. aborts. It also replaces the multiple platform-dependent
implementations of suspension objects with a single implementation
relying on the existing abstractions RTS_Lock, Sleep and Wakeup.

gcc/ada/ChangeLog:

* libgnarl/a-sytaco.ads (Suspension_Object): Change components.
* libgnarl/a-sytaco.adb (Initialize, Finalize, Current_State,
Set_False, Set_True, Suspend_Until_True): New cross-platform version.
* libgnarl/s-taskin.ads (Task_States): New task state.
* libgnarl/s-tasini.adb (Locked_Abort_To_Level): Adapt to new state.
* libgnarl/s-taprop.ads (Is_Task_Context): New function Spec.
(Initialize, Finalize, Current_State, Set_False, Set_True,
Suspend_Until_True): Remove.
* libgnarl/s-taprop__dummy.adb (Is_Task_Context): New body.
(Initialize, Finalize, Current_State, Set_False, Set_True,
Suspend_Until_True): Remove.
* libgnarl/s-taprop__linux.adb (Is_Task_Context): New body.
(Initialize, Finalize, Current_State, Set_False, Set_True,
Suspend_Until_True): Remove.
* libgnarl/s-taprop__mingw.adb (Is_Task_Context): New body.
(Initialize, Finalize, Current_State, Set_False, Set_True,
Suspend_Until_True): Remove.
* libgnarl/s-taprop__posix.adb (Is_Task_Context): New body.
(Initialize, Finalize, Current_State, Set_False, Set_True,
Suspend_Until_True): Remove.
* libgnarl/s-taprop__qnx.adb (Is_Task_Context): New body.
(Initialize, Finalize, Current_State, Set_False, Set_True,
Suspend_Until_True): Remove.
* libgnarl/s-taprop__rtems.adb (Is_Task_Context): New body.
(Initialize, Finalize, Current_State, Set_False, Set_True,
Suspend_Until_True): Remove.
* libgnarl/s-taprop__solaris.adb (Is_Task_Context): New body.
(Initialize, Finalize, Current_State, Set_False, Set_True,
Suspend_Until_True): Remove.
* libgnarl/s-taprop__vxworks.adb (Is_Task_Context): Remove spec.
(Initialize, Finalize, Current_State, Set_False, Set_True,
Suspend_Until_True): Remove.
* libgnarl/s-taspri__dummy.ads (Suspension_Object): Remove.
* libgnarl/s-taspri__lynxos.ads (Suspension_Object): Remove.
* libgnarl/s-taspri__mingw.ads (Suspension_Object): Remove.
* libgnarl/s-taspri__posix-noaltstack.ads (Suspension_Object):
Remove.
* libgnarl/s-taspri__posix.ads (Suspension_Object): Remove.
* libgnarl/s-taspri__solaris.ads (Suspension_Object): Remove.
* libgnarl/s-taspri__vxworks.ads (Suspension_Object): Remove.

4 weeks agoada: Use Finalizable for suspension objects
Ronan Desplanques [Mon, 3 Nov 2025 11:44:49 +0000 (12:44 +0100)] 
ada: Use Finalizable for suspension objects

The only reason Suspension_Object was a tagged type before this patch was
to have finalization. This patch makes it use the Finalizable aspect,
which is more lightweight.

gcc/ada/ChangeLog:

* libgnarl/a-sytaco.ads (Suspension_Object): Use Finalizable aspect.

4 weeks agotree-optimization/122736 - OMP SIMD call mask recording
Richard Biener [Tue, 18 Nov 2025 10:30:26 +0000 (11:30 +0100)] 
tree-optimization/122736 - OMP SIMD call mask recording

When recording the mask for loop masking of OMP SIMD calls we
currently fail to provide the correct vector type and number of
copies in all cases.  The following tries to correct this.

PR tree-optimization/122736
* tree-vect-stmts.cc (vectorizable_simd_clone_call): Compute
num_mask_args for all mask modes.  Pass the mask vector
type to vect_record_loop_mask and adjust ncopies according
to the number of mask arguments.

* gcc.target/i386/vect-pr122736.c: New testcase.

4 weeks ago[RISC-V] Add cpu and tuning structures for spacemit-x60 design
Austin Law [Tue, 18 Nov 2025 13:51:12 +0000 (06:51 -0700)] 
[RISC-V] Add cpu and tuning structures for spacemit-x60 design

Per the discussion a couple weeks ago in the patchwork call, I'm submitting the
spacemit-x60 basic core and tuning info on Austin's behalf.

I know everyone would like to have performance data, but with 8%+ run to run
variation with the same binary and ~10hr cycle times for spec2017 (integer ref
only), getting data with any degree of confidence is exceedingly hard when the
improvements are expected to be in the low single digits.  It just takes so
many runs to get a reasonable confidence interval.

This also does not include the vector pipeline model.  I think we know how we
want to model it, but it's not really started yet.  Per our discussion this
(and further twiddles to the tuning/pipeline model) can be made during
stage3/stage4 given the low risk of breaking anything.

We're also likely going to want to make adjustments to the vector cost
structure.  Right now it's using the generic cost structure.  Overall it looks
like the spacemit-x60 has better than expected segment support, but worse than
expected stride support.  So the trick of using strides to avoid the permute in
SATD likely isn't viable (setting aside the unaligned vector element issues).

Anyway, the goal is to get the basics in place so that the -mcpu/-mtune options
work and we can iterate on finer details.

I'll wait for pre-commit CI to do its thing.  There's no rush to commit, just
to get it submitted.  I have no plans to work in Pago Pago tonight to
get anything else submitted before the stage1 close deadline.

* config/riscv/riscv-cores.def: Add RISCV_TUNE and RISCV_CORE entries
for the spacemit-x60 design.
* config/riscv/riscv-opts.h (riscv_microarchitecture_type): Add entry
for spacemit-x60 design.
* config/riscv/riscv.cc (spacemit_x60_tune_info): New tune structure
for the spacemit-x60 design.
* config/riscv/riscv.md (tune): Add spacemit_x60.
Include spacemit-x60.md.
* config/riscv/spacemit-x60.md: New file
* doc/riscv-mtune.texi: Regenerate.
* doc/riscv-mcpu.texi: Regenerate.

4 weeks agotree-optimization/122723 - masking of .COND_ADD reductions
Richard Biener [Tue, 18 Nov 2025 08:59:54 +0000 (09:59 +0100)] 
tree-optimization/122723 - masking of .COND_ADD reductions

The following fixes loop masking of .COND_ADD reductions when
we decide to reduce multiple lanes to one, thus go through
vect_transform_reduction.  The first issue is in
vect_reduction_update_partial_vector_usage which does not handle
incoming .COND_ADD well and fails to compute 'cond_fn' in this
case, disabling masking.  The second issue is that
vect_transform_reduction does not implement the masked but
not mask-by-cond case for any .COND_* operation.  The following
should fix both.

The testcases verify runtime in vect.exp and vectorization support
in the i386 target section for the combinations of -O3, -Ofast
plus masked vs. non-masked epilogues.

PR tree-optimization/122723
* tree-vect-loop.cc (vect_reduction_update_partial_vector_usage):
Handle incoming .COND_* operation.
(vect_transform_reduction): Likewise.  Handle .COND_*
operation when not using COND_EXPR masking in a masked loop.

* gcc.dg/vect/vect-reduc-cond-add-1.c: New generic functional
testcase.
* gcc.target/i386/vect-epilogues-6.c: New testcase.
* gcc.target/i386/vect-epilogues-7.c: Likewise.
* gcc.target/i386/vect-epilogues-8.c: Likewise.
* gcc.target/i386/vect-epilogues-9.c: Likewise.

4 weeks agotree-optimization/122723 - fix multi-step mask conversion
Richard Biener [Tue, 18 Nov 2025 07:12:33 +0000 (08:12 +0100)] 
tree-optimization/122723 - fix multi-step mask conversion

The following fixes the logic in multi-step mask conversions with
respect to the case where we need to resort to the sbool variant
of the unpack optabs.  We were testing a wrong condition on when
that would apply in the multi-step case.

PR tree-optimization/122723
* tree-vect-stmts.cc (supportable_widening_operation):
Correct optab to query in the multi-step case when it is
supposed to hit the sbool case.

4 weeks agolibstdc++: Fix construction function_ref from nontype<&S::x> and reference_wrapper...
Tomasz Kamiński [Fri, 24 Oct 2025 14:45:59 +0000 (16:45 +0200)] 
libstdc++: Fix construction function_ref from nontype<&S::x> and reference_wrapper [PR121858]

To reduce instantiation count, function_ref(nontype<&S::x>, r) previously
reused the invoker from function_ref(nontype<&S::x>, &r). This assumed r was
always a reference to S or a derived class. However, this constructor is also
valid for lvalues (but not rvalues) of reference_wrapper specializations.

This patch fixes this by limiting above optimization only to situations,
when argument is not specialization of reference_wrapper. This is achieved
bu comparing __inv_unwrap<_Td>::type with _Td. We use __inv_unwrap because
unwrap_reference_t does not handle cv-qualified types.

PR libstdc++/121858

libstdc++-v3/ChangeLog:

* include/bits/funcref_impl.h
(function_ref::function_ref(nontype<__fn>, _Up&&)): Handle.
reference_wrapper.
* testsuite/20_util/function_ref/call.cc: Call and update
test05(). Add new test06() for reference_wrapper.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
Signed-off-by: Tomasz Kamiński <tkaminsk@redhat.com>
4 weeks agoAlso handle vptestnm + and15/and3 to just vptestnm.
liuhongt [Fri, 14 Nov 2025 03:59:08 +0000 (19:59 -0800)] 
Also handle vptestnm + and15/and3 to just vptestnm.

r16-1298-gcdfa5fe03512f7 optimizes vpcmp + and15/and3 to vpcmp when VF
is 2 or 4. vptestnm is a variant of vpcmpeq which accepts
nonimm_or_0_operand. The patch handles that.

gcc/ChangeLog:

PR target/103750
* config/i386/sse.md (*<avx512>_eq<mode>3_and15): New
define_insn.
(*avx512vl_eqv2di_and3): Ditto.
* config/i386/i386.md (*ior<mode>_ccz_1): Fix the typo in the
comments above.

gcc/testsuite/ChangeLog:

* gcc.target/i386/avx512vl-pr103750-2.c: New test.

4 weeks agoDaily bump.
GCC Administrator [Tue, 18 Nov 2025 00:21:51 +0000 (00:21 +0000)] 
Daily bump.

4 weeks agocobol: Correct libgcobol install directory and add components.
James K. Lowden [Mon, 17 Nov 2025 23:17:00 +0000 (18:17 -0500)] 
cobol: Correct libgcobol install directory and add components.

Set libgcobol/Makefile.am to define libdir and libsubdir the way libada does.
Reorganize libgcobol/compat directory to group by emulation, not component.
Move orphan gcc/udf/stored-char-length.cbl to the compat directory.
Introduce new POSIX bindings.

gcc/cobol/ChangeLog:
PR cobol/122702
* Make-lang.in: Move stored-char-length.cbl to libgcobol.

libgcobol/ChangeLog:
PR cobol/122702
* Makefile.am: Set libdir and libsubdir per libada example.
* Makefile.in: Regenerate.
* compat/README.md: Revise per new directory structure.
* compat/gnu/lib/CBL_ALLOC_MEM.cbl: Moved from compat/lib/gnu.
* compat/gnu/lib/CBL_CHECK_FILE_EXIST.cbl: Moved from compat/lib/gnu.
* compat/gnu/lib/CBL_DELETE_FILE.cbl: Moved from compat/lib/gnu.
* compat/gnu/lib/CBL_FREE_MEM.cbl: Moved from compat/lib/gnu.
* compat/gnu/udf/stored-char-length.cbl: New file.
* compat/lib/gnu/CBL_ALLOC_MEM.cbl: Moved to compat/gnu/lib.
* compat/lib/gnu/CBL_CHECK_FILE_EXIST.cbl: Moved to compat/gnu/lib.
* compat/lib/gnu/CBL_DELETE_FILE.cbl: Moved to compat/gnu/lib.
* compat/lib/gnu/CBL_FREE_MEM.cbl: Moved to compat/gnu/lib.
* posix/cpy/psx-open.cpy: New file.
* posix/shim/open.cc: New file.
* posix/shim/stat.h: Add mode & flag bits for open.cc
* posix/udf/posix-lseek.cbl: New file.
* posix/udf/posix-open.cbl: New file.
* posix/udf/posix-read.cbl: New file.
* posix/udf/posix-write.cbl: New file.
* xmlparse.cc: Quell context_t initialization-order warning.

4 weeks agolibstdc++: Fix error reporting for filesystem::rename on Windows [PR122726]
Jonathan Wakely [Mon, 17 Nov 2025 21:01:33 +0000 (21:01 +0000)] 
libstdc++: Fix error reporting for filesystem::rename on Windows [PR122726]

Use the __last_system_error() function and the system_category to
convert the Windows error to a generic one.

libstdc++-v3/ChangeLog:

PR libstdc++/122726
* src/filesystem/ops-common.h [_GLIBCXX_FILESYSTEM_IS_WINDOWS]
(rename): Use __last_system_error to set errno accurately.
* testsuite/27_io/filesystem/operations/rename.cc: Test
error_code matches errc::no_such_file_or_directory.

4 weeks agoFortran: contiguous pointer assignment to select type target [PR122709]
Harald Anlauf [Mon, 17 Nov 2025 20:20:08 +0000 (21:20 +0100)] 
Fortran: contiguous pointer assignment to select type target [PR122709]

PR fortran/122709

gcc/fortran/ChangeLog:

* resolve.cc (resolve_assoc_var): If the associate target is a
contiguous pointer, so is the associate variable.

gcc/testsuite/ChangeLog:

* gfortran.dg/select_contiguous.f90: New test.

4 weeks agoUpdate UNSIGNED documentation.
Thomas Koenig [Sun, 16 Nov 2025 12:34:32 +0000 (13:34 +0100)] 
Update UNSIGNED documentation.

As UNSIGNED will not be in F202Y, this patch removes the
corresponding section and documents -funsigned as a straight
extension.  I have also added a note that this is compatible
with -flang.

gcc/fortran/ChangeLog:

* gfortran.texi: Remove section "Experimental features for future
Fortran revisions". Move documentation of UNSIGNED into Extensions.
Mention flang compatibility.

4 weeks agoSARIF output: fix diagnostics within C++ member fns [PR122626]
David Malcolm [Mon, 17 Nov 2025 19:08:59 +0000 (14:08 -0500)] 
SARIF output: fix diagnostics within C++ member fns [PR122626]

When building hierarchical logical locations, we were stopping traveral
upwards before any TRANSLATION_UNIT_DECL for decls, but not for types,
leading to an assertion failure when producing SARIF output for
diagnostics within C++ member fns.

Fixed thusly.

gcc/testsuite/ChangeLog:
PR analyzer/122626
* g++.dg/analyzer/malloc.C: Add sarif output to verify the fix for
PR analyzer/122626.

gcc/ChangeLog:
PR analyzer/122626
* tree-logical-location.cc
(tree_logical_location_manager::get_parent): Return null when
TYPE_CONTEXT is a TRANSLATION_UNIT_DECL so that we don't fail
the assertion in assert_valid_tree.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
4 weeks agodiagnostics: fix socket includes for MinGW host [PR122666]
Evgeny Karpov [Mon, 17 Nov 2025 19:08:58 +0000 (14:08 -0500)] 
diagnostics: fix socket includes for MinGW host [PR122666]

The commit "diagnostics: add experimental SARIF JSON-RPC notifications
for IDEs [PR115970]"

https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=8a155c170b443e332b3db4922f0f0d588a17604f

introduces a regression when building the toolchain for the
aarch64-w64-mingw32 host, at least. It is most likely the same for
*-*-mingw32 targets.

This patch resolves the issue when using sockets for SARIF JSON-RPC
notifications on MinGW host and adds the required socket library to the
host file for *-*-mingw.

Signed-off-by: Evgeny Karpov <evgeny@kmaps.co>
gcc/ChangeLog:
PR diagnostics/122666
* config/i386/x-mingw32 (LIBS): Add -lws2_32
* diagnostics/sarif-sink.cc: Move sockets includes to before
config.h and support __MINGW32__.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
4 weeks agofnspec: constify methods [PR97894]
Andrew Pinski [Mon, 17 Nov 2025 01:33:00 +0000 (17:33 -0800)] 
fnspec: constify methods [PR97894]

Since these methods don't write to the this, let's mark them as const methods
saying this is not written to.
This warning is from cppcheck and added the other methods as I noticed too.

Bootstrapped and tested on x86_64-linux-gnu.

PR middle-end/97894
gcc/ChangeLog:

* attr-fnspec.h (attr_fnspec): arg_idx, known_p, arg_specified_p,
arg_direct_p,  arg_used_p, arg_readonly_p,
arg_maybe_read_p, arg_maybe_written_p,
arg_max_access_size_given_by_arg_p,
arg_access_size_given_by_type_p,
arg_copied_to_arg_p, arg_noescape_p, returns_arg,
returns_noalias_p, global_memory_read_p,
global_memory_written_p, errno_maybe_written_p, arg_eaf_flags,
and get_str as const methods.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
4 weeks agocfgcleanup: Move cheaper checks earlier
Andrew Pinski [Sun, 16 Nov 2025 06:06:16 +0000 (22:06 -0800)] 
cfgcleanup: Move cheaper checks earlier

This moves 2 checks dealing with abnormal and phis earlier
before going through the walk of the bb stmts. This should provide
a small compile time performance improvement when doing cfgcleanup in a
few (maybe not so many) cases.

gcc/ChangeLog:

* tree-cfgcleanup.cc (maybe_remove_forwarder_block): Move a few
checks earlier.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
4 weeks agocfgcleanup: merge tree_forwarder_block_p and remove_forwarder_block into maybe_remove...
Andrew Pinski [Sun, 16 Nov 2025 05:55:08 +0000 (21:55 -0800)] 
cfgcleanup: merge tree_forwarder_block_p and remove_forwarder_block into maybe_remove_forwarder_block

remove_forwarder_block is never called without calling tree_forwarder_block_p
before hand so this merges the two functions and simplifies the code slightly.
tree_forwarder_block_p was only returning true at the very end (except for one
location in the code checking the loop which is fixed here) so this nature to
merge the two functions even.

move_debug_stmts_from_forwarder and phi_alternatives_equal definitions were moved
to before maybe_remove_forwarder_block.

Bootstrapped and tested on x86_64-linux-gnu.

gcc/ChangeLog:

* tree-cfgcleanup.cc (tree_forwarder_block_p): Merge this and ...
(remove_forwarder_block): This into ...
(maybe_remove_forwarder_block): Here.
(cleanup_tree_cfg_bb): Call only maybe_remove_forwarder_block.
(pass_merge_phi::execute): Likewise.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
4 weeks agomergephi: Add stats
Andrew Pinski [Sat, 15 Nov 2025 22:44:21 +0000 (14:44 -0800)] 
mergephi: Add stats

This just adds a simple stats recording. Main reason is that I want to find
out if we can remove one of the mergephi now.

Bootstrapped and tested on x86_64-linux-gnu.

gcc/ChangeLog:

* tree-cfgcleanup.cc (pass_merge_phi::execute): Add stats for the removed
blocks.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
4 weeks agolibstdc++: Fix std module for gcc4-compatible ABI
Jonathan Wakely [Mon, 17 Nov 2025 14:33:50 +0000 (14:33 +0000)] 
libstdc++: Fix std module for gcc4-compatible ABI

Add preprocessor checks to std.cc.in for features which are not
supported with the old string ABI.

The COW std::string doesn't properly support C++11 allocators, so the
aliases such as std::pmr::string, std::pmr::u8string etc. are not
defined for the old string ABI.

The std::syncbuf type uses std::string and is not defined for the old
string ABI.

libstdc++-v3/ChangeLog:

* src/c++23/std.cc.in [!__cpp_lib_syncbuf]: Disable exports for
<syncstream> contents when not defined.
[!_GLIBCXX_USE_CXX11_ABI]: Disable exports for pmr aliases in
<string> when not defined.

4 weeks ago[PR rtl-optimization/122575] Fix mode on optimized IOR comparison
Jeff Law [Mon, 17 Nov 2025 17:40:46 +0000 (10:40 -0700)] 
[PR rtl-optimization/122575] Fix mode on optimized IOR comparison

As Andrew P recognized, we were using the wrong mode when simplifying certain
equality tests like (eq (ior (ne x 0 (y)).  Sam took Andrew's suggestion and
verified it fixed the problem he was stumbling over.

So even though I haven't recreated the problem, I'm reasonably confident we've
got the right fix.  I've bootstrapped and regression tested on x86.

PR rtl-optimization/122575
gcc/
* simplify-rtx.cc (simplify_context::simplify_relational_operation_1):
Use correct mode for simplified IOR expression inside equality
conditional.

4 weeks agolibstdc++: testsuite/util adjustments for import std
Jason Merrill [Mon, 17 Nov 2025 15:56:40 +0000 (21:26 +0530)] 
libstdc++: testsuite/util adjustments for import std

In my import std testing patch, to work around c++/99000 (include after
import) I move #includes of the util/ headers above the import.  And so I
made some adjustments to those headers to support this: adding some missing
dependencies, making sure that in headers that include both importable and
non-importable headers, at least one importable header comes first to work
with my patch to translate e.g. #include <vector> to import <bits/stdc++.h>.

The testsuite_iterators.h avoids a failure in
20_util/specialized_algorithms/uninitialized_copy/constrained.cc from
including <memory> after this header, with a mysterious "no match for
operator<" between long and difference_type.

libstdc++-v3/ChangeLog:

* testsuite/util/testsuite_allocator.h: Move importable headers up.
* testsuite/util/testsuite_common_types.h: Likewise.
* testsuite/util/testsuite_containers.h: Likewise.
* testsuite/util/testsuite_error.h: Move includes inside
include guard.
* testsuite/util/testsuite_greedy_ops.h: #include <cstddef>.
* testsuite/util/testsuite_iterators.h: #include <utility>.
* testsuite/util/testsuite_new_operators.h: #include <cstdlib>.
* testsuite/util/testsuite_random.h: #include <random>.

4 weeks agosimplify-rtx: Simplify VEC_CONCAT of two CONST_VECTOR
Xi Ruoyao [Sun, 16 Nov 2025 13:52:38 +0000 (21:52 +0800)] 
simplify-rtx: Simplify VEC_CONCAT of two CONST_VECTOR

The code for simplify the VEC_CONCAT of two CONST_VECTOR is already
there, but it's guarded by CONST_SCALAR_INT_P || CONST_FIXED_P ||
CONST_DOUBLE_AS_FLOAT_P.  I don't think this logic makes sense.

Either we should allow CONST_VECTOR here or we should remove the dead
code handling CONST_VECTOR in this if statement.  I cannot see anything
wrong to just allow CONST_VECTOR.

gcc/

* simplify-rtx.cc (simplify_const_binary_operation): Simplify
VEC_CONCAT two constant vectors.

4 weeks agogccrs: Fix segv in errors in type checking an impl item
Philip Herron [Sun, 9 Nov 2025 22:05:58 +0000 (22:05 +0000)] 
gccrs: Fix segv in errors in type checking an impl item

When we typecheck a trait impl block item, at the end we validate it
against the trait definition by doing a final unify but if the type check
fails on the the impl item it returns NULL here. The other issue was that
if we fail to resolve the specified lifetime we return error early, this
changes the typechecking to default to an anon lifetime so we can continue
typechecking.

Fixes Rust-GCC#4188

gcc/rust/ChangeLog:

* typecheck/rust-hir-type-check-implitem.cc (TypeCheckImplItemWithTrait::visit): null guard
* typecheck/rust-hir-type-check.cc (TraitItemReference::get_type_from_fn): default to anon

gcc/testsuite/ChangeLog:

* rust/compile/issue-4188.rs: New test.

Signed-off-by: Philip Herron <herron.philip@googlemail.com>
4 weeks agogccrs: Support generic constant impl items
Philip Herron [Sun, 9 Nov 2025 20:28:50 +0000 (20:28 +0000)] 
gccrs: Support generic constant impl items

Impl items can have constants defined which could in turn be generic this was
not supported by gccrs and missed. So for example:

  impl<T> Foo<T> {
    const MAGIC: usize = mem::size_of::<T>();
  }

This is a normal type parameter but in order to setup the generics we need to
create a synthetic TyTy::FnType so we can bind the parent's impl generics to
the type system and it just works like any other generic item at that point.
Then for example we have:

  impl<const N: usize> Foo<N> {
    const VALUE: usize = N;
  }

Again we consistently bind the this const generic parameter the same way so
the lazy evaluation of the generic can take place.

gcc/rust/ChangeLog:

* backend/rust-compile-item.cc (CompileItem::visit): support the synthetic function consts
* typecheck/rust-hir-type-check-expr.cc (TypeCheckExpr::Resolve): likewise
* typecheck/rust-hir-type-check-implitem.cc (TypeCheckImplItem::visit): create the synth
* typecheck/rust-tyty.h: new flag for synthetic constant

gcc/testsuite/ChangeLog:

* rust/execute/torture/const-generics-5.rs: New test.
* rust/execute/torture/const-generics-6.rs: New test.
* rust/execute/torture/const-generics-7.rs: New test.

Signed-off-by: Philip Herron <herron.philip@googlemail.com>
4 weeks agogccrs: Fix const generics handling on array types
Philip Herron [Sun, 9 Nov 2025 15:49:09 +0000 (15:49 +0000)] 
gccrs: Fix const generics handling on array types

When we were processing generic const param types on arrays the size type
was overriding the const param decl because of a hirid reference mismatch

Fixes Rust-GCC#3879

gcc/rust/ChangeLog:

* typecheck/rust-hir-type-check-type.cc (TypeCheckType::visit): fix mappings

gcc/testsuite/ChangeLog:

* rust/compile/const_generics_18.rs: New test.
* rust/compile/const_generics_19.rs: New test.
* rust/execute/torture/const-generics-3.rs: New test.
* rust/execute/torture/const-generics-4.rs: New test.

Signed-off-by: Philip Herron <herron.philip@googlemail.com>
4 weeks agogccrs: make invalid inner attributes show error
Lucas Ly Ba [Mon, 3 Nov 2025 16:28:56 +0000 (16:28 +0000)] 
gccrs: make invalid inner attributes show error

gcc/rust/ChangeLog:

* ast/rust-ast.cc (Attribute::is_derive):
Change is_derive method with its valid path.
* util/rust-attribute-values.h:
Delete redudant derive attribute.
* util/rust-attributes.cc (AttributeChecker::check_inner_attribute):
Helper method for check_inner_attributes
(AttributeChecker::check_inner_attributes):
Implement method for errors check.
* util/rust-attributes.h:
Add methods above in header.

gcc/testsuite/ChangeLog:

* rust/compile/issue-4212.rs:
* rust/compile/issue-4219.rs: New test.

Signed-off-by: Lucas Ly Ba <lucas.ly-ba@outlook.com>
4 weeks agogccrs: fix ICE on missing pattern in while loop
Lucas Ly Ba [Mon, 13 Oct 2025 11:01:54 +0000 (11:01 +0000)] 
gccrs: fix ICE on missing pattern in while loop

Adds a proper check for missing patterns in while expressions.

Fixes Rust-GCC#4162

gcc/rust/ChangeLog:

* parse/rust-parse-impl.h(Parser<ManagedTokenSource>::parse_while_let_loop_expr):
Add check for missing pattern.

gcc/testsuite/ChangeLog:
* rust/compile/issue-4162.rs: New test.

Signed-off-by: Lucas Ly Ba <lucas.ly-ba@outlook.com>
4 weeks agogccrs: fix cfg attribute error with literal predicate
Lucas Ly Ba [Thu, 6 Nov 2025 16:26:12 +0000 (16:26 +0000)] 
gccrs: fix cfg attribute error with literal predicate

gcc/rust/ChangeLog:

* ast/rust-ast.cc (MetaItemLitExpr::check_cfg_predicate): Make error.

gcc/testsuite/ChangeLog:

* rust/compile/issue-4222.rs: New test.

Signed-off-by: Lucas Ly Ba <lucas.ly-ba@outlook.com>
4 weeks agogccrs: fix segfault with empty cfg attribute
Lucas Ly Ba [Thu, 6 Nov 2025 14:57:45 +0000 (14:57 +0000)] 
gccrs: fix segfault with empty cfg attribute

gcc/rust/ChangeLog:

* ast/rust-ast.cc (Attribute::check_cfg_predicate): add cfg path in condition

gcc/testsuite/ChangeLog:

* rust/compile/issue-4261.rs: New test.

Signed-off-by: Lucas Ly Ba <lucas.ly-ba@outlook.com>
4 weeks agogccrs: fix error multiple cfg predicates
Lucas Ly Ba [Thu, 6 Nov 2025 16:53:00 +0000 (16:53 +0000)] 
gccrs: fix error multiple cfg predicates

gcc/rust/ChangeLog:

* ast/rust-ast.cc (Attribute::check_cfg_predicate):
Make error.

gcc/testsuite/ChangeLog:

* rust/compile/issue-4267.rs: New test.

Signed-off-by: Lucas Ly Ba <lucas.ly-ba@outlook.com>
4 weeks agogccrs: Add support for binding const generic values to paths
Philip Herron [Mon, 3 Nov 2025 16:48:56 +0000 (16:48 +0000)] 
gccrs: Add support for binding const generic values to paths

Const generics bind values which can be accessed like a normal path but the difference
is that they can be true expression values not just type paths. This patch adds support
to resolving a method inference which passes a generic value into the method and fixes
some missed bugs along the way. The tricky part was that there is a case where in the
return position of a method returning a const param type vs the type of the method
there is a special case in the unify rules so that we unify the specified type of the
const param type not the const param itself.

gcc/rust/ChangeLog:

* backend/rust-compile-resolve-path.cc: handle const param values
* typecheck/rust-hir-type-check-item.cc: generate const infer vars when required
* typecheck/rust-type-util.cc (unify_site_and): handle a null param cleanup
* typecheck/rust-tyty-util.cc (TyVar::get_implicit_const_infer_var): helper interface
* typecheck/rust-tyty-util.h: update header prototypes
* typecheck/rust-tyty.cc (BaseType::is_concrete): correctly handle const types
(ConstParamType::get_name): emit the specified type
(ConstParamType::is_equal): fix recursion loop
* typecheck/rust-unify.cc (UnifyRules::go): const infer vars need cleanup too
* typecheck/rust-unify.h: support base generics

gcc/testsuite/ChangeLog:

* rust/execute/torture/const-generics-2.rs: New test.

Signed-off-by: Philip Herron <herron.philip@googlemail.com>
4 weeks agogccrs: Implement E0579 error checking in RangePattern compilation
Yap Zhi Heng [Mon, 20 Oct 2025 06:01:40 +0000 (14:01 +0800)] 
gccrs: Implement E0579 error checking in RangePattern compilation

Checks whether upper bound of range is not lower or equal to the lower bound.

gcc/rust/ChangeLog:

* backend/rust-compile-pattern.cc(compilePatternCheckExpr::visit(RangePattern)):
Add E0579 check to ensure that lower bound is always below upper bound.

Signed-off-by: Yap Zhi Heng <yapzhhg@gmail.com>
4 weeks agogccrs: Fix `RangePattern` negative literal bounds being treated as positive
Yap Zhi Heng [Sun, 26 Oct 2025 03:13:25 +0000 (11:13 +0800)] 
gccrs: Fix `RangePattern` negative literal bounds being treated as positive

GIMPLE output for compile/issue-4242.rs:

...

  x = 1;
  RUSTTMP.2 = x;
  _1 = RUSTTMP.2 >= -55;
  _2 = RUSTTMP.2 < 0;
  _3 = _1 & _2;
  if (_3 != 0) goto <D.112>; else goto <D.113>;
  <D.112>:
  {
    RUSTTMP.1 = 2;
    goto <D.105>;
  }
  <D.113>:
  _4 = RUSTTMP.2 >= -99;
  _5 = RUSTTMP.2 < -55;
  _6 = _4 & _5;
  if (_6 != 0) goto <D.114>; else goto <D.115>;
  <D.114>:
  {
    RUSTTMP.1 = 3;
    goto <D.105>;
  }
...

gcc/rust/ChangeLog:

* backend/rust-compile-pattern.cc (compile_range_pattern_bound): Set litexpr
to negative if has_minus is present in the RangePatternBoundLiteral param.

Signed-off-by: Yap Zhi Heng <yapzhhg@gmail.com>
4 weeks agogccrs: Fix ICE with non-trailing const defaults
vishruth-thimmaiah [Wed, 29 Oct 2025 17:20:49 +0000 (22:50 +0530)] 
gccrs: Fix ICE with non-trailing const defaults

When a const generic with a default value is not trailing, emit an
error.

gcc/rust/ChangeLog:

* parse/rust-parse-impl.h (Parser::parse_generic_params): Emit
an error when const generics with a default value is not
trailing.

gcc/testsuite/ChangeLog:

* rust/compile/const_generics_17.rs: New test.
* rust/compile/generics14.rs: New test.

Signed-off-by: vishruth-thimmaiah <vishruththimmaiah@gmail.com>
4 weeks agogccrs: Add minus sign compilation for LiteralPattern
Yap Zhi Heng [Sun, 26 Oct 2025 02:49:28 +0000 (10:49 +0800)] 
gccrs: Add minus sign compilation for LiteralPattern

GIMPLE output for literalpattern_neg.rs test case:

...
  x = -55;
  RUSTTMP.2 = x;
  if (RUSTTMP.2 == 55) goto <D.113>; else goto <D.114>;
  <D.113>:
  {
    RUSTTMP.1 = 1;
    goto <D.107>;
  }
  <D.114>:
  if (RUSTTMP.2 == -55) goto <D.115>; else goto <D.116>;
  <D.115>:
  {
    RUSTTMP.1 = 0;
    goto <D.107>;
  }
  <D.116>:
  if (1 != 0) goto <D.117>; else goto <D.118>;
  <D.117>:
  {
    RUSTTMP.1 = 1;
    goto <D.107>;
  }
...

gcc/rust/ChangeLog:

* parse/rust-parse-impl.h (parse_literal_or_range_pattern): Parse minus sign
properly for LiteralPattern.
* ast/rust-pattern.h (LiteralPattern): Add has_minus boolean for LiteralPattern.
* hir/tree/rust-hir-pattern.h (LiteralPattern): Ditto.
* ast/rust-pattern.cc (LiteralPattern::as_string): Update to include minus sign
if present.
* hir/tree/rust-hir.cc (LiteralPattern::as_string): Ditto.
* hir/rust-ast-lower-pattern.cc (visit(LiteralPattern)): Pass has_minus boolean
from AST to HIR.
* backend/rust-compile-pattern.cc (CompilePatternCheckExpr::visit(LiteralPattern)):
Compile litexpr as negative if minus sign is present.

Signed-off-by: Yap Zhi Heng <yapzhhg@gmail.com>
4 weeks agogccrs: fix segfault on exported macro
Lucas Ly Ba [Wed, 15 Oct 2025 13:23:05 +0000 (13:23 +0000)] 
gccrs: fix segfault on exported macro

An imbricated exported macro leads to a segfault.

gcc/rust/ChangeLog:

* metadata/rust-export-metadata.cc (ExportContext::emit_macro):
Change method argument NodeId to AST::MacroRulesDefinition.
* metadata/rust-export-metadata.h:
Likewise.
* util/rust-hir-map.cc (Mappings::insert_exported_macro):
Insert AST::MacroRulesDefinition instead of NodeId.
* util/rust-hir-map.h:
Change methods declarations of exported macros.

gcc/testsuite/ChangeLog:

* rust/compile/issue-3617.rs: New test.

Signed-off-by: Lucas Ly Ba <lucas.ly-ba@outlook.fr>
4 weeks agoc++: Add testcase for CWG3079
Jakub Jelinek [Mon, 17 Nov 2025 14:27:04 +0000 (15:27 +0100)] 
c++: Add testcase for CWG3079

We already implement anonymous unions that way, the following patch
just adds a testcase for it.

2025-11-17  Jakub Jelinek  <jakub@redhat.com>

* g++.dg/DRs/dr3079.C: New test.

4 weeks agoc++: Add testcase for CWG3061
Jakub Jelinek [Mon, 17 Nov 2025 14:26:22 +0000 (15:26 +0100)] 
c++: Add testcase for CWG3061

We already implement expansion statements that way, the following patch
just adds a testcase for it.

2025-11-17  Jakub Jelinek  <jakub@redhat.com>

* g++.dg/DRs/dr3061.C: New test.

4 weeks agoc++: Add testcase for CWG3045
Jakub Jelinek [Mon, 17 Nov 2025 14:25:39 +0000 (15:25 +0100)] 
c++: Add testcase for CWG3045

We already implement expansion statements that way, the following patch
just adds a testcase for it.

2025-11-17  Jakub Jelinek  <jakub@redhat.com>

* g++.dg/DRs/dr3045.C: New test.

4 weeks agoImprove LIM dump and some testcases
Richard Biener [Mon, 17 Nov 2025 10:29:46 +0000 (11:29 +0100)] 
Improve LIM dump and some testcases

The following avoids the newline between 'Moving statement' and the
actual stmt in dumps to make specific scanning easier.

* tree-ssa-loop-im.cc (move_computations_worker): Avoid newline
between 'Moving statement' and actual statement dump in dumpfile.

* gcc.dg/vect/slp-9.c: Use noipa function attribute, drop
-fno-early-inlining option.
* c-c++-common/restrict-2.c: Explicitly look for hoisted loads.
* gfortran.dg/pr104466.f90: Adjust.

4 weeks agoAvoid scanning all stmts outside of loops in LIM
Richard Biener [Mon, 17 Nov 2025 08:56:13 +0000 (09:56 +0100)] 
Avoid scanning all stmts outside of loops in LIM

The following avoids scanning stmts outside of loops for possibly
not returning calls.

* tree-ssa-loop-im.cc (fill_always_executed_in): Skip
blocks not in loops when looking for possibly not returning
calls.

4 weeks agocfgloop: Modify loop_exits_{to,from}_bb_p return type to edge
Victor Do Nascimento [Thu, 13 Nov 2025 13:54:05 +0000 (13:54 +0000)] 
cfgloop: Modify loop_exits_{to,from}_bb_p return type to edge

Given that when finding whether the predicate in question is satisfied
or not we already do the heavy-lifting of identifying the specific
edge that matches the particular criterion, it is wasteful to throw
the edge information away, only to potentially have to recalculate it
when true is returned.

Rather, given the ability of treating a valid pointer as true and,
conversely, the NULL pointer as false, we can return the edge for
should we wish to use it, while keeping the function's existing calls
in the code as is.

gcc/ChangeLog:

* cfgloop.cc (loop_exits_to_bb_p): Change return type.
(loop_exits_from_bb_p): Likewise.
* cfgloop.h: (loop_exits_to_bb_p): Likewise.
(loop_exits_from_bb_p): Likewise.

4 weeks agodocs: aarch64: arm: Update ACLE documentation.
Alfie Richards [Tue, 14 Oct 2025 15:04:25 +0000 (15:04 +0000)] 
docs: aarch64: arm: Update ACLE documentation.

Updates the Arm C Language Extension url and description to be up to date.

gcc/ChangeLog:

* doc/extend.texi: (ARM C Language Extensions (ACLE)) Update ACLE URL
and description.

4 weeks agoforwprop: restrict vector load decomposition in optimize_vector_load ()
Artemiy Volkov [Wed, 12 Nov 2025 20:18:44 +0000 (20:18 +0000)] 
forwprop: restrict vector load decomposition in optimize_vector_load ()

Since r15-778-g1d1ef1c22752b3, we are compiling the following snippet:

void foo (int16_t *dst, const uint8_t *src0, const uint8_t *src1)
{
  uint8x16_t s0 = vld1q_u8 (src0);
  uint8x16_t s1 = vld1q_u8 (src1);

  uint16x8_t d0_lo = vsubl_u8 (vget_low_u8 (s0), vget_low_u8 (s1));
  uint16x8_t d0_hi = vsubl_u8 (vget_high_u8 (s0), vget_high_u8 (s1));

  vst1q_s16 (dst, vreinterpretq_s16_u16 (d0_lo));
  vst1q_s16 (dst + 8, vreinterpretq_s16_u16 (d0_hi));
}

into:

        ldp     d0, d29, [x1]
        ldp     d30, d31, [x2]
        usubl   v30.8h, v0.8b, v30.8b
        usubl   v31.8h, v29.8b, v31.8b
        stp     q30, q31, [x0]
ret

rather than:

        ldr     q31, [x1]
        ldr     q30, [x2]
        usubl   v29.8h, v31.8b, v30.8b
        usubl2  v30.8h, v31.16b, v30.16b
        stp     q29, q30, [x0]
ret

That is, rather than keeping two 128-bit loads and using the usubl2
instruction designed to operate on upper halves of 128-bit vector
registers, we are doing four 64-bit scalar loads and operate on 64-bit
values, which leads to increased register pressure.

What happens here is the aforementioned commit lowers the vget_half_* ()
intrinsics to BIT_FIELD_REFs, at which point the logic in
tree-ssa-forwprop.cc::optimize_vector_load () kicks in, breaking down
vector loads into scalar loads as long as all uses are through
BIT_FIELD_REFs.  AFAICT, this function (or before it existed, the code
comprising it) handles the following scenarios:

(1) Introduced in r10-135-ga7eb97ad269b65 in response to PR88983, this
code broke down vector loads into smaller loads whenever the target
doesn't natively support wider loads, fixing code quality issues.  This
should always be a win since the original loads weren't even available in
the first place.

(2) Since r12-2728-g2724d1bba6b364, it is now also handling loads that
feed into VEC_UNPACK expressions to prefer extending scalar loads to
vector loads + vector unpack, which is beneficial at least on some
microarchitectures.

This patch restricts the optimization to those scenarios explicitly, while
adding another one on top:

(3) If any of the BIT_FIELD_REFs have scalar type, prefer scalar loads to
vector loads to reduce possible traffic between scalar and vector register
files.  IOW, only if all BIT_FIELD_REFs are used as subvectors, assume
there might be other instructions operating on those subvectors that do
not leave the vector register file, and do not perform the transformation.

To summarize, after this patch, if either (1), (2), or (3) holds, narrow
loads are preferred, otherwise vector loads are left intact.

Bootstrapped and regtested on aarch64 and x86_64, no regressions on
SPEC2017, the code snippet above added as an aarch64-specific test.

gcc/ChangeLog:

* tree-ssa-forwprop.cc (optimize_vector_load): Inhibit
optimization when all uses are through subvectors without
extension.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/simd/usubl2.c: New test.

4 weeks agoGCC, meet C++20
Jakub Jelinek [Mon, 17 Nov 2025 08:44:05 +0000 (09:44 +0100)] 
GCC, meet C++20

I've tried to test a patch to switch -std=gnu++17 C++ default
to -std=gnu++20 (will post momentarily), but ran into various problems
during GCC bootstraps, our codebase isn't fully C++20 ready.

The most common problems are arithmetic or bitwise operations
between enumerators of different enum types (or between enumerator
and floating point in the testsuite), ambiguous overloaded
operator == because of forgotten const qualification of const inside
of the argument and then libcody being largely stuck in C++ and incompatible
with C++20 which introduced char8_t type and uses it for u8 literals.

The following patch fixes various issues I've run into, for libcody
this patch just makes sure code including cody.hh can be compiled
with -std=gnu++20, libcody itself I have a tweak in the other patch.

Nothing in this patch will make the code invalid for C++14.

2025-11-17  Jakub Jelinek  <jakub@redhat.com>

gcc/
* tree-core.h (enum built_in_function): Avoid arithmetics or
bitwise operations between enumerators from different enums.
* lto-streamer.h (lto_tag_is_gimple_code_p): Likewise.
* gimple.h (gimple_omp_atomic_set_memory_order): Likewise.
* common/config/i386/i386-cpuinfo.h (M_CPU_SUBTYPE_START,
M_CPU_TYPE): Likewise.
* tree-complex.cc (expand_complex_libcall): Likewise.
* ipa-modref-tree.h (modref_access_node::operator ==): Change
argument type from modref_access_node & to
const modref_access_node &.
* ipa-modref-tree.cc (modref_access_node::operator ==): Likewise.
gcc/cobol/
* symbols.cc (symbol_table_init): Avoid arithmetics or
bitwise operations between enumerators from different enums.
gcc/fortran/
* parse.cc (gfc_parse_file): Avoid arithmetics or
bitwise operations between enumerators from different enums.
libcody/
* cody.hh (MessageBuffer::Space): For C++14 or newer use
(char) u8' ' instead of Detail::S2C(u8" ").

4 weeks agoOpenMP/OpenACC tests. vs C++26
Jakub Jelinek [Mon, 17 Nov 2025 08:42:56 +0000 (09:42 +0100)] 
OpenMP/OpenACC tests. vs C++26

OpenMP/OpenACC array sections, generally expr[expr:expr] or
expr[expr:expr:expr] can have any of the exprs between [ and ]
omitted, low-bound (first defaults to 0, last (stride) defaults to
1 and the middle (length) for some arrays defaults to
ceil((size − lower_bound)/stride).
People have been writing this for years without spaces between [ and :
and : and ] when that expr has been omitted, but guess for C++26
one needs to add a space.  I think [ :: ] isn't going to be parsed
as the same as [ : : ] either.

gcc/testsuite/
* c-c++-common/goacc/cache-3-1.c: Add dg-skip-if for c++26.
* g++.dg/goacc/data-clause-2.C: Likewise.
* g++.dg/gomp/allocate-3.C: Likewise.
* c-c++-common/gomp/affinity-2.c: Use { c || c++23_down } effective
target.
* c-c++-common/goacc/cache-3-2.c: Replace [: in OpenMP or OpenACC
pragmas or attributes with [ : and :] with : ].
* c-c++-common/goacc/data-clause-1.c: Likewise.
* c-c++-common/goacc/data-clause-2.c: Likewise.
* c-c++-common/goacc/data-clause-duplicate-1.c: Likewise.
* c-c++-common/goacc/mdc-2.c: Likewise.
* c-c++-common/goacc/readonly-1.c: Likewise.
* c-c++-common/gomp/allocate-4.c: Likewise.
* c-c++-common/gomp/clauses-3.c: Likewise.
* c-c++-common/gomp/declare-mapper-3.c: Likewise.
* c-c++-common/gomp/depend-1.c: Likewise.
* c-c++-common/gomp/depend-2.c: Likewise.
* c-c++-common/gomp/depend-3.c: Likewise.
* c-c++-common/gomp/depend-4.c: Likewise.
* c-c++-common/gomp/depend-5.c: Likewise.
* c-c++-common/gomp/depend-6.c: Likewise.
* c-c++-common/gomp/dispatch-1.c: Likewise.
* c-c++-common/gomp/loop-5.c: Likewise.
* c-c++-common/gomp/map-1.c: Likewise.
* c-c++-common/gomp/map-2.c: Likewise.
* c-c++-common/gomp/map-4.c: Likewise.
* c-c++-common/gomp/map-7.c: Likewise.
* c-c++-common/gomp/pr100902-1.c: Likewise.
* c-c++-common/gomp/pr103642.c: Likewise.
* c-c++-common/gomp/pr120180-1.c: Likewise.
* c-c++-common/gomp/pr61486-1.c: Likewise.
* c-c++-common/gomp/pr81006.c: Likewise.
* c-c++-common/gomp/pr91920.c: Likewise.
* c-c++-common/gomp/pr96867.c: Likewise.
* c-c++-common/gomp/pr99928-16.c: Likewise.
* c-c++-common/gomp/reduction-1.c: Likewise.
* c-c++-common/gomp/scan-1.c: Likewise.
* c-c++-common/gomp/target-data-1.c: Likewise.
* c-c++-common/gomp/target-enter-data-1.c: Likewise.
* c-c++-common/gomp/target-has-device-addr-1.c: Likewise.
* c-c++-common/gomp/target-implicit-map-2.c: Likewise.
* c-c++-common/gomp/target-map-iterators-1.c: Likewise.
* c-c++-common/gomp/target-map-iterators-3.c: Likewise.
* c-c++-common/gomp/target-update-iterators-1.c: Likewise.
* c-c++-common/gomp/target-update-iterators-3.c: Likewise.
* g++.dg/goacc/cache-3-1.C: Likewise.
* g++.dg/goacc/cache-3-2.C: Likewise.
* g++.dg/goacc/data-clause-1.C: Likewise.
* g++.dg/goacc/mdc.C: Likewise.
* g++.dg/gomp/array-section-2.C: Likewise.
* g++.dg/gomp/bad-array-section-10.C: Likewise.
* g++.dg/gomp/bad-array-section-11.C: Likewise.
* g++.dg/gomp/bad-array-section-9.C: Likewise.
* g++.dg/gomp/declare-mapper-1.C: Likewise.
* g++.dg/gomp/declare-mapper-2.C: Likewise.
* g++.dg/gomp/depend-1.C: Likewise.
* g++.dg/gomp/depend-2.C: Likewise.
* g++.dg/gomp/ind-base-3.C: Likewise.
* g++.dg/gomp/map-1.C: Likewise.
* g++.dg/gomp/map-2.C: Likewise.
* g++.dg/gomp/map-ptrmem-1.C: Likewise.
* g++.dg/gomp/map-ptrmem-2.C: Likewise.
* g++.dg/gomp/member-array-2.C: Likewise.
* g++.dg/gomp/target-this-3.C: Likewise.
* g++.dg/gomp/target-this-4.C: Likewise.
libgomp/
* testsuite/libgomp.c++/allocate-1.C: Replace [: in OpenMP or OpenACC
pragmas or attributes with [ : and :] with : ].
* testsuite/libgomp.c++/baseptrs-3.C: Likewise.
* testsuite/libgomp.c++/baseptrs-5.C: Likewise.
* testsuite/libgomp.c++/class-array-1.C: Likewise.
* testsuite/libgomp.c++/examples-4/target_data-5.C: Likewise.
* testsuite/libgomp.c++/lvalue-tofrom-2.C: Likewise.
* testsuite/libgomp.c++/pr101544-1.C: Likewise.
* testsuite/libgomp.c++/pr108286.C: Likewise.
* testsuite/libgomp.c++/reduction-10.C: Likewise.
* testsuite/libgomp.c++/reduction-11.C: Likewise.
* testsuite/libgomp.c++/reduction-12.C: Likewise.
* testsuite/libgomp.c++/reduction-5.C: Likewise.
* testsuite/libgomp.c++/reduction-6.C: Likewise.
* testsuite/libgomp.c++/reduction-7.C: Likewise.
* testsuite/libgomp.c++/reduction-8.C: Likewise.
* testsuite/libgomp.c++/reduction-9.C: Likewise.
* testsuite/libgomp.c++/target-18.C: Likewise.
* testsuite/libgomp.c++/target-19.C: Likewise.
* testsuite/libgomp.c++/target-2.C: Likewise.
* testsuite/libgomp.c++/target-22.C: Likewise.
* testsuite/libgomp.c++/target-23.C: Likewise.
* testsuite/libgomp.c++/target-9.C: Likewise.
* testsuite/libgomp.c++/target-flex-100.C: Likewise.
* testsuite/libgomp.c++/target-flex-101.C: Likewise.
* testsuite/libgomp.c++/target-flex-12.C: Likewise.
* testsuite/libgomp.c++/target-flex-2003.C: Likewise.
* testsuite/libgomp.c++/target-flex-30.C: Likewise.
* testsuite/libgomp.c++/target-flex-300.C: Likewise.
* testsuite/libgomp.c++/target-flex-32.C: Likewise.
* testsuite/libgomp.c++/target-flex-33.C: Likewise.
* testsuite/libgomp.c++/target-flex-41.C: Likewise.
* testsuite/libgomp.c++/target-flex-60.C: Likewise.
* testsuite/libgomp.c++/target-flex-61.C: Likewise.
* testsuite/libgomp.c++/target-flex-62.C: Likewise.
* testsuite/libgomp.c++/target-flex-80.C: Likewise.
* testsuite/libgomp.c++/target-flex-81.C: Likewise.
* testsuite/libgomp.c++/target-has-device-addr-7.C: Likewise.
* testsuite/libgomp.c++/target-in-reduction-1.C: Likewise.
* testsuite/libgomp.c++/target-in-reduction-2.C: Likewise.
* testsuite/libgomp.c++/target-lambda-1.C: Likewise.
* testsuite/libgomp.c++/target-lambda-3.C: Likewise.
* testsuite/libgomp.c++/target-map-class-1.C: Likewise.
* testsuite/libgomp.c++/target-std__array-concurrent.C: Likewise.
* testsuite/libgomp.c++/target-std__bitset-concurrent.C: Likewise.
* testsuite/libgomp.c++/target-std__deque-concurrent.C: Likewise.
* testsuite/libgomp.c++/target-std__flat_map-concurrent.C: Likewise.
* testsuite/libgomp.c++/target-std__flat_multimap-concurrent.C:
Likewise.
* testsuite/libgomp.c++/target-std__flat_multiset-concurrent.C:
Likewise.
* testsuite/libgomp.c++/target-std__flat_set-concurrent.C: Likewise.
* testsuite/libgomp.c++/target-std__forward_list-concurrent.C:
Likewise.
* testsuite/libgomp.c++/target-std__list-concurrent.C: Likewise.
* testsuite/libgomp.c++/target-std__map-concurrent.C: Likewise.
* testsuite/libgomp.c++/target-std__multimap-concurrent.C: Likewise.
* testsuite/libgomp.c++/target-std__multiset-concurrent.C: Likewise.
* testsuite/libgomp.c++/target-std__set-concurrent.C: Likewise.
* testsuite/libgomp.c++/target-std__span-concurrent.C: Likewise.
* testsuite/libgomp.c++/target-std__unordered_map-concurrent.C:
Likewise.
* testsuite/libgomp.c++/target-std__unordered_multimap-concurrent.C:
Likewise.
* testsuite/libgomp.c++/target-std__unordered_multiset-concurrent.C:
Likewise.
* testsuite/libgomp.c++/target-std__unordered_set-concurrent.C:
Likewise.
* testsuite/libgomp.c++/target-std__valarray-1.C: Likewise.
* testsuite/libgomp.c++/target-std__valarray-concurrent.C: Likewise.
* testsuite/libgomp.c++/target-std__vector-concurrent.C: Likewise.
* testsuite/libgomp.c++/target-this-3.C: Likewise.
* testsuite/libgomp.c++/target-this-4.C: Likewise.
* testsuite/libgomp.c++/target-virtual-1.C: Likewise.
* testsuite/libgomp.c++/task-reduction-11.C: Likewise.
* testsuite/libgomp.c++/task-reduction-12.C: Likewise.
* testsuite/libgomp.c++/task-reduction-13.C: Likewise.
* testsuite/libgomp.c++/task-reduction-17.C: Likewise.
* testsuite/libgomp.c++/task-reduction-18.C: Likewise.
* testsuite/libgomp.c++/task-reduction-19.C: Likewise.
* testsuite/libgomp.c++/task-reduction-4.C: Likewise.
* testsuite/libgomp.c++/task-reduction-5.C: Likewise.
* testsuite/libgomp.c++/task-reduction-6.C: Likewise.
* testsuite/libgomp.c++/task-reduction-7.C: Likewise.
* testsuite/libgomp.c++/taskloop-reduction-2.C: Likewise.
* testsuite/libgomp.c++/taskloop-reduction-3.C: Likewise.
* testsuite/libgomp.c++/taskloop-reduction-4.C: Likewise.
* testsuite/libgomp.c-c++-common/allocate-1.c: Likewise.
* testsuite/libgomp.c-c++-common/allocate-3.c: Likewise.
* testsuite/libgomp.c-c++-common/baseptrs-2.c: Likewise.
* testsuite/libgomp.c-c++-common/dispatch-1.c: Likewise.
* testsuite/libgomp.c-c++-common/dispatch-2.c: Likewise.
* testsuite/libgomp.c-c++-common/interop-2.c: Likewise.
* testsuite/libgomp.c-c++-common/matrix-omp-target-teams-distribute-parallel-for-1.c:
Likewise.
* testsuite/libgomp.c-c++-common/ptr-attach-1.c: Likewise.
* testsuite/libgomp.c-c++-common/ptr-attach-2.c: Likewise.
* testsuite/libgomp.c-c++-common/refcount-1.c: Likewise.
* testsuite/libgomp.c-c++-common/struct-elem-4.c: Likewise.
* testsuite/libgomp.c-c++-common/target-2.c: Likewise.
* testsuite/libgomp.c-c++-common/target-has-device-addr-1.c: Likewise.
* testsuite/libgomp.c-c++-common/target-implicit-map-2.c: Likewise.
* testsuite/libgomp.c-c++-common/target-implicit-map-5.c: Likewise.
* testsuite/libgomp.c-c++-common/target-in-reduction-1.c: Likewise.
* testsuite/libgomp.c-c++-common/target-in-reduction-2.c: Likewise.
* testsuite/libgomp.c-c++-common/target-map-iterators-1.c: Likewise.
* testsuite/libgomp.c-c++-common/target-map-iterators-2.c: Likewise.
* testsuite/libgomp.c-c++-common/target-map-iterators-3.c: Likewise.
* testsuite/libgomp.c-c++-common/target-map-zlas-1.c: Likewise.
* testsuite/libgomp.c-c++-common/target-update-iterators-1.c: Likewise.
* testsuite/libgomp.c-c++-common/target-update-iterators-2.c: Likewise.
* testsuite/libgomp.c-c++-common/target-update-iterators-3.c: Likewise.
* testsuite/libgomp.c-c++-common/task-reduction-11.c: Likewise.
* testsuite/libgomp.c-c++-common/task-reduction-12.c: Likewise.
* testsuite/libgomp.c-c++-common/task-reduction-16.c: Likewise.
* testsuite/libgomp.c-c++-common/task-reduction-3.c: Likewise.
* testsuite/libgomp.c-c++-common/task-reduction-7.c: Likewise.
* testsuite/libgomp.c-c++-common/task-reduction-9.c: Likewise.
* testsuite/libgomp.c-c++-common/taskloop-reduction-2.c: Likewise.
* testsuite/libgomp.c-c++-common/teams-nteams-icv-1.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/deep-copy-1.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/deep-copy-16.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/deep-copy-3.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/deep-copy-4.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/deep-copy-5.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/deep-copy-6.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/deep-copy-7.c: Likewise.
* testsuite/libgomp.oacc-c-c++-common/deep-copy-8.c: Likewise.