amdkfd: Introduce kfd_create_process_sysfs as a separate function
KFD creates sysfs entries for a kfd_process in
function kfd_create_process when creating it.
This commit extracts the code creating sysfs
entries to a separate function because it
would be invoked in other code path like
creating secondary kfd contexts (kfd_process).
Signed-off-by: Zhu Lingshan <lingshan.zhu@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Taimur Hassan [Sat, 22 Nov 2025 04:33:35 +0000 (23:33 -0500)]
drm/amd/display: Promote DC to 3.2.361
This version brings along the following updates:
- Fix wrong x_pos and y_pos for cursor offload.
- Fix Smart Power OLED not working after S4.
- Fix double cursor when switching between hw and sw cursor.
- Add configurable SPL namespace prefix.
- Add register definitions in dcn_hubbub_registers.
- Add additional info from DML.
- Add dc interface for query QoS information.
- Refactor HPD to increase flexibility.
- Remove unused encoder types.
Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
SPL is a shared library that is used both in kernel and userspace.
When multiple libraries use SPL as statically linked, namespace
collision occur.
[HOW]
Create a configurable namespace prefix.
Add the prefix to all the public functions of the library to
distinguish between the SPL functions in each library.
Reviewed-by: Samson Tam <samson.tam@amd.com> Signed-off-by: Navid Assadian <Navid.Assadian@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Reset pipe mask at beginning of cursor offload
[Why]
Double cursor when switching between hardware and software cursor when
dragging an MPO window can occur with cursor offload enabled.
The abort cursor update in the full programming path is responsible for
this issue since it does not reset the pipe mask when attempting to
submit an empty update.
The firmware programs the payload as requested which may contain
invalid or stale data for the previously enabled pipes, resulting in
an offset or double cursor.
[How]
For performance we don't want to memset the entire payload structure
due to its size, so just reset the pipe mask which will indicate the
payload data is empty.
Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Tue, 18 Nov 2025 21:16:13 +0000 (16:16 -0500)]
drm/amd/display: add register definitions in dcn_hubbub_registers
Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jing Zhou [Mon, 17 Nov 2025 07:18:50 +0000 (15:18 +0800)]
drm/amd/display: Correct FIXED_VS Link Rate Toggle Condition
[WHY&HOW]
The condition is only perform toggle if FIXED_VS LTTPR reports
no IEEE OUI.
The literal "\x0,\x0,\x0" contains commas changes the
bytes being compared to {0x00,0x2C,0X00}.
The correct literal should be "\x00\x00\x00" without commas.
Reviewed-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Jing Zhou <Jing.Zhou@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nevenko Stupar [Wed, 19 Nov 2025 20:13:48 +0000 (15:13 -0500)]
drm/amd/display: Add additional info from DML
for DMU when applicable on future platforms.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Nevenko Stupar <Nevenko.Stupar@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY&HOW]
If DMCUB is not initialized or FAMS2 is not supported, the
interface should not be called.
Reviewed-by: Sridevi Arvindekar <sridevi.arvindekar@amd.com> Signed-off-by: Dillon Varone <Dillon.Varone@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenjing Liu [Mon, 10 Nov 2025 19:37:26 +0000 (14:37 -0500)]
drm/amd/display: add dc interface for query QoS information
[why]
Add support for retrieving Quality of Service (QoS) metrics from dc
to enable performance analysis and bottleneck identification. This provides
benchmark tools with real-time bandwidth and latency measurements from hardware
performance counters, helping diagnose display system performance issues.
[how]
- Add dc_get_qos_info() function to DC layer for unified QoS data retrieval
- Implement hardware sequencer interface with function pointers for QoS
measurements
- Integrate QoS metrics: peak/average bandwidth (Mbps) and max/average
latency (ns)
Reviewed-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Fix wrong x_pos and y_pos for cursor offload
[Why]
The hubp401_cursor_set_position function programs a different value
than it stores for use with cursor offload.
This can cause a desync when switching between cursor programming paths.
[How]
We do the translation to destination space currently twice: once in the
HWSS layer, and then again in the HUBP layer since we never store the
translated result.
HUBP expects to program the pos->x and pos->y directly for other ASIC,
so follow that pattern here as well.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: refactor HPD to increase flexibility
Currently all dcn revisions have to follow the same codepath for
hotplug detection. This change allows per dcn hpd handling consolidating
hpd code in link_encoder.
Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ivan Lipski [Fri, 21 Nov 2025 16:54:31 +0000 (11:54 -0500)]
drm/amd/display: Use local variable for analog_engine initialization
[Why&How]
Use local variable for analog_engine retrieval and check if it is supported
instead of the struct parameter.
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ivan Lipski [Fri, 21 Nov 2025 16:48:49 +0000 (11:48 -0500)]
drm/amd/display: Remove unused encoder types
[Why&How]
We only support ENCODER_ID_INTERNAL_UNIPHY encoders now, so NUTMEG & TRAVIS
can be removed from translate_encoder_to_transmitter.
Also refactor to use local variables of transmitter to exit early.
V2: Fix construct_phy check for TRANSMITTER_UKNOWN
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zhu Lingshan [Tue, 29 Oct 2024 08:46:34 +0000 (16:46 +0800)]
amdkfd: find_process_by_mm always return the primary context
Up until this commit, the kfd multiple contexts feature has
not been fully implemented in mainline kernel yet.
For backawrd compatibility, not break existing use cases,
this commit changes function find_process_by_mm, let it
always return the primary kfd_process.
Signed-off-by: Zhu Lingshan <lingshan.zhu@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: remove the ring param from ttm functions
With the removal of the direct_submit argument, the ring param
becomes useless: the jobs are always submitted to buffer_funcs_ring.
Some functions are getting an amdgpu_device argument since they
were getting it from the ring arg.
---
v4: remove adev param from amdgpu_ttm_map_buffer
---
Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Acked-by: Felix Kuehling <felix.kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jack Xiao [Wed, 14 May 2025 09:01:21 +0000 (17:01 +0800)]
drm/amdgpu/mes_v12_1: initial support for mes_v12_1
Duplicated and rename mes ip version name to v12_1_0.
Fix to access correct ring pipe by xcc_id.
Fix to access correct instance registers by xcc_id.
Fix to access correct index registers by grbm/xcc_id.
v2: rebase (Alex)
v3: fix sw_fini (Alex)
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Mukul Joshi <mukul.joshi@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: remove direct_submit arg from amdgpu_copy_buffer
It was always false.
Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Acked-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zhu Lingshan [Thu, 24 Oct 2024 02:32:38 +0000 (10:32 +0800)]
amdkfd: enlarge the hashtable of kfd_process
This commit enlarges the hashtable size of
kfd_process to 256, because of the multiple
contexts feature allowing each application
create multiple kfd_processes
Signed-off-by: Zhu Lingshan <lingshan.zhu@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mukul Joshi [Sat, 29 Mar 2025 01:20:28 +0000 (21:20 -0400)]
drm/amdkfd: Add SDMA 7.1.0 support in KFD
Add support for SDMA 7.1.0 in KFD.
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Alex Sierra <Alex.Sierra@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mukul Joshi [Thu, 2 Oct 2025 15:06:25 +0000 (11:06 -0400)]
drm/amdgpu: Update Generate PTE/PDE SDMA packet for SDMA 7.1
Update the Generate PTE/PDE packet fields for SDMA 7.1.
v2: squash in mtype fix (Mukul)
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Alex Sierra <alex.sierra@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrew Martin [Thu, 13 Nov 2025 16:03:59 +0000 (11:03 -0500)]
drm/amdkfd: Uninitialized and Unused variables
This patch initialize key variables and removed unused ones.
Signed-off-by: Andrew Martin <andrew.martin@amd.com> Reviewed-by: Philip Yang <Philip.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Taimur Hassan [Fri, 14 Nov 2025 23:59:49 +0000 (18:59 -0500)]
drm/amd/display: Promote DC to 3.2.360
This version brings along the following updates:
- Add additional checks for PSP footer size
- Correct DSC padding accounting
- Check ATOM_DEVICE_CRT2_SUPPORT in dc_load_detection
- Drop FPU flags from dml21_wrapper.c
- Permit DC_FP_START/END only in non-FP compilation units
- Add cursor offload abort to the new HWSS path
- Move dml2_create and init to the non-FPU dml2_wrapper
- Move dml2_validate to the non-FPU dml2_wrapper
- Rename dml2_wrapper.c to dml2_wrapper_fpu.c
- Increase EDID read retries
- Correct comment style
- Move CONNECTOR_ID_PCIE into switch/case
- Drop needless check for link->link_id.id
- Improve readability of link_detect_sink_signal_type
- Don't change brightness for disabled connectors
- Write default Vesa Aux backlight control in dmub
- Refactor panel replay dc libs
- Revise VSC SDP header for Panel Replay
- Fix sending redundant enable command to dmub
- Parse debug flag to PR FW
- Add AS-SDP v2 support for eDP feature
- Refactor panel replay set dmub cmd flow
- Improve HDMI info retrieval
- Check NULL before accessing
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ovidiu Bunea [Tue, 11 Nov 2025 20:44:08 +0000 (15:44 -0500)]
drm/amd/display: Add additional checks for PSP footer size
[WHY & HOW]
Newer ASICs have different PSP footer sizes which lead to driver
failing to locate the DMCUB FW meta info, which in turn causes
improper DMCUB FW loading and causes DMCUB to crash.
Add support for custom PSP footer sizes and check 512B by default
as well.
Reviewed-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Relja Vojvodic [Wed, 12 Nov 2025 20:21:46 +0000 (15:21 -0500)]
drm/amd/display: Correct DSC padding accounting
[WHY]
- After the addition of all OVT patches, DSC padding was being accounted
for multiple times, effectively doubling the padding
- This caused compliance failures or corruption
[HOW]
- Add padding to DSC pic width when required by HW, and do not re-add
when calculating reg values
- Do not add padding when computing PPS values, and instead track padding
separately to add when calculating slice width values
Reviewed-by: Chris Park <chris.park@amd.com> Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Relja Vojvodic <rvojvodi@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ard Biesheuvel [Thu, 9 Oct 2025 15:06:21 +0000 (17:06 +0200)]
drm/amd/display: Permit DC_FP_START/END only in non-FP compilation units
[WHAT]
Test the existing CPP macro _LINUX_FPU_COMPILATION_UNIT, which is set
when building source files that are permitted to use floating point,
in the implementation of DC_FP_START/END so that those are only usable
in non-FP code. This is a requirement of the generic kernel mode FPU
API, as some architectures (i.e., arm64) cannot safely enable FP codegen
in arbitrary code.
Cc: Austin Zheng <austin.zheng@amd.com> Cc: Jun Lei <jun.lei@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: Rodrigo Siqueira <siqueira@igalia.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Suggested-by: Christian König <christian.koenig@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 13 Nov 2025 20:22:04 +0000 (15:22 -0500)]
drm/amd/display: Drop FPU flags from dml21_wrapper.c
[WHAT]
The existing CFLAGS_ lines were pointing to a wrong location
for dml21_wrapper.c and were thereby ineffective. This means
dml21_wrapper.c is not an FPU compilation unit. Remove the
(erroneous) CFLAGS_ entries.
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 30 Oct 2025 19:10:02 +0000 (15:10 -0400)]
drm/amd/display: Move dml2_create and init to the non-FPU dml2_wrapper
[WHAT]
dml2_init calls DC_FP_START/END and needs to be moved out
of the FPU compilation unit.
Reviewed-by: Austin Zheng <austin.zheng@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 30 Oct 2025 18:26:57 +0000 (14:26 -0400)]
drm/amd/display: Move dml2_validate to the non-FPU dml2_wrapper
[WHAT]
It calls DC_FP_START/END and shouldn't be living inside an
FPU compilation unit.
Reviewed-by: Austin Zheng <austin.zheng@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 30 Oct 2025 18:12:30 +0000 (14:12 -0400)]
drm/amd/display: Rename dml2_wrapper.c to dml2_wrapper_fpu.c
[WHAT]
This function is an FPU compilation unit. Therefore it's not
allowed to call DC_FP_START/END functions. It currently does
so and we'll need to move those functions out. Therefore
rename the existing compilation unit so we can introduce a
non-FPU dml2_wrapper.c.
Reviewed-by: Austin Zheng <austin.zheng@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Comments should have /* and */ on their own lines.
Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Drop needless check for link->link_id.id
[WHY]
The switch/case in `link_detect_sink_signal_type` already detects the
link ID of `CONNECTOR_ID_HDMI_TYPE_A`.
[How]
Drop the extra match.
Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Move CONNECTOR_ID_PCIE into switch/case
[WHY]
There is already a switch/case looking at link->link_id.id.
[How]
Move the case of `CONNECTOR_ID_PCIE` into switch case.
Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Improve readability of link_detect_sink_signal_type
[WHAT]
Move the break statements indentation in for the switch/case block.
Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Derek Lai [Fri, 31 Oct 2025 02:58:52 +0000 (10:58 +0800)]
drm/amd/display: Write default Vesa Aux backlight control in dmub
[WHY]
Some OLED panels require driver to write Aux BL before link training or
turning on backlight; otherwise monitor brightness will change.
[HOW]
Write the default Vesa Aux backlight control in dmub.
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Derek Lai <Derek.Lai@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jack Chang [Thu, 6 Nov 2025 03:54:03 +0000 (11:54 +0800)]
drm/amd/display: Refactor panel replay dc libs
[WHY]
Add dc interface to export link service libs for setting PR dmub command.
Reviewed-by: Robin Chen <robin.chen@amd.com> Signed-off-by: Jack Chang <jack.chang@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jack Chang [Tue, 14 Oct 2025 08:28:51 +0000 (16:28 +0800)]
drm/amd/display: Revise VSC SDP header for Panel Replay
[WAHT]
Add vsc sdp header setting for Panel Replay.
Reviewed-by: Robin Chen <robin.chen@amd.com> Signed-off-by: Jack Chang <jack.chang@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jack Chang [Wed, 17 Sep 2025 07:51:40 +0000 (15:51 +0800)]
drm/amd/display: Fix sending redundant enable command to dmub
[WHY & HOW]
Fix sending repeating PR enable/disable command to dmub
which causing performance problem
Reviewed-by: Robin Chen <robin.chen@amd.com> Signed-off-by: Jack Chang <jack.chang@amd.com> Signed-off-by: Leon Huang <Leon.Huang1@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jack Chang [Fri, 12 Sep 2025 07:40:18 +0000 (15:40 +0800)]
drm/amd/display: Parse debug flag to PR FW
[HOW & WHY]
Parse debug flag to PR FW.
Reviewed-by: Robin Chen <robin.chen@amd.com> Signed-off-by: Jack Chang <jack.chang@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jack Chang [Thu, 11 Sep 2025 08:22:53 +0000 (16:22 +0800)]
drm/amd/display: Add AS-SDP v2 support for eDP feature
[WHY & HOW]
VESA Panel Replay requires AS-SDP v2 support.
Need to add checking flow to enable AS-SDP v2 in this case.
Reviewed-by: Robin Chen <robin.chen@amd.com> Signed-off-by: Jack Chang <jack.chang@amd.com> Signed-off-by: Leon Huang <Leon.Huang1@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jack Chang [Wed, 3 Sep 2025 07:41:15 +0000 (15:41 +0800)]
drm/amd/display: Refactor panel replay set dmub cmd flow
[WHY]
Add link service interface for setting PR dmub command
Reviewed-by: Robin Chen <robin.chen@amd.com> Signed-off-by: Jack Chang <jack.chang@amd.com> Signed-off-by: Leon Huang <Leon.Huang1@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ivan Lipski [Fri, 7 Nov 2025 21:50:37 +0000 (16:50 -0500)]
drm/amd/display: Improve HDMI info retrieval
[WHY & HOW]
Make a dedicated function to read HDMI-related monitor info, including
monitor's SCDC support.
Suggested-by: Fangzhi Zuo <jerry.zuo@amd.com> Reviewed-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ed Maste [Fri, 21 Nov 2025 15:12:36 +0000 (15:12 +0000)]
drm/amd/amdgpu: Add missing newline in DRM_DEBUG_DRIVER message
This error message was emitted without a newline during bring-up on
FreeBSD. Presumably the error doesn't occur on Linux so was not noticed
before.
Signed-off-by: Ed Maste <emaste@FreeBSD.org> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mukul Joshi [Wed, 13 Aug 2025 02:57:38 +0000 (22:57 -0400)]
drm/amdkfd: Fix PTE clearing during SVM unmap on GFX 12.1
During migration from VRAM to RAM, when PTE is cleared, reset
the PTE to always ensure that PTE.P=1 is set on GFX 12.1. If
PTE.P is not set, it can lead to TF faults.
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Alex Sierra <alex.sierra@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
On GFX 12.1, PDE.C is ignored if (PDE|PTE)_REQUEST_PHYSICAL
is not setup in the GCVM control register. Always set this
field to enable PDE.C usage.
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Alex Sierra <alex.sierra@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mukul Joshi [Thu, 21 Aug 2025 17:51:57 +0000 (13:51 -0400)]
drm/amdgpu: Always set snoop bit in PDE on GFX 12.1
GFX 12.1 has the requirement to always set snoop bit in PDE
to maintain coherency.
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Alex Sierra <alex.sierra@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
On GFX12.1, default PTE setup needs an additional bit to be
set. Add PTE initialization flags to handle setup default PTE
on a per-ASIC basis.
While at it, fixup the coding style too.
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Philip Yang <Philip.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Fri, 29 Aug 2025 05:03:34 +0000 (13:03 +0800)]
drm/amdgpu: Add osssys v7_1_0 ip headers v3
Add header files for osssys v7_1_0 register offsets
and shift masks
v2: Update osssys v7_1_0 ip headers to the latest version
v3: Clean up registers (Alex)
drm/amdgpu: Map/Unmap MMIO_REMAP as BAR register window; add TTM sg helpers; wire dma-buf
MMIO_REMAP (HDP flush page) exposes a hardware MMIO register window via
a PCI BAR; there are no struct pages backing it (not normal RAM). But
when one device shares memory with another through dma-buf, the receiver
still expects a delivery route—a list of DMA-able chunks—called an
sg_table. For the BAR window, we can’t (no pages!), so we instead create
a one-entry list that points directly to the BAR’s physical bus address
and tell DMA: “use this I/O span.” - A single, contiguous byte range on
the PCI bus (start DMA address + length)). That’s why we map it with
dma_map_resource() and set sg_set_page(..., NULL, ...). Perform DMA
reads/writes directly to that range so we build an sg_table from a BAR
physical span and map it with dma_map_resource().
This patch centralizes the BAR-I/O mapping in TTM and wires dma-buf to
it:
Add amdgpu_ttm_mmio_remap_alloc_sgt() /
amdgpu_ttm_mmio_remap_free_sgt(). They walk the TTM resource via
amdgpu_res_cursor, add the byte offset to adev->rmmio_remap.bus_addr,
build a one-entry sg_table with sg_set_page(NULL, …), and map/unmap it
with dma_map_resource().
In dma-buf map/unmap, if the BO is in AMDGPU_PL_MMIO_REMAP, call the new
helpers.
Single place for BAR-I/O handling: amdgpu_ttm.c in
amdgpu_ttm_mmio_remap_alloc_sgt() and ..._free_sgt().
No struct pages: sg_set_page(sg, NULL, cur.size, 0); inside
amdgpu_ttm_mmio_remap_alloc_sgt().
Minimal sg_table: sg_alloc_table(*sgt, 1, GFP_KERNEL); inside
amdgpu_ttm_mmio_remap_alloc_sgt().
Hooked into dma-buf: amdgpu_dma_buf_map()/unmap() in amdgpu_dma_buf.c
call these helpers for AMDGPU_PL_MMIO_REMAP.
v2: squash in fix for set/get tiling
Suggested-by: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/ttm: Pin 4K MMIO_REMAP Singleton BO at Init v2
MMIO_REMAP (HDP flush page) is a hardware I/O window exposed via a PCI
BAR. It must not migrate or be evicted.
Allocate a single 4 KB GEM BO in AMDGPU_GEM_DOMAIN_MMIO_REMAP during TTM
initialization when the hardware exposes a remap bus address and the
host page size is <= 4 KiB. Reserve the BO and pin it at the TTM level
so it remains fixed for its lifetime. No CPU mapping is established
here.
On teardown, reserve, unpin, and free the BO if present.
This prepares the object to be shared (e.g., via dma-buf) without
triggering placement changes or no CPU-access migration
v2: Added extra NULL checks
Suggested-by: Christian König <christian.koenig@amd.com> Suggested-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
YiPeng Chai [Thu, 30 Oct 2025 08:49:14 +0000 (16:49 +0800)]
drm/amd/ras: Add sriov ras preprocessing before gpu reset
Sriov host may clear all VF commands registered to auto
update list during VF reset, set ecc.auto_uUpdate block
to false before VF reset, and after VF reset is complete,
RAS_CMD__GET_ALL_BLOCK_ECC_STATUS command will be re-registered
to auto update list of sriov host.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
YiPeng Chai [Thu, 30 Oct 2025 08:06:25 +0000 (16:06 +0800)]
drm/amd/ras: Support high-frequency querying sriov ras block error count
Support high-frequency querying sriov ras block error count:
1. Create shared memory and fills it with RAS_CMD__GET_LAL_LOC_STATUS
ras command.
2. The RAS_CMD_GET_ALL_BLOCK_ECC_STATUS command and shared
memory are registered to sriov host ras auto-update list
via RAS_CMD_SET_CMD_AUTO_UPDATE command.
3. Once sriov host detects ras error, it will automatically execute
RAS_CMD__GET_ALL_BLOCK_ECC_STATUS command and write the result to
shared memory.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
YiPeng Chai [Tue, 11 Nov 2025 07:43:02 +0000 (15:43 +0800)]
drm/amd/ras: Add ras command to retrieve cper data from sriov host
In order to reduce the number of interactions with sriov
host and the amount of data exchanged, a set of ras commands
is first used to obtain the raw data used to generate cper
from the host, then, guest driver generates cper based
on the obtained raw data.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Wed, 19 Nov 2025 07:21:43 +0000 (15:21 +0800)]
drm/amdgpu: fix the calculation of RAS bad page number
__amdgpu_ras_restore_bad_pages is responsible for the maintenance of bad
page number, drop the unnecessary bad page number update in the error
handling path of add_bad_pages.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rodrigo Siqueira [Wed, 19 Nov 2025 00:45:54 +0000 (17:45 -0700)]
Documentation/gpu: Add documentation about ring buffer
AMDGPU heavily relies on ring buffers to manage its components; as a
result, it has an elaborate mechanism of operation with multiple details
around it. This commit introduces new documentation on ring buffers,
detailing their management and expanding the explanation of Enforce
isolation. Finally, this commit also adds the documentation available in
the amdgpu_ring.c file to it.
Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rodrigo Siqueira [Wed, 19 Nov 2025 00:45:53 +0000 (17:45 -0700)]
Documentation/gpu: Add more information about GC
This commit introduces set of information that details the different
sets of schedulers available in the SE.
Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rodrigo Siqueira [Wed, 19 Nov 2025 00:45:52 +0000 (17:45 -0700)]
Documentation/gpu: Expand generic block information
This commit expands the overall explanation about AMD GPU IPs by adding
more details about their interconnection. Note that this commit includes
a diagram that provides additional information.
v2: fix up TMR - Trusted Memory Region
Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rodrigo Siqueira [Wed, 19 Nov 2025 00:45:51 +0000 (17:45 -0700)]
Documentation/gpu: Add new glossary entries from UMR
When using UMR, a dashboard is available that displays the CPC, CPF,
CPG, TCP, and UTCL utilization. This commit introduces the meanings of
those acronyms (and others) to the glossary to improve the comprehension
of the UMR dashboard.
Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Timur Kristóf <timur.kristof@gmail.com> Cc: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rodrigo Siqueira [Wed, 19 Nov 2025 00:45:50 +0000 (17:45 -0700)]
drm/amdgpu: Expand kernel-doc in amdgpu_ring
Expand the kernel-doc about amdgpu_ring and add some tiny improvements.
Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mukul Joshi [Tue, 5 Nov 2024 00:23:23 +0000 (19:23 -0500)]
drm/amdgpu: Enable IH CAM on IH 7.1.0
Enable IH CAM to handle retry faults on IH 7.1.0.
Also increase the soft ring size.
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Philip Yang <Philip.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
In psp 15.0.8, mes and sdma GFX_FW_TYPE have been changed.
Define a psp common function: psp_get_fw_type().
Hide the GFX_FW_TYPE Changes in each ip's psp->funcs_get_fw_type callback.
(like psp_v15_0_8_get_fw_type()).
If no GFX_FW_TYPE change, reuse the amdgpu_psp_get_fw_type().