Tamar Christina [Fri, 20 Oct 2023 07:09:45 +0000 (08:09 +0100)]
ifcvt: Support bitfield lowering of multiple-exit loops
With the patch enabling the vectorization of early-breaks, we'd like to allow
bitfield lowering in such loops, which requires the relaxation of allowing
multiple exits when doing so. In order to avoid a similar issue to PR107275,
the code that rejects loops with certain types of gimple_stmts was hoisted from
'if_convertible_loop_p_1' to 'get_loop_body_in_if_conv_order', to avoid trying
to lower bitfields in loops we are not going to vectorize anyway.
This also ensures 'ifcvt_local_dec' doesn't accidentally remove statements it
shouldn't as it will never come across them. I made sure to add a comment to
make clear that there is a direct connection between the two and if we were to
enable vectorization of any other gimple statement we should make sure both
handle it.
gcc/ChangeLog:
* tree-if-conv.cc (if_convertible_loop_p_1): Move check from here ...
(get_loop_body_if_conv_order): ... to here.
(if_convertible_loop_p): Remove single_exit check.
(tree_if_conversion): Move single_exit check to if-conversion part and
support multiple exits.
gcc/testsuite/ChangeLog:
* gcc.dg/vect/vect-bitfield-read-1-not.c: New test.
* gcc.dg/vect/vect-bitfield-read-2-not.c: New test.
* gcc.dg/vect/vect-bitfield-read-8.c: New test.
* gcc.dg/vect/vect-bitfield-read-9.c: New test.
Co-Authored-By: Andre Vieira <andre.simoesdiasvieira@arm.com>
Tamar Christina [Fri, 20 Oct 2023 07:08:54 +0000 (08:08 +0100)]
middle-end: Enable bit-field vectorization to work correctly when we're vectoring inside conds
The bitfield vectorization support does not currently recognize bitfields inside
gconds. This means they can't be used as conditions for early break
vectorization which is a functionality we require.
This adds support for them by explicitly matching and handling gcond as a
source.
Testcases are added in the testsuite update patch as the only way to get there
is with the early break vectorization. See tests:
- vect-early-break_20.c
- vect-early-break_21.c
gcc/ChangeLog:
* tree-vect-patterns.cc (vect_init_pattern_stmt): Copy STMT_VINFO_TYPE
from original statement.
(vect_recog_bitfield_ref_pattern): Support bitfields in gcond.
Co-Authored-By: Andre Vieira <andre.simoesdiasvieira@arm.com>
Hu, Lin1 [Wed, 11 Oct 2023 08:03:17 +0000 (16:03 +0800)]
Fix testcases that are raised by support -mevex512
Hi, all
This patch aims to fix some scan-asm fail of pr89229-{5,6,7}b.c since we emit
scalar vmov{s,d} here, when trying to use x/ymm 16+ w/o avx512vl but with
avx512f+evex512.
If everyone has no objection to the modification of this behavior, then we tend
to solve these failures by modifying these testcases.
Note that this patch triggers multiple FAILs:
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_arith_run-3.c execution test
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_arith_run-3.c execution test
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_arith_run-4.c execution test
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_arith_run-4.c execution test
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_arith_run-8.c execution test
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_arith_run-8.c execution test
FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-1.c execution test
FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-1.c execution test
FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-2.c execution test
FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-2.c execution test
FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/strided_store_run-1.c execution test
FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/strided_store_run-1.c execution test
FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/strided_store_run-2.c execution test
FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/strided_store_run-2.c execution test
They failed are all because of bugs on VSETVL PASS:
10dd4: 0c707057 vsetvli zero,zero,e8,mf2,ta,ma
10dd8: 5e06b8d7 vmv.v.i v17,13
10ddc: 9ed030d7 vmv1r.v v1,v13
10de0: b21040d7 vncvt.x.x.w v1,v1 ----> raise illegal instruction since we don't have SEW = 8 -> SEW = 4 narrowing.
10de4: 5e0785d7 vmv.v.v v11,v15
Confirm the recent VSETVL refactor patch: https://gcc.gnu.org/pipermail/gcc-patches/2023-October/633231.html fixed all of them.
So this patch should be committed after the VSETVL refactor patch.
PR target/111848
gcc/ChangeLog:
* config/riscv/riscv-selftests.cc (run_const_vector_selftests): Adapt selftest.
* config/riscv/riscv-v.cc (expand_const_vector): Change it into vec_duplicate splitter.
gcc/testsuite/ChangeLog:
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-7.c: Adapt test.
* gcc.dg/vect/costmodel/riscv/rvv/pr111848.c: New test.
Lehua Ding [Fri, 20 Oct 2023 02:22:43 +0000 (10:22 +0800)]
RISC-V: Refactor and cleanup vsetvl pass
This patch refactors and cleanups the vsetvl pass in order to make the code
easier to modify and understand. This patch does several things:
1. Introducing a virtual CFG for vsetvl infos and Phase 1, 2 and 3 only maintain
and modify this virtual CFG. Phase 4 performs insertion, modification and
deletion of vsetvl insns based on the virtual CFG. The basic block in the
virtual CFG is called vsetvl_block_info and the vsetvl information inside
is called vsetvl_info.
2. Combine Phase 1 and 2 into a single Phase 1 and unified the demand system,
this phase only fuse local vsetvl info in forward direction.
3. Refactor Phase 3, change the logic for determining whether to uplift vsetvl
info to a pred basic block to a more unified method that there is a vsetvl
info in the vsetvl defintion reaching in compatible with it.
4. Place all modification operations to the RTL in Phase 4 and Phase 5.
Phase 4 is responsible for inserting, modifying and deleting vsetvl
instructions based on fully optimized vsetvl infos. Phase 5 removes the avl
operand from the RVV instruction and removes the unused dest operand
register from the vsetvl insns.
These modifications resulted in some testcases needing to be updated. The reasons
for updating are summarized below:
1. more optimized
vlmax_back_prop-{25,26}.c
vlmax_conflict-{3,12}.c/vsetvl-{13,23}.c/vsetvl-23.c/
avl_single-{23,84,95}.c/pr109773-1.c
2. less unnecessary fusion
avl_single-46.c/imm_bb_prop-1.c/pr109743-2.c/vsetvl-18.c
3. local fuse direction (backward -> forward)
scalar_move-1.c
4. add some bugfix testcases.
pr111037-{3,4}.c/pr111037-4.c
avl_single-{89,104,105,106,107,108,109}.c
Alexandre Oliva [Fri, 20 Oct 2023 03:35:17 +0000 (00:35 -0300)]
return edge in make_eh_edges
The need to initialize edge probabilities has made make_eh_edges
undesirably hard to use. I suppose we don't want make_eh_edges to
initialize the probability of the newly-added edge itself, so that the
caller takes care of it, but identifying the added edge in need of
adjustments is inefficient and cumbersome. Change make_eh_edges so
that it returns the added edge.
for gcc/ChangeLog
* tree-eh.cc (make_eh_edges): Return the new edge.
* tree-eh.h (make_eh_edges): Likewise.
Nathaniel Shead [Thu, 12 Oct 2023 08:53:55 +0000 (19:53 +1100)]
c++: indirect change of active union member in constexpr [PR101631,PR102286]
This patch adds checks for attempting to change the active member of a
union by methods other than a member access expression.
To be able to properly distinguish `*(&u.a) = ` from `u.a = `, this
patch redoes the solution for c++/59950 to avoid extranneous *&; it
seems that the only case that needed the workaround was when copying
empty classes.
This patch also ensures that constructors for a union field mark that
field as the active member before entering the call itself; this ensures
that modifications of the field within the constructor's body don't
cause false positives (as these will not appear to be member access
expressions). This means that we no longer need to start the lifetime of
empty union members after the constructor body completes.
As a drive-by fix, this patch also ensures that value-initialised unions
are considered to have activated their initial member for the purpose of
checking stores and accesses, which catches some additional mistakes
pre-C++20.
PR c++/101631
PR c++/102286
gcc/cp/ChangeLog:
* call.cc (build_over_call): Fold more indirect refs for trivial
assignment op.
* class.cc (type_has_non_deleted_trivial_default_ctor): Create.
* constexpr.cc (cxx_eval_call_expression): Start lifetime of
union member before entering constructor.
(cxx_eval_component_reference): Check against first member of
value-initialised union.
(cxx_eval_store_expression): Activate member for
value-initialised union. Check for accessing inactive union
member indirectly.
* cp-tree.h (type_has_non_deleted_trivial_default_ctor):
Forward declare.
gcc/testsuite/ChangeLog:
* g++.dg/cpp1y/constexpr-89336-3.C: Fix union initialisation.
* g++.dg/cpp1y/constexpr-union6.C: New test.
* g++.dg/cpp1y/constexpr-union7.C: New test.
* g++.dg/cpp2a/constexpr-union2.C: New test.
* g++.dg/cpp2a/constexpr-union3.C: New test.
* g++.dg/cpp2a/constexpr-union4.C: New test.
* g++.dg/cpp2a/constexpr-union5.C: New test.
* g++.dg/cpp2a/constexpr-union6.C: New test.
Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com> Reviewed-by: Jason Merrill <jason@redhat.com>
Nathaniel Shead [Tue, 10 Oct 2023 23:57:06 +0000 (10:57 +1100)]
c++: Improve diagnostics for constexpr cast from void*
This patch improves the errors given when casting from void* in C++26 to
include the expected type if the types of the pointed-to objects were
not similar. It also ensures (for all standard modes) that void* casts
are checked even for DECL_ARTIFICIAL declarations, such as
lifetime-extended temporaries, and is only ignored for cases where we
know it's OK (e.g. source_location::current) or have no other choice
(heap-allocated data).
gcc/cp/ChangeLog:
* constexpr.cc (is_std_source_location_current): New.
(cxx_eval_constant_expression): Only ignore cast from void* for
specific cases and improve other diagnostics.
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/constexpr-cast4.C: New test.
Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com> Reviewed-by: Marek Polacek <polacek@redhat.com> Reviewed-by: Jason Merrill <jason@redhat.com>
Marek Polacek [Thu, 19 Oct 2023 13:57:53 +0000 (09:57 -0400)]
c++: small tweak for cp_fold_r
This patch is an optimization tweak for cp_fold_r. If we cp_fold_r the
COND_EXPR's op0 first, we may be able to evaluate it to a constant if -O.
cp_fold has:
3143 if (callee && DECL_DECLARED_CONSTEXPR_P (callee)
3144 && !flag_no_inline)
...
3151 r = maybe_constant_value (x, /*decl=*/NULL_TREE,
flag_no_inline is 1 for -O0:
1124 if (opts->x_optimize == 0)
1125 {
1126 /* Inlining does not work if not optimizing,
1127 so force it not to be done. */
1128 opts->x_warn_inline = 0;
1129 opts->x_flag_no_inline = 1;
1130 }
but otherwise it's 0 and cp_fold will maybe_constant_value calls to
constexpr functions. And if it doesn't, then folding the COND_EXPR
will keep both arms, and we can avoid calling maybe_constant_value.
Andre Vieira [Thu, 19 Oct 2023 17:28:28 +0000 (18:28 +0100)]
vect: Use inbranch simdclones in masked loops
This patch enables the compiler to use inbranch simdclones when generating
masked loops in autovectorization.
gcc/ChangeLog:
* omp-simd-clone.cc (simd_clone_adjust_argument_types): Make function
compatible with mask parameters in clone.
* tree-vect-stmts.cc (vect_build_all_ones_mask): Allow vector boolean
typed masks.
(vectorizable_simd_clone_call): Enable the use of masked clones in
fully masked loops.
When analyzing a loop and choosing a simdclone to use it is possible to choose
a simdclone that cannot be used 'inbranch' for a loop that can use partial
vectors. This may lead to the vectorizer deciding to use partial vectors which
are not supported for notinbranch simd clones. This patch fixes that by
disabling the use of partial vectors once a notinbranch simd clone has been
selected.
gcc/ChangeLog:
PR tree-optimization/110485
* tree-vect-stmts.cc (vectorizable_simd_clone_call): Disable partial
vectors usage if a notinbranch simdclone has been selected.
Andre Vieira [Thu, 19 Oct 2023 17:30:15 +0000 (18:30 +0100)]
vect: Fix vect_get_smallest_scalar_type for simd clones
The vect_get_smallest_scalar_type helper function was using any argument to a
simd clone call when trying to determine the smallest scalar type that would be
vectorized. This included the function pointer type in a MASK_CALL for
instance, and would result in the wrong type being selected. Instead this
patch special cases simd_clone_call's and uses only scalar types of the
original function that get transformed into vector types.
gcc/ChangeLog:
* tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Special case
simd clone calls and only use types that are mapped to vectors.
(simd_clone_call_p): New helper function.
gcc/testsuite/ChangeLog:
* gcc.dg/vect/vect-simd-clone-16f.c: Remove unnecessary differentation
between targets with different pointer sizes.
* gcc.dg/vect/vect-simd-clone-17f.c: Likewise.
* gcc.dg/vect/vect-simd-clone-18f.c: Likewise.
Andre Vieira [Thu, 19 Oct 2023 17:26:45 +0000 (18:26 +0100)]
parloops: Copy target and optimizations when creating a function clone
SVE simd clones require to be compiled with a SVE target enabled or the argument
types will not be created properly. To achieve this we need to copy
DECL_FUNCTION_SPECIFIC_TARGET from the original function declaration to the
clones. I decided it was probably also a good idea to copy
DECL_FUNCTION_SPECIFIC_OPTIMIZATION in case the original function is meant to
be compiled with specific optimization options.
gcc/ChangeLog:
* tree-parloops.cc (create_loop_fn): Copy specific target and
optimization options to clone.
Andrew Pinski [Thu, 19 Oct 2023 05:42:02 +0000 (05:42 +0000)]
c: Fix ICE when an argument was an error mark [PR100532]
In the case of convert_argument, we would return the same expression
back rather than error_mark_node after the error message about
trying to convert to an incomplete type. This causes issues in
the gimplfier trying to see if another conversion is needed.
The code here dates back to before the revision history too so
it might be the case it never noticed we should return an error_mark_node.
Bootstrapped and tested on x86_64-linux-gnu with no regressions.
PR c/100532
gcc/c/ChangeLog:
* c-typeck.cc (convert_argument): After erroring out
about an incomplete type return error_mark_node.
Andrew Pinski [Thu, 19 Oct 2023 03:49:05 +0000 (20:49 -0700)]
c: Don't warn about converting NULL to different sso endian [PR104822]
In a similar way we don't warn about NULL pointer constant conversion to
a different named address we should not warn to a different sso endian
either.
This adds the simple check.
Bootstrapped and tested on x86_64-linux-gnu with no regressions.
PR c/104822
gcc/c/ChangeLog:
* c-typeck.cc (convert_for_assignment): Check for null pointer
before warning about an incompatible scalar storage order.
gcc/testsuite/ChangeLog:
* gcc.dg/sso-18.c: New test.
* gcc.dg/sso-19.c: New test.
Jason Merrill [Thu, 19 Oct 2023 15:23:03 +0000 (11:23 -0400)]
diagnostic: rename new permerror overloads
While checking another change, I noticed that the new permerror overloads
break gettext with "permerror used incompatibly as both
--keyword=permerror:2 --flag=permerror:2:gcc-internal-format and
--keyword=permerror:3 --flag=permerror:3:gcc-internal-format". So let's
change the name.
gcc/ChangeLog:
* diagnostic-core.h (permerror): Rename new overloads...
(permerror_opt): To this.
* diagnostic.cc: Likewise.
Jason Merrill [Wed, 18 Oct 2023 18:10:39 +0000 (14:10 -0400)]
c++: use G_ instead of _
Since these strings are passed to error_at, they should be marked for
translation with G_, like other diagnostic messages, rather than _, which
forces immediate (redundant) translation. The use of N_ is less
problematic, but also imprecise.
SPARK RM 6.1.11 introduces a new aspect Side_Effects to denote
those functions which may have output parameters, write global
variables, raise exceptions and not terminate. This adds support
for this aspect and the corresponding pragma in the frontend.
Handling of this aspect in the frontend is very similar to
the handling of aspect Extensions_Visible: both are Boolean
aspects whose expression should be static, they can be specified
on the same entities, with the same rule of inheritance from
overridden to overriding primitives for tagged types.
There is no impact on code generation.
gcc/ada/
* aspects.ads: Add aspect Side_Effects.
* contracts.adb (Add_Pre_Post_Condition)
(Inherit_Subprogram_Contract): Add support for new contract.
* contracts.ads: Update comments.
* einfo-utils.adb (Get_Pragma): Add support.
* einfo-utils.ads (Prag): Update comment.
* errout.ads: Add explain codes.
* par-prag.adb (Prag): Add support.
* sem_ch13.adb (Analyze_Aspect_Specifications)
(Check_Aspect_At_Freeze_Point): Add support.
* sem_ch6.adb (Analyze_Subprogram_Body_Helper)
(Analyze_Subprogram_Declaration): Call new analysis procedure to
check SPARK legality rules.
(Analyze_SPARK_Subprogram_Specification): New procedure to check
SPARK legality rules. Use an explain code for the error.
(Analyze_Subprogram_Specification): Move checks to new subprogram.
This code was effectively dead, as the kind for parameters was set
to E_Void at this point to detect early references.
* sem_ch6.ads (Analyze_Subprogram_Specification): Add new
procedure.
* sem_prag.adb (Analyze_Depends_In_Decl_Part)
(Analyze_Global_In_Decl_Part): Adapt legality check to apply only
to functions without side-effects.
(Analyze_If_Present): Extract functionality in new procedure
Analyze_If_Present_Internal.
(Analyze_If_Present_Internal): New procedure to analyze given
pragma kind.
(Analyze_Pragmas_If_Present): New procedure to analyze given
pragma kind associated with a declaration.
(Analyze_Pragma): Adapt support for Always_Terminates and
Exceptional_Cases. Add support for Side_Effects. Make sure to call
Analyze_If_Present to ensure pragma Side_Effects is analyzed prior
to analyzing pragmas Global and Depends. Use explain codes for the
errors.
* sem_prag.ads (Analyze_Pragmas_If_Present): Add new procedure.
* sem_util.adb (Is_Function_With_Side_Effects): New query function
to determine if a function is a function with side-effects.
* sem_util.ads (Is_Function_With_Side_Effects): Same.
* snames.ads-tmpl: Declare new names for pragma and aspect.
* doc/gnat_rm/implementation_defined_aspects.rst: Document new aspect.
* doc/gnat_rm/implementation_defined_pragmas.rst: Document new pragma.
* gnat_rm.texi: Regenerate.
Sheri Bernstein [Wed, 9 Aug 2023 16:04:31 +0000 (16:04 +0000)]
ada: Refactor code to remove GNATcheck violation
Rewrite for loop containing an exit (which violates GNATcheck
rule Exits_From_Conditional_Loops), to use a while loop
which contains the exit criteria in its condition.
Also, move special case of first time through loop, to come
before loop.
Patrick Bernardi [Fri, 29 Sep 2023 21:01:56 +0000 (17:01 -0400)]
ada: Document gnatbind -Q switch
Add documentation for the -Q gnatbind switch in GNAT User's Guide and
improve gnatbind's help output for the switch to emphasize that it adds the
requested number of stacks to the secondary stack pool generated by the
binder.
gcc/ada/
* bindusg.adb (Display): Make it clear -Q adds to the number of
secondary stacks generated by the binder.
* doc/gnat_ugn/building_executable_programs_with_gnat.rst:
Document the -Q gnatbind switch and fix references to old
runtimes.
* gnat-style.texi: Regenerate.
* gnat_rm.texi: Regenerate.
* gnat_ugn.texi: Regenerate.
Lewis Hyatt [Wed, 18 Oct 2023 16:37:08 +0000 (12:37 -0400)]
c++: Make -Wunknown-pragmas controllable by #pragma GCC diagnostic [PR89038]
As noted on the PR, commit r13-1544, the fix for PR53431, did not handle
the specific case of -Wunknown-pragmas, because that warning is issued
during preprocessing, but not by libcpp directly (it comes from the
cb_def_pragma callback). Address that by handling this pragma in
addition to libcpp pragmas during the early pragma handler.
gcc/c-family/ChangeLog:
PR c++/89038
* c-pragma.cc (handle_pragma_diagnostic_impl): Handle
-Wunknown-pragmas during early processing.
gcc/testsuite/ChangeLog:
PR c++/89038
* c-c++-common/cpp/Wunknown-pragmas-1.c: New test.
Tamar Christina [Thu, 19 Oct 2023 12:44:01 +0000 (13:44 +0100)]
middle-end: don't create LC-SSA PHI variables for PHI nodes who dominate loop
As the testcase shows, when a PHI node dominates the loop there is no new
definition inside the loop. As such there would be no PHI nodes to update.
When we maintain LCSSA form we create an intermediate node in between the two
loops to thread alongt the value. However later on when we update the second
loop we don't have any PHI nodes to update and so adjust_phi_and_debug_stmts
does nothing. This leaves us with an incorrect phi node. Normally this does
nothing and just gets ignored. But in the case of the vUSE chain we end up
corrupting the chain.
As such whenever a PHI node's argument dominates the loop, we should remove
the newly created PHI node after edge redirection.
The one exception to this is when the loop has been versioned. In such cases
the versioned loop may not use the value but the second loop can.
When this happens and we add the loop guard unless the join block has the PHI
it can't find the original value for use inside the guard block.
The next refactoring in the series moves the formation of the guard block
inside peeling itself. Here we have all the information and wouldn't
need to re-create it later.
Richard Biener [Thu, 19 Oct 2023 08:33:01 +0000 (10:33 +0200)]
tree-optimization/111131 - SLP for non-IFN gathers
The following implements SLP vectorization support for gathers
without relying on IFNs being pattern detected (and supported by
the target). That includes support for emulated gathers but also
the legacy x86 builtin path.
PR tree-optimization/111131
* tree-vect-loop.cc (update_epilogue_loop_vinfo): Make
sure to update all gather/scatter stmt DRs, not only those
that eventually got VMAT_GATHER_SCATTER set.
* tree-vect-slp.cc (_slp_oprnd_info::first_gs_info): Add.
(vect_get_and_check_slp_defs): Handle gathers/scatters,
adding the offset as SLP operand and comparing base and scale.
(vect_build_slp_tree_1): Handle gathers.
(vect_build_slp_tree_2): Likewise.
* gcc.dg/vect/vect-gather-1.c: Now expected to vectorize
everywhere.
* gcc.dg/vect/vect-gather-2.c: Expected to not SLP anywhere.
Massage the scale case to more reliably produce a different
one. Scan for the specific messages.
* gcc.dg/vect/vect-gather-3.c: Masked gather is also supported
for AVX2, but not emulated.
* gcc.dg/vect/vect-gather-4.c: Expected to not SLP anywhere.
Massage to more properly ensure this.
* gcc.dg/vect/tsvc/vect-tsvc-s353.c: Expect to vectorize
everywhere.
Richard Biener [Wed, 18 Oct 2023 12:39:21 +0000 (14:39 +0200)]
Refactor x86 vectorized gather path
The following moves the builtin decl gather vectorization path along
the internal function and emulated gather vectorization paths,
simplifying the existing function down to generating the call and
required conversions to the actual argument types. This thereby
exposes the unique support of two times larger number of offset
or data vector lanes. It also makes the code path handle SLP
in principle (but SLP build needs adjustments for this, patch coming).
* tree-vect-stmts.cc (vect_build_gather_load_calls): Rename
to ...
(vect_build_one_gather_load_call): ... this. Refactor,
inline widening/narrowing support ...
(vectorizable_load): ... here, do gather vectorization
with builtin decls along other gather vectorization.
This patch generalises the TFmode load/store pair patterns to TImode and
TDmode. This brings them in line with the DXmode patterns, and uses the
same technique with separate mode iterators (TX and TX2) to allow for
distinct modes in each arm of the load/store pair.
For example, in combination with the post-RA load/store pair fusion pass
in the following patch, this improves the codegen for the following
varargs testcase involving TImode stores:
Note that this patch isn't neeed if we only use the mode
canonicalization approach in the new ldp fusion pass (since we
canonicalize T{I,F,D}mode to V16QImode), but we seem to get slightly
better performance with mode canonicalization disabled (see
--param=aarch64-ldp-canonicalize-modes in the following patch).
gcc/ChangeLog:
* config/aarch64/aarch64.md (load_pair_dw_tftf): Rename to ...
(load_pair_dw_<TX:mode><TX2:mode>): ... this.
(store_pair_dw_tftf): Rename to ...
(store_pair_dw_<TX:mode><TX2:mode>): ... this.
* config/aarch64/iterators.md (TX2): New.
Alex Coplan [Wed, 11 Oct 2023 15:57:32 +0000 (15:57 +0000)]
aarch64, testsuite: Fix up pr71727.c
The test is trying to check that we don't use q-register stores with
-mstrict-align, so actually check specifically for that.
This is a prerequisite to avoid regressing:
scan-assembler-not "add\tx0, x0, :"
with the upcoming ldp fusion pass, as we change where the ldps are
formed such that a register is used rather than a symbolic (lo_sum)
address for the first load.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/pr71727.c: Adjust scan-assembler-not to
make sure we don't have q-register stores with -mstrict-align.
i.e. we now form an stp that we were missing previously. This patch
adjusts the scan-assembler such that it should pass whether or not
we form the stp.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/sve/pcs/args_9.c: Adjust scan-assemblers to
allow for stp.
Alex Coplan [Wed, 4 Oct 2023 12:32:36 +0000 (13:32 +0100)]
aarch64, testsuite: Prevent stp in lr_free_1.c
The test is looking for individual stores which are able to be merged
into stp instructions. The test currently passes -fno-schedule-fusion
-fno-peephole2, presumably to prevent these stores from being turned
into stps, but this is no longer sufficient with the new ldp/stp fusion
pass.
As such, we add --param=aarch64-stp-policy=never to prevent stps being
formed.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/lr_free_1.c: Add
--param=aarch64-stp-policy=never to dg-options.
Alex Coplan [Mon, 16 Oct 2023 14:14:40 +0000 (14:14 +0000)]
rtl-ssa: Support inferring uses of mem in change_insns
Currently, rtl_ssa::change_insns requires all new uses and defs to be
specified explicitly. This turns out to be rather inconvenient for
forming load pairs in the new aarch64 load pair pass, as the pass has to
determine which mem def the final load pair consumes, and then obtain or
create a suitable use (i.e. significant bookkeeping, just to keep the
RTL-SSA IR consistent). It turns out to be much more convenient to
allow change_insns to infer which def is consumed and create a suitable
use of mem itself. This patch does that.
gcc/ChangeLog:
* rtl-ssa/changes.cc (function_info::finalize_new_accesses): Add new
parameter to give final insn position, infer use of mem if it isn't
specified explicitly.
(function_info::change_insns): Pass down final insn position to
finalize_new_accesses.
* rtl-ssa/functions.h: Add parameter to finalize_new_accesses.
Alex Coplan [Thu, 17 Aug 2023 15:16:46 +0000 (16:16 +0100)]
rtl-ssa: Add entry point to allow re-parenting uses
This is needed by the upcoming aarch64 load pair pass, as it can
re-order stores (when alias analysis determines this is safe) and thus
change which mem def a given use consumes (in the RTL-SSA view, there is
no alias disambiguation of memory).
gcc/ChangeLog:
* rtl-ssa/accesses.cc (function_info::reparent_use): New.
* rtl-ssa/functions.h (function_info): Declare new member
function reparent_use.
Alex Coplan [Fri, 13 Oct 2023 16:13:16 +0000 (17:13 +0100)]
rtl-ssa: Fix bug in function_info::add_insn_after
In the case that !insn->is_debug_insn () && next->is_debug_insn (), this
function was missing an update of the prev pointer on the first nondebug
insn following the sequence of debug insns starting at next.
This can lead to corruption of the insn chain, in that we end up with:
insn->next_any_insn ()->prev_any_insn () != insn
in this case. This patch fixes that.
gcc/ChangeLog:
* rtl-ssa/insns.cc (function_info::add_insn_after): Ensure we
update the prev pointer on the following nondebug insn in the
case that !insn->is_debug_insn () && next->is_debug_insn ().
Haochen Jiang [Wed, 18 Oct 2023 07:17:19 +0000 (15:17 +0800)]
x86: Correct ISA enabled for clients since Arrow Lake
gcc/ChangeLog:
* config/i386/i386.h: Correct the ISA enabled for Arrow Lake.
Also make Clearwater Forest depends on Sierra Forest.
* config/i386/i386-options.cc: Revise the order of the macro
definition to avoid confusion.
* doc/extend.texi: Revise documentation.
* doc/invoke.texi: Correct documentation.
gcc/testsuite/ChangeLog:
* gcc.target/i386/funcspec-56.inc: Group Clearwater Forest
with atom cores.
Andrew Stubbs [Wed, 18 Oct 2023 15:59:42 +0000 (16:59 +0100)]
amdgcn: deprecate Fiji device and multilib
LLVM wants to remove it, which breaks our build. This patch means that
most users won't notice that change, when it comes, and those that do will
have chosen to enable Fiji explicitly.
I'm selecting gfx900 as the new default as that's the least likely for users
to want, which means most users will specify -march explicitly, which means
we'll be free to change the default again, when we need to, without breaking
anybody's makefiles.
gcc/ChangeLog:
* config.gcc (amdgcn): Switch default to --with-arch=gfx900.
Implement support for --with-multilib-list.
* config/gcn/t-gcn-hsa: Likewise.
* doc/install.texi: Likewise.
* doc/invoke.texi: Mark Fiji deprecated.
Jiahao Xu [Wed, 18 Oct 2023 09:43:39 +0000 (17:43 +0800)]
LoongArch:Implement the new vector cost model framework.
This patch make loongarch use the new vector hooks and implements the costing
function determine_suggested_unroll_factor, to make it be able to suggest the
unroll factor for a given loop being vectorized base vec_ops analysis during
vector costing and the available issue information. Referring to aarch64 and
rs6000 port.
The patch also reduces the cost of unaligned stores, making it equal to the
cost of aligned ones in order to avoid odd alignment peeling.
gcc/ChangeLog:
* config/loongarch/loongarch.cc (loongarch_vector_costs): Inherit from
vector_costs. Add a constructor.
(loongarch_vector_costs::add_stmt_cost): Use adjust_cost_for_freq to
adjust the cost for inner loops.
(loongarch_vector_costs::count_operations): New function.
(loongarch_vector_costs::determine_suggested_unroll_factor): Ditto.
(loongarch_vector_costs::finish_cost): Ditto.
(loongarch_builtin_vectorization_cost): Adjust.
* config/loongarch/loongarch.opt (loongarch-vect-unroll-limit): New parameter.
(loongarcg-vect-issue-info): Ditto.
(mmemvec-cost): Delete.
* config/loongarch/genopts/loongarch.opt.in
(loongarch-vect-unroll-limit): Ditto.
(loongarcg-vect-issue-info): Ditto.
(mmemvec-cost): Delete.
* doc/invoke.texi (loongarcg-vect-unroll-limit): Document new option.
Jiahao Xu [Wed, 18 Oct 2023 09:39:40 +0000 (17:39 +0800)]
LoongArch:Implement vec_widen standard names.
Add support for vec_widen lo/hi patterns. These do not directly
match on Loongarch lasx instructions but can be emulated with
even/odd + vector merge.
gcc/ChangeLog:
* config/loongarch/lasx.md
(vec_widen_<su>mult_even_v8si): New patterns.
(vec_widen_<su>add_hi_<mode>): Ditto.
(vec_widen_<su>add_lo_<mode>): Ditto.
(vec_widen_<su>sub_hi_<mode>): Ditto.
(vec_widen_<su>sub_lo_<mode>): Ditto.
(vec_widen_<su>mult_hi_<mode>): Ditto.
(vec_widen_<su>mult_lo_<mode>): Ditto.
* config/loongarch/loongarch.md (u_bool): New iterator.
* config/loongarch/loongarch-protos.h
(loongarch_expand_vec_widen_hilo): New prototype.
* config/loongarch/loongarch.cc
(loongarch_expand_vec_interleave): New function.
(loongarch_expand_vec_widen_hilo): New function.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vect-widen-add.c: New test.
* gcc.target/loongarch/vect-widen-mul.c: New test.
* gcc.target/loongarch/vect-widen-sub.c: New test.
* gcc.target/loongarch/avg-ceil-lasx.c: New test.
* gcc.target/loongarch/avg-ceil-lsx.c: New test.
* gcc.target/loongarch/avg-floor-lasx.c: New test.
* gcc.target/loongarch/avg-floor-lsx.c: New test.
* gcc.target/loongarch/sad-lasx.c: New test.
* gcc.target/loongarch/sad-lsx.c: New test.
Andrew Pinski [Wed, 18 Oct 2023 17:26:07 +0000 (10:26 -0700)]
Fix expansion of `(a & 2) != 1`
I had a thinko in r14-1600-ge60593f3881c72a96a3fa4844d73e8a2cd14f670
where we would remove the `& CST` part if we ended up not calling
expand_single_bit_test.
This fixes the problem by introducing a new variable that will be used
for calling expand_single_bit_test.
As afar as I know this can only show up when disabling optimization
passes as this above form would have been optimized away.
Committed as obvious after a bootstrap/test on x86_64-linux-gnu.
PR middle-end/111863
gcc/ChangeLog:
* expr.cc (do_store_flag): Don't over write arg0
when stripping off `& POW2`.
Andrew Pinski [Sat, 14 Oct 2023 20:40:05 +0000 (13:40 -0700)]
[c] Fix PR 101364: ICE after error due to diagnose_arglist_conflict not checking for error
When checking to see if we have a function declaration has a conflict due to
promotations, there is no test to see if the type was an error mark and then calls
c_type_promotes_to. c_type_promotes_to is not ready for error_mark and causes an
ICE.
This adds a check for error before the call of c_type_promotes_to.
OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.
PR c/101364
gcc/c/ChangeLog:
* c-decl.cc (diagnose_arglist_conflict): Test for
error mark before calling of c_type_promotes_to.
Andrew Pinski [Sat, 14 Oct 2023 20:18:00 +0000 (13:18 -0700)]
Fix ICE due to c_safe_arg_type_equiv_p not checking for error_mark node
This is a simple error recovery issue when c_safe_arg_type_equiv_p
was added in r8-5312-gc65e18d3331aa999. The issue is that after
an error, an argument type (of a function type) might turn
into an error mark node and c_safe_arg_type_equiv_p was not ready
for that. So this just adds a check for error operand for its
arguments before getting the main variant.
OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.
PR c/101285
gcc/c/ChangeLog:
* c-typeck.cc (c_safe_arg_type_equiv_p): Return true for error
operands early.
PR111648: Fix wrong code-gen due to incorrect VEC_PERM_EXPR folding.
gcc/ChangeLog:
PR tree-optimization/111648
* fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): If a1
chooses base element from arg, ensure that it's a natural stepped
sequence.
(build_vec_cst_rand): New param natural_stepped and use it to
construct a naturally stepped sequence.
(test_nunits_min_2): Add new unit tests Case 6 and Case 7.
Jakub Jelinek [Wed, 18 Oct 2023 15:01:26 +0000 (17:01 +0200)]
cse: Workaround GCC < 5 bug in cse_insn [PR111852]
Before the r5-3834 commit for PR63362, GCC 4.8-4.9 refuses to compile
cse.cc which contains a variable with rtx_def type, because rtx_def
contains a union with poly_uint16 element. poly_int template has
defaulted default constructor and a variadic template constructor which
could have empty parameter pack. GCC < 5 treated it as non-trivially
constructible class and deleted rtunion and rtx_def default constructors.
For the cse_insn purposes, all we need is a variable with size and alignment
of rtx_def, not necessarily rtx_def itself, which we then memset to 0 and
fill in like rtx is normally allocated from heap, so this patch for
GCC_VERSION < 5000 uses an unsigned char array of the right size/alignment.
2023-10-18 Jakub Jelinek <jakub@redhat.com>
PR bootstrap/111852
* cse.cc (cse_insn): Add workaround for GCC 4.8-4.9, instead of
using rtx_def type for memory_extend_buf, use unsigned char
arrayy with size of rtx_def and its alignment.
Jason Merrill [Tue, 16 May 2023 21:02:51 +0000 (17:02 -0400)]
diagnostic: add permerror variants with opt
In the discussion of promoting some pedwarns to be errors by default, rather
than move them all into -fpermissive it seems to me to make sense to support
DK_PERMERROR with an option flag. This way will also work with
-fpermissive, but users can also still use -Wno-error=narrowing to downgrade
that specific diagnostic rather than everything affected by -fpermissive.
So, for diagnostics that we want to make errors by default we can just
change the pedwarn call to permerror.
The tests check desired behavior for such a permerror in a system header
with various flags. The patch preserves the existing permerror behavior of
ignoring -w and system headers by default, but respecting them when
downgraded to a warning by -fpermissive.
This seems similar to but a bit better than the approach of forcing
-pedantic-errors that I previously used for -Wnarrowing: specifically, in
that now -w by itself is not enough to silence the -Wnarrowing
error (integer-pack2.C).
gcc/ChangeLog:
* doc/invoke.texi: Move -fpermissive to Warning Options.
* diagnostic.cc (update_effective_level_from_pragmas): Remove
redundant system header check.
(diagnostic_report_diagnostic): Move down syshdr/-w check.
(diagnostic_impl): Handle DK_PERMERROR with an option number.
(permerror): Add new overloads.
* diagnostic-core.h (permerror): Declare them.
gcc/cp/ChangeLog:
* typeck2.cc (check_narrowing): Use permerror.
gcc/testsuite/ChangeLog:
* g++.dg/ext/integer-pack2.C: Add -fpermissive.
* g++.dg/diagnostic/sys-narrow.h: New test.
* g++.dg/diagnostic/sys-narrow1.C: New test.
* g++.dg/diagnostic/sys-narrow1a.C: New test.
* g++.dg/diagnostic/sys-narrow1b.C: New test.
* g++.dg/diagnostic/sys-narrow1c.C: New test.
* g++.dg/diagnostic/sys-narrow1d.C: New test.
* g++.dg/diagnostic/sys-narrow1e.C: New test.
* g++.dg/diagnostic/sys-narrow1f.C: New test.
* g++.dg/diagnostic/sys-narrow1g.C: New test.
* g++.dg/diagnostic/sys-narrow1h.C: New test.
* g++.dg/diagnostic/sys-narrow1i.C: New test.
Jakub Jelinek [Wed, 18 Oct 2023 10:37:40 +0000 (12:37 +0200)]
tree-ssa-math-opts: Fix up match_uaddc_usubc [PR111845]
GCC ICEs on the first testcase. Successful match_uaddc_usubc ends up with
some dead stmts which DCE will remove (hopefully) later all.
The ICE is because one of the dead stmts refers to a freed SSA_NAME.
The code already gsi_removes a couple of stmts in the
/* Remove some statements which can't be kept in the IL because they
use SSA_NAME whose setter is going to be removed too. */
section for the same reason (the reason for the freed SSA_NAMEs is that
we don't really have a replacement for those cases - all we have after
a match is combined overflow from the addition/subtraction of 2 operands + a
[0, 1] carry in, but not the individual overflows from the former 2
additions), but for the last (most significant) limb case, where we try
to match x = op1 + op2 + carry1 + carry2; or
x = op1 - op2 - carry1 - carry2; we just gsi_replace the final stmt, but
left around the 2 temporary stmts as dead; if we were unlucky enough that
those referenced the carry flag that went away, it ICEs.
So, the following patch remembers those temporary statements (rather than
trying to rediscover them more expensively) and removes them before the
final one is replaced.
While working on it, I've noticed we didn't support all the reassociated
possibilities of writing the addition of 4 operands or subtracting 3
operands from one, we supported e.g.
x = ((op1 + op2) + op3) + op4;
x = op1 + ((op2 + op3) + op4);
but not
x = (op1 + (op2 + op3)) + op4;
x = op1 + (op2 + (op3 + op4));
Fixed by the change to inspect also rhs[2] when rhs[1] didn't yield what
we were searching for (if non-NULL) - rhs[0] is inspected in the first
loop and has different handling for the MINUS_EXPR case.
2023-10-18 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/111845
* tree-ssa-math-opts.cc (match_uaddc_usubc): Remember temporary
statements for the 4 operand addition or subtraction of 3 operands
from 1 operand cases and remove them when successful. Look for
nested additions even from rhs[2], not just rhs[1].
* gcc.dg/pr111845.c: New test.
* gcc.target/i386/pr111845.c: New test.
Iain Sandoe [Tue, 17 Oct 2023 10:10:27 +0000 (11:10 +0100)]
Darwin: Check as for .build_version support and use it if available.
This adds support for the minimum OS version data in assembler files.
At present, we have no mechanism to detect the SDK version in use, and
so that is omitted from build_versions.
We follow the implementation in clang, '.build_version' is only emitted
(where supported) for target macOS versions >= 10.14. For earlier macOS
we fall back to using a '.macosx_version_min' directive. This latter is
also emitted when the assembler supports it, but not build_version.
gcc/ChangeLog:
* config.in: Regenerate.
* config/darwin.cc (darwin_file_start): Add assembler directives
for the target OS version, where these are supported by the
assembler.
(darwin_override_options): Check for building >= macOS 10.14.
* configure: Regenerate.
* configure.ac: Check for assembler support of .build_version
directives.
Tamar Christina [Wed, 18 Oct 2023 08:49:36 +0000 (09:49 +0100)]
ifcvt: rewrite args handling to remove lookups
This refactors the code to remove the args cache and index lookups
in favor of a single structure. It also again, removes the use of
std::sort as previously requested but avoids the new asserts in
trunk.
Tamar Christina [Wed, 18 Oct 2023 08:34:01 +0000 (09:34 +0100)]
AArch64: Rewrite simd move immediate patterns to new syntax
This rewrites the simd MOV patterns to use the new compact syntax.
No change in semantics is expected. This will be needed in follow on patches.
This also merges the splits into the define_insn which will also be needed soon.
gcc/ChangeLog:
PR tree-optimization/109154
* config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
Rewrite to new syntax.
(*aarch64_simd_mov<VQMOV:mode): Rewrite to new syntax and merge in
splits.
Tamar Christina [Wed, 18 Oct 2023 08:33:30 +0000 (09:33 +0100)]
middle-end: ifcvt: Allow any const IFN in conditional blocks
When ifcvt was initially added masking was not a thing and as such it was
rather conservative in what it supported.
For builtins it only allowed C99 builtin functions which it knew it can fold
away.
These days the vectorizer is able to deal with needing to mask IFNs itself.
vectorizable_call is able vectorize the IFN by emitting a VEC_PERM_EXPR after
the operation to emulate the masking.
This is then used by match.pd to conver the IFN into a masked variant if it's
available.
For these reasons the restriction in ifconvert is no longer require and we
needless block vectorization when we can effectively handle the operations.
Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
Note: This patch is part of a testseries and tests for it are added in the
AArch64 patch that adds supports for the optab.
gcc/ChangeLog:
PR tree-optimization/109154
* tree-if-conv.cc (if_convertible_stmt_p): Allow any const IFN.
Tamar Christina [Wed, 18 Oct 2023 08:32:55 +0000 (09:32 +0100)]
middle-end: Fold vec_cond into conditional ternary or binary operation when sharing operand [PR109154]
When we have a vector conditional on a masked target which is doing a selection
on the result of a conditional operation where one of the operands of the
conditional operation is the other operand of the select, then we can fold the
vector conditional into the operation.
Concretely this transforms
c = mask1 ? (masked_op mask2 a b) : b
into
c = masked_op (mask1 & mask2) a b
The mask is then propagated upwards by the compiler. In the SVE case we don't
end up needing a mask AND here since `mask2` will end up in the instruction
creating `mask` which gives us a natural &.
Such transformations are more common now in GCC 13+ as PRE has not started
unsharing of common code in case it can make one branch fully independent.
e.g. in this case `b` becomes a loop invariant value after PRE.
This transformation removes the extra select for masked architectures but
doesn't fix the general case.
gcc/ChangeLog:
PR tree-optimization/109154
* match.pd: Add new cond_op rule.
gcc/testsuite/ChangeLog:
PR tree-optimization/109154
* gcc.target/aarch64/sve/pre_cond_share_1.c: New test.
Richard Biener [Wed, 18 Oct 2023 07:13:23 +0000 (09:13 +0200)]
Re-instantiate integer mask to traditional vector mask support
The following allows to pass integer mask data as traditional
vector mask for OMP SIMD clone calls which is required due to
the limited set of OMP SIMD clones in the x86 ABI when using
AVX512 but a prefered vector size of 256 bits.
* tree-vect-stmts.cc (vectorizable_simd_clone_call):
Relax check to again allow passing integer mode masks
as traditional vectors.
Tamar Christina [Wed, 18 Oct 2023 08:03:06 +0000 (09:03 +0100)]
middle-end: maintain LCSSA throughout loop peeling
This final patch updates peeling to maintain LCSSA all the way through.
It's significantly easier to maintain it during peeling while we still know
where all new edges connect rather than touching it up later as is currently
being done.
This allows us to remove many of the helper functions that touch up the loops
at various parts. The only complication is for loop distribution where we
should be able to use the same, however ldist depending on whether
redirect_lc_phi_defs is true or not will either try to maintain a limited LCSSA
form itself or removes are non-virtual phis.
The problem here is that if we maintain LCSSA then in some cases the blocks
connecting the two loops get PHIs to keep the loop IV up to date.
However there is no loop, the guard condition is rewritten as 0 != 0, to the
"loop" always exits. However due to the PHI nodes the probabilities get
completely wrong. It seems to think that the impossible exit is the likely
edge. This causes incorrect warnings and the presence of the PHIs prevent the
blocks to be simplified.
While it may be possible to make ldist work with LCSSA form, doing so seems more
work than not. For that reason the peeling code has an additional parameter
used by only ldist to not connect the two loops during peeling.
This preserves the current behaviour from ldist until I can dive into the
implementation more. Hopefully that's ok for now.
gcc/ChangeLog:
* tree-loop-distribution.cc (copy_loop_before): Request no LCSSA.
* tree-vect-loop-manip.cc (adjust_phi_and_debug_stmts): Add additional
asserts.
(slpeel_tree_duplicate_loop_to_edge_cfg): Keep LCSSA during peeling.
(find_guard_arg): Look value up through explicit edge and original defs.
(vect_do_peeling): Use it.
(slpeel_update_phi_nodes_for_guard2): Take explicit exit edge.
(slpeel_update_phi_nodes_for_lcssa, slpeel_update_phi_nodes_for_loops):
Remove.
* tree-vect-loop.cc (vect_create_epilog_for_reduction): Initialize phi.
* tree-vectorizer.h (slpeel_tree_duplicate_loop_to_edge_cfg): Add
optional param to turn off LCSSA mode.
Tamar Christina [Wed, 18 Oct 2023 08:02:40 +0000 (09:02 +0100)]
middle-end: updated niters analysis to handle multiple exits.
This second part updates niters analysis to be able to analyze any number of
exits. If we have multiple exits we determine the main exit by finding the
first counting IV.
The change allows the vectorizer to pass analysis for multiple loops, but we
later gracefully reject them. It does however allow us to test if the exit
handling is using the right exit everywhere.
Additionally since we analyze all exits, we now return all conditions for them
and determine which condition belongs to the main exit.
The main condition is needed because the vectorizer needs to ignore the main IV
condition during vectorization as it will replace it during codegen.
To track versioned loops we extend the contract between ifcvt and the vectorizer
to store the exit number in aux so that we can match it up again during peeling.
gcc/ChangeLog:
* tree-if-conv.cc (tree_if_conversion): Record exits in aux.
* tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Use
it.
* tree-vect-loop.cc (vect_get_loop_niters): Determine main exit.
(vec_init_loop_exit_info): Extend analysis when multiple exits.
(vect_analyze_loop_form): Record conds and determine main cond.
(vect_create_loop_vinfo): Extend bookkeeping of conds.
(vect_analyze_loop): Release conds.
* tree-vectorizer.h (LOOP_VINFO_LOOP_CONDS,
LOOP_VINFO_LOOP_IV_COND): New.
(struct vect_loop_form_info): Add conds, alt_loop_conds;
(struct loop_vec_info): Add conds, loop_iv_cond.
Tamar Christina [Wed, 18 Oct 2023 08:02:12 +0000 (09:02 +0100)]
middle-end: Refactor vectorizer loop conditionals and separate out IV to new variables
This is extracted out of the patch series to support early break vectorization
in order to simplify the review of that patch series.
The goal of this one is to separate out the refactoring from the new
functionality.
This first patch separates out the vectorizer's definition of an exit to their
own values inside loop_vinfo. During vectorization we can have three separate
copies for each loop: scalar, vectorized, epilogue. The scalar loop can also be
the versioned loop before peeling.
Because of this we track 3 different exits inside loop_vinfo corresponding to
each of these loops. Additionally each function that uses an exit, when not
obviously clear which exit is needed will now take the exit explicitly as an
argument.
This is because often times the callers switch the loops being passed around.
While the caller knows which loops it is, the callee does not.
For now the loop exits are simply initialized to same value as before determined
by single_exit (..).
No change in functionality is expected throughout this patch series.
gcc/ChangeLog:
* tree-loop-distribution.cc (copy_loop_before): Pass exit explicitly.
(loop_distribution::distribute_loop): Bail out of not single exit.
* tree-scalar-evolution.cc (get_loop_exit_condition): New.
* tree-scalar-evolution.h (get_loop_exit_condition): New.
* tree-vect-data-refs.cc (vect_enhance_data_refs_alignment): Pass exit
explicitly.
* tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors,
vect_set_loop_condition_partial_vectors_avx512,
vect_set_loop_condition_normal, vect_set_loop_condition): Explicitly
take exit.
(slpeel_tree_duplicate_loop_to_edge_cfg): Explicitly take exit and
return new peeled corresponding peeled exit.
(slpeel_can_duplicate_loop_p): Explicitly take exit.
(find_loop_location): Handle not knowing an explicit exit.
(vect_update_ivs_after_vectorizer, vect_gen_vector_loop_niters_mult_vf,
find_guard_arg, slpeel_update_phi_nodes_for_loops,
slpeel_update_phi_nodes_for_guard2): Use new exits.
(vect_do_peeling): Update bookkeeping to keep track of exits.
* tree-vect-loop.cc (vect_get_loop_niters): Explicitly take exit to
analyze.
(vec_init_loop_exit_info): New.
(_loop_vec_info::_loop_vec_info): Initialize vec_loop_iv,
vec_epilogue_loop_iv, scalar_loop_iv.
(vect_analyze_loop_form): Initialize exits.
(vect_create_loop_vinfo): Set main exit.
(vect_create_epilog_for_reduction, vectorizable_live_operation,
vect_transform_loop): Use it.
(scale_profile_for_vect_loop): Explicitly take exit to scale.
* tree-vectorizer.cc (set_uid_loop_bbs): Initialize loop exit.
* tree-vectorizer.h (LOOP_VINFO_IV_EXIT, LOOP_VINFO_EPILOGUE_IV_EXIT,
LOOP_VINFO_SCALAR_IV_EXIT): New.
(struct loop_vec_info): Add vec_loop_iv, vec_epilogue_loop_iv,
scalar_loop_iv.
(vect_set_loop_condition, slpeel_can_duplicate_loop_p,
slpeel_tree_duplicate_loop_to_edge_cfg): Take explicit exits.
(vec_init_loop_exit_info): New.
(struct vect_loop_form_info): Add loop_exit.
Tamar Christina [Wed, 18 Oct 2023 08:01:41 +0000 (09:01 +0100)]
middle-end: refactor vectorizable_comparison to make the main body re-usable.
Vectorization of a gcond starts off essentially the same as vectorizing a
comparison witht he only difference being how the operands are extracted.
This refactors vectorable_comparison such that we now have a generic function
that can be used from vectorizable_early_break. The refactoring splits the
gassign checks and actual validation/codegen off to a helper function.
No change in functionality expected.
gcc/ChangeLog:
* tree-vect-stmts.cc (vectorizable_comparison): Refactor, splitting body
to ...
(vectorizable_comparison_1): ...This.
Overal reduce 1 instruction which is vector load instruction which is much more expansive
than VL toggling.
Also, with this patch, we are using vrgather.vi which reduce 1 vector register consumption.
gcc/ChangeLog:
* config/riscv/riscv-v.cc (shuffle_consecutive_patterns): New function.
(expand_vec_perm_const_1): Add consecutive pattern recognition.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vls/def.h: Add new test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/consecutive-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/consecutive-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/consecutive_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/consecutive_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/consecutive-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/consecutive-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/consecutive-3.c: New test.
When we enable more currents in rvv.exp with dynamic LMUL, such issue can be
reproduced and has a PR: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111832
Now, we enable more tests in rvv.exp in this patch and fix the bug.
PR target/111832
gcc/ChangeLog:
* config/riscv/riscv-vector-costs.cc (get_biggest_mode): New function.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/rvv.exp: Enable more dynamic tests.
Now that the prologue and epilogue code iterates over saved
registers in offset order, we can put the LR save slot first
without compromising LDP/STP formation.
This isn't worthwhile when shadow call stacks are enabled, since the
first two registers are also push/pop candidates, and LR cannot be
popped when shadow call stacks are enabled. (LR is instead loaded
first and compared against the shadow stack's value.)
But otherwise, it seems better to put the LR save slot first,
to reduce unnecessary variation with the layout for stack clash
protection.
gcc/
* config/aarch64/aarch64.cc (aarch64_layout_frame): Don't make
the position of the LR save slot dependent on stack clash
protection unless shadow call stacks are enabled.
gcc/testsuite/
* gcc.target/aarch64/test_frame_2.c: Expect x30 to come before x19.
* gcc.target/aarch64/test_frame_4.c: Likewise.
* gcc.target/aarch64/test_frame_7.c: Likewise.
* gcc.target/aarch64/test_frame_10.c: Likewise.
aarch64_save/restore_callee_saves looped over registers in register
number order. This in turn meant that we could only use LDP and STP
for registers that were consecutive both number-wise and
offset-wise (after unsaved registers are excluded).
This patch instead builds lists of the registers that we've decided to
save, in offset order. We can then form LDP/STP pairs regardless of
register number order, which in turn means that we can put the LR save
slot first without losing LDP/STP opportunities.
gcc/
* config/aarch64/aarch64.h (aarch64_frame): Add vectors that
store the list saved GPRs, FPRs and predicate registers.
* config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize
the lists of saved registers. Use them to choose push candidates.
Invalidate pop candidates if we're not going to do a pop.
(aarch64_next_callee_save): Delete.
(aarch64_save_callee_saves): Take a list of registers,
rather than a range. Make !skip_wb select only write-back
candidates.
(aarch64_expand_prologue): Update calls accordingly.
(aarch64_restore_callee_saves): Take a list of registers,
rather than a range. Always skip pop candidates. Also skip
LR if shadow call stacks are enabled.
(aarch64_expand_epilogue): Update calls accordingly.
The prologue/epilogue pass allows the prologue sequence to contain
jumps. The sequence is then partitioned into basic blocks using
find_many_sub_basic_blocks.
This patch treats epilogues in a similar way. Since only one block
might need to be split, the patch (re)introduces a find_sub_basic_blocks
routine to handle a single block.
The new routine hard-codes the assumption that split_block will chain
the new block immediately after the original block. The routine doesn't
try to replicate the fix for PR81030, since that was specific to
gimple->rtl expansion.
The patch is needed for follow-on aarch64 patches that add conditional
code to the epilogue. The tests are part of those patches.
gcc/
* cfgbuild.h (find_sub_basic_blocks): Declare.
* cfgbuild.cc (update_profile_for_new_sub_basic_block): New function,
split out from...
(find_many_sub_basic_blocks): ...here.
(find_sub_basic_blocks): New function.
* function.cc (thread_prologue_and_epilogue_insns): Handle
epilogues that contain jumps.
Andrew Pinski [Fri, 1 Sep 2023 22:09:08 +0000 (22:09 +0000)]
ssa_name_has_boolean_range vs signed-boolean:31 types
This turns out to be a latent bug in ssa_name_has_boolean_range
where it would return true for all boolean types but all of the
uses of ssa_name_has_boolean_range was expecting 0/1 as the range
rather than [-1,0].
So when I fixed vector lower to do all comparisons in boolean_type
rather than still in the signed-boolean:31 type (to fix a different issue),
the pattern in match for `-(type)!A -> (type)A - 1.` would assume A (which
was signed-boolean:31) had a range of [0,1] which broke down and sometimes
gave us -1/-2 as values rather than what we were expecting of -1/0.
This was the simpliest patch I found while testing.
We have another way of matching [0,1] range which we could use instead
of ssa_name_has_boolean_range except that uses only the global ranges
rather than the local range (during VRP).
I tried to clean this up slightly by using gimple_match_zero_one_valuedp
inside ssa_name_has_boolean_range but that failed because due to using
only the global ranges. I then tried to change get_nonzero_bits to use
the local ranges at the optimization time but that failed also because
we would remove branches to __builtin_unreachable during evrp and lose
information as we don't set the global ranges during evrp.
OK? Bootstrapped and tested on x86_64-linux-gnu.
PR tree-optimization/110817
gcc/ChangeLog:
* tree-ssanames.cc (ssa_name_has_boolean_range): Remove the
check for boolean type as they don't have "[0,1]" range.
gcc/testsuite/ChangeLog:
* gcc.c-torture/execute/pr110817-1.c: New test.
* gcc.c-torture/execute/pr110817-2.c: New test.
* gcc.c-torture/execute/pr110817-3.c: New test.
Marek Polacek [Tue, 17 Oct 2023 20:11:11 +0000 (16:11 -0400)]
c++: accepts-invalid with =delete("") [PR111840]
r6-2367 added a DECL_INITIAL check to cp_parser_simple_declaration
so that we don't emit multiple errors in g++.dg/parse/error57.C.
But that means we don't diagnose
int f1() = delete("george_crumb");
anymore, because fn decls often have error_mark_node in their
DECL_INITIAL. (The code may be allowed one day via https://wg21.link/P2573R0.)
I was hoping I could use cp_parser_error_occurred but that would
regress error57.C.
PR c++/111840
gcc/cp/ChangeLog:
* parser.cc (cp_parser_simple_declaration): Do cp_parser_error
for FUNCTION_DECLs.
Marek Polacek [Thu, 12 Oct 2023 19:58:05 +0000 (15:58 -0400)]
c++: Fix compile-time-hog in cp_fold_immediate_r [PR111660]
My recent patch introducing cp_fold_immediate_r caused exponential
compile time with nested COND_EXPRs. The problem is that the COND_EXPR
case recursively walks the arms of a COND_EXPR, but after processing
both arms it doesn't end the walk; it proceeds to walk the
sub-expressions of the outermost COND_EXPR, triggering again walking
the arms of the nested COND_EXPR, and so on. This patch brings the
compile time down to about 0m0.030s.
The ff_fold_immediate flag is unused after this patch but since I'm
using it in the P2564 patch, I'm not removing it now. Maybe at_eof
can be used instead and then we can remove ff_fold_immediate.
Vineet Gupta [Tue, 17 Oct 2023 17:05:41 +0000 (10:05 -0700)]
RISC-V/testsuite/pr111466.c: update test and expected output
Update the test to potentially generate two SEXT.W instructions: one for
incoming function arg, other for function return.
But after commit 8eb9cdd14218
("expr: don't clear SUBREG_PROMOTED_VAR_P flag for a promoted subreg")
the test is not supposed to generate either of them so fix the expected
assembler output which was errorneously introduced by commit above.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/pr111466.c (foo2): Change return to unsigned
int as that will potentially generate two SEXT.W instructions.
dg-final: Change to scan-assembler-not SEXT.W.
Martin Uecker [Sat, 14 Oct 2023 07:09:07 +0000 (09:09 +0200)]
c: error for function with external and internal linkage [PR111708]
Declaring a function with both external and internal linkage
in the same TU is translation-time UB. Add an error for this
case as already done for objects.
PR c/111708
gcc/c/ChangeLog:
* c-decl.cc (grokdeclarator): Add error.
gcc/testsuite/ChangeLog:
* gcc.dg/pr111708-1.c: New test.
* gcc.dg/pr111708-2.c: New test.
Gaius Mulley [Tue, 17 Oct 2023 13:11:24 +0000 (14:11 +0100)]
PR modula2/111756: Re-building all-gcc after source changes fails to link
When having modula-2 enabled in a development tree and there are any
changes that trigger rebuilds in m2/ doing a 'make all-gcc' in the
build directory might fail due to lack of dependency tracking. This
patch introduces build dependencies into gcc/m2/Make-lang.in using -M*
options. The patch also introduces all -M* options to cc1gm2 and gm2.
gcc/m2/ChangeLog:
PR modula2/111756
* Make-lang.in (CM2DEP): New define conditionally set if
($(CXXDEPMODE),depmode=gcc3).
(GM2_1): Use $(CM2DEP).
(m2/gm2-gcc/%.o): Ensure $(@D)/$(DEPDIR) is created.
Add $(CM2DEP) to the $(COMPILER) command and use $(POSTCOMPILE).
(m2/gm2-gcc/m2configure.o): Ditto.
(m2/gm2-lang.o): Ditto.
(m2/m2pp.o): Ditto.
(m2/gm2-gcc/rtegraph.o): Ditto.
(m2/mc-boot/$(SRC_PREFIX)%.o): Ditto.
(m2/mc-boot-ch/$(SRC_PREFIX)%.o): Ditto.
(m2/mc-boot-ch/$(SRC_PREFIX)%.o): Ditto.
(m2/mc-boot/main.o): Ditto.
(mcflex.o): Ditto.
(m2/gm2-libs-boot/M2RTS.o): Ditto.
(m2/gm2-libs-boot/%.o): Ditto.
(m2/gm2-libs-boot/%.o): Ditto.
(m2/gm2-libs-boot/RTcodummy.o): Ditto.
(m2/gm2-libs-boot/RTintdummy.o): Ditto.
(m2/gm2-libs-boot/wrapc.o): Ditto.
(m2/gm2-libs-boot/UnixArgs.o): Ditto.
(m2/gm2-libs-boot/choosetemp.o): Ditto.
(m2/gm2-libs-boot/errno.o): Ditto.
(m2/gm2-libs-boot/dtoa.o): Ditto.
(m2/gm2-libs-boot/ldtoa.o): Ditto.
(m2/gm2-libs-boot/termios.o): Ditto.
(m2/gm2-libs-boot/SysExceptions.o): Ditto.
(m2/gm2-libs-boot/SysStorage.o): Ditto.
(m2/gm2-compiler-boot/M2GCCDeclare.o): Ditto.
(m2/gm2-compiler-boot/M2Error.o): Ditto.
(m2/gm2-compiler-boot/%.o): Ditto.
(m2/gm2-compiler-boot/%.o): Ditto.
(m2/gm2-compiler-boot/m2flex.o): Ditto.
(m2/gm2-compiler/%.o): Ditto.
(m2/gm2-compiler/m2flex.o): Ditto.
(m2/gm2-libs-iso/%.o): Ditto.
(m2/gm2-libs/%.o): Ditto.
(m2/gm2-libs/%.o): Ditto.
(m2/gm2-libs/choosetemp.o): Ditto.
(m2/boot-bin/mklink$(exeext)): Ditto.
(m2/pge-boot/%.o): Ditto.
(m2/pge-boot/%.o): Ditto.
(m2/gm2-compiler/%.o): Ensure $(@D)/$(DEPDIR) is created and use
$(POSTCOMPILE).
(m2/gm2-compiler/%.o): Ditto.
(m2/gm2-libs-iso/%.o): Ditto.
(m2/gm2-libs/%.o): Ditto.
* README: Purge out of date info.
* gm2-compiler/M2Comp.mod (MakeSaveTempsFileNameExt): Import.
(OnExitDelete): Import.
(GetModuleDefImportStatementList): Import.
(GetModuleModImportStatementList): Import.
(GetImportModule): Import.
(IsImportStatement): Import.
(IsImport): Import.
(GetImportStatementList): Import.
(File): Import.
(Close): Import.
(EOF): Import.
(IsNoError): Import.
(WriteLine): Import.
(WriteChar): Import.
(FlushOutErr): Import.
(WriteS): Import.
(OpenToRead): Import.
(OpenToWrite): Import.
(ReadS): Import.
(WriteS): Import.
(GetM): Import.
(GetMM): Import.
(GetDepTarget): Import.
(GetMF): Import.
(GetMP): Import.
(GetObj): Import.
(GetMD): Import.
(GetMMD): Import.
(GenerateDefDependency): New procedure.
(GenerateDependenciesFromImport): New procedure.
(GenerateDependenciesFromList): New procedure.
(GenerateDependencies): New procedure.
(Compile): Re-write.
(compile): Re-format.
(CreateFileStem): New procedure function.
(DoPass0): Re-write.
(IsLibrary): New procedure function.
(IsUnique): New procedure function.
(Append): New procedure.
(MergeDep): New procedure.
(GetRuleTarget): New procedure function.
(ReadDepContents): New procedure function.
(WriteDep): New procedure.
(WritePhonyDep): New procedure.
(WriteDepContents): New procedure.
(CreateDepFilename): New procedure function.
(Pass0CheckDef): New procedure function.
(Pass0CheckMod): New procedure function.
(DoPass0): Re-write.
(DepContent): New variable.
(DepOutput): New variable.
(BaseName): New procedure function.
* gm2-compiler/M2GCCDeclare.mod (PrintTerse): Handle IsImport.
Replace IsGnuAsmVolatile with IsGnuAsm.
* gm2-compiler/M2Options.def (EXPORT QUALIFIED): Remove list.
(SetM): New procedure.
(GetM): New procedure function.
(SetMM): New procedure.
(GetMM): New procedure function.
(SetMF): New procedure.
(GetMF): New procedure function.
(SetPPOnly): New procedure.
(GetB): New procedure function.
(SetMD): New procedure.
(GetMD): New procedure function.
(SetMMD): New procedure.
(GetMMD): New procedure function.
(SetMQ): New procedure.
(SetMT): New procedure.
(GetMT): New procedure function.
(GetDepTarget): New procedure function.
(SetMP): New procedure.
(GetMP): New procedure function.
(SetObj): New procedure.
(SetSaveTempsDir): New procedure.
* gm2-compiler/M2Options.mod (SetM): New procedure.
(GetM): New procedure function.
(SetMM): New procedure.
(GetMM): New procedure function.
(SetMF): New procedure.
(GetMF): New procedure function.
(SetPPOnly): New procedure.
(GetB): New procedure function.
(SetMD): New procedure.
(GetMD): New procedure function.
(SetMMD): New procedure.
(GetMMD): New procedure function.
(SetMQ): New procedure.
(SetMT): New procedure.
(GetMT): New procedure function.
(GetDepTarget): New procedure function.
(SetMP): New procedure.
(GetMP): New procedure function.
(SetObj): New procedure.
(SetSaveTempsDir): New procedure.
* gm2-compiler/M2Preprocess.def (PreprocessModule): New parameters
topSource and outputDep. Re-write.
(MakeSaveTempsFileNameExt): New procedure function.
(OnExitDelete): New procedure function.
* gm2-compiler/M2Preprocess.mod (GetM): Import.
(GetMM): Import.
(OnExitDelete): Add debugging message.
(RemoveFile): Add debugging message.
(BaseName): Remove.
(BuildCommandLineExecute): New procedure function.
* gm2-compiler/M2Search.def (SetDefExtension): Remove unnecessary
spacing.
* gm2-compiler/SymbolTable.mod (GetSymName): Handle ImportSym and
ImportStatementSym.
* gm2-gcc/m2options.h (M2Options_SetMD): New function.
(M2Options_GetMD): New function.
(M2Options_SetMMD): New function.
(M2Options_GetMMD): New function.
(M2Options_SetM): New function.
(M2Options_GetM): New function.
(M2Options_SetMM): New function.
(M2Options_GetMM): New function.
(M2Options_GetMQ): New function.
(M2Options_SetMF): New function.
(M2Options_GetMF): New function.
(M2Options_SetMT): New function.
(M2Options_SetMP): New function.
(M2Options_GetMP): New function.
(M2Options_GetDepTarget): New function.
* gm2-lang.cc (gm2_langhook_init): Correct comment case.
(gm2_langhook_init_options): Add case OPT_M and
OPT_MM.
(gm2_langhook_post_options): Add case OPT_MF, OPT_MT,
OPT_MD and OPT_MMD.
* lang-specs.h (M2CPP): Pass though MF option.
(MDMMD): New define. Add MDMMD to "@modula-2".
Richard Biener [Tue, 17 Oct 2023 11:42:59 +0000 (13:42 +0200)]
tree-optimization/111846 - put simd-clone-info into SLP tree
The following avoids bogously re-using the simd-clone-info we
currently hang off stmt_info from two different SLP contexts where
a different number of lanes should have chosen a different best
simdclone.
PR tree-optimization/111846
* tree-vectorizer.h (_slp_tree::simd_clone_info): Add.
(SLP_TREE_SIMD_CLONE_INFO): New.
* tree-vect-slp.cc (_slp_tree::_slp_tree): Initialize
SLP_TREE_SIMD_CLONE_INFO.
(_slp_tree::~_slp_tree): Release it.
* tree-vect-stmts.cc (vectorizable_simd_clone_call): Use
SLP_TREE_SIMD_CLONE_INFO or STMT_VINFO_SIMD_CLONE_INFO
dependent on if we're doing SLP.
Jakub Jelinek [Tue, 17 Oct 2023 12:25:00 +0000 (14:25 +0200)]
wide-int-print: Don't print large numbers hexadecimally for print_dec{,s,u}
The following patch implements printing of wide_int/widest_int numbers
decimally when asked for that using print_dec{,s,u}, even if they have
precision larger than 64 and get_len () above 1 (right now we printed
them hexadecimally and even negative numbers as huge positive hexadecimal).
In order to avoid the expensive division/modulo by 10^19 twice, once to
estimate how many will be needed and another to actually print it, the
patch prints the 19 digit chunks in reverse order (from least significant
to most significant) and then reorders those with linear complexity to form
the right printed number.
Tested with printing both 256 and 320 bit numbers (first as an example
of even number of 19 digit chunks plus one shorter above it, the second
as an example of odd number of 19 digit chunks plus one shorter above it).
The l * HOST_BITS_PER_WIDE_INT / 3 + 3 estimatition thinking about it now
is one byte too much (one byte for -, one for '\0') and too conservative,
so we could go with l * HOST_BITS_PER_WIDE_INT / 3 + 2 as well, or e.g.
l * HOST_BITS_PER_WIDE_INT * 10 / 33 + 3 as even less conservative
estimation (though more expensive to compute in inline code).
But that l * HOST_BITS_PER_WIDE_INT / 4 + 4; is likely one byte too much
as well, 2 bytes for 0x, one byte for '\0' and where does the 4th one come
from? Of course all of these assuming HOST_BITS_PER_WIDE_INT is a multiple
of 64...
2023-10-17 Jakub Jelinek <jakub@redhat.com>
* wide-int-print.h (print_dec_buf_size): For length, divide number
of bits by 3 and add 3 instead of division by 4 and adding 4.
* wide-int-print.cc (print_decs): Remove superfluous ()s. Don't call
print_hex, instead call print_decu on either negated value after
printing - or on wi itself.
(print_decu): Don't call print_hex, instead print even large numbers
decimally.
(pp_wide_int_large): Assume len from print_dec_buf_size is big enough
even if it returns false.
* pretty-print.h (pp_wide_int): Use print_dec_buf_size to check if
pp_wide_int_large should be used.
* tree-pretty-print.cc (dump_generic_node): Use print_hex_buf_size
to compute needed buffer size.
Georg-Johann Lay [Tue, 17 Oct 2023 09:36:52 +0000 (11:36 +0200)]
LibF7: Implement fma / fmal.
libgcc/config/avr/libf7/
* libf7.h (F7_SIZEOF): New macro.
* libf7-asm.sx: Use F7_SIZEOF instead of magic number "10".
(F7MOD_D_fma_, __fma): New module and function.
(fma) [-mdouble=64]: Define as alias for __fma.
(fmal) [-mlong-double=64]: Define as alias for __fma.
* libf7-common.mk (F7_ASM_PARTS): Add D_fma.
projects / thirdparty / gcc.git / log
