Michael Meissner [Wed, 18 May 2016 14:04:32 +0000 (14:04 +0000)]
re PR target/70915 (Improve loading 0/-1 in VSX registers on PowerPC)
[gcc]
2016-05-18 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/70915
* config/rs6000/constraints.md (wE constraint): New constraint
for a vector constant that can be loaded with XXSPLTIB.
(wM constraint): New constraint for a vector constant of a 1's.
(wS constraint): New constraint for a vector constant that can be
loaded with XXSPLTIB and a vector sign extend instruction.
* config/rs6000/predicates.md (xxspltib_constant_split): New
predicates for wE/wS constraints.
(xxspltib_constant_nosplit): Likewise.
(easy_vector_constant): Add support for constants that can be
loaded via XXSPLTIB.
(all_ones_constant): New predicate for vector constant with all
1's set.
(splat_input_operand): Add support for ISA 3.0 word splat
operations.
* config/rs6000/rs6000.c (xxspltib_constant_p): New function to
return if a constant can be loaded with the ISA 3.0 XXSPLTIB
instruction and possibly with a sign extension.
(output_vec_const_move): Add support for XXSPLTIB. If we are
loading up 0/-1 into Altivec registers, prefer using VSPLTISW
instead of XXLXOR/XXLORC.
(rs6000_expand_vector_init): Add support for ISA 3.0 word splat
operations.
(rs6000_legitimize_reload_address): Likewise.
(rs6000_output_move_128bit): Use output_vec_const_move to emit
constants.
* config/rs6000/vsx.md (VSX_M): Add TImode (if -mvsx-timode) and
combine VSX_M and VSX_M2 into one iterator.
(VSX_M2): Likewise.
(VSINT_84): New iterators for loading constants with XXSPLTIB.
(VSINT_842): Likewise.
(UNSPEC_VSX_SIGN_EXTEND): New UNSPEC.
(xxspltib_v16qi): New insns to load up constants with the ISA 3.0
XXSPLTIB instruction.
(xxspltib_<mode>_nosplit): Likewise.
(xxspltib_<mode>_split): New insn to load up constants with
XXSPLTIB and a sign extend instruction.
(vsx_mov<mode>): Replace single move that handled all vector types
with separate 32-bit and 64-bit moves. Combine the movti_<bit>
moves (when -mvsx-timode is in effect) into the main vector
moves. Eliminate separate moves for <VSr> <VSa>, where the
preferred register class (<VSr>) is listed first, and the
secondary register class (<VSa>) is listed second with a '?' to
discourage use. Prefer loading 0/-1 in any VSX register for ISA
3.0, and Altivec registers for ISA 2.06/2.07 (PR target/70915) so
that if the register was involved in a slow operation, the
clear/set operation does not wait for the slow operation to
finish. Adjust the length attributes for 32-bit mode. Use
rs6000_output_move_128bit and drop the use of the string
instructions for 32-bit movti when -mvsx-timode is in effect. Use
spacing so that the alternatives and attributes don't generate
long lines, and put things in columns, so that it is easier to
match up the operands and attributes with the insn alternatives.
(vsx_mov<mode>_64bit): Likewise.
(vsx_mov<mode>_32bit): Likewise.
(vsx_movti_64bit): Fold movti into normal vector moves.
(vsx_movti_32bit): Likewise.
(vsx_splat_<mode>, V4SI/V4SF modes): Add support for ISA 3.0 word
spat instructions.
(vsx_splat_v4si_internal): Likewise.
(vsx_splat_v4sf_internal): Likewise.
(vector fusion peepholes): Use VSX_M instead of VSX_M2.
(vsx_sign_extend_qi_<mode>): New ISA 3.0 instructions to sign
extend vector elements.
(vsx_sign_extend_hi_<mode>): Likewise.
(vsx_sign_extend_si_v2di): Likewise.
* config/rs6000/rs6000-protos.h (xxspltib_constant_p): Add
declaration.
* doc/md.texi (PowerPC constraints): Document the wE, wM, and wS
constraints. Add trailing period to wL documentation.
[gcc/testsuite]
2016-05-18 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/p9-splat-1.c: New tests for ISA 3.0 word
splat operations and the XXSPLTIB instruction.
* gcc.target/powerpc/p9-splat-2.c: Likewise.
* gcc.target/powerpc/p9-splat-3.c: Likewise.
* gcc.target/powerpc/pr47755.c: Allow vspltisw in addition to
xxlxor to clear a register.
To: gcc-patches@gcc.gnu.org
Subject: PR 71020: Handle abnormal PHIs in tree-call-cdce.c
From: Richard Sandiford <richard.sandiford@arm.com>
Gcc: private.sent
--text follows this line--
The PR is about a case where tree-call-cdce.c causes two abnormal
PHIs for the same variable to be live at the same time, leading to
a coalescing failure. It seemed like getting rid of these kinds of
input would be generally useful, so I added a utility to tree-dfa.c.
Tested on x86_64-linux-gnu.
gcc/
PR middle-end/71020
* tree-dfa.h (replace_abnormal_ssa_names): Declare.
* tree-dfa.c (replace_abnormal_ssa_names): New function.
* tree-call-cdce.c: Include tree-dfa.h.
(can_guard_call_p): New function, extracted from...
(can_use_internal_fn): ...here.
(shrink_wrap_one_built_in_call_with_conds): Remove failure path
and return void.
(shrink_wrap_one_built_in_call): Likewise.
(use_internal_fn): Likewise.
(shrink_wrap_conditional_dead_built_in_calls): Update accordingly
and return void. Call replace_abnormal_ssa_names.
(pass_call_cdce::execute): Check can_guard_call_p during the
initial walk. Assume shrink_wrap_conditional_dead_built_in_calls
will always change something.
gcc/testsuite/
* gcc.dg/torture/pr71020.c: New test.
Martin Jambor [Wed, 18 May 2016 13:04:23 +0000 (15:04 +0200)]
[PR 70646] Store size to inlining predicate conditions
2016-05-18 Martin Jambor <mjambor@suse.cz>
PR ipa/70646
* ipa-inline.h (condition): New field size.
* ipa-inline-analysis.c (add_condition): New parameter SIZE, use it
for comaprison and store it into the new condition.
(evaluate_conditions_for_known_args): Use condition size to check
access sizes for all but CHANGED conditions.
(unmodified_parm_1): New parameter size_p, store access size into it.
(unmodified_parm): Likewise.
(unmodified_parm_or_parm_agg_item): Likewise.
(eliminated_by_inlining_prob): Pass NULL to unmodified_parm as size_p.
(set_cond_stmt_execution_predicate): Extract access sizes and store
them to conditions.
(set_switch_stmt_execution_predicate): Likewise.
(will_be_nonconstant_expr_predicate): Likewise.
(will_be_nonconstant_predicate): Likewise.
(inline_read_section): Stream condition size.
(inline_write_summary): Likewise.
Christophe Lyon [Wed, 18 May 2016 12:33:36 +0000 (12:33 +0000)]
noplt_3.c: Scan for "br\t".
* gcc.target/aarch64/noplt_3.c: Scan for "br\t".
* gcc.target/aarch64/tail_indirect_call_1.c: Scan for "br\t",
"blr\t" and switch to scan-assembler-times.
function: Do the CLEANUP_EXPENSIVE after shrink-wrapping, not before
We should do CLEANUP_EXPENSIVE after shrink-wrapping, because shrink-
wrapping creates constructs that CLEANUP_EXPENSIVE can optimise, and
nothing runs CLEANUP_EXPENSIVE later.
* function.c (rest_of_handle_thread_prologue_and_epilogue): Call
cleanup_cfg with CLEANUP_EXPENSIVE after shrink-wrapping instead
of before. Add a comment.
Jakub Jelinek [Wed, 18 May 2016 09:24:59 +0000 (11:24 +0200)]
sse.md (pbroadcast_evex_isa): New mode attr.
* config/i386/sse.md (pbroadcast_evex_isa): New mode attr.
(avx2_pbroadcast<mode>): Add another alternative with v instead
of x constraints in it, using <pbroadcast_evex_isa> isa.
(avx2_pbroadcast<mode>_1): Similarly, add two such alternatives.
* gcc.target/i386/avx512bw-vpbroadcast-1.c: New test.
* gcc.target/i386/avx512bw-vpbroadcast-2.c: New test.
* gcc.target/i386/avx512bw-vpbroadcast-3.c: New test.
* gcc.target/i386/avx512vl-vpbroadcast-1.c: New test.
* gcc.target/i386/avx512vl-vpbroadcast-2.c: New test.
* gcc.target/i386/avx512vl-vpbroadcast-3.c: New test.
Kirill Yukhin [Wed, 18 May 2016 09:16:09 +0000 (09:16 +0000)]
i386. Extend static buffers. Fix SF mode operand constraint to `Yv' in storehpd pattern.
gcc/
* gcc/config/i386/sse.md (define_insn "*andnot<mode>3"): Extend static
array to 128 chars.
(define_insn "*andnottf3"): Ditto.
(define_insn "*<code><mode>3"/any_logic): Ditto.
(define_insn "*<code>tf3"/any_logic): Ditto.
(define_insn "sse2_storehpd"): Use Yv constraint for scalar
operand to block AVX-512VL insn variant emit when it is not enabled.
Jan Hubicka [Wed, 18 May 2016 07:12:46 +0000 (09:12 +0200)]
ipa-inline-transform.c (preserve_function_body_p): Look for first non-thunk clone.
* ipa-inline-transform.c (preserve_function_body_p): Look for
first non-thunk clone.
(save_function_body): Save into first non-thunk.
* lto-cgraph.c (lto_output_edge): When streaming thunk do not look
up call stmt id.
(lto_output_node): Inline thunks don't need body in every
partition.
* lto-streamer-in.c: Do not fixup thunk clones.
* cgraphclones.c (cgraph_node::create_edge_including_clone): Skip
thunks.
* tree-inline.c (copy_bb): Be prepared for target node to be new after
folding suceeds.
David Malcolm [Tue, 17 May 2016 19:28:47 +0000 (19:28 +0000)]
jit: gcc diagnostics are jit errors
libgccjit performs numerous checks at the API boundary, but
if these succeed, it ignores errors and other diagnostics emitted
within the core of gcc, and treats the compile of a gcc_jit_context
as having succeeded.
This patch ensures that if any diagnostics are emitted, they
are visible from the libgccjit API, and that the the context is
flagged as having failed.
For now any kind of diagnostic is treated as a jit error,
so warnings and notes also count as errors.
gcc/jit/ChangeLog:
* dummy-frontend.c: Include diagnostic.h.
(jit_begin_diagnostic): New function.
(jit_end_diagnostic): New function.
(jit_langhook_init): Register jit_begin_diagnostic
and jit_end_diagnostic with the global_dc.
* jit-playback.c: Include diagnostic.h.
(gcc::jit::playback::context::add_diagnostic): New method.
* jit-playback.h (struct diagnostic_context): Add forward
declaration.
(gcc::jit::playback::context::add_diagnostic): New method.
gcc/testsuite/ChangeLog:
* jit.dg/test-error-array-bounds.c: New test case.
Jim Wilson [Tue, 17 May 2016 18:50:22 +0000 (18:50 +0000)]
Fix minor doc bugs, signalling typo, major version changes rare.
gcc/
* doc/cpp.texi (__GNUC__): Major version changes are no longer rare.
* doc/invoke.texi (-mnan=2008): Change signalling to signaling.
* doc/md.texi (fmin@var{m}3): Likewise.
Marc Glisse [Tue, 17 May 2016 17:50:55 +0000 (19:50 +0200)]
VRP: range info of new variables
2016-05-17 Marc Glisse <marc.glisse@inria.fr>
gcc/
* tree-vrp.c (simplify_truth_ops_using_ranges): Set range
information for new SSA_NAME.
(simplify_conversion_using_ranges): Get range through get_range_info
instead of get_value_range.
gcc/testsuite/
* gcc.dg/tree-ssa/pr69270.c: Adjust.
* gcc.dg/tree-ssa/vrp99.c: New testcase.
Richard Biener [Tue, 17 May 2016 12:53:30 +0000 (12:53 +0000)]
re PR tree-optimization/71132 (gcc ICE at -O3 on valid code on x86_64-linux-gnu with “seg fault”)
2016-05-17 Richard Biener <rguenther@suse.de>
PR tree-optimization/71132
* tree-loop-distribution.c (create_rdg_cd_edges): Pass in loop.
Only add control dependences for blocks in the loop.
(build_rdg): Adjust.
(generate_code_for_partition): Return whether loop should
be destroyed and delay that.
(distribute_loop): Likewise.
(pass_loop_distribution::execute): Record loops to be destroyed
and perform delayed destroying of loops.
libgomp/
* oacc-init.c (acc_init): Remove !cached_base_dev condition on call
to gomp_init_targets_once.
(acc_set_device_type): Remove !cached_base_dev condition on call to
gomp_init_targets_once, move call to before acc_device_lock acquire,
to avoid deadlock.
(acc_get_device_num): Remove !cached_base_dev condition on call to
gomp_init_targets_once.
(acc_set_device_num): Likewise.
Wilco Dijkstra [Mon, 16 May 2016 12:52:22 +0000 (12:52 +0000)]
Some patterns are using '%w2' for immediate operands...
Some patterns are using '%w2' for immediate operands, which means that a zero
immediate is actually emitted as 'wzr' or 'xzr'. This not only changes an
immediate operand into a register operand but may emit illegal instructions
from legal RTL (eg. ORR x0, SP, xzr rather than ORR x0, SP, 0).
* config/aarch64/aarch64.md
(add<mode>3_compareC_cconly_imm): Remove use of %w.
(add<mode>3_compareC_imm): Likewise.
(<optab>si3_uxtw): Split into register and immediate variants.
(andsi3_compare0_uxtw): Likewise.
(and<mode>3_compare0): Likewise.
(and<mode>3nr_compare0): Likewise.
(stack_protect_test_<mode>): Don't use %x for memory operands.
Eric Botcazou [Mon, 16 May 2016 11:16:42 +0000 (11:16 +0000)]
freeze.adb (Freeze_Array_Type): Call Addressable predicate instead of testing for individual sizes.
* freeze.adb (Freeze_Array_Type): Call Addressable predicate instead
of testing for individual sizes.
(Freeze_Entity): Rework implementation of pragma Implicit_Packing for
array types, in particular test for suitable sizes upfront and do not
mimic the processing that will be redone later in Freeze_Array_Type.
Eric Botcazou [Mon, 16 May 2016 11:08:53 +0000 (11:08 +0000)]
* doc/gnat_rm/implementation_defined_attributes.rst
(Scalar_Storage_Order): Adjust restriction for packed array types.
* einfo.ads (Is_Bit_Packed_Array): Adjust description.
(Is_Packed): Likewise.
(Is_Packed_Array_Impl_Type): Likewise.
(Packed_Array_Impl_Type): Likewise.
* exp_ch4.adb (Expand_N_Indexed_Component): Do not do anything special
if the prefix is not a packed array implemented specially.
* exp_ch6.adb (Expand_Actuals): Expand indexed components only for
bit-packed array types.
* exp_pakd.adb (Install_PAT): Set Is_Packed_Array_Impl_Type flag on
the PAT before analyzing its declaration.
(Create_Packed_Array_Impl_Type): Remove redundant statements.
* freeze.adb (Check_Component_Storage_Order): Reject packed array
components only if they are bit packed.
(Freeze_Array_Type): Fix logic detecting bit packing and do not bit
pack for composite types whose size is multiple of a byte.
Create the implementation type for packed array types only when it is
needed, i.e. bit packing or packing because of holes in index types.
Make sure the Has_Non_Standard_Rep and Is_Packed flags agree.
* gcc-interface/gigi.h (make_packable_type): Add MAX_ALIGN parameter.
* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Signed_Integer_Subtype>:
Call maybe_pad_type instead of building the padding type manually.
(gnat_to_gnu_entity) <E_Array_Subtype>: Do not assert that
Packed_Array_Impl_Type is present for packed arrays.
(gnat_to_gnu_component_type): Also handle known alignment for packed
types by passing it to make_packable_type.
* gcc-interface/utils.c (make_packable_type): Add MAX_ALIGN parameter
and deal with it in the array case. Adjust recursive call. Simplify
computation of new size and cap the alignment to BIGGEST_ALIGNMENT.
Wilco Dijkstra [Mon, 16 May 2016 11:01:36 +0000 (11:01 +0000)]
This patch fixes the attributes of integer immediate shifts which were...
This patch fixes the attributes of integer immediate shifts which were
incorrectly modelled as register controlled shifts. Also change EXTR
attribute to being a rotate.
* gcc/config/aarch64/aarch64.md (aarch64_ashl_sisd_or_int_<mode>3):
Split integer shifts into shift_reg and bfm.
(aarch64_lshr_sisd_or_int_<mode>3): Likewise.
(aarch64_ashr_sisd_or_int_<mode>3): Likewise.
(ror<mode>3_insn): Likewise.
(<optab>si3_insn_uxtw): Likewise.
(<optab><mode>3_insn): Change to rotate_imm.
(extr<mode>5_insn_alt): Likewise.
(extrsi5_insn_uxtw): Likewise.
(extrsi5_insn_uxtw_alt): Likewise.
Matthew Wahab [Mon, 16 May 2016 10:22:25 +0000 (10:22 +0000)]
Remove TARGET_INVALID_PARAMETER_TYPE and TARGET_INVALID_RETURN_TYPE hooks.
c/
2016-05-16 Matthew Wahab <matthew.wahab@arm.com>
* c-decl.c (grokdeclarator): Remove errmsg and use of
targetm.invalid_return_type.
(grokparms): Remove errmsg and use of
targetm.invalid_parameter_type.
cp/
2016-05-16 Matthew Wahab <matthew.wahab@arm.com>
* decl.c (grokdeclarator): Remove errmsg and use of
targetm.invalid_return_type.
(grokparms): Remove errmsg and use of
targetm.invalid_parameter_type.
gcc/
2016-05-16 Matthew Wahab <matthew.wahab@arm.com>
Eric Botcazou [Mon, 16 May 2016 10:14:19 +0000 (10:14 +0000)]
exp_util.adb (Remove_Side_Effects): Also make a constant if we need to capture the value for a small not...
* exp_util.adb (Remove_Side_Effects): Also make a constant if we need
to capture the value for a small not by-reference record type.
* freeze.ads (Check_Compile_Time_Size): Adjust comment.
* freeze.adb (Set_Small_Size): Likewise. Accept a size in the range
of 33 .. 64 bits.
(Check_Compile_Time_Size): Merge scalar and access type cases. Change
variable name in array type case. For the computation of the packed
size, deal with record components and remove redundant test.
(Freeze_Array_Type): Also adjust packing status when the size of the
component type is in the range 33 .. 64 bits.
* doc/gnat_rm/representation_clauses_and_pragmas.rst: Turn primitive
into elementary type throughout. Minor tweaks.
(Alignment Clauses): Document actual alignment of packed array types.
(Pragma Pack for Arrays): List only the 3 main cases and adjust. Add
"simple" to the record case. Document effect on non packable types.
(Pragma Pack for Records): Likewise. Add record case and adjust.
Jan Hubicka [Mon, 16 May 2016 10:10:28 +0000 (12:10 +0200)]
ipa-inline-analysis.c (compute_inline_parameters): Be more reailistic on estimating thunk bodies...
* ipa-inline-analysis.c (compute_inline_parameters): Be more reailistic
on estimating thunk bodies; do not set inline_failed to CIF_THUNK for
calls from thunk.
* ipa-inline-transform.c (inline_call): When inlining into thunk produce
gimple body.
(preserve_function_body_p): No need to preserve function body
* cif-codes.def (CIF_THUNK): Remove.
* cgraphclones.c (duplicate_thunk_for_node): Thunks calls are inlinable.
* g++.dg/ipa/ivinline-7.C: Do not xfail.
* g++.dg/ipa/ivinline-9.C: Do not xfail.
Eric Botcazou [Mon, 16 May 2016 08:55:12 +0000 (08:55 +0000)]
configure.ac: Add ACX_NONCANONICAL_HOST.
gnattools/
* configure.ac: Add ACX_NONCANONICAL_HOST.
* configure: Regenerate.
* Makefile.in: Replace host_alias with host_noncanonical.
(gnattools-cross): Do not rename the tools.
gcc/
* configure.ac: Add ACX_NONCANONICAL_HOST.
* configure: Regenerate.
* Makefile.in: Set host_noncanonical.
gcc/ada
* gcc-interface/Make-lang.in (GNATMAKE_FOR_HOST): In the canadian
cross case, use host_noncanonical instead of host as prefix.
(GNATBIND_FOR_HOST): Likewise.
(GNATLINK_FOR_HOST): Likewise.
(GNATLS_FOR_HOST): Likewise.
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