]> git.ipfire.org Git - thirdparty/gcc.git/log
thirdparty/gcc.git
2 weeks ago[RISC-V] Restrict generic-vector-ooo DFA
Jeff Law [Tue, 22 Jul 2025 13:26:57 +0000 (07:26 -0600)] 
[RISC-V] Restrict generic-vector-ooo DFA

So while debugging Austin's work to support the spacemit x60 in the BPI we
found that even though his pipeline description had mappings for all the vector
instructions, they were still getting matched by the generic-vector-ooo DFA.

The core problem is that DFA never restricted itself to a tune option (oops).
That's easily fixed, at which time everything using generic blows up because we
don't have a generic in-order vector DFA. Everything using generic was
indirectly also using generic-vector-ooo for the vector instructions.

It may be better long term to define a generic-vector DFA, but to preserve
behavior, I'm letting generic-vector-ooo match when the generic DFA is active.

Tested in my tester, waiting on pre-commit CI before moving forward.

gcc/
* config/riscv/generic-vector-ooo.md: Restrict insn reservations to
generic_ooo and generic tuning models.

2 weeks agotree-optimization/121202 - fix vector stmt placement
Richard Biener [Tue, 22 Jul 2025 11:02:03 +0000 (13:02 +0200)] 
tree-optimization/121202 - fix vector stmt placement

When we have a vector shift with a scalar the shift operand can be
external - in that case we should not use the shift operand def
as hint where to place the vector shift instruction.  The ICE
in the PR is because stmt dominance queries only work inside of
the vector region.  But we should also never place stmts outside
of it.

PR tree-optimization/121202
* tree-vect-slp.cc (vect_schedule_slp_node): Do not take
an out-of-region stmt as "last".

* gcc.dg/pr121202.c: New testcase.

2 weeks agogenpreds.cc: Do not use rawmemchr for insn_constraint_len
Stefan Schulze Frielinghaus [Tue, 22 Jul 2025 09:26:44 +0000 (11:26 +0200)] 
genpreds.cc: Do not use rawmemchr for insn_constraint_len

The GNU extension rawmemchr cannot be used.  Therefore, replace it by a
simple loop.

gcc/ChangeLog:

* genpreds.cc (write_insn_constraint_len): Replace rawmemchr by
a loop.

2 weeks agoada: Nested use_type_clause with "all" cancels use_type_clause with wider scope
Gary Dismukes [Fri, 11 Jul 2025 23:30:18 +0000 (23:30 +0000)] 
ada: Nested use_type_clause with "all" cancels use_type_clause with wider scope

The compiler mishandles nested use_type_clauses in the case where the
outer one is a normal use_type_clause and the inner one has "all".
Upon leaving the scope of the inner use_type_clause, the outer one
is effectively disabled, because it's not considered redundant (and
in fact it's only partially redundant). This is fixed by testing for
the presence of a use_type_clause for the same type that has a wider
scope when ending the inner use_type_clause.

gcc/ada/ChangeLog:

* sem_ch8.adb (End_Use_Type): Add a test for there not being an earlier
use_type_clause for the same type as an additional criterion for turning
off In_Use and Current_Use_Clause.

2 weeks agoada: Only fold array attributes in SPARK when prefix is safe to evaluate
Piotr Trojanek [Thu, 10 Jul 2025 10:35:47 +0000 (12:35 +0200)] 
ada: Only fold array attributes in SPARK when prefix is safe to evaluate

Fix missing checks for prefixes of array attributes in GNATprove mode.

gcc/ada/ChangeLog:

* sem_attr.adb (Eval_Attribute): Only fold array attributes when prefix
is static or at least safe to evaluate

2 weeks agoada: Fix minor issues in comments
Ronan Desplanques [Fri, 11 Jul 2025 07:05:57 +0000 (09:05 +0200)] 
ada: Fix minor issues in comments

gcc/ada/ChangeLog:

* einfo.ads (Is_Controlled_Active): Fix pasto in comment.
* sem_util.ads (Propagate_Controlled_Flags): Update comment for
Destructor aspect.

2 weeks agoada: Add destructors extension
Ronan Desplanques [Wed, 9 Jul 2025 10:59:08 +0000 (12:59 +0200)] 
ada: Add destructors extension

This patch adds a GNAT-specific extension which enables "destructors".
Destructors are an optional replacement for Ada.Finalization where some
aspects of the interaction with type derivation are different.

gcc/ada/ChangeLog:

* doc/gnat_rm/gnat_language_extensions.rst: Document new extension.
* snames.ads-tmpl: Add name for new aspect.
* gen_il-fields.ads (Has_Destructor, Is_Destructor): Add new fields.
* gen_il-gen-gen_entities.adb (E_Procedure, Type_Kind): Add new fields.
* einfo.ads (Has_Destructor, Is_Destructor): Document new fields.
* aspects.ads: Add new aspect.
* sem_ch13.adb (Analyze_Aspect_Specifications,
Check_Aspect_At_Freeze_Point, Check_Aspect_At_End_Of_Declarations):
Add semantic analysis for new aspect.
(Resolve_Finalization_Procedure): New function.
(Resolve_Finalizable_Argument): Use new function above.
* sem_util.adb (Propagate_Controlled_Flags): Extend for new field.
* freeze.adb (Freeze_Entity): Add legality check for new aspect.
* exp_ch3.adb (Expand_Freeze_Record_Type, Predefined_Primitive_Bodies):
Use new field.
* exp_ch7.adb (Build_Finalize_Statements): Add expansion for
destructors.
(Make_Final_Call, Build_Record_Deep_Procs): Adapt to new Has_Destructor
field.
(Build_Adjust_Statements): Tweak to handle cases of empty lists.
* gnat_rm.texi: Regenerate.

2 weeks agoada: Fix crash when creating extra formals for aliased types
Denis Mazzucato [Wed, 9 Jul 2025 10:03:53 +0000 (12:03 +0200)] 
ada: Fix crash when creating extra formals for aliased types

This patch makes sure that we return the same decision for all aliased
types when checking if the BIP task extra actuals are needed.

gcc/ada/ChangeLog:

* sem_ch6.adb (Might_Need_BIP_Task_Actuals): Before retrieving the original corresponding
operation we retrieve first the root of the aliased chain.

2 weeks agoada: Fix generation of Initialize and Adjust calls
Ronan Desplanques [Wed, 9 Jul 2025 08:19:00 +0000 (10:19 +0200)] 
ada: Fix generation of Initialize and Adjust calls

Before this patch, Make_Init_Call and Make_Adjust_Call made the
assumption that if the type they were called with was untagged and a
derived type, it was the untagged private view of a tagged type. That
assumption made it possible to inspect the root type's primitives to
handle the case where the underlying type was implicitly generated by
the compiler without all inherited primitives.

The introduction of the Finalizable aspect broke that assumption, so
this patch adds a new field to type entities that make the generated
full view stand out, and updates Make_Init_Call and Make_Adjust_Call to
only jump to the root type when they're passed one of those generated
types.

Make_Final_Call and Finalize_Address are two other subprograms that
perform the same test on the types they're passed. They did not suffer
from the same bug as Make_Init_Call and Make_Adjust_Call because of an
earlier, more ad hoc fix, but this patch switches them over to the newly
introduced mechanism for the sake of consistency.

gcc/ada/ChangeLog:

* gen_il-fields.ads (Is_Implicit_Full_View): New field.
* gen_il-gen-gen_entities.adb (Type_Kind): Use new field.
* einfo.ads (Is_Implicit_Full_View): Document new field.
* exp_ch7.adb (Make_Adjust_Call, Make_Init_Call, Make_Final_Call): Use
new field.
* exp_util.adb (Finalize_Address): Likewise.
* sem_ch3.adb (Copy_And_Build): Set new field.

2 weeks agoada: Remove obsolete code from Safe_Unchecked_Type_Conversion
Eric Botcazou [Tue, 8 Jul 2025 19:40:44 +0000 (21:40 +0200)] 
ada: Remove obsolete code from Safe_Unchecked_Type_Conversion

That's a kludge added to work around the limitations of the stack checking
mechanism used in the early days.

gcc/ada/ChangeLog:

* exp_util.ads (May_Generate_Large_Temp): Delete.
* exp_util.adb (May_Generate_Large_Temp): Likewise.
(Safe_Unchecked_Type_Conversion): Do not take stack checking into
account to compute the result.

2 weeks agoada: Wrong dispatch on result in presence of dependent expression
Javier Miranda [Mon, 12 May 2025 18:46:11 +0000 (18:46 +0000)] 
ada: Wrong dispatch on result in presence of dependent expression

The compiler generates wrong code in a dispatching call on result
when the call is performed under dependent conditional expressions
or case-expressions.

gcc/ada/ChangeLog:

* sinfo.ads (Is_Expanded_Dispatching_Call): New flag.
(Tag_Propagated): New flag.
* exp_ch6.adb (Expand_Call_Helper): Propagate the tag when
the dispatching call is placed in conditionl expressions or
case-expressions.
* sem_ch5.adb (Analyze_Assignment): For assignment of tag-
indeterminate expression, do not propagate the tag if
previously done.
* sem_disp.adb (Is_Tag_Indeterminate): Add missing support
for conditional expression and case expression.
* exp_disp.ads (Is_Expanded_Dispatching_Call): Removed. Function
replaced by a new flag in the nodes.
* exp_disp.adb (Expand_Dispatching_Call): Set a flag in the
call node to remember that the call has been expanded.
(Is_Expanded_Dispatching_Call): Function removed.
* gen_il-fields.ads (Tag_Propagated): New flag.
(Is_Expanded_Dispatching_Call): New flag.
* gen_il-gen-gen_nodes.adb (Tag_Propagated): New flag.
(Is_Expanded_Dispatching_Call): New flag.

2 weeks agoada: Additional condition for Capacity discriminant on bounded container aggregates
Gary Dismukes [Mon, 7 Jul 2025 20:59:18 +0000 (20:59 +0000)] 
ada: Additional condition for Capacity discriminant on bounded container aggregates

This change test an additional condition as part of the criteria used
for deciding whether to generate a call to a container type's Length
function (for passing to the Empty function) when determining the
size of the object to allocate for a bounded container aggregate
with a "for of" iterator.

An update is also made to function Empty in Ada.Containers.Bounded_Hash_Maps,
adding a default to the formal Capacity, to make it consistent with other
bounded containers (and to make it conformant with the Ada RM).

gcc/ada/ChangeLog:

* libgnat/a-cbhama.ads (Empty): Add missing default to Capacity formal.
* libgnat/a-cbhama.adb (Empty): Add missing default to Capacity formal.
* exp_aggr.adb (Build_Size_Expr): Test for presence of Capacity
discriminant as additional criterion for generating the call to
the Length function. Update comments.

2 weeks agoada: Fix assertion failure on aggregate with controlled component
Eric Botcazou [Tue, 8 Jul 2025 09:05:19 +0000 (11:05 +0200)] 
ada: Fix assertion failure on aggregate with controlled component

The assertion is:

      pragma Assert (Side_Effect_Free (L));

in Make_Tag_Ctrl_Assignment and demonstrates that the sequence:

  Remove_Side_Effects (L);
  pragma Assert (Side_Effect_Free (L));

does not hold in this case.

What happens is that Remove_Side_Effects uses a renaming to remove the side
effects of L but, at the end, the renamed object is substituted back for the
renamed object in the node by Expand_Renaming, which is invoked because the
Is_Renaming_Of_Object flag is set on the renaming after Evaluate_Name has
been invoked on its Name.

This is a general discrepancy between Evaluate_Name and Side_Effect_Free of
Exp_Util, coming from the call to Safe_Unchecked_Type_Conversion present in
Side_Effect_Free in this case.  The long term goal is probably to remove the
call but, in the meantime, this change is sufficient to fix the failure.

gcc/ada/ChangeLog:

* exp_util.adb (Safe_Unchecked_Type_Conversion): Always return True
if the expression is the prefix of an N_Selected_Component.

2 weeks agoada: Fix unnecessary extra RE_Activation_Chain_Access with No_Task_Parts
Denis Mazzucato [Mon, 7 Jul 2025 09:11:08 +0000 (11:11 +0200)] 
ada: Fix unnecessary extra RE_Activation_Chain_Access with No_Task_Parts

This patch checks the presence of No_Task_Parts on any ancestor or
inherited interface, not only its root type, since No_Task_Parts
prohibits tasking for any of its descendant. In case the current
subprogram is overridden/inherited, we need to return the same value
we would return for the original corresponding operation. The aspect
No_Task_Parts is nonoverridable and applies also when specified in a
partial view.

gcc/ada/ChangeLog:

* sem_ch6.adb (Might_Need_BIP_Task_Actuals): Check whether No_Task_Parts is enabled in any
of the derived types, or interfaces, from the user-defined primitive return type.
* sem_ch13.adb (Analyze_Aspect_Specifications): Add No_Task_Parts and No_Controlled_Parts to
the representation chain to be visible in the full view of private types.
* aspects.ads (Nonoverridable_Aspect_Id): As per GNAT RM, No_Task_Parts is nonoverridable.
* sem_util.adb (Check_Inherited_Nonoverridable_Aspects): Likewise.
* sem_util.ads: Fix typo and style.
* sem_disp.adb: Missing comment.

2 weeks agoada: Adding support to defer the addition of extra formals
Javier Miranda [Wed, 2 Jul 2025 19:22:33 +0000 (19:22 +0000)] 
ada: Adding support to defer the addition of extra formals

Add support to create the extra formals when the underlying type
of some formal type or return type of a subprogram, subprogram type
or entry is not available when the entity is frozen. For example,
when a function that returns a private type is frozen before the
full-view of its private type is analyzed.

gcc/ada/ChangeLog:

* einfo.ads (Extra_Formals): Complete documentation.
(Has_First_Controlling_Parameter_Aspect): Place it in alphabetical order.
(Has_Frozen_Extra_Formals): New attribute.
* gen_il-fields.ads (Has_Frozen_Extra_Formals): New entity field.
* gen_il-gen-gen_entities.adb (Has_Frozen_Extra_Formals): Adding new
entity flag to subprograms, subprogram types, and and entries.
* gen_il-internals.adb (Image): Adding Has_Frozen_Extra_Formals.
* exp_ch3.adb (Build_Array_Init_Proc): Freeze its extra formals.
(Build_Init_Procedure): Freeze its extra formals.
(Expand_Freeze_Record_Type): For tagged types with foreign convention
create the extra formals of primitives with convention Ada.
* exp_ch6.ads (Create_Extra_Actuals): New subprogram.
* exp_ch6.adb (Check_BIP_Actuals): Adding assertions.
(Create_Extra_Actuals): New subprogram that factorizes code from
Expand_Call_Helper.
(Expand_Call_Helper): Adding support to defer the addition of extra
actuals. Move the code that adds the extra actuals to a new subprogram.
(Is_Unchecked_Union_Equality): Renamed as Is_Unchecked_Union_Predefined_
Equality_Call.
* exp_ch7.adb (Create_Finalizer): Freeze its extra formals.
(Wrap_Transient_Expression): Link the temporary with its relocated
expression to facilitate locating the expression in the expanded code.
* exp_ch9.ads (Expand_N_Entry_Declaration): Adding one formal.
* exp_ch9.adb (Expand_N_Entry_Declaration): Defer the expansion of
the entry if the extra formals are not available; analyze the built
declarations for the record type that holds all the parameters if
the expansion of the entry declaration was deferred.
* exp_disp.adb (Expand_Dispatching_Call): Handle deferred extra formals.
(Set_CPP_Constructors): Freeze its extra formals.
* freeze.adb (Freeze_Entity): Create the extra actuals of acccess to
subprograms whose designated type is a subprogram type.
(Freeze_Subprogram): Adjust assertion to support deferred extra formals,
and freeze extra formals of non-dispatching subprograms with foreign
convention. Added assertion to check matching of formals in thunks.
* sem_aux.adb (Get_Called_Entity): Adding documentation.
* sem_ch3.adb (Analyze_Full_Type_Declaration): Create the extra formals
of deferred subprograms, subprogram types and entries; create also the
extra actuals of deferred calls.
* sem_ch6.ads (Freeze_Extra_Formals): New subprogram.
(Deferred_Extra_Formals_Support): New package.
* sem_ch6.adb (Analyze_Subprogram_Body_Helper): Create the extra formals
of subprograms without separate spec.
(Add_Extra_Formal): Add documentation.
(Has_Extra_Formals): Removed.
(Parent_Subprogram): Adding documentation.
(Create_Extra_Formals): Defer adding extra formals if the underlying_type
of some formal type or return type is not available.
(Extra_Formals_Match_OK): Add missing check on the extra formals of
unchecked unions.
(Freeze_Extra_Formals): New subprogram.
(Deferred_Extra_Formals_Support): New package.
* sem_ch9.adb (Analyze_Entry_Declaration): Freeze its extra formals.
* sem_ch13.adb (New_Put_Image_Subprogram): ditto.
* sem_util.ads (Is_Unchecked_Union_Equality): New subprogram.
* sem_util.adb (Is_Unchecked_Union_Equality): ditto.

2 weeks agoada: Tune recent change for bit-packed arrays to help GNATprove backend
Piotr Trojanek [Fri, 4 Jul 2025 09:52:46 +0000 (11:52 +0200)] 
ada: Tune recent change for bit-packed arrays to help GNATprove backend

When GNAT is operating in GNATprove_Mode the Expander_Active flag is disabled,
but we still must do things that ordinary backends expect.

gcc/ada/ChangeLog:

* sem_util.adb (Get_Actual_Subtype): Do the same for GCC and GNATprove
backends.

2 weeks agoada: Expand continue procedure calls for GNATprove
Martin Clochard [Thu, 3 Jul 2025 13:52:02 +0000 (15:52 +0200)] 
ada: Expand continue procedure calls for GNATprove

Continue being a non-reserved keyword, occurrences of continue may
be resolved as procedure calls. Get that special case out of the
way for GNATprove, in anticipation of support for continue keyword.

gcc/ada/ChangeLog:

* exp_spark.adb (Expand_SPARK): Add expansion of continue statements.
(Expand_SPARK_N_Continue_Statement): Expand continue statements resolved
as procedure calls into said procedure calls.

2 weeks agoada: Tune check for restriction No_Relative_Delay and call to Set_Handler
Piotr Trojanek [Thu, 3 Jul 2025 08:10:56 +0000 (10:10 +0200)] 
ada: Tune check for restriction No_Relative_Delay and call to Set_Handler

When checking restriction No_Relative_Delay and detecting calls to
Ada.Real_Time.Timing_Events.Set_Handler with a Time_Span parameter,
we looked at the exact type of the actual parameter, while we should
look at its base type.

This patch looks at the type of actual parameter like it is done in
Expand_N_Delay_Until_Statement.

gcc/ada/ChangeLog:

* sem_res.adb (Resolve_Call): Look at the base type of actual parameter
when checking call to Set_Handler.

2 weeks agoada: Fix wrong indirect access to bit-packed array in iterated loop
Eric Botcazou [Wed, 2 Jul 2025 13:25:55 +0000 (15:25 +0200)] 
ada: Fix wrong indirect access to bit-packed array in iterated loop

This comes from a missing expansion of the bit-packed array reference in
the loop, because the actual subtype created for the dereference lacks a
Packed_Array_Impl_Type as it is ultimately created by the Preanalyze_Range
call present in Analyze_Loop_Statement.

gcc/ada/ChangeLog:

* sem_util.adb (Get_Actual_Subtype): Only create a new subtype when
the expander is active.  Remove a useless test of type inequality,
as well as a useless call to Set_Has_Delayed_Freeze on the subtype.

2 weeks agoada: Replace "not Present" test with "No" test
Gary Dismukes [Wed, 2 Jul 2025 21:57:57 +0000 (21:57 +0000)] 
ada: Replace "not Present" test with "No" test

Minor change to satisfy GNAT SAS checker.

gcc/ada/ChangeLog:

* exp_aggr.adb (Build_Size_Expr): Change test of "not Present (...)"
to "No (...)".

2 weeks agoada: Capacity determination for container aggregate with container iterator
Gary Dismukes [Wed, 2 Jul 2025 21:49:39 +0000 (21:49 +0000)] 
ada: Capacity determination for container aggregate with container iterator

In the case of a container aggregate that has a container_element_association
given by an iterator_specification that iterates over a container object
(for example, "[for E of V => E]"), the compiler will now determine the
number of elements in the object and can use that in determining the capacity
value to be passed to the container type's Empty function when allocating
space for the aggregate object.  This implementation-dependent behavior
is allowed by RM22 4.3.5(40/5).

Prior to this enhancement, the compiler would generally use the Empty
function's default value for the Capacity parameter (a value of just
10 in the current implementation of the predefined containers), which
could easily lead to Capacity_Error being raised for the aggregate.

Note that this is only done for aggregates of container types coming
from instantiations of the predefined container generics, and not for
user-defined container types (due to the special knowledge the compiler
has of the availability of Length functions for the predefined types).
Also, it currently only applies when the object V being iterated over
is a simple object, and is not done for more complex cases, such as
when V is a function call.

gcc/ada/ChangeLog:

* exp_aggr.adb (Build_Size_Expr): Determine the length of a container
aggregate association in the case where it's an iteration over an
object of a container type coming from an instantiation of a predefined
container generic. Minor updates to existing comments.

2 weeks agoada: exp_util.adb: prevent infinite loop in case of broken code
Ghjuvan Lacambre [Wed, 2 Jul 2025 07:11:03 +0000 (09:11 +0200)] 
ada: exp_util.adb: prevent infinite loop in case of broken code

A recent commit modified exp_util.adb in order to fix the selection of
Finalize subprograms in the case of untagged objects.
This introduced regressions for GNATSAS in fixedbugs by causing
GNAT2SCIL to loop over the same type over and over in case of broken
code.
We fix this by simply checking that the loop is making progress, and if
it doesn't, assume that we're done.

gcc/ada/ChangeLog:

* exp_util.adb (Finalize_Address): Prevent infinite loop

2 weeks agoada: Add Unique_Component_Name function for use by CCG.
Steve Baird [Fri, 27 Jun 2025 20:41:51 +0000 (13:41 -0700)] 
ada: Add Unique_Component_Name function for use by CCG.

Define a new function which, initially, is never called.
It is intended to be called from CCG. If an Ada tagged record type
has a component named Foo, then the generated corresponding C struct
might have a component with the same name. This approach almost works,
but breaks down in the (rare) case of an Ada record type where two or more
components have the same name (this is normally illegal, but is possible in
the case of an extension where some component of the parent type is not
visible at the point of the extension). This new function is intended for
use in coping with this case.

gcc/ada/ChangeLog:

* sem_aux.ads: Declare new function Unique_Component_Name.

* sem_aux.adb: Implement new function Unique_Component_Name.

2 weeks agoada: Ensure Expression_Copy has a parent before analysis
Viljar Indus [Mon, 30 Jun 2025 19:41:45 +0000 (22:41 +0300)] 
ada: Ensure Expression_Copy has a parent before analysis

Some analysis requires going up the parent chain to get the
relevant context. Ensure that is done for the Expression_Copy
node which is not a syntactic node.

gcc/ada/ChangeLog:

* sem_ch13.adb (Check_Aspect_At_End_Of_Declarations):
Ensure the Expression_Copy always has a parent before
calling any analyze.

2 weeks agoada: Improved support for mutably tagged types
Steve Baird [Fri, 13 Jun 2025 20:53:20 +0000 (13:53 -0700)] 
ada: Improved support for mutably tagged types

Fix bugs related to mutably tagged types in streaming operations, Put_Image
attributes, aggregates, composite equality comparisons with mutably-tagged
components, and other issues.

gcc/ada/ChangeLog:

* exp_aggr.adb (Build_Record_Aggr_Code.Gen_Assign): In the case of
an aggregate component where the component type is mutably tagged
and the component value is provided by a qualified aggregate (and
qualified with a specific type), avoid incorrectly rejecting the
inner aggregate for violating the rule that the type of an
aggregate shall not be class-wide.
* exp_attr.adb: For a predefined streaming operation (i.e., Read,
Write, Input, or Output) of a class-wide type, the external name
of the tag of the value is normally written out by Output and read
in by Input. In the case of a mutably tagged type, this is instead
done in Write and Read.
* exp_ch4.adb (Expand_Composite_Equality): In the case of an
equality comparison for a type having a mutably tagged component,
we want the component comparison to compare two values of the
mutably tagged type, not two values of the corresponding
array-of-bytes-ish representation type. Even if there are no
user-defined equality functions anywhere in sight, comparing the
array values still doesn't work because undefined bits may end up
participating in the comparison (resulting in an incorrect result
of False).
* exp_put_image.adb: In the case of a class-wide type, the
predefined Image attribute includes the name of the specific type
(and a "'" character, to follow qualified expression syntax) to
indicate the tag of the value. With the introduction of mutably
tagged types, this case can now arise in the case of a component
(of either an enclosing array or an enclosing record), not just
for a top-level object. So we factor the code to do this into a
new procedure, Put_Specific_Type_Name_Qualifier, so that it can be
called from more than one place. This reorganization also involves
replacing the procedure Put_String_Exp with a new procedure,
Put_String_Exp_To_Buffer, declared in a less nested scope. For
mutably tagged components (at the source level) the component type
(at the GNAT tree level) is an array of bytes (actually a two
field record containing an array of bytes, but that's a detail).
Appropriate conversions need to be generated so that we don't end
up generating an image for an array of bytes; this is done at the
same places where Put_Specific_Type_Name_Qualifier is called
(for components) by calling Make_Mutably_Tagged_Conversion.
* exp_strm.adb (Make_Field_Attribute): Add
Make_Mutably_Tagged_Conversion call where we construct a
Selected_Component node and the corresponding component type is
the internal representation type for a mutably tagged type.
(Stream_Base_Type): Return the mutably
tagged type if given the corresponding internal representation type.
* sem_ch3.adb (Array_Type_Declaration): In the case where the
source-level component type of an array type is mutably tagged,
set the Component_Type field of the base type of the declared
array type (as opposed to that of the first subtype of the array
type) to the corresponding internal representation type.
* sem_ch4.adb (Analyze_Selected_Component): In the case of a
selected component name which references a component whose type is
the internal representation type of a mutably tagged type,
generate a conversion to the mutably tagged type.

2 weeks agolibstdc++: Fix obvious mistake in inplace_vector::assign_range [PR119137]
Tomasz Kamiński [Tue, 22 Jul 2025 07:32:47 +0000 (09:32 +0200)] 
libstdc++: Fix obvious mistake in inplace_vector::assign_range [PR119137]

In case of input iterators, the loop that assigns to existing elements
should run up to number of elements in vector (_M_size) not capacity (_Nm).

PR libstdc++/119137

libstdc++-v3/ChangeLog:

* include/std/inplace_vector (inplace_vector::assign_range):
Replace _Nm with _M_size in the assigment loop.

2 weeks agoFix gcc.dg/vect/slp-28.c
Richard Biener [Tue, 22 Jul 2025 06:44:25 +0000 (08:44 +0200)] 
Fix gcc.dg/vect/slp-28.c

gcc.dg/vect/slp-28.c is now vectorized as expected even on targets
without vect32.

* gcc.dg/vect/slp-28.c: Adjust.

2 weeks agoDaily bump.
GCC Administrator [Tue, 22 Jul 2025 00:19:29 +0000 (00:19 +0000)] 
Daily bump.

2 weeks ago[RISC-V] Add missing insn types to xiangshan.md and mips-p8700.md
Jeff Law [Mon, 21 Jul 2025 21:58:12 +0000 (15:58 -0600)] 
[RISC-V] Add missing insn types to xiangshan.md and mips-p8700.md

This is a trivial patch to add a few missing types to pipeline models that are
mostly complete.

In particular this adds the "ghost" to mips-p8700.md and the "sf_vc" and
"sf_vc_se" types to xiangshan.md.

There are definitely some bigger issues to solve in this space.  But this is a
trivial fix that stands on its own.

I've tested this in my tester, just waiting for pre-commit CI to do its thing.

gcc/
* config/riscv/mips-p8700.md: Add support for "ghost" insn types.
* config/riscv/xiangshan.md: Add support for "sf_vc" and "sf_vc_se"
insn types.

2 weeks agoAda: Fix wrong tag in style check warnings
Eric Botcazou [Mon, 21 Jul 2025 18:27:37 +0000 (20:27 +0200)] 
Ada: Fix wrong tag in style check warnings

This fixes an old issue whereby violations of the style check -gnatyc are
sometimes reported as violations of -gnatyt instead.

gcc/ada/
PR ada/121184
* styleg.adb (Check_Comment): Use consistent warning message.

2 weeks agocobol: Improved linemap and diagnostic handling; PIC validation. [PR120402]
Robert Dubner [Mon, 21 Jul 2025 16:58:47 +0000 (12:58 -0400)] 
cobol: Improved linemap and diagnostic handling; PIC validation. [PR120402]

Implementation of PICTURE string validation for PR120402.  Expanded some printf
format attributes.  Improved debugging and diagnostic messages.  Improved
linemap and line location tracking in support of diagnostic messages and
location_t tagging of GENERIC nodes for improved GDB-COBOL performance.
Assorted changes to eliminate cppcheck warnings.

Co-Authored-By: James K. Lowden <jklowden@cobolworx.com>
Co-Authored-By: Robert Dubner <rdubner@symas.com>
gcc/cobol/ChangeLog:

PR cobol/120402
* Make-lang.in: Elminate commented-out scripting.
* cbldiag.h (_CBLDIAG_H): Change #if 0 to #if GCOBOL_GETENV
(warn_msg): Add printf attributes.
(location_dump): Add debugging message.
* cdf.y: Improved linemap tracking.
* genapi.cc (treeplet_fill_source): const attribute for formal parameter.
(insert_nop): Created to consolidate var_decl_nop writes.
(build_main_that_calls_something): Move generation to the end of executable.
(level_88_helper): Formatting.
(parser_call_targets_dump): Formatting.
(function_pointer_from_name): const attribute for formal parameter.
(parser_initialize_programs): const attribute for formal parameter.
(parser_statement_begin): Improved linemap handling.
(section_label):  Improved linemap handling.
(paragraph_label): Improved linemap handling.
(pseudo_return_pop): Improved linemap handling.
(leave_procedure): Formatting.
(parser_enter_section):  Improved linemap handling.
(parser_enter_paragraph): Improved linemap handling.
(parser_perform): Formatting.
(parser_leave_file): Move creation of main() to this routine.
(parser_enter_program): Move creation of main from here to leave_file.
(parser_accept): Formatting. const attribute for formal parameter.
(parser_accept_command_line): const attribute for formal parameter.
(parser_accept_command_line_count): const attribute for formal parameter.
(parser_accept_envar): Likewise.
(parser_set_envar): Likewise.
(parser_display): Likewise.
(get_exhibit_name): Implement EXHIBIT verb.
(parser_exhibit): Likewise.
(parser_sleep): const attribute for formal parameter.
(parser_division): Improved linemap handling.
(parser_classify): const attribute for formal parameter.
(create_iline_address_pairs): Improved linemap handling.
(parser_perform_start): Likewise.
(perform_inline_until): Likewise.
(perform_inline_testbefore_varying): Likewise.
(parser_perform_until): Likewise.
(parser_perform_inline_times): Likewise.
(parser_intrinsic_subst): const attribute for formal parameter.
(parser_file_merge): Formatting.
(create_and_call): Improved linemap handling.
(mh_identical): const attribute for formal parameter.
(mh_numeric_display): const attribute for formal parameter.
(mh_little_endian): Likewise.
(mh_source_is_group): Likewise.
(psa_FldLiteralA): Formatting.
* genapi.h (parser_accept): const attribute for formal parameter.
(parser_accept_envar): Likewise.
(parser_set_envar): Likewise.
(parser_accept_command_line): Likewise.
(parser_accept_command_line_count): Likewise.
(parser_add): Likewise.
(parser_classify): Likewise.
(parser_sleep): Likewise.
(parser_exhibit): Likewise.
(parser_display): Likewise.
(parser_initialize_programs): Likewise.
(parser_intrinsic_subst): Likewise.
* gengen.cc (gg_assign): Improved linemap handling.
(gg_add_field_to_structure): Likewise.
(gg_define_from_declaration): Likewise.
(gg_build_relational_expression): Likewise.
(gg_goto_label_decl): Likewise.
(gg_goto): Likewise.
(gg_printf): Likewise.
(gg_fprintf): Likewise.
(gg_memset): Likewise.
(gg_memchr): Likewise.
(gg_memcpy): Likewise.
(gg_memmove): Likewise.
(gg_strcpy): Likewise.
(gg_strcmp): Likewise.
(gg_strncmp): Likewise.
(gg_return): Likewise.
(chain_parameter_to_function): Likewise.
(gg_define_function): Likewise.
(gg_get_function_decl): Likewise.
(gg_call_expr): Likewise.
(gg_call): Likewise.
(gg_call_expr_list): Likewise.
(gg_exit): Likewise.
(gg_abort): Likewise.
(gg_strlen): Likewise.
(gg_strdup): Likewise.
(gg_malloc): Likewise.
(gg_realloc): Likewise.
(gg_free): Likewise.
(gg_set_current_line_number): Likewise.
(gg_get_current_line_number): Likewise.
(gg_insert_into_assembler): Likewise.
(token_location_override): Likewise.
(gg_token_location): Likewise.
* gengen.h (location_from_lineno): Likewise.
(gg_set_current_line_number): Likewise.
(gg_get_current_line_number): Likewise.
(gg_token_location): Likewise.
(current_token_location): Likewise.
(current_location_minus_one): Likewise.
(current_location_minus_one_clear): Likewise.
(token_location_override): Likewise.
* genmath.cc (fast_divide):  const attribute for formal parameter.
* genutil.cc (get_and_check_refstart_and_reflen): Likewise.
(get_data_offset): Likewise.
(refer_refmod_length): Likewise.
(refer_offset): Likewise.
(refer_size): Likewise.
(refer_size_dest): Likewise.
(refer_size_source): Likewise.
(qualified_data_location): Likewise.
* genutil.h (refer_offset): Likewise.
(refer_size_source): Likewise.
(refer_size_dest): Likewise.
(qualified_data_location): Likewise.
* parse.y: EVALUATE token; Implement EXHIBIT verb;
Improved linemap handling.
* parse_ante.h (input_file_status_notify): Improved linemap handling.
(location_set): Likewise.
* scan.l: PICTURE string validation.
* scan_ante.h (class picture_t): PICTURE string validation.
(validate_picture): Likewise.
* symbols.cc (symbol_currency): Revised default currency handling.
* symbols.h (symbol_currency): Likewise.
* util.cc (location_from_lineno): Improved linemap handling.
(current_token_location): Improved linemap handling.
(current_location_minus_one): Improved linemap handling.
(current_location_minus_one_clear): Improved linemap handling.
(gcc_location_set_impl): Improved linemap handling.
(warn_msg): Improved linemap handling.
* util.h (cobol_lineno): Improved linemap handling.

2 weeks agomatch: Add `cmp - 1` simplification to `-icmp` [PR110949]
Andrew Pinski [Sun, 20 Jul 2025 18:21:08 +0000 (11:21 -0700)] 
match: Add `cmp - 1` simplification to `-icmp` [PR110949]

I have seen this a few places though the testcase from PR 95906
is an obvious place where this shows up for sure.
This convert `cmp - 1` into `-icmp` as that form is more useful
in many cases.

Changes since v1:
* v2: Add check for outer type's precision being greater than 1.

Bootstrapped and tested on x86_64-linux-gnu.

PR tree-optimization/110949
PR tree-optimization/95906

gcc/ChangeLog:

* match.pd (cmp - 1): New pattern.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/cmp-2.c: New test.
* gcc.dg/tree-ssa/max-bitcmp-1.c: New test.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2 weeks agolibstdc++: Make the default ctor of mdspan conditionally noexcept.
Luc Grosheintz [Mon, 21 Jul 2025 11:07:37 +0000 (13:07 +0200)] 
libstdc++: Make the default ctor of mdspan conditionally noexcept.

Previously, the default ctor of mdspan was never noexcept, even if all
members of mdspan were nothrow default constructible.

This commit makes mdspan conditionally nothrow default constructible.
A similar strengthening happens in libc++.

libstdc++-v3/ChangeLog:

* include/std/mdspan (mdspan::mdspan): Make default ctor
conditionally noexcept.
* testsuite/23_containers/mdspan/mdspan.cc: Add tests.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
Signed-off-by: Luc Grosheintz <luc.grosheintz@gmail.com>
2 weeks agolibstdc++: Strengthen exception guarantee for mdspan methods.
Luc Grosheintz [Mon, 21 Jul 2025 11:07:36 +0000 (13:07 +0200)] 
libstdc++: Strengthen exception guarantee for mdspan methods.

The mdspan::is_{,always}_{unique,strided,exhaustive} methods only call
their counterparts in mdspan::mapping_type. The standard specifies that
the methods of mdspan::mapping_type are noexcept, but doesn't specify if
the methods of mdspan are noexcept.

Libc++ strengthened the exception guarantee for these mdspan methods.
This commit conditionally strengthens these methods for libstdc++.

libstdc++-v3/ChangeLog:

* include/std/mdspan (mdspan::is_always_unique): Make
conditionally noexcept.
(mdspan::is_always_exhaustive): Ditto.
(mdspan::is_always_strided): Ditto.
(mdspan::is_unique): Ditto.
(mdspan::is_exhaustive): Ditto.
(mdspan::is_strided): Ditto.
* testsuite/23_containers/mdspan/layout_like.h: Make noexcept
configurable. Add ThrowingLayout.
* testsuite/23_containers/mdspan/mdspan.cc: Add tests for
noexcept.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
Signed-off-by: Luc Grosheintz <luc.grosheintz@gmail.com>
2 weeks ago[RISC-V] Fix wrong CFA during stack probe
Andreas Schwab [Wed, 16 Jul 2025 12:48:51 +0000 (14:48 +0200)] 
[RISC-V] Fix wrong CFA during stack probe

temp1 is used by the probe loop for the step size, but we need the final
address of the stack after the loop which resides in temp2.

PR target/121121
* config/riscv/riscv.cc (riscv_allocate_and_probe_stack_space):
Use temp2 instead of temp1 for the CFA note.

2 weeks agoRISC-V: Add test for vec_duplicate + vaaddu.vv combine for DImode
Pan Li [Mon, 21 Jul 2025 01:28:06 +0000 (09:28 +0800)] 
RISC-V: Add test for vec_duplicate + vaaddu.vv combine for DImode

Add asm dump check and run test for vec_duplicate + vaaddu.vv
combine to vaaddu.vx, with the GR2VR cost is 0, 1, 2 and 15 for
the case 0 and case 1.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c: Add asm check.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u64.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
2 weeks agoRISC-V: Allow VLS DImode for sat_op vx DImode pattern
Pan Li [Mon, 21 Jul 2025 01:20:46 +0000 (09:20 +0800)] 
RISC-V: Allow VLS DImode for sat_op vx DImode pattern

When try to introduce the vaaddu.vx combine for DImode, we will meet
ICE like below:

0x4889763 internal_error(char const*, ...)
        .../riscv-gnu-toolchain/gcc/__build__/../gcc/diagnostic-global-context.cc:517
0x4842f98 fancy_abort(char const*, int, char const*)
        .../riscv-gnu-toolchain/gcc/__build__/../gcc/diagnostic.cc:1818
0x2953461 code_for_pred_scalar(int, machine_mode)
        ./insn-opinit.h:1911
0x295f300
riscv_vector::sat_op<110>::expand(riscv_vector::function_expander&) const
        .../riscv-gnu-toolchain/gcc/__build__/../gcc/config/riscv/riscv-vector-builtins-bases.cc:667
0x294bce1 riscv_vector::function_expander::expand()

We will have code_for_nothing when emit the vaadd.vx insn for V2DI vls
mode.  So allow the VLS mode for the sat_op vx pattern to unblock it.

gcc/ChangeLog:

* config/riscv/vector.md: Allow VLS DImode for sat_op vx pattern.

Signed-off-by: Pan Li <pan2.li@intel.com>
2 weeks agoRISC-V: Add test for vec_duplicate + vaaddu.vv combine case 1 with GR2VR cost 0,...
Pan Li [Mon, 21 Jul 2025 01:16:17 +0000 (09:16 +0800)] 
RISC-V: Add test for vec_duplicate + vaaddu.vv combine case 1 with GR2VR cost 0, 1 and 2 for QI, HI and SI mode

Add asm dump check test for vec_duplicate + vaaddu.vv combine to
vaaddu.vx, with the GR2VR cost is 0, 1 and 2.  Please note DImode
is not included.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c: Add asm check.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c: Ditto.

Signed-off-by: Pan Li <pan2.li@intel.com>
2 weeks agoRISC-V: Add test for vec_duplicate + vaaddu.vv combine case 0 with GR2VR cost 0,...
Pan Li [Mon, 21 Jul 2025 01:13:27 +0000 (09:13 +0800)] 
RISC-V: Add test for vec_duplicate + vaaddu.vv combine case 0 with GR2VR cost 0, 2 and 15 for QI, HI and SI mode

Add asm dump check and run test for vec_duplicate + vaaddu.vv
combine to vaaddu.vx, with the GR2VR cost is 0, 2 and 15.  Please
note DImode is not included here.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c: Add asm check.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h: Add test
helper macros.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add test
data for run test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u16.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u32.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u8.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
2 weeks agoRISC-V: Combine vec_duplicate + vaaddu.vv to vaaddu.vx on GR2VR cost for HI, QI and...
Pan Li [Mon, 21 Jul 2025 01:06:52 +0000 (09:06 +0800)] 
RISC-V: Combine vec_duplicate + vaaddu.vv to vaaddu.vx on GR2VR cost for HI, QI and SI mode

This patch would like to combine the vec_duplicate + vaaddu.vv to the
vaaddu.vx.  From example as below code.  The related pattern will depend
on the cost of vec_duplicate from GR2VR.  Then the late-combine will
take action if the cost of GR2VR is zero, and reject the combination
if the GR2VR cost is greater than zero.

Assume we have example code like below, GR2VR cost is 0.

  #define DEF_AVG_FLOOR(NT, WT)        \
  NT                                   \
  test_##NT##_avg_floor(NT x, NT y)    \
  {                                    \
    return (NT)(((WT)x + (WT)y) >> 1); \
  }

  #define AVG_FLOOR_FUNC(T)      test_##T##_avg_floor

  DEF_AVG_FLOOR(uint32_t, uint64_t)
  DEF_VX_BINARY_CASE_2_WRAP(T, AVG_FLOOR_FUNC(T), sat_add)

Before this patch:
  11   │     beq a3,zero,.L8
  12   │     vsetvli a5,zero,e32,m1,ta,ma
  13   │     vmv.v.x v2,a2
  14   │     slli    a3,a3,32
  15   │     srli    a3,a3,32
  16   │ .L3:
  17   │     vsetvli a5,a3,e32,m1,ta,ma
  18   │     vle32.v v1,0(a1)
  19   │     slli    a4,a5,2
  20   │     sub a3,a3,a5
  21   │     add a1,a1,a4
  22   │     vaaddu.vv v1,v1,v2
  23   │     vse32.v v1,0(a0)
  24   │     add a0,a0,a4
  25   │     bne a3,zero,.L3

After this patch:
  11   │     beq a3,zero,.L8
  12   │     slli    a3,a3,32
  13   │     srli    a3,a3,32
  14   │ .L3:
  15   │     vsetvli a5,a3,e32,m1,ta,ma
  16   │     vle32.v v1,0(a1)
  17   │     slli    a4,a5,2
  18   │     sub a3,a3,a5
  19   │     add a1,a1,a4
  20   │     vaaddu.vx v1,v1,a2
  21   │     vse32.v v1,0(a0)
  22   │     add a0,a0,a4
  23   │     bne a3,zero,.L3

gcc/ChangeLog:

* config/riscv/autovec-opt.md (*uavg_floor_vx_<mode>): Add
pattern for vaaddu.vx combine.
* config/riscv/riscv.cc (get_vector_binary_rtx_cost): Add UNSPEC
handling for UNSPEC_VAADDU.
(riscv_rtx_costs): Ditto.

Signed-off-by: Pan Li <pan2.li@intel.com>
2 weeks agoaarch64: Avoid INS-(W|X)ZR instructions when optimising for speed
Kyrylo Tkachov [Thu, 17 Jul 2025 10:51:31 +0000 (03:51 -0700)] 
aarch64: Avoid INS-(W|X)ZR instructions when optimising for speed

For inserting zero into a vector lane we usually use an instruction like:
ins     v0.h[2], wzr

This, however, has not-so-great performance on some CPUs.
On Grace, for example it has a latency of 5 and throughput 1.
The alternative sequence:
movi    v31.8b, #0
ins     v0.h[2], v31.h[0]
is prefereble bcause the MOVI-0 is often a zero-latency operation that is
eliminated by the CPU frontend and the lane-to-lane INS has a latency of 2 and
throughput of 4.
We can avoid the merging of the two instructions into the aarch64_simd_vec_set_zero<mode>
by disabling that pattern when optimizing for speed.

Thanks to wider benchmarking from Tamar, it makes sense to make this change for
all tunings, so no RTX costs or tuning flags are introduced to control this
in a more fine-grained manner.  They can be easily added in the future if needed
for a particular CPU.

Bootstrapped and tested on aarch64-none-linux-gnu.

Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com>
gcc/

* config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
Enable only when optimizing for size.

gcc/testsuite/

* gcc.target/aarch64/simd/mf8_data_1.c (test_set_lane4,
test_setq_lane4): Relax allowed assembly.
* gcc.target/aarch64/vec-set-zero.c: Use -Os in flags.
* gcc.target/aarch64/inszero_split_1.c: New test.

2 weeks agoaarch64: NFC - Make vec_* rtx costing logic consistent
Kyrylo Tkachov [Thu, 17 Jul 2025 13:06:16 +0000 (06:06 -0700)] 
aarch64: NFC - Make vec_* rtx costing logic consistent

The rtx costs logic for CONST_VECTOR, VEC_DUPLICATE and VEC_SELECT sets
the cost unconditionally to the movi, dup or extract fields of extra_cost,
when the normal practice in that function is to use extra_cost only when speed
is set.  When speed is false the function should estimate the size cost only.
This patch makes the logic consistent by using the extra_cost fields to
increment the cost when speed is set.  This requires reducing the extra_cost values
of the movi, dup and extract fields by COSTS_N_INSNS (1), as every insn being costed
has a cost of COSTS_N_INSNS (1) at the start of the function.  The cost tables for
the CPUs are updated in line with this.

With these changes the testsuite is unaffected so no different costing
decisions are made and this patch is just a cleanup.

Bootstrapped and tested on aarch64-none-linux-gnu.

Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com>
gcc/

* config/aarch64/aarch64.cc (aarch64_rtx_costs): Add extra_cost values
only when speed is true for CONST_VECTOR, VEC_DUPLICATE, VEC_SELECT
cases.
* config/aarch64/aarch64-cost-tables.h (qdf24xx_extra_costs,
thunderx_extra_costs, thunderx2t99_extra_costs,
thunderx3t110_extra_costs, tsv110_extra_costs, a64fx_extra_costs,
ampere1_extra_costs, ampere1a_extra_costs, ampere1b_extra_costs):
Reduce cost of movi, dup, extract fields by COSTS_N_INSNS (1).
* config/arm/aarch-cost-tables.h (generic_extra_costs,
cortexa53_extra_costs, cortexa57_extra_costs, cortexa76_extra_costs,
exynosm1_extra_costs, xgene1_extra_costs): Likewise.

2 weeks agotree-optimization/121194 - check LC PHIs can be vectorized
Richard Biener [Mon, 21 Jul 2025 10:48:45 +0000 (12:48 +0200)] 
tree-optimization/121194 - check LC PHIs can be vectorized

With bools we can have the usual mismatch between mask and data
use.  Catch that, like we do elsewhere.

PR tree-optimization/121194
* tree-vect-loop.cc (vectorizable_lc_phi): Verify
vector types are compatible.

* gcc.dg/torture/pr121194.c: New testcase.

2 weeks agofortran: Fix indentation
Mikael Morin [Tue, 15 Jul 2025 17:09:21 +0000 (19:09 +0200)] 
fortran: Fix indentation

gcc/fortran/ChangeLog:

* trans-decl.cc (gfc_trans_deferred_vars): Fix indentation.

2 weeks agoamdgcn: add DImode offsets for gather/scatter
Andrew Stubbs [Thu, 12 Jun 2025 16:58:33 +0000 (16:58 +0000)] 
amdgcn: add DImode offsets for gather/scatter

Add new variant of he gather_load and scatter_store instructions that take the
offsets in DImode.  This is not the natural width for offsets in the
instruction set, but we can use them to compute a vector of absolute addresses,
which does work.

This enables the autovectorizer to use gather/scatter in a number of additional
scenarios (one of which shows up in the SPEC HPC lbm benchmark).

gcc/ChangeLog:

* config/gcn/gcn-valu.md (gather_load<mode><vndi>): New.
(scatter_store<mode><vndi>): New.
(mask_gather_load<mode><vndi>): New.
(mask_scatter_store<mode><vndi>): New.
* config/gcn/gcn.cc (gcn_expand_scaled_offsets): Support DImode.

2 weeks agoamdgcn: Add ashlvNm, mulvNm macros
Andrew Stubbs [Thu, 12 Jun 2025 16:54:01 +0000 (16:54 +0000)] 
amdgcn: Add ashlvNm, mulvNm macros

I need some extra shift varieties in the mode-independent code, but the macros
don't permit insns that don't have QI/HI variants.  This fixes the problem, and
adds the new functions for the follow-up patch to use.

gcc/ChangeLog:

* config/gcn/gcn.cc (GEN_VNM_NOEXEC): Use USE_QHF.
(GEN_VNM): Likewise, and call for new ashl and mul variants.

2 weeks agoamdgcn: add more insn patterns using vec_duplicate
Andrew Stubbs [Thu, 12 Jun 2025 16:57:23 +0000 (16:57 +0000)] 
amdgcn: add more insn patterns using vec_duplicate

These new insns allow more efficient use of scalar inputs to 64-bit vector
add and mul.  Also, the patch adjusts the existing mul.._dup because it was
actually a dup2 (the vec_duplicate is on the second input), and that was
inconveniently inconsistent.

The patterns are generally useful, but will be used directly by a follow-up
patch.

gcc/ChangeLog:

* config/gcn/gcn-valu.md (add<mode>3_dup): New.
(add<mode>3_dup_exec): New.
(<su>mul<mode>3_highpart_dup<exec>): New.
(mul<mode>3_dup): Move the vec_duplicate to operand 1.
(mul<mode>3_dup_exec): New.
(vec_series<mode>): Adjust call to gen_mul<mode>3_dup.
* config/gcn/gcn.cc (gcn_expand_vector_init): Likewise.

2 weeks agogenoutput: Verify hard register constraints
Stefan Schulze Frielinghaus [Mon, 21 Jul 2025 11:05:26 +0000 (13:05 +0200)] 
genoutput: Verify hard register constraints

Since genoutput has no information about hard register names we cannot
statically verify those names in constraints of the machine description.
Therefore, we have to do it at runtime.  Although verification shouldn't
be too expensive, restrict it to checking builds.  This should be
sufficient since hard register constraints in machine descriptions
probably change rarely, and each commit should be tested with checking
anyway, or at the very least before a release is taken.

gcc/ChangeLog:

* genoutput.cc (main): Emit function
verify_reg_names_in_constraints() for run-time validation.
(mdep_constraint_len): Deal with hard register constraints.
* output.h (verify_reg_names_in_constraints): New function
declaration.
* toplev.cc (backend_init): If checking is enabled, call into
verify_reg_names_in_constraints().

2 weeks agoError handling for hard register constraints
Stefan Schulze Frielinghaus [Mon, 21 Jul 2025 11:05:26 +0000 (13:05 +0200)] 
Error handling for hard register constraints

This implements error handling for hard register constraints including
potential conflicts with register asm operands.

In contrast to register asm operands, hard register constraints allow
more than just one register per operand.  Even more than just one
register per alternative.  For example, a valid constraint for an
operand is "{r0}{r1}m,{r2}".  However, this also means that we have to
make sure that each register is used at most once in each alternative
over all outputs and likewise over all inputs.  For asm statements this
is done by this patch during gimplification.  For hard register
constraints used in machine description, error handling is still a todo
and I haven't investigated this so far and consider this rather a low
priority.

gcc/ada/ChangeLog:

* gcc-interface/trans.cc (gnat_to_gnu): Pass null pointer to
parse_{input,output}_constraint().

gcc/analyzer/ChangeLog:

* region-model-asm.cc (region_model::on_asm_stmt): Pass null
pointer to parse_{input,output}_constraint().

gcc/c/ChangeLog:

* c-typeck.cc (build_asm_expr): Pass null pointer to
parse_{input,output}_constraint().

gcc/ChangeLog:

* cfgexpand.cc (n_occurrences): Move this ...
(check_operand_nalternatives): and this ...
(expand_asm_stmt): and the call to gimplify.cc.
* config/s390/s390.cc (s390_md_asm_adjust): Pass null pointer to
parse_{input,output}_constraint().
* gimple-walk.cc (walk_gimple_asm): Pass null pointer to
parse_{input,output}_constraint().
(walk_stmt_load_store_addr_ops): Ditto.
* gimplify-me.cc (gimple_regimplify_operands): Ditto.
* gimplify.cc (num_occurrences): Moved from cfgexpand.cc.
(num_alternatives): Ditto.
(gimplify_asm_expr): Deal with hard register constraints.
* stmt.cc (eliminable_regno_p): New helper.
(hardreg_ok_p): Perform a similar check as done in
make_decl_rtl().
(parse_output_constraint): Add parameter for gimplify_reg_info
and validate hard register constrained operands.
(parse_input_constraint): Ditto.
* stmt.h (class gimplify_reg_info): Forward declaration.
(parse_output_constraint): Add parameter.
(parse_input_constraint): Ditto.
* tree-ssa-operands.cc
(operands_scanner::get_asm_stmt_operands): Pass null pointer
to parse_{input,output}_constraint().
* tree-ssa-structalias.cc (find_func_aliases): Pass null pointer
to parse_{input,output}_constraint().
* varasm.cc (assemble_asm): Pass null pointer to
parse_{input,output}_constraint().
* gimplify_reg_info.h: New file.

gcc/cp/ChangeLog:

* semantics.cc (finish_asm_stmt): Pass null pointer to
parse_{input,output}_constraint().

gcc/d/ChangeLog:

* toir.cc: Pass null pointer to
parse_{input,output}_constraint().

gcc/testsuite/ChangeLog:

* gcc.dg/pr87600-2.c: Split test into two files since errors for
functions test{0,1} are thrown during expand, and for
test{2,3} during gimplification.
* lib/scanasm.exp: On s390, skip lines beginning with #.
* gcc.dg/asm-hard-reg-error-1.c: New test.
* gcc.dg/asm-hard-reg-error-2.c: New test.
* gcc.dg/asm-hard-reg-error-3.c: New test.
* gcc.dg/asm-hard-reg-error-4.c: New test.
* gcc.dg/asm-hard-reg-error-5.c: New test.
* gcc.dg/pr87600-3.c: New test.
* gcc.target/aarch64/asm-hard-reg-2.c: New test.
* gcc.target/s390/asm-hard-reg-7.c: New test.

2 weeks agoHard register constraints
Stefan Schulze Frielinghaus [Mon, 21 Jul 2025 11:05:26 +0000 (13:05 +0200)] 
Hard register constraints

Implement hard register constraints of the form {regname} where regname
must be a valid register name for the target.  Such constraints may be
used in asm statements as a replacement for register asm and in machine
descriptions.  A more verbose description is given in extend.texi.

It is expected and desired that optimizations coalesce multiple pseudos
into one whenever possible.  However, in case of hard register
constraints we may have to undo this and introduce copies since
otherwise we would constraint a single pseudo to multiple hard
registers.  This is done prior RA during asmcons in
match_asm_constraints_2().  While IRA tries to reduce live ranges, it
also replaces some register-register moves.  That in turn might undo
those copies of a pseudo which we just introduced during asmcons.  Thus,
check in decrease_live_ranges_number() via
valid_replacement_for_asm_input_p() whether it is valid to perform a
replacement.

The reminder of the patch mostly deals with parsing and decoding hard
register constraints.  The actual work is done by LRA in
process_alt_operands() where a register filter, according to the
constraint, is installed.

For the sake of "reviewability" and in order to show the beauty of LRA,
error handling (which gets pretty involved) is spread out into a
subsequent patch.

Limitation
----------

Currently, a fixed register cannot be used as hard register constraint.
For example, loading the stack pointer on x86_64 via

void *
foo (void)
{
  void *y;
  __asm__ ("" : "={rsp}" (y));
  return y;
}

leads to an error.

Asm Adjust Hook
---------------

The following targets implement TARGET_MD_ASM_ADJUST:

- aarch64
- arm
- avr
- cris
- i386
- mn10300
- nds32
- pdp11
- rs6000
- s390
- vax

Most of them only add the CC register to the list of clobbered register.
However, cris, i386, and s390 need some minor adjustment.

gcc/ChangeLog:

* config/cris/cris.cc (cris_md_asm_adjust): Deal with hard
register constraint.
* config/i386/i386.cc (map_egpr_constraints): Ditto.
* config/s390/s390.cc (f_constraint_p): Ditto.
* doc/extend.texi: Document hard register constraints.
* doc/md.texi: Ditto.
* function.cc (match_asm_constraints_2): Have a unique pseudo
for each operand with a hard register constraint.
(pass_match_asm_constraints::execute): Calling into new helper
match_asm_constraints_2().
* genoutput.cc (mdep_constraint_len): Return the length of a
hard register constraint.
* genpreds.cc (write_insn_constraint_len): Support hard register
constraints for insn_constraint_len().
* ira.cc (valid_replacement_for_asm_input_p_1): New helper.
(valid_replacement_for_asm_input_p): New helper.
(decrease_live_ranges_number): Similar to
match_asm_constraints_2() ensure that each operand has a unique
pseudo if constrained by a hard register.
* lra-constraints.cc (process_alt_operands): Install hard
register filter according to constraint.
* recog.cc (asm_operand_ok): Accept register type for hard
register constrained asm operands.
(constrain_operands): Validate hard register constraints.
* stmt.cc (decode_hard_reg_constraint): Parse a hard register
constraint into the corresponding register number or bail out.
(parse_output_constraint): Parse hard register constraint and
set *ALLOWS_REG.
(parse_input_constraint): Ditto.
* stmt.h (decode_hard_reg_constraint): Declaration of new
function.

gcc/testsuite/ChangeLog:

* gcc.dg/asm-hard-reg-1.c: New test.
* gcc.dg/asm-hard-reg-2.c: New test.
* gcc.dg/asm-hard-reg-3.c: New test.
* gcc.dg/asm-hard-reg-4.c: New test.
* gcc.dg/asm-hard-reg-5.c: New test.
* gcc.dg/asm-hard-reg-6.c: New test.
* gcc.dg/asm-hard-reg-7.c: New test.
* gcc.dg/asm-hard-reg-8.c: New test.
* gcc.target/aarch64/asm-hard-reg-1.c: New test.
* gcc.target/i386/asm-hard-reg-1.c: New test.
* gcc.target/i386/asm-hard-reg-2.c: New test.
* gcc.target/s390/asm-hard-reg-1.c: New test.
* gcc.target/s390/asm-hard-reg-2.c: New test.
* gcc.target/s390/asm-hard-reg-3.c: New test.
* gcc.target/s390/asm-hard-reg-4.c: New test.
* gcc.target/s390/asm-hard-reg-5.c: New test.
* gcc.target/s390/asm-hard-reg-6.c: New test.
* gcc.target/s390/asm-hard-reg-longdouble.h: New test.

2 weeks agoRemove bougs minimum VF compute
Richard Biener [Mon, 21 Jul 2025 08:40:13 +0000 (10:40 +0200)] 
Remove bougs minimum VF compute

The following removes the minimum VF compute from dataref analysis
which does not take into account SLP at all, leaving the testcase
vectorized with V2SImode instead of V4SImode on x86.  With SLP
the only minimum VF we can compute this early is 1.

* tree-vectorizer.h (vect_analyze_data_refs): Remove min_vf
output.
* tree-vect-data-refs.cc (vect_analyze_data_refs): Likewise.
* tree-vect-loop.cc (vect_analyze_loop_2): Remove early
out based on bogus min_vf.
* tree-vect-slp.cc (vect_slp_analyze_bb_1): Adjust.

* gcc.dg/vect/vect-127.c: New testcase.

2 weeks agoFortran: Allow for iterator substitution in array constructors [PR119106]
Andre Vehreschild [Fri, 27 Jun 2025 09:42:54 +0000 (11:42 +0200)] 
Fortran: Allow for iterator substitution in array constructors [PR119106]

PR fortran/119106

gcc/fortran/ChangeLog:

* expr.cc (simplify_constructor): Do not simplify constants.
(gfc_simplify_expr): Continue to simplify expression when an
iterator is present.

gcc/testsuite/ChangeLog:

* gfortran.dg/array_constructor_58.f90: New test.

2 weeks agofortran: Factor array descriptor references
Mikael Morin [Mon, 21 Jul 2025 08:31:35 +0000 (10:31 +0200)] 
fortran: Factor array descriptor references

Save subexpressions of array descriptor references to variables, so that
all the expressions using the descriptor as base object benefit from a
simplified reference using the variables.

This limits the size of the expressions generated in the original tree
dump, easing analysis of the code involving those expressions.
This is especially helpful with chains of array references where each
array in the chain uses a descriptor.

After optimizations, the effect of the change shouldn't be visible in
the vast majority of cases.  In rare cases it seems to permit a couple
more jump threadings.

gcc/fortran/ChangeLog:

* trans-array.cc (gfc_conv_ss_descriptor): Move the descriptor
expression initialisation...
(set_factored_descriptor_value): ... to this new function.
Before initialisation, walk the reference expression passed as
argument and save some of its subexpressions to a variable.
(substitute_t): New struct.
(maybe_substitute_expr): New function.
(substitute_subexpr_in_expr): New function.

2 weeks agoRISC-V: Add testcase for unsigned scalar SAT_ADD form 8 and form 9
panciyan [Mon, 21 Jul 2025 01:41:31 +0000 (01:41 +0000)] 
RISC-V: Add testcase for unsigned scalar SAT_ADD form 8 and form 9

This patch adds testcase for form8 and form9, as shown below:

T __attribute__((noinline))                   \
sat_u_add_##T##_fmt_8(T x, T y)               \
{                                             \
  return x <= (T)(x + y) ? (x + y) : -1;      \
}

T __attribute__((noinline))                   \
sat_u_add_##T##_fmt_9(T x, T y)               \
{                                             \
  return x > (T)(x + y) ? -1 : (x + y);       \
}

Passed the rv64gc regression test.

Signed-off-by: Ciyan Pan <panciyan@eswincomputing.com>
gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat/sat_arith.h: Unsigned testcase form8 form9.
* gcc.target/riscv/sat/sat_u_add-8-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-8-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-8-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-8-u8.c: New test.
* gcc.target/riscv/sat/sat_u_add-9-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-9-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-9-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-9-u8.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-8-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-8-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-8-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-8-u8.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-9-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-9-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-9-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-9-u8.c: New test.

2 weeks agoAdjust 'libgomp.c++/target-cdtor-{1,2}.C' for 'targetm.cxx.use_aeabi_atexit' [PR11985...
Thomas Schwinge [Fri, 18 Jul 2025 10:56:13 +0000 (12:56 +0200)] 
Adjust 'libgomp.c++/target-cdtor-{1,2}.C' for 'targetm.cxx.use_aeabi_atexit' [PR119853, PR119854]

Fix-up for commit aafe942227baf8c2bcd4cac2cb150e49a4b895a9
"GCN, nvptx offloading: Host/device compatibility: Itanium C++ ABI, DSO Object Destruction API [PR119853, PR119854]":
we need to adjust for 'targetm.cxx.use_aeabi_atexit':

    gcc/config/arm/arm.cc:#define TARGET_CXX_USE_AEABI_ATEXIT arm_cxx_use_aeabi_atexit

    gcc/config/arm/arm.cc:/* The EABI says __aeabi_atexit should be used to register static
    gcc/config/arm/arm.cc-   destructors.  */
    gcc/config/arm/arm.cc-
    gcc/config/arm/arm.cc-static bool
    gcc/config/arm/arm.cc:arm_cxx_use_aeabi_atexit (void)
    gcc/config/arm/arm.cc-{
    gcc/config/arm/arm.cc-  return TARGET_AAPCS_BASED;
    gcc/config/arm/arm.cc-}

..., which 'gcc/cp/decl.cc:get_atexit_node' then acts on: call '__aeabi_atexit'
instead of '__cxa_atexit', and swap two arguments.

PR target/119853
PR target/119854
libgomp/
* testsuite/libgomp.c++/target-cdtor-1.C: Adjust for
'targetm.cxx.use_aeabi_atexit'.
* testsuite/libgomp.c++/target-cdtor-2.C: Likewise.

2 weeks agoDaily bump.
GCC Administrator [Mon, 21 Jul 2025 00:16:28 +0000 (00:16 +0000)] 
Daily bump.

2 weeks agolibstdc++: Export std::dextents from std.cc.in [PR121174]
Jakub Jelinek [Sun, 20 Jul 2025 06:12:57 +0000 (08:12 +0200)] 
libstdc++: Export std::dextents from std.cc.in [PR121174]

r16-442 implemented both std::extents and std::dextents (and perhaps other
stuff), but exported only std::extents.
I went through https://eel.is/c++draft/mdspan.syn and I think std::dextents
is the only one implemented but not exported.

The following patch exports it, and additionally appends some further
entities to the FIXME list, those all seems to be unimplemented yet.

2025-07-20  Jakub Jelinek  <jakub@redhat.com>

PR libstdc++/121174
* src/c++23/std.cc.in (std::dextents): Export.  Add to FIXME comments
other not yet implemented nor exported <mdspan> entities.

2 weeks agotestsuite: Fix afdo-crossmodule-1b.c [PR120859]
Andrew Pinski [Sun, 20 Jul 2025 02:11:09 +0000 (19:11 -0700)] 
testsuite: Fix afdo-crossmodule-1b.c [PR120859]

The problem here is that the testcase is part of another
testcase but dg-final does not work across source files
so it needs its own dg-* headers to that match up with
afdo-crossmodule-1.c.

Pushed as preapproved in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120859#c4 .

PR testsuite/120859
gcc/testsuite/ChangeLog:

* gcc.dg/tree-prof/afdo-crossmodule-1b.c: Add some dg-*
commands like what is in afdo-crossmodule-1.c

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2 weeks agoRISC-V: Refine the test case for vector avg_floor and avg_ceil [NFC]
Pan Li [Sat, 19 Jul 2025 02:49:15 +0000 (10:49 +0800)] 
RISC-V: Refine the test case for vector avg_floor and avg_ceil [NFC]

The previous test case doesn't leverage the right test helper macro,
it should be DEF_AVG_0_WRAP instead of DEF_AVG_0.  We prefer the
test function name is test_avg_floor_int64_t_int32_t_0 instead
of test_avg_floor_WT_NT_0 for DEF_AVG_0(WT, NT).

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i32.c:
Leverage DEF_AVG_0_WRAP to generate the correct func name.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i32-from-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i64-from-i128.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_ceil-1-i16-from-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_ceil-1-i16-from-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_ceil-1-i32-from-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_ceil-1-i64-from-i128.c: Ditto.

Signed-off-by: Pan Li <pan2.li@intel.com>
2 weeks agoRISC-V: Add ashiftrt operand 2 for vector avg_floor and avg_ceil
Pan Li [Sat, 19 Jul 2025 09:17:11 +0000 (17:17 +0800)] 
RISC-V: Add ashiftrt operand 2 for vector avg_floor and avg_ceil

According to the semantics of the avg_floor and avg_ceil as below:

floor: op0 = (narrow) (((wide) op1 + (wide) op2) >> 1);
ceil:  op0 = (narrow) (((wide) op1 + (wide) op2 + 1) >> 1);

Aka we have (const_int 1) as the op2 of the ashiftrt but seems missed.
Thus, add it back to align the definition.

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

gcc/ChangeLog:

* config/riscv/autovec.md: Add (const_int 1) as the op2 of
ashiftrt.

Signed-off-by: Pan Li <pan2.li@intel.com>
2 weeks agoDaily bump.
GCC Administrator [Sun, 20 Jul 2025 00:17:36 +0000 (00:17 +0000)] 
Daily bump.

2 weeks agopru: Use signed HOST_WIDE_INT for handling ctable addresses
Dimitar Dimitrov [Fri, 18 Jul 2025 20:45:50 +0000 (23:45 +0300)] 
pru: Use signed HOST_WIDE_INT for handling ctable addresses

The ctable base address for SBCO/LBCO load/store patterns was
incorrectly stored as unsigned integer.  That prevented matching
addresses with bit 31 set, because const_int RTL expression is expected
to be sign-extended.

Fix by using sign-extended 32-bit values for ctable base addresses.

PR target/121124

gcc/ChangeLog:

* config/pru/pru-pragma.cc (pru_pragma_ctable_entry): Handle the
ctable base address as signed 32-bit value, and sign-extend to
HOST_WIDE_INT.
* config/pru/pru-protos.h (struct pru_ctable_entry): Store the
ctable base address as signed.
(pru_get_ctable_exact_base_index): Pass base address as signed.
(pru_get_ctable_base_index): Ditto.
(pru_get_ctable_base_offset): Ditto.
* config/pru/pru.cc (pru_get_ctable_exact_base_index): Ditto.
(pru_get_ctable_base_index): Ditto.
(pru_get_ctable_base_offset): Ditto.
(pru_print_operand_address): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/pru/pragma-ctable_entry-2.c: New test.

2 weeks ago[PATCH] RISC-V: Vector-scalar widening negate-multiply-(subtract-)accumulate [PR119100]
Paul-Antoine Arras [Sat, 19 Jul 2025 14:40:14 +0000 (08:40 -0600)] 
[PATCH] RISC-V: Vector-scalar widening negate-multiply-(subtract-)accumulate [PR119100]

This pattern enables the combine pass (or late-combine, depending on the case)
to merge a float_extend'ed vec_duplicate into a (possibly negated) minus-mult
RTL instruction.

Before this patch, we have six instructions, e.g.:
  vsetivli       zero,4,e32,m1,ta,ma
  fcvt.s.h       fa5,fa5
  vfmv.v.f       v4,fa5
  vfwcvt.f.f.v   v1,v3
  vsetvli        zero,zero,e32,m1,ta,ma
  vfnmadd.vv     v1,v4,v2

After, we get only one:
  vfwnmacc.vf     v1,fa5,v2

PR target/119100

gcc/ChangeLog:

* config/riscv/autovec-opt.md (*vfwnmacc_vf_<mode>): New pattern.
(*vfwnmsac_vf_<mode>): New pattern.
* config/riscv/riscv.cc (get_vector_binary_rtx_cost): Add support for a
vec_duplicate in a neg.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c: Add vfwnmacc and
vfwnmsac.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmacc-run-1-f16.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmacc-run-1-f32.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmsac-run-1-f16.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmsac-run-1-f32.c: New test.

2 weeks ago[PATCH] RISC-V: prevent NULL_RTX dereference in riscv_macro_fusion_pair_p ()
Artemiy Volkov [Sat, 19 Jul 2025 14:03:02 +0000 (08:03 -0600)] 
[PATCH] RISC-V: prevent NULL_RTX dereference in riscv_macro_fusion_pair_p ()

> A number of folks have had their fingers in this code and it's going to take
> a few submissions to do everything we want to do.
>
> This patch is primarily concerned with avoiding signaling that fusion can
> occur in cases where it obviously should not be signaling fusion.

Hi Jeff,

With this change, we're liable to ICE whenever prev_set or curr_set are
NULL_RTX.  For a fix, how about something like the below?

Thanks,
Artemiy

Introduced in r16-1984-g83d19b5d842dad, initializers for
{prev,curr}_dest_regno can cause an ICE if the respective insn isn't a
single set.  Rectify this by inserting a NULL_RTX check before using
{prev,curr}_set.

Regtested on riscv32.

gcc/
* config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Protect
from a NULL PREV_SET or CURR_SET.

2 weeks agoAVR: Fuse get_insns with end_sequence.
Georg-Johann Lay [Sat, 19 Jul 2025 11:32:48 +0000 (13:32 +0200)] 
AVR: Fuse get_insns with end_sequence.

gcc/
* config/avr/avr-passes.cc (avr_optimize_casesi): Fuse
get_insns() with end_sequence().

2 weeks agoDaily bump.
GCC Administrator [Sat, 19 Jul 2025 00:19:41 +0000 (00:19 +0000)] 
Daily bump.

2 weeks agolibstdc++: Only define __any_input_iterator for C++20
Jonathan Wakely [Fri, 18 Jul 2025 23:08:26 +0000 (00:08 +0100)] 
libstdc++: Only define __any_input_iterator for C++20

Currently this new concept will get defined for -std=c++17 -fconcepts
but as it uses std::input_iterator, which is new in C++20, that won't
work. Guard it with __cpp_lib_concepts as well as __cpp_concepts.

libstdc++-v3/ChangeLog:

* include/bits/stl_iterator_base_types.h (__any_input_iterator):
Only define when __cpp_lib_concepts is defined.

2 weeks agoPR modula2/121164 Modula 2 build failure
Gaius Mulley [Fri, 18 Jul 2025 21:06:54 +0000 (22:06 +0100)] 
PR modula2/121164 Modula 2 build failure

This patch fixes the 2nd parameter name mismatch in
ARRAYOFCHAR.mod.

gcc/m2/ChangeLog:

PR modula2/121164
* gm2-libs/ARRAYOFCHAR.mod (Write): Rename 2nd parameter
name a to str.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2 weeks agoFortran: fix bogus runtime error with optional procedure argument [PR121145]
Harald Anlauf [Fri, 18 Jul 2025 19:12:03 +0000 (21:12 +0200)] 
Fortran: fix bogus runtime error with optional procedure argument [PR121145]

PR fortran/121145

gcc/fortran/ChangeLog:

* trans-expr.cc (gfc_conv_procedure_call): Do not create pointer
check for proc-pointer actual passed to optional dummy.

gcc/testsuite/ChangeLog:

* gfortran.dg/pointer_check_15.f90: New test.

2 weeks agotestsuite/vec: Fix vect-reduc-cond-[12].c for non vect_condition targets [PR121153]
Andrew Pinski [Fri, 18 Jul 2025 17:07:34 +0000 (10:07 -0700)] 
testsuite/vec: Fix vect-reduc-cond-[12].c for non vect_condition targets [PR121153]

I missed this when I added the two testcase vect-reduc-cond-[12].c. These testcases
require support of vectorization of `a ? b : c` which some targets (e.g. sparc) does
not support.

Pushed as obvious after a quick test.

PR testsuite/121153
gcc/testsuite/ChangeLog:

* gcc.dg/vect/vect-reduc-cond-1.c: Require vect_condition.
* gcc.dg/vect/vect-reduc-cond-2.c: Likewise.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2 weeks agolibstdc++: Remove Paolo from list of people to contact about contributing
Jonathan Wakely [Fri, 18 Jul 2025 16:44:45 +0000 (17:44 +0100)] 
libstdc++: Remove Paolo from list of people to contact about contributing

Paolo has not been active for some time.

libstdc++-v3/ChangeLog:

* doc/xml/manual/appendix_contributing.xml: Remove Paolo from
list of maintainers to contact about contributing.
* doc/html/manual/appendix_contributing.html: Regenerate.

2 weeks agolibstdc++: Document new generated header
Jonathan Wakely [Fri, 18 Jul 2025 16:43:08 +0000 (17:43 +0100)] 
libstdc++: Document new generated header

libstdc++-v3/ChangeLog:

* doc/xml/manual/build_hacking.xml: Document that
windows_zones-map.h is a generated file.
* doc/html/manual/appendix_porting.html: Regenerate.

2 weeks agoRISC-V: Support RVVDImode for avg3_ceil auto vect
Pan Li [Wed, 16 Jul 2025 13:40:14 +0000 (21:40 +0800)] 
RISC-V: Support RVVDImode for avg3_ceil auto vect

Like the avg3_floor pattern, the avg3_ceil has the
similar issue that lack of the RVV DImode support.

Thus, this patch would like to support the DImode by
the standard name, with the iterator V_VLSI_D.

The below test suites are passed for this patch series.
* The rv64gcv fully regression test.

gcc/ChangeLog:

* config/riscv/autovec.md (avg<mode>3_ceil): Add new pattern
of avg3_ceil for RVV DImode

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/avg_data.h: Adjust the test data.
* gcc.target/riscv/rvv/autovec/avg_ceil-1-i64-from-i128.c: New test.
* gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i64-from-i128.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
2 weeks agolibstdc++: Qualify addressof calls in inplace_vector [PR119137]
Tomasz Kamiński [Fri, 18 Jul 2025 13:32:04 +0000 (15:32 +0200)] 
libstdc++: Qualify addressof calls in inplace_vector [PR119137]

PR libstdc++/119137

libstdc++-v3/ChangeLog:

* include/std/inplace_vector (inplace_vector::operator=):
Qualify call to std::addressof.

2 weeks agolibstdc++: Fixed localized empty-spec formatting for months/weekdays [PR121154]
Tomasz Kamiński [Fri, 18 Jul 2025 09:30:22 +0000 (11:30 +0200)] 
libstdc++: Fixed localized empty-spec formatting for months/weekdays [PR121154]

Previously for localized output, if _M_debug option was set, the _M_check_ok
completed succesfully and _M_locale_fmt was called for months/weekdays that
are !ok().

This patch lifts debug checks from each conversion function into _M_check_ok,
that in case of !ok() values return a string_view containing the kind of
calendar data, to be included after "is not a valid" string. The localized
output (_M_locale_fmt) is not used if string is non-empty. Emitting of this
message is now handled in _M_format_to, further reducing each specifier
function.

To handle weekday (%a,%A) and month (%b,%B), _M_check_ok now accepts a
mutable reference to conversion specifier, and updates it to corresponding
numeric value (%w, %m). Extra care needs to be taken to handle a month(0)
that needs to be printed as single digit in debug format.

Finally, the _M_time_point is replaced with _M_needs_ok_check member, that
indicates if input contains any user-suplied values that are checked for
being ok() and these values are referenced in chrono-specs.

PR libstdc++/121154

libstdc++-v3/ChangeLog:

* include/bits/chrono_io.h (_ChronoSpec::_M_time_point): Remove.
(_ChronoSpec::_M_needs_ok_check): Define
(__formatter_chrono::_M_parse): Set _M_needs_ok_check.
(__formatter_chrono::_M_check_ok): Check values also for debug mode,
and return __string_view.
(__formatter_chrono::_M_format_to): Handle results of _M_check_ok.
(__formatter_chrono::_M_wi, __formatter_chrono::_M_a_A)
(__formatter_chrono::_M_b_B, __formatter_chrono::_M_C_y_Y)
(__formatter_chrono::_M_d_e, __formatter_chrono::_M_F):
Removed handling of _M_debug.
(__formatter_chrono::__M_m): Print zero unpadded in _M_debug mode.
(__formatter_duration::_S_spec_for): Remove _M_time_point refernce.
(__formatter_duration::_M_parse): Override _M_needs_ok_check.
* testsuite/std/time/month/io.cc: Test for localized !ok() values.
* testsuite/std/time/weekday/io.cc: Test for localized !ok() values.

2 weeks agoamdgcn, libgomp: Remove unused variable (PR121156)
Andrew Stubbs [Thu, 17 Jul 2025 13:30:04 +0000 (13:30 +0000)] 
amdgcn, libgomp: Remove unused variable (PR121156)

There's a new compiler warning breaking the build.  This fixes it.  The
variable appears to be genuinely vestigial.

libgomp/ChangeLog:

PR target/121156
* config/gcn/bar.c (gomp_team_barrier_wait_end): Remove unused
"generation" variable.
(gomp_team_barrier_wait_cancel_end): Likewise.

2 weeks agotree-sra: Fix grp_covered flag computation when totally scalarizing (PR117423)
Martin Jambor [Fri, 18 Jul 2025 10:42:11 +0000 (12:42 +0200)] 
tree-sra: Fix grp_covered flag computation when totally scalarizing (PR117423)

Testcase of PR 117423 shows a flaw in the fancy way we do "total
scalarization" in SRA now.  We use the types encountered in the
function body and not in type declaration (allowing us to totally
scalarize when only one union field is ever used, since we effectively
"skip" the union then) and can accommodate pre-existing accesses that
happen to fall into padding.

In this case, we skipped the union (bypassing the
totally_scalarizable_type_p check) and the access falling into the
"padding" is an aggregate and so not a candidate for SRA but actually
containing data.  Arguably total scalarization should just bail out
when it encounters this situation (but I decided not to depend on this
mainly because we'd need to detect all cases when we eventually cannot
scalarize, such as when a scalar access has children accesses) but the
actual bug is that the detection if all data in an aggregate is indeed
covered by replacements just assumes that is always the case if total
scalarization triggers which however may not be the case in cases like
this - and perhaps more.

This patch fixes the bug by just assuming that all padding is taken
care of when total scalarization triggered, not that every access was
actually scalarized.

gcc/ChangeLog:

2025-07-17  Martin Jambor  <mjambor@suse.cz>

PR tree-optimization/117423
* tree-sra.cc (analyze_access_subtree): Fix computation of grp_covered
flag.

gcc/testsuite/ChangeLog:

2025-07-17  Martin Jambor  <mjambor@suse.cz>

PR tree-optimization/117423
* gcc.dg/tree-ssa/pr117423.c: New test.

2 weeks agotree-optimization/121126 - properly verify live LC PHIs
Richard Biener [Fri, 18 Jul 2025 06:28:59 +0000 (08:28 +0200)] 
tree-optimization/121126 - properly verify live LC PHIs

The following makes sure we analyze live LC PHIs not part of
a double reduction.

PR tree-optimization/121126
* tree-vect-stmts.cc (vect_analyze_stmt): Analyze the
live lane extract for LC PHIs that are vect_internal_def.

* gcc.dg/vect/pr121126.c: New testcase.

2 weeks agolibstdc++: Fix hash<__int128> test for x32 [PR121150]
Jonathan Wakely [Fri, 18 Jul 2025 08:55:13 +0000 (09:55 +0100)] 
libstdc++: Fix hash<__int128> test for x32 [PR121150]

I incorrectly assumed that all targets that support __int128 use the
LP64 ABI, so size_t is a 64-bit type. But x32 uses ILP32 and still
supports __int128 (because it's an ILP32 target on 64-bit hardware).

Add casts to the tests so that we get the correct expected values using
size_t type.

libstdc++-v3/ChangeLog:

PR libstdc++/121150
* testsuite/20_util/hash/int128.cc: Cast expected values to
size_t.

2 weeks agolibstdc++: Implement reverse iteration for _Utf_view
Jonathan Wakely [Mon, 14 Jul 2025 19:15:12 +0000 (20:15 +0100)] 
libstdc++: Implement reverse iteration for _Utf_view

This implements the missing functions in _Utf_iterator to support
reverse iteration. All existing tests pass when the view is reversed, so
that the same code units are seen when iterating forwards or backwards.

libstdc++-v3/ChangeLog:

* include/bits/unicode.h (_Utf_iterator::operator--): Reorder
conditions and update position after reading a code unit.
(_Utf_iterator::_M_read_reverse): Define.
(_Utf_iterator::_M_read_utf8): Return extracted code point.
(_Utf_iterator::_M_read_reverse_utf8): Define.
(_Utf_iterator::_M_read_reverse_utf16): Define.
(_Utf_iterator::_M_read_reverse_utf32): Define.
* testsuite/ext/unicode/view.cc: Add checks for reversed views
and reverse iteration.

Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
2 weeks agolibstdc++: Optimize _Utf_iterator for size
Jonathan Wakely [Wed, 16 Jul 2025 23:11:49 +0000 (00:11 +0100)] 
libstdc++: Optimize _Utf_iterator for size

This reorders the data members of _Utf_iterator to avoid padding bytes
between members due to alignment requirements. For x86_64 the previous
layout had padding after _M_buf and after _M_to_increment for the common
case where the iterators and sentinel types are pointers, so the size
shrinks from 40 bytes to 32 bytes.  (For i686 there's no change, it's
still 20 bytes).

We could compress the three uint8_t members into one byte by using
bit-fields:

uint8_t _M_buf_index : 2;    // [0,3]
uint8_t _M_buf_last  : 3;    // [0,4]
uint8_t _M_to_increment : 3; // [0,4]

But there doesn't seem to be any point, because it will just be slower
to access them and there will be tail padding so the size isn't any
smaller. We could also reduce _M_buf_last and _M_to_increment to 2 bits
because the 0 value is only used for a default constructed iterator, and
we don't actually care about the values in that case. Again, this
doesn't seem worth doing.

libstdc++-v3/ChangeLog:

* include/bits/unicode.h (_Utf_iterator): Reorder data members
to be more compact.

Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
2 weeks agoRemove non-SLP path from vectorizable_live_operation
Richard Biener [Fri, 18 Jul 2025 07:37:01 +0000 (09:37 +0200)] 
Remove non-SLP path from vectorizable_live_operation

This removes paths gated by !slp_node and propagates out ncopies == 1,
thereby reducing the vectorizable_live_operation_1 API.

* tree-vect-loop.cc (vectorizable_live_operation_1):
Remove stmt_info and ncopies parameters.  Remove !slp_node
paths.
(vectorizable_live_operation): Remove !slp_node paths.

2 weeks agotree-optimization/120924 - up --param uninit-max-chain-len
Richard Biener [Fri, 18 Jul 2025 07:02:09 +0000 (09:02 +0200)] 
tree-optimization/120924 - up --param uninit-max-chain-len

The PR shows that the uninit analysis limits are set too low in
cases we lower switches to ifs as happens on s390x for a linux
kernel TU.  This causes false positive uninit diagnostics as we
abort the attempt to prove that a value is initialized on all
paths.  The new testcase only would require upping to 9.

PR tree-optimization/120924
* params.opt (uninit-max-chain-len): Up from 8 to 12.

* gcc.dg/uninit-pr120924.c: New testcase.

2 weeks agoada: Spurious actual/formal matching check failure for formal derived type.
Steve Baird [Thu, 26 Jun 2025 19:23:53 +0000 (12:23 -0700)] 
ada: Spurious actual/formal matching check failure for formal derived type.

In some cases involving a generic with two formal parameters, a formal package
and a formal derived type that is derived from an interface type declared in
the formal package, a legal instantiation of that generic is rejected with a
message incorrectly stating that the second actual parameter does not implement
the required interface.

gcc/ada/ChangeLog:

* sem_ch12.adb (Validate_Derived_Type_Instance): Cope with the case
where the ancestor type for a formal derived type is declared in
an earlier formal package but Get_Instance_Of does not return the
corresponding type from the corresponding actual package.

2 weeks agoada: Back out change to Tbuild.Unchecked_Convert_To
Bob Duff [Fri, 27 Jun 2025 16:00:54 +0000 (12:00 -0400)] 
ada: Back out change to Tbuild.Unchecked_Convert_To

...because it breaks one test that uses --RTS=light.
"Is_Composite_Type" is needed; "not Is_Scalar_Type"
was wrong.

gcc/ada/ChangeLog:

* tbuild.adb (Unchecked_Convert_To): Back out
change.

2 weeks agoada: Do not inline function returning on the secondary stack
Marc Poulhiès [Fri, 20 Jun 2025 14:10:25 +0000 (16:10 +0200)] 
ada: Do not inline function returning on the secondary stack

When inlining function calls that return on the secondary stack used as
function actual or in a return statement, the compiler creates an
invalid GNAT Tree with a variable of an unconstrained type without an
initializer.

Also add an extra assertion to catch problematic cases directly in
Expand_Inlined_Call.

gcc/ada/ChangeLog:

* exp_ch6.adb (Convert): Do not call Expand_Inlined_Call for
unsupported cases.
* inline.adb (Expand_Inlined_Call): Add assert to catch unsupported
case.

Co-authored-by: Eric Botcazou <botcazou@adacore.com>
2 weeks agoada: Incorrect resolution of prefixed calls with overriding private subprogram
Gary Dismukes [Tue, 17 Jun 2025 21:55:58 +0000 (21:55 +0000)] 
ada: Incorrect resolution of prefixed calls with overriding private subprogram

The compiler incorrectly treats an overriding private subprogram that
should not be visible outside a package (because it only overrides in
the private part) as a possible interpretation for a call using prefixed
notation outside of the package. This can result in an ambiguity if there
is another subprogram with the same name but a different profile declared
in the visible part of the package, or can result in resolving to the
private operation in cases where it shouldn't resolve. This happens due
to the compiler improperly concluding that the private overriding subprogram
overrides an inherited subprogram in the package visible part, even though
the only inherited subprogram is in the private part, as a result of
a misuse of the Overridden_Operation field, which, contrary to what
its name suggests, actually refers to operations of the parent type,
rather than to the operations derived from the parent's operations.

gcc/ada/ChangeLog:

* einfo.ads: Document new field Overridden_Inherited_Operation and
list it as a field for the entity kinds that it applies to.
* gen_il-fields.ads (type Opt_Field_Enum): Add new literal
Overridden_Inherited_Operation to the type.
* gen_il-gen-gen_entities.adb: Add Overridden_Inherited_Operation as
a field of entities of kinds E_Enumeration_Literal and Subprogram_Kind.
* sem_ch4.adb (Is_Callable_Private_Overriding): Change name (was
Is_Private_Overriding). Replace Is_Hidden test on Overridden_Operation
with test of Is_Hidden on the new field Overridden_Inherited_Operation.
* sem_ch6.adb (New_Overloaded_Entity): Set the new field
Overridden_Inherited_Operation on an operation derived from
an interface to refer to the inherited operation of a private
extension that's overridden by the derived operation. Also set
that field in the more common cases of an explicit subprogram
that overrides, to refer to the inherited subprogram that is
overridden. (Contrary to its name, the Overridden_Operation
field of the overriding subprogram, which is also set in these
places, refers to the *parent* subprogram from which the inherited
subprogram is derived.) Also, remove a redundant Present (Alias (S))
test in an if_statement and the dead "else" part of that statement.

2 weeks agoada: Elaboration entity must not be ghost in ghost generic instances
Piotr Trojanek [Thu, 26 Jun 2025 12:57:14 +0000 (14:57 +0200)] 
ada: Elaboration entity must not be ghost in ghost generic instances

For non-instance units GNAT builds elaboration entities before the ghost mode
is inherited from those units. However, for generic instances GNAT was building
elaboration entities with ghost mode inherited from those instances, which
effectively caused elaboration entities to become ghost objects.

This patch add ghost management to routine that builds elaboration entities,
which seems simpler and more robust than adjusting the ghost mode in all
callers of this routine.

gcc/ada/ChangeLog:

* sem_util.adb (Build_Elaboration_Entity): Set ghost mode to none
before creating the elaboration entity; restore the ghost mode
afterwards.

2 weeks agoada: Array aggregates of mutably tagged objects (part 2)
Javier Miranda [Tue, 17 Jun 2025 13:09:11 +0000 (13:09 +0000)] 
ada: Array aggregates of mutably tagged objects (part 2)

gcc/ada/ChangeLog:

* exp_aggr.adb (Gen_Assign): Code cleanup.
(Initialize_Component): Do not adjust the tag when the type of
the aggregate components is a mutably tagged type.

2 weeks agolibstdc++: Add std::inplace_vector for C++26 (P0843R14) [PR119137]
Jonathan Wakely [Thu, 5 Jun 2025 11:05:19 +0000 (12:05 +0100)] 
libstdc++: Add std::inplace_vector for C++26 (P0843R14) [PR119137]

Implement std::inplace_vector as specified in P0843R14, without follow
up papers, in particular P3074R7 (trivial unions). In consequence
inplace_vector<T, N> can be used inside constant evaluations only
if T is trivial or N is equal to zero.

We provide a separate specialization for inplace_vector<T, 0> to meet
the requirements of N5008 [inplace.vector.overview] p5. In particular
objects of such types needs to be empty.

To allow constexpr variable of inplace_vector v, where v.size() < v.capacity(),
we need to guaranteed that all elements of the storage array are initialized,
even ones in range [v.data() + v.size(), v.data() + v.capacity()). This is
perfoirmed by _M_init function, that is called by each constructor. By storing
the array in anonymous union, we can perform this initialization in constant
evaluation, avoiding the impact on runtime path.

The size() function conveys the information that _M_size <= _Nm to compiler,
by calling __builtin_unreachable(). In particular this allows us to eliminate
FP warnings by using _Nm - size() instead of _Nm - _M_size, when computing
available elements.

The included test cover almost all code paths at runtime, however some
compile time evaluation test are not yet implemented:
* operations on range, they depend on making testsuite_iterators constexpr
* negative test for invoking operations with preconditions at compile time,
  especially for zero size specialization.

PR libstdc++/119137

libstdc++-v3/ChangeLog:

* doc/doxygen/user.cfg.in (INPUT): Add new header.
* include/Makefile.am: Add new header.
* include/Makefile.in: Regenerate.
* include/bits/stl_iterator_base_types.h (__any_input_iterator):
Define.
* include/bits/version.def (inplace_vector): Define.
* include/bits/version.h: Regenerate.
* include/precompiled/stdc++.h: Include new header.
* src/c++23/std.cc.in: Export contents if new header.
* include/std/inplace_vector: New file.
* testsuite/23_containers/inplace_vector/access/capacity.cc: New file.
* testsuite/23_containers/inplace_vector/access/elem.cc: New file.
* testsuite/23_containers/inplace_vector/access/elem_neg.cc: New file.
* testsuite/23_containers/inplace_vector/cons/1.cc: New file.
* testsuite/23_containers/inplace_vector/cons/from_range.cc: New file.
* testsuite/23_containers/inplace_vector/cons/throws.cc: New file.
* testsuite/23_containers/inplace_vector/copy.cc: New file.
* testsuite/23_containers/inplace_vector/erasure.cc: New file.
* testsuite/23_containers/inplace_vector/modifiers/assign.cc: New file.
* testsuite/23_containers/inplace_vector/modifiers/erase.cc: New file.
* testsuite/23_containers/inplace_vector/modifiers/multi_insert.cc:
New file.
* testsuite/23_containers/inplace_vector/modifiers/single_insert.cc:
New file.
* testsuite/23_containers/inplace_vector/move.cc: New file.
* testsuite/23_containers/inplace_vector/relops.cc: New file.
* testsuite/23_containers/inplace_vector/version.cc: New file.
* testsuite/util/testsuite_iterators.h (input_iterator_wrapper::base):
Define.

Reviewed-by: Patrick Palka <ppalka@redhat.com>
Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
Co-authored-by: Tomasz Kamiński <tkaminsk@redhat.com>
Signed-off-by: Tomasz Kamiński <tkaminsk@redhat.com>
2 weeks agotree-optimization/121048 - move check for only having vector(1)
Richard Biener [Thu, 17 Jul 2025 06:51:11 +0000 (08:51 +0200)] 
tree-optimization/121048 - move check for only having vector(1)

The following moves rejecting loop vectorization with vector(1)
typed vectors from the initial vector type determining to after
SLP discovery when we can check whether there's any instance
with other than vector(1) vectors.  For RVV at least vector(1)
instances serve as a limited way to support partial loop vectorization.
The following restores this.

PR tree-optimization/121048
* tree-vect-loop.cc (vect_determine_vectype_for_stmt_1):
Remove rejecting vector(1) vector types.
(vect_set_stmts_vectype): Likewise.
* tree-vect-slp.cc (vect_make_slp_decision): Only
count instances with non-vector(1) root towards whether
we have any interesting instances to vectorize.

2 weeks agogimple-fold: Fix up big endian _BitInt adjustment [PR121131]
Jakub Jelinek [Fri, 18 Jul 2025 07:20:30 +0000 (09:20 +0200)] 
gimple-fold: Fix up big endian _BitInt adjustment [PR121131]

The following testcase ICEs because SCALAR_INT_TYPE_MODE of course
doesn't work for large BITINT_TYPE types which have BLKmode.
native_encode* as well as e.g. r14-8276 use in cases like these
GET_MODE_SIZE (SCALAR_INT_TYPE_MODE ()) and TREE_INT_CST_LOW (TYPE_SIZE_UNIT
()) for the BLKmode ones.
In this case, it wants bits rather than bytes, so I've used
GET_MODE_BITSIZE like before and TYPE_SIZE otherwise.

Furthermore, the patch only computes encoding_size for big endian
targets, for little endian we don't really adjust anything, so there
is no point computing it.

2025-07-18  Jakub Jelinek  <jakub@redhat.com>

PR tree-optimization/121131
* gimple-fold.cc (fold_nonarray_ctor_reference): Use
TREE_INT_CST_LOW (TYPE_SIZE ()) instead of
GET_MODE_BITSIZE (SCALAR_INT_TYPE_MODE ()) for BLKmode BITINT_TYPEs.
Don't compute encoding_size at all for little endian targets.

* gcc.dg/bitint-124.c: New test.

2 weeks agoDaily bump.
GCC Administrator [Fri, 18 Jul 2025 00:19:21 +0000 (00:19 +0000)] 
Daily bump.

2 weeks agogcse: Skip hardreg pre when the hardreg is never live [PR121095]
Andrew Pinski [Wed, 16 Jul 2025 16:31:35 +0000 (09:31 -0700)] 
gcse: Skip hardreg pre when the hardreg is never live [PR121095]

r15-6789-ge7f98d9603808b added a new RTL pass for hardreg PRE for the hard register
of FPM_REGNUM, this pass could get expensive if you have a large number of basic blocks
and the hard register was never live so it does nothing in the end.
In the aarch64 case, FPM_REGNUM is only used for FP8 related code so it has a high probability
of not being used. So skipping the pass for that register can improve both compile time and memory
usage.

Build and tested for aarch64-linux-gnu.

PR middle-end/121095
gcc/ChangeLog:

* gcse.cc (execute_hardreg_pre): Skip if the hardreg which is never live.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2 weeks agolibstdc++: Document change in __int128 traits [PRPR96710]
Jonathan Wakely [Thu, 17 Jul 2025 11:25:17 +0000 (12:25 +0100)] 
libstdc++: Document change in __int128 traits [PRPR96710]

libstdc++-v3/ChangeLog:

PR libstdc++/96710
* doc/xml/manual/evolution.xml: Document change or __int128.
* doc/html/manual/api.html: Regenerate.

2 weeks agolibstdc++: Fix forwarding of custom IndexType in mdspan [PR121061]
Luc Grosheintz [Wed, 16 Jul 2025 13:45:45 +0000 (15:45 +0200)] 
libstdc++: Fix forwarding of custom IndexType in mdspan [PR121061]

The second bug report in PR121061 is that the conversion of custom
OtherIndexType to IndexType is incorrectly not done via r-value
references.

This commit fixes the forwarding issue, adds a custom IndexType called
RValueInt, which only allows conversion to int via r-value reference.

PR libstdc++/121061

libstdc++-v3/ChangeLog:

* include/std/mdspan (extents::extents): Perform conversion to
index_type of an r-value reference.
(layout_left::mapping::operator()): Ditto.
(layout_right::mapping::operator()): Ditto.
(layout_stride::mapping::operator()): Ditto.
* testsuite/23_containers/mdspan/extents/custom_integer.cc: Add
tests for RValueInt and MutatingInt.
* testsuite/23_containers/mdspan/int_like.h (RValueInt): Add.
* testsuite/23_containers/mdspan/layouts/mapping.cc: Test with
RValueInt.
* testsuite/23_containers/mdspan/mdspan.cc: Ditto.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
Signed-off-by: Luc Grosheintz <luc.grosheintz@gmail.com>
2 weeks agolibstdc++: Fix constraint for custom integer types in mdspan [PR121061]
Luc Grosheintz [Wed, 16 Jul 2025 13:45:44 +0000 (15:45 +0200)] 
libstdc++: Fix constraint for custom integer types in mdspan [PR121061]

PR121061 consists of two bugs for mdspan related code. This commit fixes
the first one. Namely, when passing custom IndexType as an array or
span, the conversion to int must be const. Prior to this commit the
constraint incorrectly also allowed non-const conversion. This commit
updates all related constraints to check

  __valid_index_type<const OtherIndexType&, index_type>

in those cases. Also adds a MutatingInt to int_like.h which only
supports non-const conversion to int and updates the tests.

PR libstdc++/121061

libstdc++-v3/ChangeLog:

* include/std/mdspan (extents::extents): Fix constraint to
prevent non-const conversion to index_type.
(layout_stride::mapping::mapping): Ditto.
(mdspan::mdspan): Ditto.
(mdspan::operator[]): Ditto.
* testsuite/23_containers/mdspan/extents/custom_integer.cc: Add
test for MutatingInt.
* testsuite/23_containers/mdspan/int_like.h (MutatingInt): Add.
* testsuite/23_containers/mdspan/layouts/mapping.cc: Add test for
MutatingInt.
* testsuite/23_containers/mdspan/layouts/stride.cc: Ditto.
* testsuite/23_containers/mdspan/mdspan.cc: Ditto.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
Signed-off-by: Luc Grosheintz <luc.grosheintz@gmail.com>
2 weeks agoc++: constexpr array testcase [PR87097]
Jason Merrill [Thu, 17 Jul 2025 13:46:35 +0000 (09:46 -0400)] 
c++: constexpr array testcase [PR87097]

This seems to have been fixed by r15-7260 for PR118285, but is sufficiently
different to merit its own test.

PR c++/87097

gcc/testsuite/ChangeLog:

* g++.dg/cpp0x/constexpr-array29.C: New test.

2 weeks agolibstdc++: Refactor mdspan tests [PR121061]
Luc Grosheintz [Wed, 16 Jul 2025 13:45:43 +0000 (15:45 +0200)] 
libstdc++: Refactor mdspan tests [PR121061]

PR121061 shows that the test coverage for custom integer types is
insufficient. Custom IndexTypes are passed to mdspan related objects in
one of two ways:

  * as a template parameter pack,
  * or as an array/span.

These two cases have different requirements on the (constness of) custom
IndexTypes. Therefore, the tests are restructured as follows:

  * allow testing with different custom integers,
  * separate code that tests the two cases described above,
  * use int_like.h for all tests with custom integers.

The affected tests are for:

  * creating extents, layout_stride::mapping and mdspan from
  custom integers,

  * mapping::operator() and mdspan::operator[].

PR libstdc++/121061

libstdc++-v3/ChangeLog:

* testsuite/23_containers/mdspan/extents/custom_integer.cc:
Enable checking with different custom integers. Improve
checking non-existence of overloads for incompatible custom
integers.
* testsuite/23_containers/mdspan/layouts/mapping.cc: ditto. Also
improve reuse of int_like.h.
* testsuite/23_containers/mdspan/layouts/stride.cc: ditto.
* testsuite/23_containers/mdspan/mdspan.cc: ditto.
* testsuite/23_containers/mdspan/extents/int_like.h: Rename (old
name).
* testsuite/23_containers/mdspan/int_like.h: Rename (new name).
(ThrowingInt): Add.
(NotIntLike): Add.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
Signed-off-by: Luc Grosheintz <luc.grosheintz@gmail.com>
2 weeks agotree-ssa-structalias / pta: Fix *more* GNU coding style deviations
Filip Kastl [Thu, 17 Jul 2025 12:52:59 +0000 (14:52 +0200)] 
tree-ssa-structalias / pta: Fix *more* GNU coding style deviations

This continues my previous commit, where I fixed some deviations from
GNU coding style in pta files.  This should fix all the remaining issues
that contrib/check_GNU_style.py can detect (excluding false positives).

Commiting as obvious.

gcc/ChangeLog:

* tree-ssa-structalias.cc (lookup_vi_for_tree): Fix GNU style.
(process_constraint): Fix GNU style.
(get_constraint_for_component_ref): Fix GNU style.
(get_constraint_for_1): Fix GNU style.
(get_function_part_constraint): Fix GNU style.
(handle_lhs_call): Fix GNU style.
(find_func_aliases_for_builtin_call): Fix GNU style.
(find_func_aliases): Fix GNU style.
(find_func_clobbers): Fix GNU style.
(struct shared_bitmap_hasher): Fix GNU style.
(shared_bitmap_hasher::hash): Fix GNU style.
(pt_solution_includes_global): Fix GNU style.
(init_base_vars): Fix GNU style.
(visit_loadstore): Fix GNU style.
(compute_dependence_clique): Fix GNU style.
(struct pt_solution): Fix GNU style.
(ipa_pta_execute): Fix GNU style.

Signed-off-by: Filip Kastl <fkastl@suse.cz>