Tomasz Kamiński [Thu, 4 Dec 2025 14:28:00 +0000 (15:28 +0100)]
libstdc++: Fix debug mode for unordered containers.
The r16-5845-g8a2e6590cc4a2f changed the _Safe_container copy-assignment
to delegate to assignment of the _Base. However, _Safe_unordered_container_base
was not updated, and due the presence of move constructor, it's assignments are
deleted, causing hard error for assignment of any unordered container.
libstdc++-v3/ChangeLog:
* include/debug/safe_unordered_base.h
(_Safe_unordered_container_base::operator=): Define as
defaulted, inherit behavior of _Safe_sequence_base.
Reviewed-by: Jonathan Wakely <jwakely@redhat.com> Signed-off-by: Tomasz Kamiński <tkaminsk@redhat.com>
Richard Biener [Sun, 23 Nov 2025 13:01:03 +0000 (14:01 +0100)]
Select both inbranch and notinbranch clone during SIMD call analysis
The following recors both a possibly notinbranch and an inbranch
SIMD clone during analysis so that we can properly handle the
late decision on loop masking. Recording of linear-clause data
from analysis is extended to cover linear-clause arguments from
both clones.
This also fixes AVX512 masked loop code generation in line with
the previous fixes.
PR tree-optimization/122776
* tree-vectorizer.h (vect_simd_clone_data::clone,
vect_simd_clone_data::clone_inbranch): New fields for
the two selected clones.
* tree-vect-stmts.cc (vectorizable_simd_clone_call): Record
both a possibly notinbranch and a inbranch clone. Delay
the choice between both to code generation based on
LOOP_VINFO_FULLY_MASKED_P.
* gcc.dg/vect/vect-simd-clone-24.c: New testcase.
* gcc.dg/gomp/pr110485.c: Adjust.
Martin Jambor [Thu, 4 Dec 2025 13:18:05 +0000 (14:18 +0100)]
vrp: Infer ranges from constant aggregates with initializers (v4)
This patch adds the ability to infer ranges from loads from global
constant static aggregates which have static initializers. Even when
the load has one or more ARRAY_REFs with an unknown index and thus we
do not know the particular constant that is being loaded, we can
traverse the correponding elements of the initializer and see if we
know in what range(s) the loaed value must fall - or for pointers we
can sometimes infer that the value cannot be NULL.
I thought this was similar to fold_using_range::range_of_address and
so I decided to put my implementation alongside of it.
The differences from v3 posted in
https://inbox.sourceware.org/gcc-patches/ri6a50xjv39.fsf@virgil.suse.cz/
are:
- The walking budget is not passed around recursively and
decremented but is estimated from the size of the constant
variable, which must not be bigger than param_vrp_cstload_limit
times the size of the loaded type.
- range_from_readonly_load uses a test for INTEGER_CST tree code to
verify a tree is an integer constant and leaves all pointer checks
to tree_single_nonzero_warnv_p.
- In the testcases, all comparisons with number 666 were replaced
with tighter bounds.
The one important change compared to v2 posted in
https://inbox.sourceware.org/gcc-patches/ri6fratkchf.fsf@virgil.suse.cz/T/#u
is:
- To get at the static constructor, the patch now uses
ctor_for_folding instead of directly looking into DECL_INITIAL. In
LTO this loads the constructor on demand if necessary, and is also
capable of looking through symbol aliases, which is necessary for
example when the variable in question has been merged with another
one by IPA-ICF.
The changes compared to v1 posted in
https://inbox.sourceware.org/gcc-patches/d1bb0175-0dee-481d-8078-12e74da58787@redhat.com/T/#m974fa6138bb074a239fb2a300e1d60bc087913ad
are:
- The limiting parameter limits the number of constructor leaf
"elements" that we traverse.
- I have incorporated (hopefully) all suggestions from Richi, mainly
assuming value zero if we do not encounter a corresponding part of a
static initializer and using get_array_ctor_element_at_index to get
at an element of an array with known constant index. I tried to
emulate how it is used in fold_array_ctor_reference, I hope I got it
right.
- I have changed to code to only work for pranges and iranges for now.
I will file a bug about extending it for frange and attach a patch
to the code I'm now adding to handle frange. But as I mentioned in
an earlier email, something else will need to change too to get it
working as expected.
- I have changed range_from_readonly_load to simply work true or false
for pointers - where true means we can infer that it does not
contain NULL and false means we cannot do anything. For integers, I
have changed it to instantiate int_range<1> rather than value_range
to add another constant.
- I have introduced range_from_missing_constructor_part to handle the
cases of missing bits in a constructor.
- I have put the (now simplified) functionality of
add_loaded_invariant_to_range at the beginning of
range_from_readonly_load. That function remains recursive and walks
the memory reference expression "backwards" for reasons explained in
the previous email thread.
- The case where we need to iterate over all elements of an array was
optimized for pointers, we first check if all elements are present and
do not iterate if not. For integers, we still need to iterate, of
course.
- I have added testcases to cover situations with two-dimensional
arrays. Both when both indices are unknown and when only the second
one is (in the C-sense).
gcc/ChangeLog:
2025-11-28 Martin Jambor <mjambor@suse.cz>
* gimple-range-fold.h (class fold_using_range): New member
function range_from_readonly_var.
* gimple-range-fold.cc (fold_using_range::fold_stmt): Call
range_from_readonly_var on assignments.
(range_from_missing_constructor_part): New function.
(range_from_readonly_load): Likewise.
(fold_using_range::range_from_readonly_var): Likewise.
* params.opt (param_vrp_cstload_limit): New.
* doc/invoke.texi (vrp-cstload-limit): Likewise.
libstdc++: Convertibility of rank == 0 layouts, LWG4272.
LWG4272 proposes to add a condition for convertibility from
layout_stride::mapping to other mappings. New conversion requires
both that rank == 0 and that the extent types are convertible.
LWG4272 also proposes to add the same condition for conversion of
padded layouts, i.e. in addition to the condition on the padding
value, the extent types must be convertible.
libstdc++-v3/ChangeLog:
* include/std/mdspan (layout_left): Apply LWG4272.
(layout_right, layout_left_padded, layout_right_padded): Ditto.
* testsuite/23_containers/mdspan/layouts/ctors.cc: Add
test to check ctor uniformity at rank == 0. Update test
for new behavior.
* testsuite/23_containers/mdspan/layouts/padded.cc: Update test
for new behavior.
Co-authored-by: Tomasz Kamiński <tkaminsk@redhat.com> Signed-off-by: Luc Grosheintz <luc.grosheintz@gmail.com> Signed-off-by: Tomasz Kamiński <tkaminsk@redhat.com>
Tomasz Kamiński [Thu, 4 Dec 2025 10:25:37 +0000 (11:25 +0100)]
libstdc++: Fix node-base containers copy and move constructor in debug mode.
The fixes regression from r16-5845-g8a2e6590cc4a2f that added an move
assignment operator to the _Safe_node_sequence, and made the class both
non move and copy constructible (copy is deleted, move is not declared).
In consequence debug version of node containers, that define they copy
and move as defaulted, and inherit from above, have deleted copy and moves.
libstdc++-v3/ChangeLog:
* include/debug/safe_sequence.h
(_Safe_node_sequence::_Safe_node_sequence): Define as defaulted.
The following testcase ICEs on x86_64, because the crc_rev_optab expander
assumes the last operand will be a CONST_INT. That assumption comes from
it being created with
rtx polynomial;
if (TREE_CODE (rhs3) != INTEGER_CST)
{
error ("third argument to %<crc%> builtins must be a constant");
polynomial = const0_rtx;
}
else
polynomial = convert_to_mode (TYPE_MODE (result_type), expand_normal (rhs3), 0);
and so it doesn't bother adding a predicate for it.
Except that maybe_legitimize_operands which expand_insn calls has:
This avoids duplicate rtl and ensures that tied operands
remain tied.
This search is linear, but NOPS is bounded at compile time
to a small number (current a single digit). */
unsigned int j = 0;
for (; j < i; ++j)
if (can_reuse_operands_p (icode, opno + j, opno + i, &ops[j], &ops[i])
&& rtx_equal_p (orig_values[j], orig_values[i])
&& ops[j].value
&& insn_operand_matches (icode, opno + i, ops[j].value))
{
ops[i].value = copy_rtx (ops[j].value);
break;
}
in it, so if one of the earlier operands has equal original value to the
polynomial argument, but has a predicate like register_operand or
nonimmediate_operand, the earlier iteration forced that value into a pseudo
and when the last operand doesn't have a predicate, this happily reuses that
pseudo as the last operand. And then it either with RTL checking fails on
INTVAL use on that operand, or without rtl checking ICEs during expansion of
the insn e.g. using table lookup.
The following patch fixes it by using const_int_operand predicate for it.
That is what loongarch and riscv backends use for it too. Aarch64 doesn't
and I'll send a fix for that once tested on aarch64-linux.
2025-12-04 Jakub Jelinek <jakub@redhat.com>
PR target/122991
* config/i386/i386.md (crc_rev<SWI124:mode>si4): Use const_int_operand
predicate for the last input argument.
During get_reload_reg() a reload register may be reused and so far
exclude start hard registers were not taken into account. For the test
case this means operands 2 and 3 use the same reload register which gets
dx assigned, although, the constraint of operand 3 refers to register
r8. That in turn renders the insn unsatisfiable.
A conservative approach would be to simply not reuse any reload register
whenever the set of exclude start hard regs is non-empty. However, this
would lead to some missed optimizations like in this example where
operands 2 and 3 would land in different registers. Therefore, if both
share a start hard register, still reuse the reload and refine the
exclude start hard regs set.
I only have a test case for inputs. However, I expect an analogue
problem for outputs which is why I adapted that case, too.
gcc/ChangeLog:
* lra-constraints.cc (get_reload_reg): Honor exclude start regs
while reusing reloads.
[PR85072, LRA]: Set a limit for considering other reload pseudo preferences
Compilation of test in PR85072 takes a lot of time and memory, e.g. 17
minutes and 23 GB memory on AMD 9900X. The function in question has one million
program points and one million pseudos. The culprits are
live_reload_and_inheritance_pseudos bitmaps which are used to consider
other reload pseudo preferences when assigning a register to a given
pseudo. The patch introduces a constraint regarding when those
preferences are considered. The patch decreases compilation time to
about 10 minutes and memory consumption to about 2GB.
gcc/ChangeLog:
PR rtl-optimization/85072
* lra-assigns.cc (init_live_reload_and_inheritance_pseudos):
Improve calculation of live_reload_and_inheritance_pseudos and set
a constraint to do this.
* params.opt
(lra-max-pseudos-points-log2-considered-for-preferences): New.
* doc/invoke.texi
(lra-max-pseudos-points-log2-considered-for-preferences): Document
it.
libstdc++: Fix pretty printer lookup for class templates [PR122812]
Under some circumstances the type.name of a pair<> type starts with
"struct". This confuses GDB when we use gdb.lookup_type for the name of
template specialization using "struct pair<...>" in its template
argument list.
Using type.tag avoids this problem.
libstdc++-v3/ChangeLog:
PR libstdc++/122812
* python/libstdcxx/v6/printers.py (lookup_templ_spec): Use
gdb.Type.tag if present.
Joseph Myers [Wed, 3 Dec 2025 16:15:39 +0000 (16:15 +0000)]
testsuite: Escape \r in dg-regexp test names
When the regular expression matched in a test using dg-regexp contains
a newline (written in the source as \n inside ""), there is logic in
the testsuite to escape this so the test name after PASS: or FAIL: in
the testsuite output has \n instead of that newline.
When it contains a carriage return (from \r in the source), however,
there is no such escaping, and the test names in the .sum and .log
files thus contain a literal CR character in the middle of a test
name. The process of combining test results from parallel-run parts
of each testsuite then turns that CR into end-of-line, losing the rest
of the test name (whereas if you use runtest directly, e.g. via
contrib/test_installed, the full test name remains in the .sum file
because there is no such postprocessing). I suspect the handling of
newlines by Python (used for one of the scripts involved in combining
results) is responsible for test names getting truncated like this.
To avoid this truncation, escape CR like newlines are escaped.
Bootstrapped with no regressions for x86_64-pc-linux-gnu.
* lib/gcc-defs.exp (handle-dg-regexps): Also escape \r in output.
Jakub Jelinek [Wed, 3 Dec 2025 15:07:29 +0000 (16:07 +0100)]
switchconv: Fix up inbound checks for switch types wider than sizetype [PR122943]
In r14-8302 I've changed switchconv to narrow the CONSTRUCTOR indexes and
the runtime SSA_NAME indexing into the arrays to at most sizetype for
types wider than that (__int128, large _BitInt, for -m32 long long too).
The switchconv partitioning ensures that one partition isn't larger than
that and having CONSTRUCTOR with _BitInt(1024) indexes was causing all kinds
of problems.
Unfortunately, as the following testcase shows, while doing that is
desirable, the later gen_inbound_check call uses the lhs of m_arr_ref_first
statement to determine the type and value that should be compared for the
inbound check (against the highest possible bound cast to the lhs type).
So the PR113491 r14-8302 change broke those inbound checks, instead of
being done in unsigned type corresponding to the precision of the switch
expression they are now sometimes done using sizetype. That is of course
wrong.
So the following patch fixes it by doing the tidx computation in steps,
one is the utype subtraction, which has m_arr_ref_first as the last
instruction, and then if needed there is a cast to sizetype if utype is
wider than that. When gen_inbound_check is called, it adds the inbound
check after the m_arr_ref_first instruction and the additional cast is
then inside of the guarded block.
So e.g. in bar for -m32 this patch changes:
unsigned char bar (long long int val)
{
unsigned char result;
- sizetype _7;
+ sizetype _6;
+ long long unsigned int _7;
PR tree-optimization/122943
* tree-switch-conversion.cc (switch_conversion::build_arrays):
Always gimplify subtraction in utype without cast to tidxtype
and set m_arr_ref_first to the last stmt of that. Remove unneeded
update_stmt call. If tidxtype is not utype, append after that stmt
cast to tidxtype and set tidx to the lhs of that cast.
Andrew MacLeod [Tue, 2 Dec 2025 15:12:24 +0000 (10:12 -0500)]
Return true when a value_relation is added.
relation_oracle::record does not indicate whether a relation was added.
Add a boolean return and only update timestamps when a relation is actually
added.
PR tree-optimization/122898
gcc/
* gimple-range-fold.cc (fur_source::register_relation): Return a bool;
(fur_depend::register_relation): Ditto.
(fur_relation::register_relation): Ditto.
* gimple-range-fold.h (fur_source::register_relation): Adjust prototype.
(fur_depend::register_relation): Ditto.
* gimple-range-path.cc (jt_fur_source::register_relation): Return bool.
* value-relation.cc (equiv_oracle::add_partial_equiv): Return a bool.
(equiv_oracle::record): Return a bool.
(relation_oracle::record): Return a bool.
(dom_oracle::record): Return a bool.
(dom_oracle::set_one_relation): Remove some debug output.
(path_oracle::equiv_set): Return a bool.
(path_oracle::register_equiv): Return a bool.
(path_oracle::record): Return a bool.
* value-relation.h (relation_oracle::record): Adjust prototype.
(equiv_oracle::add_partial_equiv): Ditto
(equiv_oracle::record): Ditto.
(dom_oracle::record): Ditto.
(path_oracle::equiv_set): Ditto.
(path_oracle::register_equiv): Ditto.
(path_oracle::record): Ditto.
So one of the PHIs is completely useless. But that makes the update loop visit
the PHI twice, but the first time we already updated them so we end up with a
non-SSA_NAME there.
In the old code we'd just re-update the PHI with the same statement. So I've put
back that code as fallback. I'm almost 100% sure you can't get here with any
divergent PHI as an inviant has to be a variable before we rewrite it. But as
I'm not 100% sure I've put the update fallback instead of skipping the update.
gcc/ChangeLog:
PR tree-optimization/122969
* tree-vect-loop-manip.cc (vect_update_ivs_after_vectorizer): handle
non-ssa name IV var args.
gcc/testsuite/ChangeLog:
PR tree-optimization/122969
* gcc.dg/vect/pr122969.c: New test.
Mathias Krause [Mon, 1 Dec 2025 19:31:53 +0000 (20:31 +0100)]
i386: Generate 3-byte NOP for -mnop-mcount -m16
When generating 16-bit code via -m16, the NOP mcount code generation
emits a 5-byte NOP. However, that is neither a valid i8086 instruction
(long NOPs are PentiumPro+), nor would it get decoded as a 5-byte
instruction. It's a 4-byte 'nopw 0(%si)' followed by a zero byte. The
latter causes the following instruction to get misinterpreted as some
form of ADD.
Fix this by emiting a 3-byte no-op 'lea 0(%si)' instead which makes it
compatible with systems lacking long NOP support.
Add a test for this and change the existing one accordingly.
gccrs: Add missing test for lang item feature gate
We recently modified all tests with lang items to add the lang feature
gate switch but we did not introduce any test to check that a proper
error message is printed when this switch is not used.
Owen Avery [Sat, 29 Nov 2025 23:20:01 +0000 (18:20 -0500)]
gccrs: Improve feature handling
This fixes a false positive with undefined features, improves the
implementation of Feature::as_name, and configures the testsuite to
check further stages of libcore compilation.
gcc/rust/ChangeLog:
* ast/rust-macro.h (MetaNameValueStr::get_name): New function.
(MetaNameValueStr::get_value): Likewise.
* checks/errors/feature/rust-feature-gate.cc
(FeatureGate::visit): Tweak unknown feature detection.
(FeatureGate::gate): Handle field rename.
(FeatureGate::note_stability_attribute): New function
definition.
* checks/errors/feature/rust-feature-gate.h
(FeatureGate::note_stability_attribute): New function
declaration.
(FeatureGate::Stability): New enum class.
(FeatureGate::valid_features): Rename field to...
(FeatureGate::valid_lang_features): ...here.
(FeatureGate::valid_lib_features): New field.
(FeatureGate::defined_lib_features): Likewise.
* checks/errors/feature/rust-feature.cc (Feature::as_name):
Improve implementation.
gcc/testsuite/ChangeLog:
* rust/core/core.exp: Change -frust-compile-until=astvalidation
to -frust-compile-until=nameresolution.
* parse/rust-parse-impl.h (Parser::parse_function): Return a nullptr on
error instead of a valid function.
(Parser::parse_let_stmt): Remove non leaf error.
(Parser::parse_if_expr): Likewise.
(Parser::parse_loop_expr): Likewise.
(Parser::parse_expr): Return error on null denotation error.
This patch turns superfluous typedefs into struct forward-references,
and gets rid of a few unused macros. It also moves some definitions
from the a68-types.h header to a68-parser-scope.
Signed-off-by: Jose E. Marchesi <jemarch@gnu.org>
gcc/algol68/ChangeLog
Tamar Christina [Wed, 3 Dec 2025 10:55:40 +0000 (10:55 +0000)]
vect: delay identification of update_e until after skip_epilog [PR122959]
The testcase attached in the PR shows that for some reason
the test openmp_vv.sum when doing OpenMP offloading creates
an intermediate empty block after the skip_epilog split.
This means we should just simply delay setting update_e for
the non-early break case. For early break we have to do it
early still otherwise the skip_epilog edge would make us find
the wrong edge.
I haven't been able to replicate this on a C testcase and the
attached reduction works fine on AArch64 and x86_64 but have
been able to verify the fixed code with
./gcc/f951 -fopenmp test2.f90 -O3 -o - -march=sm_30 on an
Paul Thomas [Wed, 3 Dec 2025 09:40:26 +0000 (09:40 +0000)]
Fortran: Implement finalization PDTs [PR103371]
2025-12-03 Paul Thomas <pault@gcc.gnu.org>
gcc/fortran
PR fortran/103371
* decl.cc (gfc_get_pdt_instance): Remove the requirement that
PDT components be of the same type as the enclosing type. Apply
initializers other than the default to PDT components.
* primary.cc (gfc_match_rvalue): Make combination of the two
actual_arglists conditional on 'type_spec_list' having been
seen as well together with applying component names to all the
arguments.
* trans-decl.cc (gfc_init_default_dt): Add 'pdt_ok' to the args
and use it to signal that a PDT can be default initialized.
(gfc_init_default_pdt): New function to check that a pdt is OK
for default intialization before calling gfc_init_default_dt.
(gfc_trans_deferred_vars): Use gfc_init_default_pdt.
* trans.h: Add bool 'pdt_ok' to prototype with defaul value of
false.
gcc/testsuite
PR fortran/103371
* gfortran.dg/pdt_71.f03: New test.
Jakub Jelinek [Wed, 3 Dec 2025 09:01:08 +0000 (10:01 +0100)]
cobol: Fix up help.exp failures
I'm seeing a new failure
FAIL: compiler driver --help=warnings option(s): "^ +-.*[^:.]\$" absent from output: " -Wapply-commit Warn if APPLY COMMIT is used "
after the last cobol/lang.opt changes.
The
make check-gcc RUNTESTFLAGS=help.exp
test verifies among other things that all the option descriptions
(which aren't omitted) are terminated with dot, so that they are consistent.
Seems most of the COBOL option descriptions violate this.
2025-12-03 Jakub Jelinek <jakub@redhat.com>
* lang.opt: Make sure all option descriptions are terminated with
a dot.
(preprocess): Capitalize first letter of option description.
* include/Makefile.am (debug_headers): Add inplace_vector.
* include/Makefile.in: Regenerate.
* include/debug/functions.h (__check_valid_range): Add C++20 constexpr.
* include/debug/helper_functions.h (__valid_range): Likewise.
* include/debug/inplace_vector: New.
* include/debug/safe_base.h (~_Safe_sequence_base()): Add C++11 noexcept.
(_Safe_sequence_base::operator=(const _Safe_sequence_base&)): New.
(_Safe_sequence_base::operator=(_Safe_sequence_base&&)): New.
(_Safe_sequence_base::_M_invalidate_all): Add C++20 constexpr.
* include/debug/safe_container.h
(_Safe_container<>::operator=(const _Safe_container<>&)): Implement using
_Safe_sequence_base same operator.
* include/debug/safe_iterator.h (__valid_range): Add C++20 constexpr.
* include/debug/safe_sequence.h
(_Not_equal_to(const _Type&)): Add C++20 constexpr.
(_Equal_to(const _Type&)): Add C++20 constexpr.
(_After_nth_from(const difference_type&, const _Iterator&)): Add C++20 constexpr.
(_Safe_sequence<>::_M_invalidate_if): Add C++20 constexpr.
(_Safe_node_sequence::operator=(const _Safe_node_sequence&)): New.
(_Safe_node_sequence::operator=(_Safe_node_sequence&&)): New.
(_Safe_node_sequence<>::_M_invalidate_all()): Add C++20 constexpr.
* include/debug/safe_sequence.tcc
(_Safe_sequence<>::_M_invalidate_if): Add C++20 constexpr.
* include/std/inplace_vector [_GLIBCXX_DEBUG](std::inplace_vector<>): Move
implementation into __cxx1998 namespace.
(erase, erase_if): Limit to non-debug inplace_vector<>, cleanup code.
[_GLIBCXX_DEBUG]: Add include <debug/inplace_vector>.
* testsuite/23_containers/inplace_vector/cons/1.cc: Adapt, skip several
is_trivially_xxx checks when in _GLIBCXX_DEBUG mode.
* testsuite/23_containers/inplace_vector/copy.cc: Likewise.
* testsuite/23_containers/inplace_vector/move.cc: Likewise.
* testsuite/23_containers/inplace_vector/debug/assign1_neg.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/assign2_neg.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/assign3_neg.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/assign4_backtrace_neg.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/assign4_neg.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/construct1_neg.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/construct2_neg.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/construct3_neg.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/construct4_neg.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/debug_functions.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/erase.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/insert1_neg.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/insert2_neg.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/insert3_neg.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/insert4_neg.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/insert5_neg.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/insert7_neg.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/invalidation/1.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/invalidation/2.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/invalidation/3.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/invalidation/4.cc: New test case.
* testsuite/23_containers/inplace_vector/debug/invalidation/append_range.cc:
New test case.
* testsuite/23_containers/inplace_vector/debug/invalidation/erase.cc:
New test case.
* testsuite/23_containers/inplace_vector/debug/invalidation/pop_back.cc:
New test case.
* testsuite/23_containers/inplace_vector/debug/invalidation/push_back.cc:
New test case.
* testsuite/23_containers/inplace_vector/debug/invalidation/swap.cc:
New test case.
* testsuite/23_containers/inplace_vector/debug/invalidation/try_append_range.cc:
New test case.
* testsuite/23_containers/inplace_vector/debug/invalidation/try_emplace_back.cc:
New test case.
* testsuite/23_containers/inplace_vector/debug/invalidation/try_push_back.cc:
New test case.
* testsuite/23_containers/inplace_vector/debug/invalidation/unchecked_emplace_back.cc:
New test case.
* testsuite/util/debug/checks.h: Avoid using _GLIBCXX_DEBUG containers in test
implementations.
hppa: Break out large REG+D addresses from MEM operands
Fixes unrecognizable instruction in binutils build with LRA enabled.
2025-12-02 John David Anglin <danglin@gcc.gnu.org>
gcc/ChangeLog:
PR target/122874
* config/pa/pa.cc (pa_emit_move_sequence): Break out large
REG+D addresses from MEM operands. Also, don't allow
unscaled indexed source operands till reload completes.
Robin Dapp [Tue, 2 Dec 2025 20:00:51 +0000 (13:00 -0700)]
[PATCH] RISC-V: Make vlsegff similar to vleff [PR122656].
When we expand
void d() { __riscv_vlseg2e32ff_v_i32mf2x2(&a, &c, b); }
without a destination register we ICE because
use_exact_insn wrongly adds arguments that we don't need and
gcc_assert (opno == insn_data[icode].n_generator_args);
triggers.
Currently we expand a segmented fault-only-first load via use_exact_insn
because its insn pattern wants a Pmode register as source. We can't go
the use_contiguous_load route because that one adds a vector-mode memory
operand.
It doesn't need to be like that, though, and this patch makes the
segmented load similar to the regular FoF load in terms of source
operand. Also the patch only adds additional expansion arguments like
the rounding mode only if the insn needs it and the number of operands is
less than what we need, not unequal.
Regtested on rv64gcv_zvl512b.
Regards
Robin
PR target/122656
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc: Use
use_contiguous_load for vlsegff.
* config/riscv/riscv-vector-builtins.cc (function_expander::use_exact_insn):
Only add rounding mode operand if insn requires it and number of
arguments is < required.
(function_expander::use_ternop_insn): Ditto.
(function_expander::use_widen_ternop_insn): Ditto.
* config/riscv/vector.md: Use vector-mode source operand.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/pr122656-1.c: New test.
* gcc.target/riscv/rvv/base/pr122656-2.c: New test.`
1. The upstream sources do not, in general, support the range
of Darwin versions covered by GCC.
In order to support versions back to Darwin17, at least we
provide definitions for missing macro values and ensure that
headers are only conditionally included where they apply.
2. GCC does not support the clang __builtin_os_log_format and
therefore must fall back to older reporting methods.
3. Finally, we address a FIXME (for missing Blocks support)
used implement the search for dyld on macOS >= 13 with the
dyld_shared_cache_iterate_text() interface which requires an
(Apple) Block closure as a parameter.
If the compiler supports blocks (__BLOCKS__ is defined) then we
use the upstream implementation. If not, then we synthesize the
equivalent code-gen manually.
Implements submdspan_canonicalize_slices as described in P3663 and adds
it to the std module.
There's one deviation from the standard. Doesn't (under all
circumstances) require:
0 <= begin[k] <= end[k] <= exts.extent(k)
where the k-th slice range is [begin[k], end[k]). Instead, it requires
that the k-th slice ranges is contained in the k-th extent interval. If
the slice range is empty, then that condition is always satisfied, even if
begin[k] == end[k] > exts.extent(k)
The deviation is that we enforce the above inequality through
preconditions. This is analogous to what the standard requires if
begin[k] is a constant wrapper.
PR libstdc++/110352
libstdc++-v3/ChangeLog:
* include/std/mdspan (submdspan_canonicalize_slices): New
function.
* src/c++23/std.cc.in (submdspan_canonicalize_slices): Add.
* testsuite/23_containers/mdspan/submdspan/submdspan_canonicalize_slices.cc: New test.
* testsuite/23_containers/mdspan/submdspan/submdspan_canonicalize_slices_neg.cc: New test.
Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com> Signed-off-by: Luc Grosheintz <luc.grosheintz@gmail.com>
Kito Cheng [Tue, 2 Dec 2025 13:40:06 +0000 (06:40 -0700)]
RISC-V: Remove unused placeholder_p parameter from add_function
The placeholder_p parameter of function_builder::add_function is always
passed as false. This was inherited from the AArch64 implementation but
is unnecessary for RISC-V.
Jakub Jelinek [Tue, 2 Dec 2025 13:36:49 +0000 (14:36 +0100)]
c++: Diagnose taking addresses of hard reg vars in their initializers [PR122860]
DECL_HARD_REGISTER is set only in cp_finish_decl together with
set_user_assembler_name. If user attempts to take address of
such a var later, cxx_mark_addressable diagnoses it.
But if as in the following testcase the address is taken in its
initializer, we just ICE during expansion.
The following patch fixes it by emitting errors if TREE_ADDRESABLE
at the point we'd otherwise set DECL_HARD_REGISTER on it.
2025-12-02 Jakub Jelinek <jakub@redhat.com>
PR c++/122860
* decl.cc (make_rtl_for_nonlocal_decl): Diagnose taking address
of a hard register decl in its initializer.
(cp_finish_decl): Likewise.
Jason Merrill [Tue, 2 Dec 2025 12:48:39 +0000 (18:18 +0530)]
c++: alias template parm conv and redecl [PR122171]
Here when substituting BITS into poly_table convert_template_argument adds
an IMPLICIT_CONV_EXPR to represent the conversion to the alias template
parameter. In r16-4115 I extended that to value-dependent arguments as well
as type-dependent, in case the conversion turns out to be narrowing.
tsubst_expr needs the same change so maybe_update_decl_type doesn't
replace the IMPLICIT_CONV_EXPR with a NOP_EXPR.
The do_auto_deduction change is to avoid a regression in nontype-auto21.C
when the first test is changed from uses_template_parms (as it was in
convert_template_argument) to dependent_type_p; this mattered because we
were failing to resolve the auto return type before deducing the auto
non-type parameter type from helper<token>::c. Many other places that call
resolve_nondeduced_context similarly then call mark_single_function.
PR c++/122171
PR c++/112632
gcc/cp/ChangeLog:
* pt.cc (dependent_implict_conv_p): Split out...
(convert_template_argument): ...from here.
(tsubst_expr) [IMPLICIT_CONV_EXPR]: Use it.
(do_auto_deduction): Call mark_single_function.
Nathaniel Shead [Mon, 1 Dec 2025 23:24:01 +0000 (10:24 +1100)]
c++/modules: Remove incorrect is_import check in using-directives
When I wrote this check in r16-5811 I was thinking of checking if the
using-directive was imported, but this just checks if the target
namespace was imported, which is not what we want. We don't build deps
to see if the using-directive itself was imported, so just remove the
check. I haven't been able to come up with a testcase this breaks but
it still seems reasonable to adjust.
Tamar Christina [Tue, 2 Dec 2025 10:55:51 +0000 (10:55 +0000)]
vect: don't hoist conditional loads above their condition [PR122868]
The example in the PR
#include <vector>
std::vector<bool> x, y;
int main() { return x == y; }
now vectorizes but the attributes on std::vector indicate that the vector is
aligned to the natural vector alignment. In C this is equivalent to the
testcase
int f (int a[12], int b[12], int n)
{
a = __builtin_assume_aligned (a, 16);
b = __builtin_assume_aligned (b, 16);
for (int i = 0; i < n; i++)
{
if (b[i] == 0)
return 0;
if (a[0] > b[i])
return 1;
}
return 2;
}
Here the load a[0] is loop invariant, and the vectorizer hoists this out of the
loop into the pre-header. For early break this isn't safe to do as a[0] is
conditionally valid based on the conditions in the block preceding it. As such
we need some guarantee that the load is valid before we can hoist it or the load
needs to be unconditional (e.g. in the loop header block).
Conceptually alignment peeling can provide this guarantee since making it
through the prologue means the invariant value was loaded at least once and so
we know the address is valid. At the moment however there's no real defined
order between how GCC inserts conditions in the pre-header, so having tried to
change the order a few times the load always ends up before the prologue. So
for now I marked it as a missed optimization.
Since we still can hoist invariant loads if in the header, I didn't change
LOOP_VINFO_NO_DATA_DEPENDENCIES since that would be global and instead I
modified the usage site of LOOP_VINFO_NO_DATA_DEPENDENCIES.
PR tree-optimization/122868
* gcc.dg/vect/vect-early-break_140-pr122868_1.c: New test.
* gcc.dg/vect/vect-early-break_140-pr122868_2.c: New test.
* gcc.dg/vect/vect-early-break_140-pr122868_3.c: New test.
* gcc.dg/vect/vect-early-break_140-pr122868_4.c: New test.
Alexandre Oliva [Tue, 2 Dec 2025 02:58:43 +0000 (23:58 -0300)]
hard-reg-set: use ctz for iteration
Simplify the HARD_REG_SET iteration, using ctz and avoiding some
unnecessary operations.
for gcc/ChangeLog
* hard-reg-set.h (hard_reg_set_iter_init): Drop unnecessary
increment of min.
(hard_reg_set_iter_set): Use ctz_hwi, and compute
word-advanced regno from word_no.
(hard_reg_set_iter_next): Only clear the cached LSB.
MIPS: Add Allegrex support for madd/msub instructions.
Tweaking mul_acc_si/mul_sub_si was necessary to fix the implicit
assumption that CPUs with madd/msub support also support MUL3
multiplication. This disables the non-existent alternative if the CPU
does not have proper MUL3 support. This issue exists also for other CPUs
(ie. using -march=mips1 with -mimadd fails).
gcc/ChangeLog:
* config/mips/mips.h (ISA_HAS_MADD_MSUB): Include allegrex.
* config/mips/mips.md: Tweak mul_acc_si/mul_sub_si to make it
work when MUL3 is not available.
gcc/testsuite/ChangeLog:
* gcc.target/mips/madd-10.c: New test.
* gcc.target/mips/maddu-5.c: New test.
* gcc.target/mips/msub-9.c: New test.
* gcc.target/mips/msubu-5.c: New test.
Signed-off-by: David Guillen Fandos <david@davidgf.net>
* config/mips/mips.h (ISA_HAS_WSBW): Defined a new macro.
* config/mips/mips.md (bswapsi2): Add new instruction.
(wsbwsi2): Replace with expand to support both wsbw and wsbh.
gcc/testsuite/ChangeLog:
* gcc.target/mips/bswap-7.c: New test.
Signed-off-by: David Guillen Fandos <david@davidgf.net>
MIPS: Add support for Allegrex min/max instructions
gcc/ChangeLog:
* config/mips/mips.h (ISA_HAS_MIN_MAX): Defined a new macro.
* config/mips/mips.md (sminsi3): Defined a new instruction.
(smaxsi3): Defined a new instruction.
gcc/testsuite/ChangeLog:
* gcc.target/mips/max-1.c: New test.
* gcc.target/mips/min-1.c: New test.
Signed-off-by: David Guillen Fandos <david@davidgf.net>
The MIPS Allegrex CPU is based on MIPS2 with some additional MIPS32r2
instructions and a few novel ones. Support for this CPU was added as of
binutils 2.41.
gcc/ChangeLog:
* config/mips/mips-cpus.def (MIPS_CPU): Added a new CPU.
* config/mips/mips-tables.opt: Regenerated table.
* config/mips/mips.cc: Added cost table for the new CPU.
* config/mips/mips.h (TARGET_ALLEGREX): Defined a new macro.
(TUNE_ALLEGREX): Defined a new macro.
(ISA_HAS_CONDMOVE): Added Allegrex CPU to the list.
(ISA_HAS_LDC1_SDC1): Exclude Allegrex from the list.
(ISA_HAS_COND_TRAP): Exclude Allegrex from the list.
(ISA_HAS_COND_TRAPI): Exclude Allegrex from the list.
(ISA_HAS_CLZ_CLO): Added Allegrex CPU to the list.
(ISA_HAS_ROR): Added Allegrex CPU to the list.
(ISA_HAS_WSBH): Added Allegrex CPU to the list.
(ISA_HAS_SEB_SEH): Added Allegrex CPU to the list.
(ISA_HAS_EXT_INS): Added Allegrex CPU to the list.
(ISA_HAS_XFER_DELAY): Exclude Allegrex from the list.
(ISA_HAS_HILO_INTERLOCKS): Added Allegrex CPU to the list.
* config/mips/mips.md: Added Allegrex CPU as a new processor.
* doc/invoke.texi: Documented Allegrex as a new arch
Signed-off-by: David Guillen Fandos <david@davidgf.net>
Saurabh Jha [Thu, 20 Nov 2025 15:14:24 +0000 (15:14 +0000)]
aarch64: mingw: Implement support for variadic ABI
The aarch64-w64-mingw32 target is different from aarch64-**-linux-gnu
targets with respect to how arguments for variadic functions are
handled. Specifically:
1. Homogeneous Floating-Point Aggregate (HFA) and Homogeneous Vector
Aggregate (HVA) are not handled in a special way. They are handled
like other composite types.
2. SIMD and Floating-Point registers aren't used.
This patch implements these differences for the aarch64-w64-mingw32
target. The new ABI specific functions to be used in target hooks are
declared in aarch64-abi-ms-protos.h and defined aarch64-abi-ms.cc. We
identify whether we are on aarch64-w64-mingw32 by the
TARGET_AARCH64_MS_ABI macro.
gcc/ChangeLog:
* config.gcc: Add new Makefile fragment and new object file.
* config/aarch64/aarch64-builtins.cc
(aarch64_ms_variadic_abi_init_builtins): Initialize builtin
variadic functions for aarch64-w64-mingw32.
* config/aarch64/aarch64-protos.h
(aarch64_ms_variadic_abi_init_builtins): Initialize builtin
variadic functions for aarch64-w64-mingw32.
* config/aarch64/aarch64.cc
(handle_aarch64_vector_pcs_attribute): Add support for
ARM_PCS_MS_VARIADIC.
(aarch64_ms_variadic_abi): Return descriptor to variadic
function call ABI for aarch64-w64-mingw32 target.
(aarch64_fntype_abi): Add support for variadic functions for
aarch64-w64-mingw32 target.
(aarch64_reg_save_mode): Add support for ARM_PCS_MS_VARIADIC.
(num_pcs_arg_regs): Add support for ARM_PCS_MS_VARIADIC.
(get_pcs_arg_reg): Add support for ARM_PCS_MS_VARIADIC.
(aarch64_arg_size): Returns size of argument.
(aarch64_ms_variadic_abi_layout_arg): aarch64-w64-mingw32
specific support for variadic ABI.
(aarch64_layout_arg): Add support for ARM_PCS_MS_VARIADIC.
(aarch64_function_arg): Implement TARGET_FUNCTION_ARG.
(aarch64_function_arg_advance): Add support for
ARM_PCS_MS_VARIADIC.
(aarch64_function_arg_regno_p): Add support for
ARM_PCS_MS_VARIADIC.
(aarch64_init_builtins): Add support for TARGET_AARCH64_MS_ABI.
(aarch64_ms_variadic_abi_build_builtin_va_list): Setup va_list
for aarch64-w64-mingw32.
(aarch64_build_builtin_va_list): Add support for
TARGET_AARCH64_MS_ABI.
(aarch64_ms_variadic_abi_expand_builtin_va_start): Implement
TARGET_BUILD_BUILTIN_VA_START.
(aarch64_setup_incoming_varargs): Implement
TARGET_SETUP_INCOMING_VARARGS.
(aarch64_mangle_type): Implement TARGET_MANGLE_TYPE.
(aarch64_variadic_abi_strict_argument_naming): Implement
TARGET_STRICT_ARGUMENT_NAMING.
* config/aarch64/aarch64.h
(aarch64_frame): Add new field
unaligned_saved_varargs_size.
(enum arm_pcs): Add new enum option
ARM_PCS_MS_VARIADIC.
* config/aarch64/cygming.h
(SUBTARGET_ATTRIBUTE_TABLE): Add support for ms_abi.
* config/mingw/winnt.cc
(aarch64_handle_ms_abi_attribute): Handle ms_abi attribue.
* config/mingw/winnt.h
(aarch64_handle_ms_abi_attribute): Handle ms_abi attribute.
* config/aarch64/aarch64-abi-ms-protos.h:
(aarch64_arg_partial_bytes): Declare.
(aarch64_ms_variadic_abi_canonical_va_list_type): Declare.
(aarch64_ms_variadic_abi_enum_va_list): Declare.
(aarch64_ms_variadic_abi_fn_abi_va_list): Implement
TARGET_FN_ABI_VA_LIST.
* config/aarch64/aarch64-abi-ms.cc:
(aarch64_arg_partial_bytes): Implement TARGET_ARG_PARTIAL_BYTES.
(aarch64_ms_variadic_abi_canonical_va_list_type): Implement
TARGET_CANONICAL_VA_LIST_TYPE.
(aarch64_ms_variadic_abi_enum_va_list): Implement
TARGET_ENUM_VA_LIST_P.
(aarch64_ms_variadic_abi_fn_abi_va_list): Implement
TARGET_FN_ABI_VA_LIST.
* config/aarch64/t-aarch64-mingw: New Makefile fragment.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/mingw/variadic_hfa.c: New test.
* gcc.target/aarch64/mingw/variadic_hva.c: New test.
* gcc.target/aarch64/mingw/variadic_int.c: New test.
Saurabh Jha [Thu, 9 Oct 2025 15:03:18 +0000 (15:03 +0000)]
aarch64: mingw: Make long double 64 bit
On windows targets, the size of long double is 64 bits. Therefore,
unlike aarch64-**-linux-gnu, where the size of long double is 128
bits, the size of long double for aarch64-w64-mingw32 has to be 64
bits.
This commit makes changes to gcc so that long double is 64 bits for
aarch64-w64-mingw32.
gcc/ChangeLog:
* config/aarch64/aarch64-abi-ms.h
(TARGET_LONG_DOUBLE_128): Set this to 0.
* config/aarch64/aarch64.cc
(aarch64_scalar_mode_supported_p): Make long double 64 bits.
(aarch64_c_mode_for_floating_type): Return true for TFmode.
* config/aarch64/aarch64.h
(TARGET_LONG_DOUBLE_128): Set this to 1.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/mingw/mingw.exp: New test.
* gcc.target/aarch64/mingw/long_double_size.c: New test.
co-authored-by: Radek Barton <radek.barton@microsoft.com>
co-authored-by: Martin Vejbora <mvejbora@microsoft.com>
Saurabh Jha [Thu, 9 Oct 2025 14:04:45 +0000 (14:04 +0000)]
aarch64: mingw: emit seh_endproc as comment
For mingw targets, there is no way to identify the end of function using
assembly directives right now.
This patch adds such directive as a comment. This is not a real
directive because some other things, like Structured Exception Handling
(SEH), needs to be supported before we can emit a real directive.
However, emitting an end of function marker now will let us modify
check-function-bodies in scanasm.exp, which in turn enables us to write
dg-compile tests for mingw target.
gcc/ChangeLog:
* config/aarch64/aarch64-abi-ms.h
(ASM_COMMENT_START): Specify start of comment.
(ASM_OUTPUT_TYPE_DIRECTIVE): Moved from aarch64-coff.h.
(ASM_DECLARE_FUNCTION_SIZE): Specify end of function as comment.
* config/aarch64/aarch64-coff.h
(ASM_OUTPUT_TYPE_DIRECTIVE): Moved to aarch64-abi-ms.h.
(ASM_DECLARE_FUNCTION_SIZE): Moved to aarch64-abi-ms.h.
Nathaniel Shead [Mon, 1 Dec 2025 13:43:18 +0000 (00:43 +1100)]
c++/modules: Stream DECL_CHAIN for decl_specialization_friend_p functions
r16-5298 attached the owning class for a friend template specialisation
on its DECL_CHAIN. However we don't stream DECL_CHAIN in general to
avoid walking into unrelated entities on the scope chain; this patch
adds a special case for these functions to ensure we don't lose this
information.
Ideally this would occur in trees_{out,in}::core_vals, but we can't
check decl_specialization_friend_p until after DECL_TEMPLATE_INFO has
been streamed, hence the slightly unusual placement.
gcc/cp/ChangeLog:
* module.cc (trees_out::lang_decl_vals): Stream DECL_CHAIN for
decl_specialization_friend_p functions.
(trees_in::lang_decl_vals): Likewise.
gcc/testsuite/ChangeLog:
* g++.dg/modules/friend-12_a.C: New test.
* g++.dg/modules/friend-12_b.C: New test.
Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com> Reviewed-by: Jason Merrill <jason@redhat.com>
Nathaniel Shead [Mon, 1 Dec 2025 12:32:40 +0000 (23:32 +1100)]
c++/modules: Fix ICE when writing imported using-directive [PR122915]
The crash in the PR is caused because we are attempting to write a
using-directive that we never made a dep for. This should only happen
for imported using-directives, where if we never opened the relevant
namespace in the module purview we don't think there's anything
interesting to discover and so never walk it.
There's actually no reason we need to emit imported using-directives at
all, however, unless they came from a partition, because importers will
be able to get that directive directly from the originating module if it
was going to be visible anyway. And we will always walk and create a
dependency (marked !import_p) for partition decls. So this patch fixes
the ICE by just skipping such cases.
To help validate this the patch also starts setting DECL_MODULE_IMPORT_P
correctly for using-directives.
PR c++/122915
gcc/cp/ChangeLog:
* module.cc (module_state::write_using_directives): Don't emit
imported using-directives.
(module_state::read_using_directives): Rename
add_using_namespace to add_imported_using_namespace.
* name-lookup.cc (add_using_namespace): Handle imported
using-directives.
(add_imported_using_namespace): Rename to match new
functionality.
* name-lookup.h (add_using_namespace): Rename to...
(add_imported_using_namespace): ...this.
gcc/testsuite/ChangeLog:
* g++.dg/modules/namespace-16_a.C: New test.
* g++.dg/modules/namespace-16_b.C: New test.
* g++.dg/modules/namespace-16_c.C: New test.
* g++.dg/modules/namespace-16_d.C: New test.
Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com> Reviewed-by: Jason Merrill <jason@redhat.com>
Nathaniel Shead [Sun, 30 Nov 2025 03:43:33 +0000 (14:43 +1100)]
c++/modules: Fix assertion in write_function_def for DECL_LOCAL_DECL_P
I hadn't retested r16-5727-g858f3007278337 on trunk before pushing and
I'd missed that it interacts badly with the assertion added by r16-5305-gc38bf35f0c7fa1. This adjusts the assertion to not check OMP
user-defined reductions (as they won't have import_export_decl called on
them anyway).
PR c++/119864
PR c++/122939
gcc/cp/ChangeLog:
* module.cc (trees_out::write_function_def): Don't crash on
OMP used-defined type reduction function definitions.
Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com> Reviewed-by: Patrick Palka <ppalka@redhat.com>
Peter Bergner [Mon, 1 Dec 2025 23:03:44 +0000 (16:03 -0700)]
[PATCH][PR target/122942] RISC-V: Add zifencei extension to the rva23s64 and rvb23s64 profiles [PR122942]
While verifying our Ascalon extensions list was complete (it isn't, follow-on
patch coming), I noticed that the rva23s64 and rvb23s64 profiles were missing
the mandatory zifencei extension, hence the following patch.
This was bootstrapped and regtested with no regressions.
Ok for trunk?
Peter
The RVA23S64 and RVB23S64 profiles both state that zifencei is a mandatory
extension. Add it to both profiles.
doc: add mention to Algol 68 in the Installing GCC manual
The "Downloading the source" sectio in the "Installing GCC" manual
mentions all the compilers distributed within the GCC source
distribution. This patch adds mentions to the ga68 compiler and its
libga68 run-time library.
Care is taken to describe the Algol 68 compiler as experimental,
according to the stipulations agreed with the SC.
Signed-off-by: Jose E. Marchesi <jemarch@gnu.org>
gcc/ChangeLog
* doc/install.texi (Downloading the source): Mention Algol 68.
Patrick Palka [Mon, 1 Dec 2025 22:08:01 +0000 (17:08 -0500)]
libstdc++: Inconsistent const in flat_map's value_type [PR122921]
flat_map's value_type is pair<key_type, mapped_type>, which we correctly
define within the container but incorrectly within the iterator.
PR libstdc++/122921
libstdc++-v3/ChangeLog:
* include/std/flat_map (_Flat_map_impl::_Iterator::value_type):
Remove const from key_type to make consistent with the
container's value_type.
* testsuite/23_containers/flat_map/1.cc (test09): New test.
* testsuite/23_containers/flat_multimap/1.cc (test09): New test.
Reported-by: Vincent X Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
Christophe Lyon [Wed, 26 Nov 2025 13:03:37 +0000 (13:03 +0000)]
arm: Fix constraints in MVE asrl and lsll patterns [PR122858]
The second alternative for operand 1 needs a new constraint which does
not overlap with Pg, except that it can handle 32 to generate an
optimal mov.
This patch introduces a new Ph constraint which has the [32..255]
range.
This fixes a lot of regressions when running the testsuite for an MVE
target such as -march=armv8.1-m.main+mve.fp+fp.dp -mfloat-abi=hard.
gcc/ChangeLog:
PR target/122858
* config/arm/constraints.md (Ph): New constraint.
* config/arm/mve.md (mve_asrl_imm, mve_lsll_imm): Fix constraints
of operand 1 and handle 32 as special shift amount.
gcc/testsuite/ChangeLog:
PR target/122858
* gcc.target/arm/mve/pr122858.c: New test.
fortran: Honor array constructor type-spec during folding [PR107721]
When an array constructor has an explicit type-spec, all elements must be
converted to that type and character elements must be padded/truncated to
the specified length. This was working for simple cases but failing when:
1. Elements were parenthesized: [integer :: ([1.0])]
2. Constructors were nested: [[integer :: [1.0]]]
3. Character constructors were used with concatenation operators:
[character(16) :: 'a', 'b'] // '|'
4. Nested character constructors with concatenation:
[character(16) :: ['a', 'b']] // '|'
5. Outer constructor without type-spec wrapping inner with type-spec:
[[character(16) :: ['a', 'b']]] // '|'
6. Nested character constructors with different type-specs:
[character(16) :: [character(2) :: 'abcd']]
The root cause was twofold:
First, parenthesized expressions like ([1.0]) create EXPR_OP nodes that were
not being simplified before type conversion in check_constructor_type(),
so type conversion was applied to the EXPR_OP rather than its contents.
Second, character array constructors with explicit type-spec were not being
resolved before CONCAT operations in eval_intrinsic(), so elements retained
their original lengths instead of being padded to the type-spec length.
Additionally, nested array constructors needed their type-spec propagated
from the outer constructor.
The fix adds:
- Simplification of non-constant expressions in check_constructor_type()
before attempting type conversion
- Call to gfc_check_constructor_type() in eval_intrinsic() to ensure
type-spec conversion happens before any operations on array constructors
- Character array constructor resolution before CONCAT operations
- Recursive type-spec propagation for nested array constructors.
When a nested array constructor has its own explicit type-spec, it is
resolved first to enforce its own length (truncation/padding) before
propagating the outer type-spec and resolving again.
- Detection of nested character constructors with explicit type-spec
(via length_from_typespec) when the outer constructor has no type-spec
PR fortran/107721
PR fortran/102417
gcc/fortran/ChangeLog:
* arith.cc (eval_intrinsic): Call gfc_check_constructor_type on
array constructor operands with explicit type-spec to ensure
element type conversion before operations. Resolve character
array constructors before CONCAT operations.
(reduce_binary_ac, reduce_binary_ca, reduce_binary_aa): Preserve
character length info in result arrays.
* array.cc (check_constructor_type): Simplify non-constant
expressions before type checking to handle parenthesized elements.
Handle nested character array constructors with explicit type-spec
when outer constructor has no type-spec.
(gfc_resolve_character_array_constructor): Recursively propagate
type-spec to nested array constructors. If the nested constructor
has an explicit type-spec, resolve it first before propagating
the outer type-spec.
gcc/testsuite/ChangeLog:
* gfortran.dg/array_constructor_typespec_1.f90: New test.
Co-authored-by: Harald Anlauf <anlauf@gcc.gnu.org> Signed-off-by: Christopher Albert <albert@tugraz.at>
Jakub Jelinek [Mon, 1 Dec 2025 16:54:05 +0000 (17:54 +0100)]
c++: Fix ODR regressions caused by P2115R0 changes [PR122905]
The following testcase fails due to ODR warnings starting with the
r16-3233 change (P2115R0 PR120503 implementation).
The problem is that for C++20 we mangle differently the anonymous
union at the class scope from C++17, in C++17 the
unnamed enumeration that has an enumerator as a name for linkage purposes
before it is counted as TYPE_UNNAMED_P in nested_anon_class_index,
but for C++20 it is not, therefore the ODR warning.
While the term defined in https://eel.is/c++draft/dcl.enum#12.sentence-2
is defined for all enum types, its only use in
https://eel.is/c++draft/basic.link#4.5 is solely for enumeration types at
namespace scope, changing anything for those at class scope or block scope
has undesirable ABI consequences.
2025-12-01 Jakub Jelinek <jakub@redhat.com>
PR c++/122905
* decl.cc (enum_with_enumerator_for_linkage_p): Only return true
for namespace scope types.
* g++.dg/lto/pr122905.h: New file.
* g++.dg/lto/pr122905_0.C: New test.
* g++.dg/lto/pr122905_1.C: New test.
Robin Dapp [Wed, 12 Nov 2025 09:17:47 +0000 (10:17 +0100)]
RISC-V: vsetvl: Add null check for fault-first loop [PR122652].
For a fault-first load we store the first instruction that read its VL
result. The loop to do so uses next_nondebug_insn () which returns
nullptr when we are at the end. Check for that before accessing the
next insn.
Tobias Burnus [Mon, 1 Dec 2025 14:52:14 +0000 (15:52 +0100)]
gfortran.texi: Remove spurious @menu entry
Fixed the issue:
gfortran.texi:2542: warning: node up `Unsigned integers' in menu
`Default exponents' and in sectioning `Extensions implemented in
GNU Fortran' differ
There is an 'Unsigned integers' @menu entry under @section level
'Extensions implemented in GNU Fortran', where it should be. But some
spurious '@menu' entry, only with 'Unsigned integers' in it, was under
'@subsection Default exponents' just before the node of the
'@subsection Unsigned integers'. - The latter worked but was bogus
and lead the warning. Hence, it is now gone.
Rainer Orth [Mon, 1 Dec 2025 13:17:32 +0000 (14:17 +0100)]
testsuite: fortran: Fix gfortran.dg/alloc_comp_deep_copy_5.f90 etc. with non-gas/gld [PR122596]
The gfortran.dg/alloc_comp_deep_copy_[56].f90 tests FAIL on Solaris:
FAIL: gfortran.dg/alloc_comp_deep_copy_5.f90 -O0 (test for excess errors)
UNRESOLVED: gfortran.dg/alloc_comp_deep_copy_5.f90 -O0 compilation failed to produce executable
and many more when using either or both the native assembler or linker:
Excess errors:
Assembler:
"", line 1 : Illegal flag (-)
which is due to passing --noexecstack to the assembler. This is wrong in
general unless GNU as is used. Likewise, -Wl,-z,noexecstack has the same
issue.
This is *not* a target issue: the tests PASS as-is when using gas/gld on
Solaris (thus the current { target { ! *-*-darwin* } } is wrong, too).
Instead, the gas and gld effective-target keywords should be used to
control whether the flags are used, which is what this patch does.
Tested on i386-pc-solaris2.11, sparc-sun-solaris2.11,
x86_64-pc-linux-gnu, and x86_64-apple-darwin25.1.0.
Rainer Orth [Mon, 1 Dec 2025 13:04:03 +0000 (14:04 +0100)]
testsuite: xfail g++.dg/gcov/pr16855*.C on Solaris [PR52477,PR81337]
The g++.dg/gcov/pr16855*.C tests FAIL on Solaris:
FAIL: g++.dg/gcov/pr16855.C -std=gnu++17 gcov: 1 failures in line counts, 0 in branch percentages, 0 in condition/decision, 0 in prime-paths, 0 in return percentages, 0 in intermediate format, 0 failed in filters
FAIL: g++.dg/gcov/pr16855.C -std=gnu++17 line 24: is #####:should be 1
FAIL: g++.dg/gcov/pr16855.C -std=gnu++26 gcov: 6 failures in line counts, 0 in branch percentages, 0 in condition/decision, 0 in prime-paths, 0 in return percentages, 0 in intermediate format, 0 failed in filters
FAIL: g++.dg/gcov/pr16855.C -std=gnu++26 line 15: is 3:should be 1
FAIL: g++.dg/gcov/pr16855.C -std=gnu++26 line 22: is 3:should be 1
FAIL: g++.dg/gcov/pr16855.C -std=gnu++26 line 24: is #####:should be 1
FAIL: g++.dg/gcov/pr16855.C -std=gnu++26 line 38: is 3:should be 1
FAIL: g++.dg/gcov/pr16855.C -std=gnu++26 line 44: is 3:should be 1
FAIL: g++.dg/gcov/pr16855.C -std=gnu++26 line 49: is 3:should be 1
Same for -std=gnu++98.
The issue has long been known and the failures generate an excessive
amount of noise. Since the PRs haven't seen any activity in years, this
patch xfail's them.
Tested on i386-pc-solaris2.11, sparc-sun-solaris2.11,
x86_64-pc-linux-gnu, and x86_64-apple-darwin25.1.0.
Jonathan Wakely [Mon, 1 Dec 2025 12:54:50 +0000 (12:54 +0000)]
libstdc++: Use chrono::nanoseconds for __wait_until_impl parameter
Use the chrono::nanoseconds typedef instead of the equivalent
__wait_clock_t::duration typedef, and add a comment explaining why we
use a duration not a time_point.
libstdc++-v3/ChangeLog:
* include/bits/atomic_timed_wait.h (__wait_until_impl): Use
chrono::nanoseconds for parameter.
* src/c++20/atomic.cc (__wait_until_impl): Likewise.
Jonathan Wakely [Thu, 27 Nov 2025 11:40:46 +0000 (11:40 +0000)]
libstdc++: Fix spinloop in atomic timed waiting function [PR122878]
The __spin_until_impl function was presumably intended to just spin for
a short time, then give up and let the caller wait on a futex or
condvar. However, __spin_until_impl will never stop spinning unless
either the value changes or the timeout is reached. This means that when
__spin_until_impl returns, the caller should immediately return (because
either the value we were waiting for has changed, or the timeout
happened). So __wait_until_impl should never block on a futex or
condvar. However, the check for the return value of __spin_until_impl
would only return if the value changed (i.e. !__res._M_timeout). So if
the timeout occurred, it would fall through and block on the
futex/condvar, even though the timeout has already been reached.
This was causing a major performance regression in the timed waiting
functions of std::counting_semaphore.
The simplest fix is to replace __spin_until_impl entirely, just calling
__spin_impl to spin a small, finite number of times, and then return
immediately if either the value changed or the timeout happened. This
ensures that we don't block on the futex/condvar unnecessarily.
Removing __spin_until_impl also has the advantage that we no longer keep
calling steady_clock::now() on every iteration to check for a timeout.
That was also adding significant overhead to the timed waiting
functions.
libstdc++-v3/ChangeLog:
PR libstdc++/122878
* src/c++20/atomic.cc (__spin_until_impl): Remove.
(__wait_until_impl): Use __spin_impl instead of
__spin_until_impl and return if timeout is reached after
spinning.
Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
Jonathan Wakely [Thu, 27 Nov 2025 10:24:39 +0000 (10:24 +0000)]
libstdc++: Refactor futex usage in src/c++20/atomic.cc
The __futex_wait_flags scoped enum doesn't really have any benefit in
this file, because this code is no longer in the <atomic> header and so
we don't need to worry so much about namespace pollution. Just defining
the constants as int (and locally in the functions where they're needed)
avoids needing a static_cast<int> from the enum type.
I also noticed that _GLIBCXX_HAVE_LINUX_FUTEX_PRIVATE was never defined,
which meant we never used the FUTEX_PRIVATE_FLAG to tell the kernel that
all futex ops are process-private.
Also add comments and deleted definitions describing the API expected
for targets that define _GLIBCXX_HAVE_PLATFORM_WAIT.
libstdc++-v3/ChangeLog:
* src/c++20/atomic.cc: Document platform wait API.
(__futex_wait_flags): Remove enumeration type.
(futex_private_flag): Define constant for FUTEX_PRIVATE_FLAG.
(__platform_wait): Use local variables for futex op constants.
(__platform_notify): Likewise.
(__platform_wait_until): Likewise. Adjust parameter types for
consistency with __platform_wait.
Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
Rainer Orth [Mon, 1 Dec 2025 12:36:35 +0000 (13:36 +0100)]
algol68: Fix SPARC build
Algol68 bootstrap currently fails on Solaris/SPARC:
n file included from ./tm_p.h:4,
from gcc/algol68/a68-imports.cc:36:
gcc/config/sparc/sparc-protos.h:46:47: error: use of enum ‘memmodel’ without previous declaration
46 | extern void sparc_emit_membar_for_model (enum memmodel, int, int);
| ^~~~~~~~
tm_p.h needs memmodel.h on some targets, like SPARC.
Andrew Stubbs [Thu, 20 Nov 2025 17:18:13 +0000 (17:18 +0000)]
libgomp, amdgcn: Implement Managed Memory
This patch implements "managed" memory for AMD GCN GPUs in OpenMP. It
builds on the support added to the NVPTX libgomp for CUDA Managed Memory, a
week or two ago.
These features were first posted here a few years ago, as part of a larger
Unified Shared Memory patch series, and then in a slightly changed version just
over a year ago. Hopefully this time the controversial bits have been removed.
Since we do not use HIP we cannot use hipMallocManaged, so this patch attempts
to replicate the same effect by setting the appropriate attributes. This works
on more devices than support proper USM, but still I cannot be sure that the
settings are correct for every device out there (I have tested on gfx900,
gfx906, gfx908, gfx90a, and gfx1100).
The HSA header file update uses the most recent files relicensed for us by AMD,
at the time of the first patch posting. Those files have certainly moved on in
the upstream sources, but I did not ask to get those relicensed.
This commit creates initial gcc/algol68/ChangeLog and
libga68/ChangeLog files with copyright notices and content moved from
the top-level ChangeLog and gcc/ChangeLog.
projects / thirdparty / gcc.git / log
