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3 months agolibstdc++: Fix conversions to key/value types for hash table insertion [PR115285]
Jonathan Wakely [Tue, 5 Nov 2024 17:19:06 +0000 (17:19 +0000)] 
libstdc++: Fix conversions to key/value types for hash table insertion [PR115285]

The conversions to key_type and value_type that are performed when
inserting into _Hashtable need to be fixed to do any required
conversions explicitly. The current code assumes that conversions from
the parameter to the key_type or value_type can be done implicitly,
which isn't necessarily true.

Remove the _S_forward_key function which doesn't handle all cases and
either forward the parameter if it already has type cv key_type, or
explicitly construct a temporary of type key_type.

Similarly, the _ConvertToValueType specialization for maps doesn't
handle all cases either, for std::pair arguments only some value
categories are handled. Remove _ConvertToValueType and for the _M_insert
function for unique keys, either forward the argument unchanged or
explicitly construct a temporary of type value_type.

For the _M_insert overload for non-unique keys we don't need any
conversion at all, we can just forward the argument directly to where we
construct a node.

libstdc++-v3/ChangeLog:

PR libstdc++/115285
* include/bits/hashtable.h (_Hashtable::_S_forward_key): Remove.
(_Hashtable::_M_insert_unique_aux): Replace _S_forward_key with
a static_cast to a type defined using conditional_t.
(_Hashtable::_M_insert): Replace _ConvertToValueType with a
static_cast to a type defined using conditional_t.
* include/bits/hashtable_policy.h (_ConvertToValueType): Remove.
* testsuite/23_containers/unordered_map/insert/115285.cc: New test.
* testsuite/23_containers/unordered_set/insert/115285.cc: New test.
* testsuite/23_containers/unordered_set/96088.cc: Adjust
expected number of allocations.

(cherry picked from commit 90c578654a2c96032aa6621449859243df5f641b)

3 months agolibstdc++: Define __is_pair variable template for C++11
Jonathan Wakely [Fri, 1 Nov 2024 10:09:55 +0000 (10:09 +0000)] 
libstdc++: Define __is_pair variable template for C++11

libstdc++-v3/ChangeLog:

* include/bits/stl_pair.h (__is_pair): Define for C++11 and
C++14 as well.

(cherry picked from commit dd08cdccc36d084eda0e2748c772f6bf9a7f412f)

3 months agolibstdc++: Fix test broken when using COW std::string
François Dumont [Thu, 24 Oct 2024 18:30:16 +0000 (20:30 +0200)] 
libstdc++: Fix test broken when using COW std::string

libstdc++-v3/ChangeLog:

* testsuite/23_containers/unordered_map/96088.cc (test03): Fix increments
value when _GLIBCXX_USE_CXX11_ABI is equal to 0.

(cherry picked from commit d01dc97a26d2f5034ca135f46094aa52c44cc90a)

3 months agolibstdc++: Always instantiate key_type to compute hash code [PR115285]
François Dumont [Tue, 22 Oct 2024 17:13:34 +0000 (19:13 +0200)] 
libstdc++: Always instantiate key_type to compute hash code [PR115285]

Even if it is possible to compute a hash code from the inserted arguments
we need to instantiate the key_type to guaranty hash code consistency.

Preserve the lazy instantiation of the mapped_type in the context of
associative containers.

libstdc++-v3/ChangeLog:

PR libstdc++/115285
* include/bits/hashtable.h (_S_forward_key<_Kt>): Always return a temporary
key_type instance.
* testsuite/23_containers/unordered_map/96088.cc: Adapt to additional instanciation.
Also check that mapped_type is not instantiated when there is no insertion.
* testsuite/23_containers/unordered_multimap/96088.cc: Adapt to additional
instanciation.
* testsuite/23_containers/unordered_multiset/96088.cc: Likewise.
* testsuite/23_containers/unordered_set/96088.cc: Likewise.
* testsuite/23_containers/unordered_set/pr115285.cc: New test case.

(cherry picked from commit ee030b28004eade3da872e7ae62a526a2940a705)

3 months agoRISC-V: Disable unsupported vsext/vzext patterns for XTheadVector.
Jin Ma [Mon, 7 Apr 2025 06:21:50 +0000 (14:21 +0800)] 
RISC-V: Disable unsupported vsext/vzext patterns for XTheadVector.

XThreadVector does not support the vsext/vzext instructions; however,
due to the reuse of RVV optimizations, it may generate these instructions
in certain cases. To prevent the error "Unknown opcode 'th.vsext.vf2',"
we should disable these patterns.

V2:
Change the value of dg-do in the test case from assemble to compile, and
remove the -save-temps option.

gcc/ChangeLog:

* config/riscv/vector.md: Disable vsext/vzext for XTheadVector.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/xtheadvector/vsext.c: New test.
* gcc.target/riscv/rvv/xtheadvector/vzext.c: New test.

(cherry picked from commit 196b45caca0aae57a95bffcdd5c188994317de08)

3 months agoRISC-V: unrecognizable insn ICE in xtheadvector/pr114194.c on 32bit targets
Jin Ma [Tue, 11 Feb 2025 13:28:05 +0000 (21:28 +0800)] 
RISC-V: unrecognizable insn ICE in xtheadvector/pr114194.c on 32bit targets

This is a follow-up to the patch below to avoid generating unrecognized
vsetivl instructions for XTheadVector.

https://gcc.gnu.org/pipermail/gcc-patches/2025-January/674185.html

PR target/118601

gcc/ChangeLog:

* config/riscv/riscv-string.cc (expand_block_move): Check with new
constraint 'vl' instead of 'K'.
(expand_vec_setmem): Likewise.
(expand_vec_cmpmem): Likewise.
* config/riscv/riscv-v.cc (force_vector_length_operand): Likewise.
(expand_load_store): Likewise.
(expand_strided_load): Likewise.
(expand_strided_store): Likewise.
(expand_lanes_load_store): Likewise.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/xtheadvector/pr114194.c: Move to...
* gcc.target/riscv/rvv/xtheadvector/pr114194-rv64.c: ...here.
* gcc.target/riscv/rvv/xtheadvector/pr114194-rv32.c: New test.
* gcc.target/riscv/rvv/xtheadvector/pr118601.c: New test.

Reported-by: Edwin Lu <ewlu@rivosinc.com>
(cherry picked from commit 580f571be6ce80aa71fb80e7b16e01824f088229)

3 months agoRISC-V: Add a new constraint to ensure that the vl of XTheadVector does not get a...
Jin Ma [Tue, 21 Jan 2025 17:46:37 +0000 (10:46 -0700)] 
RISC-V: Add a new constraint to ensure that the vl of XTheadVector does not get a non-zero immediate

Although we have handled the vl of XTheadVector correctly in the
expand phase and predicates, the results show that the work is
still insufficient.

In the curr_insn_transform function, the insn is transformed from:
(insn 69 67 225 12 (set (mem:RVVM8SF (reg/f:DI 218 [ _77 ]) [0  S[128, 128] A32])
        (if_then_else:RVVM8SF (unspec:RVVMF4BI [
                    (const_vector:RVVMF4BI repeat [
                            (const_int 1 [0x1])
                        ])
                    (reg:DI 209)
                    (const_int 0 [0])
                    (reg:SI 66 vl)
                    (reg:SI 67 vtype)
                ] UNSPEC_VPREDICATE)
            (reg/v:RVVM8SF 143 [ _xx ])
            (mem:RVVM8SF (reg/f:DI 218 [ _77 ]) [0  S[128, 128] A32])))
     (expr_list:REG_DEAD (reg/v:RVVM8SF 143 [ _xx ])
        (nil)))
to
(insn 69 284 225 11 (set (mem:RVVM8SF (reg/f:DI 18 s2 [orig:218 _77 ] [218]) [0  S[128, 128] A32])
        (if_then_else:RVVM8SF (unspec:RVVMF4BI [
                    (const_vector:RVVMF4BI repeat [
                            (const_int 1 [0x1])
                        ])
                    (const_int 1 [0x1])
                    (const_int 0 [0])
                    (reg:SI 66 vl)
                    (reg:SI 67 vtype)
                ] UNSPEC_VPREDICATE)
            (reg/v:RVVM8SF 104 v8 [orig:143 _xx ] [143])
            (mem:RVVM8SF (reg/f:DI 18 s2 [orig:218 _77 ] [218]) [0  S[128, 128] A32])))
     (nil))

Looking at the log for the reload pass, it is found that "Changing pseudo 209 in
operand 3 of insn 69 on equiv 0x1".
It converts the vl operand in insn from the expected register(reg:DI 209) to the
constant 1(const_int 1 [0x1]).

This conversion occurs because, although the predicate for the vl operand is
restricted by "vector_length_operand" in the pattern, the constraint is still
"rK", which allows the transformation.

The issue is that changing the "rK" constraint to "rJ" for the constraint of vl
operand in the pattern would prevent this conversion, But unfortunately this will
conflict with RVV (RISC-V Vector Extension).

Based on the review's recommendations, the best solution for now is to create
a new constraint to distinguish between RVV and XTheadVector, which is exactly
what this patch does.

PR target/116593

gcc/ChangeLog:

* config/riscv/constraints.md (vl): New.
* config/riscv/thead-vector.md: Replacing rK with rvl.
* config/riscv/vector.md: Likewise.

gcc/testsuite/ChangeLog:

* g++.target/riscv/rvv/rvv.exp: Enable testsuite of XTheadVector.
* g++.target/riscv/rvv/xtheadvector/pr116593.C: New test.

(cherry picked from commit 3024b12f2cde5db3bf52b49b07e32ef3065929fb)

3 months agoRISC-V: Enable and adjust the testsuite for XTheadVector.
Jin Ma [Tue, 21 Jan 2025 17:43:47 +0000 (10:43 -0700)] 
RISC-V: Enable and adjust the testsuite for XTheadVector.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/rvv.exp: Enable testsuite of
XTheadVector.
* gcc.target/riscv/rvv/xtheadvector/pr114194.c: Adjust correctly.
* gcc.target/riscv/rvv/xtheadvector/prefix.c: Likewise.
* gcc.target/riscv/rvv/xtheadvector/vlb-vsb.c: Likewise.
* gcc.target/riscv/rvv/xtheadvector/vlbu-vsb.c: Likewise.
* gcc.target/riscv/rvv/xtheadvector/vlh-vsh.c: Likewise.
* gcc.target/riscv/rvv/xtheadvector/vlhu-vsh.c: Likewise.
* gcc.target/riscv/rvv/xtheadvector/vlw-vsw.c: Likewise.
* gcc.target/riscv/rvv/xtheadvector/vlwu-vsw.c: Likewise.

(cherry picked from commit ab24171d237a9138714f0e6d2bb38fd357ccaed9)

3 months ago[PATCH] RISC-V: Bugfix for unrecognizable insn for XTheadVector
Jin Ma [Wed, 13 Nov 2024 22:19:29 +0000 (15:19 -0700)] 
[PATCH] RISC-V: Bugfix for unrecognizable insn for XTheadVector

error: unrecognizable insn:

(insn 35 34 36 2 (set (subreg:RVVM1SF (reg/v:RVVM1x4SF 142 [ _r ]) 0)
        (unspec:RVVM1SF [
                (const_vector:RVVM1SF repeat [
                        (const_double:SF 0.0 [0x0.0p+0])
                    ])
                (reg:DI 0 zero)
                (const_int 1 [0x1])
                (reg:SI 66 vl)
                (reg:SI 67 vtype)
            ] UNSPEC_TH_VWLDST)) -1
     (nil))
during RTL pass: mode_sw

PR target/116591

gcc/ChangeLog:

* config/riscv/vector.md: Add restriction to call pred_th_whole_mov.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/xtheadvector/pr116591.c: New test.

(cherry picked from commit 8564d0948c72df0a66d7eb47e15c6ab43e9b25ce)

3 months agoRISC-V: Fix the behavior for multilib-generator with --cmodel=large on rv32
Kito Cheng [Thu, 10 Apr 2025 08:58:49 +0000 (16:58 +0800)] 
RISC-V: Fix the behavior for multilib-generator with --cmodel=large on rv32

Large code model is only supported on RV64, so we don't need to
generate the multilibs for RV32 with --cmodel=large. And the compact
code model is something we don't supported on upstream (which is
accidentally added in the past), so we need to remove it.

gcc/ChangeLog:

* config/riscv/multilib-generator: Remove the compact code model
and check large code model for RV32.

(cherry picked from commit 72dff34bcdd6f05b64bbf07739ab815e673b5946)

3 months agoDaily bump.
GCC Administrator [Thu, 10 Apr 2025 00:22:21 +0000 (00:22 +0000)] 
Daily bump.

3 months agolibstdc++: Fix constraint recursion in basic_const_iterator operator- [PR115046]
Patrick Palka [Wed, 9 Apr 2025 21:48:05 +0000 (17:48 -0400)] 
libstdc++: Fix constraint recursion in basic_const_iterator operator- [PR115046]

It was proposed in PR112490 to also adjust basic_const_iterator's friend
operator-(sent, iter) overload alongside the r15-7757-g4342c50ca84ae5
adjustments to its comparison operators, but we lacked a concrete
testcase demonstrating fixable constraint recursion there.  It turns out
Hewill Kang's PR115046 is such a testcase!  So this patch makes the same
adjustments to that overload as well, fixing PR115046.  The LWG 4218 P/R
will need to get adjusted too.

PR libstdc++/115046
PR libstdc++/112490

libstdc++-v3/ChangeLog:

* include/bits/stl_iterator.h (basic_const_iterator::operator-):
Replace non-dependent basic_const_iterator function parameter with
a dependent one of type basic_const_iterator<_It2> where _It2
matches _It.
* testsuite/std/ranges/adaptors/as_const/1.cc (test04): New test.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
(cherry picked from commit d69f73c0334486f3c66937388f02008736809e87)

3 months agoc++: ICE with nested default targ lambdas [PR119574]
Patrick Palka [Wed, 9 Apr 2025 21:55:36 +0000 (17:55 -0400)] 
c++: ICE with nested default targ lambdas [PR119574]

In GCC 14 we fixed PR116567 in a more conservative way that doesn't
distinguish between the two kinds of deferred substitutions, and so
for PR119574 we instead ICE from get_innermost_template_args due to
TMPL_PARMS_DEPTH of the lambda, 2, being greater than the depth of the
augmented args, 1.

This patch works around the ICE in a best effort kind of way by guarding
the get_innermost_template_args call appropriately; I don't think it's
possible to get this completely right in GCC 14 without backporting the
proper fix for PR116567.

Note that lambda-targ13b.C present in the GCC 15 version of this patch[1]
never worked in GCC 14, and still doesn't work, which is why it's not
present in this patch.

[1]: r15-9350-gf3862ab07943d1

PR c++/119574

gcc/cp/ChangeLog:

* pt.cc (tsubst_lambda_expr): Don't call
get_innermost_template_args if we're requesting too many
levels.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/lambda-targ13.C: New test.
* g++.dg/cpp2a/lambda-targ13a.C: New test.

3 months agoRISC-V: Fix vid const vector expander for non-npatterns size steps
Patrick O'Neill [Thu, 22 Aug 2024 06:48:24 +0000 (23:48 -0700)] 
RISC-V: Fix vid const vector expander for non-npatterns size steps

Prior to this patch the expander would emit vectors like:
{ 0, 0, 5, 5, 10, 10, ...}
as:
{ 0, 0, 2, 2,  4,  4, ...}

This patch sets the step size to the requested value.

gcc/ChangeLog:

* config/riscv/riscv-v.cc (expand_const_vector): Fix STEP size in
expander.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
3 months agoRISC-V:Bugfix for vlmul_ext and vlmul_trunc with NULL return value[pr117286]
xuli [Mon, 28 Oct 2024 04:41:09 +0000 (04:41 +0000)] 
RISC-V:Bugfix for vlmul_ext and vlmul_trunc with NULL return value[pr117286]

This patch fixes following ICE:

test.c: In function 'func':
test.c:37:24: internal compiler error: Segmentation fault
   37 |     vfloat16mf2_t vc = __riscv_vlmul_trunc_v_f16m1_f16mf2(vb);
      |                        ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

The root cause is that vlmul_trunc has a null return value.
gimple_call <__riscv_vlmul_trunc_v_f16m1_f16mf2, NULL, vb_13>
                                                 ^^^

Passed the rv64gcv_zvfh regression test.

Singed-off-by: Li Xu <xuli1@eswincomputing.com>
PR target/117286

gcc/ChangeLog:

* config/riscv/riscv-vector-builtins-bases.cc: Do not expand NULL return.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr117286.c: New test.

3 months agoRISC-V: Bugfix for max_sew_overlap_and_next_ratio_valid_for_prev_sew_p[pr117483]
xuli [Tue, 12 Nov 2024 02:31:28 +0000 (02:31 +0000)] 
RISC-V: Bugfix for max_sew_overlap_and_next_ratio_valid_for_prev_sew_p[pr117483]

This patch fixs https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117483

If prev and next satisfy the following rules, we should forbid the case
(next.get_sew() < prev.get_sew() && (!next.get_ta() || !next.get_ma()))
in the compatible function max_sew_overlap_and_next_ratio_valid_for_prev_sew_p.
Otherwise, the tail elements of next will be polluted.

DEF_SEW_LMUL_RULE (ge_sew, ratio_and_ge_sew, ratio_and_ge_sew,
 max_sew_overlap_and_next_ratio_valid_for_prev_sew_p,
 always_false, use_max_sew_and_lmul_with_next_ratio)

Passed the rv64gcv full regression test.

Signed-off-by: Li Xu <xuli1@eswincomputing.com>
PR target/117483

gcc/ChangeLog:

* config/riscv/riscv-vsetvl.cc: Fix bug.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/pr117483.c: New test.

3 months ago[committed] [RISC-V] Fix false-positive uninitialized variable
Jeff Law [Sun, 9 Jun 2024 15:17:55 +0000 (09:17 -0600)] 
[committed] [RISC-V] Fix false-positive uninitialized variable

Andreas noted we were getting an uninit warning after the recent constant
synthesis changes.  Essentially there's no way for the uninit analysis code to
know the first entry in the CODES array is a UNKNOWN which will set X before
its first use.

So trivial initialization with NULL_RTX is the obvious fix.

Pushed to the trunk.

gcc/

* config/riscv/riscv.cc (riscv_move_integer): Initialize "x".

3 months agoRISC-V: Error early with V and no M extension.
Robin Dapp [Wed, 24 Jul 2024 07:08:00 +0000 (09:08 +0200)] 
RISC-V: Error early with V and no M extension.

For calculating the value of a poly_int at runtime we use a
multiplication instruction that requires the M extension.
Instead of just asserting and ICEing this patch emits an early
error at option-parsing time.

gcc/ChangeLog:

PR target/116036

* config/riscv/riscv.cc (riscv_override_options_internal): Error
with TARGET_VECTOR && !TARGET_MUL.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/arch-31.c: Add m to arch string and expect it.
* gcc.target/riscv/arch-32.c: Ditto.
* gcc.target/riscv/predef-14.c: Ditto.
* gcc.target/riscv/predef-15.c: Ditto.
* gcc.target/riscv/predef-16.c: Ditto.
* gcc.target/riscv/predef-26.c: Ditto.
* gcc.target/riscv/predef-27.c: Ditto.
* gcc.target/riscv/predef-32.c: Ditto.
* gcc.target/riscv/predef-33.c: Ditto.
* gcc.target/riscv/rvv/autovec/pr111486.c: Add m to arch string.
* gcc.target/riscv/compare-debug-1.c: Ditto.
* gcc.target/riscv/compare-debug-2.c: Ditto.
* gcc.target/riscv/rvv/base/pr116036.c: New test.

3 months agoRISC-V: Reject 'd' extension with ILP32E ABI
Patrick O'Neill [Tue, 30 Jul 2024 21:28:23 +0000 (14:28 -0700)] 
RISC-V: Reject 'd' extension with ILP32E ABI

Also add a testcase for -mabi=lp64d where 'd' is required.

gcc/ChangeLog:

PR target/116111
* config/riscv/riscv.cc (riscv_option_override): Add error.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/arch-41.c: New test.
* gcc.target/riscv/pr116111.c: New test.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
3 months agoRISC-V: Correct mode_idx attribute for viwalu wx variants [PR116149].
Robin Dapp [Wed, 31 Jul 2024 14:54:03 +0000 (16:54 +0200)] 
RISC-V: Correct mode_idx attribute for viwalu wx variants [PR116149].

In PR116149 we choose a wrong vector length which causes wrong values in
a reduction.  The problem happens in avlprop where we choose the
number of units in the instruction's mode as vector length.  For the
non-scalar variants the respective operand has the correct non-widened
mode.  For the scalar variants, however, the same operand has a scalar
mode which obviously only has one unit.  This makes us choose VL = 1
leaving three elements undisturbed (so potentially -1).  Those end up
in the reduction causing the wrong result.

This patch adjusts the mode_idx just for the scalar variants of the
affected instruction patterns.

gcc/ChangeLog:

PR target/116149

* config/riscv/vector.md: Fix mode_idx attribute of scalar
widen add/sub variants.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/pr116149.c: New test.

3 months ago[RISC-V][PR target/116240] Ensure object is a comparison before extracting arguments
Jeff Law [Thu, 8 Aug 2024 13:42:26 +0000 (07:42 -0600)] 
[RISC-V][PR target/116240] Ensure object is a comparison before extracting arguments

This was supposed to go out the door yesterday, but I kept getting interrupted.

The target bits for rtx costing can't assume the rtl they're given actually
matches a target pattern.   It's just kind of inherent in how the costing
routines get called in various places.

In this particular case we're trying to cost a conditional move:

(set (dest) (if_then_else (cond) (true) (false))

On the RISC-V port the backend only allows actual conditionals for COND.  So
something like (eq (reg) (const_int 0)).  In the costing code for if-then-else
we did something like

(XEXP (XEXP (cond, 0), 0)))

Which fails miserably if COND is a terminal node like (reg) rather than (ne
(reg) (const_int 0)

So this patch tightens up the RTL scanning to ensure that we have a comparison
before we start looking at the comparison's arguments.

Run through my tester without incident, but I'll wait for the pre-commit tester
to run through a cycle before pushing to the trunk.

Jeff

ps.   We probably could support a naked REG for the condition and internally convert it to (ne (reg) (const_int 0)), but I don't think it likely happens with any regularity.

PR target/116240
gcc/
* config/riscv/riscv.cc (riscv_rtx_costs): Ensure object is a
comparison before looking at its arguments.

gcc/testsuite
* gcc.target/riscv/pr116240.c: New test.

3 months agoRISC-V: Delete duplicate '#define RISCV_DWARF_VLENB'
Jin Ma [Thu, 8 Aug 2024 13:49:51 +0000 (07:49 -0600)] 
RISC-V: Delete duplicate '#define RISCV_DWARF_VLENB'

gcc/ChangeLog:

* config/riscv/riscv.h (RISCV_DWARF_VLENB): Delete.

3 months agoRISC-V: Fix factor in dwarf_poly_indeterminate_value [PR116305]
曾治金 [Wed, 14 Aug 2024 06:06:23 +0000 (14:06 +0800)] 
RISC-V: Fix factor in dwarf_poly_indeterminate_value [PR116305]

This patch is to fix the bug (BugId:116305) introduced by the commit
bd93ef for risc-v target.

The commit bd93ef changes the chunk_num from 1 to TARGET_MIN_VLEN/128
if TARGET_MIN_VLEN is larger than 128 in riscv_convert_vector_bits. So
it changes the value of BYTES_PER_RISCV_VECTOR. For example, before
merging the commit bd93ef and if TARGET_MIN_VLEN is 256, the value
of BYTES_PER_RISCV_VECTOR should be [8, 8], but now [16, 16]. The value
of riscv_bytes_per_vector_chunk and BYTES_PER_RISCV_VECTOR are no longer
equal.

Prologue will use BYTES_PER_RISCV_VECTOR.coeffs[1] to estimate the vlenb
register value in riscv_legitimize_poly_move, and dwarf2cfi will also
get the estimated vlenb register value in riscv_dwarf_poly_indeterminate_value
to calculate the number of times to multiply the vlenb register value.

So need to change the factor from riscv_bytes_per_vector_chunk to
BYTES_PER_RISCV_VECTOR, otherwise we will get the incorrect dwarf
information. The incorrect example as follow:

```
csrr    t0,vlenb
slli    t1,t0,1
sub     sp,sp,t1

.cfi_escape 0xf,0xb,0x72,0,0x92,0xa2,0x38,0,0x34,0x1e,0x23,0x50,0x22
```

The sequence '0x92,0xa2,0x38,0' means the vlenb register, '0x34' means
the literal 4, '0x1e' means the multiply operation. But in fact, the
vlenb register value just need to multiply the literal 2.

PR target/116305

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Take
BYTES_PER_RISCV_VECTOR for *factor instead of riscv_bytes_per_vector_chunk.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/scalable_vector_cfi.c: New test.

Signed-off-by: Zhijin Zeng <zhijin.zeng@spacemit.com>
3 months agoRISC-V: Add missing mode_idx for vrol and vror
Kito Cheng [Tue, 27 Aug 2024 13:27:02 +0000 (21:27 +0800)] 
RISC-V: Add missing mode_idx for vrol and vror

We add pattern for vector rotate, but seems like we forgot adding
mode_idx which used in AVL propgation (riscv-avlprop.cc).

gcc/ChangeLog:

* config/riscv/vector.md (mode_idx): Add vrol and vror.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/rotr.c: New.

3 months agoRISC-V: Fix subreg of VLS modes larger than a vector [PR116086].
Robin Dapp [Tue, 27 Aug 2024 08:25:34 +0000 (10:25 +0200)] 
RISC-V: Fix subreg of VLS modes larger than a vector [PR116086].

When the source mode is potentially larger than one vector (e.g. an
LMUL2 mode for VLEN=128) we don't know which vector the subreg actually
refers to.  For zvl128b and LMUL=2 the subreg in (subreg:V2DI (reg:V4DI))
could actually be the a full (high) vector register of a two-register
group (at VLEN=128) or the higher part of a single register (at VLEN>128).

As the subreg is statically ambiguous we prevent such situations in
can_change_mode_class.

The culprit in PR116086 is

 _12 = BIT_FIELD_REF <vect_cst__42, 128, 128>;

which can be expanded with a vector-vector extract (from V4DI to V2DI).
This patch adds a VLS-mode vector-vector extract that handles "halving"
cases like this one by sliding down the source vector, thus making sure
the correct part is used.

PR target/116086

gcc/ChangeLog:

* config/riscv/autovec.md (vec_extract<mode><v_half>): Add
vector-vector extract for VLS modes.
* config/riscv/riscv.cc (riscv_can_change_mode_class): Forbid
VLS modes larger than one vector.
* config/riscv/vector-iterators.md: Add vector-vector extract
iterators.

gcc/testsuite/ChangeLog:

* lib/target-supports.exp: Add effective target checks for
zvl256b and zvl512b.
* gcc.target/riscv/rvv/autovec/pr116086-2-run.c: New test.
* gcc.target/riscv/rvv/autovec/pr116086-2.c: New test.
* gcc.target/riscv/rvv/autovec/pr116086.c: New test.

3 months ago[PATCH v4] [target/116592] RISC-V: Fix illegal operands "th.vsetvli zero,0,e32,m8...
Jin Ma [Sat, 7 Sep 2024 16:29:02 +0000 (10:29 -0600)] 
[PATCH v4] [target/116592] RISC-V: Fix illegal operands "th.vsetvli zero,0,e32,m8" for XTheadVector

Since the THeadVector vsetvli does not support vl as an immediate, we
need to convert 0 to zero when outputting asm.

PR target/116592

gcc/ChangeLog:

* config/riscv/thead.cc (th_asm_output_opcode): Change '0' to
"zero"

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/xtheadvector/pr116592.c: New test.

3 months agoRISC-V: Fix vl_used_by_non_rvv_insn logic of vsetvl pass
garthlei [Wed, 11 Sep 2024 09:09:37 +0000 (17:09 +0800)] 
RISC-V: Fix vl_used_by_non_rvv_insn logic of vsetvl pass

This patch fixes a bug in the current vsetvl pass.  The current pass uses
`m_vl` to determine whether the dest operand has been used by non-RVV
instructions.  However, `m_vl` may have been modified as a result of an
`update_avl` call, and thus would be no longer the dest operand of the
original instruction.  This can lead to incorrect vsetvl eliminations, as is
shown in the testcase.  In this patch, we create a `dest_vl` variable for
this scenerio.

gcc/ChangeLog:

* config/riscv/riscv-vsetvl.cc: Use `dest_vl` for dest VL operand

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/vsetvl/vsetvl_bug-3.c: New test.

3 months agoriscv: Fix duplicate assmbler label in @tlsdesc<mode> insn
Andreas Schwab [Thu, 12 Sep 2024 11:55:09 +0000 (13:55 +0200)] 
riscv: Fix duplicate assmbler label in @tlsdesc<mode> insn

Use %= instead of maintaining a sequence number manually, so that it
doesn't result in a duplicate assembler label when the insn is duplicated.

PR target/116693
* config/riscv/riscv.cc (riscv_legitimize_tls_address): Don't pass
seqno to gen_tlsdesc and remove it.
* config/riscv/riscv.md (@tlsdesc<mode>): Remove operand 1.  Use
%= instead of %1 in template.

3 months ago[PATCH] RISC-V: Allow zero operand for DI variants of vssubu.vx
Bohan Lei [Wed, 18 Sep 2024 13:20:23 +0000 (07:20 -0600)] 
[PATCH] RISC-V: Allow zero operand for DI variants of vssubu.vx

The RISC-V vector machine description relies on the helper function
`sew64_scalar_helper` to emit actual insns for the DI variants of
vssub.vx and vssubu.vx.  This works with vssub.vx, but can cause
problems with vssubu.vx with the scalar operand being constant zero,
because `has_vi_variant_p` returns false, and the operand will be taken
without being loaded into a reg.  The attached testcases can cause an
internal compiler error as a result.

Allowing a constant zero operand in those insns seems to be a simple
solution that only affects minimum existing code.

gcc/ChangeLog:

* config/riscv/vector.md: Allow zero operand for DI variants of
vssubu.vx

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/vssubu-1.c: New test.
* gcc.target/riscv/rvv/base/vssubu-2.c: New test.

3 months ago[PATCH] RISC-V: Fix th.extu operands exceeding range on rv32.
Xianmiao Qu [Wed, 18 Sep 2024 13:28:44 +0000 (07:28 -0600)] 
[PATCH] RISC-V: Fix th.extu operands exceeding range on rv32.

The Combine Pass may generate zero_extract instructions that are out of range.
Drawing from other architectures like AArch64, we should impose restrictions
on the "*th_extu<mode>4" pattern.

gcc/
* config/riscv/thead.md (*th_extu<mode>4): Fix th.extu
operands exceeding range on rv32.

gcc/testsuite/
* gcc.target/riscv/xtheadbb-extu-4.c: New.

3 months ago[PATCH 1/2] RISC-V: Fix the outer_code when calculating the cost of SET expression.
Xianmiao Qu [Wed, 18 Sep 2024 13:35:12 +0000 (07:35 -0600)] 
[PATCH 1/2] RISC-V: Fix the outer_code when calculating the cost of SET expression.

I think it is a typo. When calculating the 'SET_SRC (x)' cost,
outer_code should be set to SET.

gcc/
* config/riscv/riscv.cc (riscv_rtx_costs): Fix the outer_code
when calculating the cost of SET expression.

3 months ago[PATCH v3] RISC-V: Fixed incorrect semantic description in DF to DI pattern in the...
Jin Ma [Wed, 18 Sep 2024 14:56:23 +0000 (08:56 -0600)] 
[PATCH v3] RISC-V: Fixed incorrect semantic description in DF to DI pattern in the Zfa extension on rv32.

gcc/ChangeLog:

* config/riscv/riscv.md: Change "truncate" to unspec for the Zfa extension on rv32.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/zfa-fmovh-fmovp-bug.c: New test.

3 months agoRISC-V: Ensure vtype for full-register moves [PR117544].
Robin Dapp [Thu, 21 Nov 2024 13:49:53 +0000 (14:49 +0100)] 
RISC-V: Ensure vtype for full-register moves [PR117544].

As discussed in PR117544 the VTYPE register is not preserved across
function calls.  Even though vmv1r-like instructions operate
independently of the actual vtype they still require a valid vtype.  As
we cannot guarantee that the vtype is valid we must make sure to emit a
vsetvl between a function call and a vmv1r.v.

This patch makes the necessary changes by splitting the full-reg-move
insns into patterns that use the vtype register and adding vmov to the
types of instructions requiring a vset.

PR target/117544

gcc/ChangeLog:

* config/riscv/vector.md (*mov<mode>_whole): Split.
(*mov<mode>_fract): Ditto.
(*mov<mode>): Ditto.
(*mov<mode>_vls): Ditto.
(*mov<mode>_reg_whole_vtype): New pattern with vtype use.
(*mov<mode>_fract_vtype): Ditto.
(*mov<mode>_vtype): Ditto.
(*mov<mode>_vls_vtype): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/abi-call-args-4.c: Expect vsetvl.
* gcc.target/riscv/rvv/base/pr117544.c: New test.

3 months agoRISC-V: Add assert for insn operand out of range access [PR117878][NFC]
Pan Li [Wed, 4 Dec 2024 05:53:52 +0000 (13:53 +0800)] 
RISC-V: Add assert for insn operand out of range access [PR117878][NFC]

According to the the initial analysis of PR117878, the ice comes from
the out-of-range operand access for recog_data.operand[].  Thus, add
one assert here to expose this explicitly.

PR target/117878

gcc/ChangeLog:

* config/riscv/riscv-v.cc (vlmax_avl_type_p): Add assert for
out of range access.
(nonvlmax_avl_type_p): Ditto.

Signed-off-by: Pan Li <pan2.li@intel.com>
3 months agoRISC-V: Fix compress shuffle pattern [PR117383].
Robin Dapp [Wed, 11 Dec 2024 19:48:30 +0000 (20:48 +0100)] 
RISC-V: Fix compress shuffle pattern [PR117383].

This patch makes vcompress use the tail-undisturbed policy by default
and also uses the proper VL.

PR target/117383

gcc/ChangeLog:

* config/riscv/riscv-protos.h (enum insn_type): Use TU policy.
* config/riscv/riscv-v.cc (shuffle_compress_patterns): Set VL.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/binop/vcompress-avlprop-1.c:
Expect tu.
* gcc.target/riscv/rvv/autovec/pr117383.c: New test.

3 months ago[RISC-V][PR target/106544] Avoid ICEs due to bogus asms
Jeff Law [Mon, 30 Dec 2024 20:51:55 +0000 (13:51 -0700)] 
[RISC-V][PR target/106544] Avoid ICEs due to bogus asms

This is a fix for a bug Andrew P filed a while back where essentially a poorly
crafted asm statement could trigger a ICE during assembly output.  Various
cases will use INTVAL (op) without verifying the operand is a CONST_INT node
first.

The usual way to handle this is via output_operand_lossage, which this patch
implements.

I focused primarily on the CONST_INT cases, there could well be other problems
in this space, if so they should get distinct bugs with testcases.

Tested in my tester on rv32 and rv64.  Waiting for pre-commit testing before
moving forward.

PR target/106544
gcc/

* config/riscv/riscv.cc (riscv_print_operand): Issue an error for
invalid operands rather than invalidly accessing INTVAL of an
object that is not a CONST_INT.  Fix one error string for 'N'.

gcc/testsuite
* gcc.target/riscv/pr106544.c: New test.

3 months ago[PATCH] riscv: add mising masking in lrsc expander (PR118137)
Andreas Schwab [Tue, 7 Jan 2025 19:23:37 +0000 (12:23 -0700)] 
[PATCH] riscv: add mising masking in lrsc expander (PR118137)

gcc:
PR target/118137
* config/riscv/sync.md ("lrsc_atomic_exchange<mode>"): Apply mask
to shifted value.

gcc/testsuite:
PR target/118137
* gcc.dg/atomic/pr118137.c: New.

3 months agoRISC-V: Disallow negative step for interleaving [PR117682]
Robin Dapp [Tue, 14 Jan 2025 00:09:35 +0000 (17:09 -0700)] 
RISC-V: Disallow negative step for interleaving [PR117682]

Hi,

in PR117682 we build an interleaving pattern

  { 1, 201, 209, 25, 161, 105, 113, 185, 65, 9,
    17, 89, 225, 169, 177, 249, 129, 73, 81, 153,
    33, 233, 241, 57, 193, 137, 145, 217, 97, 41,
    49, 121 };

with negative step expecting wraparound semantics due to -fwrapv.

For building interleaved patterns we have an optimization that
does e.g.
  {1, 209, ...} = { 1, 0, 209, 0, ...}
and
  {201, 25, ...} >> 8 = { 0, 201, 0, 25, ...}
and IORs those.

The optimization only works if the lowpart bits are zero.  When
overflowing e.g. with a negative step we cannot guarantee this.

This patch makes us fall back to the generic merge handling for negative
steps.

I'm not 100% certain we're good even for positive steps.  If the
step or the vector length is large enough we'd still overflow and
have non-zero lower bits.  I haven't seen this happen during my
testing, though and the patch doesn't make things worse, so...

Regtested on rv64gcv_zvl512b.  Let's see what the CI says.

Regards
 Robin

PR target/117682

gcc/ChangeLog:

* config/riscv/riscv-v.cc (expand_const_vector): Fall back to
merging if either step is negative.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/pr117682.c: New test.

3 months agoRISC-V: Fix vsetvl compatibility predicate [PR118154].
Robin Dapp [Thu, 9 Jan 2025 19:45:10 +0000 (20:45 +0100)] 
RISC-V: Fix vsetvl compatibility predicate [PR118154].

In PR118154 we emit strided stores but the first of those does not
always have the proper VTYPE.  That's because we erroneously delete
a necessary vsetvl.

In order to determine whether to elide

(1)
      Expr[7]: VALID (insn 116, bb 17)
        Demand fields: demand_ratio_and_ge_sew demand_avl
        SEW=8, VLMUL=mf2, RATIO=16, MAX_SEW=64
        TAIL_POLICY=agnostic, MASK_POLICY=agnostic
        AVL=(reg:DI 0 zero)

when e.g.

(2)
      Expr[3]: VALID (insn 360, bb 15)
        Demand fields: demand_sew_lmul demand_avl
        SEW=64, VLMUL=m1, RATIO=64, MAX_SEW=64
        TAIL_POLICY=agnostic, MASK_POLICY=agnostic
        AVL=(reg:DI 0 zero)
        VL=(reg:DI 13 a3 [345])

is already available, we use
sew_ge_and_prev_sew_le_next_max_sew_and_next_ratio_valid_for_prev_sew_p.

(1) requires RATIO = SEW/LMUL = 16 and an SEW >= 8.  (2) has ratio = 64,
though, so we cannot directly elide (1).

This patch uses ratio_eq_p instead of next_ratio_valid_for_prev_sew_p.

PR target/118154

gcc/ChangeLog:

* config/riscv/riscv-vsetvl.cc (MAX_LMUL): New define.
(pre_vsetvl::earliest_fuse_vsetvl_info): Use.
(pre_vsetvl::pre_global_vsetvl_info): New predicate with equal
ratio.
* config/riscv/riscv-vsetvl.def: Use.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/pr118154-1.c: New test.
* gcc.target/riscv/rvv/autovec/pr118154-2.c: New test.

3 months agoRISC-V: Fix code gen for reduction with length 0 [PR118182]
Kito Cheng [Mon, 23 Dec 2024 15:23:44 +0000 (23:23 +0800)] 
RISC-V: Fix code gen for reduction with length 0 [PR118182]

`.MASK_LEN_FOLD_LEFT_PLUS`(or `mask_len_fold_left_plus_m`) is expecting the
return value will be the start value even if the length is 0.

However current code gen in RISC-V backend is not meet that semantic, it will
result a random garbage value if length is 0.

Let example by current code gen for MASK_LEN_FOLD_LEFT_PLUS with f64:
        # _148 = .MASK_LEN_FOLD_LEFT_PLUS (stmp__148.33_134, vect__70.32_138, { -1, ... }, loop_len_161, 0);
        vsetvli zero,a5,e64,m1,ta,ma
        vfmv.s.f        v2,fa5     # insn 1
        vfredosum.vs    v1,v1,v2   # insn 2
        vfmv.f.s        fa5,v1     # insn 3

insn 1:
- vfmv.s.f won't do anything if VL=0, which means v2 will contain garbage value.
insn 2:
- vfredosum.vs won't do anything if VL=0, and keep vd unchanged even TA.
(v-spec say: `If vl=0, no operation is performed and the destination register
 is not updated.`)
insn 3:
- vfmv.f.s will move the value from v1 even VL=0, so this is safe.

So how we fix that? we need two fix for that:

1. insn 1: need always execute with VL=1, so that we can guarantee it will
           always work as expect.
2. insn 2: Add new pattern to force `vd` use same reg as `vs1` (start value) for
           all reduction patterns, then we can guarantee vd[0] will contain the
           start value when vl=0

For 1, it's just a simple change to riscv_vector::expand_reduction, but for 2,
we have to add _VL0_SAFE variant reduction to force `vd` use same reg as `vs1`
(start value).

Change since V3:
- Rename _AV to _VL0_SAFE for readability.
- Use non-VL0_SAFE version if VL is const or VLMAX.
- Only force VL=1 for vfmv.s.f when VL is non-const and non-VLMAX.
- Two more testcase.

gcc/ChangeLog:

PR target/118182
* config/riscv/autovec-opt.md (*widen_reduc_plus_scal_<mode>): Adjust
argument for expand_reduction.
(*widen_reduc_plus_scal_<mode>): Ditto.
(*fold_left_widen_plus_<mode>): Ditto.
(*mask_len_fold_left_widen_plus_<mode>): Ditto.
(*cond_widen_reduc_plus_scal_<mode>): Ditto.
(*cond_len_widen_reduc_plus_scal_<mode>): Ditto.
(*cond_widen_reduc_plus_scal_<mode>): Ditto.
* config/riscv/autovec.md (reduc_plus_scal_<mode>): Adjust argument for
expand_reduction.
(reduc_smax_scal_<mode>): Ditto.
(reduc_umax_scal_<mode>): Ditto.
(reduc_smin_scal_<mode>): Ditto.
(reduc_umin_scal_<mode>): Ditto.
(reduc_and_scal_<mode>): Ditto.
(reduc_ior_scal_<mode>): Ditto.
(reduc_xor_scal_<mode>): Ditto.
(reduc_plus_scal_<mode>): Ditto.
(reduc_smax_scal_<mode>): Ditto.
(reduc_smin_scal_<mode>): Ditto.
(reduc_fmax_scal_<mode>): Ditto.
(reduc_fmin_scal_<mode>): Ditto.
(fold_left_plus_<mode>): Ditto.
(mask_len_fold_left_plus_<mode>): Ditto.
* config/riscv/riscv-v.cc (expand_reduction): Add one more
argument for reduction code for vl0-safe.
* config/riscv/riscv-protos.h (expand_reduction): Ditto.
* config/riscv/vector-iterators.md (unspec): Add _VL0_SAFE variant of
reduction.
(ANY_REDUC_VL0_SAFE): New.
(ANY_WREDUC_VL0_SAFE): Ditto.
(ANY_FREDUC_VL0_SAFE): Ditto.
(ANY_FREDUC_SUM_VL0_SAFE): Ditto.
(ANY_FWREDUC_SUM_VL0_SAFE): Ditto.
(reduc_op): Add _VL0_SAFE variant of reduction.
(order) Ditto.
* config/riscv/vector.md (@pred_<reduc_op><mode>): New.

gcc/testsuite/ChangeLog:

PR target/118182
* gfortran.target/riscv/rvv/pr118182.f: New.
* gcc.target/riscv/rvv/autovec/pr118182-1.c: New.
* gcc.target/riscv/rvv/autovec/pr118182-2.c: New.

3 months agoRISC-V: Move fortran testcase to gfortran.target
Kito Cheng [Mon, 23 Dec 2024 13:27:46 +0000 (21:27 +0800)] 
RISC-V: Move fortran testcase to gfortran.target

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/fortran/pr111395.f90: Move this file to...
* gfortran.target/riscv/rvv/pr111395.f90: ...here.
* gcc.target/riscv/rvv/fortran/pr111566.f90: Move this file to...
* gfortran.target/riscv/rvv/pr111566.f90: ...here.
* gcc.target/riscv/rvv/rvv-fortran.exp: Move this file to...
* gfortran.target/riscv/rvv/rvv.exp: ...here.

3 months ago[PR target/118357] RISC-V: Disable fusing vsetvl instructions by VSETVL_VTYPE_CHANGE_...
Jin Ma [Sat, 18 Jan 2025 14:43:17 +0000 (07:43 -0700)] 
[PR target/118357] RISC-V: Disable fusing vsetvl instructions by VSETVL_VTYPE_CHANGE_ONLY for XTheadVector.

In RVV 1.0, the instruction "vsetvli zero,zero,*" indicates that the
available vector length (avl) does not change. However, in XTheadVector,
this same instruction signifies that the avl should take the maximum value.
Consequently, when fusing vsetvl instructions, the optimization labeled
"VSETVL_VTYPE_CHANGE_ONLY" is disabled for XTheadVector.

PR target/118357

gcc/ChangeLog:

* config/riscv/riscv-vsetvl.cc: Function change_vtype_only_p always
returns false for XTheadVector.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/xtheadvector/pr118357.c: New test.

3 months ago[RISC-V][PR target/116308] Fix generation of initial RTL for atomics
Jeff Law [Sat, 18 Jan 2025 20:44:33 +0000 (13:44 -0700)] 
[RISC-V][PR target/116308] Fix generation of initial RTL for atomics

While this wasn't originally marked as a regression, it almost certainly is
given that older versions of GCC would have used libatomic and would not have
ICE'd on this code.

Basically this is another case where we directly used simplify_gen_subreg when
we should have used gen_lowpart.

When I fixed a similar bug a while back I noted the code in question as needing
another looksie.  I think at that time my brain saw the mixed modes (SI & QI)
and locked up.  But the QI stuff is just the shift count, not some deeper
issue.  So fixing is trivial.

We just replace the simplify_gen_subreg with a gen_lowpart and get on with our
lives.

Tested on rv64 and rv32 in my tester.  Waiting on pre-commit testing for final
verdict.

PR target/116308
gcc/
* config/riscv/riscv.cc (riscv_lshift_subword): Use gen_lowpart
rather than simplify_gen_subreg.

gcc/testsuite/

* gcc.target/riscv/pr116308.c: New test.

3 months ago[RISC-V][PR target/116256] Fix incorrect return value for predicate
Jeff Law [Tue, 21 Jan 2025 13:56:27 +0000 (06:56 -0700)] 
[RISC-V][PR target/116256] Fix incorrect return value for predicate

Another bug found while chasing paths to fix the remaining issues in pr116256.

This case is sometimes benign when the optimizers are enabled.  But could show
up in a -O0 compile with some patterns I was playing around with.

Basically we have a predicate that is meant to return true if bits set in the
operand are all consecutive.

That predicate would return the wrong value when presented with (const_int 0)
indicating it had a run of on bits when obviously no bits are on 😉

It's pretty obvious once you look at the implementation.

if (exact_log2 ((val >> ctz_hwi (val)) + 1) < 0)
  return false
return true;

The right shift is always going to produce 0.  0 + 1 = 1 which is a power of 2.
So exact_log2 returns 0 and we get a true result rather than a false result.

The fix is trivial.  "<=".  While inside we might as well fix the formatting.

Tested on rv32 and rv64 in my tester.  Waiting on upstream pre-commit testing
to render a verdict.

PR target/116256
gcc/
* config/riscv/predicates.md (consecutive_bits_operand): Properly
handle (const_int 0).

3 months agoLoongArch: Fix awk / sed usage for compatibility
Yang Yujie [Mon, 7 Apr 2025 02:31:46 +0000 (10:31 +0800)] 
LoongArch: Fix awk / sed usage for compatibility

Tested with nawk, mawk, and gawk.

gcc/ChangeLog:

* config/loongarch/genopts/gen-evolution.awk: remove
usage of "asort".
* config/loongarch/genopts/genstr.sh: replace sed with awk.

(cherry picked from commit 6ed8c17c2bce631ae370d93164ceb6c1b5adf925)

3 months agoLoongArch: Make gen-evolution.awk compatible with FreeBSD awk
Xi Ruoyao [Wed, 2 Apr 2025 02:41:18 +0000 (10:41 +0800)] 
LoongArch: Make gen-evolution.awk compatible with FreeBSD awk

Avoid using gensub that FreeBSD awk lacks, use gsub and split those each
of gawk, mawk, and FreeBSD awk provides.

Reported-by: mpysw@vip.163.com
Link: https://man.freebsd.org/cgi/man.cgi?query=awk
gcc/ChangeLog:

* config/loongarch/genopts/gen-evolution.awk: Avoid using gensub
that FreeBSD awk lacks.

(cherry picked from commit 92ca72b41a74aef53978cadbda33dd38b69d3ed3)

3 months agoDaily bump.
GCC Administrator [Wed, 9 Apr 2025 00:22:11 +0000 (00:22 +0000)] 
Daily bump.

4 months agolibstdc++: Fix use-after-free in std::format [PR119671]
Jonathan Wakely [Mon, 7 Apr 2025 18:52:55 +0000 (19:52 +0100)] 
libstdc++: Fix use-after-free in std::format [PR119671]

When formatting floating-point values to wide strings there's a case
where we invalidate a std::wstring buffer while a std::wstring_view is
still referring to it.

libstdc++-v3/ChangeLog:

PR libstdc++/119671
* include/std/format (__formatter_fp::format): Do not invalidate
__wstr unless _M_localized returns a valid string.
* testsuite/std/format/functions/format.cc: Check wide string
formatting of floating-point types with classic locale.

Reviewed-by: Tomasz Kaminski <tkaminsk@redhat.com>
(cherry picked from commit e33b62eed7fd0a82d758b23252d288585b6790d2)

4 months agolibstdc++: Add new header to Doxygen config file
Jonathan Wakely [Thu, 3 Apr 2025 14:36:08 +0000 (15:36 +0100)] 
libstdc++: Add new header to Doxygen config file

libstdc++-v3/ChangeLog:

* doc/doxygen/user.cfg.in (INPUT): Add text_encoding.

(cherry picked from commit 5430fcd1a3222d62c1b9560de251268c8bc50303)

4 months agolibstdc++: Replace use of __mindist in ranges::uninitialized_xxx algos [PR101587]
Jonathan Wakely [Wed, 26 Mar 2025 11:47:05 +0000 (11:47 +0000)] 
libstdc++: Replace use of __mindist in ranges::uninitialized_xxx algos [PR101587]

In r15-8980-gf4b6acfc36fb1f I introduced a new function object for
finding the smaller of two distances. In bugzilla Hewill Kang pointed
out that we still need to explicitly convert the result back to the
right difference type, because the result might be an integer-like class
type that doesn't convert to an integral type explicitly.

Rather than doing that conversion in the __mindist function object, I
think it's simpler to remove it again and just do a comparison and
assignment. We always want the result to have a specific type, so we can
just check if the value of the other type is smaller, and then convert
that to the other type if so.

libstdc++-v3/ChangeLog:

PR libstdc++/101587
* include/bits/ranges_uninitialized.h (__detail::__mindist):
Remove.
(ranges::uninitialized_copy, ranges::uninitialized_copy_n)
(ranges::uninitialized_move, ranges::uninitialized_move_n): Use
comparison and assignment instead of __mindist.
* testsuite/20_util/specialized_algorithms/uninitialized_copy/constrained.cc:
Check with ranges that use integer-like class type for
difference type.
* testsuite/20_util/specialized_algorithms/uninitialized_move/constrained.cc:
Likewise.

Reviewed-by: Tomasz Kaminski <tkaminsk@redhat.com>
Reviewed-by: Hewill Kang <hewillk@gmail.com>
(cherry picked from commit 03ac8886e5c1fa16da90276fd721a57fa9435f4f)

4 months agolibstdc++: Replace use of std::min in ranges::uninitialized_xxx algos [PR101587]
Jonathan Wakely [Wed, 26 Mar 2025 11:47:05 +0000 (11:47 +0000)] 
libstdc++: Replace use of std::min in ranges::uninitialized_xxx algos [PR101587]

Because ranges can have any signed integer-like type as difference_type,
it's not valid to use std::min(diff1, diff2). Instead of calling
std::min with an explicit template argument, this adds a new __mindist
helper that determines the common type and uses that with std::min.

libstdc++-v3/ChangeLog:

PR libstdc++/101587
* include/bits/ranges_uninitialized.h (__detail::__mindist):
New function object.
(ranges::uninitialized_copy, ranges::uninitialized_copy_n)
(ranges::uninitialized_move, ranges::uninitialized_move_n): Use
__mindist instead of std::min.
* testsuite/20_util/specialized_algorithms/uninitialized_copy/constrained.cc:
Check ranges with difference difference types.
* testsuite/20_util/specialized_algorithms/uninitialized_move/constrained.cc:
Likewise.

(cherry picked from commit f4b6acfc36fb1f72fdd5bf4da208515e6495a062)

4 months agoLoongArch: Add LoongArch architecture detection to __float128 support in libgfortran...
Lulu Cheng [Mon, 7 Apr 2025 02:00:27 +0000 (10:00 +0800)] 
LoongArch: Add LoongArch architecture detection to __float128 support in libgfortran and libquadmath [PR119408].

In GCC14, LoongArch added __float128 as an alias for _Float128.
In commit r15-8962, support for q/Q suffixes for 128-bit floating point
numbers.  This will cause the compiler to automatically link libquadmath
when compiling Fortran programs.  But on LoongArch `long double` is
IEEE quad, so there is no need to implement libquadmath.
This causes link failure.

PR target/119408

libgfortran/ChangeLog:

* acinclude.m4: When checking for __float128 support, determine
whether the current architecture is LoongArch.  If so, return false.
* configure: Regenerate.

libquadmath/ChangeLog:

* configure.ac: When checking for __float128 support, determine
whether the current architecture is LoongArch.  If so, return false.
* configure: Regenerate.

Sigend-off-by: Xi Ruoyao <xry111@xry111.site>
Sigend-off-by: Jakub Jelinek <jakub@redhat.com>
(cherry picked from commit 1534f0099c98ea14c08a401302b05edf2231f411)

4 months agoDaily bump.
GCC Administrator [Tue, 8 Apr 2025 00:23:26 +0000 (00:23 +0000)] 
Daily bump.

4 months agolibstdc++: Work around C++20 tuple<tuple<any>> constraint recursion [PR116440]
Patrick Palka [Thu, 13 Mar 2025 23:55:00 +0000 (19:55 -0400)] 
libstdc++: Work around C++20 tuple<tuple<any>> constraint recursion [PR116440]

The type tuple<tuple<any>> is clearly copy/move constructible, but for
reasons that are not yet completely understood checking this triggers
constraint recursion with our C++20 tuple implementation (but not the
C++17 implementation).

It turns out this recursion stems from considering the non-template
tuple(const _Elements&) constructor during the copy/move constructibility
check.  Considering this constructor is ultimately redundant, since the
defaulted copy/move constructors are better matches.

GCC has a non-standard "perfect candidate" optimization[1] that causes
overload resolution to shortcut considering template candidates if we
find a (non-template) perfect candidate.  So to work around this issue
(and as a general compile-time optimization) this patch turns the
problematic constructor into a template so that GCC doesn't consider it
when checking for copy/move constructibility of this tuple type.

Changing the template-ness of a constructor can affect overload
resolution (since template-ness is a tiebreaker) so there's a risk this
change could e.g. introduce overload resolution ambiguities.  But the
original C++17 implementation has long defined this constructor as a
template (in order to constrain it etc), so doing the same thing in the
C++20 mode should naturally be quite safe.

The testcase still fails with Clang (in C++20 mode) since it doesn't
implement said optimization.

[1]: See r11-7287-g187d0d5871b1fa and
https://isocpp.org/files/papers/P3606R0.html

PR libstdc++/116440

libstdc++-v3/ChangeLog:

* include/std/tuple (tuple::tuple(const _Elements&...))
[C++20]: Turn into a template.
* testsuite/20_util/tuple/116440.C: New test.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
(cherry picked from commit 6570fa6f2612a4e4ddd2fcfc119369a1a48656e4)

4 months agoc++: constinit and value-initialization [PR119652]
Jason Merrill [Mon, 7 Apr 2025 15:49:19 +0000 (11:49 -0400)] 
c++: constinit and value-initialization [PR119652]

Value-initialization built an AGGR_INIT_EXPR to set AGGR_INIT_ZERO_FIRST on.
Passing that AGGR_INIT_EXPR to maybe_constant_value returned a TARGET_EXPR,
which potential_constant_expression_1 mistook for a temporary.

We shouldn't add a TARGET_EXPR to the AGGR_INIT_EXPR in this case, just like
we already avoid adding it to CONSTRUCTOR or CALL_EXPR.

PR c++/119652

gcc/cp/ChangeLog:

* constexpr.cc (cxx_eval_outermost_constant_expr): Also don't add a
TARGET_EXPR around AGGR_INIT_EXPR.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/constinit20.C: New test.

(cherry picked from commit c7dc9b6f889fa8f9e4ef060c3af107eaf54265c5)

4 months agoc++: __FUNCTION__ in lambda return type [PR118629]
Jason Merrill [Fri, 4 Apr 2025 21:34:08 +0000 (17:34 -0400)] 
c++: __FUNCTION__ in lambda return type [PR118629]

In this testcase, the use of __FUNCTION__ is within a function parameter
scope, the lambda's.  And P1787 changed __func__ to live in the parameter
scope.  But [basic.scope.pdecl] says that the point of declaration of
__func__ is immediately before {, so in the trailing return type it isn't in
scope yet, so this __FUNCTION__ should refer to foo().

Looking first for a block scope, then a function parameter scope, gives us
the right result.

PR c++/118629

gcc/cp/ChangeLog:

* name-lookup.cc (pushdecl_outermost_localscope): Look for an
sk_block.

gcc/testsuite/ChangeLog:

* g++.dg/cpp0x/lambda/lambda-__func__3.C: New test.

(cherry picked from commit 7d561820525fd3b9d8f3876333c0584d75e7c053)

4 months agoDaily bump.
GCC Administrator [Mon, 7 Apr 2025 00:21:21 +0000 (00:21 +0000)] 
Daily bump.

4 months agoDaily bump.
GCC Administrator [Sun, 6 Apr 2025 00:21:18 +0000 (00:21 +0000)] 
Daily bump.

4 months agoDaily bump.
GCC Administrator [Sat, 5 Apr 2025 00:21:41 +0000 (00:21 +0000)] 
Daily bump.

4 months agoc++: lambda in requires outside template [PR99546]
Jason Merrill [Wed, 29 Jan 2025 10:15:00 +0000 (05:15 -0500)] 
c++: lambda in requires outside template [PR99546]

Since r10-7441 we set processing_template_decl in a requires-expression so
that we can use tsubst_expr to evaluate the requirements, but that confuses
lambdas terribly; begin_lambda_type silently returns error_mark_node and we
continue into other failures.  This patch clears processing_template_decl
again while we're defining the closure and op() function, so it only remains
set while parsing the introducer (i.e. any init-captures) and building the
resulting object.  This properly avoids trying to create another lambda in
tsubst_lambda_expr.

PR c++/99546
PR c++/113925
PR c++/106976
PR c++/109961
PR c++/117336

gcc/cp/ChangeLog:

* lambda.cc (build_lambda_object): Handle fake
requires-expr processing_template_decl.
* parser.cc (cp_parser_lambda_expression): Likewise.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/lambda-requires2.C: New test.
* g++.dg/cpp2a/lambda-requires3.C: New test.
* g++.dg/cpp2a/lambda-requires4.C: New test.
* g++.dg/cpp2a/lambda-requires5.C: New test.

(cherry picked from commit 25992d8daff60726a247ec7850d540aed5335639)

4 months agoc++: constraint variable used in evaluated context [PR117849]
Patrick Palka [Fri, 4 Apr 2025 18:03:58 +0000 (14:03 -0400)] 
c++: constraint variable used in evaluated context [PR117849]

Here we wrongly reject the type-requirement at parse time due to its use
of the constraint variable 't' within a template argument (an evaluated
context).  Fix this simply by refining the "use of parameter outside
function body" error path to exclude constraint variables.

PR c++/104255 tracks the same issue for function parameters, but fixing
that would be more involved, requiring changes to the PARM_DECL case of
tsubst_expr.

PR c++/117849

gcc/cp/ChangeLog:

* semantics.cc (finish_id_expression_1): Allow use of constraint
variable outside an unevaluated context.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/concepts-requires41.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
(cherry picked from commit 6e973e87e3fec6f33e97edf8fce2fcd121e53961)

4 months agoc++: P2280R4 and speculative constexpr folding [PR119387]
Patrick Palka [Thu, 3 Apr 2025 20:33:46 +0000 (16:33 -0400)] 
c++: P2280R4 and speculative constexpr folding [PR119387]

Compiling the testcase in this PR uses 2.5x more memory and 6x more
time ever since r14-5979 which implements P2280R4.  This is because
our speculative constexpr folding now does a lot more work trying to
fold ultimately non-constant calls to constexpr functions, and in turn
produces a lot of garbage.  We do sometimes successfully fold more
thanks to P2280R4, but it seems to be trivial stuff like calls to
std::array::size or std::addressof.  The benefit of P2280 therefore
doesn't seem worth the cost during speculative constexpr folding, so
this patch restricts the paper to only manifestly-constant evaluation.

PR c++/119387

gcc/cp/ChangeLog:

* constexpr.cc (p2280_active_p): New.
(cxx_eval_constant_expression) <case VAR_DECL>: Use it to
restrict P2280 relaxations.
<case PARM_DECL>: Likewise.

Reviewed-by: Jason Merrill <jason@redhat.com>
(cherry picked from commit a926345f22b500a2620adb83e6821e01fb8cc8fd)

4 months agoAda: Fix thinko in Eigensystem for complex Hermitian matrices
Eric Botcazou [Fri, 4 Apr 2025 09:45:23 +0000 (11:45 +0200)] 
Ada: Fix thinko in Eigensystem for complex Hermitian matrices

The implementation solves the eigensystem for a NxN complex Hermitian matrix
by first solving it for a 2Nx2N real symmetric matrix and then interpreting
the 2Nx1 real vectors as Nx1 complex ones, but the last step does not work.

The patch fixes the last step and also performs a small cleanup throughout
the implementation, mostly in the commentary and without functional changes.

gcc/ada/
* libgnat/a-ngcoar.adb (Eigensystem): Adjust notation and fix the
layout of the real symmetric matrix in the main comment.  Adjust
the layout of the associated code accordingly and correctly turn
the 2Nx1 real vectors into Nx1 complex ones.
(Eigenvalues): Minor similar tweaks.
* libgnat/a-ngrear.adb (Jacobi): Minor tweaks in the main comment.
Adjust notation and corresponding parameter names of functions.
Fix call to Unit_Matrix routine.  Adjust the comment describing
the various kinds of iterations to match the implementation.

4 months agovect: Relax scan-tree-dump strict pattern matching [PR118597]
Victor Do Nascimento [Wed, 2 Apr 2025 13:22:31 +0000 (14:22 +0100)] 
vect: Relax scan-tree-dump strict pattern matching [PR118597]

Using specific SSA names in pattern matching in `dg-final' makes tests
"unstable", in that changes in passes prior to the pass whose dump is
analyzed in the particular test may change the numbering of the SSA
variables, causing the test to start failing spuriously.

We thus switch from specific SSA names to the use of a multi-line
regular expression making use of capture groups for matching particular
variables across different statements, ensuring the test will pass
more consistently across different versions of GCC.

PR testsuite/118597

gcc/testsuite/ChangeLog:

* gcc.dg/vect/vect-fncall-mask.c: Update test directives.

4 months agoDaily bump.
GCC Administrator [Fri, 4 Apr 2025 00:21:55 +0000 (00:21 +0000)] 
Daily bump.

4 months agolibstdc++: Restored accidentally removed test case.
Tomasz Kamiński [Thu, 3 Apr 2025 12:56:49 +0000 (14:56 +0200)] 
libstdc++: Restored accidentally removed test case.

It was removed by accident r14-11523-gad1b71fc2882c1.

libstdc++-v3/ChangeLog:

* testsuite/std/format/functions/format.cc: Restored line.

(cherry picked from commit 81c990aa84b22562157ce2926577b392b4a129d3)

4 months agolibstdc++: Fix handling of field width for wide strings and characters [PR119593]
Tomasz Kamiński [Thu, 3 Apr 2025 08:23:45 +0000 (10:23 +0200)] 
libstdc++: Fix handling of field width for wide strings and characters [PR119593]

This patch corrects handling of UTF-32LE and UTF32-BE in
__unicode::__literal_encoding_is_unicode<_CharT>, so they are
recognized as unicode and functions produces correct result for wchar_t.

Use `__unicode::__field_width` to compute the estimated witdh
of the charcter for unicode wide encoding.

PR libstdc++/119593

libstdc++-v3/ChangeLog:

* include/bits/unicode.h
(__unicode::__literal_encoding_is_unicode<_CharT>):
Corrected handing for UTF-16 and UTF-32 with "LE" or "BE" suffix.
* include/std/format (__formatter_str::_S_character_width):
Define.
(__formatter_str::_S_character_width): Updated passed char
length.
* testsuite/std/format/functions/format.cc: Test for wchar_t.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
Signed-off-by: Tomasz Kamiński <tkaminsk@redhat.com>
4 months agoFortran: Fix freeing procedure pointer components [PR119380]
Andre Vehreschild [Fri, 21 Mar 2025 08:13:29 +0000 (09:13 +0100)] 
Fortran: Fix freeing procedure pointer components [PR119380]

Backported from gcc-15.

PR fortran/119380

gcc/fortran/ChangeLog:

* trans-array.cc (structure_alloc_comps): Prevent freeing of
procedure pointer components.

gcc/testsuite/ChangeLog:

* gfortran.dg/proc_ptr_comp_54.f90: New test.

4 months agoDaily bump.
GCC Administrator [Thu, 3 Apr 2025 00:23:36 +0000 (00:23 +0000)] 
Daily bump.

4 months agotree-optimization/119145 - avoid stray .MASK_CALL after vectorization
Richard Biener [Fri, 7 Mar 2025 09:15:20 +0000 (10:15 +0100)] 
tree-optimization/119145 - avoid stray .MASK_CALL after vectorization

When we BB vectorize an if-converted loop body we make sure to not
leave around .MASK_LOAD or .MASK_STORE created by if-conversion but
we failed to check for .MASK_CALL.

PR tree-optimization/119145
* tree-vectorizer.cc (try_vectorize_loop_1): Avoid BB
vectorizing an if-converted loop body when there's a .MASK_CALL
in the loop body.

* gcc.dg/vect/pr119145.c: New testcase.

(cherry picked from commit 7950d4cceb9fc7559b1343c95fc651cefbe287a0)

4 months agomiddle-end/119119 - re-gimplification of empty CTOR assignments
Richard Biener [Thu, 6 Mar 2025 08:08:07 +0000 (09:08 +0100)] 
middle-end/119119 - re-gimplification of empty CTOR assignments

The following testcase runs into a re-gimplification issue during
inlining when processing

  MEM[(struct e *)this_2(D)].a = {};

where re-gimplification does not handle assignments in the same
way than the gimplifier but instead relies on rhs_predicate_for
and gimplifying the RHS standalone.  This fails to handle
special-casing of CTORs.  The is_gimple_mem_rhs_or_call predicate
already handles clobbers but not empty CTORs so we end up in
the fallback code trying to force the CTOR into a separate stmt
using a temporary - but as we have a non-copyable type here that ICEs.

The following generalizes empty CTORs in is_gimple_mem_rhs_or_call
since those need no additional re-gimplification.

PR middle-end/119119
* gimplify.cc (is_gimple_mem_rhs_or_call): All empty CTORs
are OK when not a register type.

* g++.dg/torture/pr11911.C: New testcase.

(cherry picked from commit 3bd61c1dfaa2d7153eb4be82f423533ea937d0f9)

4 months agotree-optimization/119096 - bogus conditional reduction vectorization
Richard Biener [Mon, 3 Mar 2025 13:12:37 +0000 (14:12 +0100)] 
tree-optimization/119096 - bogus conditional reduction vectorization

When we vectorize a .COND_ADD reduction and apply the single-use-def
cycle optimization we can end up chosing the wrong else value for
subsequent .COND_ADD.  The following rectifies this.

PR tree-optimization/119096
* tree-vect-loop.cc (vect_transform_reduction): Use the
correct else value for .COND_fn.

* gcc.dg/vect/pr119096.c: New testcase.

(cherry picked from commit 10e4107dfcf9fe324d0902f16411a75c596dab91)

4 months agoipa/119067 - bogus TYPE_PRECISION check on VECTOR_TYPE
Richard Biener [Mon, 3 Mar 2025 08:54:15 +0000 (09:54 +0100)] 
ipa/119067 - bogus TYPE_PRECISION check on VECTOR_TYPE

odr_types_equivalent_p can end up using TYPE_PRECISION on vector
types which is a no-go.  The following instead uses TYPE_VECTOR_SUBPARTS
for vector types so we also end up comparing the number of vector elements.

PR ipa/119067
* ipa-devirt.cc (odr_types_equivalent_p): Check
TYPE_VECTOR_SUBPARTS for vectors.

* g++.dg/lto/pr119067_0.C: New testcase.
* g++.dg/lto/pr119067_1.C: Likewise.

(cherry picked from commit f22e89167b3abfbf6d67f42fc4d689d8ffdc1810)

4 months agotree-optimization/119057 - bogus double reduction detection
Richard Biener [Mon, 3 Mar 2025 12:21:53 +0000 (13:21 +0100)] 
tree-optimization/119057 - bogus double reduction detection

We are detecting a cycle as double reduction where the inner loop
cycle has extra out-of-loop uses.  This clashes at least with
assumptions from the SLP discovery code which says the cycle
isn't reachable from another SLP instance.  It also was not intended
to support this case, in fact with GCC 14 we seem to generate wrong
code here.

PR tree-optimization/119057
* tree-vect-loop.cc (check_reduction_path): Add argument
specifying whether we're analyzing the inner loop of a
double reduction.  Do not allow extra uses outside of the
double reduction cycle in this case.
(vect_is_simple_reduction): Adjust.

* gcc.dg/vect/pr119057.c: New testcase.

(cherry picked from commit 758de6263dfc7ba8701965fa468691ac23cb7eb5)

4 months agolto/114501 - missed free-lang-data for CONSTRUCTOR index
Richard Biener [Thu, 6 Mar 2025 12:48:16 +0000 (13:48 +0100)] 
lto/114501 - missed free-lang-data for CONSTRUCTOR index

The following makes sure to also walk CONSTRUCTOR element indexes
which can be FIELD_DECLs, referencing otherwise unused types we
need to clean.  walk_tree only walks CONSTRUCTOR element data.

PR lto/114501
* ipa-free-lang-data.cc (find_decls_types_r): Explicitly
handle CONSTRUCTORs as walk_tree handling of those is
incomplete.

* g++.dg/pr114501_0.C: New testcase.

(cherry picked from commit fdd95e1cf29137a19baed25f8c817d320dfe63e3)

4 months agoipa/111245 - bogus modref analysis for store in call that might throw
Richard Biener [Fri, 28 Feb 2025 10:44:26 +0000 (11:44 +0100)] 
ipa/111245 - bogus modref analysis for store in call that might throw

We currently record a kill for

  *x_4(D) = always_throws ();

because we consider the store always executing since the appropriate
check for whether the stmt could throw is guarded by
!cfun->can_throw_non_call_exceptions.

PR ipa/111245
* ipa-modref.cc (modref_access_analysis::analyze_store): Do
not guard the check of whether the stmt could throw by
cfun->can_throw_non_call_exceptions.

* g++.dg/torture/pr111245.C: New testcase.

(cherry picked from commit e6037af6d5e5a43c437257580d75bc8b35a6dcfd)

4 months agoaarch64: Use PAUTH instead of V8_3A in some places
Andrew Carlotti [Tue, 30 Jul 2024 15:26:04 +0000 (16:26 +0100)] 
aarch64: Use PAUTH instead of V8_3A in some places

PR target/119383

gcc/ChangeLog:

* config/aarch64/aarch64.cc
(aarch64_expand_epilogue): Use TARGET_PAUTH.
* config/aarch64/aarch64.md: Update comment.

(cherry picked from commit 20385cb92cbd4a1934661ab97a162c1e25935836)

4 months agolibstdc++: Fix std::ranges::iter_move for function references [PR119469]
Jonathan Wakely [Wed, 26 Mar 2025 11:21:32 +0000 (11:21 +0000)] 
libstdc++: Fix std::ranges::iter_move for function references [PR119469]

The result of std::move (or a cast to an rvalue reference) on a function
reference is always an lvalue. Because std::ranges::iter_move was using
the type std::remove_reference_t<X>&& as the result of std::move, it was
giving the wrong type for function references. Use a decltype-specifier
with declval<remove_reference_t<X>>() instead of just using the
remove_reference_t<X>&& type directly. This gives the right result,
while still avoiding the cost of doing overload resolution for
std::move.

libstdc++-v3/ChangeLog:

PR libstdc++/119469
* include/bits/iterator_concepts.h (_IterMove::__result): Use
decltype-specifier instead of an explicit type.
* testsuite/24_iterators/customization_points/iter_move.cc:
Check results for function references.

Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
(cherry picked from commit 3e52eb28c537aaa03afb78ef9dff8325c5f41f78)

4 months agolibstdc++: Fix ranges::iter_move handling of rvalues [PR106612]
Jonathan Wakely [Fri, 28 Feb 2025 21:44:41 +0000 (21:44 +0000)] 
libstdc++: Fix ranges::iter_move handling of rvalues [PR106612]

The specification for std::ranges::iter_move apparently requires us to
handle types which do not satisfy std::indirectly_readable, for example
with overloaded operator* which behaves differently for different value
categories.

libstdc++-v3/ChangeLog:

PR libstdc++/106612
* include/bits/iterator_concepts.h (_IterMove::__iter_ref_t):
New alias template.
(_IterMove::__result): Use __iter_ref_t instead of
std::iter_reference_t.
(_IterMove::__type): Remove incorrect __dereferenceable
constraint.
(_IterMove::operator()): Likewise. Add correct constraints. Use
__iter_ref_t instead of std::iter_reference_t. Forward parameter
as correct value category.
(iter_swap): Add comments.
* testsuite/24_iterators/customization_points/iter_move.cc: Test
that iter_move is found by ADL and that rvalue arguments are
handled correctly.

Reviewed-by: Patrick Palka <ppalka@redhat.com>
(cherry picked from commit a8ee522c5923ba17851e4b71316a2dff19d6368f)

4 months agolibstdc++: Fix -Warray-bounds warning in std::vector<bool> [PR110498]
Jonathan Wakely [Fri, 28 Mar 2025 15:41:41 +0000 (15:41 +0000)] 
libstdc++: Fix -Warray-bounds warning in std::vector<bool> [PR110498]

In this case, we need to tell the compiler that the current size is not
larger than the new size so that all the existing elements can be copied
to the new storage. This avoids bogus warnings about overflowing the new
storage when the compiler can't tell that that cannot happen.

We might as well also hoist the loads of begin() and end() before the
allocation too. All callers will have loaded at least begin() before
calling _M_reallocate.

libstdc++-v3/ChangeLog:

PR libstdc++/110498
* include/bits/vector.tcc (vector<bool, A>::_M_reallocate):
Hoist loads of begin() and end() before allocation and use them
to state an unreachable condition.
* testsuite/23_containers/vector/bool/capacity/110498.cc: New
test.

Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
(cherry picked from commit aa3aaf2bfb8fcc17076993df4297597b68bc5f60)

4 months agolibstdc++: Fix -Wstringop-overread warning in std::vector<bool> [PR114758]
Jonathan Wakely [Fri, 28 Mar 2025 15:41:41 +0000 (15:41 +0000)] 
libstdc++: Fix -Wstringop-overread warning in std::vector<bool> [PR114758]

As in r13-4393-gcca06f0d6d76b0 and a few other commits, we can avoid
bogus warnings in std::vector<bool> by hoisting some loads to before the
allocation that calls operator new. This means that the compiler has
enough info to remove the dead branches that trigger bogus warnings.

On trunk this is only needed with -fno-assume-sane-operators-new-delete
but it will help on the branches where that option doesn't exist.

libstdc++-v3/ChangeLog:

PR libstdc++/114758
* include/bits/vector.tcc (vector<bool, A>::_M_fill_insert):
Hoist loads of begin() and end() before allocation.
* testsuite/23_containers/vector/bool/capacity/114758.cc: New
test.

Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
(cherry picked from commit 1f6c19f307c8de9830130a0ba071c24e3835beb3)

4 months agolibstdc++: Fix bogus -Wstringop-overflow in std::vector::insert [PR117983]
Jonathan Wakely [Fri, 28 Mar 2025 22:00:38 +0000 (22:00 +0000)] 
libstdc++: Fix bogus -Wstringop-overflow in std::vector::insert [PR117983]

This was fixed on trunk by r15-4473-g3abe751ea86e34, but that isn't
suitable for backporting. Instead, just add another unreachable
condition in std::vector::_M_range_insert so the compiler knows this
memcpy doesn't use a length originating from a negative ptrdiff_t
converted to a very positive size_t.

libstdc++-v3/ChangeLog:

PR libstdc++/117983
* include/bits/vector.tcc (vector::_M_range_insert): Add
unreachable condition to tell the compiler begin() <= end().
* testsuite/23_containers/vector/modifiers/insert/117983.cc: New
test.

Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
(cherry picked from commit 878812b6f6905774ab37cb78903e3e11bf1c508c)

4 months agolibstdc++: Fix -Warray-bounds warning in std::vector::resize [PR114945]
Jonathan Wakely [Mon, 31 Mar 2025 11:30:44 +0000 (12:30 +0100)] 
libstdc++: Fix -Warray-bounds warning in std::vector::resize [PR114945]

This is yet another false positive warning fix. This time the compiler
can't prove that when the vector has sufficient excess capacity to
append new elements, the pointer to the existing storage is not null.

libstdc++-v3/ChangeLog:

PR libstdc++/114945
* include/bits/vector.tcc (vector::_M_default_append): Add
unreachable condition so the compiler knows that _M_finish is
not null.
* testsuite/23_containers/vector/capacity/114945.cc: New test.

Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
(cherry picked from commit 844eed3364309bd20cbb7d6793a16b7c6b889ba4)

4 months agodebug/101533 - ICE with variant typedef DIE generation
Richard Biener [Wed, 5 Mar 2025 13:24:50 +0000 (14:24 +0100)] 
debug/101533 - ICE with variant typedef DIE generation

There's a sanity check in gen_type_die_with_usage that trips
unnecessarily for a case where the relevant DIE has already been
generated successfully in other ways.  The following keys the
existing TREE_ASM_WRITTEN check on the correct object, honoring
this and does nothing instead of ICEing for the testcase at hand.

PR debug/101533
* dwarf2out.cc (gen_type_die_with_usage): When we have
output the typedef already do nothing for a typedef variant.
Do not set TREE_ASM_WRITTEN on the type.

* g++.dg/debug/pr101533.C: New testcase.

(cherry picked from commit 99a3f013c3bb8bc022ca488b40aa18fd97b5224d)

4 months agomiddle-end/101478 - ICE with degenerate address during gimplification
Richard Biener [Wed, 31 Jul 2024 08:07:45 +0000 (10:07 +0200)] 
middle-end/101478 - ICE with degenerate address during gimplification

When we gimplify &MEM[0B + 4] we are re-folding the address in case
types are not canonical which ends up with a constant address that
recompute_tree_invariant_for_addr_expr ICEs on.  Properly guard
that call.

PR middle-end/101478
* gimplify.cc (gimplify_addr_expr): Check we still have an
ADDR_EXPR before calling recompute_tree_invariant_for_addr_expr.

* gcc.dg/pr101478.c: New testcase.

(cherry picked from commit 33ead6400ad59d4b38fa0527a9a7b53a28114ab7)

4 months agotree-optimization/98845 - ICE with tail-merging and DCE/DSE disabled
Richard Biener [Mon, 17 Feb 2025 14:53:11 +0000 (15:53 +0100)] 
tree-optimization/98845 - ICE with tail-merging and DCE/DSE disabled

The following shows that tail-merging will make dead SSA defs live
in paths where it wasn't before, possibly introducing UB or as
in this case, uses of abnormals that eventually fail coalescing
later.  The fix is to register such defs for stmt comparison.

PR tree-optimization/98845
* tree-ssa-tail-merge.cc (stmt_local_def): Consider a
def with no uses not local.

* gcc.dg/pr98845.c: New testcase.
* gcc.dg/pr81192.c: Adjust.

(cherry picked from commit 6b8a8c9fd68c5dabaec5ddbc25efeade44f37a14)

4 months agolto/91299 - weak definition inlined with LTO
Richard Biener [Fri, 28 Feb 2025 13:09:29 +0000 (14:09 +0100)] 
lto/91299 - weak definition inlined with LTO

The following fixes a thinko in the handling of interposed weak
definitions which confused the interposition check in
get_availability by setting DECL_EXTERNAL too early.

PR lto/91299
gcc/lto/
* lto-symtab.cc (lto_symtab_merge_symbols): Set DECL_EXTERNAL
only after calling get_availability.

gcc/testsuite/
* gcc.dg/lto/pr91299_0.c: New testcase.
* gcc.dg/lto/pr91299_1.c: Likewise.

(cherry picked from commit bc34db5b12e008f6ec4fdf4ebd22263c8617e5e3)

4 months agotree-optimization/87984 - hard register assignments not preserved
Richard Biener [Fri, 28 Feb 2025 09:36:11 +0000 (10:36 +0100)] 
tree-optimization/87984 - hard register assignments not preserved

The following disables redundant store elimination to hard register
variables which isn't valid.

PR tree-optimization/87984
* tree-ssa-dom.cc (dom_opt_dom_walker::optimize_stmt): Do
not perform redundant store elimination to hard register
variables.
* tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
Likewise.

* gcc.target/i386/pr87984.c: New testcase.

(cherry picked from commit 535115caaf97f5201fb528f67f15b4c52be5619d)

4 months agoc++/79786 - bougs invocation of DATA_ABI_ALIGNMENT macro
Richard Biener [Mon, 3 Feb 2025 10:27:20 +0000 (11:27 +0100)] 
c++/79786 - bougs invocation of DATA_ABI_ALIGNMENT macro

The first argument is supposed to be a type, not a decl.

PR c++/79786
gcc/cp/
* rtti.cc (emit_tinfo_decl): Fix DATA_ABI_ALIGNMENT invocation.

(cherry picked from commit 6ec19825b4e72611cdbd4749feed67b61392aa81)

4 months agomiddle-end/66279 - gimplification clobbers shared asm constraints
Richard Biener [Fri, 28 Feb 2025 08:58:36 +0000 (09:58 +0100)] 
middle-end/66279 - gimplification clobbers shared asm constraints

When the C++ frontend clones a CTOR we do not copy ASM_EXPR constraints
fully as walk_tree does not recurse to TREE_PURPOSE of TREE_LIST nodes.
At this point doing that seems too dangerous so the following instead
avoids gimplification of ASM_EXPRs to clobber the shared constraints
and unshares it there, like it also unshares TREE_VALUE when it
re-writes a "+" output constraint to separate "=" output and matching
input constraint.

PR middle-end/66279
* gimplify.cc (gimplify_asm_expr): Copy TREE_PURPOSE before
rewriting it for "+" processing.

* g++.dg/pr66279.C: New testcase.

(cherry picked from commit 95f5d6cc17e7d6b689674756c62b6b5e1284afd0)

4 months agoDaily bump.
GCC Administrator [Wed, 2 Apr 2025 00:23:54 +0000 (00:23 +0000)] 
Daily bump.

4 months agoc++: fix missing lifetime extension [PR119383]
Marek Polacek [Tue, 25 Mar 2025 17:36:24 +0000 (13:36 -0400)] 
c++: fix missing lifetime extension [PR119383]

Since r15-8011 cp_build_indirect_ref_1 won't do the *&TARGET_EXPR ->
TARGET_EXPR folding not to change its value category.  That fix seems
correct but it made us stop extending the lifetime in this testcase,
causing a wrong-code issue -- extend_ref_init_temps_1 did not see
through the extra *& because it doesn't use a tree walk.

This patch reverts r15-8011 and instead handles the problem in
build_over_call by calling force_lvalue in the is_really_empty_class
case as well as in the general case.

PR c++/119383

gcc/cp/ChangeLog:

* call.cc (build_over_call): Use force_lvalue to ensure op= returns
an lvalue.
* cp-tree.h (force_lvalue): Declare.
* cvt.cc (force_lvalue): New.
* typeck.cc (cp_build_indirect_ref_1): Revert r15-8011.

gcc/testsuite/ChangeLog:

* g++.dg/cpp0x/temp-extend3.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
(cherry picked from commit e9803f10c9f376f6d091e7ef3ad6e1c92e7c8e8c)

4 months agoFix a pasto in ao_compare::compare_ao_refs
Martin Jambor [Tue, 11 Mar 2025 13:52:44 +0000 (14:52 +0100)] 
Fix a pasto in ao_compare::compare_ao_refs

When reading the function ao_compare::compare_ao_refs I came accross
what I believe to ba a copy-and-paste error which this patch fixes.

gcc/ChangeLog:

2025-03-10  Martin Jambor  <mjambor@suse.cz>

* tree-ssa-alias.cc (ao_compare::compare_ao_refs): Fix a
copy-and-paste error.

(cherry picked from commit dc47161c1f32c3f27d1157ba0de9d98ea1b7fc82)

4 months agolibstdc++: Avoid bogus -Walloc-size-larger-than warning in test [PR116212]
Jonathan Wakely [Tue, 1 Apr 2025 10:02:43 +0000 (11:02 +0100)] 
libstdc++: Avoid bogus -Walloc-size-larger-than warning in test [PR116212]

The compiler can't tell that the vector size fits in int, so it thinks
it might overflow to a negative value, which would then be a huge
positive size_t.  In reality, the vector size never exceeds five.

There's no warning on trunk, so just change the local variable to use
type unsigned so that we get rid of the warning on the branches.

libstdc++-v3/ChangeLog:

PR libstdc++/116212
* testsuite/20_util/specialized_algorithms/uninitialized_move/constrained.cc:
Use unsigned for vector size.

4 months agoipa: Do not modify cgraph edges from thunk clones during inlining (PR116572)
Martin Jambor [Fri, 14 Mar 2025 15:07:01 +0000 (16:07 +0100)] 
ipa: Do not modify cgraph edges from thunk clones during inlining (PR116572)

In PR 116572 we hit an assert that a thunk which does not have a body
looks like it has one.  It does not, but the call_stmt of its outgoing
edge points to a statement, which should not.  In fact it has several
outgoing call graph edges, which cannot be.  The problem is that the
code updating the edges to reflect inlining into the master clone (an
ex-thunk, unlike the clone, which is still an unexpanded thunk) is
being updated during inling into the master clone.  This patch simply
makes the code to skip unexpanded thunk clones.

gcc/ChangeLog:

2025-03-13  Martin Jambor  <mjambor@suse.cz>

PR ipa/116572
* cgraph.cc (cgraph_update_edges_for_call_stmt): Do not update
edges of clones that are unexpanded thunk.  Assert that the node
passed as the parameter is not an unexpanded thunk.

gcc/testsuite/ChangeLog:

2025-03-13  Martin Jambor  <mjambor@suse.cz>

PR ipa/116572
* g++.dg/ipa/pr116572.C: New test.

(cherry picked from commit 075ec330307c5b1fe5ed166a633c718c06b01437)

4 months agolibstdc++: Add ranges::range_common_reference_t for C++20 (LWG 3860)
Jonathan Wakely [Wed, 12 Jun 2024 14:02:14 +0000 (15:02 +0100)] 
libstdc++: Add ranges::range_common_reference_t for C++20 (LWG 3860)

LWG 3860 added this alias template. Both libc++ and MSVC treat this as a
DR for C++20, so this change does so too.

libstdc++-v3/ChangeLog:

* include/bits/ranges_base.h (range_common_reference_t): New
alias template, as per LWG 3860.
* testsuite/std/ranges/range.cc: Check it.

(cherry picked from commit 92b554a8412624a0aa3ca9b502976ebec7eff34e)

4 months agolibstdc++: Check feature test macro for associative container node extraction
Jonathan Wakely [Fri, 1 Nov 2024 10:50:02 +0000 (10:50 +0000)] 
libstdc++: Check feature test macro for associative container node extraction

Replace some `__cplusplus > 201402L` preprocessor checks with more
expressive checks for the appropriate feature test macro.

libstdc++-v3/ChangeLog:

* include/bits/stl_map.h: Check __glibcxx_node_extract instead
of __cplusplus.
* include/bits/stl_multimap.h: Likewise.
* include/bits/stl_multiset.h: Likewise.
* include/bits/stl_set.h: Likewise.
* include/bits/stl_tree.h: Likewise.

(cherry picked from commit 408f5b847b5b4e552274dc7b02ccaf106395936d)

4 months agolibstdc++: Add static_assert to std::packaged_task::packaged_task(F&&)
Jonathan Wakely [Mon, 10 Mar 2025 14:29:36 +0000 (14:29 +0000)] 
libstdc++: Add static_assert to std::packaged_task::packaged_task(F&&)

LWG 4154 (approved in Wrocław, November 2024) fixed the Mandates:
precondition for std::packaged_task::packaged_task(F&&) to match what
the implementation actually requires. We already gave a diagnostic in
the right cases as required by the issue resolution, so strictly
speaking we don't need to do anything. But the current diagnostic comes
from inside the implementation of std::__invoke_r and could be more
user-friendly.

For C++17 (when std::is_invocable_r_v is available) add a static_assert
to the constructor, so the error is clear:

.../include/c++/15.0.1/future: In instantiation of 'std::packaged_task<_Res(_ArgTypes ...)>::packaged_task(_Fn&&) [with _Fn = const F&; <template-parameter-2-2> = void; _Res = void; _ArgTypes = {}]':
lwg4154_neg.cc:15:31:   required from here
   15 | std::packaged_task<void()> p(f); // { dg-error "here" "" { target c++17 } }
      |                               ^
.../include/c++/15.0.1/future:1575:25: error: static assertion failed
 1575 |           static_assert(is_invocable_r_v<_Res, decay_t<_Fn>&, _ArgTypes...>);
      |                         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Also add a test to confirm we get a diagnostic as the standard requires.

libstdc++-v3/ChangeLog:

* include/std/future (packaged_task::packaged_task(F&&)): Add
static_assert.
* testsuite/30_threads/packaged_task/cons/dangling_ref.cc: Add
dg-error for new static assertion.
* testsuite/30_threads/packaged_task/cons/lwg4154_neg.cc: New
test.

Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com>
(cherry picked from commit 4d2683b04fd329c97e3da09498345fe3ee00455f)

4 months agolibstdc++: Add testcase for std::filesystem::copy [PR118699]
Jonathan Wakely [Thu, 30 Jan 2025 17:02:47 +0000 (17:02 +0000)] 
libstdc++: Add testcase for std::filesystem::copy [PR118699]

This was fixed last year by r15-2409-g017e3f89b081e4 (and backports), so
just add the testcase.

libstdc++-v3/ChangeLog:

PR libstdc++/118699
* testsuite/27_io/filesystem/operations/copy.cc: Check copying a
file to a directory.

(cherry picked from commit 466da4baba46608882d16d121fa46d33f841bc7b)

4 months agoDaily bump.
GCC Administrator [Tue, 1 Apr 2025 00:24:06 +0000 (00:24 +0000)] 
Daily bump.